| Document | Document Title |
|---|---|
| US11363072B1 |
Identifying and mitigating vulnerable security policies
This disclosure is directed to technologies for identifying and mitigating vulnerable security policies. Using techniques described herein, vulnerable or “weak” ciphers may be identified and updated before the use of the weak security policies and/or weak ciphers cause a disruption in service. A cipher agent may be authorized to monitor the SSL handshake messages which negotiate SSL ciphers and protocols happening from and to a server application. The cipher agent identifies the security policies and/or the ciphers that are utilized by the client application and determines whether the ciphers are weak ciphers. The cipher agent stores security data associated with security policies and ciphers supported by the client device. The cipher agent may store this data in a log, and/or make it available to the client and/or one or more services for further action. |
| US11363070B2 |
Preventing cross-site request forgery
A computer security method including detecting a request, made by a computer software application, prior to transmission of the request to a recipient, accessing a predefined security requirement associated with the recipient, determining whether the predefined security requirement is met, and preventing at least a portion of the request from being transmitted to the recipient if the predefined security requirement is not met. |
| US11363066B2 |
Method and device for information processing, test terminal, test platform and storage medium
A method for information processing, applied to a test terminal and includes: a test case is executed through a test application run by the test terminal to generate a message to be sent to a server supporting running of the test application; information of the message is acquired; and the information of the message is sent to a test platform, the information of the message being configured for the test platform to analyze a location of the server and obtain a risk detection result about whether the test application has a cross-border transmission risk or not based on whether the location is outside a safe region range or not. A device for information processing, a test terminal, a test platform and a storage medium are also provided. |
| US11363065B2 |
Networked device identification and classification
A method of identifying network devices such as a router includes accessing an HTTP server on at least one network device, and evaluating a web page served by the device's HTTP server. The web page is evaluated to determine whether it is similar to a page group from a plurality of page groups, where each of the plurality of page groups comprises a group of web pages similar to other pages in the page group. If the evaluated web page is determined similar to a page group, the page group most similar to the evaluated web page is identified as corresponding to the identity of the network device. |
| US11363063B2 |
Botnet detection and mitigation
A method and system for detecting and mitigating a malicious bot is disclosed. Address information is obtained from a third-party threat intelligence provider, the address information corresponding to network traffic that has been identified as malicious network traffic. Network traffic originating on a networked device is inspected in search of packets that correspond to the obtained address information. A check is performed to determine if a given one of the searched packets corresponds to an address associated with the address information and, responsive to the check indicating that the given one of the searched packets corresponds to the address associated with the address information, a managed router service is configured to mitigate the malicious network traffic. |
| US11363062B1 |
System and method for decentralized internet traffic filtering policy reporting
A system and method to filter potentially unwanted traffic from trackers, third-party cookies, malicious websites or other sources and present the aggregated results of said filtering to the VPN user. One of the embodiments enables a VPN user to opt-in or opt-out from the filtering activities while being able to access the aggregated information about filtering. In another embodiment, the user can choose to customize the filtering parameters to add or remove specific targets from the filtering policies. |
| US11363056B2 |
Compromised password detection based on abuse and attempted abuse
Systems and methods are disclosed for analyzing a plurality of failed login records that correspond to failed login attempts detected by a computing system, to identify suspicious patterns of activity that can facilitate the supplementation of password blacklists for improving account security. To accomplish the foregoing, failed login records that include information associated with failed login attempts are obtained for analysis. The failed login records are analyzed to identify a set of failed login records that show initial characteristics of a suspicious pattern of activity. The information included in the set of failed login records are further analyzed to determine whether a suspicious pattern of activity is actually present. When a suspicious pattern of activity is identified in the set of failed login records, the passwords used in the failed login attempts are stored in password blacklists associated with the account identifier(s) with which the passwords were used. |
| US11363052B2 |
Attack path and graph creation based on user and system profiling
Methods and systems for generating an attack path based on user and system risk profiles are presented. The method comprises determining user information associated with a computing device; determining system exploitability information of the computing device; determining system criticality information of the computing device; determining a risk profile for the computing device based on the user information, the system exploitability information, and the system criticality information; and generating an attack path based on the risk profile. The attack path indicates a route through which an attacker accesses the computing device. The system exploitability information indicates one or more of: the vulnerability associated with the computing device, an exposure window associated with the computing device, and a protection window associated with the computing device. The system criticality information indicates one or more: assets associated with the computing device and services associated with the computing device. |
| US11363045B2 |
Vehicle anomaly detection server, vehicle anomaly detection system, and vehicle anomaly detection method
A vehicle anomaly detection server includes: a communicator that communicates with a vehicle to receive a log of an in-vehicle network in the vehicle; a processor; and a memory including at least one set of instructions that, when executed by the processor causes the processor to perform operations including: selecting, when information indicating that an anomaly is occurring to a first vehicle among vehicles is obtained by the processor, an anomaly-related vehicle from among the vehicles based on the anomaly, the first vehicle being the vehicle that communicates with the communicator; transmitting, to the anomaly-related vehicle via the communicator, a first request to transmit a log of an in-vehicle network in the anomaly-related vehicle; and determining whether an anomaly is occurring to the anomaly-related vehicle, based on information indicated by the log transmitted from the anomaly-related vehicle and received by the communicator. |
| US11363040B2 |
Systems and methods for dynamically restricting the rendering of unauthorized content included in information resources
Systems and methods for dynamically restricting rendering of unauthorized content included in information resources are provided herein. A computing device can identify an information resource including a content object specifying one or more graphical characteristics. The computing device can determine that the content object corresponds to a restricted content object by applying at least one of an action-based detection policy to detect actions performed on the information resource or a visual-based detection policy to detect the graphical characteristics of the content object. The computing device can modify by applying a content rendering restriction policy the information resource to alter rendering of the content element on the information resource responsive to the determination. |
| US11363039B2 |
Detection of data leaks using targeted scanning
Techniques are disclosed relating to detecting data leaks using targeted scanning. For example, in various embodiments, a scanner module may monitor communications between a user device and a server system, where the user device requests access to a resource provided via the server system. The scanner module may perform various data loss prevention operations to detect the leaking of sensitive data associated with an organization. For example, the scanner module may perform an initial scan of the resource to capture an initial version of the resource at an establishment of a connection between the user device and the server system. The scanner module may perform a subsequent scan that captures a subsequent version of the resource. Based on the initial and subsequent versions of the resource, the scanner module may determine whether any data loss prevention rules have been violated and, if so, initiate one or more corrective actions. |
| US11363038B2 |
Detection impersonation attempts social media messaging
Embodiments include a method, system and computer program product for detecting impersonation attempts in social media messaging. Aspects include receiving, via a social media network, a message from a sender to a recipient and analyzing a content of the message to extract factual statements from the message. Aspects also include analyzing a profile of the recipient to extract facts from the profile and comparing each of the factual statements to the facts from the profile. Based on a determination that one of the factual statements are verifiable by at least one of the facts, aspects include assigning a likelihood score to the factual statements. Aspects further include calculating a legitimacy score for the message based at least in part on the likelihood score of each verified factual statement from the message and transmitting the legitimacy score and the message to the recipient. |
| US11363037B2 |
Real-time detection of malicious activity through collaborative filtering
A machine compromised by malicious activity is detected by identifying an anomalous port opened on an entity of a network. The anomalous port is detected through collaborative filtering using usage patterns derived from normal network traffic using open ports of entities on the network. The collaborative filtering employs single value decomposition with alternating least squares to generate a recommendation score identifying whether an entity having a newly-opened port is likely to be used for malicious activity. |
| US11363034B2 |
Method and device for operating a control unit in a network of control units
A method for operating a control unit in a network of control units, including the following features: a request to change a mode of the network is received, the request is subjected to a check, which provides a check result; a communication is disseminated to the remaining control units and a response is received in each case with respect to the check result and to a status of the network known to the control unit; and the request is complied with or rejected as a function of the responses. |
| US11363033B2 |
Time-dependent blockchain-based self-verification user authentication method
A time-dependent blockchain based self-verification user authentication method of the present disclosure includes, a reservation registration step for registering reservation time which is obtained by adding a set time to an input time, and an authentication subject to a blockchain which is distributed and stored in a plurality of nodes; a reservation notification step for notifying a notification group, which is associated with the authentication subject, of a reservation registered in the reservation registration step; a verification step for verifying authentication request time and the reservation time, which has been registered to the blockchain, when there is an authentication request with respect to the authentication subject; and a step for granting authentication when the authentication request time is within a valid range of the reservation time in the verification step. |
| US11363032B2 |
Resolving decentralized identifiers at customized security levels
The resolving of a decentralized identifier at a customized security level. When a decentralized identity is resolved, it is resolved into a data structure (e.g., a document) that corresponds to the decentralized identity. The resolving includes causing a user interface to be rendered to the user, detecting user interaction with the user interface, and then based on that user interaction identifying a level of resolver security to use when resolving that decentralized identifier. The method then resolve the decentralized identity using that identifier level of resolver security. As an example, higher levels of resolver security may be obtained by using consensus from multiple resolvers. |
| US11363031B2 |
Network architecture providing device identification and redirection using whitelisting traffic classification
A network edge device includes switching circuitry configured to switch traffic from one or more endpoint devices to corresponding application services over a network; and processing circuitry configured to monitor the traffic from the one or more endpoint devices, compare the monitored traffic to classify the one or more endpoint devices into a corresponding trust level of a plurality of trust levels, and route the traffic from each of the one or more endpoint devices based on its corresponding trust level. The network edge element is configured to provide network connectivity to the one or more endpoint devices. |
| US11363029B2 |
Big data distributed processing and secure data transferring with hyper fencing
Aspects of the disclosure relate to resource allocation and rebating during in-flight data masking and on-demand encryption of big data on a network. Computer machine(s), cluster managers, nodes, and/or multilevel platforms can request, receive, and/or authenticate requests for a big data dataset, containing sensitive and non-sensitive data. Profiles can be auto provisioned, and access rights can be assigned. Server configuration and data connection properties can be defined. Secure connection(s) to the data store can be established. The big data dataset can be uncompressed based on a codec and uncompressed data blocks can be distributed for processing. Sensitive information can be redacted into a sanitized dataset based on one or more data obfuscation types. The encrypted data can be transmitted, in response to the request, to a source, a target, and/or another computer machine and can be decrypted back into the sanitized dataset. |
| US11363026B2 |
Workflow control method and system based on one-to-one correspondence between roles and users
The present invention discloses a workflow control method and system based on a one-to-one correspondence between roles and users, including: building a three-layer structure model of user-role-permission, wherein each role is an independent individual, one role can only be related to a unique user during the same period, and one user is related to one or more roles; using the three-layer structure model to control a workflow, selecting an approval role, and authorizing the approval role; and determining, according to a user's related role, an approval task to be processed, and performing an approval operation with the permission of the related role. In the present invention, the subject of the approval operation in the workflow is the role. Even if changes on an employee or a user have occurred (such as transfer or resignation), or the approval permissions of the employee have changed, it is only necessary to relate the employee to a new role, or adjust the approval permissions of the existing role accordingly, but not necessary to reset or adjust the processes. The setting is convenient and not prone to errors or omissions. This avoids impact on the normal operation of a company, and significantly improves the reliability of the workflow. |
| US11363025B2 |
Diabetes management partner interface for wireless communication of analyte data
Systems, devices, and methods are disclosed for wireless communication of analyte data. In embodiments, a method of using a diabetes management partner interface to configure an analyte sensor system for wireless communication with a plurality of partner devices is provided. The method includes the analyte sensor system receiving authorization to provide one of the partner devices with access to a set of configuration parameters via the diabetes management partner interface. The set of configuration parameters is stored in a memory of the analyte sensor system. The method also includes, responsive to input received from the one partner device via the diabetes management partner interface, the analyte sensor system setting or causing a modification to the set of configuration parameters, according to a system requirement of the one partner device. |
| US11363024B2 |
Supplanting access credentials for shared data visualizations
Supplanting access credentials for shared data visualizations including receiving, from a first identity provider (IDP) account, a request to generate a data visualization utilizing restricted data from a cloud-based data warehouse, wherein the data visualization is generated by accessing the restricted data using the first IDP account; in response to receiving a request to share the data visualization with a receiving entity without access to the restricted data, associating, by a data visualizer, the data visualization with a service account with access to the restricted data, wherein the service account is not authenticated as a user of the first IDP account; and providing, by the data visualizer to the receiving entity, access to the data visualization including generating the data visualization by accessing, using the service account, the restricted data from the cloud-based data warehouse. |
| US11363020B2 |
Method, device and storage medium for forwarding messages
Embodiments of this application disclose a method for detecting a security breach. The method includes: receiving a target message sent by a terminal of a first account to a terminal of a second account; determining that there is a potential security risk associated with the first account; interrupting transmission of the target message from the first account to the second account; randomly selecting an identity authentication question from a preset question database; separately sending the identity authentication question to the first account and the second account, respectively; receiving a first answer to the identity authentication question from the first account and a second answer to the identity authentication question from the second account; and resuming transmission of the message from the first account to the second account when the first answer matches the second answer. |
| US11363016B2 |
Biometrics hub for changing a schedule for processing biometrics data in response to detecting a power event
A biometrics hub may establish a session with a first biometric device, receive first biometric data of a user from the first biometric device, establish a session with a second biometric device, receive second biometric data of the user from the second biometric device, and store the first biometric data and the second biometric data at the biometrics hub. The biometrics hub may further detect a power event associated with at least one of the first biometric device or the second biometric device, and change, in response to detecting the power event, a schedule for processing at least one of the first biometric data or the second biometric data. |
| US11363015B2 |
Provisioning transferable access tokens
Methods and systems for provisioning transferable access tokens are disclosed. An access device associated with a resource provider can communicate with a first communication device as part of an interaction between a first user and the resource provider. The access device can generate an authorization request message comprising a first access token and an interaction value. The access device can transmit the authorization request message to an authorization computer. The authorization computer can authorize the interaction and generate an authorization response message. After authorizing the interaction, the authorization computer can provide a transferable access token to the first communication device. The first communication device can transmit the transferable access token to a second communication device, so that a second user can use the transferable access token in an interaction. |
| US11363013B2 |
Authentication identity management for mobile device applications
An identity authenticator receives a first authentication credential from a first application at a first computing device. The identity authenticator then determines that the first authentication credential is associated with a second authentication credential for the first application at a second computing device based on a stored authentication identity. The identity authenticator then provides a stored execution state for the first application to the first computing device, wherein the stored execution state is associated, based on the stored authentication identity, with at least one of the first authentication credential or the second authentication credential. |
| US11363010B2 |
Method and device for managing digital certificate
A method and device for managing a digital certificate are provided. A digital certificate requesting device negotiates with a digital certificate issuing device by using an acquired authorization code, to establish a security data channel and generate a security key, and messages can be encrypted with the generated data communication key during a process of message interaction between the digital certificate requesting device and the digital certificate issuing device, thereby effectively increasing the security in data transmission. The method and device are applicable for automatically requesting for, querying, updating, revoking a digital certificate and acquiring a digital certificate revocation list in various scenarios. |
| US11363009B2 |
System and method for providing secure cloud-based single sign-on connections using a security service provider having zero-knowledge architecture
Systems and methods for providing secure single sign-on authentication and management of encrypted vault in a fully cloud-based zero-knowledge environment. A user on a client device attempts to use a network resource. The user is directed to login to the identity provider. The identity provider authenticates the user through a login process. If the user is identified to be a valid user, the identity provider sends the user an attestation sign-on key to confirm the user is valid. The client device sends the attestation sign-on key to a vault service provider, which verifies the attestation using a configured public key. The client device retrieves a data decryption key and an encrypted data key, which are stored in different entities in the system. The encrypted data key is decrypted on the client device using the data decryption key. |
| US11363000B1 |
System for virtual private network authentication sensitivity with read only sandbox integration
Embodiments of the invention are directed to a system that performs virtual private network authentication with a read only sandbox integration for virtual private network security. In this way, the invention matches an internet protocol address to a user portrait of user internet protocol addresses to confirm that the connecting device is the authentic user for accessing the virtual private network. If there is a discrepancy between the user portrait and the internet protocol address of the connecting device, the system launches a read only sandbox for connecting device interaction. The read only sandbox allows for bilateral communication with the connecting device where the system has full access to the connection device at a file level to interrogate file level data for confirmation. |
| US11362999B2 |
Client-only virtual private network
There is disclosed in one example a computing apparatus, including: a hardware platform, including a processor and a memory; and executable instructions encoded in the memory to provide a client-only virtual private network (VPN) including a VPN client and a VPN server on a single physical device, wherein the VPN client is configured to communicatively couple to the VPN server and to provide proxied Internet protocol (IP) communication services via the VPN server. |
| US11362992B2 |
Allocating additional bandwidth to resources in a datacenter through deployment of dedicated gateways
Some embodiments provide a method for deploying edge forwarding elements in a public or private software defined datacenter (SDDC). For an entity, the method deploys a default first edge forwarding element to process data message flows between machines of the entity in a first network of the SDDC and machines external to the first network of the SDDC. The method subsequently receives a request to allocate more bandwidth to a first set of the data message flows entering or exiting the first network of the SDDC. In response, the method deploys a second edge forwarding element to process the first set of data message flows of the entity in order to allocate more bandwidth to the first set of the data message flows, while continuing to process a second set of data message flows of the entity through the default first edge node. The method in some embodiments receives the request for more bandwidth by first receiving a request to create a traffic group and then receiving a list of network addresses that are associated with the traffic group. In some embodiments, the method receives the list of network addresses associated with the traffic group by receiving a prefix of network addresses and receiving a request to associate the prefix of network addresses with the traffic group. Based on this request, the method then creates an association between the traffic group and the received prefix of network addresses. |
| US11362977B2 |
Method and system for prioritizing communications responses
Methods, information handling systems and computer readable media are disclosed for prioritizing communications. In one embodiment, a method includes receiving, at a communications prioritization engine including a processor, communication data reflecting a communication. The communication data comprises source information representing a source of the communication. This method embodiment further includes identifying subject characteristic information within the communication data, and determining a subject characteristic score component using the subject characteristic information. The embodiment further includes determining a source score component using the source information and determining a response priority score using the subject characteristic score component and the source score component. The embodiment further includes determining, based on the response priority score, whether the communication data should be forwarded to a response function of the provider, and forwarding the communication data to the response function in response to a determination that the communication data should be forwarded. |
| US11362976B2 |
Secure forum facilitator in controlled environment
An forum facilitator device is provided that allows for a controlled environment to provide a secure forum for residents to provide communications to other registered users of the secure forum. The communications are provided through posts made in the secure forum and through other types of communications from the inmate such as but not limited to emails and text messages. The forum facilitator device operates the secure forum and implements rules to control what is posted on the secure forum, who is able to access the secure forum, and what entities are allowed to view and interact with residents of the controlled environment. |
| US11362975B1 |
Visibility filtering
Methods, systems, and apparatus, including computer programs encoded on computer storage media, for visibility filtering. One of the methods includes receiving a request for particular data on a social messaging platform; passing the request to one or more services, wherein each service is configured to call to data sources or to additional services to collect the particular data according to a request path defined for a type of request; performing visibility filtering at each service upon obtaining responses to calls made by that service, wherein performing visibility filtering at a service comprises calling a local visibility library that evaluates one or more rules with respect to the obtained response data, and wherein the results of the visibility filtering are passed upstream along the request path until a last service obtains all filtered response data; and assembling a final response to the request based on the filtered response data. |
| US11362973B2 |
System and method for providing unique interactive media content
A system and method for displaying content to a user comprises a database containing a plurality of media, each of the plurality of media having an associated user image and a processor operably coupled to the database. The processor is configured to receive an image captured by a user device, receive an inputted code entered into the user device, lookup a specific media content corresponding to the image and the code and transmit the specific media content to the user device for display to the user in real time. The method comprises receiving the scanned image and the inputted code, looking up the specific media corresponding to the scanned image and the code and transmitting in real time, the specific media to the user device for display to the user. |
| US11362972B2 |
Systems and methods for messaging patient information in medical system environments
A messaging server may receive message data which may comprise message information. The messaging server may generate one or more messages which may be formatted according to different endpoint protocols. The messaging server may send the messages using the same protocol as the protocol used for formatting the messages. |
| US11362966B2 |
Method of ethernet auto-negotiation over one cable
Examples include a method of identifying single twisted pair cable Ethernet auto-negotiation requests or double twisted pair cables Ethernet auto-negotiation requests using detection of message time interval patterns. The method includes receiving, by a first Ethernet device, a plurality of messages transmitted by a second Ethernet device over a single twisted pair cable connecting the first Ethernet device and the second Ethernet device; storing one or more time intervals between starting times of successive pairs of the plurality of messages; determining if a pattern is found in the time intervals; when the pattern is found, setting a single twisted pair cable communications mode between the first Ethernet device and the second Ethernet device; and performing priority resolution between the first Ethernet device and the second Ethernet device. |
| US11362964B2 |
Methods and apparatus for scheduling of services in a traffic-engineering network
Apparatus and methods are provided for scheduling services in a traffic-engineered communications network. In one aspect a method comprises: receiving a request to schedule a second service utilizing the network in a second time period, wherein the second time period overlaps a first time period in which a first service utilizing the network has already been scheduled; and computing a path for the second service through the network. The step of computing the path for the second service through the network comprises: responsive to a determination that the request is received less than the threshold period of time before the start of the first time period, disallowing the second service from pre-empting the first service. |
| US11362962B2 |
Systems and methods for queue control based on client-specific protocols
The present disclosure generally relates to controlling access to resources by selectively processing requests stored in a task queue to prioritize certain requests over others, thereby preventing automated scripts from accessing the resources. More specifically, the present disclosure relates to a normalization and prioritization system for controlling access to resources by queuing resource requests based on a client-defined normalization process that uses one or more data sources. |
| US11362960B2 |
Layer 3 fair rate congestion control notification
A network device, including ports that receive/send data packets from/to a network, receives data packets of multiple traffic flows, and populates a queue in memory with the data packets. The network device periodically updates a fair rate for the multiple traffic flows to converge a length of the queue to a reference length. Specifically, the network device determines a length of the queue, a change in the length from a previous length, and a deviation of the length from the reference length. The network device detects an increase in the change in length above a threshold that is based on the reference length. If the increase is not above the threshold, the network device derives the fair rate from a previous fair rate using proportional integral control. The network device identifies elephant flows among the multiple traffic flows, and sends the fair rate to a source of each elephant flow. |
| US11362958B2 |
Device and method for transferring identification and/or data flow control information between devices
A device and a method for communicating with a link partner device. The device may include a fragmentation unit configured to fragment a packet into multiple fragments if a size of the packet is greater than a maximum fragment size, a packet control header unit configured to generate a packet control header for a packet or each fragment of the packet, and a transceiver configured to send the packet or the fragments of the packet with the packet control header via a connection between the device and the link partner device. The packet control header may include at least one of a traffic control identifier field for identifying a data stream to which the packet belongs, a priority field for indicating a priority for the packet, or a data flow control field for congestion control between the device and the link partner device. |
| US11362957B2 |
Jitter elimination and latency compensation at DetNet transport egress
In one embodiment, a method comprises receiving, by a transport layer executed by a processor circuit in an apparatus, an identifiable grouping of data; storing, by the transport layer, the data as transport layer packets in a buffer circuit in the apparatus, the storing including inserting into each transport layer packet a grouping identifier that identifies the transport layer packets as belonging to the identifiable grouping; and causing, by the transport layer, a plurality of transmitting deterministic network interface circuits to deterministically retrieve the transport layer packets from the buffer circuit for deterministic transmission across respective deterministic links, the grouping identifier enabling receiving deterministic network interface circuits to group the received transport layer packets, regardless of deterministic link, into a single processing group for a next receiving transport layer. |
| US11362954B2 |
Tunneling inter-domain stateless internet protocol multicast packets
A router is configured for deployment in a first domain of a network. The router includes a processor and a transmitter. The processor is configured to access addresses of egress routers for a multicast flow that are partitioned into local addresses of egress routers in the first domain and external addresses of egress routers in a second domain of the network. The processor is also configured to prepend an explicit multicast route (EMR) to a packet in the multicast flow to form a first EMR packet. The EMR includes information representing the external addresses. The transmitter is configured to unicast the first EMR packet to an advertising border router (ABR) that conveys the multicast flow from the first domain to the second domain. In some cases, the router includes a receiver configured to receive another EMR packet from another router in another domain via a tunnel between the routers. |
| US11362953B2 |
Method and apparatus for controlling congestion
A method, performed by a receiver, for controlling congestion, including receiving packets from a transmitter, determining a maximum transmission rate of the received packets; determining a minimum packet delay of the received packets; determining characteristics of a congestion window of next packets to be received from the transmitter based on the maximum transmission rate and the minimum packet delay; and transmitting information on the determined characteristics of the congestion window to the transmitter. |
| US11362947B2 |
Interconnecting multiple separate openflow domains
A computer-implemented method comprising: receiving, by a first controller device in a first OpenFlow domain, a packet from an originating endpoint in the first OpenFlow domain destined for a destination endpoint in a second OpenFlow domain that is separate from the first OpenFlow domain; outputting, by the first controller device, a broadcast message identifying the destination endpoint to a plurality of respective controller devices associated with separate OpenFlow domains; receiving, by the first controller device, a response to the broadcast message from the destination endpoint via a second controller device associated with the second OpenFlow domain; updating, by the first controller device, a local flow table identifying a flow for transmitting the packet to the destination endpoint based on information included in the response; and transmitting, by the first controller device, the packet towards the destination endpoint based on updating the local flow table. |
| US11362945B2 |
Dynamic lookup optimization for packet classification
A method is implemented by a network device to dynamically optimize lookup speed in a packet processing table maintained at the network device while the network device is in operation. The method includes determining one or more runtime metrics of the packet processing table, selecting a lookup algorithm for the packet processing table from a set of lookup algorithms supported by the network device based on the one or more runtime metrics of the packet processing table, and configuring the network device to match incoming packets against rules in the packet processing table using the selected lookup algorithm for the packet processing table. |
| US11362943B2 |
System and method for validating virtual session requests
A computing system may include a computing device configured to store and update published resource entitlements for a plurality of client devices. The system may further include a plurality of virtual delivery appliances configured to receive connection requests from the client devices, with the connection requests including a connection lease issued based upon the published resource entitlements for the client devices, request validation of the connection leases from the computing device, and provide the client devices with access to virtual sessions corresponding to the published resource entitlements responsive to validation of connection leases from the computing device. The computing device, responsive to validation requests from the virtual delivery appliances, may also compare the connection leases to the updated published resource entitlements and validate virtual session requests based thereon. |
| US11362935B2 |
Automatic multi-chassis link aggregation configuration with link layer discovery
A computer network includes a server computer having communication ports that are wired to switch ports of two separate network switches. The network switches receive link layer discovery protocol (LLDP) packets from other network devices, and automatically aggregate corresponding switch ports into a port channel aggregation based on the contents of the LLDP packets. |
| US11362932B2 |
Achieving highly available autonomous systems (AS) in a source-selected path routing network
The present application refers to a method and a system for reliably forwarding data packets in a source-selected path routing network including a plurality of autonomous systems. For this purpose, a data plane of each of the plurality of autonomous systems that comprises one or more border routers and a control plane of each of the plurality of autonomous systems that comprises a control service are split into two or more shards. Each of said shards contains exactly one control service and at least one border router and is responsible for processing, storing and propagating path information only for a subset of existing links between an autonomous system and a neighboring autonomous system within the source-selected path routing network. Hence, in the source-selected path routing network, each individual shard is not critical and thus can fail without compromising the availability of the entire system. |
| US11362931B2 |
Optimized processing based on processing job requirements
A system is provided for optimized selection of a plurality of processing units for resource intensive processing operations. The system includes a processor and a computer readable medium operably coupled thereto, to perform the scheduling operations which include receiving a processing operation for a data input that requires processing in a computing environment, determining at least one constraint requirement imposed on performing the processing operation that are all required to be fulfilled for successful completion of the processing operation, accessing a routing table associated with the computing environment, determining one of the plurality of processing units from the routing table based on fulfilling all of the at least one constraint requirement, and assigning the processing operation to the one of the plurality of processing units on the least costly basis or other optimization consideration. The processing units are serverless in a preferred embodiment. |
| US11362929B2 |
System and method for remote management of sale transaction data
This invention discloses a novel system and method and system for sharing a data item among a plurality of computers connected in an arbitrary network topology. In the preferred embodiment, each of the plurality of computers has a local copy of the data item, but can only edit the copy by obtaining a token from the current token owner, thereby becoming a new current token owner. When the token owner makes a change to the data item, the change is broadcast to the other computers, along with the identity of the new current token owner. Routing of token requests and broadcasts is accomplished by means of each computer calculating a routing table based on information it receives from those computers to which it is directly connected on the network. |
| US11362928B2 |
Method, electronic device and computer program product for generating network topology
Techniques for generating a network topology are provided. For example, a method comprises: sending, at an edge node of a network, first exploration data to a first node of the network. The method also comprises receiving from the first node first feedback information for the first exploration data. The first feedback information includes identity information of the first node and first associated node list information, and the first associated node list information includes identity information of nodes associated with the first node in the network. In addition, the method comprises: determining latency between the first node and the second node based on the first latency information and the second latency information. Then, the method further comprises updating the network topology based on the latency between the first node and the second node. Through the method, the present disclosure can provide accurate data support for path optimization. |
| US11362927B2 |
Methods, switch and frame capture managing module for managing ethernet frames
A switch and a Frame Capture Managing Module (FCMM) for managing Ethernet frames. The FCMM receives a request for capturing Ethernet frames at a network interface of the switch. The request comprises an identity of the network interface and information relating to a second filter indicating Ethernet frames for monitoring by the network node. The FCMM sends to the switch, a configuration comprising the identity of the network interface of the switch, an indication about a first multicast channel, and information relating to a first filter. The FCMM sends a response comprising a second multicast channel relating to the first multicast channel. Furthermore, the switch receives a request for receiving Ethernet frame sent to the first multicast channel. The switch filters, by use of the first filter, received Ethernet frames into a collection of Ethernet frames. The switch sends the collection of Ethernet frames on the first multicast channel. |
| US11362925B2 |
Optimizing service node monitoring in SDN
A method implemented by a switch in a software defined networking (SDN) network to monitor a service node communicatively coupled to the switch. The method includes generating a first flow entry that matches packets received from the service node, generating a second flow entry that matches packet received from the service node, wherein the second flow entry has a priority that is lower than a priority of the first flow entry, removing the first flow entry and transmitting a flow removed message to an SDN controller in response to a determination that the first flow entry has timed out, maintaining a statistic associated with the second flow entry, and transmitting a statistics trigger event message to the SDN controller in response to a determination that the statistic associated with the second flow entry exceeds a threshold value. |
| US11362924B2 |
Methods and apparatus to monitor media in a direct media network
Methods, apparatus, and articles of manufacture to monitor media are disclosed. An example apparatus includes a message extractor to extract message information from a message obtained from a streaming monitor at a media exposure measurement location, the message information including media identification information of media presented in a direct media network and media device information associated with at least one of a streaming client device associated with the direct media network or a media presentation device associated with the direct media network, a media device identifier to identify at least one of the streaming client device or the media presentation device based on the media device information, a media identifier to identify the media based on the media identification information, and a media creditor to credit the media as having been accessed in response to identifying the media. |
| US11362919B2 |
Method and device for monitoring data related to broadcasting and/or streaming
A method for monitoring data related to broadcasting and/or streaming is described wherein broadcasting and/or streaming data are provided. At least one still image within the broadcasting and/or streaming data is detected in order to identify a possible error. The still image detected is compared with a whitelist of images. A still image alarm is suppressed provided that the still image detected is in the whitelist. Further, a device for monitoring data related to broadcasting and/or streaming is described. |
| US11362918B2 |
Intelligent analytics virtual network orchestration system and method
Aspects of the subject disclosure may include, for example, detecting a request for a network service between two network nodes and identifying a network path between the two network nodes, wherein the network path is realized by equipment performing a number of network functions. A first network function of the number of network functions is associated with a first number of redundant virtualized network resources performing at least a similar network function as the first network function. Usage metrics are determined corresponding to the first number of redundant virtualized network resources and a first virtualized network resource of the first number of redundant virtualized network resources is assigned to the network path based on the usage metrics to obtain a first assigned virtualized network resource. The network service is provided between the two network nodes using the first assigned virtualized network resource. Other embodiments are disclosed. |
| US11362916B2 |
Visual identification of a port and a cable in a network
Provided is a computer-implemented method, system, and apparatus for a visual identification of a port and a previously connected cable of a link in a network environment including a network switch or a network device. The apparatus having an LED arrangement at a port assembly configured for illumination at the port and configured to provide illumination via the cable to a remote end of the link. An identifier providing component controls the LED arrangement based on a unique attribute of the link including: detecting a status change of a link; obtaining the unique attribute related to the link from a layer of a protocol received on both ends of the link; selecting an identifier based on the unique attribute related to the link; and instructing the LED arrangement to be configured to provide a light output of the selected identifier. |
| US11362915B2 |
Distributed computing system for intensive video processing
A method for distributing load in a network of processing nodes, wherein the network includes a requesting node, and a set of external processing nodes. The method includes sending an Internet Control Message Protocol (ICMP) message to each external processing node, classifying each external processing node as being either a responding or a non-responding node based on its response time, identifying a responding node that has the capability to fulfill a video processing request, determining first and second sets of excluded responding nodes, selecting the identified node for fulfilling the video processing request, when the identified node does not form a part of the first and second sets of excluded responding nodes, sending a transmission package from the requesting node to the selected identified node for processing, and receiving a binary response from the selected node. |
| US11362914B2 |
Method and control system for controlling and/or monitoring devices
A simple management of complex control instruction chains in a blockchain for a specific task for controlling devices is provided. In particular, a prescribed validity is assigned for a specific task of a blockchain-based device controller, the validity being defined by the life cycle (e.g. the period of use) of a device, for example. |
| US11362913B2 |
Systems and methods for managing service level agreements of support tickets using a chat session
Systems and methods of the present disclosure facilitate managing information technology service level agreements. In some embodiments, the system includes a server that accesses a database storing a support ticket in memory. The support ticket can include a creation time and a service level agreement. The service level agreement can include a maximum response time. The server initiates, via the computer network, responsive to input from a computing device, a chat session associated with the computing device and the support ticket. The initiating can be associated with a time stamp. The server can be configured to determine a compliance with the service level agreement. The compliance can be computed as a difference between the time stamp and the creation time being less than the maximum response time. The server can be configured to generate a notification of the compliance with the service level agreement. |
| US11362911B2 |
Network management device and method for discovering and managing network connected databases
Systems, software, and methods for managing traditional (i.e., TCP/IP-based), non-traditional, and traditional-non-traditional hybrid networks of connected electronic devices are described. In one example, network management policy and network management applications are downloaded automatically upon detection and identification of a new device, application or service on a network. In another example, information related to at least one aspect of the network is obtained by a network management device through connection to a non-TCP/IP network, or by way of a gateway device or application, at least one applicable management policy is identified, and the identified policy is used to manage at least one aspect of the network's operation. In another example, devices, applications or services presenting various behaviors under various scenarios are evaluated and placed under management. |
| US11362903B2 |
High performance and scalable multi-layer topology discovery systems and methods
High performance and scalable multi-layer topology discovery systems and methods provide awareness of what services are present across a multi-layer network. The present disclosure achieves a high level of performance in service discovery, and, in addition, provides a form of scalability in proportion to network size by distributing service observation across servers in a cluster. The present disclosure defines a concept of change-proportional online run-time efficiency and thus provides an optimal design. Further, the present disclosure achieves horizontal scale, leveraging multiple cores across multiple servers. |
| US11362901B1 |
Dynamic balloon network coverage map
Example embodiments may relate to web interfaces for a balloon-network. For example, a computing device may display a graphical interface that provides information related to a balloon network configured to provide service in a geographic area, where the graphical interface includes a map. The computing device may receive real-time bandwidth data related to balloons in the balloon network, where the balloons are each configured to change position via altitudinal movement and via horizontal movement with respect to the ground. Based at least in part on the received real-time bandwidth data, the computing device may display, on the map, a visual representation of bandwidth information corresponding to one or more regions in the geographic area, where the visual representation of bandwidth information updates from time to time based at least in part on a change in position of one or more balloons in the balloon network. |
| US11362896B2 |
Devices, systems and processes for rapid install of IoT devices
Devices, systems, and processes for rapid installation of numerous Internet-of-Things (IoT) devices are described. For at least one embodiment, a system for installing multiple Internet-of-Things (IoT) devices may include a multi-device hub communicatively coupled to each of multiple IoT devices. One or more gateways are coupled to the multi-device hub. One or more IoT servers are coupled to at least one of the one or more gateways. The multi-device hub is configured to facilitate a bulk installation of the multiple IoT devices by executing non-transient computer instructions for registering and activating each of the IoT devices with use with one or more IoT servers. |
| US11362895B2 |
Automatic configuration of an extended service appliance for network routers
An external processing system includes a port to exchange signals with a router. The external processing system also includes a processor to receive, from the router via the port, information representing an operating system and a hypervisor in response to the external processing system being connected to the router via the port. The processor instantiates the operating system and the hypervisor based on the received information. The router includes a port allocated to an external processing system and configured to exchange signals with the external processing system. The router also includes a controller to provide, to the external processing system via the port, information representing the operating system and the hypervisor in response to the external processing system being connected to the external processing system via the port. |
| US11362894B2 |
Wiring management system and wiring management method
When separate service apparatuses that provide various communication services to users are connected by a wiring with communication functional units interposed, if there is a wiring abnormality, the location of the abnormality is easily identified. When a wiring connection is completed between separated service apparatuses X and Y that provide various communication services to user terminals 31 and 32 with communication functional units A1 and B2 interposed, a wiring management system 10A includes a transmission network management apparatus 14A that identifies a wiring abnormality. The transmission network management apparatus 14A associates endpoint names of the service apparatuses X and Y and of the functional units A1 and B2 with opposite endpoint names on the opposite sides, defines opposite endpoint IDs of the endpoints of the functional units A1 and B2 as expected values, and saves the end points in association with the opposite endpoint IDs in a DB 14b. Upon completing the wiring connection between the service apparatuses X and Y, an opposite endpoint ID of each of the functional units A1 and B2 and the service apparatuses X and Y opposite to predetermined functional units A1 and B2 is received as a received value via a wiring, and if the received value does not match the expected value, it is determined that the wiring is abnormal. |
| US11362892B2 |
Communication device, certification method, and computer readable recording medium for recertification of devices
A home energy management system (HEMS) controller certifies a plurality of devices participating in an HEMS network. When a request for re-certification is issued to a given device among the plurality of devices and when a response is not available from the device, the HEMS controller suspends a re-certification process for the device and performs a re-certification process for another device first. |
| US11362886B2 |
Distinguishing between network- and device-based sources of service failures
In one example, the present disclosure describes a device, computer-readable medium, and method for distinguishing between network- and device-based sources of service failures in service networks. For instance, in one example, a method includes merging a first set of data with a second set of data to produce a merged data set. The first set of data relates to a customer device connected to a service network and the second set of data relates to the service network. A failure is predicted in the delivery of a service from the service network to the customer device, based on the merged set of data. It is determined whether a source of the failure is rooted in the customer device or in the service network. |
| US11362885B2 |
Method, apparatus, device and readable medium for disaster recovery processing for infrastructure areas
A method, an apparatus, a device and a readable medium for disaster recovery processing for infrastructure areas which relate to the technical field of infrastructure area management are disclosed. The method includes: receiving a request for the service; under the condition that a monitoring system detects that there is an identifier of a faulty infrastructure area in identifiers of at least two infrastructure areas having a binding relationship with the request for the service, unbinding the binding relationship between the identifier of the faulty infrastructure area and the service; scheduling traffic for the request for the service to an unfaulty infrastructure area, according to a remaining unbound binding relationship between the service and the identifier of the unfaulty infrastructure area. According to the technical solutions, the damages may be stopped in time when the fault occurs in the infrastructure area. |
| US11362884B2 |
Fault root cause determining method and apparatus, and computer storage medium
In a fault root cause determining method, a management device obtains a fault feature of a target network in which a fault occurs. The fault feature is determined based on a knowledge graph of the target network in which the fault occurs. The knowledge graph includes a network entity and an abnormal event entity. The abnormal event entity is connected to an abnormal network entity. The abnormal network entity is a network entity that generates an abnormal event in the target network. The abnormal event entity is configured to indicate the abnormal event generated by the abnormal network entity. A type of the network entity is a network device, an interface, a protocol, or a service. The management device determines a fault root cause of the target network based on the fault feature. |
| US11362879B2 |
Constellation rotation method and base station
A constellation rotation method is presented. The method includes: determining a statistical characteristic of a received signal of a Base Station (BS) according to a channel coefficient of one or more User Equipments (UEs), at least one of noise information and interference information, the received signal being a signal received by the BS through a physical channel from the one or more UEs; determining a constellation rotation angle of each UE according to the determined statistical characteristic of the received signal; and for each UE, rotating a constellation of a data stream of a UE according to the constellation rotation angle of the UE. |
| US11362876B2 |
Receiving device and receiving method, and mobile terminal test apparatus provided with receiving device
A receiving device 100 includes a reception unit 10, a delay signal generation unit 22, a difference calculation unit 23 that calculates a phase difference between the received signal and the delay signal, a variance calculation unit 24 that calculates a variance of the phase difference within a plurality of calculation sections while sliding a set of the plurality of calculation sections which are set corresponding to a cyclic prefix group assigned to a predetermined symbol group included in the received signal, together on the time axis, a symbol detecting unit 25 that detects a position of a symbol in the symbol group on the time axis, based on the position of the minimum peak of the variance on the time axis, and a synchronization timing signal generation unit 29 that generates a synchronization timing signal, based on information on the position of the symbol on the time axis. |
| US11362875B2 |
Transmission method, transmitter apparatus, reception method and receiver apparatus
Transmission quality is improved in an environment in which direct waves dominate in a transmission method for transmitting a plurality of modulated signals from a plurality of antennas at the same time. All data symbols used in data transmission of a modulated signal are precoded by hopping between precoding matrices so that the precoding matrix used to precode each data symbol and the precoding matrices used to precode data symbols that are adjacent to the data symbol in the frequency domain and the time domain all differ. A modulated signal with such data symbols arranged therein is transmitted. |
| US11362870B2 |
Frequency modulation demodulation device and control method of frequency modulation demodulation device
A frequency modulation demodulation device and a control method thereof are provided. The frequency modulation demodulation device includes an input terminal, a phase converter, a phase-locked loop circuit, and a frequency offset/shift detector. The phase converter receives an input signal to obtain a phase signal. The phase-locked loop circuit generates a phase adjustment signal according to the phase signal and adjusts the phase signal according to the phase adjustment signal to perform demodulation of the input signal. The phase-locked loop circuit performs signal alignment and signal compensation on the phase signal to generate a filtered phase signal. The phase adjustment signal provides a feedback of and adjusts the phase signal. The frequency offset/shift detector generates a frequency offset/shift determining signal according to the phase adjustment signal. The frequency offset/shift determining signal is related to a phase frequency offset/shift of the input signal. |
| US11362869B2 |
Method, transmitter, structure, transceiver and access point for provision of multi-carrier on-off keying signal
A method of transmitting an On-Off Keying, OOK, signal which includes an ON waveform and an OFF waveform forming a pattern representing transmitted information. The method includes obtaining a basic baseband waveform; scrambling the basic baseband waveform by applying a first binary randomised sequence where one of the binary values cause transformation to a complex conjugate; modulating the information to be transmitted by applying the scrambled basic baseband waveform for the ON waveform and applying no waveform for the OFF waveform; and transmitting the modulated information. |
| US11362868B2 |
Neuromorphic device and neuromorphic system including the same
A neuromorphic device includes a neuron block, a spike transmission circuit and a spike reception circuit. The neuron block includes a plurality of neurons connected by a plurality of synapses to perform generation and operation of spikes. The spike transmission circuit generates a non-binary transmission signal based on a plurality of transmission spike signals output from the neuron block and transmits the non-binary transmission signal to a transfer channel, where the non-binary transmission signal includes information on transmission spikes included in the plurality of transmission spike signals. The spike reception circuit receives a non-binary reception signal from the transfer channel and generates a plurality of reception spike signals including reception spikes based on the non-binary reception signal to provide the plurality of reception spike signals to the neuron block, where the non-binary reception signal includes information on the reception spikes. |
| US11362867B2 |
Systems, methods and apparatus for transmission of data using M-ARY time reversal pulse position modulation
A system, method and apparatus that includes two or more sensor nodes that obtain sensed data from a structure. A controller receives the sensed data from the sensor nodes, via a network formed by the sensor nodes and the controller. The controller controls functionality of each of the sensor nodes, controls time synchronization among the sensor nodes, detects information collected by the sensor nodes, and communicates, utilizing an M-ary time-reversal based protocol, the detected information using a planar surface of the structure as the transmission medium for elastic waves. |
| US11362865B2 |
Virtual network
A virtual network includes a virtual entry device, a virtual exit device, and a communication channel that couples the virtual entry device to the virtual exit device in a web that lies between and interconnects a local router/switch with a remote router/switch device, where the virtual entry device and the virtual exit device have static forwarding tables which provide substantially improved performance. |
| US11362863B2 |
Handling packets travelling from logical service routers (SRs) for active-active stateful service insertion
Example methods and computer systems for packet handling for active-active stateful service insertion are disclosed. One example may involve in response to detecting a first packet from a first active logical service router (SR), a computer system generating and storing state information that associates (a) the first active logical SR and (b) first tuple information specified by the first packet. The first active logical SR and a second active logical SR may be both associated with the service endpoint address and configured to operate in an active-active mode. In response to detecting the second packet from a destination responsive to the first packet, the computer system may select the first active logical SR over the second active logical SR based on the state information and second tuple information specified by the second packet; and send the second packet towards the first active logical SR for processing according to a stateful service. |
| US11362858B2 |
Method for transmitting data via a communication channel, correspondingly designed device and communication interface, as well as correspondingly designed computer program
The invention relates to a method for transmitting data via a communications channel (106), in which the data is transmitted with a transmission frame, wherein the transmission frame has at least one prioritisation field (PCP) for establishing the priority of the message and a data field, wherein the prioritisation field (PCP) functions to control the bus access by prioritising the messages. For this purpose, a bus access controller is used, in which the priority of at least the last received data packet is stored in a minimum priority storage cell (330). After receiving a data packet, a timer (320) is started, for which a timeout value is set, which is reset when a following packet is received. After reaching the timeout value, a decrementing of the value stored in the minimum priority storage cell (330) occurs. Thereafter, for the purpose of bus access control, when sending a packet, it is checked whether the priority of the packet to be sent is lower than the value stored in the minimum priority storage cell (330), and the sending of the data packet is prevented if the priority of the packet is lower than the value stored in the minimum priority storage cell (330). |
| US11362854B2 |
Information processing apparatus, information processing method, program, and information processing system
There is provided an information processing apparatus including: an acquisition unit configured to acquire apparatus characteristic information output from a reproduction apparatus; and a generation unit configured to generate an image reflecting characteristics of the reproduction apparatus on the basis of the acquired apparatus characteristic information. |
| US11362851B2 |
System and method for providing network support services and premises gateway support infrastructure
A service management system communicates via wide area network with gateway devices located at respective user premises. The service management system remotely manages delivery of application services, which can be voice controlled, by a gateway, e.g. by selectively activating/deactivating service logic modules in the gateway. The service management system also may selectively provide secure communications and exchange of information among gateway devices and among associated endpoint devices. An exemplary service management system includes a router connected to the network and one or more computer platforms, for implementing management functions. Examples of the functions include a connection manager for controlling system communications with the gateway devices, an authentication manager for authenticating each gateway device and controlling the connection manager and a subscription manager for managing applications services and/or features offered by the gateway devices. A service manager, controlled by the subscription manager, distributes service specific configuration data to authenticated gateway devices. |
| US11362843B1 |
Certificate rotation on host
Techniques are disclosed to automate TLS certificate rotation. For example, a certificate rotation event may be detected from a certificate management tool. The certificate rotation event may be associated with a first certificate and may indicate that the first certificate is to be updated with a second certificate. An application server that is running on a host and to which the first certificate is bound may be identified. A certificate identifier for the second certificate may be provided to one or more agents running on the host. A distribution service may obtain certificate information, e.g., a public key, a private key, or a certificate identifier for the second certificate, from the certificate rotation tool. Some or all of the certificate information for the second certificate may be obtained by the one or more agents running on the host. The one or more agents may instruct the application server to bind the second certificate. Binding may be accomplished by the application server establishing new connections using the second certificate. |
| US11362840B2 |
Methods, apparatuses, devices and systems for backtracking service behavior
Disclosed herein are methods, systems, and media for backtracking a user's operation of services. One method comprises: receiving an authorization request from a service device, the authorization request based on a service processing request from a client device, and comprises: data corresponding to a user's operation related to a service, authorization information for accessing the data granted to the service device; a first digital identity of the user; and a second digital identity of the service device; in response to determining that the authorization information satisfies a condition, generating a claim based on the data, the authorization information, the first digital identity, and the second digital identity; recording the claim to a blockchain; and in response to determining that a supervising user has permission to access the claim, granting permission to the supervising user to backtrack the user's operation corresponding to the service based on the claim in the blockchain. |
| US11362838B2 |
Systems and methods for secure data transmission
The present disclosure relates to systems and methods for transmitting data. The methods may include obtaining, by a first module, a first packet, wherein the first packet includes a first random code, first data, and a first signature, wherein the first signature is generated by a second module by encryption based on an original random code and original data; generating, by the first module a second signature by encryption based on the first random code and a checksum of the first data; and generating, by the first module, a first response to the first packet upon determining whether the second signature matches the first signature. |
| US11362834B2 |
Systems and methods for managing digital rights
Systems and methods are described for managing digital rights. Methods may comprise causing an encrypted content asset to be stored at a storage location. The encrypted content asset at the storage location may be accessible by one or more user devices. A transaction may be generated and may comprise an identifier and a decryption key, wherein the decryption key is configured to decrypt at least a portion of the encrypted content asset. The transaction may be caused to be stored in a distributed database, wherein the distributed database is accessible by the one or more user devices using at least the identifier. |
| US11362831B2 |
Systems and methods for privacy-enabled biometric processing
In one embodiment, a set of feature vectors can be derived from any biometric data, and then using a deep neural network (“DNN”) on those one-way homomorphic encryptions (i.e., each biometrics' feature vector) can determine matches or execute searches on encrypted data. Each biometrics' feature vector can then be stored and/or used in conjunction with respective classifications, for use in subsequent comparisons without fear of compromising the original biometric data. In various embodiments, the original biometric data is discarded responsive to generating the encrypted values. In another embodiment, the homomorphic encryption enables computations and comparisons on cypher text without decryption. This improves security over conventional approaches. Searching biometrics in the clear on any system, represents a significant security vulnerability. In various examples described herein, only the one-way encrypted biometric data is available on a given device. Various embodiments restrict execution to occur on encrypted biometrics for any matching or searching. |
| US11362827B2 |
IOT security mechanisms for industrial applications
The disclosure provides methods and systems for securing internet of thing systems. One method includes receiving, at a computing device, a token, wherein the token comprises a cryptographically signed list of rights that the computing device is authorized to request. The method also includes requesting, using the computing device, an action of a receiving device in an industrial location, wherein requesting the action comprises sending the token with the request to cause the receiving device to authenticate the user of the computing device and confirm the user is authorized to perform the action. |
| US11362826B2 |
Endorsement process for non-deterministic application
An example operation may include one or more of receiving a storage request which comprises respective data sets generated by a plurality of endorser peers via simulation of a blockchain request, detecting that a key value of a data set generated by a first endorser peer is different than a respective key value of a data set generated by a second endorser peer, and committing the storage request to a data block of a blockchain in response to verifying that the detected different key values generated by the first and second endorser peers correspond to a multi-value key of the blockchain request. |
| US11362825B2 |
Extended reality authentication
Methods and systems for secure authentication in an extended reality (XR) environment are described herein. An XR environment may be output by a computing device and for display on a device configured to be worn by a user. A first plurality of images may be determined via the XR environment. The first plurality of images may be determined based on a user looking at a plurality of objects, real or virtual, in the XR environment. The first plurality of images may be sent to a server, and the server may return a second plurality of images. A public key and private key may be determined based on different portions of each of the second plurality of images. The public key may be sent to the server to register and/or authenticate subsequent communications between the computing device and the server. |
| US11362823B2 |
Cryptographic device
A device is provided comprising a first memory for storing a first key, a second memory for storing a second key, the device being capable of conducting a first cryptographic algorithm, wherein the first cryptographic algorithm uses the first key, the device being capable of conducting a second cryptographic algorithm, wherein the second cryptographic algorithm uses the second key, and a selection unit, which is programmable to use either the first cryptographic algorithm or the second cryptographic algorithm. Also, a method for operating such device is provided. |
| US11362822B2 |
Shared keys based on multiple features
A method for secret sharing utilizing multiple features of an input includes: receiving a registration input; obtaining features from the registration input; generating a secret key and a plurality of shared keys according to a shared secret scheme; associating each of the plurality of shared keys with a respective feature of the registration input; generating a plurality of additional features associated with additional keys having a similar format as a shared key associated with a respective feature; storing the plurality of shared keys associated with respective features together with the plurality of additional keys associated with additional features; and encrypting an element to be protected by the secret key using the secret key. |
| US11362820B2 |
Shared secret generation
According to an example aspect of the present invention, there is provided an apparatus comprising at least one processing core, at least one memory including computer program code, the at least one memory and the computer program code being configured to, with the at least one processing core, cause the apparatus at least to receive from a pressure sensor matrix data describing a time-varying pressure interaction of the pressure sensor matrix with a second pressure sensor matrix, process the data to obtain a bit sequence, and use the bit sequence as a shared secret in a cryptographic procedure with a device. |
| US11362818B2 |
Method for issuing quantum key chip, application method, issuing platform and system
A method for issuing a quantum key chip, a method for applying a quantum key chip, an issuing platform and a system. The method comprises: feeding, by a a quantum key issuing platform, a quantum key into a quantum key chip and binding an ID of the quantum key chip in a one-to-one correspondence to an ID of a user using the quantum key chip, where the ID of the quantum key chip and/or the ID of the user serve as identification information of the quantum key in the quantum key chip, and the quantum key is obtained by pre-negotiation between the quantum key issuing platform and a key distribution center (KDC); and sending, by the quantum key issuing platform, the identification information of the quantum key to the KDC, so that the KDC binds the identification information to the quantum key corresponding to the identification information. |
| US11362813B2 |
Cryptographic systems and methods for extending apparent size of pools of truly random numbers
A first copy of a True Random Number (TRN) pool comprising key data of truly random numbers in a pool of files may be stored on a sender and a second copy of the TRN pool is stored on a receiver. An apparent size of the TRN pool on each device is expanded using a randomizing process for selecting and re-using the key data from the files to produce transmit key data from the first copy and receive key data from the second copy. |
| US11362812B2 |
Method of end to end securing of a communication
The aim of the invention is to strengthen the security of secure voice and/or video communications established through a network of Internet type. The security of these communications, which are based on the use of the SRTP protocol, is strengthened by the invention which makes it possible, without significantly modifying the protocols, to use better quality session keys produced by a security server of HSM type. These keys are configured by an intermediate server of SIP proxy type when establishing the communication. |
| US11362806B2 |
System and methods for recording codes in a distributed environment
Systems and methods for recording codes in a distributed environment are provided. A first node receives data including at least one code from a code generation computing device via a network. The first node adds a first new block to a first cryptographically verifiable encrypted ledger, the first block containing the at least one code. The first node adds a second new block to a second cryptographically verifiable, the second block containing the at least one code. The first node or a second node retrieves the at least one code from the second cryptographically verifiable unencrypted ledger. The first node or the second node analyzes the at least one code pursuant to a set of rules. |
| US11362803B2 |
Method and system for providing explanation for output generated by an artificial intelligence model
This disclosure relates to method and system for providing explanation for output generated by artificial intelligence (AI) model. The method may include receiving encrypted input data and a public encryption key from a client device, wherein the encrypted input data is encrypted using the public encryption key. The method may further include generating an encrypted AI model by encrypting an AI model using the public encryption key. The method may further include generating an encrypted output and an encrypted feature data based on the encrypted input data using the encrypted AI model, and generating an encrypted explanation for the encrypted output based on the encrypted feature data. The method may further include providing the encrypted output and the encrypted explanation to the client device for rendering, wherein the encrypted output and the encrypted explanation are decrypted by the client device using a private encryption key. |
| US11362800B2 |
Dynamically weighted exclusive or gate having weighted output segments for phase detection and phase interpolation
Methods and systems are described for receiving a reference clock signal and a phase of a local oscillator signal at a dynamically-weighted XOR gate comprising a plurality of logic branches, generating a plurality of weighted segments of a phase-error signal, the plurality of weighted segments including positive weighted segments and negative weighted segments, each weighted segment of the phase-error signal having a respective weight applied by a corresponding logic branch of the plurality of logic branches, generating an aggregate control signal based on an aggregation of the weighted segments of the phase-error signal, and outputting the aggregate control signal as a current-mode output for controlling a local oscillator generating the phase of the local oscillator signal, the local oscillator configured to induce a phase offset into the local oscillator signal in response to the aggregate control signal. |
| US11362799B2 |
Digital return receiver with digital data aggregation
In some embodiments, a digital clock management system includes input signal conversion circuitry, logic circuitry and output signal conversion circuitry. The input signal conversion circuitry converts input signals to corresponding first digital data streams, each of which contains digital data synchronized to a first data clock. First digital logic circuitry converts the first digital data streams to second digital data streams, each of which contains digital data synchronized to the first data clock, and converts the second digital data streams to third digital data streams, each of which contains digital data synchronized to a common clock. Second digital logic circuitry converts the third digital data streams to a single digital data stream. The output signal conversion circuitry converts the single digital data stream to a modulated output signal. |
| US11362797B2 |
System and methods for mapping and demapping digitized signals for optical transmission
An optical network includes a transmitter portion configured to transmit a digitized stream of symbols over a digital optical link, a mapping unit disposed within the transmitter portion and configured to code the transmitted digitized stream of symbols with a mapping code prior to transmission over the digital optical link, a receiver portion configured to recover the coded stream of symbols from the digital optical link, and a demapping unit disposed within the receiver portion and configured to map the recovered coded stream of symbols into an uncoded digitized signal corresponding to the digitized stream of symbols at the transmitter portion prior to coding by the mapping unit. |
| US11362794B2 |
Determining a relationship between a first and a second node
It is provided a method for determining a relationship between a first node and at least one second node each serving one different or the same wireless communication network, the method comprising the steps of detecting pilot contamination; and determining a relationship between the first node and at least one of the second nodes based on the detected pilot contamination. |
| US11362786B2 |
Channel acquisition using orthogonal time frequency space modulated pilot signals
Techniques for performing channel estimation in an orthogonal time, frequency and space (OTFS) communication system include receiving a wireless signal comprising a data signal portion and a pilot signal portion in which the pilot signal portion includes multiple pilot signals multiplexed together in the OTFS domain, performing two-dimensional channel estimation in a time-frequency domain based on a minimum mean square error (MMSE) optimization criterion, and recovering information bits using a channel estimate obtained from the two-dimensional channel estimation. |
| US11362783B2 |
Transmitting reference signals in 5G or other next generation communication systems
Techniques for transmitting reference signals (RSs) having respective signal patterns in the coding chain to improve performance of multiple input, multiple output (MIMO) communication systems are presented. For downlink transmissions, an RS management component (RSMC) of a network node can determine a first resource element (RE) pattern for RSs of a first cell and a second RE pattern for RSs of a second cell in the time, frequency, or code domain. RSMC can utilize an adaptive interleaver in the coding chain to improve performance of MIMO systems. RSMC can facilitate configuring user equipment (UE) about the interleaver at the RE domain or as part of virtual resource block (VRB)-to-physical resource block (PRB) domain. RSMC can thereby reduce interference on RSs from other co-channel RSs, thereby improving channel estimation performance for channel-state-information estimation and data detection by the UE, and achieving significant gains in link and system throughputs. |
| US11362782B2 |
Method and device for controlling transmission of sounding reference signal in wireless access system supporting machine type communication
The present invention provides methods for controlling transmission of a sounding reference signal (SRS) in a wireless access system supporting machine type communication (MTC) and devices for supporting same. A method for controlling transmission of an SRS by an MTC terminal in a wireless access system supporting MTC, according to an embodiment of the present invention, can comprise the steps of: receiving an upper layer signal comprising information about an SRS which is to be repeatedly transmitted; configuring the SRS on the basis of the information about the SRS; and transmitting the SRS by means of a subband to which a physical uplink shared channel (PUSCH) is allocated and which is being frequency hopped. The subband comprises six physical resource blocks (PRB), and the SRS can be sequentially transmitted to the subband being frequency hopped. |
| US11362781B2 |
Reference signal configuration method, apparatus, and system
The present disclosure provides a method and apparatus for reference signal configuration. The method includes: determining a time domain density of a phase tracking reference signal (PTRS) according to a first modulation and coding scheme (MCS) and correspondence information between MCSs and PTRS time domain densities; determining a frequency domain density of the PTRS according to a first scheduled bandwidth and correspondence information between scheduled bandwidths and PTRS frequency domain densities; and mapping the PTRS to one or more resource elements (REs) according to the time domain density of the PTRS and the frequency domain density of the PTRS when certain conditions are met. |
| US11362774B2 |
Transmission adaptation in a wireless network
Various example embodiments are disclosed relating to transmission adaptation in a wireless network. According to another example embodiment, an apparatus may include a processor. The processor may be configured to measure a channel quality for a plurality of wireless resources (e.g., physical resource blocks), determine one or more proposed resources based on the measured channel quality for the wireless resources, determine at least one proposed transmission parameter based on a number of the proposed wireless resources and the channel quality of the proposed wireless resources, and send a report to an infrastructure node, the report including the at least one proposed transmission parameter and identifying the proposed wireless resources. |
| US11362768B2 |
Robust acknowledgement retransmission
Methods, systems, and devices for wireless communication are described. A user equipment (UE) may receive a transport block (TB) of data from a network, decode the TB of data, transmit to the network a first acknowledgement based on a result of the decoding, receive a signal from the network that includes an acknowledgement retransmission request and a TB indication that indicates a TB of data to which the acknowledgement retransmission request relates, determine a second acknowledgement based on the acknowledgement retransmission request and the TB indication, and transmit the second acknowledgement to the network. |
| US11362763B2 |
Techniques and apparatuses for spatial diversity in a coordinated multipoint network
Various aspects of the present disclosure generally relate to wireless communication. In some aspects, a user equipment (UE) may receive a plurality of communications from a corresponding plurality of transmission/reception points (TRPs) included in a coordinated multipoint network. At least two communications, of the plurality of communications, may have different redundancy versions from a common codebook, and may be received in a same transmission time interval (TTI). The UE may decode the plurality of communications using joint decoding. Numerous other aspects are provided. |
| US11362762B2 |
Method and system for the error-correcting transmission of a data record via a unidirectional communication unit
A method and a system for fault-correcting transfer of a dataset from a first network into a second network via a unidirectional communication unit, the receiving apparatus having a limited computing and main memory capacity is provided. The dataset is divided into partial datasets and are each coded by adding at least one correction mark. The marks and correction marks are decoded repeatedly in the second network, wherein marks and correction marks associated with a first encoded partial dataset are stored in a main memory, marks and correction marks associated with other encoded partial datasets are buffered in a background memory, and the first coded partial dataset is decoded, and then the previously received marks and/or correction marks of one of the other coded partial datasets are shifted from the background memory into the main memory. The dataset is reproduced from the decoded partial datasets in the second network. |
| US11362761B2 |
Communication method and communication device
A communication method includes executing a cyclic block permutation for a codeword generated based on a quasi-cyclic parity-check code including a repeat-accumulate quasi-cyclic low-density parity-check code, where the cyclic block permutation is permutation of cyclic blocks within the codeword, and mapping each bit of the codeword for which the cyclic block permutation is executed to any one of constellation point of a non-uniform constellation. |
| US11362759B2 |
Transmission power control for an uplink control channel
A base station indicates, to a user equipment (UE) configured for operation with carrier aggregation, a resource for a transmission of a physical uplink control channel (PUCCH) format that conveys acknowledgement information from the UE, and the UE determines the resource and a transmission power for the PUCCH format. |
| US11362758B2 |
Communication method and communications device
A communication method and a communications device are provided. The communication method includes: determining a modulation and coding scheme index; determining first information based on received DCI; determining, based on the first information, modulation and coding scheme information corresponding to the modulation and coding scheme index, wherein the first information comprises a search space in which the DCI is located, and the search space in which the DCI is located is a common search space or a user-specific search space. |
| US11362757B2 |
Apparatus including a transmission processing unit that generates transmission signal sequences of multiple power layers
An apparatus including: a first transmission processing unit that generates transmission signal sequences of multiple power layers that are to be multiplexed using power allocation; and a second transmission processing unit that processes a transmission signal sequence of a power layer using an interleaver, a scrambler, or a phase coefficient corresponding to the power layer for each of one or more of the multiple power layers. The apparatus improves accuracy of decoding of a desired signal when multiplexing/multiple access is performed using power allocation. |
| US11362755B2 |
Adaptive capacity optimization in optical transmission systems
A system comprising an optical receiver for multi-wavelength-channel optical communication, an optical source of spontaneous emission light and a tunable optical filter connected to receive the light at an input. The tunable optical filter can have a filter spectrum with spectral passbands separated by spectral notches. The system also includes an optical fiber link connecting an output of the optical filter to the optical receiver for multi-wavelength-channel optical communication. The receiver can be configured to make a measurement indicative of an optical power level in at least one of the notches or to make measurements of optical power levels and at least one of the passbands and at least one of the notches in response to the optical source transmitting the filtered light to the optical fiber link. Another embodiment includes an apparatus comprising an optical test module including a source of spontaneous emission light and an optical filter connected to receive the spontaneous emission light from the source. |
| US11362752B2 |
Device and method for communications signalling through a fragmented spectrum
The invention relates to a device for transmission of data on a frequency spectrum divided into a plurality Nf of spectrum fragments (f1, f2) each of which covers a frequency band, the frequency bands being discontiguous. The device comprises a packet generator configured to generate a data packet comprising a payload and at least one occurrence of a constant envelope signalling sequence. Said sequence, for example a modified Zadoff-Chu sequence, comprises N complex symbols and consists of a plurality of complex symbol sets each associated with one of the spectrum fragments. Each set comprises N/Nf complex symbols and each complex symbol of a set comprises a scaling term to the frequency band covered by the spectrum fragment associated with this set and a spectral transposition term in the frequency band covered by the spectrum fragment associated with this set. |
| US11362751B2 |
Timing adjustment for distributed network architecture
In some embodiments, a first computing device detects a loss of a connection to a first source of timing information that the first computing device and a second computing device use to maintain synchronization with a first clock and a second clock. The first computing device receives a second source of timing information from the second computing device. The second source of timing information is also being transmitted to a third computing device. The first computing device uses the second source of timing information to determine a first timestamp and determines a second timestamp from the first clock. The first computing device uses the first timestamp and the second timestamp to adjust a rate of the first clock where the first clock is used to transmit the second source of timing information from the second computing device to the third computing device. |
| US11362739B2 |
Optical transceiver and optical transmission/reception method
In order to suppress any reduction in the reception performance of an optical transceiver, the optical transceiver includes a light source, an optical splitter that splits the output of the light source into a first split light and a second split light, an optical modulation unit that modulates the first split light, a coherent receiver that causes the inputted received light to interfere with the second split light, and a first control unit that controls the split ratio of the optical splitter on the basis of the reception characteristic of the received light received by the coherent receiver. |
| US11362738B2 |
Individually routable digital subcarriers
Consistent with an aspect of the present disclosure, electrical signals or digital subcarriers are generated in a DSP based on independent input data streams. Drive signals are generated based on the digital subcarriers, and such drive signals are applied to an optical modulator, including, for example, a Mach-Zehnder modulator. The optical modulator modulates light output from a laser based on the drive signals to supply optical subcarriers corresponding to the digital subcarriers. These optical subcarriers may be received by optical receivers provided at different locations in an optical communications network, where the optical subcarrier may be processed, and the input data stream associated with such optical subcarrier is output. Accordingly, instead of providing multiple lasers and modulators, for example, data is carried by individual subcarriers output from an optical source including one laser and modulator. Thus, a cost associated with the network may be reduced. Moreover, each of the subcarriers may be detected by a corresponding one of a plurality of receivers, each of which being provided in a different location in the optical communication network. Thus, receivers need not be co-located, such that the network has improved flexibility. |
| US11362735B1 |
Silicon photonics multicarrier optical transceiver
Disclosed herein are techniques, methods, structures and apparatus that provide a silicon photonics multicarrier optical transceiver wherein both the transmitter and receiver are integrated on a single silicon chip and which generates a plurality of carriers through the effect of an on-chip modulator, amplifies the optical power of the carriers through the effect of an off-chip amplifier, and generates M orthogonal sets of carriers through the effect of an on-chip basis former. |
| US11362734B2 |
Systems and methods for optical modulation index calibration in a CATV network
Systems and methods for optical modulation index calibration in a CATV network. |
| US11362732B2 |
Dual LEO satellite system and method for global coverage
The present invention relates to satellite systems and more particularly, to the provision of a satellite system and method for communications applications, with global coverage. An optimal method of providing global broadband connectivity has been discovered which uses two different LEO constellations with inter-satellite links among the satellites in each constellation, and inter-satellite links between the constellations. The first constellation is deployed in a polar LEO orbit with a preferred inclination of 99.5 degrees and a preferred altitude of 1000 km. The second constellation is deployed in an inclined LEO orbit with a preferred inclination of 37.4 degrees and a preferred altitude of 1250 km. |
| US11362731B2 |
Method for transmitting data from an object on board an aircraft to a network of connected objects
The present invention relates to a method for transmitting data from an object (6) on board an aircraft (1) to a server (3) of a network of connected objects (4), the method comprising: if the aircraft (1) is detected as being in flight, the sending (108) of the data item by the object (6) to an aircraft radio communication device (10) of the aircraft (1) for communication with the ground, and the transmission of the data item by the aircraft communication system (10) to a ground station (2), for subsequent retransmission of the data item by the ground station (2) to the server (3); and, if the aircraft (1) is detected as not being in flight, the sending (116) of the data item by the object (6) to the server (3) without passing through the aircraft radio communication system (10) of the aircraft (1). |
| US11362727B2 |
Restarting a bandwidth part inactivity timer of a wireless device
A wireless device receives configuration parameters indicating a timer value of a bandwidth part (BWP) inactivity timer. The BWP inactivity timer associated with the timer value is started in response to switching to a first BWP as an active BWP. The BWP inactivity timer is stopped based on initiating a random-access procedure. In response to receiving a control information, the random-access procedure is stopped before the random-access procedure completes. The BWP inactivity timer is restarted based on the stopping of the random-access procedure. |
| US11362726B2 |
Method and device for selecting the beam indication information from a network node when receiving
The present disclosure provides a beam indication processing method, a user equipment and a network device. The beam indication processing method includes: determining beam indication information to be used currently; determining a beam for reception according to the determined beam indication information; and performing receiving according to the determined beam. |
| US11362725B2 |
Reshaping beams of a beam pattern
There is provided mechanisms for reshaping individual beams of a beam pattern. A method is performed by a control node. The method comprises determining the beam pattern by distributing available transmission energy in individual beams according to a weighted combination of the individual beams. Different weights are applied for at least two of the individual beams. The weighted combination of individual beams is based on radio propagation channel properties. The method comprises truncating transmission energy of the individual beam with highest transmission energy in the beam pattern to not be over a threshold. The method comprises redistributing the truncated transmission energy among the remaining individual beams in the beam pattern, thereby reshaping the individual beams of the beam pattern. |
| US11362723B2 |
Method and apparatus for beam management
Methods and apparatuses for high speed beam management. A method of operating a user equipment (UE) includes receiving configuration information for transmission configuration indicator (TCI) states; receiving configuration information for group TCI indices, wherein a group TCI index, m, of the group TCI indices is associated with a group of TCI states; receiving configuration information on which TCI states within the group of TCI states to apply to at least one of downlink channels and uplink channels; and receiving the group TCI index. The method further includes decoding a channel conveying the group TCI index; determining, at least based on the decoded group TCI index, one or more TCI states to apply to the at least one of downlink channels and uplink channels; and at least one of (i) receiving the downlink channels and (ii) transmitting the uplink channels using the determined one or more TCI states. |
| US11362722B2 |
Beam failure recovery procedure for secondary cell in mobile communications
An apparatus detects a beam failure of a serving cell. In response, the apparatus triggers a beam failure recovery request (BFRQ). The BFRQ remains pending until cancelled. In triggering the BFRQ the apparatus generates a BFRQ medium access control (MAC) control element (CE) and transmits the BFRQ MAC CE to a wireless network using a resource according to an uplink (UL) grant. |
| US11362721B2 |
Grid of beams (GoB) adaptation in a wireless communications circuit, particularly for a wireless communications system (WCS)
Grid of beams (GoB) adaptation in a wireless communications circuit, particularly for a wireless communications system (WCS), is disclosed. The wireless communications circuit may be provided in the WCS to provide radio frequency (RF) coverage in a wireless communications cell. In this regard, an antenna array is provided in the wireless communications circuit to radiate the GoB, which includes a number of RF beams corresponding to an RF communications signal(s), in the wireless communications cell. In examples discussed herein, the wireless communications circuit can be configured to detect a coverage condition change in the wireless communications cell and modify the GoB accordingly. By adapting the GoB to the coverage condition change, it may be possible to reduce processing overhead and improve resource usage, data throughput, and system adaptability of the wireless communications circuit, thus helping to optimize RF coverage in the wireless communications cell. |
| US11362719B2 |
Multi-level beam scheduling in a wireless communications circuit, particularly for a wireless communications system (WCS)
Multi-level beam scheduling in a wireless communications circuit, particularly for a wireless communications system (WCS), is disclosed. The WCS includes a central unit(s) and a wireless communications circuit(s) configured to reduce beamforming overhead and improve radio frequency (RF) coverage in a wireless communications cell(s) based on a multi-level beam scheduling scheme. In a non-limiting example, the multi-level beam scheduling scheme includes a first level (L1) scheduler, a second level (L2) scheduler, and a third level (L3) scheduler configured to perform cross-cell beam scheduling, in-cell beam scheduling, and in-beam user equipment (UE) scheduling, respectively. By employing the multi-level beam scheduling scheme in the WCS, it may be possible to reduce processing overhead and improve resource usage, data throughput, and system adaptability of the wireless communications circuit(s), thus helping to optimize capacity and throughput in the wireless communications cell(s). |
| US11362713B2 |
Controlling transmitter output
Methods, apparatus and computer programs are disclosed for controlling the output of a transmission point for a wireless communications network. One embodiment provides a method for controlling the output of a transmission point for a wireless communications network. The method comprises determining an average output power of the transmission point over a period of time; comparing the average output power to an output power reference value; and allocating data, to be transmitted by the transmission point to one or more wireless devices, to a pool of radio resources. The pool of radio resources is adjusted as a function of the comparison between the average output power and the output power reference value, and the output power reference value varies as a function of a maximum antenna gain of an antenna array of the transmission point during the period of time. |
| US11362706B2 |
System and method for combining MIMO and mode-division multiplexing
A communications system comprises a maximum ratio combining (MRC) circuit for receiving a plurality of input data streams and for processing the plurality of input data streams using maximum ration combining to improve signal to noise ratio. A MIMO transmitter transmits the MRC processed carrier signal over a plurality of separate communications links from the MIMO transmitter, each of the plurality of separate communications links from one transmitting antenna of a plurality of transmitting antennas to each of a plurality of receiving antennas at a MIMO receiver. |
| US11362700B2 |
Efficient methods for generating chirp spread spectrum signals
An apparatus comprises a frequency accumulator to produce a frequency ramp, and a symbol modulator to receive symbols and to add to the frequency ramp frequency offsets representative of the symbols, to produce a modulated frequency ramp for a modulated chirp. The apparatus includes a spreading factor controller to control a roll-over rate of the modulated frequency ramp responsive to spreading factor and frequency bandwidth control signals, to control a spreading factor and a frequency bandwidth of the modulated chirp. The apparatus includes a center frequency controller to control a center frequency of the modulated frequency ramp responsive to a center frequency control signal. The apparatus includes a phase accumulator to accumulate frequency samples of the modulated frequency ramp to produce phase samples corresponding to the modulated chirp, and a vector rotator to rotate the phase samples based on an input vector to produce a modulated chirp. |
| US11362692B2 |
Apparatus and method for controlling a switchable filter for coexistence between wireless protocols
Certain aspects of the disclosure related to communications apparatus provides isolation between wireless protocols when operating currently while incurring the additional insertion loss based on providing the isolation only when needed. In an aspect, an apparatus include a switched filter coupled to an antenna where the switched filter includes a filter and a bypass line along with switching circuitry configured to selectively establish a bypass signal path including the bypass line or a filtered signal path including the filter. The apparatus further includes a switched filter controller configured to cause the switching circuitry to selectively connect a transceiver unit to the antenna via the bypass signal path or via the filtered signal path based at least on a frequency band of a carrier signal and a bandwidth of the carrier signal. |
| US11362691B2 |
Broadcast signal receiver and operation method thereof
Disclosed are a broadcast signal receiver and an operation method thereof. When there are multiple broadcast signals representing the same broadcast content, the broadcast signal receiver calculates signal quality values of the respective broadcast signals, select one of the plurality of broadcast signals for a specific channel, on the basis of the signal quality values, and sets information of the selected broad cast signal as the specific channel in the channel map. Therefore, the broadcast signal receiver can prevent the number of channels from being increased due to a plurality of same channels and can provide a higher quality image to the user. |
| US11362688B2 |
Radio frequency module
A radio frequency module includes a radio frequency filter (10), and the radio frequency filter (10) includes a terminal (11), a terminal (12), an impedance element (Z) disposed in series on a path (13) connecting the terminal (11) and the terminal (12), and a parallel arm resonator (P) connected between a node (N) on the path (13) and the ground. The impedance element (Z) is a capacitor or an inductor, capacitance (C) between the ground and a wiring line (14) connecting the node (N) and the parallel arm resonator (P) is larger than capacitance between the ground and a wiring line (16) connecting the impedance element (Z) and a terminal out of the terminal (11) and the terminal (12) having a shorter wiring length to the impedance element (Z) (terminal (11), for example). |
| US11362685B2 |
Nonvolatile memory device and read and copy-back methods thereof
A read method of a nonvolatile memory device is provided. The method includes storing data sensed from selected memory cells of the nonvolatile memory device into a page buffer, performing an error decoding operation by performing error detection on the sensed data to detect and error, correcting the detected error if the error is detected, and overwriting the page buffer with the corrected data, and de-randomizing data stored in the page buffer by using a seed after the error decoding operation has completed. |
| US11362681B2 |
One-shot state transition probability encoder and decoder
In a one-shot state transition encoder, L-bits of user data are received and encoded into a codeword of N-bits, wherein N>L. The encoding of the user data involves repeatedly performing: a) encoding a portion of user bits from the user data to a portion of encoded bits of the codeword based on a set of state transition probabilities, thereby reducing a size of a remaining buffer of the codeword and reducing a number of unencoded bits of the user data; and b) based on the number of unencoded bits of the user data being greater than or equal to the remaining buffer size of the codeword, terminating further encoding and storing the unencoded bits of the user data into the remaining buffer of the codeword. |
| US11362677B2 |
Channel encoding method and encoding apparatus
The application provides a channel encoding method, an encoding apparatus, and a system. A bit sequence X1N is output by using X1N=D1NFN, where D1N is a bit sequence obtained after an input bit sequence u1N is encoded based on locations of K to-be-encoded information bits in an encoding diagram that has a mother code length of N, u1N is a bit sequence obtained based on the K to-be-encoded information bits, and FN is a Kronecker product of log2 N matrices F2. A design considers that the locations of the K to-be-encoded information bits in the encoding diagram that has a mother code length of N include a row location index set H of the information bits in the encoding diagram and a layer location index set M of the information bits in the encoding diagram, where 0≤H≤N, and 0 |
| US11362675B2 |
Transmission method and reception method
In a multi-antenna communication system using LDPC codes, a simple method is used to effectively improve the received quality by performing a retransmittal of less data without restricting applicable LDPC codes. In a case of a non-retransmittal, a multi-antenna transmitting apparatus (100) transmits, from two antennas (114A,114B), LDPC encoded data formed by LDPC encoding blocks (102A,102B). In a case of a retransmittal, the multi-antenna transmitting apparatus (100) uses a transmission method, in which the diversity gain is higher than in the previous transmission, to transmit only a part of the LDPC encoded data as previously transmitted. For example, the only the part of the LDPC encoded data to be re-transmitted is transmitted from the single antenna (114A). |
| US11362672B2 |
Inline decompression
Stack compression refers to compression of data in one or more dimensions. For uncompressed data blocks that are very sparse, i.e., data blocks that contain many zeros, stack compression can be effective. In stack compression, uncompressed data block is compressed into compressed data block by removing one or more zero words from the uncompressed data block. A map metadata that maps the zero words of the uncompressed data block is generated during compression. With the use of the map metadata, the compressed data block can be decompressed to restore the uncompressed data block. |
| US11362671B2 |
Systems and methods of data compression
There is provided a computer-implemented method of compressing a baseline dataset, comprising: creating a weight function that calculates a weight for each instance of each unique data elements in the baseline dataset, as a function of sequential locations of each of the instances of each respective unique data element within the baseline dataset, creating an output dataset storing a codeword for each one of the unique data elements, wherein codewords are according to a compression rule defining data elements associated with a relatively higher weight as being associated with codewords that are relatively shorter, dynamically creating the compressed dataset by sequentially iterating, for each current sequential location of the baseline dataset: determining an encoded data element mapped to the respective data element of the current sequential location according to the weight function, and adjusting the codewords of the output dataset according to the current weights to maintain the compression rule. |
| US11362668B1 |
Leakage compensation for analog decoded thermometric digital-to-analog converter (DAC)
A method of converting an N-bit digital code into analog output currents includes switchably connecting a first number of PN junctions to a positive output terminal and a second number of PN junctions to a negative output terminal based on the N-bit digital code; and switchably connecting a plurality of additional PN junctions to the positive output terminal and the negative output terminal based on the N-bit digital code, including connecting a first number of additional PN junctions to the positive output terminal based on the N-bit digital code and connecting a second number of additional PN junctions to the negative output terminal based on the N-bit digital code such that a first sum of the first number of PN junctions and the first number of additional PN junctions is equal to a second sum of the second number of PN junctions and the second number of additional PN junctions. |
| US11362663B2 |
Quantum pulse determining method, apparatus, device and readable storage medium
Provided are a quantum pulse determining method, apparatus, device and readable storage medium, where basic pulses corresponding to basic logic gates are set in advance, the method including: when manipulating a qubit according to a quantum logic gate, splitting the quantum logic gate to obtain sub-logic gates; and searching for sub-pulses corresponding to the sub-logic gates among the basic pulses, and manipulating the qubit according to the sub-pulse. Basic pulses are set in advance in the method, apparatus, device and readable storage medium provided by the embodiments. When a qubit is to be manipulated, the quantum logic gate can be split into multiple sub-logic gates, and then sub-pulses corresponding to the sub-logic gates are searched for among the basic pulses. Thus, sub-pulses read can be used directly to manipulate the qubit, avoiding the computing power consumed in generating pulses according to the quantum logic gate, thereby improving an operation speed. |
| US11362661B2 |
Magnetic logic device
Disclosed is a magnetic logic device including: a plurality of input branches configured by a magnetic nanowire including a non-magnetic metallic layer, a free layer, and an insulating layer sequentially stacked; an output branch configured by the magnetic nanowire; a coupling portion configured by the magnetic nanowire and where the input branches and the output branch meet; gate electrodes arranged adjacent to the insulating layer in each of the plurality of input branches; and in-plane anisotropic ferromagnetic layers arranged adjacent to the non-magnetic metallic layer in each of the plurality of input branches. |
| US11362655B2 |
RF switch device
Provided is an RF switch device (100) in which body contact regions (190) are formed at respective positions adjacent to or partially overlapping opposite ends of a gate region (110) so that holes in a body of the device can escape or flow in either or both of two directions, rather than in only a single direction. |
| US11362654B2 |
Auxiliary circuit
An auxiliary circuit for outputting a supplying voltage or a detection signal includes a normally-on device and a signal processing circuit. A drain terminal of the normally-on switching device is coupled to a first terminal, a gate terminal of the normally-on switching device is coupled to a second terminal. An input voltage between the first terminal and the second terminal switches between two different levels. The signal processing circuit is configured to output the supplying voltage or the detection signal according to a voltage at a source terminal of the normally-on switching device. |
| US11362651B1 |
Protecting a body diode of a power switch
This disclosure is directed to circuits and techniques for protecting a body diode of a power switch from an inductive load when the power switch is turned OFF. A driver circuit may detect whether the power switch is in a desaturation mode when the power switch is turned ON and disable the power switch in response to detecting that the power switch is in the desaturation mode. In addition, the driver circuit may detect whether the body diode of the power switch needs protection when the power switch is turned OFF, and in response to detecting that the body diode needs protection, control the power switch according to a body diode protection scheme. |
| US11362650B2 |
Overcurrent protection by depletion mode MOSFET and bi-metallic temperature sensing switch
Circuits for providing overcurrent and overvoltage protection are disclosed herein. The circuits feature a depletion mode MOSFET (D MOSFET) as a current limiter, the D MOSFET being connected to a bi-metallic switch, where the bi-metallic switch acts as a temperature sensing circuit breaker. In combination, the D MOSFET and bi-metallic switch are able to limit current to downstream circuit components, thus protecting the components from damage. |
| US11362645B2 |
Power managers for an integrated circuit
Systems and methods manage power in an integrated circuit using power islands. The integrated circuit includes a plurality of power islands wherein a power consumption of each power island within the plurality of power islands is independently controlled within each power island of the plurality of power islands. A power manager determines a target power level for one power island of the plurality of power islands. The power manager then determines an action to change a consumption power level of the one power island of the plurality of power islands to the target power level. The power manager performs the action to change the consumption power level of the one power island of the plurality of power islands to the target power level. |
| US11362642B2 |
Acoustic wave filter device, composite filter device, and multiplexer
An acoustic wave filter device includes a longitudinally coupled resonator acoustic wave filter on a series arm that connects an input terminal and an output terminal, first and second parallel arm resonators on first and second parallel arms that connect the series arm and a ground potential, an input-side ground port of the longitudinally coupled resonator acoustic wave filter and a ground port of at least one of the first and second parallel arm resonators are connected in common, an output-side ground port of the longitudinally coupled resonator acoustic wave filter and a ground port of at least another of the first and second parallel arm resonators are connected in common, and an electrostatic capacitance of the first parallel arm resonator is different from an electrostatic capacitance of the second parallel arm resonator. |
| US11362641B2 |
Piezoelectric resonator device
In a piezoelectric resonator device according to an embodiment, an internal space is formed by bonding a first sealing member to a crystal resonator plate and bonding a second sealing member to the crystal resonator plate. The internal space hermetically seals a vibrating part including a first excitation electrode and a second excitation electrode of the crystal resonator plate. Seal paths that hermetically seal the vibrating part of the crystal resonator plate are formed to have an annular shape in plan view. A plurality of external electrode terminals is formed on a second main surface of the second sealing member to be electrically connected to an external circuit board. The external electrode terminals are respectively disposed on and along an external frame part surrounding the internal space in plan view. |
| US11362637B2 |
Bulk acoustic wave structure, bulk acoustic wave device, and manufacturing method thereof
A bulk acoustic wave (BAW) structure includes a single crystal piezoelectric material layer, a first electrode, a second electrode and an acoustic reflector. The first and second electrodes are respectively located on a first surface and a second surface of the single crystal piezoelectric material layer. The area of the second electrode is greater than or equal to that of the second surface of the single crystal piezoelectric material layer, and the contact area of the single crystal piezoelectric material layer with the second electrode is equal to the area of the second surface of the single crystal piezoelectric material layer. The acoustic reflector is disposed on a surface of the first electrode. |
| US11362634B2 |
Filter module and high frequency module
A filter module includes a first ground terminal, a second ground terminal, a low pass filter, and a second inductor. The low pass filter includes a first inductor provided in an input/output path of signal, a first capacitor provided in a first path connecting a first node and the first ground terminal, and a second capacitor provided in a second path connecting a second node and the second ground terminal. The second inductor is connected in series to the second capacitor in a path connecting the second capacitor and the second ground terminal. The first path and the second path are not connected to each other by any path except the one between the first node and the second node. |
| US11362630B2 |
Amplifying circuit and rectifying antenna
An amplifying circuit and a rectifying antenna are provided. The amplifying circuit includes: a first rectifying circuit, configured to output a first direct current signal according to a first alternating current signal; a second rectifying circuit, configured to output a second direct current signal according to a second alternating current signal; a differential amplifying circuit, configured to receive the first direct current signal and the second direct current signal, amplify a difference between the first direct current signal and the second direct current signal, and output an amplified difference between the first direction current signal and the second direct current, the first direct current signal and the second direct current signal have directions opposite to each other. |
| US11362628B2 |
Input stage for an LVDS receiver circuit
An input stage for an LVDS receiver circuit is provided, which includes at least one supply voltage connection as well as a first and a second stage input to be acted upon by a differential input signal pair. The input stage further includes a first and a second differential stage, the stage inputs being directly connected to one input each of the first differential stage and indirectly, via one level-shifting circuit each, to one input each of the second differential stage. According to the present invention, the first and the second differential stage are connected to the supply voltage connection via one transistor each of a third differential stage, the control input of one of these transistors being connected to a measuring path connecting the stage inputs to one another, with the control input of the other transistor being connected to an apparatus/device (arrangement) for providing a reference voltage. |
| US11362615B1 |
Model-based current limiter for an electric motor
A current limiter for protecting a motor from overheating. An algorithm is disclosed for dynamically limiting the motor current, such as motors used in robotics. The algorithm uses a thermal model of the motor, which provides a real-time estimate of a coil temperature using instantaneous power consumption of the motor and a thermocouple measurement from the motor's printed circuit board. There are multiple potential outputs from the current limiter algorithm, such as the maximum power that can be consumed without overheating the coils, and an estimate of how long the motor could deliver a specified high torque before overheating. |
| US11362605B2 |
Drive methods for a three-phase motor
A method of driving a three-phase motor includes, while a first phase is energized, driving a second phase using a first drive function which is sinusoidal. The first phase is switched to a non-energized state and a back electromotive force (BEMF) voltage of the first phase is detected. For at least a portion of a time when the first phase is non-energized the driving of the second phase depends on the output of a second drive function different from the first drive function. The second drive function may be non-sinusoidal and may be a cosine function. The second drive function may drive the second phase when the output of the second drive function is a modulation ratio less than 1. When the output of the second drive function is a modulation ratio greater than or equal to 1 the second phase may be driven to a modulation ratio of 1. |
| US11362602B2 |
Motor control apparatus and method
Disclosed herein are a motor control apparatus and method. The motor control apparatus includes a compensation signal generator configured to apply a DC-Link voltage (VLink) for driving a motor to a parameter map preset in order to estimate a gain and phase of a motor torque ripple generated when the motor is driven according to a motor command current and a motor rotation speed, and to generate a compensation signal (icomp) for compensating for the motor torque ripple corresponding to a current input motor command current (iq*), motor rotation speed (ωm), and DC-Link voltage (VLink), and a current controller configured to control the current of the motor by controlling an inverter such that a compensation command current (iq*_comp), generated by reflecting the compensation signal (icomp), in the motor command current (iq*), coincides with a motor drive current (iq) supplied to the motor from the inverter. |
| US11362598B2 |
Power supply circuit and photovoltaic power generation system comprising same
A power supply circuit and a photovoltaic power generation system comprising same. The power supply circuit utilizes the condition that a voltage output by discharge of a capacitor is a direct-current voltage which decreases with time, a CCFL conversion circuit is connected behind the capacitor, the CCFL conversion circuit converts the input direct-current voltage which decreases which time into a sinusoidal alternating-current for output. Since the CCFL conversion circuit operates in an open-loop mode, a peak-to-peak value of the sinusoidal alternating-current output by the CCFL conversion circuit is in direct proportion to an operating voltage of the CCFL conversion circuit, the voltage decreases with time, that is, the peak-to-peak valve of the sinusoidal alternating-current output by the CCFL conversion circuit decreases with time, thus, an effective value of the sinusoidal alternating-current decreases with time, and an attenuated sinusoidal alternating-current voltage is obtained. |
| US11362590B1 |
Current limit mode detection and control in a switch mode power supply
One or more embodiments relate to a current limit mode control circuit for a buck-boost converter which can provide a stable switching of the converter by operating the converter in a current limit mode during an overcurrent condition, performing fewer state transitions while in the current limit mode, and/or by clamping (reducing to a lower value) the output of an error amplifier in the current limit mode for controlling a pulse width modulation (PWM) signal that drives the switching transistors. |
| US11362585B2 |
Multiple-stage power conversion via regulated and unregulated conversion
An apparatus includes a first power converter and a second power converter. The first power converter converts an input voltage into a first output voltage; the second power converter converts the first output voltage into a second output voltage that powers a load. The second power converter includes a switched-capacitor converter combined with a magnetic device. The switched-capacitor converter provides capacitive energy transfer; the magnetic device provides magnetic energy transfer. Additionally, the second power converter provides unregulated conversion of the first output voltage into the second output voltage via the capacitive energy transfer and the magnetic energy transfer. To maintain the magnitude of the second output voltage within a desired range or setpoint value, the first power converter regulates a magnitude of the first output voltage based on comparison of a magnitude of the second output voltage with respect to a desired setpoint reference voltage. |
| US11362584B2 |
Adaptive ramp signal generation
Aspects of the disclosure provide for a circuit. In some examples, the circuit includes a first charging path including a first capacitor coupled to a first output node. The circuit further includes a second charging path comprising a first switch and a second capacitor. The circuit further includes a third charging path comprising a second switch and a third capacitor. The circuit further includes a first discharging path comprising the second capacitor, a third switch coupled between the second charging path and a second output node, and a fourth switch coupled between the second charging path and a fourth node. The circuit further includes a second discharging path comprising the third capacitor, a fifth switch coupled between the third charging path and the second output node, and a sixth switch coupled between the third node and the fourth node. |
| US11362581B2 |
Starter circuit for energy harvesting circuits
The present disclosure provides a starter circuit for energy harvesting circuits for an energy source having a first and a second potential of an input voltage, in particular for thermoelectric generators. |
| US11362579B2 |
Peak voltage overshoot control for switch mode power converters
A switching power converter circuit may include output voltage overshoot mitigation circuitry that can modify operation of the converter responsive to an overvoltage condition by switching from a pulse width modulation (PWM) mode to a pulse frequency modulation (PFM) mode. A clamp may be provided to clamp a control voltage or a compensating capacitor voltage of the main output voltage control loop (e.g., a PWM control loop) to a control voltage of the PFM loop. An output pull down circuit may be provided to temporarily apply a load to the converter output. |
| US11362575B1 |
Spring assisted magnetic energy harvester
A magnetic spring based energy harvester which includes a casing and a first retained magnet and a second retained magnet positioned within the casing. A levitated magnet is positioned between the first and second retained magnets and a spring assembly connected to the casing and the second retained magnet, wherein the spring assembly is configured to allow limited movement of the second retained magnet toward and away from the levitating magnet. Lastly, a conductive coil winding is positioned around the levitated magnet such that movement of the levitated magnet induces a current in the coil winding. |
| US11362572B2 |
Electronic board, in-vehicle electric motor and electric pump
An electronic board includes a board, and includes on the board: a power input part inputting power output from an in-vehicle power supply; a drive circuit driving a drive source; a controller controlling driving of the drive source performed by the drive circuit; and a drive command signal input part inputting a drive command signal transmitted from outside. The electronic board further includes on the board: a drive command signal detection circuit capable of detecting the drive command signal, and controlling whether to supply the power input to the power input part to the controller based on whether the drive command signal is detected; and a voltage varying part varying a voltage from the power input part and outputting a varied voltage to the drive command signal detection circuit. |
| US11362571B2 |
Electronic apparatus
An electronic apparatus includes a wiring board. The wiring board includes a wiring and a through-hole and is provided by dividing a multi-board providing board into the wiring board. The electronic apparatus further includes a circuit component having a surface mounting structure, mounted to the wiring board, and electrically connected to the wiring. A side wall of the wiring board has a cut portion that is provided when cutting and dividing the multi-board providing board. In the wiring board, the through-hole is formed adjacent to the cut portion without arranging the circuit component between the cut portion and the through-hole. |
| US11362562B2 |
Axial anti-backlash stepper/servo motor
A motor is provided. The motor includes a motor body and a rotor assembly. The rotor assembly includes a magnetic core mounted to a rotor shaft. The rotor assembly may include standoffs for accurately axially locating the magnetic core relative to rotor bearings. A drive nut adjustment arrangement may be provided. A mechanical interconnection between the drive nut and rotor shaft may be provided. A trailing end lead screw support may be provided. An axial preload arrangement may be provided to axially locate the rotor assembly within the motor body. |
| US11362555B2 |
Rotor with permanent magnets forming a portion of a rotor core
The disclosure relates to a rotor for an electrical machine having internal permanent magnets including a yoke consisting of a stack of sheets defining a plurality of recesses for receiving parallelepipedal permanent magnets, the recesses being surrounded by magnetically saturated external transverse isthmuses, by radial isthmuses, lateral isthmuses and oblique isthmuses, wherein the magnets are assembled in pairs of magnets magnetized in the same direction and perpendicular to the radial direction of the radial isthmuses arranged between the coupled magnets, the radial isthmuses having a thickness of less than 5% of the diameter of the rotor, and the perimeter of the cross section of the rotor is formed by a succession of curved profiles, between two consecutive pairs of magnets, and tangential linear profiles at the external transverse isthmuses. The disclosure also relates to the application of such a rotor for creating a motor, in particular a motor for a turbo compressor, or an electrical generator. |
| US11362551B2 |
Stator core of motor
A stator core for an electric motor may include a main body part formed by a plurality of stacked electromagnetic steel sheets, the main body part being provided with at least a first through hole extending axially with a first pin located in the first through hole. A first end cover is located at a first end of the main body part and connected to a first pin end of the first pin. A second end cover is located at a second end of the main body part and connected to a second pin end of the first pin. The connections of the first end cover and the second end cover to the first pin generate tensile stresses in the main body part to reduce core losses. |
| US11362550B2 |
Electrical machine with hybrid tooth design
Provided is a stator segment for the stator or the rotor of an electrical machine including a segment body circumferentially extending about a longitudinal axis of the stator segment between two circumferential ends. The segment body includes: a plurality of teeth protruding according to a radial direction orthogonal to the longitudinal axis, each tooth circumferentially extending between two respective side faces, the teeth being circumferentially distributed between two end teeth of the teeth, the teeth including at least one intermediate tooth circumferentially included between the end teeth, a plurality of slots, the plurality of slots including a plurality of intermediate slots circumferentially included between the two end slots, wherein side faces of the two end teeth are inclined with or parallel to each other and the side faces of the at least one intermediate tooth are respectively parallel to each other or inclined with respect to each other. |
| US11362545B2 |
Hybrid foreign-object detection and positioning system
An apparatus is disclosed for a hybrid foreign-object detection and position system. In an example aspect, a foreign object detection (FOD) system of the base power-transfer system detects a passive beacon of an electric vehicle power-transfer system based on a beacon loop of the passive beacon overlapping an array of FOD sense loops effective to cause a change in impedance or admittance of one or more of the FOD sense loops. In aspects, the impedance reflects a modulation signal from the passive beacon. A position detection system integrated with the FOD system determines a passive beacon response in the input data based on the modulation frequency from the passive beacon. Then, a position of the beacon loop is determined relative to the array of FOD sense loops using a result of the passive beacon response canceled from input data. |
| US11362539B1 |
Artificial intelligence-based power controller for low voltage ride-through control of grid connected distributed generation networks
An artificial intelligence reactive power control system for low voltage ride-through in a grid connected distributed generation network includes a grid, a circuit breaker, a distributed generation circuit including 3-phase terminals, and a voltage and current measurement unit connected to the 3-phase terminals and configured to generate a set of measured variables. An intelligent low voltage ride-through detector receives the set of measured variables and identifies a low voltage ride-through status of the utility grid. An intelligent reactive power controller receives a low voltage ride-through status signal from the intelligent low voltage ride-through detector and controls a low voltage ride-through during a grid voltage sag and a voltage reduction by transmitting one or more of an active power reference and a reactive power reference value to the distributed generation circuit based on the low voltage ride-through status signal. |
| US11362537B2 |
Backup power supply system
A balancing system for balancing respective voltages of N consecutively connected capacitors during charging or discharging includes balancing units, each having a pair of associated switches and an electromagnetic coil. An inter-switch junction is connected to an inter-capacitor junction of a corresponding group of capacitors through the electromagnetic coil. A control and generation circuit generates PWM control signals and transmits a generated PWM control signal to each of the switches. The PWM control signals have fixed duty cycles that do not vary temporarily during charging or discharging of the N capacitors. The duty cycles of two PWM control signals transmitted to two associated switches are complementary for each balancing unit. |
| US11362535B2 |
Battery charging with charging parameters sweep
Methods, systems, and computer-readable media may charge a battery. A value of at least one battery parameter is determined, and a range of values to which the value of the at least one battery parameter corresponds to is identified. Based on the identified range of values, a set of values for at least one charging parameter is determined, and a battery is charged while a value of the at least one charging parameter is swept among the set of values. |
| US11362533B2 |
Printing apparatus
A printing apparatus includes: a battery accommodating portion; a conveyor; a printing device; a power-source connector; an electric charger that charges the battery power source from an external power source when the power-source connector is connected to the external power source; and a degradation-degree detector that detects a degradation degree of the battery power source. A controller executes: a charge processing for controlling the electric charger using at least one charge parameter to charge the battery power source; storing data on the degradation degree of the battery power source based on a result of detection of the degradation-degree detector; a determining processing for determining whether a particular determination criterion relating to the degradation degree is satisfied in the stored data; and correcting the at least one charge parameter in accordance with a result of determination in the determining processing. |
| US11362532B2 |
Method for supplying power and device therefor
Provided is a device including: a battery; a receiving terminal configured to receive power from an external device; a first path configured to supply a portion of the power received from the external device to the battery to charge the battery; and a second path configured to supply a portion of the power received from the external device to a heater to heat the heater. |
| US11362528B2 |
Mitigation of audible output in a charging circuit
Mitigation of audible output of one or more components in a charging circuit. A charging circuit may include a mitigation controller operative to monitor a frequency of voltage at an input of a charging circuit. The frequency of the voltage at the input node may result in a mitigation condition associated with audible output of one or more components of the charging circuit. In response to detection of the mitigation condition, the mitigation controller may temporarily disable the supply of power from charging circuit to a system load to mitigate (e.g., potentially eliminate) audible output of the circuit. During a time in which the charging circuit is disabled from supplying power to the system load, a battery of the device may supply power to the system load. |
| US11362515B2 |
Electrostatic discharge protection circuit having false-trigger prevention mechanism
The present invention discloses an electrostatic discharge protection circuit having false-trigger prevention mechanism. A RC circuit, including an input control terminal, is coupled between an electrostatic discharge input terminal for receiving an input power and a ground terminal. An inverter includes a P-type transistor circuit, including P-type transistors coupled between the electrostatic discharge input terminal and an output control terminal in series and having an internal connection terminal between two of the P-type transistors, and an N-type transistor, coupled between the output control terminal and the ground terminal. Gates of the P-type and N-type transistors are controlled by the input control terminal A switch transistor, having the gate controlled by the input control terminal, is coupled between the internal connection terminal and the ground terminal. A discharging transistor having the gate controlled by the output control terminal, is coupled between the electrostatic discharge input terminal and the ground terminal. |
| US11362511B2 |
Electronic unit having an assembly for limiting current
An electronic assembly, has at least one circuit board with conductor tracks, at least one current-limiting arrangement in the form of a thermal predetermined breaking point in at least one of the conductor tracks, and a fire-containment device in the region of the current-limiting arrangement. |
| US11362507B2 |
Ground fault protection in a high resistance grounding system
Systems, methods, techniques and apparatuses of ground fault protection are disclosed. One exemplary embodiment is a power switch being structured to receive a load current from a power source at a source-side and selectively output the load current from a load-side to a load; a first voltage measuring device structured to measure a first voltage of the source-side while the power switch is conducting the load current; a second voltage measuring device structured to measure a second voltage of the load-side while the first voltage measuring device is measuring the first voltage; and a controller structured to determine a source-side-to-ground voltage based on the first voltage, determine a load-side-to-ground voltage based on the second voltage, determine a ground fault is occurring, and determine a direction of the ground fault relative to the power switch by comparing the source-side-to-ground voltage and the load-side-to-ground voltage. |
| US11362502B2 |
Adapter for cable hanger
An adapter for a plurality of cable hangers includes: first, second and third mounting panels, each mounting panel including a round mounting hole, the mounting panels serially attached to each other at edges thereof, each mounting panel being disposed at an oblique angle relative to its adjacent mounting panels; a base attached with the first and third mounting panels; wherein the base includes features for mounting the adapter to a mounting structure; and wherein the adapter is a monolithic structure formed of a polymeric material; and further comprising projections on the mounting panels located and configured to limit rotation of a cable hanger mounted in one of the mounting holes. |
| US11362501B2 |
Insulator insert for weatherhead and methods of installing
An improved weatherhead and insulator, and methods for using and installing same, for improved insertion and installation of wiring/cabling to new or existing structures. The weatherhead includes a replaceable disc insulator that may be initially installed or replaced as part of a new weatherhead, or replaced in an installed weatherhead if damaged without passing the end of the service through the insulator. The open spaces through which the service passes are accessible from the top of the insulator. Where the cap is metallic, additional insulation may be inserted at the top of the insulator. The insulator is configured to prevent relative movement between the insulator and collar during installation. |
| US11362500B2 |
Mounting device for an elongate flexible member
A mounting device (110) for an elongate flexible member extending through an aperture (102), comprising: an elongate body (130) having a longitudinal axis; an internal passageway passing through the elongate body (130) parallel to the longitudinal axis, for receipt of the elongate flexible member; a plurality of apertures (132) in the elongate body (130); an engagement member (136) in each apertures (132) and constrained to move along a displacement axis inclined to the longitudinal axis of the elongate body (130); a plurality of actuation members (142), each engaged with a respective engagement member (136), whereby displacement of the actuation member (142) in a first direction displaces the engagement members (136) outwardly to project beyond the periphery of the elongate body (130) and displacement of the actuations members (142) in a second, opposite direction displaces the engagement members (136) inwardly; and biasing means (182) biasing the actuation members (142) in the first direction. |
| US11362499B2 |
Harness outlet adapter of a cable tray and method for installing such an adapter
The invention relates to a cable harness output adaptor (5) for a cable tray including two semi-cylindrical half-shells (5A, 5B) made of plastic material, assembled in a complementary manner to form a cylindrical piece extending along at least one longitudinal axis (X′X) and defining two cylindrical parts (P1, P2): a first cylindrical part (P1) for internal cable harness support (3) and for externally receiving at least one clamping collar for the assembled half-shells (5A, 5B), and a second, cylindrical output part (P2) with external grip (20) of at least one protective sheath of the cable harness. |
| US11362497B2 |
Support member—attached wiring member
A support member-attached wiring member includes: a wiring member flatly formed; a support member including a fitting part formed into a cylindrical shape opening in one portion in a circumferential direction so as to be able to be fitted to an outer peripheral part of a rod-like member; a penetration part passing through the wiring member in a state where the wiring member is disposed on an outer side of the support member; and a retaining part which does not pass through the wiring member but is provided on an outer side of the wiring member to prevent the penetration part from coming out of the wiring member. |
| US11362495B1 |
Cradle for industrial power cables
A cable cradle device for retaining and protecting industrial power connectors that are used to charge industrial equipment. The cable cradle device is configured to retain the special power charging cable and plugs which fits the dimensions of the charger plugs. The cable cradle device comprises a rectangular base wall configured for mounting the cable cradle device a wall or a pole. The cable cradle device further comprises two opposite brackets extending laterally from the base wall, a bottom bracket extending outwards from a bottom edge of the rectangular base wall having two symmetric cut outs. The cable cradle device forms a housing to hold a power plug which rests on the bottom bracket and is supported by the opposite brackets with the cables passing through the cut outs. A method of forming the cable cradle device is also disclosed. |
| US11362494B2 |
Assembly, system, and methods for installing conductive elements in an aircraft
There is provided a raceway cover assembly for installing conductive element(s) in an aircraft. The raceway cover assembly includes a raceway cover for removable coupling to a raceway. The raceway is configured for attachment to a sidewall assembly for use in a cabin of the aircraft. The raceway cover includes a first cover side, a second cover side, and retaining element(s) disposed on the first cover side. The raceway cover assembly further includes the conductive element(s) coupled and retained to the first cover side, with the retaining element(s), to form the raceway cover assembly. The conductive element(s) and the raceway cover are assembled together at a location off of the aircraft, prior to installing the raceway cover assembly with the one or more conductive elements in the aircraft, which allows for routing of the one or more conductive elements in the raceway cover at the location off of the aircraft. |
| US11362492B2 |
Cable preparation machine having arcing contour blades
A cable preparation machine includes a frame forming a cable cutting zone, the frame having a cable opening along a cable axis at the cable cutting zone receiving an end of a cable. The cable preparation machine includes a pulley assembly rotatably coupled to the frame about the cable axis and a drive assembly operably coupled to the pulley assembly to rotate the pulley assembly about the cable axis. The cable preparation machine includes a blade assembly operably coupled to the pulley assembly and rotated with the pulley assembly about the cable axis. The blade assembly includes a blade having an arcuate cutting edge configured for cutting an insulator from the end of the cable. |
| US11362491B2 |
Conduit space recovery system
Space in a conduit having at least one cable therein which is surrounded by a duct is recovered by longitudinally cutting the duct and removing the duct from around the cable. The duct may be pulled out of the conduit and past a blade to affect the cutting, or a blade may be pulled through the conduit to cut the duct while still in the conduit. |
| US11362487B2 |
Laser emitter including nanowires
A laser emitter is provided, including a substrate and a dielectric mask layer located proximate to and above the substrate in a thickness direction. The dielectric mask layer may have a plurality of trenches formed therein. The plurality of trenches may have a plurality of different respective widths. The laser emitter may further include a respective nanowire located within each trench of the plurality of trenches. Each nanowire may include a first semiconductor layer located above the substrate in the thickness direction. Each nanowire may further include a quantum well layer located proximate to and above the first semiconductor layer in the thickness direction. Each nanowire may further include a second semiconductor layer located proximate to and above the quantum well layer in the thickness direction. |
| US11362485B1 |
Techniques for bonding multiple semiconductor lasers
Embodiments of the present disclosure include method for sequentially mounting multiple semiconductor devices onto a substrate having a composite metal structure on both the semiconductor devices and the substrate for improved process tolerance and reduced device distances without thermal interference. The mounting process causes “selective” intermixing between the metal layers on the devices and the substrate and increases the melting point of the resulting alloy materials. |
| US11362484B2 |
Light-emitting-element housing member, array member, and light emitting device
A light-emitting-element housing member includes: a bottom base material having a first surface, and a mounting part on the first surface on which a light emitting element is to be mounted; and a frame member that includes side walls erected on the first surface to surround the mounting part, and an opening that penetrates through one of the side walls. The opening includes an inner edge having a first side and a second side, the first side extends along the first surface and is arranged at a position close to the bottom base material, and the second side extends along the first surface and is arranged at a position far from the bottom base material, and the second side is longer than the first side. An array of the plurality of light-emitting-element housing members, and a light emitting device are also described. |
| US11362483B2 |
System and method for generating a spatially localised high-intensity laser beam
Disclosed is a system for generating a spatially localized, high-intensity laser beam, including: a laser source designed to generate a burst of N laser pulses with a duration of less than or equal to one picosecond, the N laser pulses having a first repetition frequency greater than or equal to 0.5 gigahertz; a resonant optical cavity designed to receive and store the burst of N laser pulses, the resonant optical cavity being designed to focus the burst of N laser pulses in an interaction region of the resonant optical cavity; and a servo control system designed to control the first repetition frequency relative to the roundtrip distance in the resonant optical cavity, such that the N pulses of the burst are superimposed temporally and spatially by constructive interferences in the interaction region so as to form one giant ultra-short and high-energy pulse. |
| US11362482B2 |
Integrated fourier domain mode-locked optoelectronic oscillator, application and communication system
An integrated Fourier domain mode-locked optoelectronic oscillator and its application and a communication system are provided, which relates to the technical field of microwave photonics. The integrated Fourier domain mode-locked optoelectronic oscillator includes an optoelectronic chip and an electronic chip. The optoelectronic chip includes a laser, a modulator, an optical notch filter, and a photodetector coupled via an optical waveguide. The electronic chip includes an electrical amplifier and a power splitter coupled via a coplanar microwave waveguide. The volume, weight and power consumption of the Fourier domain mode-locked optoelectronic oscillator is greatly reduced by integrating all the devices on the chip. A tunable sweeping microwave signal output is realized, and the sweeping speed of the output signal is increased. The integrated Fourier domain mode-locked optoelectronic oscillator can be used in radars and communication systems. |
| US11362481B2 |
Method and apparatus for measuring optical pulses
A pulse analysis system or method includes a frequency filter that receives an ultrafast pulse under test and disperses the pulse under test over a frequency range. The frequency filter separates the pulse under test into component frequency slices and provides the frequency slices to a detector coupled to a digitizer, which processes the digitized signal and collects a sonogram characteristic of the pulse under test. The frequency slices are arranged to overlap. Ptychography is performed on the sonogram to obtain characteristics of the pulse under test. |
| US11362479B2 |
Non-reciprocal optical assembly for injection locked laser
A non-reciprocal optical assembly for injection locking a laser to a resonator is described. The laser emits a light beam, and the resonator receives the light beam and returns a feedback light beam to the laser such that the feedback light beam causes injection locking. The non-reciprocal optical assembly is interposed between and optically coupled to the laser and the resonator. The non-reciprocal optical assembly includes a first port that receives the light beam from the laser, and a second port that outputs the light beam to the resonator and receives the feedback light beam from the resonator. The first port also outputs the feedback light beam to the laser. The light beam passes through the non-reciprocal optical assembly with a first power loss, and the feedback light beam passes through the non-reciprocal optical assembly with a second power loss (the first power loss differs from the second power loss). |
| US11362478B2 |
Hollow core fiber laser system, apparatus, and method
An optical system, apparatus, or method can comprise or implement a seed module to generate and output electromagnetic radiation at a predetermined amplitude and at a predetermined wavelength. The seed module can include at least one non-hollow core optical fiber and at least one hollow core optical fiber. One at least one non-hollow core optical fiber can be optically coupled to one at least one hollow core optical fiber. The non-hollow core optical fiber and the hollow core optical fiber may receive and pass electromagnetic radiation emitted from a laser diode or amplifier. |
| US11362477B2 |
Fiber laser system and control method therefor
A fiber laser system, includes: N fiber laser units that generates respective laser beams, where N≥2; an output combiner that: combines the respective laser beams, and generates output light including, as the respective laser beams, laser beams different from each other in terms of NA power cumulative distribution; and a control unit that sets a power of each of the respective laser beams such that an upper limit NA corresponding to each of not more than (N−1) predetermined power cumulative rate(s) is equal to a specified value for the output light. |
| US11362476B2 |
System and device with laser array illumination
A system includes a heat sink module and a driving circuit module. The heat sink module includes stepped through-holes that each includes a cylindrical upper and lower portions connected by a ring-shaped surface. The bottom surface of the heat sink module includes grooves that respectively pass through the lower portions of respective sequences of the stepped through-holes. The driving circuit module includes conductive connectors and electrical driving surfaces that are disposed external to the heat sink module. Each conductive connector lies within a respective groove in the bottom surface of the heat sink module. The conductive connectors include internal connectors that each link at least two stepped through-holes in a respective sequence of stepped through-holes passed by a respective groove, and include external connectors that each link at least one stepped through-hole in the respective sequence of stepped through-holes to the electrical driving surfaces. |
| US11362473B2 |
Device and method for producing a patterned functional coating for a glass layer
A device and a method for producing a patterned functional coating on a first curved glass layer, the device including a support for holding the first curved glass layer, at least one laser, and a guidance unit, provided for guiding the beam of the laser over the functional coating, such that parts of the functional coating are removed in order to pattern the functional coating. |
| US11362470B2 |
Combination outlet and power distribution unit incorporating the same
A combination outlet connector is disclosed. The combination outlet connector includes an outlet core having three T-shaped apertures. The outlet core has a core outer surface to mate with a first connector type, such as a C14 connector, and electrical terminals are positioned in corresponding apertures. A removable adapter sleeve is positionable around the outlet core and has a sleeve outer surface to mate with a second connector type, such as a C20 connector. The adapter sleeve includes a sleeve aperture at least partially congruent with the core outer surface. The electrical terminals are configured to connect with mating terminals of the first and second connector types. A removable adapter shroud can be positioned around the outlet core. The shroud includes a shroud inner surface to receive the first connector type and a shroud flange having a shroud aperture at least partially congruent with the core outer surface. |
| US11362469B1 |
Lamp socket structure
The present disclosure provides to a lamp socket structure. The lamp socket structure includes a plastic outer housing, a metal inner housing, an insulating bottom plate, a live-wire metal connecting piece, and a neutral-wire metal connecting piece, wherein the metal inner housing is in a cylindric structure, a receiving chamber configured to receive a lamp cap is disposed inside the metal inner housing, a positioning chamber having a small upper portion and a large lower portion vertically runs through a top portion of the metal inner housing, the live-wire metal connecting piece is plugged into the two matting columns, a riveting head is integrally and protrusively fixed to both a top portion of the live-wire metal connecting piece and a top portion of the neutral-wire metal connecting piece, the riveting head being in a U-shaped plate structure; and the metal inner housing, the insulating bottom plate, the live-wire metal connecting piece, and the neutral-wire metal connecting piece constitute a conducting base for conduction of the lamp cap, the plastic outer housing being mounted to the conducting base by an injection molding process. The lamp socket structure is reasonable in design, and may prevent poor contacts at a wire junction due to high temperature at the lamp cap when the wire is mounted. Therefore, this lamp socket structure is suitable to promotion and application. |
| US11362461B2 |
Connector having movable housings respectively holding one ends of terminals
Provided is a connector including a plurality of terminals respectively corresponding to a plurality of mating terminals of a mating connector, a plurality of movable housings respectively holding one ends of the terminals respectively in contact with the plurality of mating terminals, and a fixed housing fixed to a mounting target and housing the plurality of movable housings. The other ends of the plurality of terminals are fixed to the fixed housing, and the plurality of terminals operate independently with respect to the plurality of mating terminals, and thus respectively support the plurality of movable housings movably with respect to the fixed housing. |
| US11362459B2 |
Moisture-sealed connector
A method of forming a fluid resistant insulator for use in a connector includes collecting a part having a surface and electrically insulating properties. The method further includes applying a superhydrophobic sealant to the surface of the part having the electrically insulating properties. The method further includes curing the part with the superhydrophobic sealant applied to allow the superhydrophobic sealant to dry. |
| US11362458B2 |
Bidirectionally installable intermediate modular adapter for a rack-mounted panel
A bidirectionally installable intermediate modular adapter for a rack mounted panel is provided, including a front face, an opposing rear face, a first side surface and opposing second side surface each comprising a spring tab latch and spring tab latch receiver. The spring tab latch comprises a first ramp positioned towards the front face and a second ramp positioned towards the opposing rear face, a groove defined at least in part by the first ramp and second ramp, a first latch arm positioned towards the front face, a second latch arm positioned towards the opposing rear face, a spring tab latch connector positioned towards the spring tab receiver, and a compression spring. At least one opening extends from the front face through the body to the opposing rear face and an upper surface comprises a groove extending at least partially lengthwise across the upper surface. |
| US11362453B2 |
Connector assembly and connector
A first housing of a first connector has a first end wall which is located downward of a first accommodation portion in an up-down direction. When viewed from beneath along the up-down direction, the first end wall hides, in part, a first contact located in the first accommodation portion. A second housing has a second end wall which is located upward of a second accommodation portion in the up-down direction. When viewed from above along the up-down direction, the second end wall hides a second contact located in the second accommodation portion. The first end wall prevents a finger of an operator from coming into contact with the first contact, and the second end wall prevents the finger of the operator from coming into contact with the second contact. |
| US11362452B2 |
Multi-connection device
A multi-connection device according to various embodiments of the present invention may comprise: a housing; and a first or a second connection terminal for electrical connection, the first and second connection terminals protruding in first and second directions from the housing, respectively. Various other embodiments may also be possible. |
| US11362449B2 |
Miniaturized connector
Disclosed herein is a receptacle and a plug for a miniaturized connector for use in an audio device, a hearing device or a similar device. |
| US11362446B2 |
Earthing technique
An earth connector for a fence panel includes a member with a sharp edge which penetrates protective material on rods of the panel to come into electrical contact with at least two of the rods. |
| US11362438B2 |
Configurable guided wave launcher and methods for use therewith
In accordance with one or more embodiments, a guided wave launcher includes an array of antennas configured to generate near field signals. A controller is configured to: select, in response to a first control signal, at least one of a plurality of guided wave modes; and adjust beam steering parameters of the array of antennas according to the selected one(s) of the plurality of guided wave modes. The near field signals combine to induce a guided electromagnetic wave having the selected one(s) of the plurality of guided wave modes, wherein the first guided electromagnetic wave is guided by the transmission medium and propagates along the transmission medium without requiring an electrical return path. |
| US11362437B2 |
Antenna for mobile communication
The present disclosure relates to an antenna for mobile communication comprising a plurality of first radiators and at least one second radiator, which are disposed on a common reflector plane, the first radiators each including a reflector environment raised relative to the reflector plane, wherein the second radiator is disposed between a plurality of first radiators and is formed by parts of the respective reflector environment of the first radiators surrounding it. |
| US11362436B2 |
Plastic air-waveguide antenna with conductive particles
This document describes techniques and apparatuses for a plastic air-waveguide antenna with conductive particles. The described antenna includes an antenna body made from a resin embedded with conductive particles, a surface of the antenna body that includes a resin layer with no or fewer conductive particles, and a waveguide structure. The waveguide structure can be made from a portion of the surface on which the embedded conductive particles are exposed. The waveguide structure can be molded as part of the antenna body or cut into the antenna body using a laser, which also exposes the conductive particles. If the waveguide is molded as part of the antenna body, the conductive particles can be exposed by an etching process or by using the laser. In this way, the described apparatuses and techniques can reduce weight, improve gain and phase control, improve high-temperature performance, and avoid at least some vapor-deposition plating operations. |
| US11362431B1 |
Optically transparent radar absorbing material (RAM)
An optically transparent radar absorbing material has alternating layers of optically transparent conductive material with layers of even thickness of optically transparent material having a homogenous dielectric constant. The even thickness is one quarter of the wavelength of a targeted electromagnetic energy. |
| US11362430B1 |
Tunable antenna isolators
A tunable antenna isolator includes a first wall, a second wall, and an electromagnetic band-gap (EBG) structure located between the first wall and the second wall. The first wall may be a metallic wall or an EBG structure, and the second wall may be a metallic wall or an EBG structure. |
| US11362427B2 |
Deployable horn antenna and associated methods
An outer space deployable antenna may include a waveguide antenna feed section. A first plurality of wires and a first plurality of biased hinges may couple the first plurality of wires together to be self-biased to move between a collapsed stored configuration and an extended deployed configuration. A horn antenna section may be coupled to the waveguide antenna feed section and may include a second plurality of wires and a second plurality of biased hinges coupling the second plurality of wires together to be self-biased to move between the collapsed stored configuration and the extended deployed configuration. A flexible electrically conductive layer may cover the waveguide antenna feed section and the horn antenna section in at least the extended deployed configuration. |
| US11362422B2 |
Device and method for intra-ship communication
The present invention relates to an interphone device for use in ships, the interphone device comprising: an input/output unit to which a voice is input or from which a voice is output; a transmission/reception circuit unit which receives the voice from the input/output unit and provides a first signal obtained by encoding and modulating the received voice; and an antenna which is attached to the metal hull of the ship, forms an electromagnetic field in the metal hull, and carries the first signal received from the transmission/reception circuit unit by the electromagnetic field, so as to propagate the first signal. |
| US11362421B2 |
Antenna and device configurations
An electronic device includes a first antenna, a second antenna, and a device cover. The first antenna may be configured to transmit or receive signals at a first frequency, and the second antenna may be configured to transmit or receive signals at a second frequency. The device cover may be configured to enclose at least a portion of the device, the and may have a first thickness in a first area and a second thickness in a second area. The first area may be substantially aligned with a boresight of the first antenna, and the second area may be substantially aligned with a boresight of the second antenna. The first thickness may be different than the second thickness. |
| US11362417B1 |
End cover and radome assembly with the end cover
An end cover includes an end cover plane perpendicular to a longitudinal axis of a radome and passes through a connection part of the end cover and the radome. Outlines of a cross section of the end cover includes a first spline curve between a first end point and a first intermediate point having at least one first curvature, and a second spline curve between a second intermediate point and a third intermediate point having at least one second curvature. The first intermediate point and the second intermediate point are not in the end cover plane. A distance between the first intermediate point and the end cover plane and a distance between the second intermediate point and the end cover plane are equal and not less than a distance between any point on the cross section of the end cover and the end cover plane. |
| US11362414B2 |
Antenna system for vehicles
A communication system and method for vehicles, particularly trains, are described with the vehicle having antenna sets. Each antenna set includes a plurality of antennas mounted onto a convex-shaped vehicle roof in which an axis of one antenna set is approximately perpendicular to an axis of another antenna set and in which the antenna sets are mounted below roof level of the convex-shaped vehicle roof A switching device is operable to switch between a first antenna configuration and a second antenna configuration based on a difference in measured signal power received at the antenna sets. The first antenna configuration is associated with a first stationary communication system of the plurality of stationary communication systems and a second antenna configuration is associated with a second stationary communication system of the plurality of stationary communication systems. |
| US11362412B2 |
Antenna device, antenna module, and communication apparatus
A radiation conductor is constructed of a metal plate having a pair of main surfaces pointing in opposite directions. Each main surface of the pair of main surfaces includes a first surface region that includes at least part of a peripheral edge portion of the main surface. At least one main surface of the pair of main surfaces includes a second surface region that is a region other than the first surface region. A dielectric member holds the radiation conductor in such a manner that the first surface region of each main surface of the pair of main surfaces is sandwiched between portions of the dielectric member in a thickness direction of the radiation conductor. The second surface region of the at least one main surface is exposed. |
| US11362405B2 |
Filter
A filter includes a waveguide formed in a dielectric surrounded by a conductor wall. The conductor wall includes at least one control wall protruding toward an inner side of the waveguide. The at least one control wall includes an end portion in a protruding direction of the at least one control wall and a central portion in the protruding direction. The end portion includes a wall portion of which wall thickness is different from the central portion. |
| US11362399B2 |
Polyolefin microporous membrane, separator for electricity storage devices, and electricity storage device
According to the present invention, a microporous membrane contains a polyolefin resin and inorganic particles; the primary particle diameter of the inorganic particles is 100 nm or less; the content of the inorganic particles is 10-60% by mass or 10% by mass or more but less than 40% by mass based on the mass of the microporous membrane; and the retention time at 150° C. is less than 200 seconds or the retention time at 145° C. is more than 1 second but less than 300 seconds in the thermal behavior evaluation of the microporous membrane. |
| US11362397B2 |
Energy storage device, motor vehicle, and housing cover assembly
An energy storage device for a motor vehicle, wherein the energy storage device has a battery module with a battery cell, which has an opening on the upper side thereof, it being possible to release said opening when there is overpressure, and a battery housing, wherein the battery module is arranged with its lower side facing a housing base, wherein the battery housing has a housing cover made of a first material, which can be arranged on a housing lower part of the battery housing, and which has an inner side, which is facing the at least one battery module when the housing cover is in the state in which it is arranged on the housing lower part. |
| US11362392B2 |
Battery pack
The present disclosure provides a battery pack and a device comprising the battery pack, the battery pack comprises a double-layer battery module bracket, an upper-layer battery module, a lower-layer battery module and a supporting mechanism; the double-layer battery module bracket comprises an upper plate; a lower fixing member, an upper fixing member and a fastener; the lower fixing member and the upper plate are configured to enclose a lower accommodating space; the upper fixing member and the upper plate being are configured to enclose an upper accommodating space, a lower portion of the fastener exposed from the lower fixing member is fixed on the supporting mechanism; the upper-layer battery module is accommodated in the upper accommodating space and supported on the upper plate; the lower-layer battery module is accommodated in the lower accommodating space; the supporting mechanism supports the lower-layer battery module and the lower fixing member. |
| US11362387B2 |
Energy storage device
An energy storage device includes a substrate having a portion that is optically transparent in a predefined range of wavelengths, and at least one electrochemical energy storage system comprising, as from a face of the transparent portion, a stack having successively a first current collector, a first electrode, an electrolyte, a second electrode and a second current collector, the stack being covered partially by a cover characterised in that wherein at least one part of the cover has a coefficient of light absorbance greater than or equal to 80%, and preferably greater than 90%. |
| US11362381B2 |
Battery box for automotive battery temperature management
A battery box, supporting structure and insuring thermal management of one or more battery cells allowing a temperature control of said battery cells environment to insure its optimal operational condition, the battery box comprises at least one aluminum hollow profile, wherein said aluminium hollow profile comprises at least two chambers, wherein at least one chamber is filled with a first phase change material having a melting point T1F and at least one chamber is filled with a second phase change material having a melting point T2F, where T1F>T2F. |
| US11362380B2 |
Electric vehicle battery pack cooling system and electric vehicle battery pack system cooling method using same
A battery pack cooling system for an electric vehicle, which may be utilized during quick charging, includes a battery pack; a water-cooling device; a thermoelectric module installed at an coolant conduit of the water-cooling device; a current sensor configured to detect a magnitude of a charging current supplied to the battery pack; and a control unit configured to determine a charging C-rate based on the magnitude of the charging current and configured to operate the thermoelectric module when the charging C-rate is at a preset threshold or above. A method of cooling such a battery pack system for an electric vehicle is also provided. |
| US11362378B2 |
Degassing device, and facility and method for manufacturing secondary battery comprising the same
A degassing device includes a piercing unit including a piercing body configured to be disposed on a first surface of the secondary battery to seal one side of the first surface of the secondary battery, and a piercing member configured to pierce the sealed one side of the first surface of the secondary battery to form an opening hole; and a gas discharge unit including a gas discharge body configured to be disposed on a second surface of the secondary battery to seal one side of the second surface of the secondary battery, and a gas discharge member configured to discharge the gas within the secondary battery to the outside through the opening hole, wherein the piercing member is configured to form the opening hole passing from the one side of the first surface to the one side of the second surface of the secondary battery. |
| US11362372B2 |
Secondary cell with high recharging efficiency and long term stability
A secondary zinc-manganese dioxide secondary cell is disclosed. The cell includes a zinc gel anode, high manganese content cathode in either prismatic or jelly roll form. An aqueous based continuous reel to reel process for formulation and fabrication of the anode and cathode is provided. The cell is contained in a box assembly. |
| US11362365B2 |
Electrode including solid electrolyte ionically interconnecting porous active material particles, and methods of fabricating the same
A metal or metal-ion battery composition is provided that comprises anode and cathode electrodes along with an electrolyte ionically coupling the anode and the cathode. At least one of the electrodes includes active material particles provided to store and release ions during battery operation. Each of the active material particles includes internal pores configured to accommodate volume changes in the active material during the storing and releasing of the ions. The electrolyte comprises a solid electrolyte ionically interconnecting the active material particles. |
| US11362360B2 |
In-situ monitoring of flue gas contaminants for fuel cell systems
A power production system includes a fuel cell separation system configured to receive a flue gas and to produce electrical power therefrom; a flue gas polishing system positioned upstream of the fuel cell separation system and configured to remove contaminants in the flue gas; a flue gas analyzer configured to measure in real-time an amount of the contaminants in the flue gas; and a plant control system operatively coupled to the flue gas polishing system, the flue gas analyzer, and the fuel cell separation system and configured to adjust operational parameters of the flue gas polishing system. |
| US11362357B2 |
System and method for generating vibrations in at least one component of a fuel cell system, and fuel cell system
A system and method for generating vibrations in a fuel cell system include a vibration device which can be arranged on the fuel cell system or is formed by at least one component of the fuel cell system, for generating excitation vibrations which can be transmitted to the component. An electronic actuating system includes a controller and memory for actuating the vibration device, which may include a coolant pump or a compressor, at a natural frequency of a fuel system component for de-icing. At temperatures below 0° C., the electronic actuating system is adapted to actuate the vibration device during a switch-on process and/or a switch-off process of the fuel cell system taking into consideration at least one natural frequency of the component. Embodiments including actuating a compressor, cooling pump, and/or valve to transmit vibrations to a component to be de-iced at a natural frequency of the component. |
| US11362355B2 |
Fuel cell system and anode off-gas discharge amount estimation system
A fuel cell system includes a fuel cell, a supply flow passage and a discharge flow passage for anode gas, a gas-liquid separator, a discharge valve, a differential pressure detection unit configured to detect a differential pressure between an upstream side and a downstream side of the discharge valve, and a control unit. The control unit is configured to estimate an effective cross-sectional area of the discharge valve for the anode off-gas, which is decreased by an amount of water flowing into the gas-liquid separator and flowing out from the discharge valve, based on the differential pressure, and to estimate a discharge amount of the anode off-gas based on the estimated effective cross-sectional area. |
| US11362352B2 |
Fuel cell system and control method of fuel cell system
Provided is a fuel cell system including: a fuel cell that supplies electricity to a load; a fuel cell converter that is connected between the fuel cell and the load and boosts a voltage output from the fuel cell; and a control unit that causes the fuel cell converter to perform a voltage boosting action and controls output electricity to the load. Upon detecting a voltage boosting disabling failure that is a failure in which the fuel cell converter is unable to perform the voltage boosting action and able to pass a current, the control unit stops the voltage boosting action of the fuel cell converter and passes a current through the fuel cell converter. |
| US11362350B2 |
Fuel cell system and a method and apparatus for starting a fuel cell stack
The invention concerns fuel cell systems and methods for converting chemical energy of a fuel containing hydrogen into electricity. According to the invention, a fuel cell stack is provided having at least one anode and one cathode separated by a proton-exchange membrane. A fuel transport circuit feeds fuel to the fuel cell stack, and a temperature control system is adapted to control the temperature of the fuel cell stack by circulating a coolant medium through said fuel cell stack. The temperature control system includes a pump for circulating the coolant medium, a heater unit connected to a coolant transport circuit for heating the coolant with a PTC heater, a heat radiation unit connected to the coolant transport circuit for removing excess heat, and a temperature sensor. In response to a startup condition of the fuel cell stack, a controller is adapted to read a temperature signal indicative of the fuel cell stack temperature, to bypass the heat radiation unit, if the fuel cell stack temperature is below a first predetermined value, and to connect electric power generated by said fuel cell stack to be started-up to said PTC heater. |
| US11362349B2 |
Closed anode fuel cell startup method
A process for starting a PEM fuel cell module includes blowing air through the cathode side of the module using external power. An amount hydrogen is released into the anode side of the module under a pressure greater than the pressure of the air on the cathode side, while the anode is otherwise closed. Cell voltages in the module are monitored for the appearance of a charged state sufficient to start the module. When the charged state is observed, the module is converted to a running state. |
| US11362348B2 |
Replaceable modular device for hydrogen release
A modular device for generating hydrogen gas from a hydrogen liquid carrier may include a housing;an inlet for receiving the hydrogen liquid carrier; and at least one cartridge arranged within the housing. The cartridge may include at least one catalyst configured to cause a release of hydrogen gas when exposed to the hydrogen liquid carrier. The modular device may include a gas outlet for expelling the hydrogen gas released in the modular device and a liquid outlet for expelling spent hydrogen liquid carrier. |
| US11362344B2 |
Fuel cell and cell stack device
A cell stack device includes a manifold and a fuel cell. The manifold includes a gas supply chamber and a gas collection chamber. The fuel cell includes a support substrate and a power generation element portion. The support substrate includes first and second gas channels. The first gas channel is connected to the gas supply chamber, and the second gas channel is connected to the gas collection chamber. The first gas channel is open in the gas supply chamber at a proximal end portion. The second gas channel is open in the gas collection chamber at a proximal end portion. The first and second gas channels are connected to each other on the distal end portion side. The first and second gas channels are configured such that a pressure loss of gas in the first gas channel is smaller than a pressure loss of gas in the second gas channel. |
| US11362339B2 |
Spinodal-based co-continuous composites for high performance battery electrodes
Electrodes and methods of creating co-continuous composite electrodes based on a highly porous current collector are provided. In one embodiment, a method for creating an electrode includes depositing a thin layer of material on the polymer template, removing polymer material of the polymer template and depositing a second material. The method may also include controlling internal surface area per unit volume and the active material thickness of at least the second material to tune the electrochemical performance of the electrode. In one embodiment, a composite electrode is provided including interpenetrating phases of a metal current collector, electrolytically active phase, and electrolyte. |
| US11362336B2 |
Electrolytic copper foil and secondary battery using the same
The present disclosure provides an electrolytic copper foil composed of a single layer or a stack of two or more layers, wherein the electrolytic copper foil has Total Organic Carbon (TOC) content equal to or smaller than 4 ppm, and has chlorine (Cl) content equal to or smaller than 10 ppm, wherein the electrolytic copper foil has a thickness, a tensile strength, and an elongation satisfying a relationship 1 below: relationship 1: thickness (μm)/(tensile strength (kgf/mm2)*elongation (%))≤0.1. |
| US11362334B2 |
Binder composition for electrical storage device, slurry composition for electrical storage device electrode, electrode for electrical storage device, and electrical storage device
Provided is a binder composition for an electrical storage device that can both ensure stability of a slurry composition and enhance peel strength of an electrode and rate characteristics of an electrical storage device. The binder composition contains a particulate polymer. The particulate polymer includes a cyano group-containing monomer unit in a proportion of not less than 5 mass % and not more than 45 mass % and includes an amide group-containing monomer unit in a proportion of not less than 0.3 mass % and not more than 10 mass %. Moreover, the particulate polymer has a core-shell structure including a core portion and a shell portion at least partially covering an outer surface of the core portion, and has at least one glass-transition temperature at 10° C. or lower. |
| US11362331B2 |
Cathode active materials for lithium-ion batteries
Compounds, powders, and cathode active materials that can be used in lithium ion batteries are described herein. Methods of making such compounds, powders, and cathode active materials are described. |
| US11362330B2 |
Composite positive electrode active material, method of preparing the same, positive electrode including composite positive electrode active material, and lithium battery including positive electrode
A composite positive active material represented by Formula 1, LiaNibCocMndMeO2 Formula 1 wherein, in Formula 1, M is zirconium (Zr), aluminum (Al), rhenium (Re), vanadium (V), chromium (Cr), iron (Fe), gallium (Ga), silicon (Si), boron (B), ruthenium (Ru), titanium (Ti), niobium (Nb), molybdenum (Mo), magnesium (Mg), or platinum (Pt), 1.1≤a≤1.3, b+c+d+e≤1, 0≤b≤0.3, 0≤c≤0.3, 0 |
| US11362329B2 |
Negative electrode active particle and method for manufacturing the same
A negative electrode active material particle and a method for preparing the same are provided. The negative electrode active material particle includes SiOx (0 |
| US11362327B2 |
Double layer-coated nano-silicon negative electrode material, a method for preparing the same and use thereof
This invention relates to a double layer composite-coated nano-silicon negative electrode material, and its preparation methods and use, the negative electrode material comprising: a silicon-based nanoparticle, a copper layer coated on the surface of the silicon-based nanoparticle, and a conductive protective layer coated on the surface of the copper layer. Nano-copper has superplastic ductility and conductivity, and the prior art has proved that lithium ions can penetrate nano-copper; therefore, the copper coating layer has effects of inhibiting the volume expansion of the silicon-based nanoparticle and keeping the silicon-based nanoparticle from cracking so that direct contact between the silicon-based nanoparticle and an electrolyte is effectively avoided and a stable SEI is formed, and increasing the conductivity of the electrode. The surface of the nano-copper is coated with a further conductive protective layer to effectively inhibit the oxidation of the nano-copper, thereby improving the electrochemical performance. |
| US11362326B2 |
Method for preparing silicon-carbon-graphene composite, composite prepared according thereto, and secondary battery to which same is applied
An embodiment of the present invention provides a method for preparing a silicon-carbon-graphene composite, comprising the steps of: (step 1) adding a carbon precursor solution to silicon and performing wet grinding so as to prepare a suspension: (step 2) forming a silicon-carbon composite by spray drying the suspension; and (step 3) spray drying and heat treating a solution comprising the silicon-carbon composite and graphene oxide. |
| US11362321B2 |
Negative electrode material and non-aqueous electrolyte secondary battery
A negative electrode material includes a graphite material, an alkali metal salt, and at least one metal material selected from the group consisting of Fe, Mn, Mg, Ni, Pd, Rh, Os, and Pt. The graphite material contains natural graphite. |
| US11362319B2 |
Method and system for depositing solid electrolyte on electrode active material while retaining crystal structure of solid electrolyte
A method for deposition of solid electrolyte material on electrode active material, comprising the steps of a feed of electrode active material from a first storage unit to a first dosing means with a simultaneous feed of solid electrolyte material from a second storage unit to a second dosing means, a feed of inert gas to the first dosing means and to the second dosing means via an inert gas feed means, a feed of the electrode active material via the first dosing means into a reaction space with simultaneous feed of the solid electrolyte material via the second dosing means into the reaction space, wherein the electronic structure of the electrode active material and of the solid electrolyte material is influenced during the feed to the reaction space via the first and second dosing means, such that the electrode active material and the solid electrolyte material bond to one another at least in part while retaining the crystal structure of the solid electrolyte material. |
| US11362317B2 |
Electrode for solid-state batteries and solid-state battery
An electrode for solid-state batteries, comprising a PTC resistor layer, and a solid-state battery comprising the electrode. The electrode may be an electrode for solid-state batteries, wherein the electrode comprises an electrode active material layer, a current collector and a PTC resistor layer disposed between the electrode active material layer and the current collector; wherein the PTC resistor layer contains an electroconductive material, an insulating inorganic substance and a polymer; and wherein a porosity of the PTC resistor layer is from 5% to 13%. |
| US11362315B2 |
Transfer lamination of electrodes in silicon-dominant anode cells
Systems and methods are provided for high volume roll-to-roll transfer lamination of electrodes for silicon-dominant anode cells. |
| US11362314B2 |
Storage device and manufacturing method
An electrode, in particular for micro-batteries, produced in a plurality of layers with intermediate steps of masking a first layer leaving some parts of the latter exposed in order next to produce a removal of material eliminating defects. After removal of the masking layer, the second layer can be formed. Other layers can then follow in the same way. |
| US11362307B2 |
Encapsulation having polymer and dielectric layers for electronic displays
A display device includes a display layer having a plurality of organic light-emitting diodes (OLEDs) separated by gaps, and an encapsulation layer covering a light-emitting side of the display layer. The encapsulation layer includes a bilayer having a plurality of polymer projections on the display layer, the plurality of polymer projections having spaces therebetween, and a first dielectric layer conformally covering the plurality of polymer projections and an underlying surface in the spaces between the polymer projections, the dielectric layer forming side walls along sides of the polymer projections. The side walls are aligned with the gaps between the OLEDS, and/or the encapsulation layer has multiple bilayers. |
| US11362300B2 |
Adhesive film for display device, display device including the same, and method for manufacturing the same
A display device includes a display panel, a cover member disposed on the display panel, and an adhesive layer disposed between the display panel and the cover member. The adhesive layer has a first surface facing the cover member and a second surface facing the display panel, and includes a first area and a second area disposed at positions different from each other in a first direction from the first surface toward the second surface. A modulus of the first area is different from a modulus of the second area. |
| US11362297B2 |
Display device
Provided is a display device. The display device includes a light emitting element layer including a plurality of light emitting elements, and a light control layer on the light emitting element layer and overlapping the light emitting element layer on a plane. At least one of the light emitting elements and the light control layer includes an amorphous carbon light emitter. |
| US11362296B2 |
Electroluminescent device
A device includes first and second electrodes that are at least partially transparent in a spectral domain; an electroluminescent layer that lies between the first and second electrodes suitable for emitting electromagnetic radiation in the spectral domain, the electromagnetic radiation being circularly polarized in a first polarization direction; a structured substrate, the first electrode lying between the structured substrate and the electroluminescent layer, the structured substrate including features that are reflective in the spectral domain, and that possess a hollow geometric shape configured so that electromagnetic radiation that passes through the first electrode is reflected from the reflective features while preserving the first polarization direction, a filler material that is transparent in the spectral domain and that is arranged to fill the reflective features so that the structured substrate has a planar surface. |
| US11362291B2 |
Flexible substrate, method for manufacturing the same and display device
A flexible substrate including a flexible base substrate, and a wiring layer and a back film on opposite sides of the flexible base substrate respectively. A side of the flexible base substrate facing away from the wiring layer is provided with a flat area including the back film and a bending area from which the back film is removed, the bending area is provided with an elastic reinforced film, and an elastic modulus of the elastic reinforced film is smaller than an elastic modulus of the back film. A display device including the flexible substrate and a method for manufacturing the flexible substrate are also provided. |
| US11362290B2 |
Display substrate, method of manufacturing display substrate, and display apparatus
Embodiments of the present disclosure provide a display substrate, a method of manufacturing a display substrate, and a display apparatus. The display substrate includes a display area and a non-display area. The display substrate further includes: a base substrate; and a first insulating layer and a second insulating layer disposed on the base substrate in sequence. The first insulating layer includes a first slot located in the non-display area and filled with a first filler, and the second insulating layer includes a second slot located in the non-display area. |
| US11362287B2 |
Luminescent cyclometalating tridentate ligand-containing gold(III) compounds with aryl auxiliary ligands for organic light-emitting devices and their preparation thereof
A novel class of gold(III) compounds containing cyclometalated tridentate ligand and one aryl auxiliary ligand, both coordinated to a gold(III) metal center. (a) X is nitrogen or carbon; (b) Y and Z are independently nitrogen or carbon; (c) A is cyclic structure (derivative) of pyridine, quinoline, isoquinoline or phenyl group; (d) B and C are independently cyclic structures (derivatives) of pyridine, quinoline, isoquinoline or phenyl groups; (e) B and C can be identical or non-identical, with the proviso that both B and C are not 4-tert-butylbenzene; (f) R′ is a substituted carbon, nitrogen, oxygen or sulfur donor ligand attached to the gold atom; (g) n is zero, a positive integer or a negative integer. wherein R′ is selected from, but not limited to, aryl, substituted aryl, heteroaryl, substituted heteroaryl, heterocyclic aryl and substituted heterocyclic aryl, alkoxy, aryloxy, amide, thiolate, sulfonate, phosphide, fluoride, chloride, bromide, iodide, cyanate, thiocyanate or cyanide. Rings A, B and C are independently benzene or pyridine, or aryl (derivatives) or pyridyl, quinolyl, isoquinolyl (derivatives) with, but not limited to, one or more alkyl, alkenyl, alkynyl, alkylaryl, cycloalkyl, OR, NR2, SR, C(O)R, C(O)OR, C(O)NR2, CN, CF3, NO2, SO2, SOR, SO3R, halo, aryl, substituted aryl, heteroaryl, substituted heteroaryl or heterocyclic group, wherein R is independently alkyl, alkenyl, alkynyl, alkyaryl, aryl, or cycloalkyl. |
| US11362284B2 |
Efficient blue-green to orange-red thermally activated delayed fluorescence material, manufacture method, and application thereof
An efficient blue-green to orange-red thermally activated delayed fluorescence material, a manufacture method, and an application thereof are provided. This disclosure solves the technical problems in the art by cleverly synthesizing a series of thermally activated delayed fluorescence materials, which have lower singlet-triplet energy difference, high luminous efficiency, and fast reverse intersystem crossing constant, and simultaneously fine-tuning the structure to cover the spectrum from blue-green light to orange-red light. Further, their structures are confirmed by nuclear magnetic resonance and mass spectroscopy, and their photophysical properties are also determined. Therefore, these luminescent thermally activated delayed fluorescence (TADF) materials are applied to light-emitting layer for manufacturing a series of organic light-emitting diodes (OLEDs) having high performance, which have great application prospects and economic value. |
| US11362282B2 |
Heterocyclic compound and organic light emitting element comprising same
The present specification relates to a heterocyclic compound represented by Chemical Formula 1, and an organic light emitting device comprising the same. |
| US11362281B2 |
Compound for organic optoelectronic diode, composition for organic optoelectronic diode, organic optoelectronic diode, and display apparatus
Disclosed are a compound for an organic optoelectronic diode, the compound expressed by Chemical Formula 1, a composition for an organic optoelectronic diode, an organic optoelectronic diode utilizing same, a display apparatus. The specific content of Chemical Formula 1 is defined in the specification. |
| US11362273B2 |
Electronic device and method for fabricating the same
An electronic device includes a semiconductor memory. A method for fabricating the electronic device includes forming a first memory cell extending vertically from a surface of substrate and having a first upper portion that protrudes laterally, forming a second memory cell extending vertically from the surface of the substrate and having a second upper portion that protrudes laterally towards the first upper portion, and forming a liner layer over the first and second memory cells, the liner layer having a first portion disposed over the first upper portion and a second portion disposed over the second upper portion, the first and second portions of the liner layer contacting each other. |
| US11362271B2 |
Switching layer scheme to enhance RRAM performance
The present disclosure relates to a memory device. The memory device includes a first electrode over a substrate and a second electrode over the substrate. A data storage structure is disposed between the first electrode and the second electrode. The data storage structure includes one or more metals having non-zero concentrations that change as a distance from the substrate increases. |
| US11362270B2 |
Magnetoresistance effect element
A magnetoresistance effect element includes a first ferromagnetic layer, a second ferromagnetic layer, and a tunnel barrier layer that is interposed between the first ferromagnetic layer and the second ferromagnetic layer. The tunnel barrier layer is a stacked body including one or more first oxide layers having a spinel structure and one or more second oxide layers having a spinel structure with a composition which is different from a composition of the first oxide layer. |
| US11362269B2 |
Spin-orbit torque device and method for operating a spin-orbit torque device
A spin-orbit torque device 100 is described. In an embodiment, the spin-orbit torque device 100 comprises: a first pinning region 106 having a first fixed magnetization direction; a second pinning region 108 having a second fixed magnetization direction which is in a different direction to the first fixed magnetization direction; a magnetic layer 102 having a switchable magnetization direction; and a spin source layer 104 configured to generate a spin current for propagating a domain wall between the first and second pinning regions 106, 108 to switch the switchable magnetization direction of the magnetic layer 102 between the first and second fixed magnetization directions. |
| US11362266B2 |
Magneto resistive memory device
A memory device may comprise a substrate defining a main plane; a plurality of memory cells each comprising a SOT current layer disposed in the main plane of the substrate and a magnetic tunnel junction residing on the SOT current layer; and a bit line and a source line to flow a write current in a write path including the SOT current layer of a selected memory cell. The source line comprises a conductive magnetic material providing a magnetic bias field extending to the magnetic tunnel junction of the selected memory cell for assisting the switching of the cell state when the write current is flowing. |
| US11362265B2 |
Semiconductor structure and method of manufacturing the same
The present disclosure provides a semiconductor structure, including an Nth metal layer, a bottom electrode over the Nth metal layer, a magnetic tunneling junction (MTJ) over the bottom electrode, a top electrode over the MTJ, and an (N+M)th metal layer over the Nth metal layer. N and M are positive integers. The (N+M)th metal layer surrounds a portion of a sidewall of the top electrode. A manufacturing method of forming the semiconductor structure is also provided. |
| US11362259B2 |
Control circuit and method for controlling a piezoelectric transformer
A control circuit and a method for controlling a piezoelectric transformer are disclosed. In an embodiment the control circuit includes an inductor and a control unit, wherein the control circuit is configured to apply a voltage with a periodic waveform to a piezoelectric transformer, wherein a period duration of the voltage is specified by a control frequency and adjust the control frequency of the applied voltage as a function of an average current intensity of a current flowing through the inductor. |
| US11362257B2 |
Quantum bit device
A quantum bit device according to the present invention includes a first quantum bit substrate 10 which includes a first superconductive wiring 13 disposed to have a magnetically coupled portion with a first superconductive magnetic flux quantum bit 14 on a surface thereof, a second quantum bit substrate 11 which includes a second superconductive wiring 13 disposed to have a magnetically coupled portion with a second superconductive magnetic flux quantum bit 14 on a surface thereof, and a base substrate 12 which includes a third superconductive wiring 13 configured by two superconductive wirings extending parallel to each other on a surface thereof. The first and second quantum bit substrates are placed on the base substrate, two end portions of the first superconductive wiring and two end portions on one side of the third superconductive wiring are joined via superconductive solders 15, two end portions of the second superconductive wiring and two end portions on the other side of the third superconductive wiring are joined via superconductive solders 15, and three of the first to third superconductive wirings form one continuous superconductive loop. |
| US11362253B1 |
Thermoelectric material
An apparatus for solid state energy harvesting includes a complex oxide based pyrochlores having a chemical formula of A2 B2 O7 configured to directly convert heat into electricity and operate and function at a higher temperature without oxidizing in air. The complex oxide based pyrochlores are mixed with cation at B-site. |
| US11362251B2 |
Managing thermal resistance and planarity of a display package
Disclosed herein are techniques for managing the thermal resistance and the planarity of a display package. According to certain embodiments, a device includes a display package having a molding compound; a plurality of light emitting diode (LED) dies arranged on a top surface of the display package, wherein each LED die of the plurality of LED dies includes a plurality of LEDs; a backplane die embedded within the molding compound of the display package, wherein the backplane die is electrically coupled to each LED die of the plurality of LED dies; and at least one spacer structure embedded within the molding compound of the display package. The backplane die and the at least one spacer structure together provide mechanical support and planar alignment for the plurality of LED dies arranged on the top surface of the display package. The at least one spacer structure has a first thermal conductivity, and the molding compound has a second thermal conductivity lower than the first thermal conductivity. |
| US11362241B2 |
Light emitting device
A light emitting device includes a first light emitting element, a second light emitting element, a first light-transmissive member, and a first wavelength converting member. The first light emitting element has a first light emitting element first surface at which a first n-side electrode and a first p-side electrode are disposed, and a first light emitting element second surface. The second light emitting element has a second light emitting element first surface at which a second n-side electrode and a second p-side electrode are disposed, and a second light emitting element second surface. The first light-transmissive member covers the first light emitting element fourth surface of the first light emitting element and a second light emitting element fourth surface of the second light emitting element. The first wavelength converting member is disposed on the first light-transmissive member. |
| US11362237B2 |
High-efficiency red micro-LED with localized current aperture
A micro-light emitting diode (micro-LED) includes a current aperture to confine the current in a localized region such that the carrier recombination mostly occurs in the localized region to emit photons, thereby reducing the surface recombination and improving the quantum efficiency. The current confinement and localization are achieved using a localized breakthrough of a barrier layer by a localized contact, lightly p-doped active layers to suppress lateral transport of the carriers to the surface region, selective ion implantation, etching, or oxidation of a semiconductor layer, or any combination thereof. |
| US11362232B2 |
Photodiodes without excess noise
A photodiode, such as a linear mode avalanche photodiode can be made free of excess noise via having a superlattice multiplication region that allows only one electrical current carrier type, such as an electron or a hole, to accumulate enough kinetic energy to impact ionize when biased, where the layers are lattice matched. A photodiode can be constructed with i) a lattice matched pair of a first semiconductor alloy and a second semiconductor alloy in a superlattice multiplication region, ii) an absorber region, and iii) a semiconductor substrate. A detector with multiple photodiodes can be made with these construction layers in order to have a cutoff wavelength varied anywhere from 1.7 to 4.9 μm as well as a noise resulting from a dark current at a level such that an electromagnetic radiation signal with the desired minimum wavelength cutoff can be accurately sensed by the photodiode. |
| US11362231B2 |
Light detection apparatus and light detection system
An avalanche diode includes a first semiconductor region of a first conductivity type disposed in a first depth, a second semiconductor region disposed in a second depth deeper than the first depth with respect to a first surface, in contact with the first semiconductor region, and a third semiconductor region disposed in a third depth deeper than the second depth with respect to the first surface, in contact with the second semiconductor region. Avalanche multiplication is caused by the first and third semiconductor regions. The first, second, and third semiconductor regions overlap in plan view. A potential difference between the first and second semiconductor regions with respect to main charge carriers of a semiconductor region of the first conductive type is smaller than a potential difference between the first and third semiconductor regions with respect to the charge carriers. |
| US11362225B2 |
Connection member set for solar battery cell, and solar cell string and solar cell module using same
A connecting member set includes a first connecting member connected to one of a pair of solar cells, and a second connecting member connected to the other solar cell. The first connecting member and the second connecting member have a first planar portion and a second planar portion, respectively. The first planar portion and the second planar portion are layered on each other and electrically connected with each other. The first planar portion has at least one of a cut-out portion or an opening through which the second planar portion is exposed toward the first planar portion when the first planar portion and the second planar portion are layered on each other. |
| US11362224B2 |
Photodetector and method of manufacturing the photodetector
Disclosed is a photodetector in which a plurality of conductive stripes spaced apart from each other are bonded onto a two-dimensional semiconductor thin-film, and a pitch between adjacent conductive stripes is controlled to selectively adjust a plasmonic resonance wavelength zone, such that the photodetector has a high absorbance and a wide detection zone at the same time. Further, a manufacturing method thereof is disclosed. The photodetector includes a semiconductor thin-film; and a plurality of conductive stripes bonded onto the semiconductor thin-film and extending in a parallel manner to each other and spaced apart from each other. |
| US11362222B2 |
Photoactive devices and materials
Deposition processes are disclosed herein for depositing thin films comprising a dielectric transition metal compound phase and a conductive or semiconducting transition metal compound phase on a substrate in a reaction space. Deposition processes can include a plurality of super-cycles. Each super-cycle may include a dielectric transition metal compound sub-cycle and a reducing sub-cycle. The dielectric transition metal compound sub-cycle may include contacting the substrate with a dielectric transition metal compound. The reducing sub-cycle may include alternately and sequentially contacting the substrate with a reducing agent and a nitrogen reactant. The thin film may comprise a dielectric transition metal compound phase embedded in a conductive or semiconducting transition metal compound phase. |
| US11362220B2 |
Local metallization for semiconductor substrates using a laser beam
Local metallization of semiconductor substrates using a laser beam, and the resulting structures, e.g., micro-electronic devices, semiconductor substrates and/or solar cells, are described. For example, a solar cell includes a substrate and a plurality of semiconductor regions disposed in or above the substrate. A plurality of conductive contact structures is electrically connected to the plurality of semiconductor regions. Each conductive contact structure includes a locally deposited metal portion disposed in contact with a corresponding a semiconductor region. |
| US11362219B2 |
Semiconductor device
According to one embodiment, a semiconductor device includes a first element region. The first element region includes first, second, and third semiconductor regions, and first, and second conductive layers. The first semiconductor region includes first, second, and third partial regions. A second direction from the first partial region toward the first conductive layer crosses a first direction from the second partial region toward the first partial region. The third partial region is between the second partial region and the second conductive layer in the second direction. The second semiconductor region includes a first semiconductor portion. The first semiconductor portion is between the first partial region and the first conductive layer in the second direction. At least a portion of the third semiconductor region is between the first partial region and the first semiconductor portion in the second direction. |
| US11362214B2 |
Semiconductor device and fabrication method thereof
The present disclosure provides a semiconductor device and a fabrication method. The method includes: providing a substrate; forming at least one sacrificial layer and at least one liner layer, that are alternately stacked over each other, on the substrate; etching the at least one liner layer and the at least one sacrificial layer until the substrate is exposed, to form a plurality of fins, discretely arranged on the substrate; and etching a portion of a thickness of the substrate, such that a width of the etched portion of the substrate at a bottom of the at least one sacrificial layer is less than a width of the at least one liner layer of the plurality of fins. |
| US11362211B2 |
Semiconductor device
A semiconductor device includes a first active region that extends on a substrate in a first direction, a second active region that extends in parallel with the first active region, an element isolation region between the first and second active regions, a gate structure that extends in a second direction different from the first direction, and intersects the first and second active regions, a lower contact spaced apart from the gate structure in the first direction, the lower contact being on the first active region, the element isolation region, and the second active region, and an upper contact on the lower contact between the first active region and the second active region. A width of the lower contact in the first direction that is on the first active region m narrower than a width of the lower contact in the first direction that is on the element isolation region. |
| US11362209B2 |
Gate polysilicon feed structures for trench devices
In a general aspect, an apparatus, can include a trench disposed within a semiconductor region of a substrate. The trench can be lined with a gate dielectric and including an electrode disposed within the trench. The apparatus can include a polysilicon layer disposed above the trench. The trench can have an end portion disposed below an opening in the polysilicon layer. The end portion of the trench can be disposed between a first side of the opening and a second side of the opening. |
| US11362206B2 |
Nitride semiconductor device
A nitride semiconductor device includes: a substrate having a first main surface and a second main surface; a first nitride semiconductor layer of a first conductivity type provided above the first main surface; a second nitride semiconductor layer of a second conductivity type provided above the first nitride semiconductor layer; a first opening which penetrates through the second nitride semiconductor layer to the first nitride semiconductor layer; an electron transport layer provided above the second nitride semiconductor layer and on an inner surface of the first opening; a gate electrode provided above the electron transport layer and covering the first opening; a source electrode connected to the second nitride semiconductor layer; a drain electrode provided on a second main surface-side of the substrate; and a high-resistance layer provided between the second nitride semiconductor layer and the electron transport layer in the first opening, the high-resistance layer including a nitride semiconductor. |
| US11362202B2 |
Semiconductor device and manufacturing method thereof
There is provided a semiconductor device including: an anode electrode that is provided on a front surface side of a semiconductor substrate; a drift region of a first conductivity type that is provided in the semiconductor substrate; a first anode region of a first conductivity type that is in Schottky contact with the anode electrode; and a second anode region of a second conductivity type that is different from the first conductivity type, in which the first anode region has a doping concentration lower than or equal to a doping concentration of the second anode region, and is spaced from the drift region by the second anode region. |
| US11362190B2 |
Depletion mode high electron mobility field effect transistor (HEMT) semiconductor device having beryllium doped Schottky contact layers
A semiconductor device having a substrate, a pair of Group III-Nitride layers on the substrate forming: a heterojunction with a 2 Dimensional Electron Gas (2DEG) channel in a lower one of the pair of Group III-Nitride layers, a cap beryllium doped Group III-Nitride layer on the upper one of the pair of Group III-Nitride layers; and an electrical contact in Schottky contact with a portion of the cap beryllium doped, Group III-Nitride layer. |
| US11362186B2 |
Non-volatile memory device and method for manufacturing the same
A non-volatile memory device is provided. The non-volatile memory device includes a substrate, a first gate structure disposed on the substrate, a second gate structure disposed on the substrate, and a memory gate structure disposed on the substrate and between the first gate structure and the second gate structure. The memory gate structure at least covers the first gate structure and the second gate structure. The memory gate structure includes a charge storage layer disposed on the substrate and a memory gate layer disposed on the charge storage layer. |
| US11362185B2 |
Memory device and method for manufacturing the same
A method for manufacturing a memory device is provided. The method includes depositing a floating gate electrode film over a semiconductor substrate; patterning the floating gate electrode film into at least one floating gate electrode having at least one opening therein; depositing a control gate electrode film over the semiconductor substrate to overfill the at least one opening of the floating gate electrode; and patterning the control gate electrode film into at least one control gate electrode over the floating gate electrode. |
| US11362182B2 |
Semiconductor device including superlattice pattern
A semiconductor device includes; a substrate including a first region and a second region, a first active pattern extending upward from the first region, a first superlattice pattern on the first active pattern, a first active fin centrally disposed on the first active pattern, a first gate electrode disposed on the first active fin, and first source/drain patterns disposed on opposing sides of the first active fin and on the first active pattern. The first superlattice pattern includes at least one first semiconductor layer and at least one first blocker-containing layer, and the first blocker-containing layer includes at least one of oxygen, carbon, fluorine and nitrogen. |
| US11362180B2 |
Semiconductor device and manufacturing method thereof
A semiconductor device includes a substrate, a channel stack, source/drain contacts, and a gate electrode. The channel stack is over the substrate and includes a 2D channel layer and a barrier layer. An energy band gap of the barrier layer is greater than an energy band gap of the 2D channel layer. The source/drain contacts are in contact with the channel stack. The gate electrode is above the substrate. |
| US11362179B2 |
Radiation hardened high voltage superjunction MOSFET
A high voltage superjunction MOSFET includes a semiconductor substrate and a semiconductor layer having columns of first and second conductivity. A buffer layer of the first conductivity is between the semiconductor substrate and semiconductor layer. A plug region of the second conductivity is formed at a semiconductor layer surface and extends to the columns. A source/drain region is formed at the semiconductor layer surface and is connected to the plug region. The source/drain region has a concentration of the first conductivity between about 1×1019 cm−3 and 1.5×1020 cm−3. A body region of the second conductivity is between the source/drain region and the first column and is connected to the plug region. A gate trench is formed in the semiconductor layer surface and extends toward the first column and has a trench gate electrode disposed therein. A dielectric layer separates the trench gate electrode from the first column. |
| US11362173B2 |
Capacitor and manufacturing method therefor
Present disclosure provide a capacitor includes: a semiconductor substrate; a laminated structure including n conductive layers and m dielectric layer(s), the i-th conductive layer being provided with at least one i-th isolation trench, the (i+1)-th conductive layer being provided above the i-th conductive layer and in the i-th isolation trench, isolation trenches in odd-numbered and even-numbered conductive layers having a first and a second overlap region in a vertical direction respectively, and the first overlap region not overlapping the second overlap region, where m, n, and i are positive integers, n≥2, and 1≤i≤n−1; at least one first external electrode electrically connected to all odd-numbered conductive layer(s) through a first conductive via structure in the second overlap region; and at least one second external electrode electrically connected to all even-numbered conductive layer(s) through a second conductive via structure in the first overlap region. |
| US11362172B2 |
High aspect ratio non-planar capacitors formed via cavity fill
A method for forming non-planar capacitors of desired dimensions is disclosed. The method is based on providing a three-dimensional structure of a first material over a substrate, enclosing the structure with a second material that is sufficiently etch-selective with respect to the first material, and then performing a wet etch to remove most of the first material but not the second material, thus forming a cavity within the second material. Shape and dimensions of the cavity are comparable to those desired for the final non-planar capacitor. At least one electrode of a capacitor may then be formed within the cavity. Using the etch selectivity of the first and second materials advantageously allows applying wet etch techniques for forming high aspect ratio openings in fabricating non-planar capacitors, which is easier and more reliable than relying on dry etch techniques. |
| US11362171B2 |
Capacitor and manufacturing method therefor
A capacitor includes: a semiconductor substrate including at least one substrate trench group; at least one laminated structure, each laminated structure includes n conductive layers and m dielectric layers, the first conductive layer in the n conductive layers is disposed above the semiconductor substrate and in the substrate trench group, the i-th conductive layer in the n conductive layers is provided with the i-th conductive layer trench group, and the (i+1)th conductive layer in the n conductive layers is disposed above the i-th conductive layer and in the i-th conductive layer trench group, where m, n, and i are positive integers, and n≥2, 1≤i≤n−1; a first external electrode connected to some conductive layers; and a second external electrode connected to other conductive layers. |
| US11362168B2 |
Display panel
A display panel including sub pixels, a plurality of first and second scan lines, a plurality of first and second data lines, a plurality of first and second auxiliary lines and first conductive vias is provided. The sub pixels are arranged into first rows arranged in a first direction and second rows arranged in a second direction. The second rows are electrically connected to the first and second scan lines in alternation and are electrically connected to the first and second data lines in alternation. Each first auxiliary line includes a first portion electrically connected to a corresponding first scan line and a second portion spaced away from the first portion. The second auxiliary lines are respectively located between two adjacent first rows. Each second scan line is electrically connected to a corresponding first scan line through at least one second auxiliary line. |
| US11362167B2 |
Display substrate and display device
The present disclosure provides a display substrate, including a substrate, a first power line on the substrate, a second power line, and a plurality of pixel groups, each of which includes a plurality of pixels arranged in a first direction, the plurality of pixel groups are arranged in a second direction parallel to an extending direction of the first power line, the second direction is different from and intersects with the first direction, each of the plurality of pixels includes a light emitting unit having a first electrode and a second electrode, the first electrode of the light emitting unit is coupled to the first power line through an additional resistor with an additional resistance, and the second electrode of the light emitting unit is coupled to the second power line through an equivalent resistor with an equivalent resistance. |
| US11362166B2 |
Display device having conductive patterns with reduced display element overlap
A display device includes a substrate including a pixel region and a peripheral region. A plurality of pixels is disposed in the pixel region of the substrate. Each of the plurality of pixels includes a light emitting element. Data lines and scan lines are connected to each of the plurality of pixels. A power line is configured to supply power to the plurality of pixels. The power line includes a plurality of first conductive lines and a plurality of second conductive lines intersecting the plurality of first conductive lines. The plurality of second conductive lines is arranged in a region between adjacent light emitting elements of the plurality of pixels. At least some of the plurality of second conductive lines extend in a direction oblique to a direction of extension of the data lines or the scan lines. |
| US11362163B2 |
Display panel having increased conductorized area of an active layer, preparing method thereof, and display device employing the display panel
A display panel, a method for preparing a display panel, and a display device are disclosed. The display panel includes a substrate layer; a light shielding metal layer and a first electrode plate of a storage capacitor on the substrate layer; a buffer layer covering the light shielding metal layer and the first electrode plate on the substrate layer; an active layer and a second electrode plate of the storage capacitor on the buffer layer; a gate insulating layer on the buffer layer and the active layer, and a source, a gate and a drain on the gate insulating layer. |
| US11362158B2 |
Organic light-emitting diode display device
An organic light-emitting diode display device is provided, which includes a base layer, a device layer, a pixel layer, an encapsulation layer, and a camera, wherein the camera is disposed on a back side of the base layer, and the pixel layer includes an anode layer, a pixel definition layer, and a cathode layer. A nanopore array is provided in a region of the anode layer corresponding to the camera, and the nanopore array is configured to allow external light to be transmitted to the camera through the anode layer to implement camera function of the camera. Selective transmission of light can be achieved by adjusting size of nanopores in the nanopore array, so that the display device positioned above the camera can display a picture normally, which is beneficial to achieving a full-screen display. |
| US11362156B2 |
Pixel unit, manufacturing method, and display device for providing two driving voltages
The present invention discloses a pixel unit, a manufacturing method, and a display device. The pixel unit includes a first positive electrode layer, a first pixel definition layer disposed on the first positive electrode layer, a second positive electrode layer disposed on the first pixel definition layer, and a second pixel definition layer disposed on the second positive electrode layer such that the first positive electrode layer and the second positive electrode layer are driven individually. The present invention, by employing two anode driving voltages in the same sub-pixel, drives two parts of a light emitting material individually to improve a brightness in a central region such that the entire pixel emits light evenly. |
| US11362153B2 |
Display device
A display device includes: a substrate including a display area including a plurality of first pixels and a sensor area including a plurality of second pixels and a plurality of transmission portions, a plurality of first counter electrodes disposed corresponding to the plurality of first pixels, respectively, a plurality of second counter electrodes disposed corresponding to the plurality of second pixels, respectively, and a spacer disposed to overlap at least a portion of a boundary region between a transmission portion of the plurality of transmission portions and a second counter electrode of the plurality of second counter electrodes, which are adjacent to each other. |
| US11362151B2 |
Display device with load matching device overlapping non-display area
A display apparatus may include a first plurality of pixels, a substrate, a first signal line, and a load matching device. The substrate may include a first opening, a first non-display area, and a main display area. The first non-displaying area may at least partially surround the first opening. The main display area may support the first plurality of pixels. The first signal line may be electrically connected to the first plurality of pixels, may overlap the main display area, and may overlap the first non-display area. The load matching device may overlap the first non-display area and may provide a first electrical load to the first signal line. |
| US11362150B2 |
Display device having lens corresponding to pixel, and electronic apparatus
A display device according to the present disclosure includes a substrate, a lens layer including a lens, a pixel electrode disposed between the substrate and the lens layer, and a color filter disposed between the pixel electrode and the lens layer. The color filter includes a colored portion that overlaps a part of the pixel electrode in plan view and is disposed between the substrate and the lens layer. The pixel electrode is provided in a display region in which an image is displayed. The lens overlaps a part of the pixel electrode in the plan view. A distance between the center of the pixel electrode and the display center of the display region is shorter than a distance between the center of the lens and the display center in the plan view. |
| US11362146B2 |
Display panel, display screen, and display terminal with plurality of film layer and multiple optical lengths
The present application provides a display panel comprising a substrate and a plurality of film layers disposed on the substrate in sequence, and at least one of the film layers having a patterned structure, wherein the display panel has at least a first location and a second location different from the first location, and the film layers arranged in a thickness direction of the display panel at the first location are different from the film layers arranged in a thickness direction of the display panel at the second location, a first optical length L1 at the first location and a second optical length L2 at the second location meet the following conditions: L1=d1*n1+d2*n2+ . . . +di*ni, L2=D1*N1+D2*N2+ . . . +Dj*Nj, (m−δ)λ≤L1−L2≤(m+δ)λ, wherein λ is a constant between 380 nm and 780 nm; m is a natural number; and δ is a constant between 0 and 0.2. |
| US11362139B2 |
Electronic device and method of manufacturing the same
A semiconductor memory may include: variable resistance layers and insulating layers alternately stacked; conductive pillars passing through the variable resistance layers and the insulating layers; a slit insulating layer passing through the insulating layers and extending in a first direction; and conductive layers interposed between the slit insulating layer and the variable resistance layers. The variable resistance layers may remain in an amorphous state during a program operation. |
| US11362136B2 |
Display apparatus
A display apparatus includes a substrate, a light-emitting device provided on the substrate, a driving transistor device configured to control the light-emitting device, a first power supply line electrically connected to a source region of the driving transistor device, a conductive pattern electrically connected to a gate electrode of the driving transistor device, and a second power supply line electrically connected to the first power supply line, wherein the conductive pattern and the first power supply line constitute a first capacitor, and the conductive pattern and the second power supply line constitute a second capacitor, wherein the first capacitor and the second capacitor are connected in parallel. |
| US11362134B2 |
Vertical stacks of light emitting diodes and control transistors and method of making thereof
A light emitting device includes a vertical stack of a light emitting diode and a field effect transistor that controls the light emitting diode. An isolation layer is present between the light emitting diode and the field effect transistor, and an electrically conductive path electrically shorts a node of the light emitting diode to a node of the field effect transistor. The field effect transistor may include an indium gallium zinc oxide (IGZO) channel and may be located over the isolation layer. Alternatively, the field effect transistor may be a high-electron-mobility transistor (HEMT) including an epitaxial semiconductor channel layer and the light emitting diode may be located over the HEMT. |
| US11362130B2 |
Backside illuminated image sensor and method of manufacturing the same
A backside illuminated image sensor includes a substrate having a frontside surface, a backside surface and a recess formed in a backside surface portion thereof, pixel regions disposed in the substrate, an insulating layer disposed on the frontside surface of the substrate, a bonding pad disposed on a frontside surface of the insulating layer, and a second bonding pad disposed in the recess and electrically connected with the bonding pad. |
| US11362129B2 |
Solid-state imaging device
A solid-state imaging device of an embodiment includes plural first transfer gate electrodes, plural second transfer gate electrodes, and plural fixed gate electrodes. The first transfer gate electrodes are such that the respective first transfer gate electrodes are placed in a charge transfer unit to correspond to single light receiving sections, and a control signal ϕ1 is applied. The second transfer gate electrodes are such that the respective second transfer gate electrodes are placed in a charge transfer unit to correspond to the single light receiving sections, and a control signal ϕ2 that differs in phase from the control signal ϕ1 for transferring plural charges is applied. The respective fixed gate electrodes are such that the respective fixed gate electrodes are placed between the first and the second transfer gate electrodes corresponding to the single light receiving sections in the charge transfer unit, and a fixed voltage is applied. |
| US11362126B2 |
Light reception device and distance measurement module
The present technology relates to a light reception device and a distance measurement module. The light reception device includes an on-chip lens, a wiring layer, and a semiconductor layer between the on-chip lens and the wiring layer. The semiconductor layer includes a first voltage application portion to which a first voltage is applied, a second voltage application portion to which a second voltage different from the first voltage is applied, a first charge detection portion, a second charge detection portion, and a through electrode extending through the semiconductor layer. The light reception device is configured such that a third voltage is applied through the through electrode to a film formed on a face of the semiconductor layer on the on-chip lens side. The present technology can be applied to a light reception device that generates distance information, for example, by a ToF method or the like. |
| US11362124B2 |
Image sensors with quantum efficiency enhanced by inverted pyramids
An image sensor with quantum efficiency enhanced by inverted pyramids includes a semiconductor substrate and a plurality of microlenses. The semiconductor substrate includes an array of pixels. Each of the pixels is configured to convert light incident on the pixel to an electrical output signal, the semiconductor substrate having a top surface for receiving the light. The top surface forms a plurality of inverted pyramids in each pixel. The plurality of microlenses are disposed above the top surface and aligned to the plurality of inverted pyramids, respectively. |
| US11362122B2 |
Solid-state imaging element and imaging apparatus
Variations in photoelectric conversion performance between pixels (valid pixels and light-shielding pixels) in an imaging element are reduced. A solid-state imaging element includes: a plurality of pixels including a color filter for transmitting a light having a predetermined wavelength among incident lights, a photoelectric conversion portion formed on a semiconductor substrate and for performing photoelectric conversion in accordance with a light transmitted through the color filter, and an insulating layer placed between the color filter and the semiconductor substrate; light-shielding pixels among the plurality of pixels, including a first light-shielding portion disposed in a vicinity of the color filter on the insulating layer and for shielding the light transmitted through the color filter in its own pixel; and a second light-shielding portion disposed on the insulating layer between the plurality of pixels and the light-shielding pixels, and for shielding a light transmitted through the color filter of the adjacent pixel. |
| US11362121B2 |
Light attenuation layer fabrication method and structure for image sensor
An image sensor includes a substrate having a plurality of small photodiodes and a plurality of large photodiodes surrounding the small photodiodes. The substrate further includes a plurality of deep trench isolation structures in regions of the substrate between ones of the small photodiodes and the large photodiodes. Each of large photodiodes having a full well capacity larger than each of the small photodiodes. The image sensor further includes an array of color filters disposed over the substrate, a first and second buffer layer disposed between the substrate and the array of color filters, metal grid structures disposed between the color filters and above the first buffer layer, and an attenuation layer portion above a region of the substrate between ones of the large and small photodiodes, the attenuation layer portion is between the first and second buffer layers and normal to an upper surface of the substrate. |
| US11362120B2 |
Carrier release
A technique comprising: providing an assembly temporarily adhered on opposite sides to respective carriers by respective adhesive elements, the assembly including at least one plastic support sheet; heating the assembly while mechanically compressing the assembly between the carriers, wherein the strength of adhesion of one of said adhesive elements to the respective carrier and/or to the assembly is partially reduced during said heating of the assembly under mechanical compression; and wherein the strength of adhesion of the said adhesive element to the carrier and/or to the assembly is further reducible by further heating the said adhesive element after partially or completely relaxing the pressure at which the assembly is mechanically compressed between the two carriers. |
| US11362111B2 |
Thin film transistor array panel and manufacturing method thereof
A thin film transistor array panel includes a substrate and a thin film transistor disposed on a surface of the substrate. The thin film transistor includes a semiconductor, a source electrode, and a drain electrode that are disposed on a same layer as one another. The semiconductor is between the source electrode and the drain electrode. The thin film transistor array panel further includes a buffer layer disposed between the semiconductor and the substrate and including an inorganic insulating material. The first edge of the buffer layer is substantially parallel to an adjacent edge of the semiconductor, a second edge of the buffer layer is substantially parallel to an adjacent edge of the source electrode, and a third edge of the buffer layer is substantially parallel to an adjacent edge of the drain electrode. |
| US11362110B2 |
Semiconductor structure and method for manufacturing the same
A semiconductor structure includes a first transistor, a second transistor, a first dummy source/drain, a third transistor, a fourth transistor, and a second dummy source/drain. The first transistor and a second transistor adjacent to the first transistor are at a first elevation. The first dummy source/drain is disposed at the first elevation. The third transistor and a fourth transistor adjacent to the third transistor, are at a second elevation different from the first elevation. The second dummy source/drain is disposed at the second elevation. The second transistor is vertically aligned with the third transistor. The first dummy source/drain is vertically aligned with a source/drain of the fourth transistor. The second dummy source/drain is vertically aligned with a source/drain of the first transistor. The gate structure between the second dummy source/drain and a source/drain of the third transistor is absent. A method for manufacturing a semiconductor structure is also provided. |
| US11362104B2 |
Semiconductor memory device
A semiconductor memory device includes a substrate including a peripheral circuit, a stepped dummy stack overlapping the substrate and including a plurality of steps extending in a first direction, a plurality of contact groups passing through the stepped dummy stack, and upper lines respectively connected to the contact groups. The contact groups include a first contact group having two or more first contact plugs arranged in the first direction. The upper lines include a first upper line commonly connected to the first contact plugs. |
| US11362102B1 |
Semiconductor device and fabrication method thereof
A semiconductor device includes a substrate having thereon at least one active area and at least one trench isolation region adjacent to the at least one active area. A charge trapping structure is disposed on the at least one active area and at least one trench isolation region. At least one divot is disposed in the at least one trench isolation region adjacent to the charge trapping structure. A silicon oxide layer is disposed in the at least one divot. A gate oxide layer is disposed on the at least one active area around the charge trapping structure. |
| US11362101B2 |
Three dimensional memory device
A three-dimensional memory device includes a plurality of conductive layers and insulating layers alternately formed to define a multi-layer stacked structure on a first region of a semiconductor substrate. The multi-layer stacked structure includes a stair structure and a non-stair structure. A plurality of memory structures are located in the non-stair structure to form a memory array region, and each memory structure passes through the conductive layers and the insulating layers. A plurality of bow-height adjustment features are located in a second region of the semiconductor substrate. |
| US11362096B2 |
Semiconductor device structure and method for forming the same
A semiconductor device structure is provided. The semiconductor device structure includes a first device formed over a substrate, and the first device includes a first fin structure. The semiconductor device structure also includes a second device formed over or below the first device, and the second device includes a plurality of second nanostructures stacked in a vertical direction. |
| US11362094B2 |
Memory device and method of manufacturing the same
A memory device and its manufacturing method are provided, including: a semiconductor substrate, including a shallow trench isolation structure and an active area positioned at one side of the shallow trench isolation structure; two buried word lines and a first dielectric layer, wherein the buried word lines are disposed in the semiconductor substrate and separated from each other, the first dielectric layer is disposed on the semiconductor substrate and corresponds to the two buried word lines; a contact plug disposed on the semiconductor substrate and within the active area, including a conductive layer and an epitaxial layer, the conductive layer is disposed on the sidewalls of the first dielectric layer, the epitaxial layer is disposed on the sidewalls of the conductive layer and extends into the semiconductor substrate; a second dielectric layer disposed over the semiconductor substrate, covering the contact plug and the shallow trench isolation structure. |
| US11362090B2 |
Semiconductor device having buried logic conductor type of complementary field effect transistor, method of generating layout diagram and system for same
A semiconductor device includes a buried logic conductor (BLC) CFET, the BLC CFET including: relative to a first direction, first and second active regions arranged in a stack according to CFET-type configuration; first and second contact structures correspondingly electrically coupled to the first active region; third and fourth contact structures correspondingly electrically coupled to the second active region; a first layer of metallization over the stack which includes alpha logic conductors configured for logic signals (alpha logic conductors), and power grid (PG) conductors, the alpha logic and PG conductors being non-overlapping of each other; and a layer of metallization below the stack which includes beta logic conductors which are non-overlapping of each other; and wherein, relative to a second direction, each of the alpha logic, PG and beta logic conductors at least partially overlap one or more of the first, second, third and fourth contact structures. |
| US11362084B2 |
ESD protection
ESD protection devices and methods are provided. In at least one embodiment, a device includes a first stack that forms a Zener diode. The first stack includes a substrate of a first conductivity type having a first region of a second conductivity type located therein. The first area is flush with a surface of the substrate. A second stack forms a diode and is located on and in contact with the surface of the substrate. The second stack includes a first layer of the second conductivity type having a second region of the first conductivity type located therein. The second area is flush, opposite the first stack, with the surface of the first layer. A third stack includes at least a second layer made of an oxygen-doped material, on and in contact with the second stack. |
| US11362080B2 |
Semiconductor arrangement
A semiconductor arrangement includes at least one switching device, electrically coupled between a first terminal and a second terminal, at least one diode, coupled in parallel to the at least one switching device between the first terminal and the second terminal, at least one bonding pad, and at least one electrically connecting element. Each of the at least one electrically connecting element is arranged to electrically couple one of the at least one switching device to one of the at least one diode. Each electrically connecting element includes a first end, a second end, and a middle section, and for at least one of the electrically connecting element, the first end is mechanically coupled to the respective switching device, the second end is mechanically coupled to the respective diode, and the middle section is mechanically coupled to at least one of the at least one bonding pad. |
| US11362078B2 |
Display device
According to an aspect, a display device includes: a substrate; and a plurality of pixels provided on the substrate. Each of the pixels includes a red light emitting element and a first green light emitting element. When the first green light emitting element and the red light emitting element are turned on simultaneously, an emission intensity of the first green light emitting element is lower than an emission intensity of the red light emitting element, and a half width of a spectrum of light output from the first green light emitting element is greater than a half width of a spectrum of light output from the red light emitting element. |
| US11362072B2 |
Light emitting diodes having different shapes with each having corresponding shape with respective pixel defining layer openings and a transfer method thereof
A light emitting diode, a display substrate and a transfer method are disclosed. The transfer method includes: disposing a display substrate on an adsorption carrier plate, and absorbing, by a transport head, multiple light emitting diodes from a donor substrate; dropping, by the transport head, the multiple light emitting diodes onto the display substrate, the light emitting diodes falling into positioning holes on the display substrate; and absorbing and removing, by the transport head, a light emitting diode on the display substrate which does not fall into a positioning hole. |
| US11362067B2 |
Methods of manufacturing semiconductor devices
A method of manufacturing a semiconductor device according to example embodiments includes: sequentially forming first through third insulating layers on a substrate; forming an opening by etching the first through third insulating layers; forming a conductive layer configured in the opening; forming a fourth insulating layer in the opening after the forming of the conductive layer; and removing a portion of an edge region of the substrate after the forming of the fourth insulating layer. |
| US11362066B2 |
Semiconductor structure and manufacturing method thereof
A semiconductor structure and the manufacturing method thereof are provided. A semiconductor structure includes a first semiconductor die, a second semiconductor die, an insulating layer, and a first dual-damascene connector electrically connected to the first semiconductor die. The first semiconductor die includes a first bonding surface including a die attaching region and a peripheral region connected to the die attaching region. The second semiconductor die is electrically connected to the first semiconductor die, and a second bonding surface of the second semiconductor die is bonded to the first bonding surface in the die attaching region. The insulating layer disposed on the first bonding surface in the peripheral region extends along sidewalls of the second semiconductor die. The first dual-damascene connector includes a first portion disposed on the insulating layer, and a second portion penetrating through the insulating layer and landing on the first bonding surface in the peripheral region. |
| US11362063B2 |
Semiconductor device with die-skipping wire bonds
A semiconductor device is disclosed including a wire bonded die stack where the bond wires skip dies in the die stack to provide bond wires having a long length. In one example, the semiconductor dies are stacked on top of each other with offsets along two orthogonal axes so that the dies include odd numbered dies interspersed and staggered with respect to even numbered dies only one of the axes. Wire bonds may be formed between the odd numbered dies, skipping the even numbered dies, and wire bonds may be formed between the even numbered dies, skipping the odd numbered dies. The long length of the bond wires increases an inductance of the wire bonds relative to parasitic capacitance of the semiconductor dies, thereby increasing signal path bandwidth of the semiconductor device. |
| US11362062B2 |
Semiconductor package
A semiconductor package includes a base chip and at least one semiconductor chip disposed on the base chip. An adhesive film is disposed between the base chip and the at least one semiconductor chip and is configured to fix the at least one semiconductor chip on the base chip. The adhesive film includes an inner film portion that overlaps the at least one semiconductor chip in a thickness direction of the base chip, and an outer film portion that does not overlap the at least one semiconductor chip in the thickness direction of the base chip. A width of the outer film portion in a direction perpendicular to a lateral edge of the at least one semiconductor chip is substantially uniform within a deviation range of 20% of an average width of the outer film portion. |
| US11362061B2 |
Method for the electrical bonding of semiconductor components
A method is disclosed for electrically bonding a first semiconductor component to a second semiconductor component, both components including arrays of contact areas. In one aspect, prior to bonding, layers of an intermetallic compound are formed on the contact areas of the second component. The roughness of the intermetallic layers is such that the intermetallic layers include cavities suitable for insertion of a solder material in the cavities, under the application of a bonding pressure, when the solder is at a temperature below its melting temperature. The components are aligned and bonded, while the solder material is applied between the two. Bonding takes place at a temperature below the melting temperature of the solder. The bond can be established only by the insertion of the solder into the cavities of the intermetallic layers, and without the formation of a second intermetallic layer. |
| US11362060B2 |
Method and structure for die bonding using energy beam
Disclosed is a die-bonding method which provides a target substrate having a circuit structure with multiple electrical contacts and multiple semiconductor elements each semiconductor element having a pair of electrodes, arranges the multiple semiconductor elements on the target substrate with the pair of electrodes of each semiconductor element aligned with two corresponding electrical contacts of the target substrate, and applies at least one energy beam to join and electrically connect the at least one pair of electrodes of every at least one of the multiple semiconductor elements and the corresponding electrical contacts aligned therewith in a heating cycle by heat carried by the at least one energy beam in the heating cycle. The die-bonding method delivers scattering heated dots over the target substrate to avoid warpage of PCB and ensures high bonding strength between the semiconductor elements and the circuit structure of the target substrate. |
| US11362053B2 |
Semiconductor chip formed using a cover insulation layer and semiconductor package including the same
Disclosed embodiments include a semiconductor chip including a semiconductor substrate having a top surface with a top connection pad disposed therein, and a protection insulation layer comprising an opening therein, the protection insulation layer not covering at least a portion of the top connection pad, on the semiconductor substrate. The protection insulation layer may include: a bottom protection insulation layer, a cover insulation layer comprising a side cover part that covers at least a portion of a side surface of the bottom protection insulation layer and a top cover part disposed apart from the side cover part to cover at least a portion of a top surface of the bottom protection insulation layer. The protection insulation layer may further include a top protection insulation layer on the top cover part. |
| US11362050B2 |
Multi-chip packing structure employing millimeter wave
A multi-chip packaging structure employing millimeter wave includes a substrate material, a first and a second substrate board and an adhesive layer. The substrate material has a first metal pad. The first substrate board has a first and a second integrated circuit, multiple first metal wirings and multiple second metal pads, which are layer-by-layer stacked and electrically connected. The first and second metal pads are electrically connected via at least one metal lead. The adhesive layer is disposed between the substrate material and the first substrate board. The second substrate board has a third and a fourth integrated circuit, multiple second metal wirings and multiple third metal pads, which are layer-by-layer stacked and electrically connected. The electro-conductive boss blocks are respectively electrically connected with the second and third metal pads. Chips and antennas are integrated to integrate signal height and avoid interference and minify the volume. |
| US11362043B2 |
Memory package including a memory chip and a memory controller
A memory package includes a package substrate including power wiring and ground wiring. The memory package also includes a memory controller disposed over an upper surface of the package substrate and electrically connected to the power wiring and the ground wiring. The memory package further includes a memory chip disposed over the memory controller and electrically connected to the power wiring and the ground wiring. The memory package additionally includes a band pass filter disposed at one side of the memory controller over the upper surface of the package substrate and including an inductor and a capacitor which are connected in series. The inductor and the capacitor connected in series are electrically connected between the power wiring and the ground wiring. |
| US11362040B2 |
Array substrate, method for manufacturing the same and display device
An array substrate, a display device and a method for manufacturing the array substrate are provided. The array substrate includes a display region and a peripheral wiring region, wherein the array substrate includes: a base substrate; a peripheral circuit in the peripheral wiring region and on the base substrate; and an electrostatic shielding layer disposed over the peripheral circuit and the base substrate. |
| US11362039B2 |
Semiconductor structure and fabricating method thereof
A method of fabricating a semiconductor structure includes forming an alignment mark layer on a substrate; patterning the alignment mark layer for forming at least one alignment mark feature; forming a bottom conductive layer on the patterned alignment mark layer in a substantially conformal manner; forming an insulator layer on the bottom conductive layer; and forming a top conductive layer on the insulator layer. |
| US11362037B2 |
Integrated fan-out package
An integrated fan-out package including an integrated circuit, an insulating encapsulation, and a redistribution circuit structure is provided. The integrated circuit includes an antenna region. The insulating encapsulation encapsulates the integrated circuit. The redistribution circuit structure is disposed on the integrated circuit and the insulating encapsulation. The redistribution circuit structure is electrically connected to the integrated circuit, and the redistribution circuit structure includes a redistribution region and a dummy region including a plurality of dummy patterns embedded therein, wherein the antenna region includes an inductor and a wiring-free dielectric portion, and the wiring-free dielectric portion of the antenna region is between the inductor and the dummy region. |
| US11362035B2 |
Diffusion barrier layer for conductive via to decrease contact resistance
Some embodiments relate to a semiconductor structure including a first inter-level dielectric (ILD) layer overlying a substrate. A lower conductive structure is disposed within the first ILD layer. A capping layer continuously extends along a top surface of the lower conductive structure. An upper ILD structure overlies the lower conductive structure. A conductive body is disposed within the upper ILD structure. A bottom surface of the conductive body directly overlies the top surface of the lower conductive structure. A width of the bottom surface of the conductive body is less than a width of the top surface of the lower conductive structure. A diffusion barrier layer is disposed between the conductive body and the upper ILD structure. The diffusion barrier layer is laterally offset from a region disposed directly between the bottom surface of the conductive body and the top surface of the lower conductive structure by a non-zero distance. |
| US11362030B2 |
Sidewall spacer structure enclosing conductive wire sidewalls to increase reliability
Some embodiments relate to a semiconductor structure including a first inter-level dielectric (ILD) layer overlying a substrate. A lower conductive via is disposed within the first ILD layer. A plurality of conductive wires overlie the first ILD layer. A second ILD layer is disposed laterally between the conductive wires, where the second ILD layer comprises a first material. A sidewall spacer structure is disposed between the second ILD layer and the plurality of conductive wires. The sidewall spacer structure continuously extends along opposing sidewalls of each conductive wire. A top surface of the sidewall spacer structure is vertically above a top surface of the plurality of conductive wires, and the sidewall spacer structure comprises a second material different from the first material. |
| US11362028B2 |
Through-hole electrode substrate
A through-hole electrode substrate includes a substrate including a through-hole extending from a first aperture of a first surface to a second aperture of a second surface, an area of the second aperture being larger than that of the first aperture, the through-hole having a minimum aperture part between the first aperture and the second aperture, wherein an area of the minimum aperture part in a planer view is smallest among a plurality of areas of the through-hole in a planer view, a filler arranged within the through-hole, and at least one gas discharge member contacting the filler exposed to one of the first surface and the second surface. |
| US11362023B2 |
Package lead design with grooves for improved dambar separation
A lead frame includes a die pad, a first lead extending away from the die pad, a peripheral structure mechanically connected to the first lead and the die pad, and a first groove in an outer surface of the first lead. The first groove extends longitudinally along the first lead away from the die pad. |
| US11362020B2 |
Flipchip package with an IC having a covered cavity comprising metal posts
A semiconductor package includes an IC having circuitry configured for at least one function with some nodes connected to bond pads, with first metal posts on the bond pads, and dome support metal posts configured in a ring having a top rim defining an inner cavity with solder on the top rim and extending over an area of the inner cavity for providing a solder dome that covers the inner cavity to provide a covered air cavity over a portion of the circuitry. A leadframe includes a plurality of leads or lead terminals. The IC is flipchip attached with a solder connection to the leadframe so that the first metal posts are attached to the leads or the lead terminals. A mold compound provides encapsulation for the semiconductor package except on at least a bottom side of the leads or lead terminals. |
| US11362019B2 |
Semiconductor device comprising sealing members with different elastic modulus and method for manufacturing semiconductor device
According to an aspect of the present disclosure, a semiconductor device includes a base plate, a first semiconductor chip provided above the base plate, a bonding wire joined with the first semiconductor chip at a first joint part and having a curved part above the first joint part, a first sealing member provided from an upper surface of the base plate up to a height higher than the first joint part and lower than the curved part, the first sealing member covering the first joint part and a second sealing member provided on the first sealing member, covering the curved part, and having an elastic modulus lower than an elastic modulus of the first sealing member. |
| US11362015B2 |
Heat dissipation structure for chip-on-film, manufacturing method thereof, and display device
A heat dissipation structure and a manufacturing method thereof and a display device. The heat dissipation structure includes: a heat dissipation plate body, including an evaporation part and a condensation part; a plurality of micro-cavity structures, disposed in the heat dissipation plate body, two ports of each of the micro-cavity structures being sealed, and the micro-cavity structures being filled with liquid. Each of the micro-cavity structures extends from the evaporation part to the condensation part, and after the liquid absorbs heat at the evaporation part to change into vapor, the vapor moves toward the condensation part, and the vapor moved to the condensation part is condensed and liquefied and moves toward the evaporation part to achieve heat dissipation. |
| US11362013B2 |
Package structure for heat dissipation
A package structure and method of manufacturing is provided, whereby heat dissipating features are provided for heat dissipation. Heat dissipating features include conductive vias formed in a die stack, thermal chips, and thermal metal bulk, which can be bonded to a wafer level device. Hybrid bonding including chip to chip, chip to wafer, and wafer to wafer provides thermal conductivity without having to traverse a bonding material, such as a eutectic material. Plasma dicing the package structure can provide a smooth sidewall profile for interfacing with a thermal interface material. |
| US11362008B2 |
Power semiconductor module embedded in a mold compounded with an opening
The present invention provides a power semiconductor module, including a substrate having an electric insulating main layer being provided with a structured top metallization and with a bottom metallization, wherein the top metallization is provided with at least one power semiconductor device and at least one contact area, wherein the main layer together with its top metallization and the at least one power semiconductor device is embedded in a mold compound such that the mold compound includes at least one opening for contacting the at least one contact area, and wherein power semiconductor module includes a housing with circumferential side walls, wherein the side walls are positioned above the main layer of the substrate so that the side walls are only present in a space above a plane through the main layer of the substrate. |
| US11362006B2 |
Semiconductor device and method of manufacture
Semiconductor devices and methods which utilize a treatment process of a bottom anti-reflective layer are provided. The treatment process may be a physical treatment process in which material is added in order to fill holes and pores within the material of the bottom anti-reflective layer or else the treatment process may be a chemical treatment process in which a chemical reaction is used to form a protective layer. By treating the bottom anti-reflective layer the diffusion of subsequently applied chemicals is reduced or eliminated, thereby helping to prevent defects that arise from such diffusion. |
| US11362004B2 |
FinFET devices and methods of forming
In accordance with some embodiments, a device includes first and second p-type transistors. The first transistor includes a first channel region including a first material of a first fin. The first transistor includes first and second epitaxial source/drain regions each in a respective first recess in the first material and on opposite sides of the first channel region. The first transistor includes a first gate stack on the first channel region. The second transistor includes a second channel region including a second material of a second fin. The second material is a different material from the first material. The second transistor includes third and fourth epitaxial source/drain regions each in a respective second recess in the second material and on opposite sides of the second channel region. The second transistor includes a second gate stack on the second channel region. |
| US11362002B2 |
Adjusting work function through adjusting deposition temperature
A method includes forming isolation regions extending into a semiconductor substrate, and recessing the isolation regions. After the recessing, a portion of a semiconductor material between the isolation region protrudes higher than top surfaces of the isolation regions to form a semiconductor fin. The method further includes forming a gate stack, which includes forming a gate dielectric on sidewalls and a top surface of the semiconductor fin, and depositing a titanium nitride layer over the gate dielectric as a work-function layer. The titanium nitride layer is deposited at a temperature in a range between about 300° C. and about 400° C. A source region and a drain region are formed on opposing sides of the gate stack. |
| US11362001B2 |
Method for manufacturing nanostructures with various widths
A semiconductor structure and a method for forming the same are provided. The semiconductor structure includes a first fin structure, a second fin structure, a third fin structure, and a fourth fin structure formed over a substrate. The semiconductor structure further includes first nanostructures, second nanostructures, third nanostructures, and fourth nanostructures. The semiconductor structure further includes a first gate structure wrapping around the first nanostructures and the second nanostructures, and a second gate structure wrapping around the third nanostructures and the fourth nanostructures. In addition, a first lateral distance between the first fin structure and the second fin structure is shorter than a second lateral distance between the third fin structure and the fourth fin structure, and the first fin structure and the second fin structure are narrower than the third fin structure and the fourth fin structure. |
| US11361998B2 |
Method for manufacturing an electronic device
A method for manufacturing an electronic device is provided. The method includes the following steps: providing a first mother substrate including a plurality of first substrate areas; performing a first half-cutting step on the first mother substrate to produce a first crack to define the plurality of first substrate areas; disposing a first optical film on the first mother substrate having the first crack, wherein the first optical film has a first cutting region corresponding to the first crack; performing a first cutting step in the first cutting region of the first optical film; and separating the plurality of first substrate areas to form a plurality of first substrates. |
| US11361997B2 |
Wafer processing method including uniting a wafer, ring frame and a polyolefin sheet without using an adhesive layer
A wafer processing method includes a polyolefin sheet providing step of positioning a wafer in an inside opening of a ring frame and providing a polyolefin sheet on a back side or a front side of the wafer and on a back side of the ring frame, a uniting step of heating the polyolefin sheet as applying a pressure to the polyolefin sheet to thereby unite the wafer and the ring frame through the polyolefin sheet by thermocompression bonding, a dividing step of applying a laser beam to the wafer to form modified layers in the wafer, thereby dividing the wafer into individual device chips, and a pickup step of cooling the polyolefin sheet in each of the plurality of separate regions corresponding to each device chip, pushing up each device chip through the polyolefin sheet, then picking up each device chip from the polyolefin sheet. |
| US11361989B2 |
Method for manufacturing interconnect structures including air gaps
A method and structure for forming a barrier-free interconnect layer includes patterning a metal layer disposed over a substrate to form a patterned metal layer including one or more trenches. In some embodiments, the method further includes selectively depositing a barrier layer on metal surfaces of the patterned metal layer within the one or more trenches. In some examples, and after selectively depositing the barrier layer, a dielectric layer is deposited within the one or more trenches. Thereafter, the selectively deposited barrier layer may be removed to form air gaps between the patterned metal layer and the dielectric layer. |
| US11361987B2 |
Forming decoupled interconnects
A method for making a semiconductor apparatus includes forming a first bottom interconnect in a device area of a first dielectric layer; fabricating a device on top of the first bottom interconnect; capping the device with a first interlayer dielectric; exposing a logic area of the first dielectric layer that is adjacent to the device area by removing a portion of the first interlayer dielectric from the first dielectric layer while leaving another portion of the first interlayer dielectric that caps the device; and forming a second bottom interconnect in the logic area of the first dielectric layer. By forming the second bottom interconnect after the device fabrication and capping, damage to the device and to the second bottom interconnect is avoided. |
| US11361985B2 |
Substrate supporting device and substrate processing apparatus
The present invention relates to a substrate supporting device and a substrate processing apparatus. The substrate supporting device, the substrate supporting device of the substrate processing apparatus, may include: a disk; and a plurality of substrate supporting parts disposed radially from a center of the disk, a substrate being supported by each of the plurality of substrate supporting parts. An upper surface of each of the plurality of substrate supporting parts may protrude more upward than an upper surface of the disk. |
| US11361982B2 |
Methods and apparatus for in-situ cleaning of electrostatic chucks
Methods and apparatus for cleaning an electrostatic chuck (ESC) in a semiconductor chamber allow in-situ cleaning of the ESC. An apparatus may include an adapter or cover ring that is electrically isolated from a deposition ring; an annular grounding bracket mounted to and surrounding a pedestal, the annular grounding bracket has at least one horizontal grounding loop on an upper perimeter surface configured to provide electrical contact with the adapter or cover ring and to provide an RF return path to the ESC during plasma generation; and a bracket with a horizontal grounding loop on a first end to make electrical contact with the deposition ring and a vertical grounding loop on a second end to make electrical contact with a lift hoop which is electrically grounded, the bracket is mounted to, but electrically isolated from, the annular grounding bracket. |
| US11361970B2 |
Silicon-on-insulator die support structures and related methods
Implementations of a silicon-in-insulator (SOI) semiconductor die may include a first largest planar surface, a second largest planar surface and a thickness between the first largest planar surface and the second largest planar surface; and one of a permanent die support structure, a temporary die support structure, or any combination thereof coupled to one of the first largest planar surface, the second largest planar surface, the thickness, or any combination thereof. The first largest planar surface, the second largest planar surface, and the thickness may be included through a silicon layer coupled to a insulative layer. |
| US11361967B2 |
Underlayers for EUV lithography
New lithographic compositions for use as EUV silicon hardmask layers are provided. The present invention provides methods of fabricating microelectronic structures and the resulting structures formed thereby using EUV lithographic processes. The method involves utilizing a silicon hardmask layer immediately below the photoresist layer. The silicon hardmask layer can either be directly applied to the substrate, or it can be applied to any intermediate layer(s) that may be applied to the substrate. The preferred silicon hardmask layers are formed from spin-coatable, polymeric compositions. The inventive method improves adhesion and reduces or eliminates pattern collapse issues. |
| US11361962B2 |
Method and apparatus for processing substrate
An embodiment of the present invention provides a substrate processing method. The substrate processing method, which performs a liquid processing process by injecting a processing liquid on a substrate on a spin chuck disposed inside a plurality of recovery cups that are disposed in multiple layers, includes: in a transitional period of time in which height change of any one of the recovery cups occurs, adjusting rotational speed of the spin chuck, which is configured to support the substrate, in conjunction with the height change of the recovery cup. |
| US11361961B2 |
Substrate processing apparatus, method of manufacturing semiconductor device and non-transitory computer-readable recording medium
Described herein is a technique capable of improving the controllability of firm thickness distribution. According to one aspect of the technique, there is provided a substrate processing apparatus including: a process chamber; a first and a second gas supply system; an exhaust system; and a controller for controlling the first and the second gas supply system and the exhaust system to form a film. The first gas supply system includes: a first and a second storage part; a first gas supply port for supplying a gas stored in the first storage part from an outer periphery toward a center of a substrate; and a second gas supply for supplying the gas stored in the second storage part from the outer periphery along a direction more inclined toward the outer periphery than a direction from the outer periphery toward the center of the substrate. |
| US11361959B2 |
Method for manufacturing wafer
A method for manufacturing a wafer product, including the steps of: chamfering a circumferential edge portion of a wafer; lapping or double-side grinding main surfaces thereof; etching; mirror-polishing the main surface; and mirror-polishing the chamfered portion. The chamfered portion has a cross-sectional shape including: a first inclined portion continuous from the first main surface; a first arc portion continuous from the first inclined portion and having a radius of curvature; a second inclined portion continuous from the second main surface; a second arc portion continuous from the second inclined portion and having a radius of curvature; and an end portion connecting the first arc portion to the second arc portion. This provides a method for manufacturing a wafer by which a variation in a chamfered cross-sectional shape in a circumferential direction caused by etching can be suppressed. |
| US11361955B2 |
Probe electrospray ionization mass spectrometer
A synchronization condition setting processing unit receives a user's selection regarding an MRM transition for which the timing of starting voltage application to a probe is to be synchronized with the timing of starting analysis. A mass spectrometry control unit controls a mass spectrometric unit to repeat a cycle of executing MRM measurement of a plurality of preset MRM transitions, while an ionization control unit controls a PESI ion source to alternately repeat an up-and-down movement of the probe and high voltage application to the probe, and at that time, a synchronization control unit controls control operations of a mass spectrometry control unit and an ionization control unit such that timings of start of the MRM measurement for the MRM transition selected by the user and start of application of voltage to the probe match. |
| US11361954B2 |
Systems and methods for conducting reactions and screening for reaction products
The invention generally relates to systems and methods for conducting reactions and screening for reaction products. |
| US11361951B2 |
System and method for photomultiplier tube image correction
A photomultiplier tube (PMT) detector assembly includes a PMT and an analog PMT detector circuit. The PMT includes a photocathode configured to emit an initial set of photoelectrons in response to an absorption of photons. The PMT includes a dynode chain with a plurality of dynodes. The dynode chain is configured to receive the initial set of photoelectrons, generate at least one amplified set of photoelectrons, and direct the at least one amplified set of photoelectrons. The PMT includes an anode configured to receive the at least one amplified set of photoelectrons, with a digitized image being generated based on a measurement of the final amplified set of photoelectrons. The digitized image is corrected by applying an output of the signal measured by the analog PMT detector circuit to the digitized image. |
| US11361949B2 |
Substrate placing table, plasma processing apparatus provided with same, and plasma processing method
Provided is a substrate placing table (15) capable of reducing influences of external factors such as the temperature inside a chamber (11). The substrate placing table (15) disposed in the chamber (11) in a plasma processing apparatus (1) includes an electrostatic chuck (61) and a cooling jacket (62), and the electrostatic chuck (61) consists of an upper disk part (61a) having an electrode (71) for electrostatic attraction incorporated therein, and a lower disk part (61b) having a greater diameter than the upper disk part (61a) and having a heater (72) incorporated therein. A focus ring (64) disposed outside the upper disk part (61a) in a radial direction of the upper disk part (61a) and covering an upper surface of the lower disk part (61b), an upper annular cover (65) for thermal insulation enclosing the lower disk part (61b) and at least a part of the cooling jacket (62), and a lower annular cover (66) for thermal insulation clamping the cooling jacket (62) between itself and the upper annular cover (65) are made of ceramics. |
| US11361948B2 |
Temperature measurement for substrate carrier using a heater element array
Temperature measurement is described for a substrate carrier using a heater element array. In one example a method includes measuring a first combined current load of each of a plurality of heating elements in the electrostatic chuck, changing a power status of a first heating element of the plurality of heating elements, measuring a second combined current load of each of the plurality of heating elements after changing the power status of the first heating element, determining the difference between the first and second combined current loads, determining a temperature of the first heating element using the difference, and reverting the power status of the first heating element to that before the change and repeating changing power, measuring a current load, determining a difference, and determining a temperature for each of the other heating elements of the plurality to determine a temperature at each of the heating elements of the plurality. |
| US11361946B2 |
Substrate processing apparatus
In a substrate processing apparatus, a processing chamber, in which a target substrate is disposed and substrate processing is performed on the target substrate, is provided. A consumable part is disposed in the processing chamber and consumed by the substrate processing. A supply unit is configured to supply an ionic liquid in response to a consumption of the consumable part. A drive unit is configured to drive the consumable part by using the ionic liquid supplied from the supply unit. |
| US11361940B2 |
Push-pull power supply for multi-mesh processing chambers
A radio-frequency (RF) power circuit for a multi-electrode cathode in a processing chamber may include an RF source and inductive element(s) that are conductively coupled to the RF source. A first inductive element may be inductively coupled to the inductive element(s), and the first inductive element may be configured to receive a first portion of RF power originating from the RF source and provide the first portion of the RF power for a first pedestal electrode. A second inductive element may also be inductively coupled to the inductive element(s), and the second inductive element may be configured to receive a second portion of RF power originating from the RF source through the inductive element(s) and provide the second portion of the RF power for a second pedestal electrode. |
| US11361939B2 |
Semiconductor processing chamber for multiple precursor flow
Exemplary semiconductor processing systems may include a processing chamber, and may include a remote plasma unit coupled with the processing chamber. Exemplary systems may also include an adapter coupled with the remote plasma unit. The adapter may include a first end and a second end opposite the first end. The adapter may define a central channel through the adapter. The adapter may define an exit from a second channel at the second end, and the adapter may define an exit from a third channel at the second end. The central channel, the second channel, and the third channel may each be fluidly isolated from one another within the adapter. |
| US11361938B2 |
Plasma enhancement member, and plasma supplying apparatus and medical instrument including the same
Disclosed are to a plasma enhancement member, and a plasma supplying apparatus and a medical instrument including the same. The plasma enhancement member includes a coupling part coupled to an apparatus for generating plasma, an enhancement material accommodating part configured to accommodate an enhancement material for enhancing an operation of the plasma, and a plasma discharge part configured to discharge the plasma including the enhancement material. |
| US11361936B2 |
Charged particle beam apparatus
To accomplish fast automated micro-sampling, provided is a charged particle beam apparatus, which is configured to automatically fabricate a sample piece from a sample, the charged particle beam apparatus including: a charged particle beam irradiation optical system configured to radiate a charged particle beam; a sample stage configured to move the sample that is placed on the sample stage; a sample piece transportation unit configured to hold and convey the sample piece separated and extracted from the sample; a holder fixing base configured to hold a sample piece holder to which the sample piece is transported; and a computer configured to perform position control with respect to a second target, based on a machine learning model in which first information including a first image of a first target is learned, and on second information including a second image, which is obtained by irradiation with the charged particle beam. |
| US11361934B2 |
Ion source device
There is provided an ion source device including a pair of first electrodes for emitting an electron, a second electrode that defines a region in which the electron is enclosed and to which raw material source gas is supplied, between the pair of first electrodes, and that has a hole portion through which an ion generated by collision between the electron and the material gas is extruded, an extraction electrode disposed apart from the second electrode along an extraction direction of the ion extracted from the second electrode so that a potential difference is formed between the second electrode and the extraction electrode, and an intermediate electrode disposed between the second electrode and the extraction electrode. A first potential difference between the second electrode and the intermediate electrode is greater than a second potential difference between the second electrode and the extraction electrode. |
| US11361932B2 |
Anode head for X-ray beam generators
An anode head for an anode of an X-ray generating device is provided. The anode head is made of an X-ray attenuating material and has a first opening with a first diameter for a primary electron beam, wherein a circular aperture of a secondary electron absorbing material and having a second opening which is arranged concentrically to the first aperture and has a second diameter which is smaller than the first diameter. |
| US11361931B2 |
Target assembly, apparatus incorporating same, and method for manufacturing same
A target assembly for generating radiation may comprise a target, a substrate and a window. The target may be capable of generating first radiation when impinged by a beam. The window may be at least partially permeable to the beam. The window and the substrate may form at least part of a hermetically sealed chamber and the target may be positioned in the chamber. The chamber may be filled with air having a normal or reduced content of oxygen. |
| US11361929B2 |
X-ray tube
An x-ray tube includes an electron emitter to emit an electron beam; and a multilayer anode including a first anode layer facing the electron beam and a second anode layer facing away from the electron beam. The first anode layer includes a first anode material to generate a braking radiation via the electron beam and the second anode layer includes a second anode material to generate a further x-ray radiation via the braking radiation. The further x-ray radiation is relatively more monochromatic than the braking radiation and wherein the first anode layer and the second anode layer adjoin in a planar manner. |
| US11361922B2 |
Breaker
A breaker includes a tank, first to third fixed contacts provided inside the tank, first to third movable contacts that are provided inside the tank and are movable, and first to third operation devices provided outside the tank to move the first to third movable, respectively. The first to third operation devices respectively include first to third torsion bars serving as a driving source to move the first to third movable contacts, respectively. |
| US11361918B2 |
Device with movable buttons or switches and tactile identifier
The present teachings provide for a device with a membrane and an underlying switch, an underlying switch actuator, or both that has a unique tactile pattern that is felt through the membrane when the membrane is aligned with the switch, switch actuator, or both, corresponding to the electrical state of the device. The membrane, the switch, the switch actuator or a combination thereof can be repositioned from a first position to a second position so that a different tactile feel is present through the membrane corresponding to a second electrical state. |
| US11361913B2 |
Power accumulation system and vehicle including the same
A power accumulation system includes a power accumulation device, a relay device provided in a pair of power lines disposed between the power accumulation device and a power conversion device that exchanges power with the power accumulation device, a capacitor provided between the pair of power lines between the relay device and the power conversion device and an electronic control device that controls the relay device. The electronic control device is configured to execute a predetermined foreign matter removal process when it is not possible to bring one of a first relay and a second relay from a power blocking state to a conductive state. |
| US11361912B2 |
High power, multi-phase, AC power contact arc suppressor
An arc suppressing circuit configured to suppress arcing across a power contactor coupled to an alternating current (AC) power source having a predetermined number of phases, each contact of the power contactor corresponding to one of the predetermined number of phases includes a number of dual unidirectional arc suppressors equal to the predetermined number of phases of the AC power source. Each dual unidirectional arc suppressor includes a first phase-specific arc suppressor configured to suppress arcing across the associated contacts in a positive domain, a a second phase-specific arc suppressor configured to suppress arcing across the associated contacts in a negative domain, and a coil lock controller, configured to be coupled between a contact coil driver of the power contactor, configured to detect an output condition from the contact coil driver and inhibit operation of the first and second phase-specific arc suppressors over a predetermined time. |
| US11361911B2 |
Sliding contact arc suppression
A sliding power contact and method includes a mobile load device connector and a socket. The mobile load device connector includes a non-current power pin having a first length, a current power pin having a second length less than the first length, a neutral pin, and a ground pin. The socket includes a non-current power contact configured to electrically couple with the non-current power pin, a current power contact configured to electrically couple with the current power pin, a neutral contact configured to electrically couple with the neutral pin, and a ground pin configured to electrically couple with the ground pin. An arc suppressor is directly coupled to at least one of the non-current power pin and the non-current power contact, wherein the arc suppressor, the non-current power pin and the non-current power contact form a current path between the current power pin and the current power contact. |
| US11361910B2 |
Power storage module
A power storage module includes an electrode laminate in which bipolar electrodes are laminated and a sealing body formed of a resin. The bipolar electrode includes an electrode plate, a positive electrode provided on one surface of the electrode plate, and a negative electrode provided on another surface of the electrode plate. The sealing body is provided on a side surface of the electrode laminate to surround an edge portion of the bipolar electrode. The sealing body includes a first resin portion and a second resin portion. The first resin portion is welded to the edge portion of the bipolar electrode. The second resin portion surrounds the first resin portion from an outer side along the side surface. A mold shrinkage factor of the first resin portion is lower than a mold shrinkage factor of the second resin portion. |
| US11361908B2 |
Capacitor with volumetrically efficient hermetic packaging
An improved method of forming a capacitor, and capacitor formed thereby, is described. The method comprises forming an anode with an anode lead extending therefrom, forming a dielectric on the anode, forming a solid cathode layer on the dielectric and forming a hermetic encasement on the capacitor wherein the hermetic encasement comprises a conformal non-conductive layer. |
| US11361906B2 |
Multilayer ceramic electronic component
A multilayer ceramic electronic component includes a stacked body and external electrodes provided on two end surfaces of the stacked body. Each external electrode includes an underlying electrode layer including a conductive metal, a resin electrode layer including a resin and metal component, a resin layer including a resin and no metal component, and a metal layer. The underlying electrode layers extend from the two end surfaces to cover a portion of two main surfaces and two lateral surfaces. The resin electrode layers cover the underlying electrode layers provided on the two end surfaces. The resin layers are connected to the resin electrode layers and provided on the underlying electrode layers located on a portion of the two main surfaces and two lateral surfaces. The metal layers cover the surfaces of the resin electrode layers and resin layers. |
| US11361903B2 |
Multi-layer ceramic electronic component
A multi-layer ceramic electronic component, including: a capacitance forming unit that includes internal electrodes and ceramic layers, the internal electrodes being laminated in a first direction via the ceramic layers; and a circumferential unit that is provided on a circumference of the capacitance forming unit and formed of insulating ceramics. The circumferential unit includes a cover that is provided to the capacitance forming unit outward in the first direction, a side margin that is provided to the capacitance forming unit outward in a second direction orthogonal to the first direction, and a grain growth region that is formed at a boundary between the cover and the side margin and includes crystal grains of the insulating ceramics, the crystal grains having a mean grain size larger than a mean grain size of the crystal grains at a center portion of the cover. |
| US11361890B2 |
Coil element
One object is to lessen the difference between the direction of the magnetic flux and the easy direction of magnetization in a coil element and improve the effective permeability of the coil element. A coil element according to one element of the present invention includes: a coil conductor wound around a coil axis; at least one isotropic magnetic material layer provided on at least one of an upper surface and a lower surface of the coil conductor, the at least one isotropic magnetic material layer being made of an isotropic magnetic material; and at least one anisotropic magnetic material layer provided on an opposite surface of the at least one isotropic magnetic material layer to the coil conductor, the at least one anisotropic magnetic material layer being made of an anisotropic magnetic material having an easy direction of magnetization oriented perpendicular to the coil axis. |
| US11361888B2 |
Samarium-iron-nitrogen magnet powder and method for manufacturing same
One embodiment of the present invention is that in samarium-iron-nitrogen magnet powder, a non-magnetic phase is formed on a surface of the samarium-iron-nitrogen magnet phase, and an arithmetic mean roughness Ra of the surface is 3.5 nm or less. |
| US11361887B2 |
Magnetic material comprising FeNi ordered alloy and manufacturing method for the same
A magnetic material includes an FeNi ordered alloy. The FeNi ordered alloy has L10 ordered structure and is provided as an acicular particle having a longer axis and a shorter axis. A method for manufacturing a magnetic material including an FeNi ordered alloy includes preparing an FeNi disordered alloy provided as an acicular particle, and performing a nitriding treatment of nitriding the FeNi disordered alloy. The magnetic material manufacturing method further includes obtaining an L10-type FeNi ordered alloy provided as the acicular particle, by performing a denitrification treatment of removing nitrogen from the FeNi disordered alloy on which the nitriding treatment has been performed. |
| US11361886B2 |
Method for producing stable dispersible magnetic iron oxide single-core nanoparticles, stable dispersible magnetic iron oxide single-core nanoparticles and uses of same
The present invention relates to magnetic single-core nanoparticles, in particular stable dispersible magnetic single-core nanoparticles (e.g. single-core magnetite nanoparticles) having a diameter between 20 and 200 nm in varied morphology, and the continuous aqueous synthesis thereof, in particular using micromixers. The method is simple, quick and cost-effective to perform and is carried out without organic solvents. The single-core nanoparticles produced by the method form stable dispersions in aqueous media, i.e. not having a tendency to assemble or aggregate. In addition, the method offers the possibility of producing anisotropic, super-paramagnetic, plate-shaped nanoparticles which, due to their shape anisotrophy, are extremely suitable for use in polymer matrices for magnet field-controlled release of active substances. |
| US11361884B2 |
Pest-resistant cable jacketing
A protective jacket for cable includes (a) an exterior layer (1) free of a pest repellant, and (2) having external and internal facial surfaces; (b) an inner layer (1) having a shore d hardness of equal to or greater than (≥) 63, (2) including a pest repellant, and (3) having two facial surfaces; and (c) optionally, a tie layer in contact with the internal facial surface of the exterior layer and a facial surface of the inner layer. |
| US11361882B2 |
Wiring member
A wiring member includes a sheet material in which a weight reduction space is formed and a wire-like transmission member fixed on the sheet material. For example, the weight reduction space includes a bottomed hole. For example, the sheet material includes a first base material in which a base material side through hole passing through the first base material in a thickness direction is formed and a second base material overlapped with the first base material to cover the base material side through hole, and the base material side through hole which is partially covered by the second base material forms the bottomed hole. |
| US11361880B2 |
Cable holder for storing unused cores of a multicore cable
A cable holder (10) attaches to a cable (1) with a plurality of cores (2). The cable holder (10) has a receiving body (11) with a plurality of receiving chambers (12). The chambers (12) extend in a cable longitudinal direction (L). An insertion opening (13) is formed at least on one side of the receiving chamber for inserting an end of a core (2). A fastening portion (14) is connected to the receiving chamber (12). The fastening portion (14) fastens the cable holder (10) to the outer sheath of the cable (1) by a fastening device (3) engaging around the cable (1). |
| US11361876B2 |
Integrally formed product, and composite material, terminal for electrical contact and printed wiring board including the integrally formed product
The present disclosure relates to an integrally formed product including a metal and a fiber of biological origin disposed in dispersed state in the metal. A proportion by mass of the fiber of biological origin contained in the integrally formed product is within a range of 0.02 mass % or more and 10 mass % or less. |
| US11361875B2 |
Control method for fast trapping and high-frequency mutual ejection of cold atom groups
The present application discloses a control method for fast trapping and high-frequency mutual ejection of cold atom groups. The control method includes: arranging three groups of optical stops on three groups of light sources (splitters) in three-dimensional magneto-optical traps, to form a shaded regions; ejecting a cold atom group from the first three-dimensional magneto-optical trap along a movement trajectory to the second three-dimensional magneto-optical trap, where the movement trajectory passes through the shaded regions of the two three-dimensional magneto-optical traps; and, when it is determined that the cold atom group enters the shaded region of the first three-dimensional magneto-optical trap, trapping a next cold atom group by turning on three-dimensional cooling light and three-dimensional repumping light in the first three-dimensional magneto-optical trap. |
| US11361871B2 |
Composition and method for the processing of hazardous sludges and ion exchange media
A composition to immobilize nuclear containing waste comprising at least one radioactive element or alloy of uranium, graphite, magnesium, and aluminum, and a method of using the same to immobilize the nuclear containing waste into a solid wasteform. The composition comprises at least one mineral phase forming element or compound for reacting with the at least one radioactive element or alloy. The composition further comprises at least one glass-forming element or compound to form a glass phase that will incorporate waste radioisotopes and impurities that do not react with the mineral phase forming element or compound. |
| US11361869B2 |
System and method enabling signals from replacement self-powered neutron detectors to be used to generate inputs to legacy software
A method whereby signals that are output by replacement SPNDs are converted into equivalent signals that would have been detected by legacy SPNDs for input to the legacy software. The replacement SPNDs have a different geometry than the legacy SPNDs and also have a different neutron sensitivity than the legacy SPNDs. The replacement SPNDs are subjected to a neutron flux in a core of a reactor and responsively output a set of signals. The set of signals and the geometry of the replacement SPNDs are employed to create a characterization of the neutron flux in the form of a curve that represents flux as a function of location along the core of the reactor. The legacy geometry of the legacy SPNDs is then employed to find the values on the curve that correspond with the positions where the legacy SPNDs had been located to create inputs for the legacy software. |
| US11361866B2 |
Methods and apparatus for injury prediction based on machine learning techniques
Systems and methods of the present disclosure enable injury prediction using one or more processors for receiving a time-varying signal of sensor measurements from a sensor device associated with a user. The processor(s) generate time windows of the time-varying signal, including a series of the sensor measurements across a predetermined time period, and generate motion features based at least in part on the series of the sensor measurements of the time windows. The processor(s) utilize an injury risk classification machine learning model to predict an injury risk during each time window based at least in part on the motion features. An injury alert message is generated based at least in part on the injury risk being predicted; and transmitting the injury alert message to at least one user computing device. |
| US11361864B2 |
Tracking usage of a pulse oximeter via a network system
A method for tracking usage of a pulse oximeter via a network system comprising: uploading a patient information with corresponding pulse oximeter identification data to a network server; connecting the pulse oximeter to a patient monitoring device; acquiring the connected pulse oximeter identification data and status data via the patient monitoring device; acquiring and storing pulse oximeter data using the connected pulse oximeter; transmitting the acquired pulse oximeter data, the acquired pulse oximeter identification data, and the acquired status data to the network server; matching the transmitted pulse oximeter identification data with the uploaded pulse oximeter identification data stored in the network server; and associating the transmitted pulse oximeter data to the patient information. |
| US11361862B2 |
Optimized drug supply logistical techniques
A facility for ordering drugs is described. For each of a number of different drugs, the facility maintains a single outpatient counter of administrations of the drug to outpatients that have not been used as a basis for reordering the drug. For a distinguished one of the drugs, based on the value of the counter of administrations of the distinguished drug, the facility places an order that reorders the distinguished drug at a discounted outpatient price level. |
| US11361857B2 |
Systems and methods for creating and selecting models for predicting medical conditions
Computer implemented methods are disclosed. The methods may include receiving historical data comprising at least one of provider data and patient data, and processing, using a processor, the historical data to identify one or more patterns. The method also may include generating one or more decision models from the historical data and the decision patterns, and providing one or more recommendations based on the one or more decision models. |
| US11361854B2 |
Digital therapeutic systems and methods
Methods and devices include identifying a plurality of target users for the digital therapeutic based on one or more target parameters, conducting outreach to one or more of the plurality of target users using an outreach medium, identifying an activation mechanism to optimize use of the digital therapeutic, and encouraging an engagement level of the digital therapeutic by one or more of the plurality of target users. |
| US11361853B2 |
Method and system for automated medical records processing with telemedicine
A method and system for automated medical records processing with telemedicine is presented. The method and system includes plural electronic medical templates specifically designed such that they reduce the complexity and risk associated with collecting virtual patient encounter information, creating a medical diagnosis, tracking the patient through the medical processes during a telemedicine session and generate the appropriate number and type medical codes for a specific type of medical practice when processed. The medical codes and other types of processed virtual patient encounter information are displayed in real-time on electronic medical records and invoices immediately after a virtual patient encounter from a telemedicine visit. |
| US11361851B1 |
System and method for record linkage
Methods, systems, and computer-readable media are provided for facilitating record matching and entity resolution and for enabling improvements in record linkage. A power-spectrum-based temporal pattern-specific weight may be incorporated into record linkage methods to enhance the record linkage accuracy and statistical performance. For example, in embodiments, a value-specific weight may be calculated from a population-based frequency of field-specific values and provides an opportunity to capture and measure the relative importance of specific values found in a field. A timeseries-derived Bayesian power spectrum weight may be calculated from the population-based frequency of temporal pattern-specific values in terms of intensities at various frequencies of the power spectrum computed from the timeseries, and further provides an opportunity to capture and measure the relative importance of specific sequences of care episodes. |
| US11361850B1 |
Healthcare service system
A healthcare service system including an intake and validation module, a patient stratification and bid criteria module, and a bidding platform. An order certification phase initiates including an incoming order taken from the intake module after verifying eligibility. The incoming order is then taken through the patient stratification and bid criteria module for evaluation and establishing value-driven requirements of the healthcare provider. After the order has been certified a bidding platform will take the order and manage the reverse auction. The healthcare order is then monitored for performance. |
| US11361849B2 |
Hierarchical self-learning system for computerized clinical diagnostic support
Individual computer diagnostic support (CDS) systems are coupled to a ‘global’ CDS system, each of the CDS systems using the same learning system or the same learning system technique. Training and testing cases from each of the individual CDS systems are provided to the global CDS system, and the global CDS system uses these training cases to produce learning system parameters based on the training cases. Having more training cases than any of the individual CDS systems, the parameters provided by the global CDS system offer a higher quality diagnostic output than any of the individual CDS systems. The learning system parameters at the global CDS system may be provided to each of the individual CDS systems, to update the parameters of the individual CDS systems' learning system. The global CDS may also refine and/or adjust the structure of the embodied learning systems. |
| US11361846B1 |
Systems and methods for customizing monitoring programs involving remote devices
Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for customizing monitoring programs involving remote devices. In some implementations, at least one of subject attribute data describing characteristics of subjects or subject outcome data including results from monitoring programs that involved the subjects are extracted from a subject database. The subjects are grouped into different groups according to levels of similarity among attributes of the subjects or monitored outcomes for the subjects. A profile is constructed for a group which includes defining inclusion criteria for the group based on aggregate data for the subjects in the group. Data sets are used in the subject database to characterize, for each profile, differing effects of elements of monitoring programs on program compliance outcomes for subjects that satisfy the criteria of the profile. The characterization data is used to create or adjust a monitoring program that involves communicating with a selected set of remote devices over the communication network. |
| US11361839B2 |
Command/address channel error detection
A memory component and a controller communicate commands and data with each other The commands to activate and then access data, and the data itself, are all communicated between a controller and the memory component at different times. The controller and memory component each calculate a respective error detecting code (EDC) values on the activate command information (e.g., bank address and row address) and store them indexed by the bank address. When the memory component is accessed, retrieved EDC values are combined with EDC values calculated from the access command information, and the data itself. The memory component transmits its combined EDC value to the controller for checking. |
| US11361836B2 |
Semiconductor memory device and method of operating the semiconductor memory device
The present technology relates to a semiconductor memory device and a method of operating the semiconductor memory device. The semiconductor memory device includes a memory cell array including a plurality of memory blocks, which are assigned as a plurality of normal blocks, a plurality of first replacement blocks, a plurality of second replacement blocks, a first CAM block, and a second CAM block, a peripheral circuit configured to perform an erase operation and a program operation on the plurality of memory blocks, and a control logic configured to control the peripheral circuit to perform a growing bad block check operation on a target block during the program operation on a selected target block among the normal memory blocks. |
| US11361834B1 |
Systems and methods for dual-pulse programming
A memory device comprising control circuitry configured to apply a first program voltage to a selected word line, wherein a first subset of memory cells of the selected word line, that correspond to a first set of data states, are inhibited from being programmed with the first program voltage, and wherein the first program voltage is applied to a second subset of memory cells corresponding to a second set of data states. The control circuitry is further configured to cause a first voltage of the selected word line to discharge to a second voltage level corresponding to a second program voltage such that the second program voltage is applied to at least the first subset of memory cells. The control circuitry is further configured to perform a verify operation to verify whether the first subset of memory cells and the second subset of memory cells have completed programming. |
| US11361833B2 |
Offset memory component automatic calibration (autocal) error recovery for a memory subsystem
Several embodiments of memory devices and systems with offset memory component automatic calibration error recovery are disclosed herein. In one embodiment, a system includes at least one memory region and calibration circuitry. The memory region has memory cells that read out data states in response to application of a current read level signal. The calibration circuitry is operably coupled to the at least one memory region and is configured to determine a read level offset value corresponding to one or more of a plurality of offset read level test signals, including a base offset read level test signal. The base offset read level test signal is offset from the current read level signal by a predetermined value. The calibration circuitry is further configured to output the determined read level offset value. |
| US11361830B2 |
Adjusting read voltage levels based on a programmed bit count in a memory sub-system
A target value of programmed bits is established for each programming distribution of a set of programming distributions of a memory sub-system. A read voltage level is applied to determine a measured value of programmed bits in one or more programming distributions of the set of programming distributions. The target value of programmed bits is compared to the measured value of programmed bits to determine a comparison result and an action is executed in view of the comparison result. |
| US11361826B2 |
Asymmetric pass field-effect transistor for nonvolatile memory
A method of performing an operation on a non-volatile memory (NVM) cell of a memory device is disclosed. The pass transistor of the NVM cell is an asymmetric transistor including a source with a halo implant. The source of the pass transistor is coupled to a common source line (CSL) that is shared among NVM cells of a sector of NVM cells. The operation may be performed by applying a first signal to a word line (WLS) coupled to a gate of a memory transistor of the NVM cell and applying a second signal to a bit line (BL) coupled to a drain of the memory transistor of the NVM cell. |
| US11361823B2 |
Semiconductor memory device having bonded first and second semiconductor chips provided with respective impedance calibration control circuits
A method for controlling a memory system, including a controller chip and a non-volatile memory chip which includes a calibration control circuit, a first output buffer, and a first resistance element, includes receiving a read command from the controller, setting a ready/busy signal to a busy state based on the read command, executing a calibration operation which controls an impedance of the first output buffer based on the read command, setting the ready/busy signal to a ready state, and sending data to the control chip in response to the read command. The calibration control circuit calibrates the impedance of the first output buffer circuit by using the first resistance element within a period in which the ready/busy signal is the busy state. |
| US11361821B2 |
Drift and noise corrected memristive device
A memristor memory device comprises a memristive memory cell, an input terminal, an output terminal, and a gate terminal. The input terminal and the output terminal are directly attached to the memristive memory cell, and the gate terminal is electrically isolated from the memristive memory cell. The gate terminal is configured for receiving an electrical signal for a volatile modulation of a conductance of the memristive memory cell, by which a correction of non-ideal conductance modulations of the memristor memory device is achieved. |
| US11361820B2 |
Semiconductor memory device to hold 5-bits of data per memory cell
According to one embodiment, a semiconductor memory device includes: a memory cell configured to hold 5-bit data; a word line coupled to the memory cell; and a row decoder configured to apply first to 31st voltages to the word line. A first bit of the 5-bit data is established by reading operations using first to sixth voltages. A second bit of the 5-bit data is established by reading operations using seventh to twelfth voltages. A third bit of the 5-bit data is established by reading operations using thirteenth to eighteenth voltages. A fourth bit of the 5-bit data is established by reading operations using nineteenth to 25th voltages. A fifth bit of the 5-bit data is established by reading operations using 26th to 31st voltages. |
| US11361819B2 |
Staged bitline precharge
A processing system reduces by staging precharging of bitlines of a memory. In a static random access memory (SRAM) array, the voltage level on every bitline in the array is precharged to a reference voltage (VDD) rail voltage before a memory access. To facilitate reduction of current spikes from precharging, a precharge control unit groups entries of a RAM into a plurality of subsets, or regions, and applies a different precharge signal for precharging bitlines associated with each subset. Application of the precharge signals to the respective subsets over time results in smaller current spikes than simultaneous application of precharge signals to all of the bitlines. |
| US11361818B2 |
Memory device with global and local latches
A memory device includes a memory bank with a memory cell connected to a local bit line and a word line. A first local data latch is connected to the local bit line and has an enable terminal configured to receive a first local clock signal. A word line latch is configured to latch a word line select signal, and has an enable terminal configured to receive a second local clock signal. A first global data latch is connected to the first local data latch by a global bit line, and the first global data latch has an enable terminal configured to receive a global clock signal. A global address latch is connected to the word line latch and has an enable terminal configured to receive the global clock signal. A bank select latch is configured to latch a bank select signal, and has an enable terminal configured to receive the second local clock signal. |
| US11361815B1 |
Method and memory device including plurality of memory banks and having shared delay circuit
A memory device includes a plurality of memory banks and a sensing delay circuit. Each of the memory banks is activated by a row active command and is configured to perform a sensing operation based on a sensing enable signal. The sensing delay circuit, that includes a shared delay circuit and a delay path control circuitry, may delay a start of the sensing enable signal by a sensing delay period from an assertion of the row active command. The shared delay circuit is shared to the memory banks and may generate a plurality of delay signals based on the assertion of the row active command. The delay path control circuitry configured to control an electrical path between the shared delay circuit and the memory banks based on the row active command and the plurality of delay signals to output the sensing enable signal to the memory bank. |
| US11361813B2 |
Nonvolatile memory structures with DRAM
Technologies for a three-dimensional (3D) multi-bit non-volatile dynamic random access memory (nvDRAM) device, which may include a DRAM array having a plurality of DRAM cells with single or dual transistor implementation and a non-volatile memory (NVM) array having a plurality of NVM cells with single or dual transistor implementations, where the DRAM array and the NVM array are arranged by rows of word lines and columns of bit lines. The nvDRAM device may also include one or more of isolation devices coupled between the DRAM array and the NVM array and configured to control connection between the dynamic random access bit lines (BLs) and the non-volatile BLs. The word lines run horizontally and may enable to select one word of memory data, whereas bit lines run vertically and may be connected to storage cells of different memory address. |
| US11361812B2 |
Sub-word line driver placement for memory device
Disclosed herein are related to a memory system including unit storage circuits. In one aspect, each of the unit storage circuits abuts an adjacent one of the unit storage circuits. In one aspect, each of the unit storage circuits includes a first group of memory cells, a second group of memory cells, a first sub-word line driver to apply a first control signal to the first group of memory cells through a first sub-word line extending along a direction, and a second sub-word line driver to apply a second control signal to the second group of memory cells through a second sub-word line extending along the direction. In one aspect, the memory system includes a common word line driver abutting one of the unit storage circuits and configured to apply a common control signal to the unit storage circuits through a word line extending along the direction. |
| US11361811B2 |
Method and circuit for protecting a DRAM memory device from the row hammer effect
A method of protecting a DRAM memory device from the row hammer effect, the memory device comprising a plurality of banks composed of memory rows, may be implemented by at least one logic prevention device configured to respectively associate contiguous sections of rows of a bank with sub-banks. The prevention logic is also configured to execute a preventive refresh cycle of the sub-banks that is entirely executed before the number of rows activated in a sub-bank exceed a critical hammer value. A DRAM memory device, a buffer circuit or a controller of such a memory may comprise the logic for preventing the row hammer effect. |
| US11361810B2 |
Power mode wake-up for memory on different power domains
A memory device includes an array of memory cells and a plurality of peripheral circuits operably coupled to the memory array. A power control circuit may be configured to individually control an application of power to each of the plurality of peripheral circuits and the array of memory cells. Inserting a switch device across the different power domains to achieve the same sequential wake-up path for the peripheral circuits connected to different power domains reduces peak current. |
| US11361809B2 |
Pseudo static memory device
A pseudo static memory device includes multiple memories, an arbiter and a controller. The memories respectively generate multiple self-refresh request signals. Each of the self-refresh request signals indicates a time period for performing self-refresh operation of corresponding memory. The arbiter receives the self-refresh request signals and generates a latency synchronize flag during the memories being enabled. The controller decides an accessing latency for accessing the memories during an accessing operation according to the latency synchronize flag. |
| US11361808B2 |
Apparatuses and methods for selective row refreshes
Apparatuses and methods for selective row refreshes are disclosed herein. An example apparatus may include a refresh control circuit. The refresh control circuit may be configured to receive a target address associated with a target plurality of memory cells from an address bus. The refresh control circuit may further be configured to provide a proximate address to the address bus responsive, at least in part, to determining that a number of refresh operations have occurred. In some examples, a plurality of memory cells associated with the proximate address may be a plurality of memory cells adjacent the target plurality of memory cells. |
| US11361807B2 |
Semiconductor device
A semiconductor device that enables lower power consumption and data storage imitating a human brain is provided. The semiconductor device includes a control unit, a memory unit, and a sensor unit. The memory unit includes a memory circuit and a switching circuit. The memory circuit includes a first transistor and a capacitor. The switching circuit includes a second transistor and a third transistor. The first transistor and the second transistor include a semiconductor layer including a channel formation region with an oxide semiconductor, and a back gate electrode. The control unit has a function of switching a signal supplied to the back gate electrode, in accordance with a signal obtained at the sensor unit. |
| US11361804B2 |
Memory system and operating method of the memory system
A memory system includes a memory device including an interface circuit and a semiconductor memory, and a controller to generate a command for controlling the memory device. The interface circuit receives the command from the controller; determines whether the command is for the semiconductor memory or the interface circuit; and when it is determined that the command is for the interface circuit, performs a blocking operation to block transfer of the command between the interface circuit and the semiconductor memory and performs an internal operation of the interface circuit. The internal operation includes a signal controlling operation, a training operation, a read operation, an on-die termination operation, a ZQ calibration operation, or a driving force control operation. |
| US11361803B2 |
Memory device and operating method of the memory device
A memory device includes a plurality of memory cell arrays each configured to include a plurality of memory cells, a plurality of peripheral circuits each configured to perform operations on the plurality of memory cell arrays, a plurality of control logics configured to control the plurality of peripheral circuits, and a control logic selector configured to activate at least one control logic among the plurality of control logics according to a type of a command received from the memory controller. |
| US11361802B2 |
Logic compatible embedded flash memory
A non-volatile memory combines a data cell and a reference cell. The data cell includes a coupling structure and a transistor stack. The transistor stack is electrically coupled to the coupling structure. The data cell can store data and output a data signal that corresponds to the data. The reference cell includes a transistor stack that has the same structure as that of the data cell and outputs a reference signal. A column circuit is electrically coupled to the data cell and the first reference cell and configured to process the data signal using the reference signal. |
| US11361797B2 |
Moving image reproduction apparatus, moving image reproduction method, moving image reproduction system, and storage medium
In a case where an event occurs, a moving image corresponding to a time period during which a matter relating to the event is detectable is reproduced. A moving image reproduction apparatus includes a human figure detection unit that detects a first human figure and a second human figure detected during an event time period which is a partial time period which an event continues, a specification unit that specifies a first human figure appearance time period during which the first human figure appears and a second human figure appearance time period during which the second human figure appears, and a display control unit that controls reproduction of a time period of a moving image, the time period including a time from the first human figure appearance time period to the second human figure appearance time period. |
| US11361796B2 |
Display control device, operation detection device, display control method, and display control program
To provide a display control device and the like that enable a passenger to perform, free from a feeling of strangeness, an operation of displaying an image shot before or after an image being displayed by an operator when an image in which an outside of a moving body is shot is displayed in the moving body.The display control device displays images obtained by shooting the outside of a moving body in the moving body, detects the direction of movement of the moving body, switches, in accordance with the movement direction, the first operation between to be a forward operation of displaying an image shot after an image being displayed and to be a rewind operation of displaying an image shot before an image being displayed, displays an image in accordance with the forward operation or the rewind operation. |
| US11361795B2 |
Data buffer and data buffer control
Control apparatus to control operation of a data buffer to which data items are written according to a write pointer which advances in position in response to an input data item rate and from which data items are read according to a read pointer which advances in position in response to an output data item rate, comprises: a detector configured to detect an occupancy difference between a current buffer occupancy and a target buffer occupancy, in which the current buffer occupancy represents a difference between the read and write pointers; an output data item interpolator configured to interpolate a data item at an interpolated data buffer location displaced by a read offset displacement from a data buffer location pointed to by the read pointer; and output control circuitry configured, in response to a current occupancy difference exceeding a threshold occupancy difference, to change the read pointer from an initial read pointer to a target read pointer by a change amount so as to reduce the occupancy difference, the output control circuitry being configured to progressively vary the read offset displacement so as to define an interpolated data buffer location which progresses over the output of a transitional group of data items towards the location pointed to by the target read pointer; the output control circuitry being further configured, when the occupancy difference is less than the threshold occupancy difference and the interpolated data buffer location is aligned with the target read pointer, to inhibit operation of the output data item interpolator and to control output of an output data item from the data buffer location pointed to by the read pointer. |
| US11361794B2 |
Apparatus and method for storing wave signals in a cavity
An apparatus comprising a cavity having interior surfaces or reflecting elements, one or more transmitters configured to receive an electrical signal, transform the electrical signal into an electromagnetic wave signal, and introduce the electromagnetic wave signal into an inside of the cavity, and one or more receivers configured to retrieve the electromagnetic wave signal, transform the electromagnetic wave signal to a corresponding electrical signal, and transmit the corresponding electrical signal to the outside of the cavity is disclosed. The electromagnetic wave signal is contained within the inside of the cavity until retrieved by undergoing a series of reflections or traversals between the interior surfaces of the cavity or the reflecting elements within the cavity. The apparatus may further comprise one or more regenerators configured to re-amplify, re-shape, and/or re-time the electromagnetic wave signal traveling within the inside of the cavity. |
| US11361793B2 |
Magnetic tape having characterized magnetic layer and magnetic recording and reproducing device
The magnetic tape includes a non-magnetic support; and a magnetic layer including ferromagnetic powder and a binding agent on the non-magnetic support, in which an absolute value ΔN of a difference between a refractive index Nxy measured regarding an in-plane direction of the magnetic layer and a refractive index Nz measured regarding a thickness direction of the magnetic layer is 0.25 to 0.40, and a logarithmic decrement acquired by a pendulum viscoelasticity test performed regarding a surface of the magnetic layer is equal to or smaller than 0.050. |
| US11361792B2 |
Magnetic tape having characterized magnetic layer and magnetic recording and reproducing device
The magnetic tape includes a non-magnetic support; and a magnetic layer including ferromagnetic powder and a binding agent on the non-magnetic support, in which the magnetic layer includes one or more components selected from the group consisting of fatty acid and fatty acid amide, a C—H derived C concentration calculated from a C—H peak area ratio of C1s spectra obtained by X-ray photoelectron spectroscopic analysis performed on a surface of the magnetic layer at a photoelectron take-off angle of 10 degrees is equal to or greater than 45 atom %, and an absolute value ΔN of a difference between a refractive index Nxy measured regarding an in-plane direction of the magnetic layer and a refractive index Nz measured regarding a thickness direction of the magnetic layer is 0.25 to 0.40. |
| US11361787B1 |
Zero skew disk drive with dual actuators
A data storage device includes a stack of a plurality of disks, first and second arms, first and second heads, first and second linear drivers and an elevator. Each of the plurality of disks includes a read/write surface. The first arm has a first head end that is movable relative to the stack. The first head is configured to interact with a selected one of the read/write surfaces. The first linear driver is configured to move the first arm along a first straight line in a x-y plane defined by the one of the read/write surfaces. The elevator is configured to move the first arm in a z direction. The second arm has a second head end that is movable relative to the stack and supports the second head. The second linear driver is configured to move the second arm along a second straight line in the x-y plane. |
| US11361785B2 |
Sound outputting device including plurality of microphones and method for processing sound signal using plurality of microphones
An electronic device and method are disclosed. The electronic device includes a first microphone, a second microphone, a memory; and a processor. The processor implements the method, including: determining whether a voice is detected in a first sound signal detected by the first microphone; determine whether a present recording period is a voice period or a silent period based on the determination, when the present period is the silent period, receive a second sound signal via the second microphone and analyze a noise signal included therein, remove noise signals from one of the first and second sound signals, based on characteristics of the voice period or the analyzed noise signal, and combine the first and second sound signal into an output signal and transmit the output signal to an external device. |
| US11361783B2 |
Computer-aided conversion test system and method for generating intelligible speech
The present invention provides a computer-aided conversion test system and method for generating intelligible speech. The test system includes an acoustic test module with a nasal-genio-oropharyngeal tract, a transmitting module generates a detecting signal, a first receiving module, a second receiving module, and a central processing module with a plurality of first phonetically oral cavity shape spectra. By adjusting the transmitting module, the first receiving module, or the second receiving module, a second phonetically oral cavity shape spectrum is correctly compared and identified by a central computing unit as one of the corresponding first phonetically oral cavity shape spectra. After testing, training and adjusting through the test method, the detecting signal transmitted by the transmitting module is analyzed and identified by the central processing module to increase its interpretation accuracy and shorten the time of machine learning. |
| US11361780B2 |
Real-time speech-to-speech generation (RSSG) apparatus, method and a system therefore
Information loss in speech to text conversion and Inability to preserve vocal emotion information without changing the artificial intelligence model infrastructure in a conventional speech to speech translation system are essential drawback of the conventional techniques. Embodiments of the invention provide direct speech to speech translation system is disclosed. Direct speech to speech translation system uses a one-tier approach, creating a unified-model for whole application. The single-model ecosystem takes in audio (mel spectrogram) as an input and gives out audio (mel spectrogram) as an output. This solves the bottleneck problem by not converting speech directly to text but having text as a byproduct of speech to speech translation, preserving phonetic information along the way. This model also uses pre-processing and post-processing scripts but only for the whole model. This model needs parallel audio samples in two languages. The training methodology involves augmenting or changing both sides of the audio equally. |
| US11361779B2 |
Resampling output signals of QMF based audio codecs
An apparatus for processing an audio signal includes a configurable first audio signal processor for processing the audio signal in accordance with different configuration settings to obtain a processed audio signal, wherein the apparatus is adapted so that different configuration settings result in different sampling rates of the processed audio signal. The apparatus furthermore includes n analysis filter bank having a first number of analysis filter bank channels, a synthesis filter bank having a second number of synthesis filter bank channels, a second audio processor being adapted to receive and process an audio signal having a predetermined sampling rate, and a controller for controlling the first number of analysis filter bank channels or the second number of synthesis filter bank channels in accordance with a configuration setting. |
| US11361777B2 |
Sound prioritisation system and method
A system for determining prioritisation values for two or more sounds within an audio clip includes: a feature extraction unit operable to extract characteristic features from the two or more sounds, a feature combination unit operable to generate a combined mix comprising extracted features from the two or more sounds, an audio assessment unit operable to identify the contribution of one or more of the features to the combined mix, a feature classification unit operable to assign a saliency score to each of the features in the combined mix, and an audio prioritisation unit operable to determine relative priority values for the two or more sounds in dependence upon the assigned saliency scores for each of one or more features of the sounds. |
| US11361776B2 |
Coding scaled spatial components
In general, techniques are described by which to code scaled spatial components. A device comprising a memory and one or more processors may be configured to perform the techniques. The memory may store a bitstream including an encoded foreground audio signal and a corresponding quantized spatial component. The one or more processors may perform psychoacoustic audio decoding with respect to the encoded foreground audio signal to obtain a foreground audio signal, and determine, when performing psychoacoustic audio decoding, a bit allocation for the encoded foreground audio signal. The one or more processors may dequantize the quantized spatial component to obtain a scaled spatial component, and descale, based on the bit allocation, the scaled spatial component to obtain a spatial component. The one or more processors may reconstruct, based on the foreground audio signal and the spatial component, scene-based audio data. |
| US11361774B2 |
Multi-signal detection and combination of audio-based data transmissions
Methods and systems for detecting and combining audio transmissions containing data are provided. In one embodiment, a method is provided that includes receiving multiple audio signals from multiple receivers. An audio transmission may be detected in a first subset of the audio signals and the audio transmission may contain data. A second subset of the audio signals may be identified with the strongest magnitude of the audio transmission. Portions of the second subset of the audio signals may then be combined to generate a combined audio transmission signal and the combined audio transmission signal may be decoded for further processing. |
| US11361769B2 |
Assessing accuracy of an input or request received by an artificial intelligence system
The present disclosure includes analyzing a voice command or request from a user, received at an Artificial Intelligence (AI) system, for identifying a possibly incorrect or misunderstood voice command or request. A first user is identified and associated to a first user profile, in response to receiving an audio input, including a question or command, at an AI system. A possible defect or error is identified, in whole or in part, of the question or the command, based on the first profile of the first user and a knowledge corpus. A response by the AI system is determined based on the analysis of the content and the user profile for the first user. A possible alternative content is generated, in whole or in part, for the question or the command, and communicated the response including the possible alternative content to the first user. |
| US11361768B2 |
Utterance classifier
A method includes receiving a spoken utterance that includes a plurality of words, and generating, using a neural network-based utterance classifier comprising a stack of multiple Long-Short Term Memory (LSTM) layers, a respective textual representation for each word of the of the plurality of words of the spoken utterance. The neural network-based utterance classifier trained on negative training examples of spoken utterances not directed toward an automated assistant server. The method further including determining, using the respective textual representation generated for each word of the plurality of words of the spoken utterance, that the spoken utterance is one of directed toward the automated assistant server or not directed toward the automated assistant server, and when the spoken utterance is directed toward the automated assistant server, generating instructions that cause the automated assistant server to generate a response to the spoken utterance. |
| US11361764B1 |
Device naming-indicator generation
Systems and methods for device naming-indicator generation are disclosed. Friendly names for accessory devices, such as smart-home devices, may be utilized to generate formatted text data that includes capitalization and/or punctuation for the friendly names. The formatted text data may be utilized to generate tag data indicating attributes of the friendly name. The tag data and/or contextual data indicating historical usage of the accessory device may be utilized to generate naming indicator(s) for the accessory device. The naming indicator(s) may be utilized, for example, during target inference and/or for communicating with a user about the accessory device. |
| US11361761B2 |
Pattern-based statement attribution
A system, method, and computer program product for determining statement attributions. The system includes at least one processing component, at least one memory component, a feature extractor, a model generator, a model database, and an attribution selector. The method includes receiving a statement, generating at least one pattern that defines a grammatical feature of the statement, and generating a statement model from the at least one pattern. The method also includes determining a similarity value for the statement model and at least one reference model. |
| US11361757B2 |
Method and apparatus with speech recognition
A processor-implemented decoding method in a first neural network is provided. The method predicts probabilities of candidates of an output token based on at least one previously input token, determines the output token among the candidates based on the predicted probabilities; and determines a next input token by selecting one of the output token and a pre-defined special token based on a determined probability of the output token. |
| US11361750B2 |
System and electronic device for generating tts model
Disclosed is an electronic device. Other various embodiments as understood from the specification are also possible. |
| US11361749B2 |
Ambient cooperative intelligence system and method
A method, computer program product, and computing system for obtaining calibration information for a three-dimensional space incorporating an ACI system; and processing the calibration information to calibrate the ACI system. |
| US11361747B2 |
Daisy chaining of tournament audio controllers
A method and system for daisy chaining tournament audio controllers, where the method comprises, in a headset coupled to a first audio controller, the first audio controller being in a daisy chain of audio controllers: receiving a chat signal from a second audio controller in the daisy chain of audio controllers, receiving a microphone signal from a microphone in the headset, summing the chat signal with the microphone signal, communicating the summed signal to a third audio controllers in the daisy chain, and communicating the chat signal to the headset. The microphone signal may be removed from the summed chat signal and microphone signal by adding a second microphone signal 180 degrees out of phase with the microphone signal. The chat signal may be summed with the microphone signal at an amplitude set by a user of the headset after the removal of the microphone signal. |
| US11361746B2 |
Audio playback apparatus and method having noise-canceling mechanism
The present disclosure discloses an audio playback apparatus having noise-canceling mechanism that includes a sound receiving circuit, a storage circuit, a filter control circuit, a filter circuit and an audio playback circuit. The sound receiving circuit receives received audio signal including noise. The storage circuit stores filter parameters. The filter control circuit includes a noise estimation circuit, a noise distribution determination circuit and a parameter generation circuit. The noise estimation circuit receives the received audio signal and calculates a stationary noise power spectrum density of the noise such that the noise distribution determination circuit determines a noise spectrum distribution accordingly. The parameter generation circuit analyses the noise spectrum distribution and retrieves a group of selected filter parameters accordingly. The filter circuit filters the received sound signal according to the group of selected filter parameters to generate an anti-noise audio signal. The audio playback circuit playbacks an actual audio signal and the anti-noise audio signal simultaneously. |
| US11361745B2 |
Headphone acoustic noise cancellation and speaker protection
An audio system has an ambient sound enhancement (ASE) function, in which an against-the-ear audio device having a speaker converts a digitally processed version of an input audio signal into amplified sound. The amplification may be in accordance with a stored hearing profile of the user. The audio system also has an acoustic noise cancellation (ANC) function that may be combined in various ways with the ASE function, and that may be responsive to voice activity detection. Other aspects are also described and claimed. |
| US11361740B2 |
Hand shaker
The present invention is a noise maker comprising: a body comprising: an upper chamber, a lower chamber connected to the upper chamber, a handle connected to the lower chamber, a base connected to the handle; a cover, wherein the cover securely fits around the upper chamber; a first set of noise making elements contained with the upper chamber; and a second set of noise making elements contained within the lower chamber. |
| US11361735B1 |
Head-mountable device with output for distinguishing virtual and physical objects
A head-mountable device can help a user distinguish between the physical objects and the virtual objects when desired. Indications provided by the head-mountable device can be visually applied to physical objects and/or virtual objects within a view provided by the head-mountable device. The indications can be provided to notify the user of objects outside the view provided by the head-mountable device. The indications can be visual, auditory, and/or haptic in nature. The indications can be provided based on a user's detected action, intention, and/or attention so that the indication is more targeted to a user's needs. The indications can be provided under particular conditions, so that the user can more easily maintain an immersive experience when the indications are not desired. |
| US11361732B2 |
Image display apparatus, control method for image display apparatus, and storage medium
An image display apparatus includes a generation unit and a display unit. The generation unit is configured to generate display images one by one from pieces of image data. The display unit is configured to display the display images generated by the generation unit as a list of the pieces of image data. Before generation of a first display image which the generation unit has started to generate using first image data is completed, the generation unit starts to generate a second display image using second image data, according to a predetermined condition. |
| US11361728B2 |
Gate driving circuit and display apparatus having the same
A liquid crystal display apparatus including a gate driving circuit disposed on a liquid crystal display is provided. The apparatus further includes a data driving chip, disposed on the liquid crystal display panel, to apply data driving signals to data lines. The gate driving circuit includes a plurality of stages connected to one another in parallel. The odd-numbered stages of the stages each apply gate driving signals to odd-numbered gate lines of the gate lines, in response to a first clock signal and the even-numbered stages of the stages each apply the gate driving signals to even-numbered gate lines of the gate lines, in response to a second clock signal having an opposite phase from a phase of the first clock signal. |
| US11361726B2 |
Display device and operating method thereof
A display device that achieves both high-accuracy sensing by a touch sensor unit and smooth input using the touch sensor unit is provided. The display device includes a display unit and the touch sensor unit. The touch sensor unit performs touch sensing operation at a different timing from display image rewriting by the display unit, whereby the high-accuracy sensing can be achieved. The display unit has a function of rewriting a display image only in a region that needs to be rewritten. In the case where the entire display region is not necessarily rewritten, the time for the sensing operation by the touch sensor unit can be lengthened, whereby the smooth input can be achieved. |
| US11361724B2 |
Drive circuit of display device, and display device
Disclosed are a drive circuit of a display device, and a display device. The drive circuit includes: a plurality of sets of transmission signal lines; a set of clock signal lines, in signal connection with a timing drive circuit separately to acquire a gate drive clock signal; and a compensation capacitor, connected in parallel to each transmission signal line, each transmission signal line in each set of transmission signal lines being in signal connection with a clock signal line corresponding to a set of clock signal lines, where the compensation capacitance corresponding to the transmission signal line, closer to the timing drive circuit, in each set of transmission signal lines is smaller. |
| US11361721B2 |
Method and device for driving display panel, and display device
Disclosed are a method and a device for driving a display panel, and a display device. The method includes: S200, detecting a frequency of a data output control signal TP1 when data is transmitted for the display panel, recording and storing the frequency as a first frequency F1; S300, judging whether the data output control signal TP1 works in a preset working time; S400, detecting a frequency of the data output control signal when the data output control signal TP1 works in the preset working time, recording and storing the frequency as a second frequency F2; and S600, calculating a frequency of a polarity control signal according to the first frequency F1 and the second frequency F2, and generating the polarity control signal according to the calculated frequency to drive the display panel. |
| US11361720B2 |
Display device comprising grayscale voltage output unit that outputs corrected grayscale voltage to one signal line including disconnection location
A grayscale voltage output unit outputs, for a signal line including a disconnection location, a first grayscale voltage to a first signal line portion, the first grayscale voltage being corrected to be lower than the grayscale voltage to be output to the signal line on the basis of the location of the disconnection location and the wiring resistance of the signal line, and the grayscale voltage output unit outputs a second grayscale voltage to a second signal line portion, the second grayscale voltage being corrected from the grayscale voltage to be output to the signal line on the basis of the location of the disconnection location, the wiring resistance of the signal line, and the wiring resistance of spare wiring. Thereby, a display device with a simple configuration capable of reducing luminance deviation along a signal line with a disconnection location is provided. |
| US11361716B2 |
Pixel sensing circuit and panel driving device
The present disclosure relates to a pixel sensing circuit and a panel driving device, and more particularly, to a pixel sensing circuit and a panel driving device for effectively compensating for differences of characteristics of sensing channel circuits depending on locations where the sensing channel circuits are disposed in an integrated circuit. |
| US11361712B2 |
Pixel circuit, driving method thereof, and display device
The present disclosure discloses a pixel circuit, a driving method thereof, a display panel, and a display device, which belong to the technical field of display. The pixel circuit includes a data writing sub-circuit, a compensation sub-circuit, a storage sub-circuit, and a driving sub-circuit. Since the compensation sub-circuit may output a first power signal to a first node, the storage sub-circuit may adjust the potential of a second node according to the potential of the first node. |
| US11361703B2 |
Gate driving unit including four clock signals, gate driving method, gate driving circuit, display panel and display device
A gate driving unit, a gate driving method, a gate driving circuit, a display panel and a display device are provided. The gate driving unit includes a start terminal, a first gate driving signal output terminal, a second gate driving signal output terminal, a pull-up control node control circuit, a pull-up node control circuit, configured to control a potential of a first pull-up node and a potential of a second pull-up node based on the potential of the pull-up control node, a first gate driving signal output circuit, a second gate driving signal output circuit, and a pull-down node control circuit, configured to control and maintain the potential of the pull-down node under the control of a third clock signal and a fourth clock signal, and control to reset the potential of the pull-down node under the control of the potential of the pull-up control node. |
| US11361702B2 |
Shift register unit and driving method thereof, scan driving circuit, array substrate and display device
A shift register unit and a driving method thereof, a scan driving circuit, an array substrate and a display device. The shift register unit includes: an input circuit configured for setting the first node to a valid level in a case where the input terminal is at a valid level; a first reset control circuit configured for setting the second node to a valid level and setting the input terminal to an invalid level in a case where the reset terminal is at a valid level; an output circuit configured for setting the output terminal to a valid level by using a clock signal in a case where the first node is at the valid level; a reset circuit configured for setting the first node and the output terminal to an invalid level in a case where the second node is at a valid level. |
| US11361699B2 |
Display mapping for high dynamic range images on power-limiting displays
Methods and systems for mapping images from a first dynamic range to a second dynamic on a target display with power limitations are described. Given: an input image in a first dynamic range, input metadata (Smin, Smid, Smax), power-independent luminance characteristics of a target display (Tmin, reference Tmax), and an APL function of the target display, wherein the APL function determines output luminance in the target display as a function of average picture level (APL) input in the target display, a processor generates an adaptive output of the maximum luminance level for the target display (Tmax) so that when mapping the image from the first dynamic range to the second dynamic range, the anchor points of the tone-mapping function are adjusted according to the APL function of the target display. |
| US11361696B2 |
Shift register and driving method therefor, gate driver circuit, and display device
A shift register includes an output sub-circuit, a cascade sub-circuit and at least one additional output sub-circuit. The output sub-circuit is configured to transmit a first clock signal received at the first clock signal terminal to the output signal terminal under control of a potential at the pull-up node, so as to scan a gate line coupled to the output signal terminal. The cascade sub-circuit is configured to transmit a second clock signal received at the second clock signal terminal to the cascade node under the control of the potential at the pull-up node. Each additional output sub-circuit is configured to transmit a clock signal received at a corresponding clock signal terminal to a corresponding additional output signal terminal under control of a potential at the cascade node, so as to scan a gate line coupled to the corresponding additional output signal terminal. |
| US11361694B2 |
Shift register, gate driving circuit, and display apparatus
Embodiments of the present disclosure provide a shift register, a gate driving circuit, and a display apparatus. The shift register comprises a power consumption-reducing sub-circuit and an output sub-circuit; wherein: the power consumption-reducing sub-circuit is connected to a clock signal terminal, a control terminal, and the output sub-circuit, the power consumption-reducing sub-circuit is used to output a signal of the clock signal terminal to the output sub-circuit under the control of the control terminal; the output sub-circuit is connected to the clock signal terminal through the power consumption-reducing sub-circuit and is also connected to an output terminal and a pull-up node, the output sub-circuit is used to output an output signal of the power consumption-reducing sub-circuit to the output terminal under the control of the pull-up node. |
| US11361692B2 |
Display panel and display device
A display panel and a display device are disclosed. The display panel includes: a plurality of scanning line arranged in a first direction, a plurality of data lines arranged in a second direction, a first drive circuit and a second drive circuit. The first drive circuit has a plurality of scanning signal output ends connected to the plurality of scanning lines in one-to-one correspondence. The second drive circuit has a plurality of data signal output ends connected to the plurality of data lines in one-to-one correspondence. The plurality of data lines includes first data lines and second data lines, the distance between the first data line and the first drive circuit is less than that between the second data line and the first drive circuit, and the line width of the first data line is larger than that of the second data line. |
| US11361688B2 |
Augmented reality eyebox fitting optimization for individuals
In some embodiments, the disclosed subject matter involves a head worn device (HWD) for viewing augmented reality, or virtual images. A projector coupled to the HWD may use a microelectromechanical systems projector and project onto a holographic lens of the HWD. Images may be projected into an eyebox area that is deemed comfortable to the user, the eyebox area located in one of a plurality of vertically adjacent recording zones. The recording zone for projection may be selected by the user, or be automatically selected based on configuration parameters of the HWD. Horizontal correction of the eyebox may be included. In an embodiment, multiple horizontal images are displayed in the selected recording zone, in different wavelengths. Another embodiment adjusts horizontal shift of the projected image based on user inputs. Other embodiments are described and claimed. |
| US11361684B2 |
Production method for a poster device and poster device
A production method for a poster device with two boards and a frame as well as a poster device. One permanently fixed board is attached to the frame. The other board is removable and can be removed without tools. The frame may be a snap frame and the removable board may be held by snapping elements of the snap frame. The removable board can be removed after the snapping elements have been opened. The method comprises the following steps: ⋅providing a frame and a permanently fixed board comprising a frame-like groove, ⋅placing the frame and the permanently fixed board horizontally, ⋅pouring a flowable gasket material into the frame-like groove so that the groove is completely filled with the flowable gasket material and the flowable gasket material sticks out from the groove, ⋅solidifying the gasket material in such a way that it will not solidify for at least minutes, preferably for at least 20 minutes, ⋅placing the removable board onto the solidified gasket material, ⋅fixing the removable board. The internal space of the resulting poster device is moisture tight. |
| US11361683B2 |
Modular sign system with a wireless backplane and related methods
Embodiments of a modular sign system with a wireless backplane and related methods are generally described herein. Many embodiments include a sign system. In some embodiments, the sign system can comprise a plurality of units, a wireless communication system configured to transfer information between the plurality of units, and a control device configured to transmit information to at least one unit of the plurality of units. In many embodiments, each unit of the plurality of units comprises a display of a plurality displays, a controller of a plurality of controllers, and a transceiver of a plurality of transceivers. Other embodiments may be described and claimed. |
| US11361681B2 |
Display device
The invention provides a display device including a flexible display screen and a support base. The support base has a support surface, and the flexible display screen is positioned on the support surface. The support base includes a first support and a second support, and the first support and the second support slidable relative to each other along a first direction. A first end of the flexible display screen is coupled to the first support, a second end of the flexible display screen is coupled to the second support, and the first support and the second support are provided with a winding mechanism for winding the flexible display screen. |
| US11361664B2 |
Integration of unmanned aerial system data with structured and unstructured information for decision support
A system and method that system for provide visual decision support information. A disclosed system performs a process that includes: storing a set of layers of GIS data associated with a safety critical use case; in response to an active incident, integrating UAS incident data with the GIS data and generating a visual decision support interface that includes a flight plan overlaid onto the GIS data, wherein the flight plan includes a path with interactive points that link images taken by a UAS to geospatial locations in the GIS data; in further response to the active incident, integrating at least one of: weather, thermal image, social media, RFID, machine learning, animation, graphic, haptic sensor, holographic or virtual image, emoji, or video data, with the GIS data to provide additional visual information to the visual decision support interface; and displaying the visual decision support interface on at least one display. |
| US11361663B2 |
Formulating lane level routing plans
The present invention extends to methods, systems, and computer program products for formulating lane level routing plans. In general, aspects of the invention are used in motorized vehicles to guide a driver to a terminal vehicle configuration according to a lane level routing plan that balances travel time with routing plan robustness. A lane level routing plan can be based on terminal guidance conditions (e.g., exiting a highway in the correct off ramp lane), statistical patterns of lanes themselves, current vehicle state, and state of the local environment near the vehicle. Lane level routing plans can be communicated to the driver with audio, visual, and/or haptic cues. Lane level routing plans can be revised online and in (essentially) real-time in response to changing conditions in the local environment (e.g., a trailing vehicle in a neighboring lane has decided to increase speed). |
| US11361658B1 |
Edge computing-based method for fine determination of urban traffic state
An edge computing-based method for fine determination of an urban traffic state includes the following steps: preprocessing lane-level data collected by edge nodes; dividing a complete road segment; computing an average delay per vehicle of a lane by using the edge nodes; inputting the preprocessed and computed data into a fuzzy logic model to determine a lane-level traffic state of an approach region; and based on the characteristic that edge nodes at the intersections can be interconnected, linking upstream and downstream intersection information to compute an average travel speed of a remaining road segment, and determining a traffic state of the remaining road segment. |
| US11361657B1 |
Appliance with user position determination based on mobile device
Position of a mobile device of a user relative to an appliance is determined. If the position meets a predetermined position parameter, one or more user-preferred actions are undertaken for the appliance. User-preferred actions can include activation or deactivation of one or more components of the appliance. |
| US11361656B2 |
Wireless control in a cable feeder and puller system
A control module for controlling a cable pulling or feeding apparatus at one endpoint of a pulling operation and for wirelessly communicating with a cable feeding or pulling apparatus at an opposite endpoint. The control module includes a switch input to receive a start signal from a switch for initiating operation of the apparatus and an equipment output that connects to the pulling/feeding apparatus. A wireless communication interface communicates ready state or stop state messages to the other apparatus to coordinate a pulling operation. The control module operates in one of two modes: endpoint mode or repeater mode. In repeater mode, the control module may be positioned between the endpoints to extend the wireless communications between the endpoints. |
| US11361654B2 |
Operating a fire system network
Methods, devices, and systems for operating a fire system network are described herein. One method includes receiving a plurality of time-slotted maintenance messages over a period of time from each of a plurality of fire system devices located in a facility via a first spreading factor, receiving an event message from a fire system device of the plurality of fire system devices responsive to the fire system device determining a fire event, the event message sent via a second spreading factor, and sending a block actuate message to the plurality of fire system devices responsive to receiving the event message, wherein the block actuate message is configured to activate a fire alarm. |
| US11361652B1 |
Voice annunciated reminders and alerts
A computer-implemented method for announcing reminders and alerts is described. In one embodiment, appointments of an electronic calendar are monitored via a processor of a home automation system. A trigger of an upcoming appointment is detected. Information regarding the upcoming appointment is announced via a speaker of the home automation system. |
| US11361651B2 |
Moisture sensors
The present disclosure relates to a moisture sensor. The moisture sensor includes at least one non-shielded sensor element having at least an antenna and an element made of a liquid absorbing material, the material being configured to drive liquid to the antenna when liquid is in contact with the material; at least one shielded sensor element having at least an antenna and an element made of a non-conducting liquid proof material. The moisture sensor may be included in a system for detecting moisture. |
| US11361648B2 |
Fall detection apparatus, a method of detecting a fall by a subject and a computer program product for implementing the method
According to an aspect, there is provided a fall detection apparatus, the fall detection apparatus comprising one or more processing units configured to obtain a first input indicating which one or ones of a plurality of fall detection algorithms have detected a potential fall by the subject, wherein each fall detection algorithm of the plurality of fall detection algorithms is associated with a respective type of fall and detects a potential fall of the associated type by analysing a set of movement measurements for the subject, wherein each respective type of fall has an associated initial state of the subject; obtain a second input indicating the status of the subject prior to the potential fall, wherein the status of the subject is determined by analysing a set of measurements from one or more sensors in the environment of the subject; compare the determined status of the subject prior to the potential fall to the initial state for each type of fall associated with any potential fall indicated in the first input; and output an indication that the subject has fallen if the determined status of the subject matches the initial state of any of the respective types of fall associated with any potential fall indicated in the first input. |
| US11361643B2 |
High sensitivity fiber optic based detection system
A system for locating a detection system within a predetermined area includes a fiber optic harness defining at least one node in communication with the predetermined area. Light is received at the at least one node. At least one emitter is arranged in communication with the at least one node. A control system is operably coupled to the at least one emitter and the at least one node to determine a physical location of the at least one node relative to the predetermined area. |
| US11361641B2 |
Doorbell package detection systems and methods
Delivery parcel detection systems can include a doorbell having a first wireless communication system and a parcel holding system configured for placement in an entryway. The doorbell can be communicatively coupled to the parcel holding system. The parcel holding system can comprise a sensor configured to detect a delivery parcel located on the parcel holding system. Systems can include a first communication sent from the parcel holding system to the doorbell in response to the parcel holding system detecting an arrival, a movement, or a removal of the delivery parcel. Systems can also include a second communication sent from the doorbell to a remote computing device in response to the doorbell receiving the first communication. |
| US11361639B2 |
Gunshot detection system with location tracking
A gunshot detection system includes a control panel that receives event data from gunshot sensor units detecting gunshots and generates location information pertaining to a shooting event based on the event data. The control panel includes a display on which a graphical user interface (GUI) is rendered. The GUI displays maps of a building with icons overlaid on the maps based on the generated location information. In one example, the GUI displays a map with an icon representing the active shooter, the position of the icon with respect to the floorplan image corresponding to an area of the building. In another example, the GUI displays a map with icons representing different gunshot sensor units, the icons having different visual characteristics to indicate that the gunshot sensor units detected the gunshots and/or which of the gunshot sensor units was determined to be closest to the detected gunshots. |
| US11361637B2 |
Gunshot detection system with ambient noise modeling and monitoring
A gunshot detection system continually monitors ambient noise throughout a building, learns the building's auditory patterns, and alerts users when sounds are found to be unusual or generally indicative of a dangerous situation. For example, gunshot sensor units positioned throughout the building include microphones. During a learning period (e.g. during normal conditions), these microphones capture ambient noise. The gunshot detection system generates ambient noise models representing the ambient noise during the normal conditions. The gunshot detection system then continually processes currently captured audio data depicting ambient noise (and potential acoustic anomalies) against the ambient noise models to detect and/or identify the acoustic anomalies and to determine whether to generate an alert. |
| US11361635B2 |
Merchandise display security systems and methods
Merchandise security systems and methods are provided. In one example, a merchandise security system includes a plurality of security devices arranged in a wireless network, wherein the plurality of security devices are arranged in a planogram and each configured to protect one or more items from theft, each of the plurality of security devices configured to wirelessly communicate data with a remote device. The system also includes a plurality of electronic keys arranged in the wireless network and configured to wirelessly communicate data with the plurality of security devices and/or the remote device. Each of the plurality of electronic keys is configured to operate the plurality of security devices. The system also includes a gateway configured to receive the data from the plurality of security devices and electronic keys via wireless communication, wherein the gateway is configured to communicate the data to the remote computing device. |
| US11361631B2 |
Automated teller machine
An automated teller machine comprises an output compartment for the output of notes of value and a closing element (14) which, in a closed state, closes the output compartment. An output area (12) is delimited by a first delimiting element (16, 22) and at least a second delimiting element (18, 20) and, in the closed state, by the closing element (14). An arrangement (110, 210, 310, 410, 510, 610) for monitoring the output area (12) comprises at least a sensor unit (112, 122, 212, 222, 512, 520, 312, 612, 712, 812) which is arranged and configured such that it detects an element (E, E1, E2) arranged in the output area. |
| US11361629B1 |
Interactive enclosure with virtual reality
A system and method for providing virtual banking transactions are disclosed. The system comprises a kiosk with an enclosing structure where a user or member of a bank can go to conduct business including various banking transactions. Within the enclosing structure, an interactive system includes a display where a virtual associate can be shown. The interactive system includes slots that can be used to pass documents between the physical and virtual parts of the system. |
| US11361628B2 |
Increasing resource utilization in gaming applications
A method for enhancing resource utilization in Texas Holdem poker comprises administering a primary Texas Holdem poker round for a plurality of players and, concurrently with the primary Texas Holdem poker round, administering a secondary Texas Holdem poker round among at least some players who have folded out of the primary Texas Holdem poker round. These folded players retain their respective hole cards from the primary Texas Holdem poker round for the secondary Texas Holdem poker round, and the secondary Texas Holdem poker round utilizes at least one otherwise idle resource from the primary Texas Holdem poker round. For physical games played at a table with physical playing cards, the otherwise idle resource(s) comprises table positions of folded players, and for computerized poker games played with virtual playing cards, the otherwise idle resource(s) comprise the remote communication connections between the dealer computer system and the player computer systems. |
| US11361627B1 |
Method of verifying that a wager was placed before market close
The present disclosure provides a method to determine if a user had placed a wager and verify that the wager was placed before the wagering market closed in a play-by-play wagering network. This method provides the ability to receive a wager from a user and allows the wagering network to receive a timestamp from the user's device to determine if the wager was placed before the market closing. Also, this method provides the ability to verify that there is no fraud, malicious activity, or cheating from the user by verifying that through a 3rd party network, such as the user's network connecting the user to the internet, that the timestamps provided by the network are correct and allowing the user to confirm their wager if received a few moments after the market has closed. |
| US11361619B2 |
Amusement devices and games involving progressive jackpots
Various embodiments of a successive choice game including methods and apparatus are described. Further embodiments are disclosed. |
| US11361615B2 |
Information management system and information processing device
An information management system includes a gaming machine and an information processing device configured to communicate with the gaming machine, wherein the information processing device manages gaming machine identification information of the gaming machine to which an information card is used as time series information associated with information card identification information based upon the information card identification information of the information card not associated with personal information and the gaming machine identification information unique to the gaming machine transmitted from the gaming machine. |
| US11361614B2 |
Gaming machines with moveable topper and method of operating the same
An electronic gaming machine includes a display screen for displaying an electronic game, a mobile topper unit configured to be positioned in a first position and a second position, the first position being a lower position that the second position, and a controller programmed to execute the electronic game and programmed to provide instructions to change the position of the mobile topper unit between the first position and the second position based on an event of the wagering game. |
| US11361612B2 |
Zero weight articulating access door
A weightless articulating door mount for a gaming machine is disclosed. The weightless articulating door mount has a four link mechanism and a cam. A biasing mechanism interacts with the weightless articulating door mount through the cam and provides a uniform force counteracting the weight of the door/monitor. With the door/monitor effectively weightless, the door may be opened and will remain in place absent any further disturbance. |
| US11361611B2 |
Enhanced visualization of optimized symbol combinations in response to automatically determined symbol shift conditions
A gaming machine including a display device and game controller is provided. The display device includes reels having display positions for presenting symbols that include non-blank symbols and blank symbols. The game controller is configured to spin the reels horizontally to obtain a first game outcome including a first arrangement of the symbols at the display positions. In response to a determination that the first arrangement includes blank symbols, the game controller is configured to determine whether horizontally shifting non-blank symbols in either direction with respect to the blank symbols in each reel results in an optimal win. The game controller horizontally shifts the non-blank symbols with respect to the blank symbols in each reel to obtain a second game outcome in response to a determination that the shifting results in the optimal win. The game controller increases a credit balance by an award associated with the optimal win. |
| US11361603B1 |
Method and apparatus for secure delivery of take-out food
A secure food delivery bag with a single point for securing closure with a lock having an associated QR code or pin code enabled access control. The QR code or pin code is uniquely set for each use of the bag and is provided to the intended recipient of the food at the time the food is placed and locked in the bag. The recipient uses the unique QR code or pin code to access the bag contents upon receipt of the bag. |
| US11361600B2 |
Method for authenticating a diagnostic trouble code generated by a motor vehicle system of a vehicle
A method for authenticating at least one diagnostic trouble code (DTC) generated by a motor vehicle system of a vehicle. The method generates a DTC by a fault detection algorithm, stores the DTC in a volatile fault memory, generates an identity marker denoting the fault detection algorithm at the time of generation of the DTC, stores the identity marker in NVM, stores the DTC in the NVM when an ignition-off request signal is present, loads the DTC from the NVM into the volatile memory when an ignition-on request signal is present, and authenticates the DTC by the authentication data record by, initially by determining the fault detection algorithm by which the fault event was detected, subsequently this fault detection algorithm being compared with the fault detection algorithm indicated by the identity marker, and an absence of concordance resulting in a manipulation of the DTC being indicated. |
| US11361596B2 |
Method for shared vehicle storage management
System, apparatus, device and methods relating to a telematic vehicle sharing platform ecosystem and a telematic vehicle share I/O expander to automate sharing and management of a vehicle that is shared by more than one operator. |