最新美国发明专利第2018-11-20期 - 专利汇|PatentHub专利检索|专利查询网|发明专利查询分析

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US10135051B2	Battery components comprising fibers Battery components are generally provided. In some embodiments, the battery components can be used as pasting paper and/or capacitance layers for batteries, such as lead acid batteries. The battery components described herein may comprise a plurality of fibers. The battery component may include, in some embodiments, a plurality of fibers and, optionally, one or more additives such as conductive carbon and/or activated carbon. In certain embodiments, the plurality of fibers include relatively coarse glass fibers (e.g., having an average diameter of greater than or equal to 2 microns), relatively fine glass fibers (e.g., having an average diameter of less than 2 microns), and/or fibrillated fibers. In some instances, such fibers may be present in amounts such that the battery component has a particular surface area, mean pore size, and/or dry tensile strength.
US10135046B2	Temperature regulation structure In a temperature regulation structure according to the invention, the power storage element includes a power generation element for charging and discharging, and has a case body having an opening portion for incorporating the power generation element, and a lid that closes up the opening portion of the case body. Air for temperature regulation that comes into contact with the power storage element is supplied from a direction substantially perpendicular to a bottom face of the case body, which is opposed to the lid across the power generation element. The temperature of the power storage element can be efficiently regulated by bringing the air for temperature regulation into contact with the bottom face of the case body.
US10135042B2	Battery module unit A battery module unit for a power supply device is designed so that the value of the adhesive strength between an end plate and an outermost tape and the value of the adhesive strength between a battery module and the outermost tape are greater than or equal to the minimum required strength for holding the battery module and around the minimum required strength. As a result, the battery module does not fall off in a normally held state and the end plate can be easily peeled off from the battery module at the time of reworking.
US10135041B1	Systems and methods for packaging a solid-state battery The present disclosure relates to systems and methods for packaging a solid-state battery. Consistent with some embodiments, a package for a solid-state battery includes a substrate, a cap disposed over the substrate and forming an enclosure with the substrate, and a solid-state battery disposed inside the enclosure. The solid-state battery includes a first electrode that is disposed over the substrate, an electrolyte that is disposed over the first electrode, and a second electrode that is disposed over the electrolyte. The package further includes a compressible component disposed inside the enclosure and between the cap and the second electrode of the solid-state battery. The compressible component applies a pressure to at least one of the electrodes of the solid-state battery in a direction substantially perpendicular to the electrode(s) of the solid-state battery.
US10135040B2	Electric storage device, electric storage device assembly, and method for producing electric storage device Provided is an electric storage device including a first conductive member having a head bulging from an inserted part inserted through a partition wall, and a second conductive member that is formed using a metal material different from a material of the first conductive member and is fixed to the head of the first conductive member by friction stir welding.
US10135037B2	Manufacturing method of light-emitting device, light-emitting device, module, and electronic device A highly reliable light-emitting device is provided. A yield in a manufacturing process of a light-emitting device is increased. A light-emitting device is provided in which a non-light-emitting portion having a frame-like shape outside a light-emitting portion includes a portion thinner than the light-emitting portion. A light-emitting element and a bonding layer are formed over a substrate. The light-emitting element is sealed by overlapping a pair of substrates and curing the bonding layer. Then, while the cured bonding layer is heated, pressure is applied to at least a portion of the non-light-emitting portion with a member having a projection.
US10135036B2	Organic electroluminescence device and manufacturing method thereof In an organic electroluminescence device (100), a hole transport layer (22) is formed of a cured resin obtained by a ring opening polymerization of a polymerizable compound (a) containing a ring opening polymerizable group in the presence of a polymerization initiator (b). In addition, both of a maximum peak height Rp and a maximum valley depth Rv in an upper surface of the hole transport layer (22) are less than or equal to 14 nm. Accordingly, an organic electroluminescence device having excellent mass productivity and high luminescent efficiency is realized.
US10135033B2	Directional light extraction for organic light emitting diode (OLED) illumination devices An organic light emitting diode (OLED) incorporating a light extraction film is disclosed. The light extraction film may be used for enhancing light extraction from a light source. The light extraction film may include an array of 3-D microprisms, an interstitial region, and a glass layer. Each microprism may have an area of a first surface (A1) and an area of a second surface (A2). The A2 may be equal to or less than A1. Each microprism may have a pair of oppositely disposed sidewalls. The interstitial region may be disposed between the pair of oppositely disposed sidewalls of adjacent microprisms. The interstitial region may have an index of refraction less than an index of refraction of the microprism. The glass layer may be attached to the first surface of the array of 3-D microprisms. The glass layer may be less than about 1 mm thick.
US10135030B2	Organic electroluminescent display device and method of manufacturing the same An organic electroluminescent display device including a rear substrate, an organic electroluminescent portion disposed over a surface of the rear substrate, the organic electroluminescent portion including a first electrode, an organic layer, and a second electrode in sequence, a front substrate opposing the rear substrate and coupled to the rear substrate to seal an internal space therebetween in which the organic electroluminescent portion is accommodated, thereby isolating the organic electroluminescent portion from the outside, a moisture-absorbing layer disposed over an internal surface of the front substrate, and a sealant disposed between the rear substrate and the moisture-absorbing layer to couple the front substrate and the rear substrate.
US10135024B2	Curved display device A curved display device has a plurality of layers including elements for implementing an input image, and has a neutral plane (NP), a first area positioned in any one of upper and lower sides of the NP with compressive stress applied thereto, and a second area positioned in the other of the upper and lower sides of the NP with a tensile stress applied thereto The curved display device includes at least one first curved portion; and at least one second curved portion bent in a direction different from a direction of the first curved portion. The first curved portion and the second curved portion are different in thickness, and positions of the NPs.
US10135021B2	Frit sealing using direct resistive heating An frit-sealed device comprising a resistive heating element having an electrically-closed-loop structure and process for frit-sealing a device by using such heating element. The element can be advantageously made of a metal such as Invar® and/or Kovar®. The invention enables hermetic frit sealing with low residual stress in the seal. The invention is particularly advantageous for hermetic sealing of OLED display devices.
US10135017B2	Quantum light emitting diode and quantum light emitting device including the same A quantum light emitting diode comprises a first electrode; a second electrode facing the first electrode; a light-amount enhancing layer between the first and second electrodes and having a structure guiding emitted light toward an emitting side; and an emitting material layer between the light-amount enhancing layer and the second electrode and including a quantum particle at the structure of the light-amount enhancing layer.
US10135015B1	Electrochemical clock and oscillator devices One embodiment provides an oscillator. The oscillator can include an organic electrochemical transistor, which comprises a channel and a dynamic gate. The channel can include one of: a conductive polymer, a conductive inorganic material, and a small-molecule material. An electrochemical potential of the dynamic gate can vary substantially periodically, thereby resulting in the organic electrochemical transistor having a drain current that varies substantially periodically.
US10135014B2	Display device and method of manufacturing display device Disclosed is a display device, including a first substrate having flexibility including a pixel region and a frame region around the pixel region, a pixel arranged on a first surface of the first substrate in the pixel region, and a terminal section arranged in the frame region and connected to the pixel, in which the first substrate includes an adjustment region between the pixel and the terminal section, the adjustment region having a different Young's modulus from those of the pixel region and the frame region.
US10135012B2	Display device and manufacturing method of display device A manufacturing substrate, on which a lamination is formed, is disposed on a first substrate. The lamination includes a first sheet substrate having flexibility and adhered to the first substrate, an organic layer that emits light such that brightness is controlled in each of a plurality of pixels forming an image in a display area, and a sealing layer. A light blocking area that does not overlap the display area in a plan view is formed on the first substrate, and after the first substrate is irradiated with light on a side that opposite to the sheet substrate, the first substrate is delaminated from the first sheet substrate.
US10135008B2	Organic electroluminescent materials and devices A novel Pt tetradentate complexes having Pt—O bond is disclosed. These complexes are useful as emitters in phosphorescent OLEDs.
US10135004B2	Fluorescent organic light emitting elements having high efficiency The present invention relates to organic light emitting elements, comprising thermally activated delayed fluorescence (TADF) emitters and/or hosts on basis of benzotriazoles, which have a sufficiently small energy gap between S1 and T1 (ΔEST) to enable up-conversion of the triplet exciton from T1 to S1. The organic light emitting elements show high electroluminescent efficiency.
US10135000B2	Organic electroluminescent element and electronic device An organic electroluminescence device includes an anode, a cathode, and an emitting layer, in which the emitting layer contains a first compound, a second compound, and a third compound, a singlet energy S(M1) of the first compound and a singlet energy S(M2) of the second compound satisfy a numerical formula (Numerical Formula 1) below, an electron affinity Af(M1) of the first compound and an electron affinity Af(M2) of the second compound satisfy a numerical formula (Numerical Formula 2) below, and a triplet energy T(M1) of the first compound satisfies a numerical formula (Numerical Formula 3) below, S(M2)≥S(M1)×0.95 (Numerical Formula 1) Af (M2)−Af(M1)≥0.2eV (Numerical Formula 2) T(M1)≤2.0eV (Numerical Formula 3).
US10134998B2	Light-emitting element, display device, electronic device, and lighting device A light-emitting element containing a light-emitting material with high light emission efficiency is provided. The light-emitting element includes a high molecular material and a guest material. The high molecular material includes at least a first high molecular chain and a second high molecular chain. The guest material has a function of exhibiting fluorescence or converting triplet excitation energy into light emission. The first high molecular chain and the second high molecular chain each include a first skeleton, a second skeleton, and a third skeleton, and the first skeleton and the second skeleton are bonded to each other through the third skeleton. The first high molecular chain and the second high molecular chain have a function of forming an excited complex.
US10134994B2	Polycyclic polymer comprising thiophene units, a method of producing and uses of such polymer The present invention relates to a novel polycyclic polymer comprising fused thiophene units. The present invention also relates to a method for producing such polymer as well as the use of such polymer, particularly in organoelectronic applications.
US10134993B2	Substrate for an organic light-emitting device and method for manufacturing the same Provided is a substrate for an organic light emitting diode including a base substrate, a high refractive scattering layer formed on the base substrate, and having a scattering particle scattering light in a high refractive material, and an adhesive layer formed between the base substrate and the high refractive scattering layer to laminate the base substrate with the high refractive scattering layer, wherein the high refractive scattering layer has a structure in which the scattering particle is immersed in the high refractive material, an average thickness of the high refractive scattering layer is smaller than an average diameter of the scattering particle, a surface of the high refractive scattering layer laminated with the base substrate by the adhesive layer has unevenness formed by the scattering particle, the opposite surface of the high refractive scattering layer laminated with the base substrate by the adhesive layer has a planarized surface, and a method for manufacturing the same. The substrate may have an excellent degree of planarization and improved light extraction efficiency without degradation in performance of the diode, and low process and material costs and mass-production of the substrate may be easily achieved.
US10134990B2	Multilayer heterostructures for application in OLEDs and photovoltaic devices This invention relates to a supported polymer heterostructure and methods of manufacture. The heterostructure is suitable for use in a range of applications which require semiconductor devices, including photovoltaic devices and light-emitting diodes.
US10134987B2	Access devices to correlated electron switch Subject matter disclosed herein may relate to programmable fabrics including correlated electron switch devices.
US10134982B2	Array of cross point memory cells An array of cross point memory cells comprises spaced first lines which cross spaced second lines. Two memory cells are individually between one of two immediately adjacent of the second lines and a same single one of the first lines.
US10134981B1	Free layer sidewall oxidation and spacer assisted magnetic tunnel junction (MTJ) etch for high performance magnetoresistive random access memory (MRAM) devices A magnetic tunnel junction (MTJ) that avoids electrical shorts and has improved data retention is disclosed. An uppermost capping layer has a first sidewall that is coplanar with an interface between outer oxidized portions and a center ferromagnetic portion of a free layer (FL) that has a FL width (FLW). A dielectric spacer is formed on the first sidewall and oxidized outer FL portions. The pinned layer (PL) has a width (PLW) substantially greater than FLW, and a second sidewall thereon is formed by a self-aligned etch using the dielectric spacer and capping layer as an etch mask. A sidewall layer may be formed on the second sidewall and dielectric spacer but does not degrade MTJ properties since the sidewall layer does not contact the FL and PL center portions responsible for device performance. PL width>FLW ensures greater capability for data retention especially for FLW<60 nm.
US10134978B2	Magnetic cell structures, and methods of fabrication A magnetic cell structure comprises a seed material including tantalum, platinum, and ruthenium. The seed material comprises a platinum portion overlying a tantalum portion, and a ruthenium portion overlying the platinum portion. The magnetic cell structure comprises a magnetic region overlying the seed material, an insulating material overlying the magnetic region, and another magnetic region overlying the insulating material. Semiconductor devices including the magnetic cell structure, methods of forming the magnetic cell structure and the semiconductor devices are also disclosed.
US10134976B2	Piezoelectric element, liquid discharging head provided with piezoelectric element, and liquid discharging apparatus The piezoelectric body is configured to have a layered structure such that a plurality of unit layers are stacked in a film thickness direction, and each of the unit layers is formed of a first layer on which the displacement is relatively easy to occur, and a second layer which has a high concentration of Zr as compared with the first layer. In addition, when composition ratio Ti/(Zr+Ti) of Zr to Ti in each of the first layer and the second layer is set as Cr1 and Cr2, the composition ratio of each layer is adjusted so as to satisfy the following conditions (1) to (3): 0.41≤Cr1≤0.81 (1) 0.1≤Cr1−Cr2≤0.3 (2) Cr1>Cr2 (3).
US10134973B2	Ultrasonic transducer and manufacture method thereof The present application relates to the technical field of transducer, it provides an ultrasonic transducer and the manufacture method therefore. The ultrasonic transducer comprises: a piezoelectric layer for radiating sound signal forward or backward, each side thereof being plated with an electrode; a matching layer arranged in the front of the piezoelectric layer and suitable for sending the forward sound signal; a tuning layer arranged on the back of the piezoelectric layer, wherein the piezoelectric layer is disposed between the tuning layer and the matching layer; a backing layer for absorbing the backward sound signal from the piezoelectric layer, wherein the backing layer is arranged against the piezoelectric layer on the tuning layer.
US10134971B2	Thermoelectric converter A thermoelectric converter includes a first substrate that is deformable, a second substrate that is deformable, a plurality of thermoelectric conversion elements, and a group of electrodes. The plurality of thermoelectric conversion elements are disposed between the first substrate and the second substrate. The group of electrodes electrically interconnect the plurality of thermoelectric conversion elements. The plurality of thermoelectric conversion elements are arranged in a plurality of rows. The group of electrodes include a bridge electrode disposed across a first row and a second row among the plurality of rows. The first row is adjacent to the second row. The bridge electrode has a first part whose thickness is smaller than a thickness of each of remaining electrodes other than the bridge electrode among the group of electrodes and whose surface area is larger than a surface area of each of the remaining electrodes.
US10134969B2	Vertical solid-state transducers and high voltage solid-state transducers having buried contacts and associated systems and methods Solid-state transducers (“SSTs”) and vertical high voltage SSTs having buried contacts are disclosed herein. An SST die in accordance with a particular embodiment can include a transducer structure having a first semiconductor material at a first side of the transducer structure, and a second semiconductor material at a second side of the transducer structure. The SST can further include a plurality of first contacts at the first side and electrically coupled to the first semiconductor material, and a plurality of second contacts extending from the first side to the second semiconductor material and electrically coupled to the second semiconductor material. An interconnect can be formed between at least one first contact and one second contact. The interconnects can be covered with a plurality of package materials.
US10134968B2	Solid state lighting devices with improved contacts and associated methods of manufacturing Solid state lighting (“SSL”) devices with improved contacts and associated methods of manufacturing are disclosed herein. In one embodiment, an SSL device includes an SSL structure having a first semiconductor material, a second semiconductor material spaced apart from the first semiconductor material, and an active region between the first and second semiconductor materials. The SSL device also includes a first contact on the first semiconductor material and a second contact on the second semiconductor material, where the first and second contacts define the current flow path through the SSL structure. The first or second contact is configured to provide a current density profile in the SSL structure based on a target current density profile.
US10134967B2	Light emitting device A light-emitting device includes first and second lead frames spaced apart from each other, the first and second lead frames each including a top surface, an opposing bottom surface, and sidewalls arranged between the top surface and the bottom surface thereof, in which at least one of the first and second lead frames include three inset sidewalls that at least partially define a fixing space, the fixing space undercutting at least one of the first lead frame and second lead frame, a light-emitting diode chip disposed on the top surface of the first or second lead frame, and the top surfaces of the first and second lead frames are substantially flat.
US10134964B2	Passivation for a semiconductor light emitting device In embodiments of the invention, a passivation layer is disposed over a side of a semiconductor structure including a light emitting layer disposed between an n-type region and a p-type region. A material configured to adhere to an underfill is disposed over an etched surface of the semiconductor structure.
US10134959B2	Light emitting device excellent in color rendering property for emitting light closer to sunlight A light emitting device includes a first phosphor emitting a fluorescence having a peak emission wavelength of not less than 445 nm and not more than 490 nm, a second phosphor emitting a fluorescence having a peak emission wavelength of not less than 491 nm and not more than 600 nm, a third phosphor emitting a fluorescence having a peak emission wavelength of not less than 601 nm and not more than 670 nm, and a light emitting element that emits a light having a peak emission wavelength at a shorter wavelength side than the peak emission wavelength of the first phosphor. 0.586≤x≤0.734, 0.017≤y≤0.081, 0.239≤z≤0.384 and x+y+z=1 are satisfied, where x, y, z are defined as mass ratios of the first, second and third phosphors, respectively, to a total mass of the first, second and third phosphors.
US10134957B2	Surface-mountable optoelectronic semiconductor component with conductive connection on housing body A surface-mountable optoelectronic semiconductor component is specified. The surface-mountable optoelectronic semiconductor component includes an optoelectronic semiconductor chip, a radiation-transmissive growth substrate, a housing body and an electrically conductive connection. The housing body is arranged at least in places between a side surface of the growth substrate and the electrically conductive connection. The housing body completely covers all of the side surfaces of the growth substrate, and the housing body has, on a surface facing away from the side surface of the growth substrate, traces of material removal or traces of a form tool.
US10134943B2	Semiconductor chip, method for producing a plurality of semiconductor chips and method for producing an electronic or optoelectronic device and electronic or optoelectronic device A method for producing a multiplicity of semiconductor chips (13) is provided, comprising the following steps: —providing a wafer (1) comprising a multiplicity of semiconductor bodies (2), wherein separating lines (9) are arranged between the semiconductor bodies (2), —depositing a contact layer (10) on the wafer (1), wherein the material of the contact layer (10) is chosen from the following group: platinum, rhodium, palladium, gold, and the contact layer (10) has a thickness of between 8 nanometers and 250 nanometers, inclusive, —applying the wafer (1) to a film (11), —at least partially severing the wafer (1) in the vertical direction along the separating lines (9) or introducing fracture nuclei (12) into the wafer (1) along the separating lines (9), and —breaking the wafer (1) along the separating lines (9) or expanding the film (11) such that a spatial separation of the semiconductor chips (13) takes place, wherein the contact layer (10) is also separated. A semiconductor chip, a component and a method for producing the latter are also provided.
US10134941B2	Method for manufacturing solar cell including a patterned dopant layer A method for manufacturing a solar cell is disclosed. The disclosed method includes conductive region formation of forming a first-conduction-type region at one surface of a semiconductor substrate and a second-conduction-type region at another surface of the semiconductor substrate, and electrode formation of forming a first electrode connected to the first-conduction-type region and a second electrode connected to the second-conduction-type region. In the conductive region formation, the first-conduction-type region is formed by forming a dopant layer containing a first-conduction-type dopant over the one surface of the semiconductor substrate, and heat-treating the dopant layer, and the second-conduction-type region is formed by ion-implanting a second-conduction-type dopant into the semiconductor substrate at the another surface of the semiconductor substrate.
US10134936B2	APD focal plane arrays with backside vias An avalanche photodiode (APD) array with reduced cross talk comprises, in the illustrative embodiment, a 2D array of Geiger-mode APDs, wherein a via is formed through the backside (substrate) of each APD in the array.
US10134935B2	Photoelectric conversion apparatus and photoelectric conversion unit used in photoelectric conversion apparatus In an embodiment, photoelectric conversion units (10) each include a package (12) accommodating a photoelectric conversion device (11). The package (12) has a front surface (12a) having a window (13); and a side surface (12c). The package (12) includes a first coupling portion (14) protruding from the side surface (12c) in a first direction X parallel to a light incident surface (11a) of the photoelectric conversion device (11), and a second coupling portion (15) recessed from the side surface (12c) in the first direction X. The first coupling portion (14) includes a first terminal (16) electrically connected with the photoelectric conversion device (11), and the second coupling portion (15) includes a second terminal (17) electrically connected with the photoelectric conversion device (11). The first coupling portion (14) and the second coupling portion (15) have shapes and sizes matching each other, and are coupled with each other by fitting.
US10134930B2	Solar cell having three-dimensional P-N junction structure and method for manufacturing same The present invention provides a 3-dimensional P-N junction solar cell composed of a base board coated with a back plate on the upper face of the same; a P type semiconductor thin film formed on the top side of the back plate which has a 3-dimensional porous structure and is composed of P type semiconductor crystal grains; a N type buffer layer formed on the surface of the crystal grains of the said P type semiconductor thin film with playing a role of coating the thin film; and a transparent electrode formed on the surface of the crystal grains of the P type semiconductor thin film on which the N type buffer layer is formed. The solar cell of the present invention is a P-N junction solar cell including a 3-dimensional photo catalytic thin film, which can provide an improved photoelectric conversion efficiency, compared with the conventional P-N junction solar cell, owing to the formation of the N-type buffer layer on the surface of the crystal grains of the 3-dimensional P type semiconductor thin film.
US10134929B2	Achieving band gap grading of CZTS and CZTSe materials Techniques for achieving band gap grading in CZTS/Se absorber materials are provided. In one aspect, a method for creating band gap grading in a CZTS/Se absorber layer includes the steps of: providing a reservoir material containing Si or Ge; forming the CZTS/Se absorber layer on the reservoir material; and annealing the reservoir material and the CZTS/Se absorber layer under conditions sufficient to diffuse Si or Ge atoms from the reservoir material into the CZTS/Se absorber layer with a concentration gradient to create band gap grading in the CZTS/Se absorber layer. A photovoltaic device and method of forming the photovoltaic device are also provided.
US10134927B2	Reliable electrical contacts for high power photoconductive switches A photoconductive switch consisting of an optically actuated photoconductive material, e.g. a wide bandgap semiconductor such as SiC, situated between opposing electrodes. The electrodes are created using various methods in order to maximize reliability by reducing resistive heating, current concentrations and filamentation, and heating and ablation due to the light source. This is primarily accomplished by the configuration of the electrical contact geometry, choice of contacts metals, annealing, ion implantation, creation of recesses within the SiC, and the use of coatings to act as encapsulants and anti-reflective layers.
US10134926B2	Quantum-efficiency-enhanced time-of-flight detector A time-of-flight detector includes a semiconductor layer and a light modulation structure. The semiconductor layer is configured to translate light radiation into electrical charge. The light modulation structure is configured to increase a path of interaction of light radiation through the semiconductor layer. In some example implementations, the light modulation structure is configured to deflect at least some light radiation at an increased angle through the semiconductor layer. In some example implementations, the light modulation structure is configured to reflect light radiation more than once through the semiconductor layer.
US10134924B2	Screen-printing system for a photovoltaic cell, and related methods Screen-printing system comprising a metal stencil (12), and a cloth (15) fixed to the entire periphery of said metal stencil (12) to form a trampoline assembly, characterized in that the cloth (15) fixed to the metal stencil (12) has at least one free end, in order to decrease or prevent deformation under the effect of a doctor blade (20).
US10134923B1	Photovoltaic devices including bi-layer pixels having reflective and/or antireflective properties PV devices including bi-layer pixels having reflective and/or antireflective properties, and methods for manufacturing PV devices including bi-layer pixels having reflective and/or antireflective properties. In some embodiments, each bi-layer pixel includes a first layer with reflective properties, and a second layer with antireflective properties.
US10134922B2	Window structure, method of manufacturing the same, electronic device equipped with a camera including a window structure and method of manufacturing the same A window structure includes a window, a design layer structure on the window, a light shield layer on the design layer structure, and a light absorption layer. The design layer structure includes a first hole exposing a portion of the window. The light shield layer includes a second hole in fluid communication with the first hole. The light absorption layer covers at least a portion of the design layer structure exposed by the first and second holes, and includes a third hole exposing a portion of the window. By including the light absorption layer of a gray or black color to cover exposed portions of the design layer structure, a vignette about an image caused by the design layer structure is prevented.
US10134917B2	Tight pitch vertical transistor EEPROM A memory device including a first conductivity type vertically orientated semiconductor device in a first region of a substrate and a second conductivity type vertically orientated semiconductor device in a second region of the substrate. A common floating gate structure in simultaneous electrical communication with a first fin structure of the first conductivity type vertically orientated semiconductor device and a second fin structure of the second conductivity type vertically orientated semiconductor device.
US10134916B2	Transistor devices, memory cells, and arrays of memory cells A transistor device includes a pair of source/drain regions having a channel region there-between. A first gate is proximate the channel region. A gate dielectric is between the first gate and the channel region. A second gate is proximate the channel region. A programmable material is between the second gate and the channel region. The programmable material includes at least one of a) a multivalent metal oxide portion and an oxygen-containing dielectric portion, or b) a multivalent metal nitride portion and a nitrogen-containing dielectric portion. Memory cells and arrays of memory cells are disclosed.
US10134913B2	Method of manufacturing amorphous IGZO TFT-based transient semiconductor Disclosed is a method of manufacturing an a-IGZO TFT-based transient semiconductor. The method includes (a) stacking a thermal oxide layer on a silicon substrate and depositing a nickel thin layer; (b) forming a PECVD layer on the nickel thin layer; (c) patterning the PECVD layer after setting a gate area and depositing a metallic layer; (d) lifting off the metallic layer to form a gage metallic thin layer and depositing a gage insulating layer on the gate metallic thin layer; (e) depositing an a-IGZO layer on the gate insulating layer; (f) etching an active area and the gate insulating layer; (g) forming a source electrode and a drain electrode and attaching a thermal release tape on the source electrode and the drain electrode; (h) delaminating the nickel thin layer; (i) performing transcription on a polyvinyl alcohol thin layer after etching the nickel thin layer; and (j) detaching the tape.
US10134912B2	Display device and electronic device A display device including a pixel having a memory. The pixel includes at least a display element, a capacitor, an inverter, and a switch. The switch is controlled with a signal held in the capacitor and a signal output from the inverter so that voltage is supplied to the display element. The inverter and the switch can be constituted by transistors with the same polarity. A semiconductor layer included in the pixel may be formed using a light-transmitting material. Moreover, a gate electrode, a drain electrode, and a capacitor electrode may be formed using a light-transmitting conductive layer. The pixel is formed using a light-transmitting material in such a manner, whereby the display device can be a transmissive display device while including a pixel having a memory.
US10134907B2	Low temperature polysilicon array substrate and method for manufacturing the same Disclosed is a low temperature polysilicon array substrate and its manufacturing method. The method includes: forming a light-shielding layer, a buffer layer and U-type polysilicon patterns successively on a glass substrate; doping channels of the U-type polysilicon patterns in the active area and then heavily N+ doping these U-type polysilicon patterns; forming a gate insulation layer and etching first via holes; forming a gate line, a source and lightly-doped regions of the N-type double-gate transistor; and heavily P+ doping U-type polysilicon patterns in the non-active area.
US10134906B2	Display device According to one embodiment, a display device includes a first light shielding layer, a second light shielding layer, a first semiconductor layer, a second semiconductor layer, a gate line, a first source line, a second source line, a switching element, and a pixel electrode, wherein an area in which the first light shielding layer and the pixel electrode are opposed to each other and an area in which the second light shielding layer and the pixel electrode are opposed to each other are equal in size.
US10134905B2	Semiconductor device including wrap around contact, and method of forming the semiconductor device A method of forming a wrap around contact, includes forming a plurality of semiconductor layers on a plurality of fin structures, forming a sacrificial gate on the plurality of semiconductor layers, forming an epitaxial layer on the plurality of fin structures and on a sidewall of the plurality of semiconductor layers, forming a gate structure by replacing the sacrificial gate and the plurality of semiconductor layers with a metal layer, and forming a wrap around contact on the epitaxial layer.
US10134904B2	Semiconductor device having a flexible substrate and a crack-preventing semiconductor layer Provided is a flexible device with fewer defects caused by a crack or a flexible device having high productivity. A semiconductor device including: a display portion over a flexible substrate, including a transistor and a display element; a semiconductor layer surrounding the display portion; and an insulating layer over the transistor and the semiconductor layer. When seen in a direction perpendicular to a surface of the flexible substrate, an end portion of the substrate is substantially aligned with an end portion of the semiconductor layer, and an end portion of the insulating layer is positioned over the semiconductor layer.
US10134898B2	High dose implantation for ultrathin semiconductor-on-insulator substrates Methods and structures for forming highly-doped, ultrathin layers for transistors formed in semiconductor-on-insulator substrates are described. High dopant concentrations may be achieved in ultrathin semiconductor layers to improve device characteristics. Ion implantation at elevated temperatures may mitigate defect formation for stoichiometric dopant concentrations up to about 30%. In-plane stressors may be formed adjacent to channels of transistors formed in ultrathin semiconductor layers.
US10134891B2	Transistor device with threshold voltage adjusted by body effect A transistor device including a substrate, a gate structure, a first doped region, a second doped region and a body region is provided. The gate structure is disposed on the substrate. The first doped region and the second doped region are respectively disposed in the substrate at one side and another side of the gate structure. The first doped region and the second doped region have a first conductive type. The body region is disposed in the substrate at one side of the first doped region away from the gate structure. The body region has a second conductive type. The body region and the first doped region are separated by a distance, and no isolation structure exists between the body region and the first doped region.
US10134890B2	Termination region architecture for vertical power transistors A vertical power switching device, such as a vertical superjunction metal-oxide-semiconductor field-effect-transistor (MOSFET), in which termination structures in the corners of the integrated circuit are stretched to efficiently shape the lateral electric field. Termination structures in the device include such features as doped regions, field plates, insulator films, and high-voltage conductive regions and elements at the applied substrate voltage. Edges of these termination structures are shaped and placed according to a 2nd-order smooth, non-circular analytic function so as to extend deeper into the die corner from the core region of the device than a constant-distance path. Also disclosed are electrically floating guard rings in the termination region, to inhibit triggering of parasitic p-n-p-n structures.
US10134886B2	Insulated gate bipolar device and manufacturing method thereof In one embodiment, an IGBT is formed to include a region of semiconductor material. Insulated gate structures are disposed in region of semiconductor material extending from a first major surface. An n-type field stop region extends from a second major surface into the region of semiconductor material. A p+ type polycrystalline semiconductor layer is disposed adjacent to the field stop region and provides an emitter region for the IGBT. An embodiment may include a portion of the p+ type polycrystalline semiconductor being doped n-type.
US10134885B2	Semiconductor device having an active trench and a body trench A semiconductor substrate having a first main surface and a transistor cell includes a drift region, a body region between the drift region and the first main surface, an active trench at the first main surface extending into the drift region, a gate insulating layer at sidewalls and a bottom side of the active trench, a gate conductive layer in the active trench, a source region in the body region, and adjacent to the active trench, a body trench at the first main surface extending into the drift region, the body trench being adjacent to the body region and to the drift region, an insulating layer at sidewalls and at a bottom side of the body trench, the insulating layer being asymmetric with respect to an axis extending perpendicular to the first main surface at a center of the body trench, and a conductive layer in the body trench.
US10134883B2	Electronic device using group III nitride semiconductor and its fabrication method The present invention discloses an electronic device formed of a group III nitride. In one embodiment, a substrate is fabricated by the ammonothermal method and a drift layer is fabricated by hydride vapor phase epitaxy. After etching a trench, p-type contact pads are made by pulsed laser deposition followed by n-type contact pads by pulsed laser deposition. The bandgap of the p-type contact pad is designed larger than that of the drift layer. Upon forward bias between p-type contact pads (gate) and n-type contact pads (source), holes and electrons are injected into the drift layer from the p-type contact pads and n-type contact pads. Injected electrons drift to the backside of the substrate (drain).
US10134871B2	Doping of high-K dielectric oxide by wet chemical treatment A method for fabricating a semiconductor device includes forming a first high-k (HK) dielectric layer over a substrate, performing a wet treatment process to the first HK dielectric layer. The wet treatment includes a dopant. The method also includes performing an annealing process to the first HK dielectric layer such that the dopant diffuses into the first HK dielectric layer to form a modified HK dielectric layer. Therefore the modified HK dielectric layer has a second dielectric constant which is different than the first dielectric constant.
US10134870B2	Semiconductor structure and method of manufacturing the same A semiconductor structure includes a substrate, a fin, a bottom capping structure and a top capping structure. The fin disposed on the substrate, the fin has a lower portion and an upper portion extending upwards from the lower portion. The bottom capping structure covers a sidewall of the lower portion of the fin. The top capping structure covers a sidewall of the upper portion of the fin.
US10134865B2	One-dimensional nanostructure growth on graphene and devices thereof A method and structure for providing a GAA device. In some embodiments, a substrate including an insulating layer disposed thereon is provided. By way of example, a first metal portion is formed within the insulating layer. In various embodiments, a first lateral surface of the first metal portion is exposed. After exposure of the first lateral surface of the first metal portion, a first graphene layer is formed on the exposed first lateral surface. In some embodiments, the first graphene layer defines a first vertical plane parallel to the exposed first lateral surface. Thereafter, in some embodiments, a first nanobar is formed on the first graphene layer, where the first nanobar extends in a first direction normal to the first vertical plane defined by the first graphene layer.
US10134863B2	Vertical semiconductor device structure and method of forming Vertical gate all-around (VGAA) structures are described. In an embodiment, a structure including a first doped region in a substrate, a first vertical channel extending from the first doped region, a first metal-semiconductor compound region in a top surface of the first doped region, the first metal-semiconductor compound region extending along at least two sides of the first vertical channel, and a first gate electrode around the first vertical channel.
US10134856B2	Semiconductor device including contact plug and method of manufacturing the same A semiconductor device includes an active fin partially protruding from an isolation pattern on a substrate, a gate structure on the active fin, a source/drain layer on a portion of the active fin adjacent to the gate structure, a source/drain layer on a portion of the active fin adjacent to the gate structure, a metal silicide pattern on the source/drain layer, and a plug on the metal silicide pattern. The plug includes a second metal pattern, a metal nitride pattern contacting an upper surface of the metal silicide pattern and covering a bottom and a sidewall of the second metal pattern, and a first metal pattern on the metal silicide pattern, the first metal pattern covering an outer sidewall of the metal nitride pattern. A nitrogen concentration of the first metal pattern gradually decreases according to a distance from the outer sidewall of the metal nitride pattern.
US10134851B2	Tunnel barrier schottky A diode includes: a semiconductor substrate; a cathode metal layer contacting a bottom of the substrate; a semiconductor drift layer on the substrate; a graded aluminum gallium nitride (AlGaN) semiconductor barrier layer on the drift layer and having a larger bandgap than the drift layer, the barrier layer having a top surface and a bottom surface between the drift layer and the top surface, the barrier layer having an increasing aluminum composition from the bottom surface to the top surface; and an anode metal layer directly contacting the top surface of the barrier layer.
US10134849B2	Semiconductor device and manufacturing method thereof The present disclosure relates to the technical field of semiconductor technologies and discloses a semiconductor device and a manufacturing method therefor. The method includes forming a growth substrate by providing a substrate structure containing a sacrificial substrate, a first dielectric layer on the sacrificial substrate, and a plurality of recesses formed through the first dielectric layer and into the sacrificial substrate, by forming a buffer layer covering exposes surfaces of the plurality of recesses, by selectively growing a graphene layer on the buffer layer, and by filling the plurality of recesses with a second dielectric layer. The method further includes attaching the growth substrate to a bonding substrate such that the second dielectric layer attaches to the bonding substrate; removing the sacrificial substrate; and removing the buffer layer so as to expose the graphene layer. The method of present disclosure avoids adverse effects from patterning graphene by using selective growth of graphene on a patterned buffer layer.
US10134842B2	Heterojunction bipolar transistor A high-performance HBT that is unlikely to decrease the process controllability and to increase the manufacturing cost is implemented. A heterojunction bipolar transistor includes an emitter layer, a base layer, and a collector layer on a GaAs substrate. The emitter layer is formed of InGaP. The base layer is formed of GaAsPBi having a composition that substantially lattice-matches GaAs.
US10134840B2	Series resistance reduction in vertically stacked silicon nanowire transistors Embodiments are directed to a method of fabricating a portion of a nanowire field effect transistor (FET). The method includes forming a sacrificial layer and a nanowire layer, removing a sidewall portion of the sacrificial layer and forming a diffusion block in a space that was occupied by the removed sidewall portion of the sacrificial layer. The method further includes forming a source region and a drain region such that the diffusion block is between the sacrificial layer and at least one of the source region and the drain region, and removing the sacrificial layer using a sacrificial layer removal process, wherein the diffusion block prevents the sacrificial layer removal process from also removing portions of at least one of the source region and the drain region.
US10134838B2	Semiconductor device A semiconductor device includes a substrate that includes active patterns extending in a second direction, a third device isolation layer disposed on an upper portion of the substrate that includes a PMOSFET region and an NMOSFET region, and a gate electrode that extends across the active patterns in a first direction that crosses the second direction. The active patterns extend across the PMOSFET region and the NMOSFET region. The third device isolation layer lies between the PMOSFET region and the NMOSFET region. The third device isolation layer comprises a first part that extends in the second direction and a second part that extends in a third direction that crosses the first and second directions. The second part has opposite sidewalls parallel to the third direction, in a plan view.
US10134833B2	Multiple work function device using GeOx/TiN cap on work function setting metal A method is presented for tuning work functions of transistors. The method includes forming a work function stack over a semiconductor substrate, depositing a germanium oxide layer and a barrier layer over the work function stack, and annealing the germanium oxide layer to desorb oxygen therefrom to trigger oxidation of at least one conducting layer of the work function stack. The work function stack includes three layers, that is, a first layer being a TiN layer, a second layer being a titanium aluminum carbon (TiAlC) layer, and a third layer being a second TiN layer.
US10134831B2	Deformable and flexible capacitor A method for forming a capacitive device comprises forming a first dielectric layer on a substrate. Portions of the first dielectric layer are removed to for form a cavity in the first dielectric layer. A first layer of conductive material is deposited on the first dielectric layer and conformally along sidewalls of the cavity. The method further includes depositing a second dielectric layer on the first layer of conductive material, and depositing a second layer of conductive material on the second dielectric layer to form a capacitive device.
US10134829B2	Display device A display device includes a non-display area adjacent a display area, a thin film transistor, a display element, a thin film encapsulation layer, an organic insulating layer, a power voltage line, and a protective layer. The thin film transistor is on the display area and is connected to the display element. The thin film encapsulation layer covers the display element. The organic insulating layer is between the thin film transistor and display element and extends to the non-display area. The organic insulating layer includes a central portion corresponding to the display area, an outer portion surrounding the central portion, and a division region dividing the central portion and the outer portion and surrounding the display area. The power voltage line is in the non-display area and includes a portion corresponding to the division region. The protective layer covers an upper surface of the power voltage line in the division region.
US10134827B2	Display apparatus having reduced defects Provided is a display apparatus capable of reducing generation of defects during manufacturing of the display apparatus or while in use after being manufactured. The display apparatus includes a substrate including a bending area between a first area and a second area, the substrate being bent in the bending area about a bending axis; an inorganic insulating layer over the substrate and including a first feature that is either a first opening or a first groove, the first feature positioned to correspond to the bending area; and an organic material layer at least partially filling the first feature, and including a second feature that is a second opening or a second groove, the second feature extending along an edge of the substrate.
US10134826B2	Display apparatus including detour lines A display apparatus includes a substrate including a display area, a peripheral area surrounding the display area, a function-adding area, of which at least a portion is surrounded by the display area, and a detour area disposed between the display area and the function-adding area. The display apparatus includes a plurality of pixel circuits disposed in the display area. A plurality of driving lines are electrically connected to the pixel circuits and extend in a direction in the display area. A first detour line is disposed in the detour area and is electrically connected to a first driving line. A second detour line is disposed in the detour area. The second detour line is electrically connected to a second driving line and is disposed in a different layer from the first detour line.
US10134825B2	Organic light emitting diode display A display device including a substrate comprising a free form active area having pixels defined by scan lines, data lines, and power supply lines, and a bezel area located outside the active area and having power supply routing lines to which a power supply voltage is applied and scan routing lines to which scan pulses are applied; and link lines that are disposed in the bezel area, and that connect the power supply routing lines to the power supply lines and transmit the power supply voltage from the power supply routing lines to the power supply lines, the link lines comprising: a plurality of first link lines; and one or more second link lines that interconnect the first link lines, each of the first link lines comprising one end connected to the power supply routing lines and the other end connected to the power supply lines.
US10134824B2	Organic light-emitting pixel including four sub-pixels having adjusted microcavity distances The present disclosure provides an organic light-emitting pixel with four subpixels formed in two groups, each group having two adjacent subpixels. The organic light-emitting pixel includes a first electrode layer formed on a substrate, including a plurality of first electrodes, each first electrode corresponding to one of the subpixels; a second electrode layer; and a first functional layer corresponding to three of the four subpixels. The first function layer is configured to adjust a distance between a first electrode and the second electrode layer. The organic light-emitting pixel also includes a light-emitting layer including a first portion and a second portion, the first portion corresponding to one of the two groups of subpixels and the second portion corresponding to another one of the two groups of subpixels, respectively.
US10134821B2	TFT substrate, organic light-emitting diode (OLED) display including the same, method of manufacturing TFT substrate, and method of manufacturing OLED display A thin film transistor (TFT) substrate having reduced differences in heights in areas thereof so as to facilitate subsequent processing is disclosed. In one aspect, the TFT substrate includes a substrate having a first area in which a TFT is not disposed and a second area in which a TFT is disposed, a height adjustment layer disposed on the substrate in an area corresponding to at least a part of the first area. The TFT substrate also includes a TFT disposed on the substrate in an area corresponding to the second area.
US10134818B2	Shift register circuit, display panel, and electronic apparatus Disclosed herein is a shift register circuit that is formed on an insulating substrate with thin film transistors having channels of the same conductivity type and includes shift stages, each of the shift stages including: a first thin film transistor; a second thin film transistor; a 3(1)-th thin film transistor; a 3(2)-th thin film transistor; a 4(1)-th thin film transistor; a 4(2)-th thin film transistor; a fifth thin film transistor; and a sixth thin film transistor.
US10134817B2	OLED display panel, display device and display system An OLED display panel, a display device, and a display system. The OLED display panel comprises a base plate, first OLED display elements arranged in an array on a side of the base plate, and a first photochromic layer arranged on a side of the first OLED display elements. The first photochromic layer comprises first stripe shaped photochromic bodies and first stripe shaped openings arranged periodically and alternately, and is switchable between a transparent state and an opaque state. When the first photochromic layer stays in the opaque state, the first photochromic layer enables the OLED display panel to realize 3D display on the side where the first photochromic layer is arranged. 2D and 3D display modes are realized on a side of the display panel, which improves user experience and has a low cost.
US10134815B2	Method and apparatus for detecting infrared radiation with gain Photodetectors, methods of fabricating the same, and methods using the same to detect radiation are described. A photodetector can include a first electrode, a light sensitizing layer, an electron blocking/tunneling layer, and a second electrode. Infrared-to-visible upconversion devices, methods of fabricating the same, and methods using the same to detect radiation are also described. An Infrared-to-visible upconversion device can include a photodetector and an OLED coupled to the photodetector.
US10134811B2	Image sensors having light guide members Image sensors include a color photo-sensing photoelectric conversion device, a first color filter and a second color filter disposed under the color photo-sensing photoelectric conversion device, a first photodiode and a second photodiode disposed under the first color filter and the second color filter, respectively, a first light guide member disposed between the first color filter and the first photodiode, and a second light guide member disposed between the second color filter and the second photodiode.
US10134808B2	Magnetic tunnel junction (MTJ) devices with heterogeneous free layer structure, particularly suited for spin-torque-transfer (STT) magnetic random access memory (MRAM) (STT MRAM) Magnetic tunnel junction (MTJ) devices with a heterogeneous free layer structure particularly suited for efficient spin-torque-transfer (STT) magnetic random access memory (MRAM) (STT MRAM) are disclosed. In one aspect, a MTJ structure with a reduced thickness first pinned layer section provided below a first tunnel magneto-resistance (TMR) barrier layer is provided. The first pinned layer section includes one pinned layer magnetized in one magnetic orientation. In another aspect, a second pinned layer section and a second TMR barrier layer are provided above a free layer section and above the first TMR barrier layer in the MTJ. The second pinned layer is magnetized in a magnetic orientation that is anti-parallel (AP) to that of the first pinned layer section. In yet another aspect, the free layer comprises first and second heterogeneous layers separated by an anti-ferromagnetic coupling spacer, the first and second heterogeneous layers differing in their magnetic anisotropy.
US10134806B2	Semiconductor light emitting device A semiconductor light emitting device includes first and second light emitting bodies, a first electrode, a second electrode and a first interconnection. The first and second light emitting bodies are disposed on a conductive substrate, and each includes first and second semiconductor layers and a light emitting layer therebetween. The first electrode is provided between the first light emitting body and the conductive substrate, and electrically connected to a first semiconductor layer and the conductive substrate. The second electrode is provided between the second light emitting body and the conductive substrate, and electrically connected to a first semiconductor layer. The first interconnection electrically connects the second semiconductor layer of the first light emitting body and the second electrode. The first interconnection includes a first portion extending over the first and second light emitting bodies and a second portion extending into the second light emitting body.
US10134805B2	Light emitting structure and mount In a method according to embodiments of the invention, a light emitting structure comprising a plurality of light emitting diodes (LEDs) is provided. Each LED includes a p-contact and n-contact. A first mount and a second mount are provided. Each mount includes anode pads and cathode pads. The anode pads are aligned with the p-contacts and the cathode pads are aligned with the n-contacts. The method further includes mounting the light emitting structure on one of the first and second mounts. An electrical connection on the first mount between the plurality of LEDs differs from an electrical connection on the second mount between the plurality of LEDs. The first mount is operated at a different voltage than the second mount.
US10134804B2	Method of forming a light-emitting device A method of forming a light-emitting device. The light-emitting device includes a first optoelectronic unit, a second optoelectronic unit, a fence, and a cover. The first optoelectronic unit has a first side surface. The second optoelectronic unit is apart from the first optoelectronic unit and has a second side surface. The fence surrounds the first side surface and the second side surface. The cover is on the first optoelectronic unit and the fence.
US10134803B2	Micro device integration into system substrate Post-processing steps for integrating of micro devices into system (receiver) substrate or improving the performance of the micro devices after transfer. Post processing steps for additional structures such as reflective layers, fillers, black matrix or other layers may be used to improve the out coupling or confining of the generated LED light. Dielectric and metallic layers may be used to integrate an electro-optical thin film device into the system substrate with transferred micro devices. Color conversion layers may be integrated into the system substrate to create different outputs from the micro devices.
US10134802B2	Nanophosphors-converted quantum photonic imagers and methods for making the same An emissive Solid State Imager (SSI) comprised of a spatial array of digitally addressable multicolor micro pixels. Each pixel is a micro optical cavity comprising multiple photonic layers of blue-violet semiconductor light emitting diode. One of the photonic layers is used to generate light at the blue primary of the SSI. Two of the photonic layers are used to generate violet-blue excitation light which is converted with associated nanophosphors layer into the green and the red primaries of the SSI. The light generated is emitted perpendicular to the plane of the imager device via a plurality of vertical optical waveguides that extract and collimate the light generated. Each pixel diode is individually addressable to enable the pixel to simultaneously emit any combination of the colors associated with its multicolor nanophosphors converted semiconductor light emitting diode at any required on/off duty cycle for each color.
US10134797B2	Solid-state image sensor, imaging device, and electronic equipment The present technology relates to a solid-state image sensor, an imaging device, and electronic equipment configured such that an FD is shared by a plurality of pixels to further miniaturize the pixels at low cost without lowering of sensitivity and a conversion efficiency. In a configuration in which a plurality of pixels are arranged with respect to at least either of one of the OCCFs or one of the OCLs, a floating diffusion (FD) is shared by a sharing unit including a plurality of pixels, the plurality of pixels including pixels of at least either of different OCCFs or different OCLs. The present technology is applicable to a CMOS image sensor.
US10134796B2	Semiconductor device and manufacturing method thereof An improvement is achieved in the performance of a semiconductor device. A semiconductor device includes an n−-type semiconductor region formed in a p-type well, an n-type semiconductor region formed closer to a main surface of a semiconductor substrate than the n−-type semiconductor region, and a p−-type semiconductor region formed between the n−-type semiconductor region and the n-type semiconductor region. A net impurity concentration in the n−-type semiconductor region is lower than a net impurity concentration in the n-type semiconductor region. A net impurity concentration in the p−-type semiconductor region is lower than a net impurity concentration in the p-type well.
US10134794B2	Image sensor chip sidewall interconnection An image sensor chip having a sidewall interconnect structure to bond and/or electrically couple the image sensor chip to a package substrate is provided. The image sensor chip includes a substrate supporting an integrated circuit (IC) configured to sense incident light. The sidewall interconnect structure is arranged along a sidewall of the substrate and electrically coupled with the IC. A method for manufacturing the image sensor chip and an image sensor package including the image sensor chip are also provided.
US10134793B1	Method of forming two-dimensional and three-dimensional semiconductor chip arrays A sensor chip formed from a plurality of sensor chips fabricated on a wafer, the wafer including a top surface, a bottom surface opposite the top surface and a thickness between the top and bottom surfaces, the sensor chip including an active area formed on the top surface, a first sacrificial edge including a first fiducial and a second fiducial, and a first score line formed in a first portion of the thickness on the top surface between the first sacrificial edge and the active area.
US10134791B1	Backside illumination global shutter sensor and pixel thereof A backside illumination global shutter pixel is disposed in a substrate having a first surface and a second surface and includes an isolation structure having a deep trench isolation pattern, a storage node, and a photoelectric conversion element. The deep trench isolation pattern has a channel and defines a first region and a second region connected with each other by the channel. The storage node is disposed in the second region. The photoelectric conversion element has a main photoelectric conversion portion disposed in the first region and an extending photoelectric conversion portion extended from the main photoelectric conversion portion through the channel to the second region. The extending photoelectric conversion portion is disposed between the second surface and the storage node. A backside illumination global shutter sensor including a plurality of backside illumination global shutter pixels is also provided.
US10134789B2	Imaging device and electronic device An imaging device with high productivity and improved dynamic range is provided. The imaging device includes a pixel driver circuit and a photoelectric conversion element including a p-type semiconductor, an n-type semiconductor, and an i-type semiconductor. In a plan view, the total area of a part of the i-type semiconductor overlapped with neither a metal material nor a semiconductor material constituting the pixel driver circuit is preferably greater than or equal to 65%, more preferably greater than or equal to 80%, and still more preferably greater than or equal to 90% of the area of the whole i-type semiconductor. Plural photoelectric conversion elements are provided in the same semiconductor, whereby a process for separating the photoelectric conversion elements can be omitted. The i-type semiconductors in the plural photoelectric conversion elements are separated from each other by the p-type semiconductor or the n-type semiconductor.
US10134787B2	Photographing apparatus for preventing light leakage and image sensor thereof A photographing apparatus for preventing or reducing light leakage and an image sensor thereof are provided. The photographing apparatus includes an image sensor configured to include a plurality of pixels respectively having a Photo Diode and a Storage Diode for temporarily storing a charge accumulated in the Photo Diode and an image processor configured to perform an image processing operation by receiving the charge stored in the Storage Diode of each of the plurality of pixels. In addition, the image sensor has a structure where the Storage Diodes of the plurality of pixels are arrayed to be adjacent to each other. Accordingly, the photographing apparatus may prevent the light leakage from the adjacent pixel being flowed into a Storage Diode of each pixel.
US10134783B2	Blue phase liquid crystal display panel and method for manufacturing the same A blue phase liquid crystal display panel and a method for manufacturing the same are disclosed. The blue phase liquid crystal display panel comprises a lower substrate and an upper substrate. A horizontal electric field between the two substrates can be strengthened while a vertical electric field between the two substrates can be weakened through arranging a pixel electrode and a common electrode on the upper substrate and the lower substrate as well as a first fringe electric field and a second fringe electric field generated therein respectively, so that a driving voltage of the blue phase liquid crystal can be reduced.
US10134780B2	Display device and manufacturing method thereof According to one embodiment, a display device includes a first substrate including a first insulative substrate, an outer peripheral wiring formed above the first insulative substrate, an insulation film disposed on the outer peripheral wiring, a pixel electrode formed on the insulation film in an active area for displaying an image, and a first bank formed in a line shape on the insulation film in a peripheral area surrounding the active area, a second substrate including at least a second insulative substrate, and a sealant which is provided in a manner to envelop the first bank, and which attaches the first substrate and the second substrate.
US10134777B2	Thin film transistor substrate and display device including the same Disclosed is a thin film transistor substrate capable of preventing a circuit from being damaged by static electricity, and a display device including the same, wherein the thin film transistor substrate includes a substrate having a display area for displaying an image, and a non-display area. The circuit is disposed in the non-display area. The circuit includes a first electrode, an insulating film on the first electrode, and a second electrode on the insulating film. An edge of the first electrode facing the display area extends beyond an edge of the second electrode facing the display area.
US10134770B2	Preparation method of conductive via hole structure, array substrate and display device A preparation method of a conductive via hole structure, a preparation method of an array substrate and a preparation method of a display device, the preparation method of the array substrate includes: forming a first metal layer (01) including the first metal structure (01a), forming a non-metallic film including a first part corresponding to the first metal structure (01a) and an organic insulating film (40′) in sequence; patterning the organic insulating film (40′) to form a first organic insulating layer via hole (41) corresponding to the first part; then baking to form an organic insulating layer (40); and then, removing the first part of the non-metallic film to form a non-metallic layer and expose the part of the surface (011) of the first metal structure (01a). This method can avoid the metal structure from being seriously oxidized.
US10134766B2	Semiconductor device and method for manufacturing the same The number of photolithography steps used for manufacturing a transistor is reduced to less than the conventional one and a highly reliable semiconductor device is provided. The present invention relates to a semiconductor device including a circuit including a transistor having an oxide semiconductor layer over a first substrate and a second substrate fixed to the first substrate with a sealant. A closed space surrounded by the sealant, the first substrate, and the second substrate is in a reduced pressure state or filled with dry air. The sealant surrounds at least the transistor and has a closed pattern shape. Further, the circuit is a driver circuit including a transistor having an oxide semiconductor layer.
US10134763B2	Gate top spacer for finFET The capacitance between gate structures and source/drain contacts of FinFET devices is reduced by the incorporation of inner spacers in the top portions of the gate structures. A replacement metal gate process used in the fabrication of such devices includes formation of the inner spacers following partial removal of dummy gate material. The remaining dummy gate material is then removed and replaced with gate dielectric and metal gate material.
US10134759B2	Semiconductor device including groups of nanowires of different semiconductor materials and related methods A method for making a semiconductor device may include forming, above a substrate, a plurality of fins, forming a first semiconductor material on sides of a first group of the fins, and forming a second semiconductor material on sides of a second group of the fins. The method may further include forming a dielectric layer overlying the plurality of fins to define first and second groups of nanowires within the dielectric layer, with the first group of nanowires including the first semiconductor material and the second group of nanowires including the second semiconductor material.
US10134757B2	Method of processing a substrate and a device manufactured by using the method A method of processing a substrate by omitting a photolithographic process is disclosed. The method includes forming at least one layer on a stepped structure having an upper surface, a lower surface, and a side surface that connects the upper surface to the lower surface, selectively densifying portions of the at least one layer respectively on the upper surface and the lower surface via asymmetric plasma application, and performing an isotropic etching process on the at least one layer. During the isotropic etching process, the portion of the at least one layer formed on the upper surface is separated from the portion of the at least one layer formed on the lower surface.
US10134755B2	Semiconductor memory device A semiconductor memory device includes a memory plane including a plurality of electrode layers stacked on a substrate and a semiconductor layer extending through the plurality of electrode layers in a stacking direction thereof, a circuit provided on the substrate around the memory plane, a first insulating layer including a first portion and a second portion between the substrate and a second insulating layer, and the second insulating layer covering the circuit. The first portion is provided along an outer edge of the memory plane, and the second portion is spaced from the first portion and is provided on the circuit side. The second insulating layer includes a part in contact with the substrate between the first portion and the second portion, and the second insulating layer blocks a diffusion of hydrogen radicals with a higher rate than the first insulating layer.
US10134751B2	Non-volatile semiconductor memory device and manufacturing method thereof This non-volatile semiconductor memory device includes a memory cell array including NAND cell units formed in a first direction vertical to a surface of a semiconductor substrate. A local source line is electrically coupled to one end of the NAND cell unit formed on the surface of the substrate. The memory cell array includes: a laminated body where plural conductive films, which are to be control gate lines of memory cells or selection gate lines of selection transistors, are laminated sandwiching interlayer insulating films; a semiconductor layer that extends in the first direction; and an electric charge accumulating layer sandwiched between: the semiconductor layer and the conductive film. The local source line includes a silicide layer. The electric charge accumulating layer is continuously formed from the memory cell array to cover a peripheral area of the silicide layer.
US10134748B2	Cell boundary structure for embedded memory Various embodiments of the present application are directed to a method for forming an embedded memory boundary structure with a boundary sidewall spacer. In some embodiments, an isolation structure is formed in a semiconductor substrate to separate a memory region from a logic region. A multilayer film is formed covering the semiconductor substrate. A memory structure is formed on the memory region from the multilayer film. An etch is performed into the multilayer film to remove the multilayer film from the logic region, such that the multilayer film at least partially defines a dummy sidewall on the isolation structure. A spacer layer is formed covering the memory structure, the isolation structure, and the logic region, and further lining the dummy sidewall. An etch is performed into the spacer layer to form a spacer on dummy sidewall from the spacer layer. A logic device structure is formed on the logic region.
US10134746B2	Self aligned active trench contact An integrated circuit and method includes self-aligned contacts. A gapfill dielectric layer fills spaces between sidewalls of adjacent MOS gates. The gapfill dielectric layer is planarized down to tops of gate structures. A contact pattern is formed that exposes an area for multiple self-aligned contacts. The area overlaps adjacent instances of the gate structures. The gapfill dielectric layer is removed from the area. A contact metal layer is formed in the areas where the gapfill dielectric material has been removed. The contact metal abuts the sidewalls along the height of the sidewalls. The contact metal is planarized down to the tops of the gate structures, forming the self-aligned contacts.
US10134744B1	Semiconductor memory device A semiconductor memory device includes a first inverter, a second inverter, a first and second inner access transistors, and a first and second outer access transistors. The first inverter includes a first pull-up transistor and a first pull-down transistor, the second inverter includes a second pull-up transistor (PL2) and a second pull-down transistor, and the first inverter and the second inverter forms a latch circuit. The first and second inner access transistors and the first and second outer access transistors are electrically connected to the latch circuit, and channel widths of the second inner access transistor and the second outer access transistor are different from each other.
US10134739B1	Memory array with buried bitlines below vertical field effect transistors of memory cells and a method of forming the memory array Disclosed is a structure wherein lower source/drain regions of vertical field effect transistors (VFETs) of memory cells in a memory array are aligned above and electrically connected to buried bitlines. Each cell includes a VFET with a lower source/drain region, an upper source/drain region and at least one channel region extending vertically between the source/drain regions. The lower source/drain region is above and immediately adjacent to a buried bitline, which has the same or a narrower width than the lower source/drain region and which includes a pair of bitline sections and a semiconductor region positioned laterally between the sections. The semiconductor region is made of a different semiconductor material than the lower source/drain region. Also disclosed is a method that ensures that bitlines of a desired critical dimension can be achieved and that allows for size scaling of the memory array with minimal bitline coupling.
US10134737B2	Memory device with reduced-resistance interconnect An interconnect structure includes a lower interconnect layer, an intermediate interconnect layer, and an upper interconnect layer. First and second conductive lines in the lower interconnect layer extend generally in a first direction over a memory array region, and additional lower conductive lines in the lower interconnect layer extend generally in the first direction over a peripheral region. A first plurality of conductive line segments in the intermediate interconnect layer extend generally in the first direction over the memory array region, and additional intermediate conductive line segments in the intermediate interconnect layer extend generally in a second, perpendicular direction over the peripheral region. A second plurality of conductive line segments in the upper interconnect layer extend generally in the first direction over the memory array region, and additional upper conductive line segments in the upper interconnect layer extend generally in the first direction over the peripheral region.
US10134734B2	Fin field effect transistor (FET) (FinFET) complementary metal oxide semiconductor (CMOS) circuits employing single and double diffusion breaks for increased performance Fin Field Effect Transistor (FET) (FinFET) complementary metal oxide semiconductor (CMOS) circuits with single and double diffusion breaks for increased performance are disclosed. In one aspect, a FinFET CMOS circuit employing single and double diffusion breaks includes a P-type FinFET that includes a first Fin formed from a semiconductor substrate and corresponding to a P-type diffusion region. The FinFET CMOS circuit includes an N-type FinFET that includes a second Fin formed from the semiconductor substrate and corresponding to an N-type diffusion region. To electrically isolate the P-type FinFET, first and second single diffusion break (SDB) isolation structures are formed in the first Fin on either side of a gate of the P-type FinFET. To electrically isolate the N-type FinFET, first and second double diffusion break (DDB) isolation structures are formed in the second Fin on either side of a gate of the N-type FinFET.
US10134731B2	Dielectric liner added after contact etch before silicide formation A method for forming MOS transistor includes providing a substrate including a semiconductor surface having a gate electrode on a gate dielectric thereon, dielectric spacers on sidewalls of the gate electrode, a source and drain in the semiconductor surface on opposing sides of the gate electrode, and a pre-metal dielectric (PMD) layer over the gate electrode and over the source and drain regions. Contact holes are formed through the PMD layer to form a contact to the gate electrode and contacts to the source and drain. A post contact etch dielectric layer is then deposited on the contacts to source and drain and on sidewalls of the PMD layer. The post contact etch dielectric layer is selectively removed from the contacts to leave a dielectric liner on sidewalls of the PMD layer. A metal silicide layer is formed on the contacts to the source and drain.
US10134717B2	Semiconductor package, semiconductor device and method of forming the same According to an exemplary embodiment, a semiconductor package is provided. The semiconductor package includes at least one chip, and at least one component adjacent to the at least one chip, wherein the at least one chip and the at least one component are molded in a same molding body.
US10134715B2	Display apparatus and methods A display includes a plurality of pixel chips, chixels, provided on a substrate. The chixels and the light emitters thereon may be shaped, sized and arranged to minimize chixel, pixel, and sub-pixel gaps and to provide a seamless look between adjacent display modules. The substrate may include light manipulators, such as filters, light converters and the like to manipulate the light emitted from light emitters of the chixels. The light manipulators may be arranged to minimize chixel gaps between adjacent chixels.
US10134714B2	Flexible circuit board for LED lighting fixtures Techniques are disclosed for making a flexible laminated circuit board using a metal conductor onto which a SMD may be attached. Conductive metal strips may be laminated to form a flexible substrate and the metal strips may then be perforated for the placement of LED package leads. The LED packages may be attached to the conductive strips using solder or a conductive epoxy and the upper laminate layer may include perforations exposing portions of the metal strips for the attachment of the LED packages. Alternatively, strings of LED packages may be fabricated by attaching LED packages to conductive strips and these strings may be laminated between flexible sheets to form a laminated LED circuit. Plastic housings may aid in attaching the LED packages to the conductive strips. The plastic housings and/or the laminate sheets may be made of a reflective material.
US10134709B1	Substrateless light emitting diode (LED) package for size shrinking and increased resolution of display device A light emitting diode package including a circuit layer, a light-shielding layer, a plurality of light emitting diodes and an encapsulation layer is provided. A thickness of the circuit layer is less than 100 μm. The light-shielding layer is disposed on a first surface of the circuit layer and the light-shielding layer has a plurality of apertures. The light emitting diodes are disposed on the first surface of the circuit layer and in the apertures of the light-shielding layer. The light emitting diodes are electrically connected to the circuit layer. The encapsulation layer covers the light-shielding layer. A refractive index of the encapsulation layer is 1.4 and to 1.7. The Young's modulus of the encapsulation layer is larger than or equal to 1 GPa. A thickness of the encapsulation layer is greater than thicknesses of the light emitting diodes.
US10134708B2	Package with thinned substrate A package includes a substrate, an Under-Bump Metallurgy (UBM) penetrating through the substrate, a solder region over and contacting the UBM, and an interconnect structure underlying the substrate. The interconnect structure is electrically coupled to the solder region through the UBM. A device die is underlying and bonded to the interconnect structure. The device die is electrically coupled to the solder region through the UBM and the interconnect structure. An encapsulating material encapsulates the device die therein.
US10134706B2	Warpage control of semiconductor die package Various embodiments of mechanisms for forming a die package using a compressive dielectric layer to contact and to surround through substrate vias (TSVs) in the die package are provided. The compressive dielectric layer reduces or eliminates bowing of the die package. As a result, the risk of broken redistribution layer (RDL) due to bowing is reduced or eliminated. In addition, the compressive dielectric layer, which is formed between the conductive TSV columns and surrounding molding compound, improves the adhesion between the conductive TSV columns and the molding compound. Consequently, the reliability of the die package is improved.
US10134705B2	Method of manufacturing semiconductor device As one embodiment, a method of manufacturing a semiconductor device includes the following steps. That is, the method of manufacturing a semiconductor device includes a first step of applying ultrasonic waves to a ball portion of a first wire in contact with a first electrode of the semiconductor chip while pressing the ball portion with a first load. In addition, the method of manufacturing a semiconductor device includes a step of, after the first step, applying the ultrasonic waves to the ball portion while pressing the ball portion with a second load larger than the first load, thereby bonding the ball portion and the first electrode.
US10134699B2	Packages with solder ball revealed through layer An integrated circuit structure includes a substrate, a PPI over the substrate, a solder region over and electrically coupled to a portion of the PPI, and a molding compound molding a lower portion of the solder region therein. A top surface of the molding compound is level with or lower than a maximum-diameter plane, wherein the maximum-diameter plane is parallel to a major surface of the substrate, and the maximum-diameter of the solder region is in the maximum-diameter plane.
US10134692B2	Body-mountable device with a common substrate for electronics and battery An example device includes a silicon substrate having a first substrate surface and a second substrate surface; a plurality of layers associated with one or more electronic components of an integrated circuit (IC), where the plurality of layers are deposited on the second substrate surface; a lithium-based battery having a plurality of battery layers deposited on the first substrate surface of the silicon substrate, where the lithium-based battery includes an anode current collector and a cathode current collector; a first through-silicon via (TSV) passing through the silicon substrate and providing an electrical connection between the anode current collector and the plurality of layers associated with the one or more electronic components of the IC; and a second TSV passing through the silicon substrate and providing an electrical connection between the cathode current collector and the plurality of layers associated with the one or more electronic components of the IC.
US10134691B2	Apparatus and method for generating identification key An apparatus for generating an identification key is provided. The apparatus may include a first conductive layer formed on a semiconductor chip, a second conductive layer formed on the semiconductor chip, wherein a spacing between the first conductive layer and the second conductive layer is equal to or greater than a first threshold and equal to or less than a second threshold, and a reader configured to determine whether a first node associated with the first conductive layer and a second node associated with the second conductive layer are shorted, and to provide an identification key.
US10134687B1	Semiconductor device and method of manufacturing a semiconductor device An exemplary semiconductor device can comprise a die, a redistribution structure (RDS), an interconnect, a conductive strap, an encapsulant, and an EMI shield. The redistribution structure can comprise an RDS top surface coupled to the die bottom side. The interconnect can be coupled to the RDS bottom surface. The conductive strap can be coupled to the RDS, and can comprise a strap inner end coupled to the RDS bottom surface, and a strap outer end located lower than the RDS bottom surface. The encapsulant can encapsulate the conductive strap and the RDS bottom surface. The EMI shield can cover and contact the encapsulant sidewall and the strap outer end. Other examples and related methods are also disclosed herein.
US10134685B1	Integrated circuit package and method of fabricating the same An integrated circuit package including at least one integrated circuit component, at least one electromagnetic interference shielding layer and an insulating encapsulation is provided. The at least one integrated circuit component includes an active surface, a plurality of sidewalls connected to the active surface and a plurality of conductive pillars protruding from the active surface. The at least one electromagnetic interference shielding layer covers the sidewalls of the at least one integrated circuit component, and the at least one electromagnetic interference shielding layer is electrically grounded. The insulating encapsulation encapsulates the at least one integrated circuit component and the at least one electromagnetic interference shielding layer, and the conductive pillars of the at least one integrated circuit component are accessibly exposed by the insulating encapsulation. Methods of fabricating the integrated circuit package are also provided.
US10134683B2	Semiconductor device package and method of manufacturing the same A semiconductor device package includes a first circuit layer having a first surface and a second surface opposite the first side, a first electronic component, a shielding element, a shielding layer and a molding layer. The first electronic component is disposed over the first surface of the first circuit layer, and electrically connected to the first circuit layer. The shielding element is disposed over the first surface of the first circuit layer, and is electrically connected to the first circuit layer. The shielding element is disposed adjacent to at least one side of the first electronic component. The shielding layer is disposed over the first electronic component and the shielding element, and the shielding layer is electrically connected to the shielding element. The molding layer encapsulates the first electronic component, the shielding element and a portion of the shielding layer.
US10134682B2	Circuit package with segmented external shield to provide internal shielding between electronic components A module includes a circuit package having multiple electronic components on a substrate, a molded compound disposed over the substrate and the electronic components, and an external shield disposed on at least one outer surface of the circuit package. The external shield is segmented into multiple external shield partitions that are grounded, respectively. Adjacent external shield partitions of the multiple external shield partitions are separated by a corresponding gap located between adjacent electronic components of the multiple electronic components. The external shield is configured to protect the circuit package from external electromagnetic radiation and environmental stress. Each corresponding gap separating the adjacent external shield partitions is configured to provide internal shielding of at least one of the electronic components, between which the corresponding gap is located, from internal electromagnetic radiation generated by the other of the adjacent electronic components.
US10134677B1	Semiconductor package device and method of manufacturing the same A semiconductor package device includes a first interconnection structure, a non-silicon interposer and a first die. The first interconnection structure has a first pitch. The non-silicon interposer surrounds the first interconnection structure. The non-silicon interposer includes a second interconnection structure having a second pitch. The second pitch is larger than the first pitch. The first die is above the first interconnection structure and is electrically connected to the first interconnection structure.
US10134676B2	Flexible device having flexible interconnect layer using two-dimensional materials A flexible device includes an electronic device having an electrode and a flexible interconnect layer formed on the electrode. The flexible interconnect layer includes a two-dimensional (2D) material and a conductive polymer to have high electric conductivity and flexibility. The flexible device includes a flexible interconnect layer of one or more layers, and in this case, includes a low-dielectric constant dielectric layer between the respective layers.
US10134675B2	Cobalt top layer advanced metallization for interconnects An advanced metal conductor structure is described. An integrated circuit device including a substrate having a patterned dielectric layer. The pattern includes a set of features in the dielectric for a set of metal conductor structures. An adhesion promoting layer is disposed over the set of features in the patterned dielectric. A metal layer fills a first portion of the set of features and is disposed over the adhesion promoting layer. A ruthenium layer is disposed over the metal layer. A cobalt layer is disposed over the ruthenium layer fills a second portion of the set of features. The cobalt layer is formed using a physical vapor deposition process.
US10134672B2	Semiconductor memory device having a stepped structure and contact wirings formed thereon A semiconductor storage device includes a substrate, a stack of first insulating layers and conductive layers that are alternately formed on the substrate in a memory region and a peripheral region and electrically insulated from each other, a second insulating layer covering the stack of the first insulating layers and the conductive layers in the peripheral region, and a plurality of contact wirings formed in the peripheral region, each contact wiring extending from an upper surface of the second insulating layer towards the substrate and electrically connected to a corresponding one of the conductive layers. In the peripheral region, each conductive layer has an extended portion that covers side and upper surfaces of an end portion of a first insulating layer that is formed immediately thereabove, and each contact wiring is in direct contact with the extended portion of the corresponding conductive layer.
US10134669B2	Method for forming fin field effect transistor (FinFET) device structure with interconnect structure A semiconductor device structure includes a first metal layer formed over a substrate and an interconnect structure formed over the first metal layer. The interconnect structure includes an upper portion, a middle portion and a lower portion, the middle portion is connected between the upper portion and the lower portion. The upper portion and the lower portion each have a constant width, and the middle portion has a tapered width which is gradually tapered from the upper portion to the lower portion.
US10134665B2	Semiconductor device A BGA 9 includes a wiring substrate 2, a semiconductor chip 1 fixed on the wiring substrate 2, a sealing body 4 that seals the semiconductor chip 1, and a plurality of solder balls 5 provided on a lower surface of the wiring substrate 2. A degree of flatness of an upper surface 2ia of a first wiring layer 2i of the wiring substrate 2 of the BGA 9 is lower than a degree of flatness of a lower surface 2ib, and a first pattern 2jc provided in a second wiring layer 2j is arranged at a position overlapping a first pattern 2ic provided in the first wiring layer 2i. Also, an area of the first pattern 2ic provided in the first wiring layer 2i is larger than an area of a plurality of (for example, two) second patterns 2jd provided in the second wiring layer 2j in a plan view, and a first opening portion 2jm through which a part of a second insulating layer 2h is exposed is formed in the first pattern 2jc provided in the second wiring layer 2j.
US10134662B2	Mounting substrate and method of manufacturing the same A method of manufacturing a mounting substrate according to an embodiment of the present technology includes the following three steps: (1) a step of forming a plurality of electrodes on a semiconductor layer, and thereafter forming one of solder bumps at a position facing each of the electrodes; (2) a step of covering the solder bumps with a coating layer, and thereafter selectively etching the semiconductor layer with use of the coating layer as a mask to separate the semiconductor layer into a plurality of elements; and (3) a step of removing the coating layer, and thereafter mounting the elements on a wiring substrate to direct the solder bumps toward the wiring substrate, thereby forming the mounting substrate.
US10134659B2	Semiconductor device with overlapped lead terminals The size and thickness of a semiconductor device are reduced. A semiconductor package with a flip chip bonding structure includes: a semiconductor chip having a main surface with multiple electrode pads formed therein and a back surface located on the opposite side thereto; four lead terminals each having an upper surface with the semiconductor chip placed thereover and a lower surface located on the opposite side thereto; and a sealing body having a main surface and a back surface located on the opposite side thereto. In this semiconductor package, the distance between adjacent first lower surfaces of the four lead terminals exposed in the back surface of the sealing body is made longer than the distance between adjacent upper surfaces thereof. This makes it possible to suppress the production of a solder bridge when the semiconductor package is solder mounted to a mounting board and to reduce the size and thickness of the semiconductor package and further enhance the reliability of the semiconductor package.
US10134658B2	High power transistors High power transistors, such as high power gallium nitride (GaN) transistors, are described. These high power transistors have larger total gate widths than conventional high power transistors by arranging multiple linear arrays of gate, drain, and source contacts in parallel. Thereby, the total gate width and the power rating of the high power transistor may be increased without elongating the die of the high power transistor. Accordingly, the die of the high power transistor may be mounted in a smaller circuit package relative to conventional dies with the same power rating.
US10134654B2	Double-encapsulated power semiconductor module and method for producing the same One aspect relates to a power semiconductor module. The module includes a module housing, a substrate, and a semiconductor chip attached to the substrate. The semiconductor chip is disposed in the module housing. A dielectric first encapsulation is disposed in the module housing, in physical contact with both the semiconductor chip and the substrate and has a first modulus of elasticity. A dielectric second encapsulation is disposed in the module housing and has a second modulus of elasticity. The first encapsulation is a polymer and disposed between the substrate and the second encapsulation. The semiconductor chip is disposed between the first encapsulation and the substrate. Further, the first modulus of elasticity is greater than the second modulus of elasticity.
US10134650B2	Apparatus and method for cutting a wafer that is substantially covered by an opaque material A wafer cutting apparatus comprises a wafer positioning device for holding a wafer that is substantially covered with an opaque material such as molding compound and that has an exposed peripheral area, and for displacing the wafer relative to a wafer inspection system comprising a camera having a field of view. To perform visual data acquisition of said dicing street portions, the wafer is displaced such that a center of the camera's field of view follows a path along the exposed peripheral area of the wafer. A processing unit analyzes the visual data acquired for detecting or calculating locations and directions of the dicing streets. A wafer cutting tool cuts the wafer along straight lines between the dicing street portions which have been detected or calculated by the processing unit.
US10134648B2	Manufacturing method of semiconductor device Provided is a semiconductor device having a pad on a semiconductor chip, a first passivation film formed over the semiconductor chip and having an opening portion on the pad of a probe region and a coupling region, a second passivation film formed over the pad and the first passivation film and having an opening portion on the pad of the coupling region, and a rewiring layer formed over the coupling region and the second passivation film and electrically coupled to the pad. The pad of the probe region placed on the periphery side of the semiconductor chip relative to the coupling region has a probe mark and the rewiring layer extends from the coupling region to the center side of the semiconductor chip. The present invention provides a technology capable of achieving size reduction, particularly pitch narrowing, of a semiconductor device.
US10134638B2	FETS and methods of forming FETS An embodiment is a structure. The structure comprises a fin on a substrate, isolation regions on the substrate, a dielectric region, and a gate structure. The fin includes a first epitaxial portion. The isolation regions are on opposing sides of the fin, and at least the first epitaxial portion of the fin protrudes from between the isolation regions. The dielectric region directly underlies the first epitaxial portion. A material of the dielectric region is different from a material of the isolation regions. The gate structure is along sidewalls and is over an upper surface of the fin. The gate structure defines a channel region in the first epitaxial portion.
US10134635B1	Stress relieving through-silicon vias Methods and systems for stress relieving through-silicon vias are disclosed and may include forming a semiconductor device comprising a stress relieving stepped through-silicon-via (TSV), said stress relieving stepped TSV being formed by: forming first mask layers on a top surface and a bottom surface of a silicon layer, forming a via hole through the silicon layer at exposed regions defined by the first mask layers, and removing the first mask layers. The formed via hole may be filled with metal, second mask layers may be formed covering top and bottom surfaces of the silicon layer and a portion of top and bottom surfaces of the metal filling the formed via hole, and metal may be removed from the top and bottom surfaces of the metal exposed by the second mask layers to a depth of less than half a thickness of the silicon layer.
US10134634B2	Metal-assisted chemical etching of a semiconductive substrate with high aspect ratio, high geometic uniformity, and controlled 3D profiles An embodiment of a method for metal-assisted chemical etching of a semiconductive substrate comprises forming a patterned coating on a top surface of a substrate layer of a silicon wafer; applying a noble metal layer over the patterned coating such that a portion of the noble metal layer is in contact with the top surface of the substrate layer; and immersing the silicon wafer in a wet etching solution to form a trench under the portion of the noble metal layer that is contact with the top surface of the substrate layer. Further, the trench may be filled with copper material to form a through silicon via structure. Such embodiments provide etching techniques that enable etched formations that are deep (e.g., high-aspect-ratio) and uniform as opposed to shallow etchings (i.e., low-aspect-ratio) or non-uniform deep etchings.
US10134630B2	Metal-graphene heterojunction metal interconnects, method of forming the same, and semiconductor device including the same Disclosed herein are a metal-graphene heterojunction metal interconnect, a method of forming the same, and a semiconductor device including the same. The method includes: a) forming a carbon source layer by depositing a carbon source on a top surface of a substrate; b) forming a metal catalyst layer by depositing a metal catalyst on the carbon source layer; and c) carrying out heat treatment on the substrate comprising the carbon source layer and the metal catalyst layer. The graphene can be formed by carrying out the heat treatment only once irrespectively of the number of substrates, and accordingly to the manufacturing time and manufacturing cost of the metal interconnect are reduced, and a damage to the metal interconnect by the heat treatment is not caused.
US10134629B1	Method for manufacturing a semiconductor structure A method for manufacturing a semiconductor structure includes the following steps. At first, a titanium layer is formed on a preformed layer. Then, a first titanium nitride layer is formed on the titanium layer. A first plasma treatment is applied to the first titanium nitride layer such that the first titanium nitride layer has a first N/Ti ratio. A second titanium nitride layer is formed on the first titanium nitride layer. A second plasma treatment is applied to the second titanium nitride layer such that the second titanium nitride layer has a second N/Ti ratio larger than the first N/Ti ratio.
US10134628B2	Multilayer structure including diffusion barrier layer and device including the multilayer structure A multilayer structure includes a first material layer, a second material layer, and a diffusion barrier layer. The second material layer is connected to the first material layer. The second material layer is spaced apart from the first material layer. The diffusion barrier layer is between the first material layer and the second material layer. The diffusion barrier layer may include a two-dimensional (2D) material. The 2D material may be a non-graphene-based material, such as a metal chalcogenide-based material having a 2D crystal structure. The first material layer may be a semiconductor or an insulator, and the second material layer may be a conductor. At least a part of the multilayer structure may constitute an interconnection for an electronic device.
US10134626B2	Mechanisms for forming FinFETs with different fin heights A semiconductor device is provided. The semiconductor device includes a doped isolation structure formed above a substrate, and the doped isolation structure includes a first doped portion and a second doped portion, and a doped concentration of the second doped portion is different from a doped concentration of the first doped portion. The semiconductor device also includes a first fin partially embedded in the doped isolation structure, and a sidewall surface of the first fin is in direct contact with the first doped portion. The semiconductor device includes a second fin partially embedded in the doped isolation structure, and the doped isolation structure is between the first fin and the second fin, and a sidewall surface of the second fin is in direct contact with the second doped portion.
US10134622B2	Apparatus and method for ascertaining orientation errors A device for determining alignment errors of structures which are present on, or which have been applied to a substrate, comprising a substrate holder for accommodating the substrate with the structures and detection means for detecting X-Y positions of first markings on the substrate and/or second markings on the structures by moving the substrate or the detection means in a first coordinate system, wherein in a second coordinate system which is independent of the first coordinate system X′-Y′ structure positions for the structures are given whose respective distance from the X-Y positions of the first markings and/or second markings can be determined by the device.
US10134619B2	Connecting mechanism and connecting method of substrate container A connecting mechanism includes a mounting unit, a substrate transfer port, a door closing or opening the substrate transfer port, a coupling mechanism coupling a cover of the substrate container mounted on the mounting unit with the door, and a gas exhaust/purge unit. First, second and third seal members respectively seal a first space between a peripheral portion of the substrate transfer port and the door, a second space between the door and the cover of the substrate container, and a space between the peripheral portion of the substrate transfer port and the main body. The gas exhaust unit exhausts the first space and a second space. The purge gas, which has been supplied into the substrate container by the gas exhaust/purge unit, is supplied into the first and the second space by allowing the gas exhaust unit to exhaust the first and the second space.
US10134610B2	Substrate processing method for drying a substrate by discharging gas to liquid layer on the substrate while rotating the substrate After a development liquid on a substrate is washed away with a rinse liquid, the rotational speed of the substrate is reduced, so that a liquid layer of the rinse liquid is formed over a top surface of the substrate. Thereafter, the rotational speed of the substrate is increased. The increase in the rotational speed of the substrate causes a centrifugal force to be slightly greater than tension, thereby causing the liquid layer to be held on the substrate with the thickness thereof in its peripheral portion increased and the thickness thereof at the center thereof decreased. Then, gas is discharged toward the center of the liquid layer from a gas supply nozzle, so that a hole is formed at the center of the liquid layer. This causes tension that is balanced with a centrifugal force exerted on the peripheral portion of the liquid layer to disappear. Furthermore, the rotational speed of the substrate is further increased while the gas is discharged. Thus, the liquid layer moves outward from the substrate.
US10134608B2	Power electronic switching device and power semiconductor module therewith A switching device and a power semiconductor module are configured with a substrate, a power semiconductor component arranged thereupon and with a load connection device. The substrate incorporates mutually electrically-insulated printed conductors and wherein the load connection device, preferably for an AC potential, comprises at least two partial connection devices, having mutually corresponding contact surfaces and being interconnected in an force-fitted or materially-bonded manner and, on the contact surfaces, an electrically conductive manner, wherein a first partial connection device has a first contact device, which is force-fitted or materially-bonded to the printed conductor of the substrate, and wherein a second partial connection device has a second contact device for the further, preferably external, connection of a load connection device.
US10134606B2	Method of forming patterns and method of manufacturing integrated circuit device using the same A method of forming patterns may use an organic reflection-preventing film including a polymer having an acid-liable group. A photoresist film is formed on the organic reflection-preventing film. A first area selected from the photoresist film is exposed to generate an acid in the first area. Hydrophilicity of a first surface of the organic reflection-preventing film facing the first area of the photoresist film may be increased. The photoresist film including the exposed first area is developed to remove a non-exposed area of the photoresist film. The organic reflection-preventing film and a target layer are anisotropically etched by using the first area of the photoresist film as an etch mask.
US10134605B2	Dual chamber plasma etcher with ion accelerator The embodiments herein generally deal with semiconductor processing methods and apparatus. More specifically, the embodiments relate to methods and apparatus for etching a semiconductor substrate. A partially fabricated semiconductor substrate is provided in a reaction chamber. The reaction chamber is divided into an upper sub-chamber and a lower sub-chamber by a grid assembly. Plasma is generated in the upper sub-chamber, and the substrate is positioned in the lower sub-chamber. The grid assembly includes at least two grids, each of which is negatively biased, and each of which includes perforations which allow certain species to pass through. The uppermost grid is negatively biased in order to repel electrons. The lowermost grid is biased further negative (compared to the uppermost grid) in order to accelerate positive ions from the upper to the lower sub-chamber. Etching gas is supplied directly to the lower sub-chamber. The etching gas and ions react with the surface of the substrate to etch the substrate as desired.
US10134604B1	Semiconductor device and method A method includes forming a metal gate structure over a first fin, where the metal gate structure is surrounded by a first dielectric material, and forming a capping layer over the first dielectric material, where an etch selectivity between the metal gate structure and the capping layer is over a pre-determined threshold. The method also includes forming a patterned hard mask layer over the first fin and the first dielectric material, where an opening of the patterned hard mask layer exposes a portion of the metal gate structure and a portion of the capping layer. The method further includes removing the portion of the metal gate structure exposed by the opening of the patterned hard mask layer.
US10134600B2	Dielectric contact etch A method for forming a semiconductor device in a plasma processing chamber is provided. An atomic layer etch selectively etches SiO with respect to SiN and deposits a fluorinated polymer. The fluorinated polymer layer is stripped, comprising flowing a stripping gas comprising oxygen into the plasma processing chamber, forming a plasma from the stripping gas, and stopping the flow of the stripping gas. A SiN layer is selectively etched with respect to SiO and SiGe and Si.
US10134598B2	Method for manufacturing semiconductor device As a first grinding step, a peripheral portion of a back surface of a wafer (1) is ground with a first grindstone (17) to form a fractured layer (19) in the peripheral portion. Subsequently, as a second grinding step, a central portion of the back surface of the wafer (1) is ground with the first grindstone (17) to form a recess (21) while the peripheral portion in which the fractured layer (19) is formed is left as a rib (20). Subsequently, as a third grinding step, a bottom surface of the recess (21) is ground with a second grindstone (22) of an abrasive grain size smaller than that of the first grindstone (17) to reduce a thickness of the wafer (1).
US10134597B2	Apparatuses including memory cells with gaps comprising low dielectric constant materials Various embodiments include apparatuses and electronic devices. One such apparatus can include a first dielectric material and a second dielectric material, and a conductive material between the first dielectric material and the second dielectric material. A charge storage element, such as a floating gate or charge trap, is located between the first dielectric material and the second dielectric material and adjacent to the conductive material. The charge storage element has a first surface and a second surface. The first and second surfaces are substantially separated from the first dielectric material and the second dielectric material, respectively, by a first gap and a second gap. In various embodiments, the gaps are air gaps. Additional apparatuses and methods are disclosed.
US10134593B2	Semiconductor device and method for manufacturing same A semiconductor device includes: a substrate having a cell region with a semiconductor element and an outer peripheral region; and a drift layer on the substrate. The semiconductor element includes a base region, a source region, a trench gate structure, a deep layer deeper than a gate trench, a source electrode, and a drain electrode. The outer peripheral region has a recess portion in which the drift layer are exposed, and a guard ring layer. The guard ring layer includes multiple guard ring trenches having a frame shape, surrounding the cell region and arranged on an exposed surface of the drift layer, and a first guard ring in the guard ring trenches. Each of the linear deep trenches has a width equal to a width of each of the linear guard ring trenches.
US10134592B2	Resist having tuned interface hardmask layer for EUV exposure A method is disclosed to prepare a substrate for photolithography. The method includes forming an underlayer over a surface of the substrate; depositing an interface hardmask layer on the underlayer using one of a vapor phase deposition process or an atomic layer deposition process; and forming a layer of extreme UV (EUV) resist on the interface hardmask layer, where the interface hardmask layer is comprised of material having a composition and properties tuned to achieve a certain secondary electron yield from the interface hardmask layer. Also disclosed is a structure configured for photolithography. The structure includes a substrate; an underlayer over a surface of the substrate; an interface hardmask layer disposed on the underlayer; and a layer of EUV resist disposed on the interface hardmask layer. The interface hardmask layer contains material having a composition and properties tuned to achieve a certain secondary electron yield from the interface hardmask layer.
US10134584B2	Method of manufacturing semiconductor device, substrate processing apparatus, and recording medium A method of manufacturing a semiconductor device includes forming a seed layer on a substrate by alternately performing supplying a halogen-based first process gas to the substrate and supplying a non-halogen-based second process gas to the substrate, and forming a film on the seed layer by supplying a third process gas to the substrate. A pressure of a space where the substrate exists in the act of supplying the first process gas is set higher than a pressure of the space where the substrate exists in the act of supplying the second process gas.
US10134582B2	Tantalum compound and methods of forming thin film and fabricating integrated circuit device by using the same A tantalum compound, a method of forming a thin film, and a method of fabricating an integrated circuit device, the tantalum compound being represented by the following General Formula (I):
US10134581B2	Methods and apparatus for selective dry etch Methods for forming a spacer comprising depositing a film on the top, bottom and sidewalls of a feature and treating the film to change a property of the film on the top and bottom of the feature. Selectively dry etching the film from the top and bottom of the feature relative to the film on the sidewalls of the feature using a high intensity plasma.
US10134579B2	Method for high modulus ALD SiO2 spacer Methods and apparatuses for forming high modulus silicon oxide spacers using atomic layer deposition are provided. Methods involve depositing at high temperature, using high plasma energy, and post-treating deposited silicon oxide using ultraviolet radiation. Such silicon oxide spacers are suitable for use as masks in multiple patterning applications to prevent pitch walking.
US10134576B2	Integrated sample processing for electrospray ionization devices Methods, systems and devices that generate differential axial transport in a fluidic device having at least one fluidic sample separation flow channel and at least one ESI emitter in communication with the at least one sample separation flow channel. In response to the generated differential axial transport, the at least one target analyte contained in a sample reservoir in communication with the sample separation channel is selectively transported to the at least one ESI emitter while inhibiting transport of contaminant materials contained in the sample reservoir toward the at least one ESI emitter thereby preferentially directing analyte molecules out of the at least one ESI emitter. The methods, systems and devices are particularly suitable for use with a mass spectrometer.
US10134572B2	Techniques for controlling distance between a sample and sample probe while such probe liberates analyte from a sample region for analysis with a mass spectrometer A system includes a mass spectrometer and associated sample interfacing equipment. The sample interfacing equipment includes a platform structured to support a sample thereon, a fluid source, a high voltage source, a dispensing probe electrically coupled to the high voltage source and defining a fluid dispensing passage therethrough, a collection probe defining a collection passage therethrough, a sensing arrangement coupled to the dispensing probe, and control logic responsive to the sensing arrangement to control distance between the dispensing probe and the sample. The dispensing probe facilitates formation of one or more ionized sample analytes when dispensing the fluid through the dispensing passage proximate to the sample on the platform. The collecting probe receives at least some of the one or more ionized sample analytes to pass through the collection passage into the mass spectrometer for analysis.
US10134570B2	Radiofrequency adjustment for instability management in semiconductor processing Methods, systems, and computer programs are presented for reducing chamber instability while processing a semiconductor substrate. One method includes an operation for identifying a first recipe with steps having an operating frequency equal to the nominal frequency of a radiofrequency (RF) power supply. Each step is analyzed with the nominal frequency, and the analysis determines if any step produces instability at the nominal frequency. The operating frequency is adjusted, for one or more of the steps, when the instability in the one or more steps exceeds a threshold. The adjustment acts to find an approximate minimum level of instability. A second recipe is constructed after the adjustment, such that at least one of the steps includes a respective operating frequency different from the nominal frequency. The second recipe is used to etch the one or more layers disposed over the substrate in the semiconductor processing chamber.
US10134568B2	RF ion source with dynamic volume control Provided herein are approaches for dynamically modifying plasma volume in an ion source chamber by positioning an end plate and radio frequency (RF) antenna at a selected axial location. In one approach, an ion source includes a plasma chamber having a longitudinal axis extending between a first end wall and a second end wall, and an RF antenna adjacent a plasma within the plasma chamber, wherein the RF antenna is configured to provide RF energy to the plasma. The ion source may further include an end plate disposed within the plasma chamber, adjacent the first end wall, the end plate actuated along the longitudinal axis between a first position and a second position to adjust a volume of the plasma. By providing an actuable end plate and RF antenna, plasma characteristics may be dynamically controlled to affect ion source characteristics, such as composition of ion species, including metastable neutrals.
US10134567B2	Microwave plasma processing apparatus In accordance with example embodiments, a plasma processing apparatus includes a chamber configured to peform a plasma process, an upper plate on the chamber, an antenna under the upper plate and the antenna is configured to generate plasma in the chamber, an upper insulator between the upper plate and the antenna and the upper insulator covers a top of the antenna, a lower insulator covering a bottom of the antenna, an antenna support ring configured to fix the antenna to the upper plate, and a metal gasket adhered to the antenna support ring.
US10134563B2	Contactless temperature measurement in a charged particle microscope Disclosed is a method of using a charged particle microscope for inspecting a sample mounted on a sample holder. The microscope is equipped with a solid state detector for detecting secondary particles emanating from the sample in response to irradiation of the sample with the primary beam, with the solid state detector in direct optical view of the sample. In some embodiments, the sample is mounted on a heater with a fast thermal response time. The method comprises contactless measurement of the temperature of the sample and/or sample holder using the solid state detector.
US10134562B2	Multi charged particle beam writing apparatus, and multi charged particle beam writing method A multi charged particle beam writing apparatus includes a modulation rate data calculation processing circuitry to calculate, for each pixel being a unit region, a modulation rate of a beam to a pixel concerned and each modulation rate of a beam to at least one pixel at a periphery of the pixel concerned, and a corrected-dose calculation processing circuitry to calculate, for the each pixel, a corrected dose by adding a multiplied value obtained by multiplying the modulation rate of the pixel concerned in a modulation rate map by beam dose to the pixel concerned, and a multiplied value obtained by multiplying the modulation rate of the pixel concerned which becomes one of the at least one pixel at the periphery with respect to another pixel defined for the position of the pixel concerned by a beam dose to the another pixel.
US10134558B2	Scanning electron microscope A scanning electron microscope according to the present invention includes: an electron source that produces an electron beam; a trajectory dispersion unit that disperses the trajectory of an electron beam of electrons with a different energy value; a selection slit plate having a selection slit that selects the energy range of the dispersed electron beam; and a transmittance monitoring unit that monitors the transmittance of an electron beam, which is being transmitted through the selection slit. Accordingly, there can be provided a scanning electron microscope equipped with an energy filter that implements a stable reduction in energy distribution.
US10134555B2	Fuse for a device to be protected A fuse has a first contact and a second contact, with the second contact being used to electrically contact the device to be protected. The fuse has a fuse element that connects the first contact to the second contact. The fuse also has an additional contact being arranged so as to be insulated from the first contact and insulated from the second contact and, in an untripped state, is contactless with respect to the fuse element, with the first contact being directly connected to the first potential during operation and with the device to be protected being directly connected to the second potential during operation, with the additional contact also being directly connected to the second potential during operation. A fourth contact makes external triggering available, with triggering resulting in an electric arc that causes the fuse element to fuse.
US10134552B2	Method for fabricating MEMS switch with reduced dielectric charging effect The present disclosure provides methods of fabricating a micro-electro-mechanical systems (MEMS) switch. The methods include providing a substrate, forming a first dielectric layer disposed above the substrate, forming a bump above the first dielectric layer, providing a movable member including a top actuation electrode, and forming at least one support member that includes the first dielectric layer and is directly below the top actuation electrode. The top actuation electrode is electrically coupled to the bump.
US10134548B2	Vacuum interrupter The present disclosure relates to a vacuum interrupter that is installed within a vacuum circuit breaker to break a circuit. The vacuum interrupter includes an insulated container, a seal cup, a fixing electrode, a diaphragm, and a movable electrode. The insulated container is formed in a cylindrical form. The seal cup is installed on an upper end of the insulated container. The fixing electrode includes a fixing shaft and a fixing contact member installed on the other end of the fixing shaft. The diaphragm is installed on a lower end of the insulated container. The movable electrode includes a movable shaft having one end fixed to the diaphragm and the other end disposed within the insulated container and formed to be linearly movable, and a movable contact member installed on the other end of the movable shaft to be selectively contacted to the fixing contact member.
US10134547B2	Insulating housing with integrated functions and manufacturing method therefor An insulating housing with integrated functions comprises a barrel-shaped shell, an interior wall of which being provided with a protruded or recessed uneven texture configured to increase a creepage distance between both axial ends of the barrel-shaped shell, the path of the creepage distance formed by the protruded or recessed uneven texture having more than two flyover or bypass sub-paths, such that the creepage distance is increased, and the voltage withstanding is increased.
US10134542B2	Trigger switch with lock member A lock member includes a fit portion, an inclined portion and a contacting portion. The fit portion is fitted with a projecting portion of a trigger to maintain an off-lock state. The inclined portion is brought into contact with a shaft of an unlock button and moves the lock member to release the off-lock state. The projecting portion is slidable on the contacting portion and maintains an on state.
US10134535B2	Dry transformer load switch A dry transformer load switch, and transformer having such switch, has a hollow insulation cylinder extending longitudinally about a virtual center axis and has a plurality of connection contacts arranged along the inner circumference thereof, and a radially oriented main contact arranged in the interior of the hollow insulation cylinder so as to be rotatable about the center axis and which, with a corresponding rotary movement, can be optionally electrically connected by the radially outer end thereof to one of the connection contacts. In a hollow-cylindrical space about the center axis that is defined by the radially inner and outer end of the main contact, there is a barrier shield, which can be rotated together with the main contact about the axis.
US10134530B2	Anode lead wires for improved solid electrolytic capacitors An improved solid electrolytic capacitor, and method of making the solid electrolytic capacitor, is described. The solid electrolytic capacitor comprises a pressed powder anode and a braided lead wire extending from the anode. A dielectric is on the anode and a cathode is on the dielectric.
US10134524B2	Electric power receiving device and electric power transmission device An electric power receiving device includes a ferrite, and a power receiving coil in which a hollow portion is formed. The power receiving coil is formed so as to surround a winding axis that extends in the thickness direction. When the power receiving coil and the ferrite are viewed from an observation position spaced apart from the power receiving coil in a direction in which the winding axis extends, notch portions are formed in an outer peripheral portion of the ferrite such that the notch portions overlap side portions of the coil. The width of each notch portion as measured in a circumferential direction of the power receiving coil increases in a direction away from the hollow portion of the power receiving coil.
US10134523B2	Coil component A coil component has a core part 10 composing a closed magnetic path through which a closed loop of a magnetic flux passes, the magnetic flux being generated by two coils 14A, 14B that are arranged in parallel, and generate a magnetic field, and the core part 10 has a pair of I-type base cores 11A, 11B facing each other, and a pair of coupling core parts 11C, 11D. The coupling core parts 11C, 11D are each formed by linearly aligning three unit coupling cores 12A to 12F, and each of these cores 12A to 12F is formed into a configuration in which a column-shaped projection is provided on a core body, and a two-stage gap including a small gap and a large gap is to be formed mutually in a space in the adjacent unit cores 11A, 11B, and 12A to 12F by the configuration.
US10134521B1	RF transmitter and method of manufacture thereof A radio frequency (RF) transmitter, comprising a Tesla transformer and an LC oscillator, said Tesla transformer comprising inner and outer conductors (10, 20), said inner conductor (20) comprising a generally tubular magnetic core (22) carrying a conductive member (22a) on its outer surface and said outer conductor (10) comprising a generally tubular magnetic core (13) carrying a conductive member (12) on its inner surface, said LC oscillator including a secondary winding module (40) comprising a generally tubular body (41) carrying a conductive coil (42) on its outer surface, said inner conductor (20), outer conductor (10) and secondary winding module (40) being arranged in a substantially concentric nested configuration such that said inner conductor (20) is located within said secondary winding module (40) and said secondary winding module (40) is located within said outer conductor (10), wherein a first portion (45) of relatively high permittivity dielectric material is provided between said conductive member (22a) of said inner conductor (20) and said conductive coil (42) and a second portion (33) of relatively high permittivity dielectric material is provided between said conductive coil (42) and said conductive member (12) of said outer conductor (10).
US10134516B2	Sensor ring A sensor ring is provided for a magnetic measuring transducer of an ABS system consisting of at least two annularly arranged functional elements. The first functional element is formed as a ferromagnetic annular disc element with a flat upper side and a flat underside with a multiplicity of openings. The second functional element, as a non-ferromagnetic element, has either been applied on the upper side and/or the underside of the annular disc element and/or has been introduced into the openings, as an annular disc element. The sensor ring is protected from contamination or damage by the non-ferromagnetic covering. The covering may also be produced by encapsulation or filling, wherein the openings in the sensor ring can be filled with plastic and also the side faces can be coated with plastic.
US10134514B2	Method for producing grain-oriented electrical steel sheet In a method for producing a grain-oriented electrical steel sheet by hot rolling a raw steel material containing C: 0.002˜0.10 mass %, Si: 2.0˜8.0 mass % and Mn: 0.005˜1.0 mass % to obtain a hot rolled sheet, subjecting the hot rolled sheet to a hot band annealing as required and further to one cold rolling or two or more cold rollings including an intermediate annealing therebetween to obtain a cold rolled sheet having a final sheet thickness, subjecting the cold rolled sheet to a primary recrystallization annealing combined with decarburization annealing, applying an annealing separator to the steel sheet surface and then subjecting to a final annealing, when rapid heating is performed at a rate of not less than 50° C./s in a range of 100˜700° C. in the heating process of the primary recrystallization annealing, the steel sheet is subjected to a holding treatment at any temperature of 250˜600° C. for 0.5˜10 seconds 2 to 6 times to thereby obtain a grain-oriented electrical steel sheet being low in the iron loss and small in the deviation of the iron loss value.
US10134513B2	High silicon steel sheet having excellent productivity and magnetic properties and method for manufacturing same Provided is a method for manufacturing a high silicon steel sheet having excellent producibility and magnetic properties. The method includes: casting a molten metal as a strip having a thickness of 5 mm or less, the molten metal comprising, by weight %, C: 0.05% or less (excluding 0%), N: 0.05% or less (excluding 0%), Si: 4% to 7%, Al: 0.5% to 3%, Si+Al: 4.5% to 8%, and the balance of Fe and inevitable impurities; hot-rolling the cast strip at a temperature of 800° C. or higher; annealing the hot-rolled strip at a temperature within a range of 900° C. to 1200° C.; cooling the annealed strip; warm-rolling the quenched strip at a temperature within a range of 300° C. to 700° C.; and finally annealing the warm-rolled strip at a temperature within a range of 800° C. to 1200° C.
US10134512B2	Ceramic material and resistive element A ceramic material has a composition represented by Cax′NaxMny′MyO12, wherein M denotes at least one of Ni and Cu, and x′, x, y′, and y satisfy any of (a), (b), and (c) in which x′+x=X and y′+y=Y: 0.9 7.0 ≦ X Y < 1.0 7.0 ; ( a ) at a condition of X Y = 1.0 7.0 , 0.03 8 ≦ x X + Y < 0.30 8 ⁢ ⁢ and ⁢ ⁢ 0 ≦ y X + Y ≦ 0.35 8 ; and ( b ) 1.0 7.0 < X Y ≦ 1.0 6.9 . ( c )
US10134511B2	Resistance element, electrostatic protection circuit, temperature detection circuit, and electro-optic apparatus A resistance element includes a first electro-conductive layer that is formed on a substrate and includes a body portion and a protruding portion protruding from the body portion, and the body portion includes a current path from an input portion to an output portion. The resistance element further includes a second electro-conductive layer that is formed on the first electro-conductive layer via an insulating layer by using a material having a lower resistivity than the first electro-conductive layer. The resistance element further includes a connection portion that is provided to the insulating layer at a position corresponding to the protruding portion and includes a contact hole penetrating from the first electro-conductive layer to the second electro-conductive layer.
US10134509B1	Electrical power line clamping insulator A clamping insulator for securing electrical wires to support structures includes an insulating second clamp member, and an insulating first clamp member that is hingebly connected to the insulating second clamp member and an eyebolt, wherein the hinge is positioned at an angle relative to the electrical wire, the first clamp member is simply flipped over upon the second clamp member to secure the wire in place, the eyebolt both secures the first and second clamp members in the closed position and allows easy access for a lineman with a hot stick, and, in the closed position, the eyebolt is positioned at a compound angle relative to the ground and supporting structure it sits upon to provide easy access for a hot stick.
US10134508B2	MgB2 superconductive wire material, and production method therefor An MgB2 superconducting wire includes a core containing MgB2 and a metal sheath which surrounds the core. The core includes at least a first MgB2 core positioned on the center side, and a second MgB2 core positioned outside the first MgB2 core, and the density of the second MgB2 core is lower than the density of the first MgB2 core.
US10134507B2	Cable having improved anti cross talk performance A cable (100) includes a plurality of wires (10) and a jacket (20) enclosing the wires. The wires includes a plurality of differential signal wires (11) for transmitting high speed signal, a detection signal wire (12), at least one auxiliary signal wire (13), and a plurality of lower speed signal wires (14). All of the differential signal wires, the detection signal wire and the at least one auxiliary signal wire are arranged at an outer peripheral of and enclosing the lower signal wires. Each two adjacent differential signal wire pairs are separated by one of the detection signal wire and the at least one auxiliary signal wire.
US10134506B2	Electrical characteristics of shielded electrical cables A shielded electrical cable includes one or more conductor sets extending along a length of the cable and being spaced apart from each other along a width of the cable. Each conductor set has one or more conductors having a size no greater than 24 AWG and each conductor set has an insertion loss of less than about −20 dB/meter over a frequency range of 0 to 20 GHz. First and second shielding films are disposed on opposite sides of the cable, the first and second films including cover portions and pinched portions arranged such that, in transverse cross section, the cover portions of the first and second films in combination substantially surround each conductor set, and the pinched portions of the first and second films in combination form pinched portions of the cable on each side of each conductor.
US10134500B2	Crystal direction control of alloyed aluminum wire, alloyed aluminum electric wire, and wire harness using same An aluminum wire 10 has a composition containing at least one element of Fe: 0 to 2.0 mass %, Mg: 0 to 1.0 mass %, Zr: 0 to 0.5 mass %, Si: 0 to 1.2 mass %, or Ni: 0 to 0.3 mass %, with the remainder being composed of aluminum and unavoidable impurities. In a cross section 15 perpendicular to the longitudinal direction 11 of the aluminum wire, the surface area proportion of component crystals for which the angle 14 between the longitudinal direction and the <111> direction of the crystal is 10° or less, relative to the total surface area of the cross section, is 50% or greater, and the surface area proportion of component crystals for which the angle 14 between the longitudinal direction and the <111> direction of the crystal is 20° or less, relative to the total surface area of the cross section, is 85% or greater.
US10134499B2	Scintillation crystal including a co-doped sodium halide A scintillation crystal can include a sodium halide that is co-doped with thallium and another element. In an embodiment, the scintillation crystal can include NaX:Tl, Me, wherein X represents a halogen, and Me represents a Group 1 element, a Group 2 element, a rare earth element, or any combination thereof. In a particular embodiment, the scintillation crystal has a property including, for radiation in a range of 300 nm to 700 nm, an emission maximum at a wavelength no greater than 430 nm; or an energy resolution less than 6.4% when measured at 662 keV, 22° C., and an integration time of 1 microsecond. In another embodiment, the co-dopant can be Sr or Ca. The scintillation crystal can have lower energy resolution, better proportionality, a shorter pulse decay time, or any combination thereof as compared to the sodium halide that is doped with only thallium.
US10134497B2	Methods for producing Cu-67 radioisotope with use of a ceramic capsule for medical applications The present invention provides a method for producing Cu67 radioisotope suitable for use in medical applications. The method comprises irradiating a metallic zinc-68 (Zn68) target within a sealed ceramic capsule with a high energy gamma ray beam. After irradiation, the Cu67 is isolated from the Zn68 by any suitable method (e.g. chemical and or physical separation). In a preferred embodiment, the Cu67 is isolated by sublimation of the zinc in a ceramic sublimation tube to afford a copper residue containing Cu67. The Cu67 can be further purified by chemical means.
US10134494B2	Installation device of reactor repair device and method In an installation device of a reactor repair device and a method, an installation pole (111) connected with an upper portion of a water jet peening device (101), a lifting device (112) that can suspend and support an upper portion of the installation pole (111) and can lift the installation pole (111) from a work floor (121), a moving device (113) that can move the lifting device (112) in two directions intersecting in a horizontal direction, and a position adjustment device (114) that can move the installation pole (111) in the horizontal direction in a state where the installation pole (111) is supported by the lifting device (112).
US10134493B2	Reactor and operating method for the reactor Provided are a nuclear reactor and an operating method for the reactor. The reactor includes a driving system and a safety system. The safety system includes isolation vessels, heat exchangers, a coolant pipe, and a communication pipe. Fluid is distributed in the safety system according to thermal, pressure, and leak conditions.
US10134491B2	Application of compressed magnetic fields to the ignition and thermonuclear burn of inertial confinement fusion targets Application of axial seed magnetic fields in the range 20-100 T that compress to greater than 10,000 T (100 MG) under typical NIF implosion conditions may significantly relax the conditions required for ignition and propagating burn in NIF ignition targets that are degraded by hydrodynamic instabilities. Such magnetic fields can: (a) permit the recovery of ignition, or at least significant alpha particle heating, in submarginal NIF targets that would otherwise fail because of adverse hydrodynamic instability growth, (b) permit the attainment of ignition in conventional cryogenic layered solid-DT targets redesigned to operate under reduced drive conditions, (c) permit the attainment of volumetric ignition in simpler, room-temperature single-shell DT gas capsules, and (d) ameliorate adverse hohlraum plasma conditions during laser drive and capsule compression. In general, an applied magnetic field should always improve the ignition condition for any NIF ignition target design.
US10134490B2	Method and system for monitoring labour progression for an obstetrics patient A graphical user interface is provided displaying a first viewing window selected from a set of possible viewing windows conveying respective feature measurements related to labor progression. At least one viewing window in the set of possible viewing windows conveys a given feature measurement and a safety limit associated to the given feature measurement. The graphical user interface also displays at least one control allowing a user to select a subset of viewing windows from the set of possible viewing windows, the subset of viewing windows including at least one viewing window other than the first viewing window. The selected subset of viewing windows is displayed simultaneously with the first viewing window. In response to the given feature measurement exceeding the associated safety limit, information is displayed to attract the attention of the user to the viewing window conveying the given feature measurement.
US10134489B2	Medical pad and a wetness reporting system with such a medical pad A medical pad includes a piece of substrate with a major surface and an electric circuit on the major surface, a sensor connected with the electric circuit for measuring the electrical resistance of the electric circuit, and a wireless data transceiver or a radio frequency identification (RFID) tag electrically connected with the sensor for receiving results of the measuring from the sensor for subsequent transmission. The system carries out real time self-calibration to adaptively monitor the condition of a medical pad even in the face of changing environment and changing material properties.
US10134486B2	Memory device including a redundancy column and a redundancy peripheral logic circuit A memory device includes a memory cell array including a plurality of memory cells arranged in a plurality of columns including a normal column and a redundancy column for repairing the normal column, a plurality of peripheral logic circuits including a normal peripheral logic circuit and a redundancy peripheral logic circuit for repairing the normal peripheral logic circuit, and a first path selection logic circuit configured to form first paths between the plurality of columns and the plurality of peripheral logic circuits, based on at least one defect from among a defect in at least one of the plurality of columns or a defect in at least one of the plurality of peripheral logic circuits.
US10134481B2	Pre-compensation of memory threshold voltage Methods of operating a memory include storing a first target data state of multiple possible data states of a first memory cell to be programmed in a target data latch coupled to a data node, storing at least one bit of a second target data state of the multiple possible data states of a second memory cell to be programmed in an aggressor data latch coupled to the data node, and programming the first memory cell and performing a program verify operation for the first target data state to determine if the first memory cell is verified for the first target data state. The program verify operation including: an intermediate verify corresponding to an amount of aggression to apply a voltage to the data node when performing the intermediate verify, based on the at least one bit of the second target state stored in the aggressor data latch; and a program verify corresponding to a condition of no aggression to apply to the voltage to the data node when performing the program verify, based on the at least one bit of the second target state stored in the aggressor data latch. The methods including inhibiting the first memory cell from further programming if the first memory cell is verified during the intermediate verify and the at least one bit in the aggressor data latch corresponds to the particular amount of aggression, or the first memory cell is verified during the program verify and the at least one bit in the aggressor data latch corresponds to the condition of no aggression. The second memory cell is a neighbor of the first memory cell.
US10134476B2	Memory system using non-linear filtering scheme and read method thereof A method for controlling a nonvolatile memory device includes requesting a plurality of first sampling values from the nonvolatile memory device, each of the first sampling values representing the number of memory cells having a threshold voltage between a first sampling read voltage and a second sampling read voltage. The first sampling values are processed through a non-linear filtering operation to estimate the number of memory cells having the threshold voltage between the first sampling read voltage and the second sampling read voltage.
US10134475B2	Method and apparatus for inhibiting the programming of unselected bitlines in a flash memory system Various embodiments for inhibiting the programming of memory cells coupled to unselected bit lines while programming a memory cell coupled to a selected bit line in a flash memory array are disclosed. Various embodiments for compensating for leakage current during the programming of memory cells coupled to a selected bit line in a flash memory array also are disclosed.
US10134473B1	Input output scheduling for solid state media Described is a write scheduling scheme for a SSD that significantly increases read performance, in certain embodiments by about 50% compared to a conventional standard write scheduling schemes, for mixed read-write workloads while maintaining the write bandwidth.
US10134472B1	Floating gate architecture for deep neural network application A resistive processing unit (RPU) circuit for use in a neural network application includes at least one floating gate storage device, the floating gate storage device including a floating gate, a control gate and an inject/erase gate. The RPU circuit further includes a feedback circuit connected with the floating gate storage device. The feedback circuit is configured to maintain a substantially constant floating gate potential of the floating gate storage device during an update mode of operation of the RPU circuit, and is disabled during a readout mode of operation of the RPU circuit.
US10134471B2	Hybrid memory architectures Methods and apparatuses for providing a hybrid memory module having both volatile and non-volatile memories to replace a DDR channel in a processing system.
US10134470B2	Apparatuses and methods including memory and operation of same Disclosed herein is a memory cell. The memory cell may act both as a combined selector device and memory element. The memory cell may be programmed by applying write pulses having different polarities. Different polarities of the write pulses may program different logic states into the memory cell. The memory cell may be read by read pulses all having the same polarity. The logic state of the memory cell may be detected by observing different threshold voltages when the read pulses are applied. The different threshold voltages may be responsive to the different polarities of the write pulses.
US10134469B1	Read operation with data latch and signal termination for 1TNR memory array Two-terminal memory can be formed into a memory array that contains many discrete memory cells in a physical and a logical arrangement. Where each memory cell is isolated from surrounding circuitry by a single transistor, the resulting array is referred to as a 1T1R memory array. In contrast, where a group of memory cells are isolated from surrounding circuitry by a single transistor, the result is a 1TnR memory array. Because memory cells of a group are not isolated among themselves in the 1TnR case, bit disturb effects are theoretically possible when operating on a single memory cell. Read operations are disclosed for two-terminal memory devices configured to mitigate bit disturb effects, despite a lack of isolation transistors among memory cells of an array. Disclosed operations can facilitate reduced bit disturb effects even for high density two-terminal memory cell arrays.
US10134459B2	MRAM with metal-insulator-transition material Memory cells and methods for forming a memory cell are disclosed. The memory cell includes a first selector having a first gate coupled to a first word line (WL) and first and second source/drain (S/D) regions, and a second selector having a second gate coupled to a second WL and first and second S/D regions. The second S/D regions of the first and the second selectors are a common S/D region. The first and the second WLs are a common WL and the second S/D regions of the first and second selectors are coupled to a source line (SL). The memory cell includes a storage element which includes a magnetic tunnel junction (MTJ) element coupled with a bit line (BL) and the first and the second selectors, and a voltage control switch which includes a metal-insulator-transition (MIT) material coupled with the first selector.
US10134458B2	Electronic device and method for fabricating the same Provided is an electronic device including a semiconductor memory. The semiconductor memory may include: an under layer including first and second metal layers and a barrier layer having a dual phase structure of different crystal structures and interposed between the first and second metal layers; a first magnetic layer positioned over the under layer and having a variable magnetization direction; a tunnel barrier layer positioned over the first magnetic layer; and a second magnetic layer positioned over the tunnel barrier layer and having a pinned magnetization direction, and the under layer may further include a barrier layer having a dual phase structure between the first and second metal layers.
US10134454B2	Apparatuses, circuits, and methods for biasing signal lines Apparatuses, circuits, and methods are disclosed for biasing signal lines in a memory array. In one such example the memory array includes a signal line coupled to a plurality of memory cells and is configured to provide access to the plurality of memory cells responsive to a biasing condition of the signal line. The memory array also includes a signal line driver coupled to the signal line, the signal line driver configured to provide a biasing signal to the signal line and to provide a preemphasis in the biasing signal responsive to a control signal. The control signal is responsive to an operating condition.
US10134453B2	Invert operations using sensing circuitry The present disclosure includes apparatuses and methods related to performing logical operations using sensing circuitry. An example apparatus comprises an array of memory cells and sensing circuitry coupled to the array. The sensing circuitry includes a plurality of sensing components coupled to a controller. The controller is configured to selectively activate a first control line and a second control line to invert signals stored on a latch.
US10134446B1	Heat-assisted rotating disk magnetometer for ultra-high anisotropy magnetic measurements An apparatus comprises a spindle to rotate a magnetic recording medium and a magnetic field generator to expose a track of the medium to a DC magnetic field. The magnetic field generator is configured to saturate the track during an erase mode and reverse the DC magnetic field impinging the track during a writing mode. A laser arrangement heats the track during the erase mode and, during the writing mode, heats the track while the track is exposed to the reversed DC magnetic field so as to write a magnetic pattern thereon. A reader reads the magnetic pattern and generates a read signal. A processor is coupled to the reader and configured to determine an anisotropy parameter using the read signal. The apparatus can further comprise a Kerr sensor that generates a Kerr signal using the magnetic pattern.
US10134434B2	Magnetic graphene A method of making magnetic graphene comprising transferring or growing a graphene film on a substrate, functionalizing the graphene film, hydrogenating the graphene film and forming fully hydrogenated graphene, manipulating the extent of the hydrogen content, and forming areas of magnetic graphene and non-magnetic graphene. A ferromagnetic graphene film comprising film that has a thickness of less than two atom layers thick.
US10134433B2	Magnetic tape device, magnetic reproducing method, and head tracking servo method Provided is a magnetic tape device in which a magnetic tape transportation speed is equal to or lower than 18 m/sec, Ra measured regarding a surface of a magnetic layer of a magnetic tape is equal to or smaller than 2.0 nm, a C-H derived C concentration calculated from a C-H peak area ratio of C1s spectra obtained by X-ray photoelectron spectroscopic analysis performed on the surface of the magnetic layer at a photoelectron take-off angle of 10 degrees is 45 to 65 atom %, and ΔSFD (=SFD25° C.−SFD−190° C.) in a longitudinal direction of the magnetic tape is equal to or smaller than 0.50, with the SFD25° C. being SFD measured in a longitudinal direction of the magnetic tape at a temperature of 25° C., and the SFD−190° C. being SFD measured at a temperature of −190° C.
US10134428B1	Selective data writer coil A data writer may be constructed and operated as part of a data storage device. The data writer can be positioned proximal a data storage medium. The data writer may have a write pole positioned adjacent a writer coil with the writer coil having a plurality of turns. A controller that is connected to each turn can be adapted to selectively activate less than all the coil turns in response to the data writer being positioned over a first portion of a data storage medium and selectively activate all of the coil turns in response to the data writer being positioned over a second portion of the data storage medium.
US10134423B2	System and method to provide classification of noise data of human crowd System(s) and method(s) for classifying noise data of human crowd are disclosed. Noise data is captured from one or more sources and features are extracted by using computation techniques. The features comprise spectral domain features and time domain features. Classification models are developed by using each of the spectral domain features and the time domain features. Discriminative information with respect to the noise data is extracted by using the classification models. A performance matrix is computed for each of the classification model. The performance matrix comprises classified noise elements with respect to the noise data. Each classified noise element is associated with a classification performance score with respect to a spectral domain feature, a time domain feature, and fusion of features and scores. The classified noise elements provide the classification of the noise data.
US10134406B2	Noise signal processing method, noise signal generation method, encoder, decoder, and encoding and decoding system Present disclosure provide a linear prediction-based noise signal processing method includes: acquiring a noise signal, and obtaining a linear prediction coefficient according to the noise signal; filtering the noise signal according to the linear prediction coefficient, to obtain a linear prediction residual signal; obtaining a spectral envelope of the linear prediction residual signal according to the linear prediction residual signal; and encoding the spectral envelope of the linear prediction residual signal. According to the noise processing method, the noise generation method, the encoder, the decoder, and the encoding and decoding system that are in the embodiments of the present disclosure, more spectral details of an original background noise signal can be recovered, so that comfort noise can be closer to original background noise in terms of subjective auditory perception of a user, and subjective perception quality of the user is improved.
US10134402B2	Signal processing method and apparatus The present disclosure provide a signal processing method and apparatus. The method includes: determining a total quantity of to-be-allocated bits corresponding to a current frame; implementing primary bit allocation on to-be-processed sub-bands; performing a primary information unit quantity determining operation for each sub-band that has undergone the primary bit allocation; selecting sub-bands for secondary bit allocation from the to-be-processed sub-bands according to at least one of a sub-band characteristic of each sub-band of the to-be-processed sub-bands or the total quantity of surplus bits; implementing secondary bit allocation on the sub-bands for secondary bit allocation; and performing a secondary information unit quantity determining operation for each sub-band of the sub-bands for secondary bit allocation.
US10134400B2	Diarization using acoustic labeling Systems and method of diarization of audio files use an acoustic voiceprint model. A plurality of audio files are analyzed to arrive at an acoustic voiceprint model associated to an identified speaker. Metadata associate with an audio file is used to select an acoustic voiceprint model. The selected acoustic voiceprint model is applied in a diarization to identify audio data of the identified speaker.
US10134397B2	Reducing latency caused by switching input modalities Methods, apparatus, and computer-readable media (transitory and non-transitory) are provided herein for reducing latency caused by switching input modalities. In various implementations, a first input such as text input may be received at a first modality of a multimodal interface provided by an electronic device. In response to determination that the first input satisfies one or more criteria, the electronic device may preemptively establish a session between the electronic device and a query processor configured to process input received at a second modality (e.g., voice input) of the multimodal interface. In various implementations, the electronic device may receive a second input (e.g., voice input) at the second modality of the multimodal interface, initiate processing of at least a portion of the second input at the query processor within the session, and build a complete query based on output from the query processor.
US10134391B2	System and method for dynamic ASR based on social media System and method to adjust an automatic speech recognition (ASR) engine, the method including: receiving social network information from a social network; data mining the social network information to extract one or more characteristics; inferring a trend from the extracted one or more characteristics; and adjusting the ASR engine based upon the inferred trend. Embodiments of the method may further include: receiving a speech signal from a user; and recognizing the speech signal by use of the adjusted ASR engine. Further embodiments of the method may include: producing a list of candidate matching words; and ranking the list of candidate matching words by use of the inferred trend.
US10134385B2	Systems and methods for name pronunciation Systems and methods are provided for associating a phonetic pronunciation with a name by receiving the name, mapping the name to a plurality of monosyllabic components that are combinable to construct the phonetic pronunciation of the name, receiving a user input to select one or more of the plurality, and combining the selected one or more of the plurality of monosyllabic components to construct the phonetic pronunciation of the name.
US10134384B2	System and method for synthesizing human speech A method and apparatus are described for detecting voice related vibration in the upper region of the chest and synthesizing human speech. The innovation finds its use in speech rehabilitation applications among others, specifically in speech impairments and speech disability arising due to accident, congenital defects or other reasons. A set of piezoelectric based sensors are placed on an upper region of the chest atop or near sound tendons. The sensors pick up the vibrations in the sound tendons and convert the vibrations into electrical output signals. These signals are filtered, amplified and processed using the signal recognition unit. Subsequently, a set of parameters are extracted and used to generate speech or a written text. The sensors incorporate piezoelectric or other transducing materials. These sensors are externally affixed to a human body surface corresponding to the position of the sounds tendons in the upper chest/neck region.
US10134383B2	System and method for distributed voice models across cloud and device for embedded text-to-speech Systems, methods, and computer-readable storage media for intelligent caching of concatenative speech units for use in speech synthesis. A system configured to practice the method can identify, in a local cache of text-to-speech units for a text-to-speech voice an absent text-to-speech unit which is not in the local cache. The system can request from a server the absent text-to-speech unit. The system can then synthesize speech using the text-to-speech units and a received text-to-speech unit from the server.
US10134380B2	Noise and vibration sensing A noise and vibration sensor arrangement which is configured to operate with a road noise control system, and includes four acceleration sensors each configured to generate at least one output signal representative of at least one of accelerations, motions and vibrations that act on the respective acceleration sensor. The arrangement includes a vehicle subframe structure having a shape that is axisymmetric to a first axis and that has a maximum extent along a second axis. The first and the second axis are perpendicular. The four sensors are attached to the subframe structure at positions that correspond to four corners of a virtual rectangle. The virtual rectangle has two perpendicular centerlines, one of the centerlines being in line with the first axis of the subframe structure. The extent of the virtual rectangle along the other centerline is less than fifty percent of the subframe structure's maximum extent along the second axis.
US10134379B2	Acoustic wall assembly having double-wall configuration and passive noise-disruptive properties, and/or method of making and/or using the same Certain example embodiments relate to an acoustic wall assembly that uses active and/or passive sound reverberation to achieve noise-disruptive functionality, and/or a method of making and/or using the same. With the active approach, sound waves in a given frequency range are detected by a sound masking circuit. Responsive to detection of such sound waves, an air pump (e.g., speaker) is used to pump air in the wall assembly to actively mask the detected sound waves via reverberation and/or the like. The wall assembly may include one, two, or more walls, and the walls may be partial or full walls. With the passive approach, sound waves in a given frequency range are disrupted via features (e.g., holes, slits, etc.) formed in and/or on a wall itself. These techniques may be used together or separately, in different example embodiments.
US10134373B2	Machine-control of a device based on machine-detected transitions Apparatus, methods, and systems that operate to perform machine-control of a device based on machine-detected transitions are disclosed.
US10134370B2	Smart mirror with focus control An electronic device includes a display unit configured to display a plurality images, an eye tracking sensor configured to detect a eye-focused area on the display unit, a reflective layer, a reflective control layer configured to change a regional reflectivity of the reflective layer, and a processor configured to receive the eye-focused area on the display unit from the eye tracking sensor, and determine a focus image within the eye-focused area and an unfocused image out of the eye-focused area, and cause the reflective control layer to reflect the unfocused image. In some embodiment, the processor is configured to cause the reflective control layer not to reflect the focused image.
US10134367B2	Rendering texts on electronic devices In one embodiment, dividing a set of texts into one or more text blocks, each text block including a portion of the set of texts; rendering each text block to obtain one or more rendered text blocks; determining a placement instruction for each rendered text block, the placement instruction indicating a position of the rendered text block when it is displayed; and sending the one or more rendered text blocks and their respectively associated placement instructions to an electronic device for displaying on the electronic device.
US10134366B2	Timing-based scheduling for computer-generated animation A method of scheduling and performing computations for generating an interactive computer-generated animation on behalf of a client device to achieve a desired quality of service includes generating a computational configuration of computations that, when performed, produce the computer-generated animation with the desired quality of service. The configuration includes an identification of a first computation that outputs first data, a first start time for the first computation, and a first end time, where the first computation is to end before the first end time. The configuration also includes an identification of a second computation that depends on the first data, and a second start time for the second computation. The first computation is performed in response to an occurrence of the first start time and the second computation is performed in response to an occurrence of the second start time.
US10134359B2	Device or method for displaying image Improving the visibility of the dark portion and to prevent the degradation of image quality caused by excessive correction. A reflectance calculation unit is storing a parameter RGain for adjusting the amplitude of a reflectance component R. An illumination light correction unit generates a corrected illumination light component L1 from an illumination light component L and a formula L1=(log(LAmpL+1))/(log(LAmp+1)). An image resynthesis unit obtains a corrected illumination light component L′ from L′=LGainL1+(1−LGain)*L. The image resynthesis unit also calculates a corrected image Iout from the corrected illumination light component L′ and the corrected reflectance R′, as well as from a formula Iout=exp(log L′+RGain(log I−log L)). The value of the corrected illumination light component (L′) is determined based on the ratio (LGain) at which the output value of the correction function (L1) and the original illumination light component (L) are combined.
US10134357B2	System and method for device pairing, and mobile terminal The present invention relates to a system and a method for device pairing which can pair a plurality of terminals using a brightness value change pattern. The system for device pairing according to an embodiment of the present invention comprises: an apparatus including a display; n terminals; and a server for connecting the apparatus including the display with the n terminals. The server assigns an ID to the apparatus including the display in accordance with an access request of the apparatus. The apparatus including the display calculates a brightness value change pattern corresponding to the ID, and outputs the pattern on the display. The n terminals can identify the ID after detecting the pattern outputted on the display using a proximity sensor and an illuminance sensor, transmit the ID to the server, and request an access.
US10134356B2	Transmission apparatus, method of transmitting image data with wide color gamut, reception apparatus, method of receiving image data with color gamut A transmission apparatus includes a data transmission unit that transmits image data with a wide color gamut to an external apparatus over a transmission path; and an information transmission unit that transmits additional information on the image data with the wide color gamut that is transmitted by the data transmission unit and information on a transmission method for the additional information, to the external apparatus over the transmission path.
US10134355B2	Two-phase hybrid vertex classification A processor performs vertex coloring for a graph based at least in part on the degree of each vertex of the graph and based at least in part with another coloring approach, such as comparison of random values assigned to the vertices. For each vertex in the graph, a processor determines whether the degree of the vertex is a local maximum; that is, whether the degree of the vertex is greater than the degree of each of its connected vertices. Each vertex having a local-maximum degree is assigned a specified or randomly selected color, and is then omitted from future iterations of the coloring process. After a stop criterion is met, the processor assigns random values to the remaining uncolored vertices and assigns colors based on comparisons of the random values.
US10134353B2	Gate driving circuit, display panel and display apparatus having the same, and driving method thereof The present application discloses a display panel having a plurality of gate lines and a gate driving circuit for driving the plurality of gate lines, the gate driving circuit including a plurality of first cascaded shift register units and a plurality of second cascaded shift register units for applying gate scanning signals to gate lines connected thereto. The display panel includes a first pair of first cascaded shift register unit and second cascaded shift register unit; a second pair of first cascaded shift register unit and second cascaded shift register unit; the second pair adjacent to the first pair; the first cascaded shift register unit in the first pair is electrically coupled to the second cascaded shift register unit in the second pair; and the second cascaded shift register unit in the first pair is electrically coupled to the first cascaded shift register unit in the second pair; a first group of gate lines connecting the first pair of first cascaded shift register unit and second cascaded shift register unit; and a second group of gate lines connecting the first cascaded shift register unit in the first pair and the first cascaded shift register unit in the second pair. The gate driving circuit includes a first column of cascaded shift register units and a second column of cascaded shift register units, the first column and the second column having a same number of cascaded shift register units; the first cascaded shift register unit in the first pair is an odd numbered cascaded shift register unit in the first column, the second cascaded shift register unit in the first pair is an odd numbered cascaded shift register unit in the second column, the first cascaded shift register unit in the second pair is an even numbered cascaded shift register unit in the second column, and the second cascaded shift register unit in the second pair is an even numbered cascaded shift register unit in the first column.
US10134351B2	Display device A display device includes pixel electrodes formed in an image display area of a substrate, a common electrode formed in the image display area, inside signal lines formed inside the image display area, and electrically connected to the pixel electrodes, outside signal lines formed outside the image display area, and electrically connected to the inside signal lines, and a common line formed inside and outside the image display area, and electrically connected to the common electrode. An image is displayed under a control of a light using an electric field developed between the pixel electrodes and the common electrode. A coupling capacitance is formed between the inside signal lines and the common electrode. The outside signal lines each include a first portion, and a second portion higher in electric resistance than the first portion and the inside signal lines.
US10134342B2	Systems and methods for producing narrowband images A system may produce images including narrow-bandwidth colors. One or more sets of the narrow-bandwidth colors may be selected to be interpreted as substantially a same color by a user. The system may include a light source configured to produce the narrow-bandwidth colors, and/or narrow-passband filters may create narrow-bandwidth colors from light emitted by broad-spectrum light sources or color sources. Spatial and/or time multiplexing may be used to create separate narrow-bandwidth colors interpreted as substantially a same color by the user. The light source and/or the narrow-passband filter elements may be adjustable and may alternate between emission of two or more narrow-bandwidth colors. A viewing device may include filters configured to selectively filter the narrow-bandwidth colors. The user may filter the narrow-bandwidth colors to separate a stereoscopic image pair, to view an image specific to a user, to view desired content obfuscated by an obfuscating image, and/or the like.
US10134338B2	Inverter, gate driving circuit and display apparatus The present disclosure relates to display technology, and provides an inverter, a gate driving circuit and a display apparatus, capable of solving the problem that it is difficult to apply Scan Power technology in the display apparatus since a power signal outputted from the inverter has a small current. The inverter comprises: a current amplification module configured to amplify a current of the output terminal of the inverter based on a signal at a first clock signal terminal, a signal at a second clock signal terminal, a signal at a third clock signal terminal, a signal at a fourth clock signal terminal, a signal at a first input signal terminal, and a signal at a second input signal terminal, and to control the output terminal of the inverter to output a high level signal; and a pull-down module configured to control the output terminal of the inverter to output a low level signal. The inverter according to the present disclosure may be applied in a display apparatus employing the Scan Power technology.
US10134335B2	Systems and method for fast compensation programming of pixels in a display Circuits for programming a circuit with decreased programming time are provided. Such circuits include a storage device such as a capacitor for storing display information and for ensuring a driving device such as a driving transistor drives a light emitting device according to the display information. To increase programming time, the pixel circuits may be pre-charged or a biasing current may be applied to charge and/or discharge a data line and/or the driving device. Aspects of the present disclosure allow for the biasing current to drain partially through the storage device to allow the portion of the biasing current applied to the driving device to remain small while the data line discharges. Furthermore, the present disclosure provides display architectures and operation schemes for display arranged in segments each including a plurality of pixel circuits.
US10134333B2	Display device and method of driving the same A display device includes a display panel, a controller, a power supplier, and an initialization voltage generator. The controller generates a power control signal based on an input image. The power supplier generates a variable driving voltage that is changed based on the power control signal. The initialization voltage generator changes an initialization voltage to initialize the pixels based on the variable driving voltage.
US10134320B2	Color filter and manufacturing method thereof, display panel, display device and driving method thereof A color filter and a manufacturing method, a display panel, and a display device and a driving method are provided. The color filter includes a plurality of color resists which include red resists (R), green resists (G) and blue resists (B); and the color filter includes a plurality of pixel regions arranged in a matrix, each pixel region comprises a red sub-pixel region comprising an even number of red sub-sub-pixel regions, a green sub-pixel region including an even number of green sub-sub-pixel regions, a blue sub-pixel region including an even number of blue sub-sub-pixel regions, each red sub-sub-pixel region is provided with a red resist, each green sub-sub-pixel region is provided with a green resist, and each blue sub-sub-pixel region is provided with a blue resist. The manufacturing precision and alignment accuracy of a mask for this color filter is lower than a current technology and reduce the manufacturing difficulty.
US10134319B2	Illumination display device with illumination region control, electronic apparatus and control method therefor Provided is a display device capable of illuminating a region desired by a user with a simple operation. A display device according to one exemplary embodiment of the invention includes a display means, a touch panel that is disposed on the display means and outputs coordinate information of a contact point, and a control means that sets a region around a contact point as an illumination region when contact with the touch panel is made at one point and sets a region interposed between a first contact point and a second contact point as the illumination region when contact with the touch panel is made at two points based on the coordinate information of the contact point.
US10134312B2	Interchangeable covers for stanchions Certain embodiments disclose a cover fitting over the base of a stanchion. Printed graphics may be included on the cover. The cover may be selectively removed and replaced with a different cover.
US10134307B2	Software application for a portable device for CPR guidance using augmented reality A method for guiding a user in performing a Cardio-Pulmonary Resuscitation (CPR) procedure on a patient involving a user portable device comprising a camera, and a display. The method includes receiving a video of the patient captured by the camera, and processing the video to segment a chest region of the patient. A target position on the chest where to position hands for performing CPR is then determined, and this position is then shown on the display, hereby guiding the user in obtaining a suitable hand position for performing CPR. The method can be implemented as a software application in a personal portable device such as a smart phone, a tablet application software, a wearable computer with head-mounted display etc. Further, the video of the scene captured by the camera can be processed to provide information regarding functional quality of CPR, e.g. compression frequency and depth, during the CPR procedure. Further, vital signs of the patient such as heart rate, respiration rate, and blood oxygen saturation may be derived by image processing on the video, i.e. without any dedicated medical sensors. All such information can be provided as visual and/or audible feedback to the user during the CPR procedure, thus improving CPR effectiveness, also in case of an untrained user.
US10134306B2	Apparatus for simulating insertion of an elongated instrument into a structure and medical insertion simulator The present disclosure relates to an apparatus for simulating insertion of an elongated instrument attached to a tether into a structure. The apparatus comprises a casing having an aperture for receiving a distal end of the tether therethrough. The apparatus has a pulley having an outer tether receiving groove on a peripheral portion and an anchoring element therein for anchoring the distal end of the tether, the pulley rotating according to a longitudinal translation of the tether relatively to the casing. The apparatus has a sensing arrangement for sensing an angular position of the pulley representative of a relative longitudinal position of the elongated instrument. The apparatus has a feedback force actuator for applying an adjustable resistive force to a rotation of the pulley according to the sensed angular position and resistance characteristics of the structure. The present disclosure also relates to a medical insertion simulator comprising such an apparatus.
US10134304B1	Scanning obstacle sensor for the visually impaired Various arrangements for avoiding obstacles for a visually-impaired pedestrian are presented. An m by n matrix of distance measurements may be created using a scanning time of flight (ToF) sensor component for various different directions. The m by n matrix of distance measurements and the m by n direction matrix may be analyzed to identify a first obstacle having a vertical height that differs by at least a predefined threshold measurement from a neighboring second region. Based on identifying the first obstacle, an indication of the first obstacle and an indication of the distance to the first obstacle determined using the m by n matrix of distance indications may be output.
US10134300B2	System and method for computer-assisted instruction of a music language The subject matter discloses a computerized system to assist teaching and learning a written music language the system comprising a processor configured to obtain a reference music data object, wherein the reference music data object comprises a sequence of note properties, said note properties comprise one or more note parameters; extract the note properties from the music data object; determine an associated note syllable based on the note properties; generate a visual music notation according to the note properties, and generate a synthesized solfege singing sound according to the determined note syllable and the note properties; a display unit configured to display the music notation; and, an audio generation unit configured to output the synthesized solfege singing sound to a user of the computerized system.
US10134299B2	Systems and methods for flight simulation Systems and methods are provided for training a user to control an unmanned aerial vehicle (UAV) in an environment. The systems and methods provide a simulation environment to control a UAV in a virtual environment. The virtual environment closely resembles a real flight environment. The controller used to transmit flight commands and receive flight state data can be used in both simulation and flight modes of operation.
US10134294B2	System, apparatus, and method using ADS-B and TCAS data for determining navigation solutions for a vehicle A system using automatic dependent surveillance-broadcast (ADS-B) data and traffic alert and collision avoidance system (TCAS) data for determining navigation solutions for a vehicle is provided. The system has a communal position system (CPS) with a CPS sensor located in the vehicle. The CPS sensor receives ADS-B data and TCAS data from each of one or more proximate vehicles. The system further has a computer system coupled to the CPS. The computer system is configured to perform the steps of: checking the ADS-B data and the TCAS data for data reasonableness; performing data synchronization of the ADS-B data and the TCAS data; and computing a CPS position and a position accuracy based on the ADS-B data and the TCAS data. The navigation solutions include an alternate navigation solution, an independent navigation solution, and a complementary navigation solution.
US10134293B2	Systems and methods for autonomous drone navigation Described are systems, methods, and computer readable medium for a drone navigation system. Exemplary embodiments provide a drone with an imaging device and a computing device in communication with the drone. The computing device receives a selection of a CAD blueprint that includes measurements of an interior portion of a building, and receives a start point and an end point on the blueprint. The computing device analyzes the blueprint and generates a route from the start point to the end point, and determines a first set of instructions in terms of distance and degrees to navigate the generated route. The computing device processes the first set of instructions to generate a second set of instructions in terms of yaw, pitch and roll. The second set of instructions are exported to the drone to cause the drone to navigate the generated route in the building.
US10134291B2	System and method for management of airspace for unmanned aircraft A system and method for management of airspace for unmanned aircraft is disclosed. The system and method comprises administration of the airspace including designation of flyways and zones with reference to features in the region. The system and method comprises administration of aircraft including registration of aircraft and mission. A monitoring system tracks conditions and aircraft traffic in the airspace. Aircraft may be configured to transact with the management system including to obtain rights/priority by license and to operate in the airspace under direction of the system. The system and aircraft may be configured for dynamic transactions (e.g. licensing/routing). The system will set rates for licenses and use/access to the airspace and aircraft will be billed/pay for use/access of the airspace at rates using data from data sources.
US10134285B1	FleetCam integration A system and method for integrating a vehicular camera system is disclosed. A threshold value for metadata of one or more sensor devices and the vehicular camera system positioned in a first carrier vehicle is determined. Captured metadata is processed to determine whether the threshold value is exceeded, and a plurality of images is captured by one or more cameras of the vehicular camera system for a predetermined period, in response to exceeding the threshold value for metadata of the one or more sensor devices. The plurality of metadata is linked with each image from the plurality of captured images by matching the collection time of the metadata with the collection time for each image from the plurality of captured images, and a first image selected from the plurality of captured images is communicated along with the metadata linked to the first image, to at least one electronic device.
US10134283B2	Road surface image-drawing system for vehicle In this invention, letters that can be seen by a pedestrian (101) are drawn on an intersection (103). A mark (MM2) that can be seen by the driver of the host vehicle (C) is drawn on the road (104) between the intersection (103) and the host-vehicle (C). The shapes of the letters (MO4) are corrected in accordance with the positional relationship between the pedestrian (101) and the intersection (103). The shape of the mark (MM2) is corrected in accordance with the positional relationship between the driver of the host-vehicle (C) and the road (104).
US10134281B2	Collision avoidance system and collision avoidance method Route information indicating a preset route is acquired. Host vehicle position information indicating the position of a host vehicle is acquired. It is detected whether a direction indicator providing advance notice of a traveling direction of the host vehicle is on or off. If the position of the host vehicle agrees with a position on the route, the position of the host vehicle approaches a position to turn on the route, and it is detected that the direction indicator is off, a warning operation pertaining to a warning directed at another vehicle traveling in the vicinity of the host vehicle is performed.
US10134277B2	Method and system for providing traffic information A method for prompting traffic condition information, comprising: a server obtaining traffic condition information about a road network (101); a client determining a candidate driving route and sending to the server a traffic condition information request aiming at the candidate driving route, and the server receiving the traffic condition information request, extracting traffic condition information about the candidate driving route from the traffic condition information about the road network, and sending to the client the traffic condition information about the candidate driving route; alternatively, the server actively sending to the client the traffic condition information about the road network (102); and the client displaying the traffic condition information provided by the server (103). The method can prompt traffic condition information in time, thereby improving the reminding efficiency; it can also be applied in various terminal devices, and can be used across platform terminals, thereby having a wide scope of application.
US10134274B2	Remote control with enhanced modularity Various devices, systems, products and methods for customizing a remote control are presented. Sensors are optionally used to aid in the identification of users and user specific remote control configurations and layouts are optionally automatically loaded upon determination that a different user is handling the remote control. The devices, systems, products and methods are useful for minimizing inadvertent changes to system setting and modes due to unanticipated or accidental presses of buttons on a remote control.
US10134271B1	Vehicle integration with security and/or automation systems A system and method for controlling a security and/or automation system using a aspects of a vehicle. The method may include receiving confirmation of a user's presence in the vehicle, receiving confirmation of vehicle operation, displaying on a display of the vehicle at least one control option for a security and/or automation system of a property monitored by the security and/or automation system, receiving at least one user input on the display related to the at least one control option, and transmitting instructions to control the security and/or automation system based on the at least one user input.
US10134267B2	System and method for tracking a passive wand and actuating an effect based on a detected wand path A system in accordance with present embodiments includes a source of electromagnetic radiation that operates to emit electromagnetic radiation into an active playing area. The system also includes a sensing device that operates to receive the electromagnetic radiation after being reflected from a retro-reflective material of an article positioned in the active playing area and operable to generate data based on receiving reflected electromagnetic radiation from a series of article positions. Further, the system includes a controller that operates to process the data generated by the sensing device to determine whether the series of article positions correlate to a stored gesture and output a control signal to actuate an effect when the series of article positions correlate to the stored gesture.
US10134263B2	Multi alarm remote monitoring system A remote alarm monitoring system (10) for recording and processing alarm event data. The alarm system (10) comprises one or more alarm devices (12) in connection with an interface (14), wherein the interface (14) is configured to receive alarm event data; a server (18) in communication with the interface (14), wherein the server (18) is configured to receive and process alarm event data from the interface (14); and one or more networked client devices (22) in communication with the server (18), wherein the server (18) is configured to transmit a message to the networked client device (22), said message based upon the processed alarm event data.
US10134261B1	Method and apparatus for vehicular item tracking A vehicle comprising includes lights and a controller. The controller, responsive to reception of signals indicative of an opening and closing of a door of the vehicle, the vehicle being within boundaries of a predetermined locale, and an item being within the vehicle, blinks the lights.
US10134259B2	Asset-based weather and event alerts In an approach for asset management, a processor identifies the location of an asset. A processor receives information specific to the location of the asset. A processor determines that an alert is required based on at least the asset, the location of the asset, and the information specific to the location of the asset. A processor generates an alert.
US10134258B2	Car occupant temperature alert Improvements in an abandoned baby, infant, child or animal alter system is disclosed. When a child or animal is being transported with a driver in the vehicle, the driver will generally maintain a comfortable temperature in the interior of the vehicle. The temperature and temperature changes are monitored to determine that a child or animal is unattended. The monitor is coupled with a connection in the car, a seat belt of a baby seat or integrated into the baby seat. Integrating the sensor with a seat belt or buckle provides a switch for operation of the sensor. The signaling system can be integrated with the light, horn or alarm or can be connected to a cellular network, Wi-Fi or other radio communications system to send a notification that a baby, infant, child or animal has been left and secured in a vehicle and needs attention.
US10134252B1	Dual-sided security marker Systems and methods for making a marker. The methods comprise: obtaining a marker housing having first and second cavities formed therein; disposing a first resonator in the first cavity and a second resonator in a second cavity; and placing a bias element at a location on or in the marker so that the first and second resonators are (a) equally spaced apart from the same bias element and (b) biased by the same bias element when the marker is in use to oscillate at a frequency of a received transmit burst.
US10134251B2	Wrap for an item of merchandise A merchandise security device configured for use with an electronic key for locking and/or unlocking a lock mechanism is provided. The merchandise security device may include a housing operably coupled with a cable, wherein the cable is configured to be extended and retracted relative to the housing and to at least partially surround an item of merchandise. The security device may also include a lock mechanism configured to releasably secure the cable relative to the housing for locking the cable about the item of merchandise. In addition, the lock mechanism is configured to receive electrical power for unlocking the lock mechanism so that the housing and the cable may be removed from the item of merchandise.
US10134247B2	Active emergency exit systems for buildings An active exit system may include one or more active exit signs, each exit sign having at least one sensor, a display, and a transceiver. Each active exit sign monitors building environmental conditions, monitors the locations of users and objects within the building, and assists in location services during normal operation. The exit signs transmit a dynamic exit plan to a user's electronic device based on the user's location. In response to sensing an emergency event, the exit sign transmits an emergency signal to the user's electronic device and updates a user's exit plan as needed based on the location of the emergency event. The exit sign also transmits user location information to emergency responders.
US10134246B2	Signaling device with light module An optical signaling device, in particular a signal pillar (1) of modular construction or similar with at least one first exchangeable light module (3) comprising at least one light element (10) is proposed for optical indication of one or more different operating states of a technical device (2) such as a machine, a plant, a vehicle or similar, wherein the first light module (3) comprises at least one first circuit board (11) oriented essentially in direction of a longitudinal axis (8) of the signaling device with the at least one first light element (10) and electrical components, wherein at least one contact (32) is provided between at least one first detachably contactable electrical contact surface (19) and a second electrical contact surface (18) of an adjacently arranged module (3, 4, 5, 6, 7) configured as a second light module (3) and/or as a holding module (5) and/or as a base module (6) for holding and connecting the signaling device at an operating position, wherein the adjacently arranged module (3, 4, 5, 6, 7) comprises at least one second circuit board (11) oriented essentially in direction of the longitudinal axis (8), which meets stringent requirements as regards the contacting between two adjacent modules and at the same time the constructional expenditure and/or realizes an improved energy/power supply of the modules. According to the invention this is achieved in that at least the two electrical contact surfaces (18, 19) of the contact (32), which can be detachably contacted with each other, are arranged between the first circuit board (11) and the second circuit board (11) in direction of the longitudinal axis (8).
US10134245B1	System, method, and apparatus for monitoring audio and vibrational exposure of users and alerting users to excessive exposure A system, method, and apparatus for monitoring ambient sound and vibration levels at the location of a user allows a determination as to whether the user is exceeding a maximum allowed exposure time as determined by an occupational standard. The sound and vibration level data can be evaluated locally at the mobile communication device, as well as transmitted to a backend system to allow supervision of personnel associated with the backend system as a further assurance that personnel comply with exposure limits. Further, the mobile communication device, in response to ambient conditions, adjusts the settings of its alerting sound and the vibration level of an associated vibration accessory to ensure perception of alerts by the mobile communication device for the user of the mobile communication device.
US10134242B2	Systems and methods for allowing players to play poker games having multiple decks A system for providing a poker-type card game to a plurality of players is described herein. The system includes a display device for displaying the game, a database for storing a plurality of player decks, and a controller coupled to the database. The controller is configured to provide a plurality of player decks with each of the plurality of player decks including a set of randomly-ordered playing cards, assign a player deck of the plurality of player decks to each of the plurality of players, and conduct a first round of the game. During a round, the controller distributes a player hand to each of the plurality of players. Each of the player hands includes one or more cards being distributed from a corresponding player deck assigned to the player.
US10134241B2	Gaming device and method for poker game having additional award opportunities Embodiments of the present invention set forth systems, apparatuses and methods for facilitating a poker game having additional award opportunities. Accordingly, a gaming device can be configured to include a display, a player interface, and a processor configured to deal a first poker hand and evaluate the first poker hand. The processor is further configured to deal at least one additional card to the first poker hand to create a second poker hand, and to then evaluate the second poker hand.
US10134240B1	Types of games based on user-selected game pieces, and game-operating computer systems and computer-implemented methods thereof In some embodiments, the present invention provides for a specifically programmed game operating computer system for conducting a personalized game requiring each player to only select a single player-selected game piece to play a personalized instance of the game, where the exemplary system includes following components: a specialized computer machine, including: a non-transient memory, storing program code; and a processor configured to perform: requiring, in real-time, via a graphical interface, each player to select a single player-selected game piece out of a pool of game pieces; receiving, in real time, from each player: a selection of the single player-selected game piece and a player-defined size of a set of drawn game pieces; dynamically self-adjusting, in real time, a personalized self-adjusting payout table; and dynamically conducting at least one drawing where each drawn game piece is selected from a full pool of the pool of game pieces.
US10134239B2	System, method and computer readable recording medium for providing game through connection with challenge opponent A method for providing a game through a connection with a challenge opponent, performed by a game service platform server managing a plurality of games, the method including: receiving challenge game selection information and challenge opponent request information of a challenge applicant from a first user terminal; transmitting challenge application information to a second user terminal, which is a terminal of at least one member specified based on the challenge opponent request information; and setting the member accepting a challenge to the challenge opponent based on challenge acceptance information received from the second user terminal. The first user terminal and the second user terminal execute a game service platform managing the plurality of games and provide the challenge opponent request information and the challenge acceptance information through the game service platform, respectively.
US10134238B2	Method of gaming, a game controller and a gaming system A method of gaming comprising: conducting a game requiring a player to make a choice between at least one optimal action and at least one sub-optimal action having a lower return to player than the optimal action such that the difference between the sub-optimal action and the optimal action represents a lost return to player; receiving a player choice of an action; and conducting a trial for an award in which the probability of success is controlled to provide an expected return to player from the trial that compensates the player for the lost return to player in response to determining that the choice is a sub-optimal action.
US10134234B2	System and method for integrated multiple source player cash access The present invention relates to a system and method for integrating player tracking and cash access in a casino or other gaming environment. One aspect of the invention allows for fund access and management wherein gaming machines, such as slot machines or on-line virtual gaming machines, receive playable credits directly from a patron's banking or credit card account. Another aspect of the present invention relates to integrating player tracking and cash access transactions by allowing the players to provide a player tracking card for each financial transaction conducted in a gaming environment. In return, the casino issues gaming or bonus points to the players for allowing their transactions to be tracked. Yet another aspect of the present invention consolidates the players' financial account information into a single casino database. Players can subsequently credit or debit cash from the players' financial accounts using any associated customer identification cards or otherwise receive such credits in other forms that permit negotiations, including quasi-cash documents.
US10134232B2	Casino gaming exchange market In a cashless gaming environment, a gaming patron has accounts and may accumulate winnings as well as different types of awards. Methods for efficiently exchanging the awards are disclosed. A secondary market is established for trading different goods and services. Liquidity of credits and awards is established.
US10134227B1	Systems and methods for making game content from a single online game accessible to users via multiple platforms A system and method that makes game content from a single online game accessible to users via multiple platforms. The multiple platforms may include virtual reality platforms and non-virtual reality platforms. Amounts of gameplay of the online game by the users via the virtual reality platforms may be monitored. The gameplay of the online game via the virtual reality platforms may be limited. As such, responsive to the amounts of gameplay by the users reaching gameplay thresholds, access to the online game through the first platform is restricted for the users until corresponding requirements are satisfied. The users may be able to play the online game via the non-virtual reality platforms while the gameplay of the online game via the virtual reality platforms is restricted.
US10134225B2	Controlling wagering game peripherals A wagering game system and its operations are described herein. In some embodiments, the operations can include establishing a connection with an input device, from a plurality of input devices configured for user input, for use in a wagering game during a wagering game session. The operations can further include receiving input data from the input device, wherein the input data has a first format specific to the input device, and wherein the wagering game requires the input data in a second format different from the first format. The operations can further include converting the input data from the first format to the second format required by the wagering game, and providing the input data to the wagering game in the second format for use as the user input for the wagering game.
US10134220B2	Method and system for authorizing access to goods and/or services at a point of sale and corresponding point of sale A system and method for authorizing access to goods and/or services at a point of sale is disclosed. An access voucher may be issued and presented to a reading means of the point of sale. At least one good and/or service of the point of sale can be selected by the user and the corresponding identification can be transferred to the internal processing unit. A comparison can be performed. If the transferred identification of the user matches an identification of the user, and if the transferred identification of the goods and/services matches an identification of the goods/and services, the user profile data and the access parameter can be retrieved. An authorization can be transferred to the point of sale if the user profile data correspond to the access parameter for the goods and/or services.
US10134218B2	Network connected dispensing device A device may obtain sensor data regarding the vending device. The device may transmit the sensor data via a network connection for processing by a server. The server may store a data model. The server may be associated with identifying a response action associated with altering a configuration of the vending device. The device may receive information identifying the response action based on transmitting the sensor data via the network connection. The device may cause the response action to be performed based on receiving the information identifying the response action. The response action may be associated with altering a status of a component of the vending device. The device may provide information associated with identifying the status of the component.
US10134216B2	Bill magazine with an anti-string feature for use with a vending machine A bill magazine for a vending machine that is configured to prevent bills from being removed from the magazine. The magazine includes an interior space sized to hold the bills. Blades are positioned along the magazine. The blades contact against the top-most bill in the magazine. The blades include teeth that engage with the bill in the event there is an attempt to remove it from the magazine.
US10134215B2	Security device for security document A security device for verifying an authenticity of a security document comprises an at least partially transparent substrate with a first surface and a second surface. A first pattern is arranged on the first surface. This first pattern is derivable using a first seed pattern. A second pattern is arranged on said second surface. This second pattern is derivable using the first seed pattern and using a second seed pattern. Transmittances and reflectivities of the first and second patterns are selected such that in a reflection viewing mode, only the first seed pattern is visible. In a transmission viewing mode, however, only the second seed pattern is visible.
US10134210B1	Vehicle tracking system using smart-phone as active transponder A system is described for tracking vehicle position using a smart phone or similar device as an active transponder that communicates with roadside equipment. The system may uses existing RF transceivers on the smart-phone, such as Bluetooth® LE or WiFi to periodically transmit an identifying message. Road-based equipment detects and locates the smart phone. In a further aspect, the smart phone is alerted by roadside beacons and responds with identification information. Transaction processing may be performed either on the smart phone or by roadside or back office equipment. The system may be used for automated roadway tolling and monitoring and also for access control. A coded card may be scanned by the smart card to enter identification for access control.
US10134207B2	Securing SCADA network access from a remote terminal unit A first message from a remote terminal unit (RTU) is received, where the first message indicates that a motion has been detected. In response to receiving the first message, a timer is started at a supervisory control and data acquisition (SCADA) server. Whether a personal identification number (PIN) verification and a radio-frequency identification (RFID) verification have succeeded is determined before the timer expires. In response to determining that at least one of the PIN verification or the RFID verification fails, a communication port connecting the RTU with the SCADA server is disabled.
US10134206B2	Method and apparatus for video composition, synchronization, and control A system includes a smart-phone processor configured to receive a video recording feed from a camera. The processor is also configured to receive a vehicle data feed from a vehicle connected to the processor. The processor is further configured to convert the vehicle data feed into images. The processor is additionally configured to add the images to the video recording feed in real-time and save a combined feed including the video and images resulting from the adding.
US10134201B2	Parking meter system A parking meter includes a housing, processor, memory, network interface, display screen, first camera facing outward from the first side of the housing, second camera facing outward from the housing towards a parking space, and a payment acceptor. The meter is configured to sense a vehicle's presence in the parking space, capture an identification of the vehicle, transmit the identification to a remote networked computer system, determine that a parking violation has occurred, transmit the notice to the remote computer system, accept payment of fines, transmit notice of fine payment to the remote computer system, reset the parking time period to zero upon the vehicle's exit from the parking space, and receive updated parking rate parameters by the processor from the remote computer system via the network interface.
US10134199B2	Rigging for non-rigid structures Techniques for animating a non-rigid object in a computer graphics environment. A three-dimensional (3D) curve rigging element representing the non-rigid object is defined, the 3D curve rigging element comprising a plurality of knot primitives. One or more defined values are received for an animation control attribute of a first knot primitive. One or more values are generated, for a second animation control attribute for a second knot primitive, based on the plurality of animation control attributes of a neighboring knot primitive. An animation is then rendered using the 3D curve rigging element. More specifically, one or more defined values for the first attribute of the first knot primitive and the generated value for the second attributes of the second knot primitive are used to generate the animation. The rendered animation is output for display.
US10134198B2	Image compensation for an occluding direct-view augmented reality system Image compensation for an occluding direct-view augmented reality system is described. In one or more embodiments, an augmented reality apparatus includes an emissive display layer for presenting emissive graphics to an eye of a user and an attenuation display layer for presenting attenuation graphics between the emissive display layer and a real-world scene to block light of the real-world scene from the emissive graphics. A light region compensation module dilates an attenuation graphic based on an attribute of an eye of a viewer, such as size of a pupil, to produce an expanded attenuation graphic that blocks additional light to compensate for an unintended light region. A dark region compensation module camouflages an unintended dark region with a replica graphic in the emissive display layer that reproduces an appearance of the real-world scene in the unintended dark region. A camera provides the light data used to generate the replica graphic.
US10134197B2	Computer graphics presentation systems and methods A data processing unit generates graphics data that are sent to a display screen of a head-mountable structure worn by a user. Thereby, the user can observe the image data, which reflect a virtual reality environment implemented by the data processing unit, namely image data representing a field of view as seen by the user from a particular position and in a particular direction in the virtual reality environment. The head-mountable structure includes a first light source projecting a well-defined light pattern on a light-reflecting surface. The data processing unit is associated with an image registering unit recording image data representing the first well-defined light pattern. The data processing unit calculates the graphics data based on the image data.
US10134188B2	Body-centric mobile point-of-view augmented and virtual reality Embodiments of a system and methods for displaying virtual or augmented reality are generally described herein. An image of a user may be captured using a camera. Real space in the image may be mapped and a first orientation may be determined relative to a static portion of the user, using the image. A first portion of a virtual reality image may be displayed on a display screen. In response to determining a second orientation of the device relative to the static portion of the user, a second portion of the virtual reality image may be displayed on a display screen.
US10134184B2	Method of rendering object including path and rendering apparatus for performing path rendering A method to render an object including a path includes: determining a split line to split a frame; allocating information about the path to a first tile through which the path passes and to a second tile located between the first tile and the split line, among tiles included in the frame; and determining respective winding numbers for the first tile and the second tile, based on information about the allocated path.
US10134182B1	Large scale dense mapping A large scale dense mapping technique utilizes range data that identifies points in three dimensions. The large scale dense mapping technique utilizes the range data obtained from range sensors coupled with a depth integration technique. After dividing the world, or a portion of the world, into cells and voxels, a mapping system collects range data for a portion of the environment. To speed up the processing involving the large number range measurements, Graphics Processing Unit (GPU) memory, can be used to store data relating to the mapping of the environment. Instead of storing all of the cells of volumetric representation in the memory, just the portion of the cells associated with the range data are stored within the memory. The mapping system can use an SDF or a TSDF based volumetric representation format to represent the environment. The SDF or TSDF based volumetric representation is updated using the range data.
US10134181B2	System and method for simulating realistic clothing A system generates a clothing deformation model which models one or more of a pose-dependent clothing shape variation which is induced by underlying body pose parameters, a pose-independent clothing shape variation which is induced by clothing size and underlying body shape parameters and a clothing shape variation including a combination of the pose-dependent clothing shape variation and/or the pose-independent clothing shape variation. The system generates, for an input human body, a custom-shaped garment associated with a clothing type by mapping, via the clothing deformation model, body shape parameters of the input human body to clothing shape parameters of the clothing type and dresses the input human body with the custom-shaped garment.
US10134177B2	Method and apparatus for adjusting face pose A method and an apparatus for adjusting a pose in a face image are provided. The method of adjusting a pose in a face image involves detecting two-dimensional (2D) landmarks from a 2D face image, positioning three-dimensional (3D) landmarks in a 3D face model by determining an initial pose of the 3D face model based on the 2D landmarks, updating the 3D landmarks by iteratively adjusting a pose and a shape of the 3D face model, and adjusting a pose in the 2D face image based on the updated 3D landmarks.
US10134169B2	Image loads, stores and atomic operations One embodiment of the present invention sets forth a method for accessing texture objects stored within a texture memory. The method comprises the steps of receiving a texture bind request from an application program, wherein the texture bind request includes an object identifier that identifies a first texture object stored in the texture memory and an image identifier that identifies a first image unit, binding the first texture object to the first image unit based on the texture bind request, receiving, within a shader engine, a first shading program command from the application program for performing a first memory access operation on the first texture object, wherein the memory access operation is a store operation or atomic operation to an arbitrary location in the image, and performing, within the shader engine, the first memory access operation on the first texture object via the first image unit.
US10134168B2	Dynamically supporting custom dependencies during three-dimensional character animation One embodiment of the present invention includes a double solve unit that configures a kinematic chain representing an animated character. The double solve unit generates a first solution for the kinematic chain based on a first solving order. While generating the first solution, the doubles solve unit determines the recursion depth of each output connector included in the kinematic chain. Subsequently, the double solve unit identifies any output connectors for which the recursion length exceeds a corresponding expected recursion depth—indicating that a custom recursive dependency exists that is not reflected in the first solution. For these custom recursive output connectors, the double solve unit creates a second solving order and generates a more accurate solution. Advantageously, identifying the custom recursive dependencies as part of the solution process enables the double solve unit to portray animated movements without incurring the quality degradation or prohibitive execution time of conventional techniques.
US10134165B2	Image distractor detection and processing Image distractor detection and processing techniques are described. In one or more implementations, a digital medium environment is configured for image distractor detection that includes detecting one or more locations within the image automatically and without user intervention by the one or more computing devices that include one or more distractors that are likely to be considered by a user as distracting from content within the image. The detection includes forming a plurality of segments from the image by the one or more computing devices and calculating a score for each of the plurality of segments that is indicative of a relative likelihood that a respective said segment is considered a distractor within the image. The calculation is performed using a distractor model trained using machine learning as applied to a plurality images having ground truth distractor locations.
US10134160B2	Anti-aliasing for graphics hardware Visibility may be analytically resolved rather than using point-sampling, thereby entirely avoiding geometric aliasing and the need to store multiple samples per pixel. By relying on existing techniques for shading, i.e., by shading once per fragment and focusing on visibility, visual results may be equivalent to multi-sampled anti-aliasing (MSAA) using an infinite sampling rate in some embodiments.
US10134159B1	Data-model-driven visualization of data sets The disclosed embodiments provide a system that processes data. During operation, the system obtains a data set and metadata corresponding to a data model, wherein the data model includes a metric and a set of dimensions associated with the metric. Next, the system applies a set of rules to the data set to obtain a deconstruction of the metric by the set of dimensions. Finally, the system displays the deconstruction in one or more charts to a user independently of a domain of the data set.
US10134158B2	Directional stamping Systems, methods, and software are disclosed herein for supporting directional stamping. In an implementation, an input stroke is received on a canvas in a user interface to an application. The application identifies at least a directional effect with which to render each of a set of discontinuous objects along a continuous path taken by the input stroke on the canvas. The application then renders the set of discontinuous objects on the canvas along the continuous path with at least the directional effect identified for each discontinuous object.
US10134156B2	Method and evaluation device for evaluating projection data of an object being examined In a method and an evaluation device for the evaluation of projection data of an object being examined, which are determined along a trajectory in a multiplicity of projection positions relative to a co-ordinate origin, a particular trajectory function is determined for the projection positions, for each of a multiplicity of positions from a reconstruction region of dimension n by establishing an offset (d) and a direction vector at the co-ordinate origin, establishing a hyperplane of dimension n−1 which runs perpendicular to the direction vector and has an offset to the co-ordinate origin, establishing a number of intersection points where the hyperplane intersects the trajectory, establishing a derivative vector of the trajectory according to its trajectory path and calculating the derivative vector in the projection position, and establishing an absolute value of a scalar product between the derivative vector and the position and dividing the absolute value by the number. The determined trajectory functions are transformed to a frequency domain of dimension n and the projection data are evaluated by means of the transformed trajectory functions.
US10134152B2	Method and system for determining cells traversed by a measuring or visualization axis A method to locate material bodies on an at least 2-dimensional occupancy grid G, having a first resolution stepsize RG, that includes a set of cells represented by vertices and segments connecting these vertices. The method uses a sensor for detecting an obstacle which is positioned at source point S, and includes at least the following steps: acquisition by the sensor of a measurement of the position of a material body detected at a point F; defining the coordinates of a point M by using a space discretized with the aid of a spatial stepsize δ which is finer than the resolution stepsize RG, initializing an integer, error parameter, and calculating the value of the error parameter for at least one first vertex of the cell of the current grid.
US10134151B2	Verification method and system for people counting and computer readable storage medium A verification method for people counting includes steps of displaying a people counting video by a display device, wherein the people counting video shows an entry and exit boundary and an accumulated number of persons; when at least one person exists in the people counting video, displaying an initial position and a current position of each of the at least one person by the display device; determining whether each of the at least one person passes across the entry and exit boundary according to the initial position and the current position of each of the at least one person by a user, so as to determine whether the accumulated number of persons is incorrect; and when the user determines that the accumulated number of persons is incorrect, receiving a modified number of persons from the user by an input device.
US10134148B2	Method of assessing breast density for breast cancer risk applications Breast density is a significant breast cancer risk factor measured from mammograms. Disclosed is a methodology for converting continuous measurements of breast density and calibrated mammograms into a four-state ordinal variable approximating the BI-RADS ratings. In particular, the present disclosure is directed to a calibration system for a specific full field digital mammography (FFDM) technology. The calibration adjusts for the x-ray acquisition technique differences across mammograms resulting in standardized images. The approach produced various calibrated and validated measures of breast density, one of which assesses variation in the mammogram referred to as Vc (i.e. variation measured from calibrated mammograms). The variation in raw mammograms [i.e. Vr] is a valid breast density risk factor in both FFDM in digitized film mammograms.
US10134144B2	System and method for determining dynamic physiological information from four-dimensional angiographic data A system and method are provided for generating time resolved series of angiographic volume data having flow information. The system and method are configured to receive angiographic volume data acquired from a subject having received a dose of a contrast agent using an imaging system and process the angiographic volume data to generate angiographic volume images. The angiographic volume data is processed to derive flow information by determining a distance between two points along a vessel in the angiographic volume images and determining a phase at each of the two points along the vessel in the angiographic volume images. A flow direction or a velocity of flow within the vessel is determined using the distance between the two points along the vessel and the phase at each of the two points along the vessel.
US10134143B2	Method for acquiring retina structure from optical coherence tomographic image and system thereof The present disclosure provides a method for acquiring a retina structure from an optical coherence tomographic image and a system thereof. The method comprises: calculating a region of interest (ROI) image of a source image; performing a Gaussian filtering of the ROI image; calculating a first estimated boundary position of a first layer boundary and a second estimated boundary position of a second layer boundary using a multi-resolution method; refining the first layer boundary and the second layer boundary respectively using a simplified active contour model according to the first estimated boundary position and the second estimated boundary position, to obtain a first initial boundary position of the first layer boundary and a second initial boundary position of the second layer boundary; smoothing the first initial boundary position and the second initial boundary position using a filtering method; acquiring segmentation positions of rest layer boundaries in the ROI image according to a segmented position of the first layer boundary and a segmented position of the second layer boundary. The present disclosure can improve the calculation speed and reduce the calculation complexity while maintaining high location accuracy.
US10134142B2	Optimization of parameters for segmenting an image The present invention relates to a device for segmenting an image (12) of a subject (14) comprising a data interface (16) for receiving an image (12) of said subject (14) and at least one contour (18) or at least one part of a contour (18), said contour (18) indicating a structure (19) within said image (12), a selection unit (20) for selecting a region (22) in said image (12) divided into a first and a second disjoint part (24, 26) by said contour (18) or said part of said contour (18), said selected region (22) comprising a drawn region and/or a computed region, a classifier (28) for classifying said selected region (22) based on at least one parameter for image segmentation, an analysis unit (29) for defining an objective function based on the classification result, an optimizer (30) for optimizing said parameter set by varying an output of said objective function and an image segmentation unit (32) for segmenting said image (12) using said optimized parameter set.
US10134134B2	Method and system for creating depth signatures A method and system for creating a depth signature from plural images for providing watermark information related to the images. The method comprises analyzing a pair of images, each image containing a plurality of elements, identifying a first element in one of the pair of images, identifying plural elements in the other of the pair of images. The method further comprises measuring a disparity parameter between the first element and a set of the plural elements, matching the first element from the set of plural elements, the matched second element having the smallest measured disparity parameter, and computing a signature based at least in part on the measured disparity between the first and second elements.
US10134129B2	Method and system for hemodynamic computation in coronary arteries A method and system for computing blood flow in coronary arteries from medical image data disclosed. Patient-specific anatomical measurements of a coronary artery tree are extracted from medical image data of a patient. A reference radius is estimated for each of a plurality of branches in the coronary artery tree from the patient-specific anatomical measurements of the coronary artery tree. A flow rate is calculated based on the reference radius for each of the plurality of branches of the coronary artery tree. A plurality of total flow rate estimates for the coronary artery tree are calculated. Each total flow rate estimate is calculated from the flow rates of branches of particular generation in the coronary artery tree. A total flow rate of the coronary artery tree is calculated based on the plurality of total flow rate estimates. The total flow rate of the coronary artery tree can be used to derive boundary conditions for simulating blood flow in the coronary artery tree.
US10134127B2	Method for post-processing flow-sensitive phase contrast magnetic resonance images A method for generating fluid flow images of a region of interest is disclosed. The method includes: scanning the region of interest to acquire a set of 4D-Flow magnetic resonance images, wherein the set comprises an anatomical magnitude image, a first velocity component image, a second velocity component image, and a third velocity component image; isolating the anatomical magnitude image, the first velocity component image, the second velocity component image, and the third velocity component image from the set of 4D-Flow magnetic resonance images; converting the first, second, and third velocity component images into a velocity vector field; modeling a location of an anatomical wall within the region of interest; calculating at least one flow dynamics parameter for the region of interest; and generating a visual representation of the anatomical wall and the at least one flow dynamics parameter.
US10134125B2	Systems and methods for ultrasound imaging Techniques for processing ultrasound data. The techniques include using at least one computer hardware processor to perform obtaining ultrasound data generated based, at least in part, on one or more ultrasound signals from an imaged region of a subject; calculating shadow intensity data corresponding to the ultrasound data; generating, based at least in part on the shadow intensity data and at least one bone separation parameter, an indication of bone presence in the imaged region, generating, based at least in part on the shadow intensity data and at least one tissue separation parameter different from the at least one bone separation parameter, an indication of tissue presence in the imaged region; and generating an ultrasound image of the subject at least in part by combining the indication of bone presence and the indication of tissue presence.
US10134119B2	Image generation device and operation support system An image generation device generates an output image based on an input image captured by a camera attached to a shovel. Further, the image generation device includes an output image generation unit that associates a value of an input pixel in the input image with a value of an output pixel in the output image to generate the output image. A value of an output pixel specified by an integer coordinate point on an output image plane is determined based on values of two input pixels specified by two integer coordinate points selected from four integer coordinate points in the vicinity of a real number coordinate point on an input image plane corresponding to the integer coordinate point on the output image plane.
US10134118B2	Information processing apparatus and method of obtaining information about a projection surface on which a target is projected An information processing apparatus includes an acquisition unit configured to acquire information about a projection surface on which a projection unit projects a target image, a storage unit configured to store first information indicating a first position, on the projection surface, of the target image projected on the projection surface by the projection unit in a first projection state, and a control unit configured to control a position, on the projection surface, of the target image to move from a second position on the projection surface where the target image is projected by the projection unit in a second projection state to the first position on the projection surface.
US10134114B2	Apparatus and methods for video image post-processing for segmentation-based interpolation Apparatus and methods for video image post-processing for segmentation based interpolation. In one embodiment, a computerized apparatus is utilized in order to obtain a first frame of video data; segment one or more objects within the first frame of video data; obtain a second frame of video data; segment one or more objects within the second frame of video data; match at least a portion of the one or more objects within the first frame of video data with the one or more objects within the second frame of video data; compute the motion of the pixels for the matched portion of the one or more objects; compute the motion of pixels associated with a background image; and generate an interpolated frame of video data, the interpolated frame of video data residing temporally between the first frame of video data and the second frame of video data.
US10134113B1	Digital media environment for removal of interference patterns from digital images Techniques for removal of interference patterns from digital images are described, in which a spatially-adaptive filter is applied to a pixel based on a context of the pixel. In an example, an edge of an object in a digital image is located in a digital image creation system. Then, context data is generated for a pixel in the digital image. The context data includes a distance from the edge of the object to the pixel. The digital image creation system can also generate color data and luminance data for the pixel, representing a similarity of color and luminance between the pixel and surrounding pixels within the digital image. Then, the digital image creation system constructs a spatially-adaptive filter for the pixel based on the context data for the pixel. The digital image creation system removes an effect of the interference pattern at the pixel in the digital image by applying the spatially-adaptive filter to the pixel.
US10134111B2	Generating an enhanced image of a predetermined scene from a plurality of images of the predetermined scene A method, device, system, and article of manufacture are provided for generating an enhanced image of a predetermined scene from images. In one embodiment, a method comprises receiving, by a computing device, a first indication associated with continuous image capture of a predetermined scene being enabled; in response to the continuous image capture being enabled, receiving, by the computing device, from an image sensor, a reference image and a first image, wherein each of the reference image and the first image is of the predetermined scene and has a first resolution; determining an estimated second resolution of an enhanced image of the predetermined scene using the reference image and the first image; and in response to the continuous image capture being disabled, determining the enhanced image using the reference image and the first image, wherein the enhanced image has a second resolution that is at least the first resolution and about the estimated second resolution.
US10134107B2	Method and apparatus for arranging pixels of picture in storage units each having storage size not divisible by pixel size A data arrangement method includes following steps: obtaining pixel data of a plurality of first N-bit pixels of a picture; and storing the obtained pixel data of the first N-bit pixels in a plurality of M-bit storage units of a first buffer according to a block-based scan order of the picture. The picture includes a plurality of data blocks, and the block-based scan order includes a raster-scan order for the data blocks. At least one of the M-bit storage units is filled with part of the obtained pixel data of the first N-bit pixels, M and N are positive integers, M is not divisible by N, and the first N-bit pixels include at least one pixel divided into a first part stored in one of the M-bit storage units in the first buffer and a second part stored in another of the M-bit storage units in the first buffer.
US10134106B2	Method and device for selective display refresh A method of and device for providing image frames is provided. The method includes outputting portions of a first frame that have changed relative to the one or more other frames without outputting portions of the first frame that have not changed relative to the one or more other frames. Each of the portions are determined to be changed if a rendering engine has written to a frame buffer for a location within boundaries of the portion. This outputting is done in response to one or more portions of a first frame having changed relative to one or more other frames.
US10134102B2	Graphics processing hardware for using compute shaders as front end for vertex shaders A GPU is configured to read and process data produced by a compute shader via the one or more ring buffers and pass the resulting processed data to a vertex shader as input. The GPU is further configured to allow the compute shader and vertex shader to write through a cache. Each ring buffer is configured to synchronize the compute shader and the vertex shader to prevent processed data generated by the compute shader that is written to a particular ring buffer from being overwritten before the data is accessed by the vertex shader. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.
US10134097B2	Controlling the distribution of energy resources on a smart grid The present invention relates to a smart grid system and a method for distributing resources in the system. The smart grid system according to the present invention comprises at least one non-shiftable device; at least one controllable device; and at least one shiftable device; wherein price data are provided at each stage, the non-shiftable device is always provided with its resource requirements, the controllable device is provide with resources in the range of its resource requirements, and the shiftable device has its nominal resource requirements but not allowed to be provided with resources at the stage when resource price is highest.
US10134095B2	System and method for media-centric and monetizable social networking A method and system connects brands, users and communities via socially shared content elements that take the form of, for example, words, pictures/images, videos and/or audio objects. The method creates a social media engagement and distribution capability of dynamic, interactive impressions linking users to users and users to brands around shared “day in the life” moments. The spectrum of reach and range of content types combined with user daily lives creates a ubiquitous new web medium of social content. The user experience created by this method and system creates a sustainable stickiness for members, capturing, creating, sharing and responding to each other interactively in any communication format, at any time, in any place and for any reason.
US10134094B2	Display of tax reports based on payroll data and tax profile Remotely modifying a display of a client. The server transmits first instructions to the client to modify the display to present, on a first area, a plurality of different taxable entities to which the client has access, and to modify the display to present, on a second area, a plurality of different report types. The server determines, based on input from the client, a plurality of different specific forms which relate only to a first subset and are also only within a second subset. The first subset is user input from the first area of a plurality of different taxable entities to which the client has information access. The second subset is user input from the second area of the display from the plurality of different report types. The server transmits second instructions to the client to modify the second area to display only the plurality of different specific forms.
US10134089B2	Method and apparatus for message flow and transaction queue management Management of transaction message flow utilizing a transaction message queue. The system and method are for use in financial transaction messaging systems. The system is designed to enable an administrator to monitor, distribute, control and receive alerts on the use and status of limited network and exchange resources. Users are grouped in a hierarchical manner, preferably including user level and group level, as well as possible additional levels such as account, tradable object, membership, and gateway levels. The message thresholds may be specified for each level to ensure that transmission of a given transaction does not exceed the number of messages permitted for the user, group, account, etc.
US10134086B2	Conversion enhanced auction environment An environment is established in which a variety of participating entities, including but not limited to auction houses, manufacturers, third party product and service providers, individuals, etc., can interface and benefit from the vast amount of data that is naturally collected or assimilated in the process of evaluating products to be introduced to an auction line.
US10134084B1	Augmented reality systems for facilitating a purchasing process at a merchant location A method of facilitating an augmented reality experience to purchase an item at a merchant location may be provided. The method may include storing profile data, receiving location data and environmental data from a computing device associated with the stored profile data. Upon determining that the user device has entered a predefined merchant location, the method may include initiating a sequence of augmented reality modes including at least a first augmented reality mode associated with the selection of an item and a second augmented reality mode associated with the payment of the item. The user device may display virtual content in association with each mode, and upon detecting predetermined user inputs such as gestures, fixed gazes, or moving through thresholds, the system may enable the selection and payment of one or more items by sending a purchase request to a merchant terminal.
US10134081B2	Single order multiple payment processing A method and system for providing multiple authorization request messages for multiple products offered by respectively different merchants in a single order are disclosed. If one of the authorization request messages is declined, then an order interrupt message may be sent to the consumer. In order interrupt message may indicate that the single order is canceled, even though authorization request messages for the purchase of other products in the order are approved.
US10134078B2	Systems and methods for completion of item purchases without merchant interaction There is provided systems and method for completion of item purchases without merchant interaction. A payment provider may generate a purchase request for a first user, where the purchase request includes a sale of an item to the first user. The purchase request may be generated by first receiving a purchase of an item from another user, where the other user designates that a purchase request should be transferred to the first user. However, the purchase request may also be generated based on purchasing preferences of the first user, such as a specific item that was previously unavailable at a merchant. Once the purchase request is received by the first user, the first user may select a purchase option, which transmits acceptance to the payment provider. The payment provider may then complete the purchase request with the merchant without the first user interacting with the merchant.
US10134074B2	System for snap and pan of embedded maps within retail store search results and method of using same A system and method includes receiving a search query for a product to be located in a retail store, obtaining a store map, the store map being indicative of a layout of the retail store, providing one or more search results as a list to the mobile device, each of the one or more search results being associated with a physical location of the product in the retail store, present the store map overlaid with an icon on a graphical display of the mobile device, and changing a location on the store map of the icon to another icon as the customer scrolls the search results displayed on the mobile device, updating the store map by panning/zooming to the changed location on the store map, and providing the changed location of the icon to the physical location on the store map of the currently scrolled to, top-most, product to the mobile device for display.
US10134067B2	Autocomplete of searches for data stored in multi-tenant architecture In an example embodiment, identifications of user actions are received from a first user device, the user actions being actions related to identifying data from a multi-tenant database to view. A portion of a first search query is received from a first user device corresponding to a first tenant in a multi-tenant architecture. A list of permissions for the first user device is then obtained. A plurality of fields is retrieved from a multi-tenant database based on the portion of the first search query, the fields obtained from data stored by multiple different tenants in the multi-tenant database, the plurality of fields retrieved being limited to fields for which the first user device has permission to view. Then a plurality of autocomplete suggestions are identified from the plurality of retrieved fields, the identifying based on the user actions.
US10134066B2	Personalized delivery time estimate system A personalized delivery estimate system is described. A commercial transaction is generated between a seller and a buyer for an item in an online marketplace. Historical transactions of buyers and sellers in the online marketplace are stored in a storage device. A personalized delivery time estimate is computed for the buyer of the commercial transaction using seller information, buyer information, and item information with the historical transactions of buyers and sellers in the online marketplace.
US10134062B2	Fixed position multi-state interactive advertisement Systems and methods for a multi-state advertisement displayed at a fixed position on a primary display space of a display device, such as an electronic device with a display. The fixed position advertisement remains in its fixed position in view of the user as the user scrolls the web page in various directions. A plurality of events trigger a change in the state of the multi-state advertisement, with the change in state resulting in a change of the advertisement content, shape, size, style and appearance. An embodiment deploys an initial video in combination with a billboard. When the interstitial video ends, the fixed position advertisement is sized down to a less obtrusive size, with the billboard and the interstitial video replaced with a navigation bar.
US10134061B2	Collage-based, integrated advertising systems and methods of advertising Collage-based, integrated advertising systems and methods of advertising are disclosed.
US10134060B2	System and method for delivering targeted advertisements and/or providing natural language processing based on advertisements The system and method described herein may use various natural language models to deliver targeted advertisements and/or provide natural language processing based on advertisements. In one implementation, an advertisement associated with a product or service may be provided for presentation to a user. A natural language utterance of the user may be received. The natural language utterance may be interpreted based on the advertisement and, responsive to the existence of a pronoun in the natural language utterance, a determination of whether the pronoun refers to one or more of the product or service or a provider of the product or service may be effectuated.
US10134051B1	Methods and systems for audio identification and reward provision and management Methodologies and apparatuses are provided for identifying audio by analyzing time chunks of audio in the frequency domain, providing rewards associated with identified inputs and managing and monitoring the provision of rewards are provided.
US10134049B2	Customer service based upon in-store field-of-view and analytics Concepts and technologies disclosed herein are directed to aspects of customer service based upon in-store field-of-view and analytics. According to one aspect disclosed herein, a store analytics system can collect user information associated with a plurality of users located within an environment. The store analytics system also can collect user device information associated with a plurality of user devices associated with the plurality of users. The store analytics system also can collect estimated fields-of-view associated with the plurality of users. The store analytics system can analyze the user information, the user device information, and the estimated fields-of-view to identify at least one commonality shared among at least two of the plurality of users. The store analytics system can create a logical group. The logical group can include the at least two users of the plurality of users that share the commonality.
US10134047B2	Audience targeting with universal profile synchronization Universal synchronization of profiles of audience members targeted for the delivery of content. A unique global identifier may be assigned to and used to manage a profiled audience member. This identifier may also be associated to an authoritative identifier and cookie information used in connection with the collection of profile data. An authoritative identifier may be received in connection with activity, and might not be accompanied by a global identifier. The authoritative identifier may then be used to identify the global identifier, which in turn may be used to identify the cookie related information of record for the profiled audience member. Comparing the cookie related information to previously retained cookie information may be used to determine that the cookie information for a particular, profiled audience member has changed, so that it can be restored.
US10134046B2	Social sharing and influence graph system and method Sharing of content by users via the network is facilitated. Sharing suggestions are made to a user, the sharing suggestions including making a suggestion of one or more users with whom the user might wish to share content. A user's influence on other users and the user can be prompted to share content with other users based on the identified influence.
US10134045B2	Awarding message slots for a consumer mobile device campaign Techniques and systems are disclosed for forwarding a limited number of vendor messages during a consumer mobile device campaign, such as a CSC campaign. Opt-in events are received from an aggregator's message service platform for a consumer mobile device (e.g., smart-phone), and a time interval is identified for the campaign that comprises a duration for the campaign. Campaign parameters are identified, where the parameters comprise a desired number of campaign messages for the “opted-in” consumer mobile device. Vendors are grouped into one or more campaign message categories (e.g., by service or products), and a bidding frequency is identified for campaign message categories for the campaign duration. Bids are received for message slots at the bidding frequency for a campaign message category, a desired bid is selected if it meets a threshold, and the corresponding vendor message is sent to the opted-in phone(s).
US10134042B1	Automated vehicle ownership support A computer system for processing vehicle ownership support data includes an infrastructure platform which includes a plurality of hardware and software components, infrastructure services, APIs, and SDKs adapted to communicate in a communication network. The infrastructure platform receives telematics data such as vehicle identification data, driving performance data, vehicle operation data and vehicle sensor data for a corresponding vehicle. Such telematics data can be received from a vehicle device (Onboard Device (OBD)), or from a cloud-based telematics platform. The infrastructure platform identifies vehicle ownership support services associated with the at least one vehicle and analyzes the received telematics data associated with the identified services. The infrastructure platform provides vehicle ownership support services to a mobile application accessible at a customer's mobile device associated with the vehicle or the customer. Such services may include, without limitations, automated fuel dispensing, emergency roadside assistance, vehicle maintenance and repair assistance, and the like.
US10134038B2	Point of sale (POS) personal identification number (PIN) security A key is securely injected into a POS PIN pad processor in its usual operating environment. In response to entry of a personal identification number (PIN) into a PIN pad, the processor puts the PIN into a PIN block; puts additional random data into the PIN block; and encrypts the entire PIN block using asymmetric cryptography with a public key derived from the injected key residing in the PIN pad processor. The corresponding private key may be held securely and secretly by an acquirer processor for decrypting the PIN block to retrieve the PIN. The encrypted random data defends the PIN against dictionary attacks. Time stamp data and constant data encrypted with the PIN block enables a defense of the PIN against replay attacks and tampering. The method may also include accepting the PIN from a mobile phone in communication with the processor.
US10134036B1	Method and apparatus for performing transactions over a network using cross-origin communication A transaction is conducted between a merchant site and a customer's electronic device using a payment processor. The merchant site is associated with a client-side application and a server-side application. The client-side application executes on the customer's electronic device. The client-side application electronically sends payment information retrieved from the customer's electronic device to the payment processor. The client-side application does not send the payment information to the server-side application. The payment processor creates a token from the payment information sent by the client-side application. The token functions as a proxy for the payment information. The payment processor electronically sends the token to the client-side application. The client-side application electronically sends the token to the server-side application for use by the server-side application in conducting the transaction. The payment information can thus be used by the server-side application via the token without the server-side application being exposed to the payment information.
US10134035B1	Invariant biohash security system and method Systems, methods, and program products for providing secure authentication for electronic messages are disclosed. A method may comprise generating an asymmetric private key based at least in part upon an invariant biometric feature vector derived from an input biometric reading. The private key may be further based at least in part upon a user password. The resulting private key may not be stored but rather may be generated when required to authenticate an electronic message, at which time it may be used to provide a digital signature for the electronic message. The private key may be deleted after use. The private key may be regenerated by inputting both a new instance of the biometric reading as well as a new instance of the password.
US10134034B2	Terminal data encryption A method is disclosed. The method includes generating an initial key after interacting with an access device, storing the initial key at a key storage location, altering the initial key with a public key to form an altered key, and sending the altered key to a server computer along with an identifier for the access device. The altered key is changed to the initial key at the server computer and is stored with the identifier in a database in operative communication with the server computer. The initial keys that are stored at the key storage location and in the database are used to alter and restore transaction data associated with multiple financial transactions that are conducted using the access device.
US10134030B2	Customer token preferences interface Embodiments are directed to token management. Embodiments initiate presentation of a digital wallet management interface including initiating presentation of a digital wallet; initiating presentation of an original token associated with the digital wallet; initiating presentation of a toggle switch comprising a first position and a second position and associated with the original token and configured for graphical manipulation by the user between the first position and the second position, wherein the first position corresponds to the original token being available for use as a payment credential; and where the second position corresponds to the original token being unavailable for use as a payment credential.
US10134029B1	System and method for combining disparate commercial transactions under a single identification mechanism A single swipe system is constructed that allows a person to use a single financial card to receive loyalty benefits (or conduct other non-payment operations) concurrently with a payment transaction. In one embodiment, the user simply swipes his/her financial card and the processing system then concurrently processes a non-payment transaction along with a payment transaction. In some situations, the non-payment transaction can be blended into the payment transaction to allow for discounts and other awards from one or more databases other than the payment processing database. In one embodiment, a single swipe of a financial card connects the consumer with one or more loyalty systems and the consumer can select from the ones desired during the course of payment processing. Discounts and other advantages can be applied to the payment transaction, all based upon a single entry of the consumer's ID.
US10134028B2	Gift card with principal value and auxiliary value The present invention relates to methods and systems involving a gift card comprising a principal value and auxiliary value. The principal value may represent a monetary or pre-sale value, while the auxiliary value may represent a virtual good.
US10134021B2	Method and apparatus for providing a gift using a mobile communication network and system including the apparatus The present disclosure provides a method of providing a gift icon using a communication network. The method includes: providing an item list of amounts of money to a user terminal connected with the gift provision apparatus through the communication network; selecting at least one of the amounts of money, and inputting information of a receipt terminal to receive the at least one selected amount of money, wherein the receipt terminal is separated from the user terminal; transmitting a request message for a gift to the gift provision apparatus; and providing the gift icon to the receipt terminal through the communication network, when the gift provision apparatus receives the request message.
US10134019B2	Transaction decisioning by an automated device Methods, systems, and computer-readable media for determining whether a check may be cashed at an automated teller machine (ATM) are provided. A user may request to cash a check at an ATM and check image data may be transmitted to a return deposit item computing platform. The computing platform may identify an account number of the account on which the check is drawn. Transaction data associated with the account may be retrieved by the computing platform and a number of occurrences of returned deposit items may be identified. The number of occurrences may be used to determine whether the check should be cashed.
US10134018B2	Flexible open origination In the field of banking and financial services, a flexible Open Origination allows any type of mobile, internet, online, personal financial management software, finance tool, or other useful function, device or software, that a bank or financial institution provides to account holders, and offers that same functionality that allows any user regardless of account status. Non-account holders can download and utilize the Banking Software in question in order to enjoy its features, an in order to become familiar with the experience of doing business with the bank or financial institution that provides the software. This method, system and software allows any user, regardless of where his/her accounts are located, to use the software and benefit from its functionality.
US10134009B2	Methods and systems of providing supplemental informaton At least one analytical operation from a set of different analytical operations may be determined based on at least one input. The input(s) may comprise contextual information of working content being displayed to a user on a device and comprising numerical data. Supplemental information for the working content may be generated using the determined analytical operation(s), may comprise a numerical-based analysis of the numerical data, and may be caused to be displayed to the user concurrently with the working content. The contextual information may comprise structured data. The input(s) may further comprise at least one of a history of the user's interactions with the working content, a history of the user's interactions with recommendations of supplemental information for the working content, a history of other users' interactions with the working content, and a history of other users' interactions with recommendations of supplemental information for the working content.
US10134003B1	Multiple data source product inventory, disposition, and order management system An inventory, disposition, and order management system and method utilizes multiple data sources to obtain complementary and augmented product data to determine an enhanced set of product data that reflects product inventory and disposition history information in a supply chain. The system and method can utilize the complementary and augmented product data to formulate recommended orders to achieve product dealer sales goals. The system and method compare the product data obtained from the data sources and reconcile any discrepancies. In at least one embodiment, the product data includes product identification data, product inventory data, product configuration data, and product disposition history data. Obtaining data from multiple sources allows the system and method to develop more accurate and complete data through an audit and reconciliation process as opposed to data obtained from a single source.
US10134000B2	Fleet vehicle management systems and methods Some embodiments of a system for communicating vehicle information can provide equipment for use inside a fleet vehicle to facilitate prompt and efficient transfer of vehicle and driver information. In particular embodiments, the system may include an electronic onboard recorder mountable in a vehicle and a mobile communication device that is configured to wireless communication with the electronic onboard recorder.
US10133997B2	Object lifecycle analysis tool Embodiments presented herein provide techniques for generating analytical graphs that display a visualization of multiple transaction objects processed concurrently in a computer system. An object lifecycle analysis tool identifies one or more transaction objects having a specified identifier. Each transaction object corresponds to an instance of a common transaction having been processed. The analysis tool retrieves transition state information corresponding to each transaction object and sorts the transition state information in chronological order. The analysis tool generates a graph based on the sorted transition state information. The generated graph allows a user to easily identify performance issues (e.g., concurrency bottlenecks) in a transaction management system.
US10133993B2	Expert database generation and verification using member data Techniques for generating an expert database and verifying an expert using member data are described. A search request can be received from a device of the user. The search request can include a specific skill associated with the expert. Additionally, profile data can be accessed from a database in the online social network. Additionally, an expert recommendation process can determine an expert from the members of the online social network based on the search request and the profile data of the members. Moreover, social graph data can be accessed from a second database in the online social network. Furthermore, a connection path process can determine the connection path between the user and the expert based on the social graph data. Subsequently, the determined expert and the determined optimal path between the user and the expert can be presented on a display of the device.
US10133992B2	System and method for monitoring manufactured pre-prepared meals Described are a system and method for monitoring pre-prepared meals which can be assembled as a plurality of portions. Assembled pre-prepared meals can be monitored starting from their assembly up to the ultimate consumption. Pre-prepared meals are arranged on tray-like containers and a data carrier is fastened which contains meal-specific data. These meal-specific data can be read out at at least two reading stations to be able to keep a record of the conditions of manufacture, storage and/or cooling.
US10133991B2	System and method for efficient travel time and route computation A system and method efficiently computes travel times between an origin and destination, minimizing expensive calls to a third party service by first geographically expanding both origin and destination and then searching a cache of previously computed or obtained travel times for any route satisfying the expanded origin and destination. A further embodiment concerns a system and method to prepare an optimized routing sequence to travel to a set of geographical task sites, in satisfaction of applicable conditions for one or more of the task sites. Advantageously, optimized routing may employ the disclosed method of computing travel times between origin and destination.
US10133989B1	Predictive power management in a wireless sensor network An apparatus comprising a power source, one or more sensors, a transceiver, and a memory. The power source may be configured to store energy to power the apparatus. The one or more sensors may be configured to receive captured data from one of a plurality of sources. The transceiver may be configured to send and receive data to and from a wireless network. The processor may be configured to execute computer readable instructions. The memory may be configured to store a set of instructions executable by the processor. The instructions may be configured to (A) evaluate an expected power usage budget calculated using a predictive model of future energy consumption and (B) (i) store the captured data in the memory in a first mode and (ii) transmit the captured data to a remote storage device in a second mode. The first mode or the second mode is selected based on characteristics of the captured data received from the sensors.
US10133988B2	Method for multiclass classification in open-set scenarios and uses thereof The proposed method is used for classification in open-set scenarios, wherein often it is not possible to first obtain the training data for all possible classes that may arise during the testing stage. During the test phase, test samples belonging to one of the classes used in the training phase are classified based on a ratio between similarity scores, as known correct class and test samples belonging to any other class are to be rejected and classified as unknown.
US10133983B1	Method and apparatus for modeling probability matching and loss sensitivity among human subjects in a resource allocation task Described is system for modeling probability matching and loss sensitivity among human subjects. A set of features related to probability matching and loss sensitivity is extracted from collected human responses. The set of features are processed with a genetic algorithm to fit the collected human responses with a set of neural network model instances. A set of model parameters are generated from the genetic algorithm and used to generate at least one of an explanatory and predictive model of human behavior.
US10133978B2	Device having RFID tag and fluidics element A device such as a disposable cartridge has an RFID tag (30) having an antenna (10), and a fluidic element (20, 160), the antenna having a shape to at least partly enclose an area, at least a part of the fluidic element being located in this area. By having such a structure, the device can be made more compact or the antenna can be made larger, and hence the costs for a given performance can be reduced, or the storage space for a given number of devices can be reduced.
US10133977B2	Product holder A holder for a product package includes a substrate having an inside surface, with opposing end portions of the substrate being folded upwards. The holder also includes a securing member disposed on at least one of the end portions, the securing member configured to secure the product package within the end portions of the substrate. The holder also includes a RFID tag disposed on the substrate.
US10133974B2	Machine-readable code Technology for generating, reading, and using machine-readable codes is disclosed. There is a method, performed by an image capture device, for reading and using the codes. The method includes obtaining an image, identifying an area in the image having a machine-readable code. The method also includes, within the image area, finding a predefined start marker defining a start point and a predefined stop marker defining a stop point, an axis being defined there between. A plurality of axis points can be defined along the axis. For each axis point, a first distance within the image area to a mark is determined. The distance can be measured from the axis point in a first direction which is orthogonal to the axis. The first distances can be converted to a binary code using Gray code such that each first distance encodes at least one bit of data in the code.
US10133973B2	Two dimensional barcode Two dimensional barcode (4) for placement on a portion of a neck (3) of a bottle (1), comprising a top edge (10a), a bottom edge (10b), a left edge (10c) a right edge (10d), and code elements (8) arranged along horizontal lines extending between the left edge and the right edge, wherein the horizontal lines of code elements and the top and bottom edges are curved such that the top edge has a convex shape and the bottom edge a concave shape.
US10133971B2	Image forming apparatus and method for driving light source An image forming apparatus includes: an image processor configured to perform first image processing on image data having a first resolution and to add tag data to a target pixel where second image processing is to be performed; a resolution converter configured to convert the image data into image data having a second resolution higher than the first resolution, and to perform the second image processing based on arrangement of the image data having the first resolution and the tag data; a pulse generator configured to generate an on-off modulation signal and an application-current switching signal in accordance with the image data having undergone the second image processing; and a light source driver configured to drive the light source in accordance with a current setting value output from an application current setter depending on the application-current switching signal and the on-off modulation signal.
US10133969B1	Image forming apparatus, control method, and storage medium configured to form image layers on a first recording medium and a second recording medium An image forming apparatus to form image layers on a first recording medium and a second recording medium, and including a reception unit that receives a print job, a conveyance unit, an image forming unit, a re-conveyance unit, and a discharge unit. The conveyance unit sequentially conveys recording media to a recording position used to form an image layer on a recording medium. Each time a recording medium is conveyed to the recording position, the image forming unit forms one image layer on the conveyed recording medium based on the print job. The re-conveyance unit re-conveys the same recording media to the recording position. The second recording medium is conveyed to the recording position prior to the first recording medium unless the second recording medium and the first recording media are to receive the same number of image layers. Then, the first recording medium is conveyed to the recording position.
US10133967B2	Card and card printing control device The present invention provides a card which may be issued smoothly. The member card 2 comprises the base material layer 21 having the light transmittable base material and the printing layer 22, and wherein the first information 2201 to be confirmed from the first surface 21a of the base material layer 21 and the second information 2202 to be confirmed from the second surface 21b of the base material layer 21 are only printed on one surface of the base material layer 21. In the base material layer 21, the region which is printed with the second information 2202 is light transmittable region, and the second information 2202 may be visually recognized from the second surface 21b of the base material layer 21.
US10133965B2	Method for text recognition and computer program product The invention refers to a method for text recognition, wherein the method is executed by a processor of a computing device and comprises steps of providing a confidence matrix, wherein the confidence matrix is a digital representation of an input sequence, entering a regular expression, searching for a symbol sequence of the input sequence that matches the regular expression, wherein a score value is computed by the processor using confidence values of the confidence matrix, wherein the score value is an indication of the quality of the matching between the symbol sequence of the input sequence and the regular expression. Further, the invention relates to a computer program product which when executed by a processor of a computing device performs the method.
US10133961B2	Method and apparatus for analyzing media content Aspects of the subject disclosure may include, for example, a method for determining a first set of features in first images of first media content, generating a similarity score by processing the first set of features with a favorability model derived by identifying generative features and discriminative features of second media content that is favored by a viewer, and providing the similarity score to a network for predicting a response by the viewer to the first media content. Other embodiments are disclosed.
US10133960B2	Methods and systems for determining image similarity In one embodiment, a computing device receives an image. A large hash value is generated for the image based on a content-aware hashing function, resulting in the large hash value having a first number of dimensions. A small hash value is calculated for the image based on the large hash value and a locality-sensitive hashing function. The small hash value has a reduced number of dimensions compared to the large hash value. The small hash values for two or more images, respectively, will be close to each other if the two or more images are similar in content, and the small hash values will be different if the images are not similar. The small hash value for the image is used to determine whether the image is similar to one or more other images.
US10133956B2	Image signature extraction device The image signature extraction device includes an image signature generation unit and an encoding unit. The image signature generation unit extracts region features from respective sub-regions in an image in accordance with a plurality of pairs of sub-regions in the image, the pairs of sub-regions including at least one pair of sub-regions in which both a combination of shapes of two sub-regions of the pair and a relative position between the two sub-regions of the pair differ from those of at least one of other pairs of sub-regions, and based on the extracted region features of the respective sub-regions, generates an image signature to be used for identifying the image. The encoding unit encodes the image signature.
US10133954B2	Visual comparisons using personal objects Embodiments of the present invention provide automated systems and methods for visualizing a product using standard and personal objects. An image can be retrieved from the shopping history or shopping cart of a user, and the dimensions of the image can be automatically adjusted to make an accurate relative size comparison to a product for purchase.
US10133949B2	Synthetic data generation of time series data A method of generating synthetic data from time series data, such as from handwritten characters, words, sentences, mathematics, and sketches that are drawn with a stylus on an interactive display or with a finger on a touch device. This computationally efficient method is able to generate realistic variations of a given sample. In a handwriting or sketch recognition context, synthetic data is generated from real data in order to train recognizers and thus improve recognition accuracy when only a limited number of samples are available. Similarly, synthetic data can also be used to test and validate such recognizers. Also discussed is a dynamic time warping based approach for both segmented and continuous data that is designed to be a robust, go-to method for gesture recognition across a variety of modalities using only limited training samples.
US10133948B2	Device and method for performing optical character recognition A method of performing character isolation in an optical character recognition process, the method comprising receiving image data representing one or more character columns, determining a number of black pixels in each column of the image data, defining a vertical separation threshold which is a maximum number of black pixels in a column, dividing the columns into different pixel groups and groups of excluded columns by excluding any columns with a number of black pixels below the vertical separation threshold, identifying the pixel group representing the left most character column in the image data, determining whether there are one or two pixel groups representing character columns in the image data and, if it is determined that there are two pixel groups representing character columns, using a predetermined width value for a right most character column in order to identify a right hand boundary of the right most character column.
US10133947B2	Object detection using location data and scale space representations of image data An apparatus includes an object detector configured to receive image data of a scene viewed from the apparatus and including an object. The image data is associated with multiple scale space representations of the scene. The object detector is configured to detect the object responsive to location data and a first scale space representation of the multiple scale space representations.
US10133946B2	Image mark sensing systems and methods Systems and methods use a digital microform imaging apparatus for sensing an image mark on the microform containing the image of a document.
US10133945B2	Sketch misrecognition correction system based on eye gaze monitoring The present disclosure relates to a gaze based error recognition detection system that is intended to predict intention of the user to correct user drawn sketch misrecognitions through a multimodal computer based intelligent user interface. The present disclosure more particularly relates to a gaze based error recognition system comprising at least one computer, an eye tracker to capture natural eye gaze behavior during sketch based interaction, an interaction surface and a sketch based interface providing interpretation of user drawn sketches.
US10133942B2	System and method for automatic driver identification A method for driver identification including recording a first image of a vehicle driver; extracting a set of values for a set of facial features of the vehicle driver from the first image; determining a filtering parameter; selecting a cluster of driver identifiers from a set of clusters, based on the filtering parameter; computing a probability that the set of values is associated with each driver identifier of the cluster; determining, at the vehicle sensor system, driving characterization data for the driving session; and in response to the computed probability exceeding a first threshold probability: determining that the new set of values corresponds to one driver identifier within the selected cluster, and associating the driving characterization data with the one driver identifier.
US10133941B2	Method, apparatus and device for detecting lane boundary A method, an apparatus and a device for detecting lane boundaries are provided. The method includes: obtaining a current image of a lane, and extracting brightness jump points in the image by filtering the image; filtering out noise points from the brightness jump points, and determining remaining brightness jump points as edge points to form groups of the edge points, where a connection line of edge points in the same group forms one edge line; recognizing edge lines of the lane boundaries from edge lines; and grouping the edge lines of the lane boundaries, and recognizing edge lines in each group as edge lines of one lane boundary. Based on the method, a calculation for detecting the lane boundaries is simpler, and calculation resources and time consumed in detecting the lane boundaries are reduced to detect the lane boundaries accurately and quickly.
US10133938B2	Apparatus and method for object recognition and for training object recognition model Disclosed are methods and apparatuses for object recognition using an artificial neural network. An object recognition apparatus includes an adjacent pixel setter configured to set the neighboring pixel pairs in the image frame, each neighboring pixel pair including first pixel and one or more second pixels adjacent to the first pixel, a labeler configured to label the first pixel using deep neural network-based model based on probability density function value of the neighboring pixel pairs, and an object recognizer configured to recognize an object based on the labeled first pixel.
US10133936B2	Active compressive sensing via a thermal sensor for human scenario recognition Disclosed and described herein is a system and a method for thermal detection of static and moving objects.
US10133931B2	Alert notification based on field of view Techniques for collecting and presenting information using a wearable device involve receiving criteria information data that specifies one or more criteria for providing information to a user of a wearable device; receiving information indicative of a field of view of the user of the wearable device; detecting that an object in the field of view is associated with one or more attributes that satisfy the user-specified criteria; responsive to detection, executing a rule associated with one or more attributes that satisfy the user-specified criteria; and based on execution of the rule, causing an informational depiction to be presented via a display of the wearable device that visually eliminates or enhances the detected object in the field of view of the user.
US10133927B2	Method and system for processing video content Various aspects of a method and system to process video content for extraction of moving objects from image sequences of the video content are disclosed herein. In an embodiment, the method includes determination of one or more object contours of one or more moving objects in the video content. A first object bounding box (OBB) that encompasses a first object contour of a first moving object is created based on the determined one or more object contours. A first object mask for the first moving object is generated in a first destination image frame, based on infilling of the first object contour in the created first OBB.
US10133925B2	Human-machine interface guidance/indication device and method for iris recognition of mobile terminal The present disclosure provides a human-machine interface guidance/indication device for iris recognition of a mobile terminal, comprising a mobile terminal and an iris recognition imaging module; the mobile terminal comprises a visible light LED (light emitting diode) and a display screen respectively in signal connection with a processor chip; the iris recognition imaging module comprises an imaging sensor and a near-infrared LED lighting source, and a near-infrared optical filter and an optical imaging lens are arranged on the imaging sensor; the processor chip is in signal connection with the imaging sensor and the near-infrared LED lighting source respectively.
US10133919B2	Motion capture system that combines sensors with different measurement ranges Motion capture system with a motion capture element that uses two or more sensors to measure a single physical quantity, for example to obtain both wide measurement range and high measurement precision. For example, a system may combine a low-range, high precision accelerometer having a range of −24 g to +24 g with a high-range accelerometer having a range of −400 g to +400 g. Data from the multiple sensors is transmitted to a computer that combines the individual sensor estimates into a single estimate for the physical quantity. Various methods may be used to combine individual estimates into a combined estimate, including for example weighting individual estimates by the inverse of the measurement variance of each sensor. Data may be extrapolated beyond the measurement range of a low-range sensor, using polynomial curves for example, and combined with data from a high-range sensor to form a combined estimate.
US10133911B2	Method and device for verifying fingerprint Methods and devices are provided for verifying a fingerprint in the field of computer technology. The method includes: N pressing operations successively performed by a finger of a user within an area for acquiring the fingerprint are acquired; a sequence of fingerprints to be verified is generated according to fingerprints and pressing intensities of the N pressing operations; the sequence of fingerprints to be verified is compared with a reference sequence of fingerprints; and when the sequence of fingerprints to be verified is the same as the reference sequence of fingerprints, it is determined that the fingerprint of the user is successfully verified.
US10133907B2	Fingerprint recognition chip packaging structure and packaging method A fingerprint recognition chip packaging structure and a packaging method. The packaging structure includes: a substrate provided with a substrate surface; a sensor chip coupled on the surface of the substrate, where the sensor chip is provided with a first surface and a second surface opposite the first surface, the first surface of the sensor chip is provided with a sensing area, and the second surface of the sensor chip is arranged on the surface of the substrate; a capping layer arranged on the surface of the sensing area of the sensor chip, where the material of the capping layer is a polymer; and, a lamination layer arranged on the surface of the substrate and that of the sensor chip, where the lamination layer exposes the capping layer. The packaging structure allows for reduced requirements on the sensitivity of the sensor chip, thus broadening applications.
US10133903B2	Remote control device and operating method thereof An operating method of a remote control device according to an embodiment of the present invention includes searching at least one of the image display device and external devices, and acquiring device information on at least one of the searched image display device and external devices. The remote control device receives an input first fingerprint for a user preference setting operation of setting at least one of the image display device and external devices to a personalized setting of a user, and acquires user preference setting information including a setting value of the user preference setting operation on the basis of the acquired device information and a first fingerprint image corresponding to the input first fingerprint. The remote control device sets the image display device or external device corresponding to the acquired user preference setting information to the personalized setting of the user corresponding to the first fingerprint on the basis of the user preference setting information.
US10133901B2	System for reading information code A system including a reader and an information terminal is provided. The information terminal displays an information code, while the reader optically reads the information code. The reader includes an emission unit and an imaging unit. The emission unit emits light in a predetermined emission state when the information code is imaged by the imaging unit. The information terminal includes an imaging unit, a control unit and a display unit. The control unit of the information terminal drives/controls the display unit to display the information code only when the predetermined emission state is imaged by the imaging unit. That is, unless the predetermined emission state of the emission unit of the reader is imaged by the imaging unit of the information terminal, the information code is not displayed on the display unit of the information terminal. Thus, security in reading the information code is further improved.
US10133896B2	Payoff information determination An example electronic device includes a watermark scanner to scan a watermark embedded on an initial page of a physical medium. The electronic device also includes a gesture sensor to detect a hand movement of a consumer associated with the physical medium. The electronic device further includes a controller to: determine a page number of the initial page based on the scanned watermark; determine a current page number based on the page number of the initial page; determine a page number of a subsequent page of the physical medium based on the detected hand movement and the current page number; and determine payoff information associated with the subsequent page based on the page number of the subsequent page.
US10133895B2	Fixed position reader of coded information and camera based checkout system using the same A reader contains a housing with a window having a peripheral rim. The housing has a device for reading coded information which generates a field projecting through the window towards the outside of the housing, and has a device for visually indicating the result to a user. The visual indication device generates an indication appearing substantially at least on the window, on a portion of the peripheral rim of the window, or on a portion of the housing adjoining laterally the peripheral rim of the window. The housing portion is at least on the left side, right side, or below the window. Additionally, a camera based checkout security system includes at least a checkout security camera and a fixed position reader of coded information. The checkout security camera generates a camera field of view directed towards the window of the fixed position reader of coded information.
US10133893B2	Fractal plasmonic surface reader antennas Plasmonic-surface antenna systems are described in which resonators, or cells, are closely arranged but do not touch. At least a portion of a radiating surface includes a plurality of cells (operative as resonators) placed very close together to one so that a surface (plasmonic) wave causes near replication of the current of one cell in an adjacent cell. Cells with one or more fractal shapes may be used as a fractal plasmonic surface (FPS). Systems and/or methods are described of using plasmonic surfaces or fractal plasmonic surfaces for radiofrequency identification (RFID). A PS or FPS may act as an intermediary array of antennas, which can serve to connect an RFID reader with one or more RFID tags. Structures including cages are described that can include one or more surfaces that are each an FPS. Methods of power transfer are described.
US10133892B2	System for characterizing a passive antenna network and elements in a distributed antenna system A distributed antenna system includes a plurality of remote antenna units with a passive element coupled to at least one of the remote antenna units at a connection juncture. An RFID system is associated with the first passive element and has RFID data identifying the first passive element. An interrogator unit is associated with the remote antenna unit and is configured for generating a least one signal for transmission to the passive element to be reflected at the connection juncture and received at the interrogator unit. The interrogator unit is also configured for generating at least one signal for transmission to the RFID system to obtain the RFID data identifying the passive element. Processing circuitry processes the reflected signal and measures a parameter of the first passive element. The processing circuitry correlates the measured parameter with the RFID data for the passive element.
US10133891B2	Portable terminal, data communication system, data communication method and program A portable terminal includes a wireless communication unit configured to perform data communication with a wireless tag in a non-contact manner, a position determination unit configured to determine a position of the portable terminal, a control unit configured to generate guide information for guiding the portable terminal to a communicable area where communication with the wireless tag is enabled on the basis of the position determined by the position determination unit if communication is disabled when communication with the wireless tag is performed, and a display unit configured to display the generated guide information.
US10133889B2	Power scheduling for short-range wireless tags A reader device for short-range wireless tags comprises a sensing module coupled to one or more RF antennas. The sensing module is arranged to selectively activate and deactivate individual RF antennas and to read data from a plurality of objects comprising short-range wireless tags which are proximate to an active RF antenna. A scheduler module within the reader device is arranged to obtain device characteristics for the plurality of objects based at least in part on data read by the sensing module and then to generate a powering schedule for the plurality of objects based on the device characteristics. The generated powering schedule is then implemented by the sensing module.
US10133885B2	Method of and system for reading visible and/or invisible code symbols in a user-transparent manner using visible/invisible illumination source switching during data capture and processing operations A digital imaging based symbol reading system has the capacity to automatically read both visible and invisible symbols in the same application environment. Typically, the system reads the symbols in a user-transparent manner. The system may employ visible/invisible illumination switching during operation. The system may include LED illumination sources. A method for reading both visible and invisible symbols using a single device is also disclosed.
US10133882B2	Implementation method for driving of software and hardware supporting OpenSC Disclosed is an implementation method for driving of software and hardware supporting OpenSC. The method is implemented by middleware invoking an interface function, and comprises invocation of a function for initializing an interface, invocation of functions for establishing an encrypted communications environment, selecting a file interface, and selecting a file to operate, invocation of a function for setting a safe environment interface, and invocation of functions for building an APDU for setting a safe environment and setting a safe environment and a signature interface by sending the APDU, and building of a signed APDU and execution, by sending the APDU, of a signature operation on an original text to be signed.
US10133880B2	System and method of preventing unfair evaluation of applications by users Disclosed are systems and methods for blocking access to interface elements of a page of an application in an applications store. The computing device executes executing a restrictive application that restricts use of the computing device. The restrictive application can determine that a page of the application in the application store is being presented on a display of the computing device and block access to interface elements of the application page, thereby preventing punitive evaluations of the restrictive application. To restore access to the application store page, the restrictive application may obtain authentication data associated with an authorized user, and responsive to determining that the obtained authentication data satisfies one or more conditions for unblocking, provide access to the interface elements of the page of the application in the applications store.
US10133879B2	Technique used in text analysis in a safe manner A first character string in a logic used for the text analysis with a second character string which is different form the first character string is replaced using a mapping between the first character string and the second character string. The first character string being a character or a combination of characters in a logic. A first character string is searched for in a target document for the text analysis and the first character string, if found, is replaced with the second character string, using the mapping. The logic is sent after the replacement to a server computer. The target document after the replacement is sent to the server computer. A text analysis result for the target document after the replacement is received form the server computer.
US10133875B2	Digital rights management system implementing version control A server in a digital rights management system implements version control for the digital documents being managed. Each document belongs to a document series and has a version number. The server maintains a version control database table that stores, for each document, the document series name and version number, and parameters indicating whether the document is obsoleted or deleted. When registering a new document, based on auto-obsolete and auto-delete parameters inputted by the user, the server automatically obsoletes or deletes certain older version documents that belong to the same series as the new document. The server controls access to the documents so that obsoleted documents will not be accessible to users even if they still have local copies of such documents. When a user requests access to an older version document that is not obsoleted, the server may allow access to the latest version document instead.
US10133872B2	Enabling access to data Methods, systems, apparatus and computer programs for enabling access to data by a requesting party. A plurality of sets of data are generated. A one one-way function is then used to generate a plurality of keys each associated with a respective one of the plurality of sets. Information associated with the data in a given set is used as an input to the one-way function when generating the key for that set. The keys are distributed to requesting parties. Subsequently, a requesting party may make a data access request using the received key. Upon receipt of a key, access may be enabled to the data. The requesting party may then generate validation data from information associated with at least a part of the received data and validating the received data by comparing the validation data to data derived from the received key.
US10133870B2	Customizing a security report using static analysis A control graph representing a model of data flow of a computer program can be generated during a static analysis. Respective edge weights can be assigned to edges of a plurality of paths in the control flow graph. A size of the uniform-cost search method can be dynamically configured based on a size of the control flow graph. A total edge weight for the considered paths can be determined based the edge weights assigned to the respective edges of the considered path. At least one path of the considered paths in the control flow graph whose total edge weight satisfies a particular total edge weight criteria can be identified. The control flow graph can be updated to indicate to a user the at least one path in the control flow graph whose total edge weight satisfies the particular total edge weight criteria.
US10133867B1	Trusted malware scanning A trusted co-processor can provide a hardware-based observation point into the operation of a host machine owned by a resource provider or other such entity. The co-processor can be installed via a peripheral card on a fast bus, such as a PCI bus, on the host machine. The co-processor can execute malware detection software, and can use this software to analyze data and/or code obtained from the relevant resources of the host machine. The trusted co-processor can notify the customer or another appropriate entity of the results of the scan, such that an appropriate action can be taken if malware is detected. The results of the scan can be trusted, as malware will be unable to falsify such a notification or modify the operation of the trusted co-processor.
US10133866B1	System and method for triggering analysis of an object for malware in response to modification of that object According to one embodiment, a system featuring one or more processors and memory that includes monitoring logic. In operation, the monitoring logic monitors for a notification message that identifies a state change event that represents an activity has caused a change in state of a data store associated with a storage system. The notification message triggers a malware analysis to be conducted on an object associated with the state change event.
US10133859B2	Managing registration of user identity using handwriting Embodiments of the present application relate to a method, apparatus, and system for registering a user identity. The method includes receiving handwriting information associated with handwriting entered by a user, computing a degree of complexity of the first handwriting information, and in the event that the degree of complexity of the first handwriting information satisfies one or more preset conditions, associating the first handwriting information with identity registration information corresponding to the user.
US10133858B2	Applications login using a mechanism relating sub-tokens to the quality of a master token Methods and systems allow a user to log in to a device so that a number of apps become accessible on the device without the user repeatedly logging in to each different app as the user launches multiple apps. A mechanism of providing a master token with a quality score and providing sub-tokens for each app that can use the sub-token and the score quality to evaluate the level of security provided by the initial login allows each app to skip its own login process and provides a level of enhanced efficiency and convenience for the user. A method includes authenticating a user; creating a master token on the user device; creating a sub-token of the master token for an app launched on the device; the app skipping the login process of the app in response to the sub-token so that the app proceeds directly to validating a transaction.
US10133857B2	Phalangeal authentication device In general, apparatuses, methods and computer program products for phalangeal authentication of a user are disclosed. A phalangeal authentication device is provided that is configured for capture, customization and transformation of one or more phalangeal credentials of a user. The phalangeal authentication credentials of the user are captured using phalangeal credential sensor devices. The captured phalangeal credentials are analyzed to determine an associated user activity. The user activity is initiated, automatically, in response to the successful validation of the phalangeal credentials.
US10133839B1	Systems and methods for estimating a power consumption of a register-transfer level circuit design Systems and methods are provided for calculating a power characteristic of an integrated circuit design. For each standard cell of a gate-level netlist, a path length and a set of attributes are computed. For each leaf-level instance of a register-transfer level (RTL) netlist, a path length and a set of attributes are computed. The standard cells are partitioned into first subsets, each of the first subsets containing standard cells with a same path length and a same set of attributes. For each first subset, a relative percentage for each type of standard cell included in the first subset is calculated. The leaf-level instances are partitioned into second subsets. For each pair of corresponding first and second subsets, standard cells are associated with the leaf-level instances of the second subset based on the relative percentages. A power characteristic of the RTL netlist is calculated based on the associated standard cells.
US10133837B1	Method and apparatus for converting real number modeling to synthesizable register-transfer level emulation in digital mixed signal environments A method for converting a real number modeling to a synthesizable register-transfer level emulation in digital mixed signal environments is provided. The method includes verifying an input in a file including a real number modeling code and cleaning the real number modeling code in the file. The method also includes separating a clean register-transfer level code from the real number modeling code, converting the file to a cycle-driven simulation interface file, and verifying the cycle-driven simulation interface file. The method further includes converting the cycle-driven simulation interface file into a register-transfer level file suitable to perform a circuit emulation in digital mixed signal environments, and verifying that the register-transfer level file is ready to perform circuit emulation in the digital mixed signal environments. A system and a non-transitory, computer readable medium storing commands to perform the above method are also provided.
US10133834B2	Method for simulating wave propagation; simulator, computer program and recording medium for implementing the method The method for simulating wave propagation wherein: a) data representing a three-dimensional scene (14) are supplied; b) primary rays (Pij) emitted in different propagation directions are calculated; d) as a function of a point of reception (P), is calculated primary scattered rays (RdA, RdB), emitted by the surfaces of the objects present in the scene reached by a primary ray. The power transported by the scattered rays (Rd) is calculated as a function of the relative orientation between the primary incident ray that reaches the surface of the object in question and the normal to this surface.Simulator, computer program and recording medium for implementing the method.
US10133833B2	Method and device for predictive evaluation of the intermodulation power in an electronic device A method and a device for predictive evaluation of intermodulation power in an electronic device in which a predictive function f makes it possible to evaluate in a predictive manner values of power of an intermodulation component produced by an intermodulation distortion of an input signal, characterized in that the predictive function f includes an odd part V obtained by multiplication of an odd function F and of a function G, obtained by composition of a positive real-valued even function g and of a function Q in the form of a real series including at least one term of degree q belonging to the non-integer reals.
US10133832B2	System and methodology for subterranean process simulation A technique enables simulation of a process performed on an underground formation. The technique comprises forming a cut-out portion in a rock sample and placing a jacket around the rock sample. A sealing collar is inserted into the cut-out portion, and the rock sample is capped between the sealing collar and the jacket. Simulation testing can then be performed on the rock sample through the sealing collar while applying pressure to the rock sample. The sealing collar may be affixed in the cut-out portion.
US10133828B2	Method and apparatus for calculating inserting force and removing force based on 3D modeling A method of calculating an inserting force using 3D modeling, the method being performed by a numerical analysis apparatus is provided. The method includes receiving 3D modeling of a first model and a second model and receiving a first movement direction of the first model to couple the first model to the second model and searching for a contact surface between the first model and the second model while simulating the movement of the first model along the first movement direction and calculating an inserting force required in the process of coupling the first model and the second model by using the contact surface.
US10133827B2	Automatic generation of multi-source breadth-first search from high-level graph language Techniques are described herein for automatic generation of multi-source breadth-first search (MS-BFS) from high-level graph processing language. In an embodiment, a method involves a computer analyzing original software instructions. The original software instructions are configured to perform multiple breadth-first searches to determine a particular result. Each breadth-first search originates at each of a subset of vertices of a graph. Each breadth-first search is encoded for independent execution. Based on the analyzing, the computer generates transformed software instructions configured to perform a MS-BFS to determine the particular result. Each of the subset of vertices is a source of the MS-BFS. In an embodiment, parallel execution of the MS-BFS is regulated with batches of vertices. In an embodiment, the original software instructions are expressed in Green-Marl graph analysis language. In an embodiment, the transformed software instructions are expressed in a general purpose programming language such as C, C++, Python, or Java.
US10133826B2	UDDI based classification system The subject matter disclosed herein provides methods and apparatus, including computer program products, for providing a classification service. The method may receive a request to access a UDDI registry. The classification service may access metadata representing a classification system for the data stored in the UDDI registry. The classification service may provide the data stored in the UDDI registry in a format based on the access metadata. Related apparatus, systems, methods, and articles are also described.
US10133825B2	Portal connected to a social backend A portal is connected to a social backend. The portal comprises an integration component communicating with the social backend. Functionality of the social backend is integrated into the portal system by creating at least one portal object that is associated with at least one social object. The integration component comprises a portal listening component listening to events triggered by running applications of the portal, and creates an event list by filtering events associated with the social backend. A backend processing component keeps portal applications in synchronization with the social backend regarding changes on a portal side. A backend query component queries application programming interfaces of the social backend for current social objects and their states. A portal model processing component calculates actions based on passed in states of current social objects from the backend query component, and invokes corresponding application programming interface calls on the portal.
US10133816B1	Using album art to improve audio matching quality A method for managing a cloud music account of a user is provided, including the following method operations: receiving metadata obtained from an audio file stored on a client device; receiving an audio sample obtained from audio content of the audio file; receiving image data processed from an image associated with the audio file; analyzing the metadata, audio sample, and image data to determine an identity of the audio content of the audio file; and associating to the cloud music account of the user a permission to access cloud-based audio content corresponding to the identity of the audio content of the audio file.
US10133812B2	System and method for finding and prioritizing content based on user specific interest profiles A personalized content delivery computer system is provided comprising: (a) one or more server computers; (b) a server computer program which when executed provides: a content interest profile builder; and a content matching utility; wherein the content interest profile builder and content matching utility are linked so as to enable users of the platform interested in targeting (“targeting users”) one or more other users (“consumer” or “consumers”), using content that is likely to be of interest to the consumer; wherein the content interest profile builder intelligently harvests interest parameters for consumers, and stores the interest parameters iteratively into a content interest profile maintained for each consumer; and wherein the content matching utility determines whether content is likely to be of significant interest to a consumer, using the content interest profile for the consumer. A related method is also provided.
US10133811B2	Non-transitory computer-readable recording medium, data arrangement method, and data arrangement apparatus A data arrangement apparatus executes a process request on data stored in a database, calculates similarity of a process in a combination of the process request and the data, divides the data in such a manner as to distribute the similarity and processes a process request accepted for the divided data.
US10133809B1	Watch time based ranking Methods, systems, and apparatus, including computer programs encoded on computer storage media, for ranking search results. One of the methods includes identifying one or more sessions for a query and associating watch times of the respective resources watched in the sessions with the query. One or more watch time signals are calculated for a first resource and the query based on the watch times associated with the query. A first search result responsive to the query is obtained, wherein the first search result identifies the first resource and has an associated score S. A new score S′ is calculated based on a least S and a watch time function, the watch time function being a function of the one or more watch time signals. The new score S′ is provided to a process for ranking search results including the first search result.
US10133808B2	Providing answers to questions using logical synthesis of candidate answers A method, system and computer program product for generating answers to questions. In one embodiment, the method comprises receiving an input query, decomposing the input query into a plurality of different subqueries, and conducting a search in one or more data sources to identify at least one candidate answer to each of the subqueries. A ranking function is applied to each of the candidate answers to determine a ranking for each of these candidate answers; and for each of the subqueries, one of the candidate answers to the subquery is selected based on this ranking. A logical synthesis component is applied to synthesize a candidate answer for the input query from the selected the candidate answers to the subqueries. In one embodiment, the procedure applied by the logical synthesis component to synthesize the candidate answer for the input query is determined from the input query.
US10133807B2	Author disambiguation and publication assignment Described herein are computer-implemented systems and methods for automatically disambiguating author names for a plurality of publications so as to create clusters of author name mentions that are with high probability associated with a single author identity for each cluster. Also described are systems and methods for assigning the clusters to respective unique author identities, automatically and/or based on human input (e.g., as received from authors, co-authors, or administrative curators).
US10133806B2	Search result replication in a search head cluster Systems and methods for search result replication in a search head cluster of a data aggregation and analysis system. An example method may comprise maintaining a replication count corresponding to how many replicas of a result of a particular map-reduce search exist in a search head cluster comprising a plurality of search heads that are each configured to enable them to manage a reduce phase of a map-reduce search, determining that the replication count is less than a target replication count, selecting, based the determining, a target search head from the search head cluster to receive a replica of the search result, initiating a replication of the search result from a source search head in the search head cluster to the selected target search head, receiving an indication that the replication is complete, and based on receiving the indication, increasing the replication count corresponding to the search result.
US10133804B2	Content item block replication protocol for multi-premises hosting of digital content items A content item block replication protocol for multi-premises hosting of digital content items. In one embodiment, for example, a method comprises: receiving, from a server, a server journal entry identifying one or more content item blocks of a content item represented by the server journal entry; storing a replication log entry corresponding to the server journal entry in a replication log, the replication log entry identifying the one or more content item blocks of the content item represented by the server journal entry and identifying a block server; and either offering to send the one or more content item blocks identified in the replication log entry to the block server identified in the replication log entry, or downloading the one or more content item blocks identified in the replication log entry from the block server identified in the replication log entry.
US10133802B2	Method and apparatus for accelerated record layout detection Various methods and apparatuses are described for performing high speed translations of data. In an example embodiment, record layout detection can be performed for data. In another example embodiment, data pivoting prior to field-specific data processing can be performed.
US10133801B2	Providing data aggregated from various sources to a client application A system and a method are disclosed for generating a repository to be used on a client device. The repository is generated based on a repository format supported by the client device, which is identified by analyzing an empty repository created by the client device. The generated repository is configured with metadata that allows an operating system executing on the client device to communicate with the repository. Once generated, the repository is populated with data associated with a user of the client device. The populated repository is transmitted to the client device, where the repository is used by applications for retrieving and storing data.
US10133798B2	Content transformations using a transformation node cluster Content transformations can include transformation of content items in a CMS repository from a source format to a target format. Such transformations can be performed using a transformation node cluster having multiple nodes, each of which is configured for a specific content transformation type. Router nodes can receive requests for content items and route content items to transformation nodes having a proper content transformation type to either transform a requested content item to the target format or perform an intermediate transformation as part of a transformation chain. A transformation node cluster can be dynamically configurable based on estimates of expected loads for the various types of transformations. Systems, methods, and articles of manufacture are also described.
US10133789B2	Real-time trend detection in a social network Systems, methods, and apparatuses for tracking trends at an online presence are described. In some embodiments, an interactivity data structure and a tenured interactivity data structure are utilized in determining trends quickly.
US10133777B2	Eliminating redundancy when generating intermediate representation code Disclosed herein are system, method, and computer program product embodiments for eliminating redundancy when generating intermediate representation code. An embodiment operates by traversing a query execution plan, and for at least one operator in the query execution plan, determining whether the operator is derived from a parent class operator. If it is determined that the operator is derived from the parent class operator, source code for the native access plan is generated using one or more code generator functions corresponding to the parent class operator and/or one or more generator functions specifically corresponding to the child class operator. If it is determined that the operator is not derived from the parent class operator, source code for the native access plan is generated using one or more code generator functions corresponding to the operator.
US10133773B2	Methods and systems for indirectly retrieving account data from data storage devices A method and system for processing an electronic payment transaction is described herein. The method uses a first computer device configured to access account data from a database subsystem operating at a second computer device. The method includes operating a transaction messaging system (TMS) in a first computer operating environment of the first computer device, operating an account data access system (ADAS) in a second computer operating environment of the first computer device, transmitting a request for account data from the TMS to the ADAS, executing a query for the account data at the database subsystem wherein the query is generated by the ADAS and based on the request for account data, receiving the requested account data at the TMS in response to the query, and processing the payment transaction at the TMS using the received account data.
US10133772B2	Multi-dimensional query statement modification Systems and methods for multi-dimensional query statement modification are described. A system presents a user interface including a first plurality of graphical elements representing a plurality of activity dimensions to a user. The system detects a user selection of a first activity dimension and a second user selection of a first attribute of the first activity dimension without a selection of the second attribute. The system searches objects using a search query based on the first activity dimension and the first attribute to return search results including a first object published on a network-based publication system by a client. The system provides a notification message to the user responsive to identifying feedback information that is received from a trading partner of the client as transgressing a first threshold. The feedback information is identified based on the first object and the second attribute that is not selected from the user interface.
US10133770B2	Copying garbage collector for B+ trees under multi-version concurrency control Structures and processes for garbage collection of search trees under Multi-Version Concurrency Control (MVCC). Such search trees may be used to store data within a distributed storage system. A process detects live search tree elements using tracing and then identify storage chunks having no live elements as garbage to be reclaimed. The process can be paused and resumed to reduce impact on other system processing. To reduce disk fragmentation, a garbage collector may copy pages between chunks prior to reclaiming chunk capacity. Also described is a resource efficient scheduler for a garbage collection.
US10133767B1	Materialization strategies in journal-based databases A journal manager of a multi-data-store storage appends a committed transaction entry to a journal, indicating a state change which has been approved for commit using an optimistic concurrency control algorithm. A first representation of the state change is generated and stored at one materialization node. A different representation of the same state change, comprising at least one attribute for which a value is not included in the first representation, is generated and stored at a different materialization node.
US10133765B1	Quality score for posts in social networking services Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for storing a plurality of items, each item including digital content, for each item of the plurality of items, generating a quality score to provide a plurality of quality scores, each quality score indicating a quality of an associated item and being based on at least one of a status score and a content score, the status score being associated with an author user of a respective item and the content score being associated with digital content provided in the respective item, determining an order of items based on respective quality scores, and transmitting instructions to display items to a user based on the order.
US10133755B2	Legal analytics based on party, judge, or law firm Various of the disclosed embodiments concern systems and methods for applying legal analytics. In some embodiments, a legal analytics platform retrieves legal data from an electronic database, analyzes some or all of the legal data, and identifies interesting patterns and results of statistical analyzes. In order to permit searching of the legal data, metadata elements or tags can be generated for legal entities and legal events. In some embodiments, the legal analytics platform identifies timestamps in the legal data and performs time-based statistical analysis. Results of the statistical analyzes can be presented to a user via a graphical user interface (GUI), which may also allow the user to interact with the legal analytics platform and search one or more databases of legal data.
US10133753B2	Data processing method and data processing apparatus In a data processing method of determining a class to which each of a plurality of input data items belongs, a distance between input data and each of a plurality of representative data items is calculated, a distance calculation method is selected based on the input data, and the input data is allocated to a class to which representative data, from which a shortest distance has been obtained out of the calculated distances using the selected distance calculation method, belongs.
US10133752B2	Dynamic glyph-based search A method and apparatus for a dynamic glyph based search includes an image server. The image server analyzes images to determine the content of an image. The image and data related to the determined content of the image are stored in an image database. A user can access the image server and search images using search glyphs. In response to selection of a generic-search glyph, the image server finds related images in the image database and the images are displayed to the user. In addition, refine-search glyphs are displayed to a user based on the selected generic-search glyph. One or more refine-search glyphs can be selected by a user to further narrow a search to specific people, locations, objects, and other image content.
US10133751B2	Facilitating location-aware analysis Facilitating location-aware analysis is described. In some embodiments, a database building module is configured to build a point of interest (POI) database based on a tree data structure that includes multiple nodes respectively corresponding to multiple areas. The database building module includes a content node processing module that inserts an entry in the POI database having a content field populated by a POI descriptor included with a content node. The database building module also includes a reference node processing module that inserts an entry having multiple reference fields respectively populated with area indicators corresponding to multiple subnodes of a reference node. In other embodiments, a POI database search module is configured to search a POI database to ascertain multiple POIs with regard to a location of a computing device. The search module searches key fields of reference entries and content entries using an area indicator matching the computing device's location.
US10133748B2	Enhancing data retrieval performance in deduplication systems Various embodiments for processing data in a data deduplication system are provided. In one embodiment, a method for processing such data is disclosed. For data segments previously deduplicated by the data deduplication system, a supplemental hot-read link is established for those of the data segments determined to be read on at least one of a frequent and recently used basis. Other system and computer program product embodiments are disclosed and provide related advantages.
US10133746B1	Persistent file system objects for management of databases In a mirrored database system, a careful write of intentions to perform file system actions is recorded in a persistent file system objects table that is flushed to disk prior to the actions being taken. The table durably and accurately records identities of file system objects that were in use by the database to facilitate creation and deletion of physical file directories and files on a database during crash recovery and during mirror resynchronize. In the event of a failure, crash recovery may quickly and easily identify file system objects which need to be cleaned up by reference to the persistent file system objects table. Similarly, resynchronization of the mirror database can be performed quickly by referring to the persistent file system table data to detect changes since the last database checkpoint.
US10133745B2	Active repartitioning in a distributed database Disclosed embodiments include a method (system and non-transitory computer storage readable medium) for load-balancing a distributed database. The distributed database includes one or more storage machines configured to store a plurality of partitions, where each partition includes key-value pairs. In one embodiment, the distributed database prepares for load-balancing by determining a partition to redistribute (or repartition) and generating smaller partitions of the determined partition. In one aspect, each of the smaller partitions is smaller than the determined partition. The redistribution of the partition can occur, when an amount of requests to access one or more key-value pairs stored in the database increases beyond a predetermined request level or when the size of a partition exceeds a predetermined size. Key-value pairs of the determined partition can be split into different sets of key-value pairs, and each set of key-value pair is copied to a corresponding smaller partition.
US10133743B2	Systems and methods for data migration using multi-path input/output and snapshot-based replication A method may include establishing, by a MPIO driver of a host information handling system, an I/O path between the host information handling system and the source storage array as an active I/O path and a path between the host and the target storage array as a passive I/O path. The method may also include performing a snapshot-based iterative replication between the source storage array and the target storage array, wherein successive iterations of the snapshot-based iterative replication comprise I/O to the source storage array occurring during an immediately previous iteration of the snapshot-based iterative replication. The method may further include, upon completion of the snapshot-based iterative replication, establishing, by the MPIO, the I/O path between the host and the source storage array as a passive I/O path and the path between the host and the target storage array as the active I/O path.
US10133735B2	Systems and methods for training a model to determine whether a query with multiple segments comprises multiple distinct commands or a combined command Systems and methods are disclosed herein for training a model to accurately determine whether two phrases are conversationally connected. A media guidance application may detect a first phrase and a second phrase, translate each phrase to a string of word types, append each string to the back of a prior string to create a combined string, determine a degree to which any of the individual strings matches any singleton template, and determine a degree to which the combined string matches any conversational template. Based on the degrees to which the individual and combination strings match the singleton and conversational templates, respectively, strengths of association are correspondingly updated.
US10133726B2	Method, system, and apparatus for validation In a method for validating data, a text of a document is received. At least one fact is extracted from the text. At least one expert refinement is merged with the at least one fact to create at least one modified fact. The at least one modified fact is provided for a review. An expert refinement to the at least one modified fact is captured in response to the review. A superset document based on the at least one pre-existing refinement and the expert refinement is stored.
US10133718B2	Systems and methods for locating, identifying and mapping electronic form fields Systems and methods for locating, identifying, mapping and completing electronic form fields are provided herein. A mapping engine is configured to identify form fields using a variety of similar field names through one or more algorithms configured to identify and match similar field names and combinations of field names. A form field mapping and identification engine identifies a form category using a machine learning classification algorithm, then determines and maps form labels to form fields using seeded values and optical scanning in order to produce a human readable label for each form field. The field labels are used to generate a set of terms for each form field that are used to identify content to be filled in the form with a high degree of accuracy. Additional embodiments are directed toward locating form fields in an electronic form known as a formless form.
US10133714B2	Converting nonextensible schemas of XML documents to RNG files A nonextensible schema is obtained including a first content model of ANY. Based on the nonextensible schema, a compact syntax regular language for XML next generation (RNC) file is generated that includes a second content model of ANY. The second content model of ANY can correspond to the first content model of ANY. The RNC file is modified, based upon the RNC file including the second content model of ANY, so as to explicitly enumerate all semantics of the second content model of ANY as elements in the RNC file. A regular language for XML next generation (RNG) file is later generated based on the modified RNC file. Related apparatus, systems, techniques and articles are also described.
US10133713B2	Domain specific representation of document text for accelerated natural language processing Provided are techniques for a domain specific representation of document text for accelerated natural language processing. A document is selected from a set of documents to be analyzed. A character stream from the document is converted into a token stream based on tokenization rules. Irrelevant tokens are removed from the token stream. The tokens remaining in the token stream are converted into an integer domain representation based on a domain specific ontology dictionary. The integer domain representation are stored to a Graphics Processing Unit (GPU) processing queue of each of one or more GPUs. Then, a result set is received from the one or more GPUs.
US10133709B2	Deployable tag management in computer data networks A tag management system in a computer data network can be used to manage one or more tag configurations with templates. A template may enable efficient tag configuration by causing presentation of an improved user interface that facilitates user-specified mappings between a custom content site and predefined tag management attributes. By completing a template, which may depend on other templates or have templates that depend on it, the tag management system can automatically deploy complex tag management configurations to track end user interactions over a data network.
US10133704B2	Dynamic layout of content in a grid based application Content items are obtained and dynamically arranged in tiles within columns (e.g. columns of a same size) on a display. The obtained items, along with previously obtained items that have not been rendered, are sorted based on a time such as a creation time and a modified time for the item. A determination is made using the sorting as to whether any of the items are ready to render. The determination of whether an item is ready to render may be made before all of the content items are obtained. A layout within the tile(s) for the column for the ready to render items is determined. For example, the items may be placed in tiles based on their content (e.g. text content placed in smaller sized tiles as compared to rich content). The items ready to render are then sent for rendering.
US10133701B2	Apparatus and method for automatically aligning data signals and strobe signals on a source synchronous bus An apparatus is provided that compensates for misalignment on a synchronous data bus. The apparatus includes a replica radial distribution element, a Joint Test Action Group (JTAG) interface, and a bit lag control element. The replica radial distribution element is configured to receive a lag pulse signal, and is configured to generate a replicated strobe signal, where the replica radial distribution network includes replicated propagation path lengths, loads, and buffering of a radial distribution network for a strobe. The JTAG interface is configured to receive control information over a standard JTAG bus, where the control information indicates an amount to adjust a propagation time. The bit lag control element is configured to measure, when an update signal is asserted, the propagation time beginning with assertion of the first signal and ending with assertion of the second signal, and is configured to generate a first value on a lag bus that indicates an adjusted propagation time. The bit lag control element includes delay lock control, adjust logic, and a gray encoder. The delay lock control is configured to select one of a plurality of successively delayed versions of the first signal that coincides with the assertion the second signal, and is configured to generate a second value on a lag select bus that indicates the propagation time, where the delay lock control selects the one of a plurality of successively delayed versions of the first signal by incrementing and decrementing bus states of select inputs on a mux, and where the plurality of successively delayed versions includes inputs to the mux, and where the plurality of successively delayed versions includes outputs a first plurality of series-coupled matched inverter pairs. The adjust logic is coupled to the JTAG interface and to the lag select bus, and is configured adjust the second value by the amount prescribed by the JTAG interface to yield a third value that is output to an adjusted lag bus. The gray encoder is configured to gray encode the third value to generate the first value on the lag bus.
US10133699B2	Hot-plug of devices in virtualized computer systems A system and method for enabling hot-plugging of devices in virtualized systems. A hypervisor obtains respective values representing respective quantities of a resource for a plurality of virtual root buses of a virtual machine (VM). The hypervisor determines a first set of address ranges of the resource that are allocated for one or more virtual devices attached to at least one of the plurality of virtual root buses. The hypervisor determines, in view of the first set of allocated address ranges, a second set of address ranges of the resource available for attaching one or more additional virtual devices to at least one of the plurality of virtual root buses. The hypervisor assigns to the plurality of virtual root buses non-overlapping respective address ranges of the resource within the second set.
US10133697B2	Computer architecture to provide flexibility and/or scalability Apparatus, systems, and/or methods may include a peripheral component interconnect express (PCIe) link to directly couple a slot with a network fabric. The slot may be defined by a surface and/or may accommodate a hardware module. A rack unit implementation may be utilized, such as a one rack unit (1U) implementation, a four rack unit (4U) implementation, and so on. The network fabric may be utilized when hardware modules communicate across the PCIe link, may be bypassed when hardware modules communicate across an additional PCIe link, and so on. The PCIe link may include a direct connect point-to-point PCIe link, a dual star PCIe link, and so on. In addition, the PCIe link may be utilized in a rack-scale architecture.
US10133695B2	Link system for establishing high speed network communications and file transfer between hosts using I/O device links A High Speed Link System providing network and data transfer capabilities, implemented via standard input/output (I/O) device controllers, protocols, cables and components, to connect one or more Host computing systems, comprising a System, Apparatus and Method is claimed; and described in one or more embodiments. An illustrative embodiment of the invention connects two or more Host systems via USB 3.0 ports and cables, establishing Network, Control, Data Exchange, and Power management required to route and transfer data at high speeds, as well as resource sharing. A Link System established using USB 3.0 operates at the full 4.8 Gbps, eliminating losses inherent when translating to, or encapsulating within, a network protocol, such as the Internet Protocol. Method claimed herein describes how two or more connected Host systems, detect one another, and establish separate communication and data exchange bridges, wherein control sequences from the Hosts' application direct the operation of the Apparatus.
US10133693B2	Coordinating memory operations using memory-device generated reference signals A memory system includes a memory controller coupled to multiple memory devices. Each memory device includes an oscillator that generates an internal reference signal that oscillates at a frequency that is a function of physical device structures within the memory device. The frequencies of the internal reference signals are thus device specific. Each memory device develops a shared reference signal from its internal reference signal and communicates the shared reference signal to the common memory controller. The memory controller uses the shared reference signals to recover device-specific frequency information from each memory device, and then communicates with each memory device at a frequency compatible with the corresponding internal reference signal.
US10133692B2	Device including a single wire interface and a data processing system having the same A system including: a master device configured to generate a first signal having a periodic pulse, wherein the first signal includes data; and a slave device including a pin, a delay circuit, a buffer, and a processing circuit, wherein the slave device receives the first signal at the pin, delays the first signal with the delay circuit to generate a second signal having a first delay, delays the first signal with the buffer to generate a third signal having a second delay, and reads the data from the second signal using the third signal at the processing circuit.
US10133684B2	Integrated circuit having ADC, DSP and computing units An integrated circuit, preferably for controlling vehicle functions, having an analog-digital converter for converting an analog signal into digital measurement values, a DSP unit, connected downstream from the analog-digital converter, for pre-processing the digital measurement values, a central computing unit, connected to the DSP unit so as to transmit data, for further processing of the digital measurement values, the DSP unit being set up to control the analog-digital converter during operation.
US10133682B2	Managing grouped student devices with timed locks Systems and methods presented here can allow a teacher to schedule the locking of one or more student devices into an asset at some time in the future. A teacher device can be used to configure lock information, including student identifying information, lock type information, asset information, and lock timing information. The lock information can be transmitted to the student devices for local storage. The lock can then initiate on the student device at the scheduled time even in instances when the student device is not connected to a communication network. After lock expiration, an updated asset can be stored at the student device in conjunction with lock confirmation information. When the student device detects a network connection, the updated asset and the lock confirmation information can be transmitted to a management server where it can be accessed and evaluated by the teacher.
US10133678B2	Method and apparatus for memory management In some embodiments, a method of managing cache memory includes identifying a group of cache lines in a cache memory, based on a correlation between the cache lines. The method also includes tracking evictions of cache lines in the group from the cache memory and, in response to a determination that a criterion regarding eviction of cache lines in the group from the cache memory is satisfied, selecting one or more (e.g., all) remaining cache lines in the group for eviction.
US10133677B2	Opportunistic migration of memory pages in a unified virtual memory system Techniques are disclosed for transitioning a memory page between memories in a virtual memory subsystem. A unified virtual memory (UVM) driver detects a page fault in response to a memory access request associated with a first memory page, where a local page table does not include an entry corresponding to a virtual memory address included in the memory access request. The UVM driver, in response to the page fault, executes a page fault sequence. The page fault sequence includes modifying the ownership state associated with the first memory page to be central-processing-unit-shared. The page fault sequence further includes scheduling the first memory page for migration from a system memory associated with a central processing unit (CPU) to a local memory associated with a parallel processing unit (PPU). One advantage of the disclosed approach is that the PPU accesses memory pages with greater efficiency.
US10133675B2	Data processing apparatus, and a method of handling address translation within a data processing apparatus A data processing apparatus and method are provided for performing address translation in response to a memory access request issued by processing circuitry of the data processing apparatus and specifying a virtual address for a data item. Address translation circuitry performs an address translation process with reference to at least one descriptor provided by at least one page table, in order to produce a modified memory access request specifying a physical address for the data item. The address translation circuitry includes page table walk circuitry configured to generate at least one page table walk request in order to retrieve the at least one descriptor required for the address translation process. In addition, walk ahead circuitry is located in a path between the address translation circuitry and a memory device containing the at least one page table. The walk ahead circuitry comprises detection circuitry used to detect a memory page table walk request generated by the page table walk circuitry of the address translation circuitry for a descriptor in a page table. In addition, the walk ahead circuitry has further request generation circuitry which is used to generate a prefetch memory request in order to prefetch data from the memory device at a physical address determined with reference to the descriptor requested by the detected memory page table walk request. This prefetched data may be another descriptor required as part of the address translation process, or may be the actual data item being requested by the processing circuitry. Such an approach can significantly reduce latency associated with the address translation process.
US10133674B2	System and method for one step address translation of graphics addresses in virtualization A system and method including, in some embodiments, receiving a request for a graphics memory address for an input/output (I/O) device assigned to a virtual machine in a system that supports virtualization, and installing, in a graphics memory translation table, a physical guest graphics memory address to host physical memory address translation.
US10133672B2	System and method for efficient pointer chasing Described is a system and method for efficient pointer chasing in systems having a single memory node or a network of memory nodes. In particular, a pointer chasing command is sent along with a memory request by an issuing node to a memory node. The pointer chasing command indicates the number of interdependent memory accesses and information needed for the identified interdependent memory accesses. An address computing unit associated with the memory node determines the relevant memory address for an interdependent memory access absent further interaction with the issuing node or without having to return to the issuing node.
US10133671B2	Proxy cache conditional allocation A system and method are disclosed that include a bridge that translates non-coherent transactions, which are received from a non-coherent subsystem, into one or more coherent transactions to be issued to a coherent subsystem. The bridge also buffers data coherently in an internal cache, also known as a proxy cache, based on certain attributes of the non-coherent transaction. The invention may be applied to any cache, which receives read and write transactions that become coherent transactions.
US10133670B2	Low overhead hierarchical connectivity of cache coherent agents to a coherent fabric In an example, a system-on-a-chip comprises a plurality of multi-core processors, such as four dual-core processors for eight total cores. Each of the processors connects to shared resources such as memory and peripherals via a shared uncore fabric. Because each input bus for each core can include hundreds of data lines, the number of lines into the shared uncore fabric can become prohibitive. Thus, inputs from each core are multiplexed, such as in a two-to-one configuration. The multiplexing may be a non-blocking, queued (such as FIFO) multiplexing to ensure that all packets from all cores are delivered to the uncore fabric. In certain embodiment, some smaller input lines may be provided to the uncore fabric non-multiplexed, and returns (outputs) from the uncore fabric to the cores may also be non-multiplexed.
US10133667B2	Efficient data storage and retrieval using a heterogeneous main memory Techniques related to efficient data storage and retrieval using a heterogeneous main memory are disclosed. A database includes a set of persistent format (PF) data that is stored on persistent storage in a persistent format. The database is maintained on the persistent storage and is accessible to a database server. The database server converts the set of PF data to sets of mirror format (MF) data and stores the MF data in a hierarchy of random-access memories (RAMs). Each RAM in the hierarchy has an associated latency that is different from a latency associated with any other RAM in the hierarchy. Storing the sets of MF data in the hierarchy of RAMs includes (1) selecting, based on one or more criteria, a respective RAM in the hierarchy to store each set of MF data and (2) storing said each set of MF data in the respective RAM.
US10133664B2	Method, flash memory controller, memory device for accessing 3D flash memory having multiple memory chips A method for accessing a flash memory module is provide. The flash memory module is a 3D flash memory module including a plurality of flash memory chips, each flash memory chip includes a plurality of blocks, each block includes a plurality of pages, and the method includes: configuring the flash memory chips to set at least one super block of the flash memory chips; and allocating a buffer memory space to store a plurality of temporary parities generated when data is written into the at least one first super block.
US10133653B2	Recording and playback of trace and video log data for programs Recording and playback of trace log data and video log data for programs is described. In one aspect, a method for viewing log data recorded during execution of a program includes causing a display of recorded images depicting prior visual user interaction with the program during a particular time period. The method also includes causing a display of messages tracing and describing prior execution of the program during the particular time period. The display of the messages and the display of the recorded images are synchronized.
US10133652B2	Debugging optimized code using FAT binary Embodiments of the present invention provide a method, computer program product, and system for debugging optimized code. The system includes a FAT binary, wherein the FAT binary comprises a non-optimized native code and an internal representation of a program's source code. An optimus program is configured to transform the internal representation of the program's source code into a fully optimized native code. The system also includes an enhanced loader, wherein the enhanced loader is configured to communicate with a debugger to determine a type of code to load.
US10133651B2	Software defect analysis tool A software defect detection tool determines a modification in a software code at a first time and analyzes an execution of the software code to detect a performance issue at a second time. The software defect detection tool detects a defect in the software code by a comparison of the first time and a second time. A software defect analysis tool generates a cause/category combination for a software code defect. The software defect analysis tool determines whether the cause/category combination is an approved combination and whether the software code defect is a false positive. The software defect analysis tool generates a corrective action plan indicating measures to implement to reduce software defects.
US10133649B2	System and methods for model-based analysis of software Systems and methods for software verification. In some embodiments, an application architecture model is generated for a software application, wherein: the application architecture model is generated based on source code of the software application and a framework model representing a software framework using which the software application is developed; and the application architecture model comprises a plurality of component models. One or more component models may be selected, based on a property to be checked, from the plurality of component models. The one or more component models may be analyzed to determine if the property is satisfied.
US10133646B1	Fault tolerance in a distributed file system A method for providing fault tolerance in a distributed file system of a service provider may include launching at least one data storage node on at least a first virtual machine instance (VMI) running on one or more servers of the service provider and storing file data. At least one data management node may be launched on at least a second VMI running on the one or more servers of the service provider. The at least second VMI may be associated with a dedicated IP address and the at least one data management node may store metadata information associated with the file data in a network storage attached to the at least second VMI. Upon detecting a failure of the at least second VMI, the at least one data management node may be re-launched on at least a third VMI running on the one or more servers.
US10133645B2	Data recovery in three dimensional non-volatile memory array after word line short Data is programmed in a respective block of non-volatile three dimensional memory. The block contains a plurality of rows of subblocks, each row having S subblocks. Programming data in the respective block includes successively programming data in individual rows of the respective block. Programming data in each row is completed prior to programming data in a next row. Programming data in a row includes successively programming data in individual subblocks of the row, in a predefined order. The programming of data in each subblock is completed prior to programming data in a next subblock. While programming data in each individual subblock, a number of XOR signatures, sufficient in number to enable recovery from a short circuit that disables two or three word lines, are generated in volatile memory, and then copied to non-volatile memory prior to programming data in a next subblock in the respective block.
US10133644B2	Method and apparatus for indirectly assessing a status of an active entity A method and system permit a backup entity of a redundant apparatus of a communication system that shares control of hardware resources or other network resources with an active entity to indirectly determine a status of the active entity based upon behavior and reaction to actions it takes in connection with resources it shares control of with the active entity. Such a method and system permit the backup entity to deduce the state of the active entity without having any a hardware connection or other communication connection with the active entity.
US10133641B2	Tracking modifications to a virtual machine image that occur during backup of the virtual machine A computer system comprises a processor unit arranged to run a hypervisor running one or more virtual machines; a cache connected to the processor unit and comprising a plurality of cache rows, each cache row comprising a memory address, a cache line and an image modification flag; and a memory connected to the cache and arranged to store an image of at least one virtual machine. The processor unit is arranged to define a log in the memory and the cache further comprises a cache controller arranged to set the image modification flag for a cache line modified by a virtual machine being backed up, but not for a cache line modified by the hypervisor operating in privilege mode; periodically check the image modification flags; and write only the memory address of the flagged cache rows in the defined log.
US10133638B1	Recovery of in-memory state in a log-structured filesystem using fuzzy checkpoints Recovery of an in-memory state in a log-structured filesystem using fuzzy checkpoints is disclosed, including: determining a portion of a data structure to checkpoint to a storage unit, wherein the structure is associated with a set of references to locations in persistent storage at which metadata is stored, wherein the portion of the data structure is dynamically determined based at least in part on a size of the data structure and a predetermined number of storage units to be associated with a checkpoint window, wherein the number of storage units to be associated with the checkpoint window is fewer than a total number of storage units associated with the persistent storage; and checkpointing the portion of the data structure to the storage unit.
US10133637B2	Systems and methods for secure recovery of host system code A management controller may be configured to control connectivity among a host system processor, a primary ROM, and a recovery ROM in accordance with a plurality of modes of operation including at least a normal mode that occurs in response to absence of a corruption of the ROM code in which the management controller causes the host system processor to be communicatively coupled to the primary ROM and communicatively decoupled from the recovery ROM, such that the host system processor loads and executes the ROM code during boot of the host system, and a primary ROM recovery mode that occurs in response to presence of the corruption of the ROM code in which the management controller causes the host system processor to be coupled to the primary ROM and the recovery ROM, such that the host system processor loads and executes the recovery code during boot of the host system.
US10133635B2	Low-width vault in distributed storage system A method includes storing a first set of data slices in a standard-width vault using a first group of DS units of a distributed storage network (DSN). The first set of data slices corresponds to a first representation of a data object, and includes a first write-threshold number of data slices encoded using a first set of dispersal parameters specifying first write and read widths associated with the standard-width vault. A second set of data slices, corresponding to a second representation of the data object, is stored in a low-width vault using a second group of DS units. The second set of data slices includes at least a second write-threshold number of data slices encoded using a second set of dispersal parameters specifying second write and read widths associated with the low-width vault. The low-width vault has a lower width read and/or write width than the standard-width vault.
US10133634B2	Method for performing in-place disk format changes in a distributed storage network A method begins by processing modules in a dispersed storage network (DSN) identifying a memory device having a legacy slice storage format (SSF) to a second SSF and that includes a first encoded data slice (EDS) of a set of EDSs. When at least a predetermined threshold number of EDSs of the set of EDSs are included within one or storage units (SUs) excluding the first EDS the method continues by transitioning the first SSF of the memory device to the second SSF, and performing a rebuilding process using the at least the decode threshold number of EDSs of the set of EDSs to generate a rebuilt first EDS. The method continues by storing the rebuilt first EDS within the memory device to replace the first EDS that was deleted during the transitioning.
US10133623B2	Systems and methods for determining and rectifying events in processes Systems (100) and methods are provided for obtaining process model which comprises of process maps, wherein process maps comprises of process levels and sub levels, which are configured with key metrics and corresponding time stamp to monitor health of process model. During execution of process model and therein the process levels, configured key metrics are monitored and compared with the pre-defined threshold value. Any increase in the key metrics beyond threshold limit, one or more events are determined, which are analyzed and based on the time stamp of the events, process levels and sub levels are identified and rectified. In one of the embodiment, system (100) enables replay process to replay process model for problem determination purpose. In the replay process, system (100) enables viewing of obtained process model wherein process definition and data with time stamp is in XML format for every step which is recorded in the past.
US10133618B2	Diagnostic data set component Various embodiments for retaining diagnostic information for data in a computing storage environment. In one such embodiment, a diagnostic component, apart from a volume table of contents (VTOC), associated with an integrated catalog facility (ICF) catalog and with a base data set from data sets via a catalog association record, is initialized. The diagnostic component is configured to retain base data set-specific diagnostic information retrievable by the computing storage environment to assist in error diagnosis. The base data set-specific diagnostic information is stored pursuant to at least one detected event associated with the base data set.
US10133616B2	Hybrid distributed storage system There is provided a distributed object storage system that includes several performance optimizations with respect to efficiently storing data objects when coping with a desired concurrent failure tolerance of concurrent failures of storage elements which is greater than two and with respect to optimizing encoding/decoding overhead and the number of input and output operations at the level of the storage elements.
US10133610B2	System, method and recording medium for temperature-aware task scheduling A temperature-aware task scheduling method, system, and computer program product, includes the GPU, receiving a request to execute the task, collecting task information including an intensiveness factor of a computation by an arithmetic logic unit (ALU) and a memory usage of a dynamic random-access memory (DRAM) for the task, obtaining a temperature of the ALU and a temperature of the DRAM, and accepting the task to the GPU based on the intensiveness factor, the ALU temperature, and the DRAM temperature.
US10133609B2	Dispersed storage network secure hierarchical file directory A method includes creating a file directory entry in a directory file of a secure hierarchical file directory system for a file. The file directory entry includes a path name, an encryption access control list, and a source name. The file is encrypted with a key and the key is encrypted with each public key of user devices authorized to access the file. The encryption access control list includes identities of the set of user devices and the set of object content keys. The method further includes encrypting the directory file using a second key. The method further includes generating second object content keys based on the second key and public keys of second user devices authorized to access the directory file. The method further includes creating a next level directory file entry in a next higher directory file of the secure hierarchical file directory system for the directory file.
US10133604B2	Information processing device, information processing method, program, and information storage medium In response to a selection of a program, a board image display control section sets program related information associated with the selected program in a displayable state. An execution start managing section starts the program in response to reception of a request to start the program, the program related information associated with the program being set in the displayable state. A stop and end managing section ends an already started program when a given condition is satisfied at a time of starting the program by the execution start managing section. A setting of program related information associated with the ended program is maintained in a displayable state even after the program is ended by the stop and end managing section.
US10133602B2	Adaptive contention-aware thread placement for parallel runtime systems An adaptive contention-aware thread scheduler may place software threads for pairs of applications on the same socket of a multi-socket machine for execution in parallel. Initial placements may be based on profile data that characterizes the machine and its behavior when multiple applications execute on the same socket. The profile data may be collected during execution of other applications. It may identify performance counters within the cores of the processor sockets whose values are suitable for predicting whether the performance of a pair of applications will suffer when executed together on the same socket (e.g., values indicative of their demands for particular shared resources). During execution, the scheduler may examine the performance counters (or performance metrics derived therefrom) and determine different placement decisions (e.g., placing an application with high demand for resources of one type together with an application with low demand for those resources).
US10133600B2	Application load adaptive multi-stage parallel data processing architecture Systems and methods provide an extensible, multi-stage, realtime application program processing load adaptive, manycore data processing architecture shared dynamically among instances of parallelized and pipelined application software programs, according to processing load variations of said programs and their tasks and instances, as well as contractual policies. The invented techniques provide, at the same time, both application software development productivity, through presenting for software a simple, virtual static view of the actually dynamically allocated and assigned processing hardware resources, together with high program runtime performance, through scalable pipelined and parallelized program execution with minimized overhead, as well as high resource efficiency, through adaptively optimized processing resource allocation.
US10133597B2	Intelligent GPU scheduling in a virtualization environment Technologies for scheduling workload submissions for a graphics processing unit (GPU) in a virtualization environment include a GPU scheduler embodied in a computing device. The virtualization environment includes a number of different virtual machines that are configured with a native graphics driver. The GPU scheduler receives GPU commands from the different virtual machines, dynamically selects a scheduling policy, and schedules the GPU commands for processing by the GPU.
US10133592B2	Parallel processing of data A data parallel pipeline may specify multiple parallel data objects that contain multiple elements and multiple parallel operations that operate on the parallel data objects. Based on the data parallel pipeline, a dataflow graph of deferred parallel data objects and deferred parallel operations corresponding to the data parallel pipeline may be generated and one or more graph transformations may be applied to the dataflow graph to generate a revised dataflow graph that includes one or more of the deferred parallel data objects and deferred, combined parallel data operations. The deferred, combined parallel operations may be executed to produce materialized parallel data objects corresponding to the deferred parallel data objects.
US10133591B2	Network traffic data in virtualized environments Approaches are described for collecting and/or utilizing network traffic information, such as network flow data, within a virtualized computing environment. The network traffic information can be collected on one or more host computing devices that host virtual machines. The collected network traffic information can include virtualized computing environment specific information, such as a user account identifier (ID), virtual machine identifier (ID), session termination information and the like. The collected network traffic information can also be presented to the user of the virtualized computing environment.
US10133590B2	Container runtime support Processes, machines, and manufactures involving adaptable containers that can be built and torn down more efficiently than VMs, may support various processes, and may be maintained without the presence of an active process. These adaptable containers may also be configured to support a process type and may support various processes at the same time as well. Other features and aspects are provided and taught.
US10133584B2	Mechanism for obviating the need for host-side basic input/output system (BIOS) or boot serial peripheral interface (SPI) device(s) The present disclosure describes several embodiments, e.g., a method, a baseboard management controller (BMC) system, a computer-readable non-transitory medium, for managing boot images for a computer system. These embodiments may include obtaining, by a BMC of the BMC system, a first boot image for the processor-based system, storing, by the BMC of the BMC system, the first boot image at a first location in a memory element of BMC system, and informing, by the BMC of the BMC system to a bus-to-memory bridge, first location information indicating a first location at which the first boot image is stored. The present disclosure also describes the bus-to-memory bridge which interfaces between a bus of the processor-based system and the memory element of the BMC system to allow one or more processors of the processor-based system to access the memory element of the BMC system to obtain boot image(s).
US10133582B2	Instruction and logic for identifying instructions for retirement in a multi-strand out-of-order processor A processor includes a first logic to execute an instruction stream out-of-order, the instruction stream divided into a plurality of strands, the instruction stream and each strand ordered by program order (PO). The processor also includes a second logic to determine an oldest undispatched instruction in the instruction stream and store an associated PO value of the oldest undispatched instruction as an executed instruction pointer. The instruction stream includes dispatched and undispatched instructions. The processor also includes a third logic to determine a most recently retired instruction in the instruction stream and store an associated PO value of the most recently retired instruction as a retirement pointer, a fourth logic to select a range of instructions between the retirement pointer and the executed instruction pointer, and a fifth logic to identify the range of instructions as eligible for retirement.
US10133577B2	Vector mask driven clock gating for power efficiency of a processor A processor includes an instruction schedule and dispatch (schedule/dispatch) unit to receive a single instruction multiple data (SIMD) instruction to perform an operation on multiple data elements stored in a storage location indicated by a first source operand. The instruction schedule/dispatch unit is to determine a first of the data elements that will not be operated to generate a result written to a destination operand based on a second source operand. The processor further includes multiple processing elements coupled to the instruction schedule/dispatch unit to process the data elements of the SIMD instruction in a vector manner, and a power management unit coupled to the instruction schedule/dispatch unit to reduce power consumption of a first of the processing elements configured to process the first data element.
US10133576B2	Parallel slice processor having a recirculating load-store queue for fast deallocation of issue queue entries An execution unit circuit for use in a processor core provides efficient use of area and energy by reducing the per-entry storage requirement of a load-store unit issue queue. The execution unit circuit includes a recirculation queue that stores the effective address of the load and store operations and the values to be stored by the store operations. A queue control logic controls the recirculation queue and issue queue so that that after the effective address of a load or store operation has been computed, the effective address of the load operation or the store operation is written to the recirculation queue and the operation is removed from the issue queue, so that address operands and other values that were in the issue queue entry no longer require storage. When a load or store operation is rejected by the cache unit, it is subsequently reissued from the recirculation queue.
US10133571B1	Load-store unit with banked queue A load-store unit having one or more banked queues is disclosed. In one embodiment, a load-store unit includes at least one queue that is subdivided into multiple banks. Although divided into multiple banks, the queue logically appears to software as a single queue. A first bank of the queue includes a first plurality of entries, with the second bank of the queue having a second plurality of entries, wherein each of the entries is arranged to store memory instructions. Each of the banks is associated with corresponding logic circuitry that controls one or more pointers for that bank. The pointer information may be exchanged between the logic circuits associated with the banks. Based on the pointer information that is exchanged, each bank may output (e.g., for retirement) one entry per cycle.
US10133568B2	Embedding code anchors in software documentation Techniques are provided for performing automated operations to support the identification of software documentation in need of updating. Application screen shots or other documentation anchors are generated having metadata regarding the application source code that is executing or recently executed. When the application software is updated, code path metadata is compared with source code changes to identify areas of documentation that may need updating.
US10133567B1	Systems and methods for pre-processing and runtime distribution of interactive content Source interactive content is obtained, including asset objects and code objects. Interactive content metadata is generated from the source interactive content, the interactive content metadata identifying links between asset objects and code objects. Target interactive content is generated from the source interactive content, the target interactive content being capable of playback using the interactive content metadata, the target interactive content being otherwise incapable of playback without the interactive content metadata. The target interactive content and interactive content metadata are packaged into an interactive content package for each of a plurality of different platform formats. A runtime request for interactive content is received, and a platform format associated with the runtime request is identified. A particular platform-specific interactive content package is selected based on the platform format associated with the runtime request. The particular platform-specific interactive content package is provided for interactive content playback.
US10133566B2	Software upgrading system and method in a distributed multi-node network environment A software upgrade in a data communication network may be provided by a first node. The first node may transfer a software unit to other nodes in the network. The first node may also monitor for receipt of a notification indicating completion of storage of the software unit by a node. The first node may further transmit a reboot command to the other nodes. The first node transmits the reboot command in response to receipt of the completion notification from each of the other nodes. The first node does not transmit the reboot command to any of the other nodes until the first node has received a completion notification from each of the other nodes.
US10133562B2	Efficiently representing complex score models Data is received that characterizes a score model. Thereafter, the score model is normalized by transforming it into a directed acyclic graph. The directed acyclic graph is then transformed into a structured rules language program. The structured rules language program is then transformed into a program using a concurrent, class-based, object-oriented computer programming language (e.g., JAVA, C, COBOL, etc.). Related apparatus, systems, techniques and articles are also described.
US10133560B2	Link time program optimization in presence of a linker script A method for optimizing source code comprises optimizing the source code of files from a computer program at link-time, and receiving, at a linker, a customized linker script defining output sections for files of an executable version of the files of the computer program. The method comprises adding, to intermediate representation files having global or local symbols, metadata comprising default section assignment information for the symbols and recording, for symbols in machine code files, an origin path and an output section. The method further comprises parsing, by the compiler, the intermediate representation files, recording the symbols and related symbol information comprising default section assignment and dependency information of the intermediate representation files, assigning output sections to the symbols based on the default section assignments and instructions from the customized linker script, and linking optimized code of the files of the computer program based on the assigned output sections.
US10133557B1	Modifying code to reduce redundant or unnecessary power usage Disclosed herein are representative embodiments of methods, apparatus, and systems for analyzing and/or transforming code (typically, source code) to reduce or avoid redundant or unnecessary power usage (e.g., power cycling, resource leak bugs, and/or unnecessarily repeated activity) in the device that will ultimately execute the application defined by the source code. The disclosed methods can be implemented by a software tool (e.g., a static program analysis tool or EDA analysis tool) that analyzes and/or transforms source code for a software application to help improve the performance of the software application on the target device. The disclosed methods, apparatus, and systems should not be construed as limiting in any way.
US10133555B2	Method of operating random pulse generator apparatus using radioisotope Provided is an operating method of a random pulse generation apparatus using radioactive isotopes. An operating method of a random pulse generation apparatus using radioactive isotopes includes the steps of includes the steps of emitting alpha particles from a radioactive isotope emission unit, generating a pulse by repeating an operation in which when the alpha particles collide against a CMOS image sensor, the CMOS image sensor breaks down and a reverse current is generated, a first capacitor is connected to a ground and becomes a conduction state to generate a positive pulse, and if the alpha particles do not collide against the CMOS image sensor or the CMOS image sensor does not break down, the first capacitor is not conductive and an output value maintains a ground state, and amplifying the generated pulse by feedback impedance.
US10133554B2	Non-modular multiplier, method for non-modular multiplication and computational device A non-modular multiplier, a method for non-modular multiplication and a computational device are provided. The non-modular multiplier includes an interface and circuitry. The interface is configured to receive n-bit integers A and B. The circuitry is configured to calculate a non-modular product (AB) by performing a sequence of computations, and to randomize a pattern of an electrical power consumed by the multiplier when performing the sequence. The sequence includes: generating a random number w, determining moduli M1 and M2 that depend on a number R=2k, k equals a bit-length of M1 and M2, and on the random number w, and calculating a first modular product C=AB % M1 and a second modular product D=AB % M2, and producing and outputting the non-modular product (AB) based on the first and second modular products.
US10133553B2	Reciprocal unit A reciprocal unit for computing an estimated reciprocal of a number represented by a bit string. The unit comprises a first lookup table configured to receive one or more of the bits in the bit string and to output an initial estimate of the reciprocal of the number. The unit further comprises a second lookup table configured to receive one or more of the bits in the bit string and to output the square of the initial estimate of the reciprocal of the number. The unit still further comprises a multiplier circuit configured to multiply the square of the initial estimate by the number, and an adder-subtractor circuit for subtracting the product of the multiplication from a scaled value of the initial estimate to determine a final estimate of the reciprocal of the number.
US10133551B1	Content-aware compression of data using multiple parallel prediction functions Multiple parallel prediction functions are employed for content-aware data compression. An exemplary method comprises obtaining a floating point number comprising a sign, an exponent at a given base and a significand having a length; applying a plurality of distinct prediction algorithms to the floating point number to generate a corresponding plurality of predictions; selecting a given one of the plurality of distinct prediction algorithms for the floating point number by evaluating a compression metric applied to the plurality of predictions; and encoding the floating point number by encoding the exponent and the length as a single code using a residual generated by the selected prediction algorithm. A disambiguation index optionally identifies the selected prediction algorithm among a set of prediction algorithms that potentially generated the selected prediction. A set of one or more predictors out of a larger set of predictors can be determined for a specific data set based on a performance-based ranking.

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