| Document | Document Title |
|---|---|
| US10135557B2 |
Encapsulation of digital communications traffic for transmission on an optical link
A method (10) of encapsulating digital communications traffic for transmission on an optical link, the method comprising: a. receiving an input digital communications signal having an input line code (12); b. performing clock and data recovery on the input digital communications signal to obtain input line coded digital communications traffic and a recovered clock signal (14); c. decoding the input digital communications traffic to obtain information bits and non-information bits (16); d. removing the non-information bits (18); e. adding service channel bits for monitoring or maintenance (20); f. assembling the service channel bits and information bits into frames (22); and g. line coding the assembled frames using an output line code to form an encapsulated digital communications signal for transmission on an optical link (24), wherein steps c. to g. are performed using the timing of the recovered clock signal. A communications network receiver configured to implement the method is also provided. |
| US10135556B2 |
Signal transmission method, controller, and signal transmission system
A signal transmission method includes receiving, by a controller, a request signal sent by a first transmitter. The method includes establishing, by the controller according to the request signal, a second optical path that connects the first transmitter to the second receiver in the optical switching network (OSN). The method includes sending, by the controller, to the second receiver according to the request signal, a reset signal used to instruct the second receiver to be reset to an initial state. The method includes sending, by the controller, an acknowledgement signal to the first transmitter. The acknowledgment signal is used to instruct the first transmitter to send, by using the second optical path, an optical signal to the second receiver. |
| US10135555B2 |
Monitoring behavior of listening to broadcast
A device and a method for monitoring behavior of listening to broadcast comprises a transmitter transmitting a characteristic audio signal which is modulated on a carrier signal; a collector collecting an ambient sound; a detector detecting whether the collected ambient sound contains the characteristic audio signal; and a determiner determining whether a broadcast receiving apparatus receives the broadcasting channel corresponding to frequency of the carrier signal according to the result of the detector. |
| US10135549B2 |
Operation of a transmission device of a magnetic resonance device
A method for operating a transmission device of a magnetic resonance device is provided. In order to actuate coil elements of a radiofrequency coil with different phases, phase differences in a reference plane are taken into consideration. In a first calibration measurement to be performed once for each transmission path, a first phase of a transmitted radiofrequency signal is measured by an internal measuring device installed permanently in the transmission device spaced apart from the reference plane. A second phase of the transmitted radiofrequency signal is measured by a second, external measuring device to be connected to the reference plane for the first calibration measurement. At least one phase of the first phase and the second phase is taken into consideration in the phase-accurate actuating of the coil elements and/or for correcting further measurements with the internal measuring device. |
| US10135548B2 |
System, apparatus, and method for at least mitigating a signal reflection
An apparatus, system, and method are provided for at least mitigating a signal reflection. Included is a filter configured to receive a data signal for transmission, and filter the data signal to generate a filtered data signal. Also included is a gain regulator in electrical communication with the filter. The gain regulator is configured to receive the filtered data signal for adjusting a gain of the filtered data signal to generate a gain regulator output signal for use in at least mitigating a signal reflection. Further, a controller is provided in electrical communication with the filter and the gain regulator. The controller is configured to receive the filtered data signal, and process the filtered data signal to generate at least one controller output signal for use in controlling the filter and the gain regulator. |
| US10135539B2 |
Devices and techniques for integrated optical data communication
Devices and techniques for integrated optical data communication. A method of encoding symbols in an optical signal may include encoding a first symbol by injecting charge carriers, at a first rate, into a semiconductor device, such as a PIN diode. The method may also include encoding a second symbol by injecting charge carriers, at a second rate, into the semiconductor device. The first rate may exceed the second rate. A modulator driver circuit may include a resistive circuit coupled between supply terminal and drive terminals. The modulator driver circuit may also include a control circuit coupled between a data terminal and the resistive circuit. The control circuit may modulate a resistance of the resistive circuit by selectively coupling one or more of a plurality of portions of the resistive circuit to the drive terminal based on data to be optically encoded. In some embodiments, a modulator driver circuit and an optical modulator may be integrated on the same die or stacked (3D integrated) die and connected with through-oxide or through-silicon vias. |
| US10135537B2 |
Programmable small form-factor pluggable module
A small form factor pluggable (“SFP”) transceiver for use in a communications network includes a transmitter adapted to be coupled to the network for supplying signals to the network, a receiver adapted to be coupled to the network for receiving signals from the network, and a programmable signal processing module coupled to the transmitter and the receiver and adapted to be programmed from a remote station coupled to the network. The module can be programmed to perform at least one service or management function on the network. |
| US10135536B2 |
Transmitter optical signal to noise ratio improvement through receiver amplification in single laser coherent systems
A transceiver having an improved transmitter optical signal to noise ratio, and methods of making and using the same. |
| US10135531B1 |
Systems and methods for cancellation of undesired reflections in testing of optical fibers
An optical transmission system transmits an optical signal over an optical path. Reflections of the optical signal are received at an optical detector which generates an analog reflection signal. The analog reflection signal includes both a desired portion and an undesired portion. Correlators of an OTDR system generate correlation values based on the analog reflection signal. A subset of the correlation values are associated with locations of the optical path that cause the reflections that result in the undesired portion of the reflected signal. A filter uses these correlation values to generate a cancellation signal that is subtracted from the analog reflection signal, reducing the undesired portion of the signal that must be processed. |
| US10135524B2 |
Method and apparatus for compensating for signal error at transmit end of optical time domain reflectometer
A method for compensating for a signal error at a transmit end of an optical time domain reflectometer is provided. The method includes: detecting an actual signal sequence of a PN sequence sent by a transmitter to a measured optical fiber and an actual signal sequence of an optical signal and reflected back by the measured optical fiber and received by a receiver; obtaining a compensation value of the optical signal that attenuates in a process in which the optical signal is reflected by the measured optical fiber; computing an optical fiber attenuation curve function obtained through a current iteration; and determining, when determining that the optical fiber attenuation curve function obtained through the current iteration satisfies a given condition, performance of the measured optical fiber according to the optical fiber attenuation curve function obtained through the current iteration. |
| US10135519B1 |
Antenna assembly system
An antenna assembly includes: a first rod; a first casing having a first antenna installed thereon, and the first casing coupled to the first rod; a second rod, coupled to an outer surface of the first casing; and a second casing having a plurality of second antennas installed thereon, and the second casing coupled to the second rod. The assembly may include multiple numbers of casings each rotatably independent of one another, and allows the assembly to simultaneously communicate with multiple UAVs in the air. |
| US10135514B2 |
Method and apparatus for providing channel state information-reference signal (CSI-RS) configuration information in a wireless communication system supporting multiple antennas
A method and a mobile station for transmitting channel state information (CSI) to a base station; and a method and a base station for receiving CSI from a mobile station in a wireless communication system are discussed. The method according to an embodiment includes receiving first information on one or more channel quality measurement resources and second information on one or more interference measurement resources from a base station; receiving reference signals based on the first information from the base station; generating the CSI by using the reference signals and the second information; and transmitting the CSI to the base station. |
| US10135512B2 |
System and method for millimeter wave communications
A method includes determining that a change is needed to a configuration of a user equipment (UE) centric cloud cell, where the determining is in accordance with measurement reports of beam-formed reference signals transmitted by mmWave TPs of a measurement set, and when the change comprises a change to a modulation coding scheme (MCS) level of a communications link associated with the UE centric cloud cell, adjusting the MCS level of the communications link. The method includes when the change comprises at least one of a change to a communications beam or a mmWave TP change, sending a change query requesting the at least one of the change to the communications beam or the mmWave TP change, and receiving from a central controller a confirmation message. The method includes updating a mmWave UE and second mmWave TPs of the UE centric cloud cell regarding the change. |
| US10135511B2 |
Method and device for transmitting channel state information in wireless access system supporting machine type communication
The present invention provide a method by which a terminal measures channel state information (CSI), a method by which a terminal transmits CSI, and devices for supporting the methods. A method by which a terminal feeds back CSI in a wireless access system, according to one embodiment of the present invention, can comprise the steps of: receiving an upper layer signal including a channel quality indicator (CQI) index; receiving a physical downlink control channel (PDCCH) signal including an aperiodic CSI request field; receiving a physical downlink shared channel (PDSCH) signal that is repeatedly transmitted as many time as the number indicated by the CQI index; measuring the CSI for a CSI reference resource; and feeding back the measured CSI by using a physical uplink shared channel (PUSCH) signal. |
| US10135510B2 |
Means of improving data transfer
A process for cooperative aerial inter-antenna beamforming for communication between (a) multiple moving platforms, each platform having an aerial antenna mounted thereon, such that the aerial antennas have variable positions and orientation over time, and (b) at least two ground based antennas; the process involving transmitting data relating to the positions of the aerial antennas to a processing system, the processing system calculating and transmitting beamforming instructions to the ground based antennas, the ground based antennas thereby transmitting or receiving respective component signals for each aerial antenna, the component signals for each aerial antenna received or transmitted by the ground based antennas having essentially the same information content but differing in their phase and usually amplitude, so as to form a cooperative beam from the cooperative sum of the signals between the ground based antennas and the at least two aerial antennas. |
| US10135501B2 |
Radio with spatially-offset directional antenna sub-arrays
An intelligent backhaul radio that has an advanced antenna system for use in PTP or PMP topologies. The antenna system provides a significant diversity benefit. Antenna configurations are disclosed that provide for increased transmitter to receiver isolation, adaptive polarization and MIMO transmission equalization. Adaptive optimization of transmission parameters based upon side information provided in the form of metric feedback from a far end receiver utilizing the antenna system is also disclosed. |
| US10135495B2 |
Method and system for transferring data between plurality of devices
Provided are a method and system for transferring data between a plurality of devices. The method of transferring data from a first device to a second device includes: selecting at least one content; acquiring relevant information about the selected content; storing the acquired relevant information; and providing the second device with the stored relevant information when a communication channel is formed between the first device and the second device. |
| US10135492B2 |
Compatible communication between devices using different communication protocols
In a method for communicating with a plurality of devices using different communication protocols, a signal is received at a transceiver device from a neighbor device via a physical layer of a communication media. At a first time the signal contains a header frame from a first device conforming to a first communication protocol and at another time the signal contains a header frame from a second device conforming to a second communication protocol. The transceiver determines which of the different communication protocols is being used by each of the plurality of devices. The transceiver may then process inbound payload data using the indentified protocol type. Data frames are transmitted to the first device using the first communication protocol and data frames are transmitted to the second device using the second communication protocol. |
| US10135491B2 |
Monitoring and mitigating conditions in a communication network
Aspects of the subject disclosure may include, for example, a system for receiving telemetry information from an apparatus that induces electromagnetic waves on a wire surface of a wire of a power grid for delivery of communication signals to a recipient communication device coupled to the power grid, and detecting a condition from the telemetry information that is adverse to a delivery of the communication signals to the recipient communication device. Other embodiments are disclosed. |
| US10135490B2 |
Interference group discovery for full duplex network architecture in cable network environment
An example apparatus comprises a processor, and a memory element in communication with the processor. The processor configured to send a first message to at least a first cable modem of a plurality of cable modems. The first message indicates an upstream test signal to be generated by the first cable modem within a predetermined portion of a frequency spectrum allocated for downstream communication. The processor is further configured to send a second message to at least a second cable modem of the plurality of cable modems. The second message indicates a downstream interference measurement to be performed on the upstream test signal by the second cable modem. The processor is further configured to receive at least one interference measurement result indicative of the downstream interference measurement, and determine at least one interference group for the plurality of cable modems based upon the at least one interference measurement result. |
| US10135487B2 |
Base station, terminal, and communication method
In a base station, a first setting circuitry sets a first Narrowband for allocating a system information block (SIB) for MTC by using a predetermined default offset. A second setting circuitry sets a second Narrowband for allocating a signal other than the SIB by using the default offset and an additional offset that indicates a difference from the default offset. An allocating circuitry allocates the SIB including the additional offset to the first Narrowband, and allocates the signal other than the SIB to the second Narrowband. |
| US10135482B2 |
Wireless transceiver with remote frontend
A wireless communication device includes a first circuit including a baseband circuit and a radio circuit, and at least one frontend module (FEM) remote from the first circuit and placed in close proximity to and coupled to at least one radio-frequency (RF) antenna. The FEM is coupled to the first circuit via interface circuitry. An FEM comprises a frontend (FE) circuit including one or more low-noise amplifiers (LNAs), one or more power amplifiers (PAs), and at least one of a multi-pole switch and a multiplexer. The multi-pole switch and the multiplexer being implemented on a first side of the FEM coupled to the interface circuitry. The interface circuitry includes at least some of filters, splitters, multi-pole switches, and multiplexers to reduce a count of interconnect routes to the at least one FEM. |
| US10135474B2 |
Electronic apparatus and control method thereof
An electronic apparatus includes a first communicator, a second communicator and a controller. The first communicator has one of a first operation mode for a first communication with an external apparatus, and a first idle mode for pausing the first communication. The second communicator has one of a second operation mode for a second communication different in standard from the first communication with an external apparatus, and a second idle mode for pausing the second communication. The controller controls the first communicator and the second communicator to adjust a length of a simultaneous operation section where the first operation mode and the second operation mode are simultaneously implemented, in accordance with a degree of interference between the first communication and the second communication. With this, performance of wireless communication is more efficiently improved. |
| US10135473B2 |
Bit rate compression for signal transmission
Various antennas may benefit from improved signaling. For example, it may be helpful for a signal in a high occupied bandwidth environment to be compressed using a block floating point format, which can also help to reduce power consumption. A method may include separating an incoming signal at a digital front end or a converter into two alternating signals comprising a coarse signal and a fine signal. The method may also include transmitting the coarse signal and the fine signal from the digital front end to the converter or from the converter to the digital front end. The coarse signal and the fine signal may be combined to generate an approximation of the incoming signal. |
| US10135472B1 |
Apparatus and methods for compensating radio frequency transmitters for local oscillator leakage
Apparatus and methods for compensating radio frequency (RF) transmitters for local oscillator (LO) leakage are provided herein. In certain configurations herein, a transmitter generates an RF transmit signal based on mixing an input signal with an LO signal. Additionally, the transmitter is calibrated to compensate for LO leakage, which provides a number of benefits, including lower levels of undesired emissions from the transmitter. |
| US10135466B2 |
Data sending method and apparatus
The present invention discloses a data sending method and apparatus, which resolves a problem that performance of a high coding rate LDPC code obtained in an existing puncturing manner based on a variable node degree distribution is relatively poor. The method includes: encoding, by using an LDPC code check matrix, an information bit that needs to be sent, to obtain a codeword sequence; determining a puncturing priority of each parity bit in the codeword sequence according to row destruction and/or cycle destruction, on the LDPC code check matrix, of a variable node corresponding to each parity bit; puncturing the codeword sequence according to the puncturing priority of each parity bit in the codeword sequence; and generating a bit sequence according to the punctured codeword sequence, and sending the bit sequence. In this way, performance of an obtained high coding rate LDPC code is improved. |
| US10135463B1 |
Method and apparatus for accelerating canonical huffman encoding
In one embodiment, an apparatus comprises a memory; and a compression engine comprising circuitry, the compression engine to assign weights to a plurality of first symbols of a data set, a weight representing a frequency of a corresponding first symbol in the data set; perform a partial sort of the first symbols based on the assigned weights; generate at least a portion of a Huffman tree based on the partial sort; and create a plurality of Huffman codes for the plurality of first symbols based on the Huffman tree. |
| US10135458B2 |
Method for processing a measured-value signal representing a value determined in analog form for the output current of a converter and device for carrying out the method
A method for processing a measured-value signal representing a value, determined in analog form, for the output current of a converter, and device for carrying out the method, the measured-value signals acquired by a sensor, especially including a shunt resistor, being supplied to a respective processing channel that has at least one delta-sigma modulator. |
| US10135457B2 |
Successive approximation register analog-digital converter having a split-capacitor based digital-analog converter
A successive approximation register analog-digital converter including a split-capacitor based digital-analog converter includes a comparator, a split-capacitor based digital-analog converter including a positive capacitor array and a negative capacitor array, and a successive approximation register logic. The positive capacitor array and the negative capacitor array each includes a positive capacitor array of a first stage and a negative capacitor array of a first stage that generate input signals of the comparator corresponding to upper bits including an MSB, respectively, a positive capacitor array of a second stage and a negative capacitor array of a second stage that generate input signals corresponding to intermediate bits, and a positive capacitor array of a third stage and a negative capacitor array of a third stage that generate input signals corresponding to lower bits of an LSB and a next to bit of the LSB. |
| US10135454B2 |
Oversampling noise-shaping successive approximation ADC
A successive approximation Analog to Digital Converter (ADC), comprising: a sample and hold device arranged to sample and hold an input signal at the beginning of a conversion cycle; a successive approximation register that sequentially builds up a digital output from its most significant bit to its least significant bit; a digital to analog converter that outputs a signal based on the output of the successive approximation register; a comparator that compares the output of the digital to analog converter with an output of the sample and hold device and supplies its output to the successive approximation register; and a residual signal storage device arranged to store the residual signal at the end of a conversion cycle; and wherein the successive approximation ADC is arranged to add the stored residual signal from the residual signal storage device to the input signal stored on the sample and hold device at the start of each conversion cycle. After each ADC full conversion by the SAR, the analog conversion of the digital output is as close to the original input signal as the resolution will allow. However there remains the residual part of the input signal that is smaller than what can be represented by the least significant bit of the digital output of the SAR. In normal operation, successive outputs of a SAR for the same input will result in the same digital value output and the same residual. By storing the residual at the end of each conversion and adding the residual onto the input signal of the next conversion the residuals are accumulated over time so that they may affect the output digital value. After a number of conversions, the accumulated residuals add up to more than the value represented by the LSB of the register and the digital value will be one higher than if a conversion had been performed on the input signal alone. In this way, the residual signal affects the output value in time and thus can be taken into account by processing the digital output in the time domain. |
| US10135453B2 |
SAR ADC with threshold trigger functionality for reduced power consumption
An ADC method and system implement a comparison stage of SAR ADC directly in the analog domain rather than the digital domain, without resolving the output word Dout. This means that the number of comparisons, and thus the numbers of required periods of CK, equals number of threshold values instead of equaling the number of bits in the resolved output word. In this way, power is saved in the analog domain as well as in the digital domain. |
| US10135451B2 |
Method and device for doubling the frequency of a reference signal of a phase locked loop
In some embodiments, a phase locked loop includes a voltage-controlled oscillator whose output is fed back to a first input of a phase comparator via a fractional divider controlled by a delta-sigma modulator. The method of doubling the frequency of the initial reference signal of the phase locked loop involves generating, from the initial reference signal and the output signal furnished by the voltage-controlled oscillator, a secondary reference signal having edges of a first type synchronized with each of the rising and falling edges of the initial reference signal and edges of a second type between the edges of the first type, and a furnishing of the secondary reference signal at a second input of the phase comparator operating on the edges of the first type. |
| US10135450B1 |
Charge pump circuit and PLL circuit
A charge pump circuit of an embodiment includes a current mirror circuit, a first drive switch, a capacitor and a switch circuit. The current mirror circuit causes a current obtained by mirroring a reference current to flow to a first output terminal and a second output terminal. The first drive switch connects or disconnects the first output terminal and a charge pump output terminal. The switch circuit connects the capacitor either to a discharge path between the second output terminal and a node which provides a predetermined voltage or to a charge path between the charge pump output terminal and a GND. |
| US10135440B2 |
Magnetic field triggering
Apparatuses, methods and systems for an event-triggering apparatus are disclosed. One embodiment of the apparatus includes a sensor element operative to sensing a magnetic field, and apparatus control circuitry, wherein the apparatus control circuitry receives a representation of the sensed magnetic field. The apparatus control circuitry is operative to sense a deviation in the sensed magnetic field greater than a predetermined threshold, and trigger an event after sensing the deviation of the sensed magnetic field greater than the predetermined threshold. |
| US10135431B2 |
Fast-response reference-less frequency detector
An apparatus comprising a first circuit and a second circuit. The first circuit may be configured to generate an intermediate signal in response to an input clock signal operating at a frequency. The first circuit may modify the input clock signal according to a threshold frequency to generate a waveform for the intermediate signal. The waveform of the intermediate signal may have at least one of (i) pulses and (ii) a steady state. The second circuit may be configured to generate a control signal in response to the intermediate signal. The second circuit may modify the intermediate signal to generate the control signal. The control signal may have a first state when the intermediate signal has pulses. The control signal may have a second state when the intermediate signal has the steady state. |
| US10135428B2 |
Methods and apparatus for a low power relaxation oscillator
In a described example, an apparatus includes: a capacitor coupled to receive a current at a first terminal and having a second terminal coupled to ground; a first comparator coupled to a voltage at the first terminal of the capacitor and to a first reference voltage; a second comparator coupled to the voltage at the first terminal of the capacitor and to a second reference voltage that is different from the first reference voltage, and having an enable input coupled to the output of the first comparator; a discharge circuit coupled to the capacitor and enabled by the output of the second comparator; and a toggle circuit coupled to the output of the second comparator. Methods are disclosed. |
| US10135427B2 |
Receiver with time-varying threshold voltage
A system for communicating information between circuits is described. A transmit circuit provides pulse-amplitude-modulation (PAM) signals via a communication channel to a receiver. A circuit in the receiver determines digital values from the received signals using a time-varying threshold voltage, which varies during the bit-time. This approach may compensate for inter-symbol interference (ISI) to increase the voltage and timing margins of the system. |
| US10135425B1 |
Power saving latches
Aspects of the disclosure provide a circuit having a pulse latch circuit and an enable circuit. The latch circuit is configured to receive a first signal at an input lead and drive the first signal to an output lead in response to an enable signal. The enable circuit is configured to be active to generate the enable signal to enable the latch circuit to receive the first signal when the first signal is different from a second signal on the output lead and is configured to default the enable signal to suppress the first signal so as not to be received at the latch circuit when the first signal is the same as the second signal. |
| US10135421B2 |
Bulk-acoustic wave filter device
A bulk-acoustic wave filter device includes: a first substrate; a first filter disposed on the first substrate, within a cavity of the bulk-acoustic wave filter device; a second substrate coupled to the first substrate; a second filter disposed on the second substrate, within the cavity and facing the first filter; a first inductor layer disposed on the first substrate and around the first filter; a second inductor layer disposed on the second substrate and around the second filter, and bonded to the first inductor layer; and a sealing member sealing the cavity, together with the first and second inductor layers. |
| US10135414B2 |
Method and device for storing equalization settings in active loudspeaker
The invention relates to a method and a loudspeaker for storing equalization settings in an active loudspeaker including a loudspeaker cabinet, at least one driver connected to the cabinet and an amplifier electronics including an equalizer, in which method the loudspeaker is calibrated in controlled conditions for forming factory calibration parameters for controlling the equalizer, the factory calibration parameters controlling the equalizer are stored in the amplifier electronics. In accordance with the invention the factory calibration parameters are also stored in a memory fixedly mounted to the loudspeaker. |
| US10135413B2 |
Automatic timbre control
A system and method for automatically controlling the timbre of a sound signal in a listening room are also disclosed, which include the following: generating an acoustic sound output from an electrical sound signal; measuring the total acoustic sound level in the room and generating an electrical total sound signal representative of the total acoustic sound level in the room, wherein the total acoustic sound comprises the acoustic sound output generated from the electrical sound signal; and adjusting the gain of the electrical sound signal dependent on a room-dependent gain signal, the room-dependent gain signal being determined from reference room data and estimated room data. |
| US10135409B1 |
High-efficiency RF digital power amplifier with joint duty-cycle/amplitude modulation
A power amplifier includes an array of transistors having outputs that are connected in parallel to one another and coupled to an output network. The power amplifier further includes digital circuitry, configured to receive a sequence of control words that specify respective amplitudes of a signal to be transmitted in respective time intervals, and to transmit the signal by performing, for each control word and respective time interval: partitioning the control word into a Least Significant Bit (LSB) portion and a Most Significant Bit (MSB) portion; selecting a time duration based on the LSB portion; selecting an amplitude based on the MSB portion; and activating the array of transistors during the time interval in accordance with the selected time duration and the selected amplitude. |
| US10135407B1 |
High efficiency transmit-receive switches
High efficiency transmit-receive switches in accordance with embodiments of the invention are disclosed. In one embodiment, a high efficiency transmit receive switch includes a power input coupled to a power supply, an amplifier output port and a transmit switch input port coupled to a circulator, a received signal circuit port coupled to a first PIN diode coupled to a second PIN diode via a first transmission line and spaced a fractional wavelength apart, the transmit switch input port is coupled to a third PIN diode coupled to a harmonic filter, a second transmission line coupled between the second PIN diode and to the third PIN diode, spaced a fractional wavelength apart, the transmit circuit signal port is coupled to an amplifier, the amplifier is coupled to the amplifier output port, the second transmission line is coupled to the bias current generator coupled to the output port. |
| US10135401B2 |
Switching amplifier with zero voltage switching and balanced thermal control algorithm
A switching amplifier includes a plurality of cascade elements, each bridge circuit includes an inductive load coupled between a first leg terminal of one of the at least two leg circuits and a second leg terminal of another one of the at least two leg circuits. A first leg voltage of the first leg terminal have a phase shift relative to a second leg voltage of the second leg terminal, the phase shift is used for causing the inductive load to store electric energy and generating a minimum circulating current−I min or I min sufficient to effect conducting of a corresponding diode; each of the switches is configured to be turned on if the corresponding diode conducts current to effect zero voltage switching of the corresponding switch. The minimum circulating current−I min or I min is equal to a constant value. |
| US10135397B2 |
Boost circuit for use in power amplifier
A boost circuit for use in a power amplifier includes a voltage-to-voltage generator, a voltage-to-current converter, and a differential current generator. The voltage-to-voltage generator is configured to generate a converting voltage according to a reference voltage, wherein the absolute value of the slope at the rising edge of the converting voltage is smaller than the absolute value of the slope at the rising edge of the reference voltage. The voltage-to-current converter is configured to generate first current according to the converting voltage, wherein the waveform of the first current corresponds to the waveform of the converting voltage. The differential current generator is configured to generator second current associated with the waveform of the reference voltage, thereby outputting operational current whose value is associated with the first current and the second current. |
| US10135394B2 |
Low voltage supply amplifier and amplification method
A high-gain, low power, electronic amplifier for amplification of a low magnitude voltage signal through a comparator-integrator amplification method for energy-aware applications is disclosed. The electronic amplifier comprises: a comparator arrangement with at least one comparator unit adapted to receive a first voltage signal to be amplified and a first feedback voltage signal, and to generate a first two-level voltage comparison signal; a integrator arrangement to receive the first two-level voltage comparison signal and generate a first amplifier output signal corresponding to an amplification of the voltage signal to be amplified; and a first feedback network to receive the first amplifier output signal and generate the first feedback voltage signal. |
| US10135393B2 |
Signal detector including a set of resistors and a collection unit for generating a detection signal
A signal detector includes a signal input terminal, N first resistors, (N−1) second resistors, a third resistor, M voltage-to-current units and a collection unit. A first terminal of a 1st first resistor is coupled to the signal input terminal. A first terminal of an ith first resistor is coupled to a second terminal of an (i−1)th first resistor. A first terminal of a kth second resistor is coupled to a second terminal of a kth first resistor. A second terminal of each second resistor is coupled to a reference voltage terminal. The third resistor is coupled between the reference voltage terminal and a second terminal of an Nth first resistor. Each voltage-to-current unit is coupled to a first terminal of a corresponding first resistor for converting a corresponding detection voltage to a detection current. The collection unit is coupled to the M voltage-to-current units for generating a detection signal according to at least the M detection currents. |
| US10135392B2 |
Spin torque oscillator with high power output and its applications
The present invention relates to a spin torque oscillator with high power output and its applications. A spin torque oscillator may include a first magnetic reference layer having a fixed magnetization, a magnetic precession layer having a magnetization capable of precessing about an initial direction, and a first barrier layer interposed between the first magnetic reference layer and the magnetic precession layer. The first barrier layer is formed of an insulating material capable of inducing a negative differential resistance for the spin torque oscillator. |
| US10135390B2 |
Periodic kick-starter for a crystal oscillator
A cyclical pulsing oscillator having a pulse repetition rate close to a crystal resonant frequency in an oscillator provides more useful start-up energy to the crystal oscillator circuit and thus provides much faster start-up time. The start-up pulsing oscillator runs for a number of cycles or until the crystal oscillator amplitude as built up to a desired value. The pulsing oscillator may have a repetition rate of from about one-third to about one-half the crystal resonant frequency, thus providing more useful start-up energy to the crystal oscillator circuit. |
| US10135387B2 |
Photovoltaic mounting system with sealant injector inlet
Photovoltaic mounting systems that form chemical flashings are provided herein. Such mounting systems can include a mounting plate adapted to interface with an off-the-shelf mounting puck so as to allow mounting of the puck on the roof surface without use of traditional roof flashing and/or modification of shingles of the roof surface. Such mounting plates can include a top surface adapted to interface with the puck and a bottom surface that defines a cavity between the mounting plate and the puck in which to form the chemical flashing by injecting a flowable sealant into the cavity via an inlet of the mounting plate that remains accessible from outside the puck during mounting. Such mounting plates can further include features for orienting the plate, directing runoff away from any sealed roof penetrations and filling of the cavity with flowable sealant. |
| US10135386B2 |
Sensing, interlocking solar module system and installation method
A solar module system is coupled directly to a fixed structure either individually or collectively as an array. Universal mounting brackets attached to the back of each solar panel module each connect to one or more other brackets of adjacent solar panels and/or to mounting feet that anchor to the fixed structure. Mounting brackets interlock with mounting brackets on adjacent solar modules and include a flexible snap coupling mechanism including a locking feature to selectively flexibly connect to and disconnect from other mounting brackets of adjacent solar panels. |
| US10135385B2 |
Identification protocol between a local controller of a solar module and a master controller
Systems and methods for local and master management units in a photovoltaic energy system. In one embodiment, a method implemented in a computer system includes sending a first identification code from a local management unit to a master management unit. The first identification code is associated with the first local management unit, and the local management unit controls a solar module. An authentication of the first identification code is received from the master management unit. In response to receiving the authentication, active operation of the local management unit is continued (e.g., for a set time period). |
| US10135384B2 |
Systems and methods for implementing multiple motor control modes in a motor drive controller
A system may include a motor drive that controls one or more operations of a motor. The motor drive may include a first processor that controls the operations of the motor according to a first control mode application. The system may include a second processor that controls the operations of the motor according to a first control mode profile that corresponds to the first control mode application, receives a request to operate the motor according to a second control mode application, and executes a set of computer-readable instructions upon receipt of the request. The set of computer-readable instructions may cause the second processor to load an executable file associated with the second control mode application onto the first processor and send a first command to the first processor to execute the executable file associated with the second control mode application. |
| US10135375B2 |
Rotation controller for AC electric motor and method for controlling rotation of the AC electric motor
A rotation controller for an AC electric motor includes a space vector generator, a current change ratio obtainer, and a rotational angle calculator. The space vector generator generates at least a first magnetic field in a first direction and a second magnetic field in a second direction crossing the first direction in a rotation plane of a saliency-exhibiting rotor. The space vector generator synthesizes the first magnetic field and the second magnetic field into a synthesized magnetic field. The current change ratio obtainer acquires a first current change ratio of a first current generated in the first direction in a stator and a second current change ratio of a second current generated in the second direction in the stator. The rotational angle calculator calculates a rotational angle of the saliency-exhibiting rotor based on at least the first and second current change ratios and the first and second directions. |
| US10135367B2 |
Integrated soft start and safety shutdown
The subject matter of this specification can be embodied in, among other things, a current control assembly that includes an electrical current flow path having a maximum current flow rate, a first current limiter in the electrical current flow path, the first current limiter comprising circuitry configured to adjustably restrict current flow along the electrical current flow path to a flow rate less than the maximum current flow rate in response to receipt of a first signal at a first input port, and a second current limiter in the electrical current flow path, the second current limiter arranged to interrupt the electrical current flow path in response to receipt of a second signal at a second input port. |
| US10135365B2 |
Cantilever piezoelectric transducer
A piezoelectric transducer includes: an anchorage; a beam of semiconductor material, extending in cantilever fashion from the anchorage in a main direction parallel to a first axis and having a face parallel to a first plane defined by the first axis and by a second axis perpendicular to the first axis; and a piezoelectric layer on the face of the beam. A cross-section of the beam perpendicular to the first axis is asymmetrical and is shaped so that the beam presents deformations out of the first plane in response to forces applied to the anchorage and oriented according to the first axis. |
| US10135363B2 |
Communication device and system
A communication device for a field device for transferring output information to a controller, including a passive digital output with a first connection point and a second connection point, a circuit arrangement connected between the first connection point and the second connection point, and a control device configured to selectively put the circuit arrangement into one of a plurality of switching states according to the output information to be transferred. The communication device is configured, in a state in which the passive digital output is connected to the controller, to provide an electric output signal with a first signal value according to a first communication protocol at the connection points in a first switching state of the circuit arrangement and to provide the electric output signal with a second signal value according to the first communication protocol at the connection points in a second switching state of the circuit arrangement. The communication device is also configured to provide the electric output signal with a signal value according to a second communication protocol at the connection points in a third switching state of the circuit arrangement. |
| US10135362B2 |
Method for controlling a power conversion system
Described is a method for converting power including controlling operation of a plurality of series connected modules including a DC power sources and storage devices such that the total voltage across the series connected modules includes an AC signal. A storage parameter is defined based on a sum of a function of the voltages in the storage devices in the modules and one or more voltage control levels are defined for each of or a plurality of the storage devices. An average current drawn from the series connected modules over a time period is set such that the storage parameter approaches a target value. The target value is decreased for a subsequent time period in the event that none the voltage control levels are reached and increased in the event that one or more of the voltage control levels are reached. |
| US10135352B2 |
Controller for power converter with frequency modulated carrier
The present disclosure provides a controller for a power converter that converts input power to a prescribed form and outputs the power by switching a semiconductor switching device ON and OFF and that has an output circuit including a filtering reactor on an output side, the controller including: a carrier calculating unit that generates a carrier having prescribed frequencies for generating a control signal that switches the semiconductor switching device ON and OFF, wherein the carrier calculating unit generates the carrier such that a carrier frequency at phase angles where ripple components in a current flowing through the reactor are relatively high in magnitude, which is defined as a high ripple carrier frequency, is higher than a carrier frequency at phase angles where the ripple components are relatively low in magnitude, which is defined as a low ripple carrier frequency. |
| US10135351B2 |
Circuit and method for AC-to-AC voltage conversion
A circuit and method for converting an input AC voltage of a source to an output AC voltage of a destination is disclosed. The circuit may include a main switch cell coupled to the source, a freewheeling switch cell coupled to the main switch cell, a first inductor coupled to the main switch cell, the freewheeling switch and the destination, and a second inductor coupled to the first inductor, the main switch cell, the freewheeling switch and the destination. The circuit may also include a plurality of current paths when at least one of the main switch cell and/or the freewheeling switch cell is on. In some implementations, the main switch cell and the freewheeling switch cell are controlled using a switching method. |
| US10135348B2 |
LLC power converter and switching method thereof
In some embodiments, an inductor-inductor-capacitor (LLC) converter includes a transformer having a primary winding, a secondary winding, and an auxiliary winding. The primary winding is coupled to a primary side circuit and the auxiliary winding has a first winding portion coupled between a first terminal and a middle terminal, and a second winding portion coupled between the middle terminal and a second terminal. The LLC converter further includes a first diode coupled between the first terminal and a first node, a second diode coupled between the second terminal and the first node, and a switch coupled between the first node and a reference voltage terminal. The middle terminal of the auxiliary winding is coupled to the reference voltage terminal. |
| US10135347B2 |
Switching power supply device
A switching power supply device includes a switching transistor, a sense resistor connected to the switching transistor in series and on which a sense voltage generates when the switching transistor is turned on, a transformer including a first winding to which an input voltage is applied when the switching transistor is turned on and a second winding connected to a load, an optocoupler in which an optocoupler current is generated based on an output voltage on the second winding side, a load power detection circuit that generates a load power signal in accordance with a turn-on period of the switching transistor, a turn-on period control circuit, a turn-off period control circuit, and an SRFF circuit. |
| US10135345B2 |
Current sensing in an electromagnetic component using an auxiliary winding stub
Many electronic devices, such as voltage converters, motors, etc., include electromagnetic components through which the current flow must be estimated. Such electromagnetic components include transformer windings, motor windings, and other types of inductors. In order to estimate the current through such components with reasonable accuracy and without unnecessary power loss, the inherent resistance of the electromagnetic component is used in conjunction with an auxiliary winding through which effectively no current flows. A first terminal of the auxiliary winding directly connects to a first terminal of the electromagnetic component and runs in parallel to the component. The voltage across a second terminal of the auxiliary winding and a second terminal of the electromagnetic component is measured and closely approximates the voltage across the equivalent series resistance (ESR) of the electromagnetic component. This measured voltage is used to estimate the current through the component. |
| US10135342B1 |
DC-to-DC converter and power allocation method thereof
A DC-to-DC converter and a power allocation method thereof are provided. The DC-to-DC converter includes a switching circuit and a power allocation circuit. The switching circuit is coupled to a DC power source to receive a DC input voltage and controlled by a first control signal to generate a pulse voltage. The power allocation circuit is coupled to the switching circuit to receive the pulse voltage and store an electrical energy. The power allocation circuit is further coupled to the DC power source. The power allocation circuit is controlled by a second control signal to convert the electrical energy into a DC output voltage and provides the DC output voltage to a load, or the power allocation circuit is controlled by the second control signal to recuperate the electrical energy to the DC power source. |
| US10135338B2 |
Reconfigurable on time circuit for current mode control of buck converter
An apparatus includes an inductor coupled to a load circuit, a control circuit, and a driver circuit. The control circuit may be configured to select a first operating mode in response to a determination that a value of current flowing through the inductor is greater than a threshold, and to otherwise select a second operating mode. In the first operating mode, the driver circuit may be configured to source current to the load circuit through the inductor for a first duration, based on a comparison of a supply voltage level to a voltage level across the load circuit. In the second operating mode, the driver circuit may be configured to source current to the load circuit through the inductor at a number of time points. At each time point the current may be sourced for a second duration that is based on an allowable peak current flowing through the inductor. |
| US10135335B2 |
Powerstage attached to inductor
In some examples, a device comprises an inductor and a package comprising at least one power device. The package is attached to the inductor by an adhesion layer, and the inductor comprises one or more leads. A first lead of the one or more leads is configured to conduct electricity between the at least one power device and the inductor, and a surface of the first lead and a surface of the package are substantially co-planar. |
| US10135332B2 |
DC-DC converter
According to one embodiment, a DC-DC converter includes a signal generator configured to output a first PWM signal having arbitrary amplitude and a duty cycle established based on an input voltage and an output voltage, a driver configured to output a second PWM signal being in phase with the first PWM signal and having amplitude of the input voltage based on the first PWM signal, a filter configured to extract a DC component from the second PWM signal, and a switch configured to supply an output of the filter to the signal generator in response to a first control signal. |
| US10135327B2 |
Power supply system
Outputs from first and second DC power supplies are controlled based on a first reactor current and a second reactor current. For controlling an output from a corresponding DC power supply, a relative maximum point and a relative minimum point as two inflection points are provided in a high current of the first and second reactor currents in one control cycle, by controlling on and off of switching elements. In a low current of the first and second reactor currents, inflection points more than in the high current are provided. Each of the inflection points on a side of the high current is provided at timing identical to the inflection point on a side of the low current. |
| US10135326B2 |
Power conversion device and power supply device in which same is used
A power conversion device includes a switching element, a gate drive unit, a switch circuit unit, a DC power supply unit, and a control unit. The control unit controls a plurality of switch circuit units and a plurality of gate drive units. During a normal period, the control unit causes a first switch and a second switch to be closed, and causes a signal from the gate drive unit to continue a high level or a low level. Furthermore, during a switching period, the control unit causes the first switch and the second switch to open, and switches a signal from the gate drive unit from a low level to a high level or from a high level to a low level. |
| US10135324B2 |
Armature for linear motor and linear motor
An armature for linear motor having excellent precision in attachment to a machine and capable of reducing the likelihood of trouble in a resin layer, entry of a foreign material, and the like is provided. An armature comprises: a block attachment part provided to a machine attachment side of a core; a protection sheet having ability to be impregnated with resin and covering a surface of the core and a surface of the block attachment part; a block attached to the block attachment part and having a machine attachment surface arranged at the block attachment side of the core; and a resin layer covering the protection sheet covering the core. The machine attachment surface of the block is exposed from the resin layer. |
| US10135322B2 |
Alternator rotor having electronic components plugged and locked mechanically in place
Alternator rotor, comprising: a set of polar wheel field windings, an exciting armature, and an electronic power supply circuit supplying power to the set of polar wheel field windings from the exciting armature, the rotor being characterized in that the electronic power supply circuit comprises a bearing made of insulating material and conducting tracks held by said bearing, these tracks connecting the exciting conductors to terminals into which electronic components of the electronic power supply circuit are plugged and locked mechanically in place. |
| US10135317B2 |
Reciprocating piston engine
A reciprocating piston engine is disclosed having a first inner magnetic field unit comprising a first inner magnetic field unit arranged on a first crank arm of a crankshaft including a magnetizable material, and a stationary first outer magnetic field unit. The first inner magnetic field unit and the first outer magnetic field unit together form a first electromechanical converter. The first crank arm has a first securing surface on a face which points radially outwards with respect to a crankshaft axis and which is opposite a first connecting rod bearing. A first counterweight is fixed to the first securing surface in a formfitting manner in the radial direction, said first counterweight including a non-magnetizable material. The first magnetic field unit is arranged on a counterweight face pointing radially outwards with respect to the crankshaft axis. |
| US10135313B2 |
Stator of motor for washing machine
Disclosed is a stator of a motor for a washing machine including: a stator core manufactured by a plurality of steel sheets laminated on top of each other, the stator core having a core base and a plurality of teeth radially formed on the core base; an upper insulator which covers the upper parts of the core base and the teeth to insulate them, the upper insulator having least three upper fastening parts which are formed therein and each of which has an upper fastening hole; and a lower insulator which covers the lower parts of the core base and the teeth to insulate them, the upper insulator having least three upper fastening parts which are formed therein and each of which has a lower fastening hole. |
| US10135312B2 |
Guide member for motor and stator and motor including the same
The present invention relates to a structure of a guide member performing a vibration preventing function of a coil and a motor using the same. In the structure of the guide member which guides the coil wound around a stator to an external power module, and a vibration preventing pattern is provided in a coil guide groove, thereby implementing a stable fixing force of the coil when the motor is driven and solving a problem of noise due to a vibration of the coil. Therefore, a steering wheel is operated more stably. |
| US10135308B2 |
Electrical machine and method for producing an electrical sheet
An electrical machine with a rotor which has at least one electrical sheet. The electrical sheet having crosspieces, wherein the crosspieces have a deformation in a direction normal to the plane of the electrical sheet. |
| US10135302B2 |
Mobile phone having a wireless power module
A mobile device includes a shell; a first replaceable hardware component received within the shell; and a second replaceable hardware component received within the shell, the second replaceable hardware component configured to receive a wireless power signal from a remote device and convert the power signal into electrical energy usable by the mobile device. |
| US10135301B2 |
Guided surface waveguide probes
Disclosed is a guided surface waveguide probe including a charge terminal configured to generate an electromagnetic field and a support apparatus that supports the charge terminal above a lossy conducting medium, wherein the electromagnetic field generated by the charge terminal synthesizes a wave front incident at a complex Brewster angle of incidence (θi,B) of the lossy conducting medium. |
| US10135293B2 |
Direct current isolated-parallel uninterruptible power supply system
A Direct Current (DC) Isolated-Parallel (Iso-Parallel or IP) Uninterruptible Power Supply (UPS) system and method for converting incoming AC power to DC power using several modules which are paralleled at their outputs yet fault isolated from each other. The DCIP UPS has two or more modules connected to a common IP Bus which operates at AC voltage and is disposed between a facility electrical distribution system and the facility's critical electrical loads which operate at DC voltage. The electrical distribution system receives power from a local utility, or from a standby power source when utility power is unavailable, and delivers AC power to the DCIP UPS input. The DCIP UPS converts the power to DC and delivers it to critical electrical loads associated with computer equipment or other devices using DC power. The individual modules that comprise the DCIP UPS share the DC loads equally, yet remain isolated such that a fault within one module or its load will not disrupt the operation or loads of the remaining modules. |
| US10135290B2 |
Inductive power for seismic sensor node
Embodiments of systems and methods for inductively powering seismic sensor nodes are presented. An embodiment of an inductive battery includes a battery cell configured to store charge for use by an external device. The inductive battery may also include a first inductive element coupled to the battery cell, the first inductive element configured to receive current from the battery cell and emit a responsive magnetic field for powering an external device through inductance. In an embodiment the external device is a seismic sensor node. |
| US10135285B2 |
Wireless power for vehicular passenger seats
An electrical system for low-power charging of personal electronic devices is made available at each passenger seat in a vehicle using wireless power technology. Alternating current is delivered by conductors behind the sidewall panels or under the floor of the vehicle body to the passenger area. Electrical power is transferred from these conductors using transmit coils attached outboard of the sidewall panels or below the floor to receive coils attached to passenger seats near the transmit coils. The electrical current induced in the receive coils is made available via electrical power charging circuits at a convenient location for each seat via conventional charging ports. Transmit and receive coils are designed and configured to permit different seating configurations without the need for rewiring by placement and design of larger transmit and receive coils or by using track-mounted transmit and receive coils or a combination of these. |
| US10135284B2 |
Wireless charging equipment for providing charging service to selective users
Provided are wireless charging equipment, a terminal, a wireless charging system comprising the same, a control method thereof, and a non-transitory computer readable storage medium having computer program recorded thereon. That is, the present invention performs a charging function based on a charging signal in the corresponding terminal by transmitting the charging signal to only the terminal corresponding to a communication provider or an affiliated company pre-registered in the wireless charging equipment to provide a charging function to only the pre-registered terminal with respect to a terminal to use a wireless charging infrastructure, easily and conveniently perform an authentication function for the terminal without a separate additional component, and improve operation efficiency of the entire wireless charging system. |
| US10135280B2 |
Charging circuit and electronic device
A charging circuit for providing a charge current sent to a battery is disclosed. The charging circuit includes a linear regulator for converting a power voltage into a first indication voltage; a voltage divider circuit for generating a frequency response to convert the first indication voltage into a second indication voltage; and a charger for providing the charge current sent to the battery when the second indication voltage is within a sensible range, wherein the power voltage is within a broad voltage range, and the first indication voltage is fixed. |
| US10135277B2 |
System and method for rapidly charging battery while considering thermal stability
The present invention relates to a rapid charging system and a rapid charging method that consider thermal stability, and according to the present invention, a battery may be rapidly charged by determining a charging current based on the environment of the battery and the state of the battery, and the life span of the battery may be prevented from being shortened, the charging efficiency becomes higher, and the charging time may be reduced by preventing degradation of the battery due to the charging efficiency and the reaction heat of the battery. |
| US10135275B2 |
Pulsed level shift and inverter circuits for GaN devices
GaN-based half bridge power conversion circuits employ control, support and logic functions that are monolithically integrated on the same devices as the power transistors. In some embodiments a low side GaN device communicates through one or more level shift circuits with a high side GaN device. Various embodiments of level shift circuits and their inventive aspects are disclosed. |
| US10135269B2 |
Minimize bulk capacitance and prevent controller resets due to the voltage drop associated with a fault condition
A circuit for connecting a voltage source to a load is provided. The circuit may include a Vbatt node configured to be connected to a voltage source and a diode electrically connected with the Vbatt node. A battery isolation switch module is electrically connected with the diode, the diode being arranged in series between the battery isolation switch module and the Vbatt node. A capacitor bank is electrically connected with the battery isolation switch module and to ground. The capacitor bank is configured to be further connected with a microprocessor power supply. A high side driver may be configured to receive power from the voltage source. The diode is configured to isolate the capacitor bank and the power supply. The diode is arranged to prevent current from flowing back through the diode from the battery isolation switch module and the capacitor bank to the Vbatt node or HSD output. |
| US10135268B1 |
Lockers with charging power
In a stack or matrix of lockers, typically in two, three or more tiers or rows and in multiple columns, charge power strips are secured at the back sides of the lockers and exposed through openings in the back walls of the lockers so as to provide line power and also low-voltage DC charging power for smartphones and other portable devices, with a plurality of different charge port fittings provided. The power strips are of a length to extend to two or more lockers and preferably are installed vertically, but could be installed horizontally. The lockers have a protected channel at rear, within which the power strip is installed. |
| US10135257B1 |
Extending the distance range of near-field wireless power delivery
A system and method for wireless resonant power transfer is disclosed. The system may include a transmitter that, in addition to being configured for resonantly coupling power into an oscillating electric and/or magnetic field, is also configured to transmit one or more test signals. Test signals can include single frequency continuous wave test signals, frequency sweep test signals, and time-pulsed modulated test signals. By comparing measurements of phase and amplitude of both the transmitted test signal and one or more reflections of the test signal reflected by one or more reflecting entities, electromagnetic properties of the one or more reflecting entities may be determined. The determined properties may then be used to enhance the efficiency and/or effectiveness of power transfer, and/or to distinguish between legitimate and illegitimate consumption of wirelessly transferred power by devices in the oscillating field. |
| US10135256B2 |
Non-contact power transmission device and location-based service system using the same
A non-contact power transmission device includes a power transmission unit configured to contactlessly provide electric power; a controller configured to provide location information of the non-contact power transmission device; and a communications unit configured to transmit the location information and product information received from a non-contact power reception device to a server, and receive an approval to transmit electric power to the non-contact power reception device from the server. |
| US10135250B2 |
Inertia compensated load tracking in electrical power systems
The present disclosure relates to systems and methods for balancing electrical generation and electrical demand in an electrical power system. In various embodiments, a controller may receive priority designations associated with a plurality of loads and inertia of a plurality of electrical generators. A trigger event analysis subsystem may detect a trigger event based on electrical conditions at a plurality of nodes within the electrical power system. A topology detection subsystem may identify a first subset of the plurality of nodes at which electrical conditions reflect the first trigger event and may associate those nodes in an electrical island. An electrical balancing system and control system may be configured to determine and eliminate an imbalance between electrical generation and electrical demand based on the combined inertia of the subset of the plurality of electrical generators and the plurality of priority designations associated with the subset of the plurality of loads. |
| US10135249B2 |
Electricity providing system including energy storage system
Disclosed embodiments relate to power supply systems for supplying power. In some embodiments, a power supply system includes: a plurality of power conversion systems configured to receive and convert DC power from a power generator which generates power or an energy storage system which discharges stored energy; and a system controller configured to transmit a control instruction to control the plurality of power conversion systems based on a transmission protocol depending on an attribute of the control instruction. |
| US10135235B2 |
Digital ground-fault circuit interrupter
A GFCI circuit that includes an electronically controllable main switch that can turn on, and turn off, the delivery of electrical power from the GFCI circuit. The main switch is controlled and monitored by a microcontroller unit using at least digital input and digital output signals, and which includes analog to digital converter. The microcontroller unit may also use the on-off functionality of the main switch in connection with repeatable detection of miswiring of the GFCI circuit. The GFCI circuit can further be adapted to conduct a self-test that can temporarily disable the ability of a trip signal generated by a GFCI integrated circuit in response to a test fault to cause the tripping of the main switch. The microcontroller unit further monitors one or more characteristics of the GFCI circuit, including the main switch and trip signal(s), and can determine whether the GFCI circuit has reached its end-of-life stage. |
| US10135233B2 |
Low-profile, after-aligned, universal point mount
An anchor for lightning protection systems includes a base and pad that extend over a sufficient area and a sufficient bearing length to hold in shear and in tension against the weight, shear force, and moment of cables, points, and other components of a lightning protection systems. A universal point mount may be forged to optimize cross sectional area and contact surface area throughout the mounting system. Drilled and tapped to receive a point oriented arbitrarily, the head mounts easily on a horizontal or vertical mounting surface. Apertures and fasteners provide arbitrary positioning of a point at any necessary orientation. |
| US10135232B2 |
Junction box bar bracket
Improvements in a bracket is disclosed for mounting an electrical box onto a mounting bar. An electrical box can be preinstalled onto the bracket and clamped onto the mounting bar using wings. Bendable tabs can be articulated to secure the bracket and onto a rail. Fasteners are used to secure an electrical junction box onto the bracket and an additional fastener secures the sub assembly to the rail. The tabs can be unbent for removal. An installer can secure the bracket and electrical box using a screw and adjust the position of the bracket on the mounting bar. The bracket provides a low profile assemble that allows the bracket to be installed between the inner surfaces of stud walls. |
| US10135228B2 |
Method of forming a metallic electrode on the ceramic insulator of a spark plug
The method of creating a metallic electrode on the ceramic insulator of a spark plug with a deposit of additional material using the laser weld deposition method, where this metallic electrode, formed by a diffusion metallic layer (3) of the joint between the weld deposit of the smelted wire and the insulator (1), is in the shape of a ring in the end part of the insulator body (1) around the central electrode (2) of the spark plug. |
| US10135225B2 |
Laser device with adjustable polarization
The invention describes a laser device (10) comprising an array (50) of laser emitters (100) and a control unit (200), the array (50) comprises at least a first sub array (110) of laser emitters and a second sub array (120) of laser emitters, wherein the first sub array (110) emits laser light of a first polarization and the second sub array (120) emits laser light of a second polarization being different from the first polarization, and wherein the control unit (200) is adapted to control the first sub array (110) and the second sub array (120) such that the polarization of the laser light emitted by the array (50) can be changed. The invention further describes a sensor device (300) and an optical detection system (400) comprising such a laser device (10). Furthermore, a method of determining the shape of an object by means of the optical detection system (400) is described. |
| US10135218B2 |
Multi-wavelength laser system for optical data communication links and associated methods
A laser light generator is configured to generate one or more wavelengths of continuous wave laser light. The laser light generator is configured to collectively and simultaneously transmit each of the wavelengths of continuous wave laser light through an optical output of the laser light generator as a laser light supply. An optical fiber is connected to receive the laser light supply from the optical output of the laser light generator. An optical distribution network has an optical input connected to receive the laser light supply from the optical fiber. The optical distribution network is configured to transmit the laser light supply to each of one or more optical transceivers and/or optical sensors. The laser light generator is physically separate from each of the one or more optical transceivers and/or optical sensors. |
| US10135215B2 |
Graphene optic fiber amplifiers
Optical fiber amplifiers are disclosed that utilize optic fibers encapsulated by graphene as the gain medium. Doped fiber optic amplifiers utilize optic fibers that are doped with a rare earth element for the gain medium that is encapsulated by graphene. Raman fiber optic amplifiers utilize an undoped fiber as the gain medium that is encapsulated by graphene. |
| US10135214B1 |
Orthogonal cross-connecting of printed circuit boards without a midplane board
A line card of a set of line cards is configured to be coupled to a set of switch-fabric cards to collectively define at least a portion of an orthogonal cross fabric without a midplane board. The line card has an edge portion, a first side and a second side, opposite the first side. The line card includes a set of first set of connectors and a second set of connectors. The first set of connectors is disposed along the edge portion on the first side of the line card and the second set of connectors is disposed along the edge portion on the second side of the line card. |
| US10135212B2 |
Electric circuit jumper with coupling
An electric circuit jumper having a coupling that electrically connects a first electrical connector and a second electrical connector that are to be connected, respectively, with a first point of electric circuit and a second point of the electric circuit. A first probe, intended to be electrically connected to the first point in the electric circuit, is electrically connected to the first electrical connector and a second probe, intended to be electrically connected to the second point in the electric circuit, is electrically connected to the second electrical connector. The electric circuit is bypassed by electrically jumping from the first point of the electric circuit to the second point of the electric circuit via the first probe, the first electrical connector, the coupling, the second electrical connector, and the second probe. |
| US10135211B2 |
Circuit board bypass assemblies and components therefor
A connector for use in a free-standing connector port for mating with an external pluggable module is disclosed. The connector has terminals that extend lengthwise of the connector so that cables may be terminated to the terminals and the terminals and cable generally are horizontally aligned together. The connector includes a housing and a pair of connecting elements that flank a card-receiving slot of the connector. The cables exit from the rear of the connector elements and from the connector port. The connector elements engage the connector port to fix the connector in place within the connector port. |
| US10135207B2 |
High-speed data communications connector
A communication plug configured to be mated with a communication outlet. The plug has first contacts configured to physically contact and form electrical connections with second contacts of the outlet. The plug also includes a substrate with wire contacts and first, second, third, and fourth layers. The first layer includes first conductors connecting a first portion of the first contacts with a first portion of the wire contacts. The fourth layer includes second conductors connecting a second portion of the first contacts with a second portion of the wire contacts. The second layer includes a first plurality of capacitor plates electrically connected to first selected ones of the first contacts. The third layer includes a second plurality of capacitor plates electrically connected to second selected ones of the first contacts. Each of the first plurality of capacitor plates forms a capacitor with at least one of the second plurality of capacitor plates. |
| US10135204B2 |
Electrical connector having an auxiliary contact
An electrical connector includes: an insulative housing having a base and a tongue; an upper and lower rows of contacts mounted in the insulative housing and exposed to an upper and lower surfaces of the tongue, the upper row of contacts and the lower row of contacts being equal in number; and an auxiliary contact disposed among the upper row of contacts. The upper rows of contacts and the lower row of contacts and a metallic shielding sheet are integrally formed within an insulator via a one shot initial insert-molding process to form an initial module. Some of the contacts are equipped with ears viewable upon the corresponding surface of the tongue. |
| US10135196B2 |
Electrical connector having improved conductive terminals
An electrical connector includes: a terminal module comprising an insulative housing having a base portion and a tongue portion, an upper and a lower rows of conductive terminals, and a metallic shielding plate clamped between the two rows of conductive terminals; each row of conductive terminals including plural grounding terminals located on both sides of the tongue portion, and plural power terminals located on the inside of the grounding terminals; each conductive terminal having a contacting section, a tail section, and a retaining section; wherein an upper power terminal and a corresponding lower power terminal are an integral block structure and extending along a thickness direction of the tongue portion in the tongue portion, a thickness of the contacting section of each power terminal is at least twice the thickness of the contacting section of each grounding terminal. |
| US10135194B2 |
Electrical connectors and printed circuits having broadside-coupling regions
An electrical connector that includes a circuit board having a board substrate that has opposite board surfaces and a thickness measured along an orientation axis that extends between the opposite board surfaces. The circuit board has associated pairs of input and output terminals and signal traces that electrically connect the associated pairs of input and output terminals. The input and output terminals being configured to communicatively coupled to mating and cable conductors, respectively. Each associated pair of input and output terminals is electrically connected through a corresponding signal trace that has a conductive path extending along the board substrate between the corresponding input and output terminals. At least two signal traces form a broadside-coupling region in which the conductive paths of the at least two signal traces are stacked along the orientation axis and spaced apart through the thickness and extend parallel to each other for a crosstalk-reducing distance. |
| US10135193B2 |
Electrical connector having crosstalk compensation insert
An electrical connector includes a front wire terminal and a rear wire terminal. The front wire terminal and the rear wire terminal are configured to couple to a conductor of a cable. A front signal trace is coupled to the front wire terminal. A rear signal trace is coupled to the rear wire terminal. The front signal trace is positioned adjacent to the rear signal trace. A front mating contact is coupled to the front signal trace. A rear mating contact is coupled to the rear signal trace. The front signal trace conveys an electrical signal between the front wire terminal and the front mating contact. The rear signal trace conveys an electrical signal between the rear wire terminal and the rear mating contact. An electro-mechanical compensation is positioned between the front signal trace and the rear signal trace to control crosstalk between the front signal trace and the rear signal trace. |
| US10135192B2 |
Self-terminating backplane connector
In one embodiment, an apparatus includes a contact contained within a connector configured to couple with a mating connection to provide a communications data path through the connector, a ground shroud extending over a portion of the contact, and a self-terminating element connected to one of the contact and the ground shroud and configured for engagement with the other of the contact and the ground shroud when in an engaged position with the connector uncoupled from the mating connection to terminate signals transmitted to the connector, and disengagement when in a disengaged position with the connector coupled with the mating connection. |
| US10135189B2 |
Connector apparatus having male and female connector assemblies and a connector position assurance device, a male connector assembly, a female connector assembly, and a method for assembling the connector apparatus
Connector apparatus having a male connector assembly, a female connector assembly, and a connector position assurance (CPA) device. The connector position assurance (CPA) device is inserted into one of the connector assemblies to lock the male connector assembly and female connector assembly together as an additional locking assurance. |
| US10135183B1 |
Electrical connector with assist lever
An electrical connector includes a first housing with two axle posts. A second housing is moveable relative to the first housing and includes two travel pegs. A lever includes two lever arms that are joined by a handle and each of the lever arms has an axle opening with one of the axle posts located therein. The lever is mounted on the first housing for relative rotational movement about a lever axis from a pre-stage position to a final position. The lever engages the travel pegs to move the second housing linearly in an insertion direction from a pre-stage position to a seated position relative to the first housing. Flanges extend from the axle posts generally perpendicular to the lever axis and opposite the insertion direction. The lever arms are located between the first housing and the respective flange when the lever is moved away from the pre-stage position. |
| US10135176B1 |
Coaxial cable connector
A coaxial cable connector comprises an assembly body, a cylindrical body and a fastening element. A portion of the fastening element is connected to a portion of one of the assembly body and cylindrical body, and when the fastening element is compressed during the process that the assembly body and the cylindrical body are relatively moving to a compression position, the portion of the fastening element is configured as a based portion where the fastening element bent from. Said configuration maximizes the inward deformation of the fastening element in the radial direction of the coaxial cable connector so as to provide much more fastening force to a coaxial cable installed therein and is adaptable to firmly fasten coaxial cables with various diameters. The waterproof effect is accordingly further enhanced as the fastening force. |
| US10135173B2 |
Cover unit with rubber plug and connector
A rubber plug assembly (40) includes a rubber plug (50) with a shaft (51) and waterproofs the interior of a housing (20). Legs (52) extend out in a radial direction from an axial end (51A) of the shaft (51). Recesses are in the legs (52) and are long in the radial direction. A cover (70) is to be fixed to the housing (20). A rubber plug holder (60) includes assembling holes (65) for allowing the legs (52) oriented in an axial direction to be inserted therein by resiliently deforming parts of the legs (52) and projections (66) for positioning the rubber plug (50) by being fit into the recesses as the legs (52) that have passed through the assembling holes (65) return. The projections (66) and the recesses are held in a fit state by fixing the rubber plug holder (60) to the cover (70). |
| US10135169B1 |
Electrical connector with independently biasable conducting terminals
An electrical connector includes an electrically insulative housing including a front base, a back cover and a floating structure exposed to the outside of an accommodation chamber between the front base and the back cover, and a contact conducting structure including a flexible PC board, multiple conducting terminals electrically connected to respective contacts at the flexible PC board, a support block having fingers respectively extended from respective spring arms thereof for supporting the flexible PC board and spring members supporting the respective fingers. The flexible PC board has slits respectively disposed between each two adjacent contacts so that the conducting terminals can be independently biased with the respective contact without affecting the conducting stability, making the electrical connector practical for high frequency application. |
| US10135166B2 |
Symmetric dual beam contact
An electrical connector includes an insulative housing, a plurality of terminals retained in the housing. The housing includes a base and a mating tongue extending forwardly from the base. The mating tongue forms opposite mating surfaces forwardly extending and vertically converging toward each other. The terminal includes a main body, a pair of beams extending forwardly from a front side of the main body for being respectively exposed upon the opposite mating surfaces, and a pair of soldering sections extending outwardly and laterally for mounting to a printed circuit board. |
| US10135162B1 |
Method for fabricating a hybrid land grid array connector
Embodiments of the present invention include a method for fabricating a hybrid land grid array connector and the resulting structures. A body is provided. The body includes a first plurality of holes and a second plurality of holes. A conductive layer is deposited on the top and bottom surfaces of the body and the wall surfaces of the first plurality of holes resulting in the top and bottom surfaces being electrically common. The conductive layer is removed from the wall surfaces of a first subset of the first plurality of holes. A portion of the conductive layer is removed from the top surface of the body and the bottom surface of the body from an area surrounding the first subset of the first plurality of holes. |
| US10135161B2 |
Connector and electrical connection device
A connector has a conductive member attaching portion to which an end portion of a conductive member is to be attached, and a holder portion provided with an insertion hole into which the conductive member is inserted, and a fitting hole into which the conductive member attaching portion is fitted, the fitting hole being in communication with the insertion hole, the holder portion being configured to hold the conductive member attaching portion. The holder portion is provided with engaged portions with which engaging portions, which are provided at respective ends of the conductive member in the width direction, engage. The conductive member attaching portion is provided with a closing portion configured to close a part of the insertion hole. When the conductive member attaching portion has been fitted into the holder portion, the closing portion closes a part of the insertion hole with the engaging portions engaged with the engaged portions. |
| US10135160B2 |
Connection element for fastening a metal part to a printed circuit board
What is described is a connection element for fastening a metal part to a printed circuit board, wherein the connection element has a first portion, which is formed as a press-fit pin to be pressed into a bore of the printed circuit board, and a second portion, which is formed as a screw to be screwed into the metal part. |
| US10135155B2 |
Wireless communication module
First and second end-fire antennas are arranged on a dielectric substrate. The first end-fire antenna has polarization characteristics being parallel with a first direction. The second end-fire antenna has polarization characteristics being parallel with a second direction orthogonal to the first direction. A patch antenna provided with a first feed point and a second feed point, which are different from each other, is arranged on the dielectric substrate. When the patch antenna is fed from the first feed point, a radio wave whose polarization direction is parallel with the first direction is excited. When the patch antenna is fed from the second feed point, a radio wave whose polarization direction is orthogonal to the first direction is excited. A wireless communication module capable of achieving directivity in a wide range from a direction parallel with the substrate to the direction of the normal to the substrate is provided. |
| US10135154B2 |
Satellite system with beam hopping plan that takes into account the needs of gateways and subscriber terminals
A satellite communication system comprises a satellite configured to provide a plurality of spot beams adapted for communication using time domain beam hopping to switch throughput among spot beams of the plurality of spot beams. The plurality of spot beams includes a first spot beam that illuminates and communicates with a first gateway and a first set of subscriber terminals. The satellite is configured to implement a beam hopping plan that during a hopping period provides throughput to the first spot beam for an aggregated time duration based on bandwidth assignments to the first gateway and the first set of subscriber terminals. |
| US10135150B2 |
Quasi-optical beamformer with lens and plane antenna comprising such a beamformer
A beamformer comprises a transmission line fed by at least one input feed source, the transmission line comprising two stacked metal plates extending, along two directions, longitudinal X and transverse Y. The transmission line further comprises at least one protuberance extending in the directions X, Y, and in a direction Z orthogonal to the plane XY, the protuberance comprising a metal insert extending in the directions X and Y and extending height-wise in the direction Z, the insert comprising a base fastened to one of the two metal plates and a free end and having a contour of variable length between the two lateral edges of the transmission line. In the protuberance, the transmission line is adjoining the insert and forms, in the direction Z, a circumvolution around the insert. |
| US10135147B2 |
Apparatus and methods for launching guided waves via an antenna
Aspects of the subject disclosure may include, for example, a system having an antenna for launching, according to a signal, a first electromagnetic wave to induce a propagation of a second electromagnetic wave along a transmission medium, the second electromagnetic wave having a non-fundamental wave mode and a non-optical operating frequency. A reflective plate is spaced a distance behind the antenna relative to a direction of the propagation of the second electromagnetic wave. Other embodiments are disclosed. |
| US10135146B2 |
Apparatus and methods for launching guided waves via circuits
Aspects of the subject disclosure may include, for example, a system having a plurality of transmitters for launching, according to a signal, instances of first electromagnetic waves having different phases to induce propagation of a second electromagnetic wave at an interface of a transmission medium, the second electromagnetic wave having a non-fundamental wave mode and a non-optical operating frequency, wherein the plurality of transmitters has a corresponding plurality of antennas. A reflective plate is spaced a distance behind the plurality of antennas relative to a direction of the propagation of the second electromagnetic wave. Other embodiments are disclosed. |
| US10135145B2 |
Apparatus and methods for generating an electromagnetic wave along a transmission medium
Aspects of the subject disclosure may include, generating, by a plurality of dielectric antennas of a waveguide system, a plurality of instances of electromagnetic waves that combines to form a combined electromagnetic wave, and directing, by the waveguide system, the combined electromagnetic wave to an interface of a transmission medium for guiding propagation of the combined electromagnetic wave along the transmission medium without requiring an electrical return path. Other embodiments are disclosed. |
| US10135144B2 |
Architecture for an antenna with multiple feeds per beam and comprising a modular focal array
An MFPB antenna comprises a plurality of RF feeds with four ports and a BFN, the number of feeds per beam being equal to four, and a single structural interface board, covering all of the ports of the RF feeds, and comprising a plurality of through waveguides. The through waveguides are positioned according to a matrix with multiple rows and multiple columns. The RF feeds are grouped into subassemblies that are respectively integrated in various independent cluster sources mounted one beside the other on the front face of the interface board, the ports of the RF feeds of each cluster source being connected to the through waveguides. The BFN is composed of multiple independent linear partial BFNs, mounted side by side on the back face of the interface board, the various ports of the power combiners that are integrated in each linear partial BFN being connected to the through waveguides. |
| US10135141B2 |
Mobile device
A mobile device includes a ground element and an antenna element. The antenna element includes a first radiation portion, a second radiation portion, and a third radiation portion. The first radiation portion is electrically connected between a feeding point and an edge of the ground element, and the antenna element operates in a first frequency band through a first path formed by the first radiation portion. A first end of the second radiation portion is electrically connected to the first radiation portion, and a second end of the second radiation portion is a first open end. The third radiation portion is electrically connected between the second radiation portion and the edge of the ground element. The antenna element operates in a second frequency band through a second path formed by the second radiation portion and the third radiation portion. |
| US10135139B2 |
Multiband antenna system
An antenna enables compact and robust multiband operation of portable radios. According to some embodiments, the antenna includes: a first rolled conductive strip having a first section with overlap between successive turns of the first conductive strip and a second section with no overlap between successive turns of the first conductive strip, the first section having an insulating layer between the overlapping successive turns of the first conductive strip; a second rolled conductive strip; and a flexible sheet to which both the first conductive strip and the second conductive strip are bonded. |
| US10135135B2 |
Array antenna and antenna system
An array antenna forms a main beam, and the main beam is toward a beam direction. The array antenna includes a plurality of radiating elements with a plurality of central line segments, where the plurality of radiating elements are arranged along a straight line, and the straight line is connecting the plurality of central line segments; and a plurality of meanders connecting the plurality of radiating elements; where the array antenna is disposed on a first plane, the beam direction has a nonzero deviating angle with a normal direction of the first plane, and the normal direction is perpendicular to the first plane. |
| US10135134B2 |
Antenna system for receiving and transmitting wireless signals
An antenna system includes N integrated passive components (IPCs). A first end of each IPC of the N IPCs is directly configured to couple to an antenna for receiving signals of a band corresponding to the IPC and filtering signals of bands corresponding to other IPCs of the N IPCs. The antenna system can prevent signals of various bands from interfering with each other, reduces parasitic capacitance effect, and further improves nonlinear distortion. |
| US10135132B2 |
Antenna equipment and terminal
An antenna equipment includes an antenna and a board on which the antenna is disposed, and includes an area that is disposed on the board and that is not covered by a metal layer. A first edge of the board is a longer edge of the board in two edges of the board that are close to the antenna, a point that is on the first edge and whose distance with a current maximum point on the first edge is λ/4 is a first point, the current maximum point is on the first edge and that is closest to a feed point of the antenna, and λ is an operating wavelength of the antenna. The area that is not covered by a metal layer includes the first point, and a maximum distance from an edge of the area to the first edge of the board is λ/4. |
| US10135128B2 |
Antenna Module
An antenna module is provided. The antenna module according to one embodiment of the present invention includes a ground portion which has a lower ground plane, a dielectric layer disposed on the lower ground plane, and an upper ground plane disposed on the dielectric layer, and an antenna portion disposed at an adjoining surface of the ground portion and configured to have a patch layer, a dielectric layer disposed on the patch layer, and an antenna layer disposed on the dielectric layer, and having a plurality of unit patterns which continuously repeat. |
| US10135124B1 |
Antenna assembly
An antenna assembly includes: a base; a first rod coupled to the base; an outer frame coupled to the first rod, the outer frame being rotatable around the first rod; a first antenna having a first end coupled to a first position of an inner surface of the curvy frame, and a second end coupled to a second position of the inner surface of the outer frame, the first antenna being rotatable around a pivot extending from the first position to the second position; and a second antenna having a first end coupled to a third position of the inner surface of the outer frame, and a second end exposed to an inner space surrounded by the outer frame. |
| US10135121B2 |
Antenna for portable device
An antenna device of a portable device such as a smartphone includes a connecting member having a conductive case and mounted on a circuit board of the portable device in a manner such that the case is connected to a ground surface of the circuit board; a radiator spaced from the circuit board; and at least one connecting pin provided between the case and the radiator. The radiator is connected to the ground surface through the connecting pin and the case. The antenna device advantageously may be easily installed in the internal space of a miniaturized, lightened and/or slimmed portable device by practically using a conductive component, e.g., the case, of the connecting member. |
| US10135118B2 |
Adaptive parasitic multi-antenna system
An apparatus includes a first antenna and a second antenna, operatively coupled to a transceiver; at least one parasitic resonator; and parasitic selection logic, operatively coupled to the at least one parasitic resonator and to the transceiver. The parasitic selection logic operative is to determine a signal quality metric using a first signal quality metric measurement for the first antenna, and a second signal quality metric measurement for the second antenna; and switch the at least one parasitic resonator to a termination in response to the determined signal quality metric. |
| US10135117B2 |
Wireless communication system with multi-mode cavity antennas
An antenna system for implementation in a wireless communication system such as a mobile device, and a wireless communication system employing such an antenna system, and a related methodology, are disclosed herein. In one example embodiment, a mobile device includes a display, a chassis, and one or more electrical components. The display is provided along a front surface of the mobile device, and the chassis has first and second cavities provided along a rear surface of the mobile device, the rear surface being substantially opposite the front surface. Further, the one or more electrical components is or are supported in between the display and the chassis, and the one or more electrical components provide excitation signals to one or both of the first and second cavities so as to cause electrical fields in accordance with a plurality of modes to occur respectively within the cavities at multiple frequencies, respectively. |
| US10135112B1 |
3D antenna mount
An antenna may include an antenna mount defining an opening, and be configured to operate as (i) a resonator for transferring an RF signal and (ii) support member. The antenna may further include a ground plane configured to support the antenna mount, and a substrate extending through the opening and being perpendicular to the ground plane on which the antenna mount is being supported. |
| US10135110B2 |
Vehicle antenna assembly with cooling
A vehicle may include a battery and an antenna assembly mounted on the vehicle. The antenna assembly may be mounted on the roof of the vehicle. The antenna assembly may include a cooling arrangement electrically connected with the battery, a pair of thermally conductive plates, and a semiconductor sandwiched between the plates, electrically connected with the battery, and configured to, in response to a temperature difference between the plates, generate a current for the battery. A photovoltaic generator may be electrically connected with the battery to increase electrical generation. |
| US10135107B2 |
Directional coupler and microwave heater provided with the same
A directional coupler according to the invention includes an opening in a wall surface of a waveguide, and a coupling line on an outer side of the waveguide. The opening is configured to not cross a tube axis of the waveguide in plan view, and to emit a circularly polarized wave. The coupling line includes first and second transmission lines and output parts disposed at both ends, the first and second transmission lines extending across the opening to cross the tube axis in plan view and being opposed to each other across the center of the opening. The first and second transmission lines are interconnected at a position displaced from an area vertically above the opening. |
| US10135105B2 |
Differential transmission cable and multipair differential transmission cable
A differential transmission cable includes a pair of signal lines, an insulation covering the pair of signal lines, and a shielding tape that includes a conductor layer and an insulation layer formed on one surface of the conductor layer and is helically wound around the insulation. The diameter of the signal line is thinner than at least 30 AWG (American Wire Gauge), and differential characteristic impedance is not less than 80Ω and not more than 120Ω. |
| US10135103B2 |
Cooling circuit with cooling fluid for lithium batteries, and a vehicle comprising said cooling circuit
A cooling circuit with cooling liquid for lithium-ion batteries comprising a battery pack comprising a plurality of cells electrically connected with each other, suitable for powering an electric machine for traction. The cells are perimetrically delimited by external walls. At least one bag contains cooling liquid associated in contact with the outer walls of the cells. The bag is made of deformable plastic material so as to be counter-shaped to the outer walls to adhere perimetrally to the outer walls and the circuit provides forced circulation of the cooling liquid through said at least one bag. |
| US10135102B2 |
Battery management system for electric automobile and control method thereof
A battery management system for an electric automobile and a control method are provided. The battery management system includes a temperature monitoring device (10) connected to a battery compartment of the electric automobile for monitoring the battery temperature and transmitting the battery temperature to a main control device (12), a refrigeration circulation channel (11) connected to the battery compartment for circulating a refrigerant so as to refrigerate the batteries. The main control device is connected to an acquisition device and the refrigeration circulation channel, for controlling the refrigerant to be circulated so as to refrigerate the batteries when the battery temperature exceeds a preset upper limit value. With the battery management and the control method, the impact of the high temperature on the service life and the capacity and the like of the batteries can be reduced, and the service life of the batteries can be prolonged. |
| US10135099B2 |
Pulsed discharge device and pulsed discharge method
A pulsed discharge device according to an exemplary aspect of the present invention includes a controller configured to determine an interruption time to a discharge time based on a predetermined time ratio between the discharge time and the interruption time when performing a pulsed discharge to repeat alternately a discharge and a pause in discharging of a chemical battery. |
| US10135095B2 |
Lithium secondary battery
Disclosed is a lithium secondary battery including: (i) a cathode active material including a lithium metal phosphate according to Formula 1 below; (ii) an anode active material including amorphous carbon; and (iii) an electrolyte for lithium secondary batteries including a lithium salt and an ether based solvent, wherein propylene carbonate (PC) is included in an amount of 1 wt % to 60 wt % in the electrolyte for lithium secondary batteries, based on the total weight of the electrolyte, Li1+aM(PO4−b)Xb (1) wherein M is at least one selected from metals of Groups II to XII; X is at least one selected from F, S and N, −0.5≤a≤+0.5, and 0≤b≤0.1. |
| US10135094B2 |
Electrolyte for lithium secondary battery and lithium secondary battery containing the same
Provided are an electrolyte for a lithium secondary battery and a lithium secondary battery containing the same. |
| US10135088B2 |
Pin-type rechargeable battery
A rechargeable battery includes: an electrode assembly including a first electrode, a second electrode, and a separator, the first and second electrodes being located on either side of the separator and wound together; a center pin located within the electrode assembly and electrically connected to an uncoated region of the first electrode; a case accommodating the electrode assembly and electrically connected to an uncoated region of the second electrode; a terminal extending to the outside of the case from the center pin; and a gasket located between the terminal and an opening of the case and sealing the opening. |
| US10135077B2 |
Corrosion resistant metal bipolar plate for a PEMFC including a radical scavenger
The present disclosure includes fuel cell bipolar plates and methods of forming a radical scavenging coating on a bipolar plate. The bipolar plates may include a steel substrate, a middle layer contacting the steel substrate and including a bulk material and a radical scavenging material, and a conductive layer contacting the middle layer. The radical scavenging material may include cerium, such as metallic cerium or a cerium oxide. The conductive layer may include a conductive carbon, such as a diamond-like carbon or coating (DLC). The radical scavenging material may comprise 0.1 wt % to 30 wt % of the middle layer. The middle layer may be deposited using PVD, and the radical scavenging material may be doped into the middle layer, for example, by co-sputtering it with the bulk material of the middle layer. |
| US10135073B2 |
Dispersant for resin collectors, material for resin collectors, and resin collector
An object of the present invention is to provide a dispersant for a resin current collector which can uniformly disperse a conductive filler to attain sufficient charge and discharge characteristics without impairing the output power per unit weight of a battery. The present invention provides a dispersant for a resin current collector comprising a polymer having a resin-philic block (A1) and a conductive filler-philic block (A2). |
| US10135070B2 |
Positive electrode active material slurry including rubber-based binder and positive electrode prepared therefrom
The present invention relates to positive electrode active material slurry of which degree of non-crystallinity is controlled by including a rubber-based binder in a specific ratio, a positive electrode including a positive electrode active material layer formed therefrom, and a lithium secondary battery including the positive electrode. The positive electrode active material layer formed from the positive electrode active material slurry has enhanced flexibility and rolling property, and internal short circuits, high voltage defects and capacity decline of the lithium secondary battery using the positive electrode including the same are capable of being suppressed. |
| US10135069B2 |
Electrode material and method for manufacturing power storage device
To provide a power storage device including an electrode material having a large capacity. First heat treatment is performed on a mixture of a compound containing lithium; a compound containing a metal element selected from manganese, iron, cobalt, and nickel; and a compound containing phosphorus. A cleaning step is performed on the mixture subjected to the first heat treatment. Second heat treatment is performed on the mixture subjected to the cleaning step, so that a lithium phosphate compound is produced. With the use of the lithium phosphate compound, an electrode is formed. |
| US10135067B2 |
MSix-containing silicon material (M is at least one element selected from group 3 to 9 elements. ⅓<=x<=3) and method for producing same
A novel silicon material is provided.An MSix-containing silicon material contains MSix (M is at least one element selected from the group 3 to 9 elements. 1/3≤x≤3) in a silicon matrix. |
| US10135065B2 |
Composite anode material including nickel oxide and the method for preparing the same
The present invention provides a composite anode material including nickel oxide, a method for preparing the composite anode material, and a lithium ion battery using the composite anode material. The composite anode material has a core-shell structure, the inner core is an inert core comprising a non-active material, and the outer shell comprises an anode active material of nickel oxide. The composite anode material with core-shell structure in the present invention overcomes the problem of volume changing and chalking of nickel oxide during charging/discharging and obtains a better cycle performance and rate performance. |
| US10135062B2 |
Fabrication and use of carbon-coated silicon monoxide for lithium-ion batteries
The present invention provides anode materials, methods of producing them, anodes, methods of producing them, electrochemical cells, and lithium-ion batteries, where the anode material comprises a silicon monoxide nanoparticle. In certain embodiments, the silicon monoxide is porous or mesoporous. In certain embodiments, the porous or mesoporous silicon additionally comprises other materials within its pores, such as lithium. |
| US10135059B2 |
Crumpled particles, methods of synthesizing same and applications using same
In one aspect of the present invention, a method of for synthesizing compression- and aggregation-resistant particles includes forming a graphene dispersion solution with micron-sized graphene-based material sheets, nebulizing the graphene dispersion solution to form aerosol droplets, passing the aerosol droplets through a horizontal tube furnace pre-heated at a predetermined temperature by a carrier gas, and drying the aerosol droplets to concentrate and compress the micron-sized graphene-based material sheets into crumpled particles of sub-micron scale. |
| US10135056B2 |
Energy storage device
An energy storage device includes: an electrode terminal; an electrode assembly; a current collector configured to electrically connect the electrode terminal to the electrode assembly; and a container configured to store the electrode assembly and the current collector. The current collector includes a terminal connection part connected to the electrode terminal and an electrode assembly-connection part connected to the electrode assembly. The energy storage device further includes a spacer disposed lateral to the electrode assembly-connection part of the current collector. The spacer includes a restriction part configured to contact a part in a longitudinal direction of the electrode assembly-connection part of the current collector to restrict movement of the current collector in the longitudinal direction. |
| US10135055B2 |
Separator for secondary battery
Provided herein is a separator used for an electrochemical device such as a lithium-ion battery. The separator disclosed herein comprises a porous base material, and a protective porous layer coated on one or both surfaces of the porous base material disclosed herein, wherein the protective porous layer comprises an organic binder and an inorganic filler, and wherein a difference in tensile strength of the separator along the TD direction and MD direction is about 15% or less. Also provided herein is a lithium-ion battery including the separator disclosed herein. The separator disclosed herein is excellent in terms of safety, ion permeability, and cycle characteristics. |
| US10135054B2 |
Battery separator and manufacturing method thereof
A battery separator is disclosed. The battery separator includes a polyolefin porous membrane which has a plurality of protrusions including a polyolefin. The protrusions are interspersed randomly on at least one surface of the polyolefin porous membrane at a density of not less than 3 protrusions/cm2 and not greater than 200 protrusions/cm2. The protrusions have a size W, where 5 μm≤W≤50 μm, and the protrusions have a height H, where 0.5 μm≤H. The battery separator also includes a modified porous layer, including a fluorine-based resin, and a plurality of inorganic particles laminated on the at least one surface of the polyolefin porous membrane. A concentration of the inorganic particles is not less than 40 wt. % and is less than 80 wt. %. |
| US10135053B2 |
Method of manufacturing porous separator comprising elastic material, porous separator manufactured by the method, and secondary battery comprising the separator
Disclosed is a method of manufacturing a porous separator including an elastic material, and a separator manufactured by the method. The separator includes an elastic material being uniformly dispersed in a polymer at a weight ratio of 40:60 to 5:95, and a value of elongation at break in a low tensile strength direction at room temperature is greater than or equal to 250%. In addition, the method of manufacturing a porous separator includes forming an extruded sheet by extruding a mixture of a polymer and an elastic material at a weight ratio of 95:5 to 60:40, forming a film by annealing and stretching the extruded sheet, and forming a porous separator by heat setting the stretched film. Accordingly, a thermal shrinkage ratio of the film is reduced and an elongation at break is greatly increased, to provide a porous separator with improved stability. |
| US10135052B2 |
Stacked battery and method of manufacturing same
A stacked battery including two kinds of electrodes 1, 2 and separators 3 through each of which one of the two kinds of electrodes 1 is stacked on another of the two kinds of electrodes 2, each of separators 3 including bonding portion 7 in which separator 3 stacked on the one of the two kinds of electrodes 1 and separator 3 stacked on the another of the two kinds of electrodes 2 are partly bonded to each other on a lateral side of the one of the two kinds of electrodes 1, and non-bonding portion 8 in a curve form which extends at least from a position in which separator 3 is contacted with an end surface of the another of the two kinds of electrodes 2 toward a lateral side of the another of the two kinds of electrodes 2. |
| US10135051B2 |
Battery components comprising fibers
Battery components are generally provided. In some embodiments, the battery components can be used as pasting paper and/or capacitance layers for batteries, such as lead acid batteries. The battery components described herein may comprise a plurality of fibers. The battery component may include, in some embodiments, a plurality of fibers and, optionally, one or more additives such as conductive carbon and/or activated carbon. In certain embodiments, the plurality of fibers include relatively coarse glass fibers (e.g., having an average diameter of greater than or equal to 2 microns), relatively fine glass fibers (e.g., having an average diameter of less than 2 microns), and/or fibrillated fibers. In some instances, such fibers may be present in amounts such that the battery component has a particular surface area, mean pore size, and/or dry tensile strength. |
| US10135046B2 |
Temperature regulation structure
In a temperature regulation structure according to the invention, the power storage element includes a power generation element for charging and discharging, and has a case body having an opening portion for incorporating the power generation element, and a lid that closes up the opening portion of the case body. Air for temperature regulation that comes into contact with the power storage element is supplied from a direction substantially perpendicular to a bottom face of the case body, which is opposed to the lid across the power generation element. The temperature of the power storage element can be efficiently regulated by bringing the air for temperature regulation into contact with the bottom face of the case body. |
| US10135042B2 |
Battery module unit
A battery module unit for a power supply device is designed so that the value of the adhesive strength between an end plate and an outermost tape and the value of the adhesive strength between a battery module and the outermost tape are greater than or equal to the minimum required strength for holding the battery module and around the minimum required strength. As a result, the battery module does not fall off in a normally held state and the end plate can be easily peeled off from the battery module at the time of reworking. |
| US10135041B1 |
Systems and methods for packaging a solid-state battery
The present disclosure relates to systems and methods for packaging a solid-state battery. Consistent with some embodiments, a package for a solid-state battery includes a substrate, a cap disposed over the substrate and forming an enclosure with the substrate, and a solid-state battery disposed inside the enclosure. The solid-state battery includes a first electrode that is disposed over the substrate, an electrolyte that is disposed over the first electrode, and a second electrode that is disposed over the electrolyte. The package further includes a compressible component disposed inside the enclosure and between the cap and the second electrode of the solid-state battery. The compressible component applies a pressure to at least one of the electrodes of the solid-state battery in a direction substantially perpendicular to the electrode(s) of the solid-state battery. |
| US10135040B2 |
Electric storage device, electric storage device assembly, and method for producing electric storage device
Provided is an electric storage device including a first conductive member having a head bulging from an inserted part inserted through a partition wall, and a second conductive member that is formed using a metal material different from a material of the first conductive member and is fixed to the head of the first conductive member by friction stir welding. |
| US10135037B2 |
Manufacturing method of light-emitting device, light-emitting device, module, and electronic device
A highly reliable light-emitting device is provided. A yield in a manufacturing process of a light-emitting device is increased. A light-emitting device is provided in which a non-light-emitting portion having a frame-like shape outside a light-emitting portion includes a portion thinner than the light-emitting portion. A light-emitting element and a bonding layer are formed over a substrate. The light-emitting element is sealed by overlapping a pair of substrates and curing the bonding layer. Then, while the cured bonding layer is heated, pressure is applied to at least a portion of the non-light-emitting portion with a member having a projection. |
| US10135036B2 |
Organic electroluminescence device and manufacturing method thereof
In an organic electroluminescence device (100), a hole transport layer (22) is formed of a cured resin obtained by a ring opening polymerization of a polymerizable compound (a) containing a ring opening polymerizable group in the presence of a polymerization initiator (b). In addition, both of a maximum peak height Rp and a maximum valley depth Rv in an upper surface of the hole transport layer (22) are less than or equal to 14 nm. Accordingly, an organic electroluminescence device having excellent mass productivity and high luminescent efficiency is realized. |
| US10135033B2 |
Directional light extraction for organic light emitting diode (OLED) illumination devices
An organic light emitting diode (OLED) incorporating a light extraction film is disclosed. The light extraction film may be used for enhancing light extraction from a light source. The light extraction film may include an array of 3-D microprisms, an interstitial region, and a glass layer. Each microprism may have an area of a first surface (A1) and an area of a second surface (A2). The A2 may be equal to or less than A1. Each microprism may have a pair of oppositely disposed sidewalls. The interstitial region may be disposed between the pair of oppositely disposed sidewalls of adjacent microprisms. The interstitial region may have an index of refraction less than an index of refraction of the microprism. The glass layer may be attached to the first surface of the array of 3-D microprisms. The glass layer may be less than about 1 mm thick. |
| US10135030B2 |
Organic electroluminescent display device and method of manufacturing the same
An organic electroluminescent display device including a rear substrate, an organic electroluminescent portion disposed over a surface of the rear substrate, the organic electroluminescent portion including a first electrode, an organic layer, and a second electrode in sequence, a front substrate opposing the rear substrate and coupled to the rear substrate to seal an internal space therebetween in which the organic electroluminescent portion is accommodated, thereby isolating the organic electroluminescent portion from the outside, a moisture-absorbing layer disposed over an internal surface of the front substrate, and a sealant disposed between the rear substrate and the moisture-absorbing layer to couple the front substrate and the rear substrate. |
| US10135024B2 |
Curved display device
A curved display device has a plurality of layers including elements for implementing an input image, and has a neutral plane (NP), a first area positioned in any one of upper and lower sides of the NP with compressive stress applied thereto, and a second area positioned in the other of the upper and lower sides of the NP with a tensile stress applied thereto The curved display device includes at least one first curved portion; and at least one second curved portion bent in a direction different from a direction of the first curved portion. The first curved portion and the second curved portion are different in thickness, and positions of the NPs. |
| US10135021B2 |
Frit sealing using direct resistive heating
An frit-sealed device comprising a resistive heating element having an electrically-closed-loop structure and process for frit-sealing a device by using such heating element. The element can be advantageously made of a metal such as Invar® and/or Kovar®. The invention enables hermetic frit sealing with low residual stress in the seal. The invention is particularly advantageous for hermetic sealing of OLED display devices. |
| US10135017B2 |
Quantum light emitting diode and quantum light emitting device including the same
A quantum light emitting diode comprises a first electrode; a second electrode facing the first electrode; a light-amount enhancing layer between the first and second electrodes and having a structure guiding emitted light toward an emitting side; and an emitting material layer between the light-amount enhancing layer and the second electrode and including a quantum particle at the structure of the light-amount enhancing layer. |
| US10135015B1 |
Electrochemical clock and oscillator devices
One embodiment provides an oscillator. The oscillator can include an organic electrochemical transistor, which comprises a channel and a dynamic gate. The channel can include one of: a conductive polymer, a conductive inorganic material, and a small-molecule material. An electrochemical potential of the dynamic gate can vary substantially periodically, thereby resulting in the organic electrochemical transistor having a drain current that varies substantially periodically. |
| US10135014B2 |
Display device and method of manufacturing display device
Disclosed is a display device, including a first substrate having flexibility including a pixel region and a frame region around the pixel region, a pixel arranged on a first surface of the first substrate in the pixel region, and a terminal section arranged in the frame region and connected to the pixel, in which the first substrate includes an adjustment region between the pixel and the terminal section, the adjustment region having a different Young's modulus from those of the pixel region and the frame region. |
| US10135012B2 |
Display device and manufacturing method of display device
A manufacturing substrate, on which a lamination is formed, is disposed on a first substrate. The lamination includes a first sheet substrate having flexibility and adhered to the first substrate, an organic layer that emits light such that brightness is controlled in each of a plurality of pixels forming an image in a display area, and a sealing layer. A light blocking area that does not overlap the display area in a plan view is formed on the first substrate, and after the first substrate is irradiated with light on a side that opposite to the sheet substrate, the first substrate is delaminated from the first sheet substrate. |
| US10135008B2 |
Organic electroluminescent materials and devices
A novel Pt tetradentate complexes having Pt—O bond is disclosed. These complexes are useful as emitters in phosphorescent OLEDs. |
| US10135004B2 |
Fluorescent organic light emitting elements having high efficiency
The present invention relates to organic light emitting elements, comprising thermally activated delayed fluorescence (TADF) emitters and/or hosts on basis of benzotriazoles, which have a sufficiently small energy gap between S1 and T1 (ΔEST) to enable up-conversion of the triplet exciton from T1 to S1. The organic light emitting elements show high electroluminescent efficiency. |
| US10135000B2 |
Organic electroluminescent element and electronic device
An organic electroluminescence device includes an anode, a cathode, and an emitting layer, in which the emitting layer contains a first compound, a second compound, and a third compound, a singlet energy S(M1) of the first compound and a singlet energy S(M2) of the second compound satisfy a numerical formula (Numerical Formula 1) below, an electron affinity Af(M1) of the first compound and an electron affinity Af(M2) of the second compound satisfy a numerical formula (Numerical Formula 2) below, and a triplet energy T(M1) of the first compound satisfies a numerical formula (Numerical Formula 3) below, S(M2)≥S(M1)×0.95 (Numerical Formula 1) Af (M2)−Af(M1)≥0.2eV (Numerical Formula 2) T(M1)≤2.0eV (Numerical Formula 3). |
| US10134998B2 |
Light-emitting element, display device, electronic device, and lighting device
A light-emitting element containing a light-emitting material with high light emission efficiency is provided. The light-emitting element includes a high molecular material and a guest material. The high molecular material includes at least a first high molecular chain and a second high molecular chain. The guest material has a function of exhibiting fluorescence or converting triplet excitation energy into light emission. The first high molecular chain and the second high molecular chain each include a first skeleton, a second skeleton, and a third skeleton, and the first skeleton and the second skeleton are bonded to each other through the third skeleton. The first high molecular chain and the second high molecular chain have a function of forming an excited complex. |
| US10134994B2 |
Polycyclic polymer comprising thiophene units, a method of producing and uses of such polymer
The present invention relates to a novel polycyclic polymer comprising fused thiophene units. The present invention also relates to a method for producing such polymer as well as the use of such polymer, particularly in organoelectronic applications. |
| US10134993B2 |
Substrate for an organic light-emitting device and method for manufacturing the same
Provided is a substrate for an organic light emitting diode including a base substrate, a high refractive scattering layer formed on the base substrate, and having a scattering particle scattering light in a high refractive material, and an adhesive layer formed between the base substrate and the high refractive scattering layer to laminate the base substrate with the high refractive scattering layer, wherein the high refractive scattering layer has a structure in which the scattering particle is immersed in the high refractive material, an average thickness of the high refractive scattering layer is smaller than an average diameter of the scattering particle, a surface of the high refractive scattering layer laminated with the base substrate by the adhesive layer has unevenness formed by the scattering particle, the opposite surface of the high refractive scattering layer laminated with the base substrate by the adhesive layer has a planarized surface, and a method for manufacturing the same. The substrate may have an excellent degree of planarization and improved light extraction efficiency without degradation in performance of the diode, and low process and material costs and mass-production of the substrate may be easily achieved. |
| US10134990B2 |
Multilayer heterostructures for application in OLEDs and photovoltaic devices
This invention relates to a supported polymer heterostructure and methods of manufacture. The heterostructure is suitable for use in a range of applications which require semiconductor devices, including photovoltaic devices and light-emitting diodes. |
| US10134987B2 |
Access devices to correlated electron switch
Subject matter disclosed herein may relate to programmable fabrics including correlated electron switch devices. |
| US10134982B2 |
Array of cross point memory cells
An array of cross point memory cells comprises spaced first lines which cross spaced second lines. Two memory cells are individually between one of two immediately adjacent of the second lines and a same single one of the first lines. |
| US10134981B1 |
Free layer sidewall oxidation and spacer assisted magnetic tunnel junction (MTJ) etch for high performance magnetoresistive random access memory (MRAM) devices
A magnetic tunnel junction (MTJ) that avoids electrical shorts and has improved data retention is disclosed. An uppermost capping layer has a first sidewall that is coplanar with an interface between outer oxidized portions and a center ferromagnetic portion of a free layer (FL) that has a FL width (FLW). A dielectric spacer is formed on the first sidewall and oxidized outer FL portions. The pinned layer (PL) has a width (PLW) substantially greater than FLW, and a second sidewall thereon is formed by a self-aligned etch using the dielectric spacer and capping layer as an etch mask. A sidewall layer may be formed on the second sidewall and dielectric spacer but does not degrade MTJ properties since the sidewall layer does not contact the FL and PL center portions responsible for device performance. PL width>FLW ensures greater capability for data retention especially for FLW<60 nm. |
| US10134978B2 |
Magnetic cell structures, and methods of fabrication
A magnetic cell structure comprises a seed material including tantalum, platinum, and ruthenium. The seed material comprises a platinum portion overlying a tantalum portion, and a ruthenium portion overlying the platinum portion. The magnetic cell structure comprises a magnetic region overlying the seed material, an insulating material overlying the magnetic region, and another magnetic region overlying the insulating material. Semiconductor devices including the magnetic cell structure, methods of forming the magnetic cell structure and the semiconductor devices are also disclosed. |
| US10134976B2 |
Piezoelectric element, liquid discharging head provided with piezoelectric element, and liquid discharging apparatus
The piezoelectric body is configured to have a layered structure such that a plurality of unit layers are stacked in a film thickness direction, and each of the unit layers is formed of a first layer on which the displacement is relatively easy to occur, and a second layer which has a high concentration of Zr as compared with the first layer. In addition, when composition ratio Ti/(Zr+Ti) of Zr to Ti in each of the first layer and the second layer is set as Cr1 and Cr2, the composition ratio of each layer is adjusted so as to satisfy the following conditions (1) to (3): 0.41≤Cr1≤0.81 (1) 0.1≤Cr1−Cr2≤0.3 (2) Cr1>Cr2 (3). |
| US10134973B2 |
Ultrasonic transducer and manufacture method thereof
The present application relates to the technical field of transducer, it provides an ultrasonic transducer and the manufacture method therefore. The ultrasonic transducer comprises: a piezoelectric layer for radiating sound signal forward or backward, each side thereof being plated with an electrode; a matching layer arranged in the front of the piezoelectric layer and suitable for sending the forward sound signal; a tuning layer arranged on the back of the piezoelectric layer, wherein the piezoelectric layer is disposed between the tuning layer and the matching layer; a backing layer for absorbing the backward sound signal from the piezoelectric layer, wherein the backing layer is arranged against the piezoelectric layer on the tuning layer. |
| US10134971B2 |
Thermoelectric converter
A thermoelectric converter includes a first substrate that is deformable, a second substrate that is deformable, a plurality of thermoelectric conversion elements, and a group of electrodes. The plurality of thermoelectric conversion elements are disposed between the first substrate and the second substrate. The group of electrodes electrically interconnect the plurality of thermoelectric conversion elements. The plurality of thermoelectric conversion elements are arranged in a plurality of rows. The group of electrodes include a bridge electrode disposed across a first row and a second row among the plurality of rows. The first row is adjacent to the second row. The bridge electrode has a first part whose thickness is smaller than a thickness of each of remaining electrodes other than the bridge electrode among the group of electrodes and whose surface area is larger than a surface area of each of the remaining electrodes. |
| US10134969B2 |
Vertical solid-state transducers and high voltage solid-state transducers having buried contacts and associated systems and methods
Solid-state transducers (“SSTs”) and vertical high voltage SSTs having buried contacts are disclosed herein. An SST die in accordance with a particular embodiment can include a transducer structure having a first semiconductor material at a first side of the transducer structure, and a second semiconductor material at a second side of the transducer structure. The SST can further include a plurality of first contacts at the first side and electrically coupled to the first semiconductor material, and a plurality of second contacts extending from the first side to the second semiconductor material and electrically coupled to the second semiconductor material. An interconnect can be formed between at least one first contact and one second contact. The interconnects can be covered with a plurality of package materials. |
| US10134968B2 |
Solid state lighting devices with improved contacts and associated methods of manufacturing
Solid state lighting (“SSL”) devices with improved contacts and associated methods of manufacturing are disclosed herein. In one embodiment, an SSL device includes an SSL structure having a first semiconductor material, a second semiconductor material spaced apart from the first semiconductor material, and an active region between the first and second semiconductor materials. The SSL device also includes a first contact on the first semiconductor material and a second contact on the second semiconductor material, where the first and second contacts define the current flow path through the SSL structure. The first or second contact is configured to provide a current density profile in the SSL structure based on a target current density profile. |
| US10134967B2 |
Light emitting device
A light-emitting device includes first and second lead frames spaced apart from each other, the first and second lead frames each including a top surface, an opposing bottom surface, and sidewalls arranged between the top surface and the bottom surface thereof, in which at least one of the first and second lead frames include three inset sidewalls that at least partially define a fixing space, the fixing space undercutting at least one of the first lead frame and second lead frame, a light-emitting diode chip disposed on the top surface of the first or second lead frame, and the top surfaces of the first and second lead frames are substantially flat. |
| US10134964B2 |
Passivation for a semiconductor light emitting device
In embodiments of the invention, a passivation layer is disposed over a side of a semiconductor structure including a light emitting layer disposed between an n-type region and a p-type region. A material configured to adhere to an underfill is disposed over an etched surface of the semiconductor structure. |
| US10134959B2 |
Light emitting device excellent in color rendering property for emitting light closer to sunlight
A light emitting device includes a first phosphor emitting a fluorescence having a peak emission wavelength of not less than 445 nm and not more than 490 nm, a second phosphor emitting a fluorescence having a peak emission wavelength of not less than 491 nm and not more than 600 nm, a third phosphor emitting a fluorescence having a peak emission wavelength of not less than 601 nm and not more than 670 nm, and a light emitting element that emits a light having a peak emission wavelength at a shorter wavelength side than the peak emission wavelength of the first phosphor. 0.586≤x≤0.734, 0.017≤y≤0.081, 0.239≤z≤0.384 and x+y+z=1 are satisfied, where x, y, z are defined as mass ratios of the first, second and third phosphors, respectively, to a total mass of the first, second and third phosphors. |
| US10134957B2 |
Surface-mountable optoelectronic semiconductor component with conductive connection on housing body
A surface-mountable optoelectronic semiconductor component is specified. The surface-mountable optoelectronic semiconductor component includes an optoelectronic semiconductor chip, a radiation-transmissive growth substrate, a housing body and an electrically conductive connection. The housing body is arranged at least in places between a side surface of the growth substrate and the electrically conductive connection. The housing body completely covers all of the side surfaces of the growth substrate, and the housing body has, on a surface facing away from the side surface of the growth substrate, traces of material removal or traces of a form tool. |
| US10134943B2 |
Semiconductor chip, method for producing a plurality of semiconductor chips and method for producing an electronic or optoelectronic device and electronic or optoelectronic device
A method for producing a multiplicity of semiconductor chips (13) is provided, comprising the following steps: —providing a wafer (1) comprising a multiplicity of semiconductor bodies (2), wherein separating lines (9) are arranged between the semiconductor bodies (2), —depositing a contact layer (10) on the wafer (1), wherein the material of the contact layer (10) is chosen from the following group: platinum, rhodium, palladium, gold, and the contact layer (10) has a thickness of between 8 nanometers and 250 nanometers, inclusive, —applying the wafer (1) to a film (11), —at least partially severing the wafer (1) in the vertical direction along the separating lines (9) or introducing fracture nuclei (12) into the wafer (1) along the separating lines (9), and —breaking the wafer (1) along the separating lines (9) or expanding the film (11) such that a spatial separation of the semiconductor chips (13) takes place, wherein the contact layer (10) is also separated. A semiconductor chip, a component and a method for producing the latter are also provided. |
| US10134941B2 |
Method for manufacturing solar cell including a patterned dopant layer
A method for manufacturing a solar cell is disclosed. The disclosed method includes conductive region formation of forming a first-conduction-type region at one surface of a semiconductor substrate and a second-conduction-type region at another surface of the semiconductor substrate, and electrode formation of forming a first electrode connected to the first-conduction-type region and a second electrode connected to the second-conduction-type region. In the conductive region formation, the first-conduction-type region is formed by forming a dopant layer containing a first-conduction-type dopant over the one surface of the semiconductor substrate, and heat-treating the dopant layer, and the second-conduction-type region is formed by ion-implanting a second-conduction-type dopant into the semiconductor substrate at the another surface of the semiconductor substrate. |
| US10134936B2 |
APD focal plane arrays with backside vias
An avalanche photodiode (APD) array with reduced cross talk comprises, in the illustrative embodiment, a 2D array of Geiger-mode APDs, wherein a via is formed through the backside (substrate) of each APD in the array. |
| US10134935B2 |
Photoelectric conversion apparatus and photoelectric conversion unit used in photoelectric conversion apparatus
In an embodiment, photoelectric conversion units (10) each include a package (12) accommodating a photoelectric conversion device (11). The package (12) has a front surface (12a) having a window (13); and a side surface (12c). The package (12) includes a first coupling portion (14) protruding from the side surface (12c) in a first direction X parallel to a light incident surface (11a) of the photoelectric conversion device (11), and a second coupling portion (15) recessed from the side surface (12c) in the first direction X. The first coupling portion (14) includes a first terminal (16) electrically connected with the photoelectric conversion device (11), and the second coupling portion (15) includes a second terminal (17) electrically connected with the photoelectric conversion device (11). The first coupling portion (14) and the second coupling portion (15) have shapes and sizes matching each other, and are coupled with each other by fitting. |
| US10134930B2 |
Solar cell having three-dimensional P-N junction structure and method for manufacturing same
The present invention provides a 3-dimensional P-N junction solar cell composed of a base board coated with a back plate on the upper face of the same; a P type semiconductor thin film formed on the top side of the back plate which has a 3-dimensional porous structure and is composed of P type semiconductor crystal grains; a N type buffer layer formed on the surface of the crystal grains of the said P type semiconductor thin film with playing a role of coating the thin film; and a transparent electrode formed on the surface of the crystal grains of the P type semiconductor thin film on which the N type buffer layer is formed. The solar cell of the present invention is a P-N junction solar cell including a 3-dimensional photo catalytic thin film, which can provide an improved photoelectric conversion efficiency, compared with the conventional P-N junction solar cell, owing to the formation of the N-type buffer layer on the surface of the crystal grains of the 3-dimensional P type semiconductor thin film. |
| US10134929B2 |
Achieving band gap grading of CZTS and CZTSe materials
Techniques for achieving band gap grading in CZTS/Se absorber materials are provided. In one aspect, a method for creating band gap grading in a CZTS/Se absorber layer includes the steps of: providing a reservoir material containing Si or Ge; forming the CZTS/Se absorber layer on the reservoir material; and annealing the reservoir material and the CZTS/Se absorber layer under conditions sufficient to diffuse Si or Ge atoms from the reservoir material into the CZTS/Se absorber layer with a concentration gradient to create band gap grading in the CZTS/Se absorber layer. A photovoltaic device and method of forming the photovoltaic device are also provided. |
| US10134927B2 |
Reliable electrical contacts for high power photoconductive switches
A photoconductive switch consisting of an optically actuated photoconductive material, e.g. a wide bandgap semiconductor such as SiC, situated between opposing electrodes. The electrodes are created using various methods in order to maximize reliability by reducing resistive heating, current concentrations and filamentation, and heating and ablation due to the light source. This is primarily accomplished by the configuration of the electrical contact geometry, choice of contacts metals, annealing, ion implantation, creation of recesses within the SiC, and the use of coatings to act as encapsulants and anti-reflective layers. |
| US10134926B2 |
Quantum-efficiency-enhanced time-of-flight detector
A time-of-flight detector includes a semiconductor layer and a light modulation structure. The semiconductor layer is configured to translate light radiation into electrical charge. The light modulation structure is configured to increase a path of interaction of light radiation through the semiconductor layer. In some example implementations, the light modulation structure is configured to deflect at least some light radiation at an increased angle through the semiconductor layer. In some example implementations, the light modulation structure is configured to reflect light radiation more than once through the semiconductor layer. |
| US10134924B2 |
Screen-printing system for a photovoltaic cell, and related methods
Screen-printing system comprising a metal stencil (12), and a cloth (15) fixed to the entire periphery of said metal stencil (12) to form a trampoline assembly, characterized in that the cloth (15) fixed to the metal stencil (12) has at least one free end, in order to decrease or prevent deformation under the effect of a doctor blade (20). |
| US10134923B1 |
Photovoltaic devices including bi-layer pixels having reflective and/or antireflective properties
PV devices including bi-layer pixels having reflective and/or antireflective properties, and methods for manufacturing PV devices including bi-layer pixels having reflective and/or antireflective properties. In some embodiments, each bi-layer pixel includes a first layer with reflective properties, and a second layer with antireflective properties. |
| US10134922B2 |
Window structure, method of manufacturing the same, electronic device equipped with a camera including a window structure and method of manufacturing the same
A window structure includes a window, a design layer structure on the window, a light shield layer on the design layer structure, and a light absorption layer. The design layer structure includes a first hole exposing a portion of the window. The light shield layer includes a second hole in fluid communication with the first hole. The light absorption layer covers at least a portion of the design layer structure exposed by the first and second holes, and includes a third hole exposing a portion of the window. By including the light absorption layer of a gray or black color to cover exposed portions of the design layer structure, a vignette about an image caused by the design layer structure is prevented. |
| US10134917B2 |
Tight pitch vertical transistor EEPROM
A memory device including a first conductivity type vertically orientated semiconductor device in a first region of a substrate and a second conductivity type vertically orientated semiconductor device in a second region of the substrate. A common floating gate structure in simultaneous electrical communication with a first fin structure of the first conductivity type vertically orientated semiconductor device and a second fin structure of the second conductivity type vertically orientated semiconductor device. |
| US10134916B2 |
Transistor devices, memory cells, and arrays of memory cells
A transistor device includes a pair of source/drain regions having a channel region there-between. A first gate is proximate the channel region. A gate dielectric is between the first gate and the channel region. A second gate is proximate the channel region. A programmable material is between the second gate and the channel region. The programmable material includes at least one of a) a multivalent metal oxide portion and an oxygen-containing dielectric portion, or b) a multivalent metal nitride portion and a nitrogen-containing dielectric portion. Memory cells and arrays of memory cells are disclosed. |
| US10134913B2 |
Method of manufacturing amorphous IGZO TFT-based transient semiconductor
Disclosed is a method of manufacturing an a-IGZO TFT-based transient semiconductor. The method includes (a) stacking a thermal oxide layer on a silicon substrate and depositing a nickel thin layer; (b) forming a PECVD layer on the nickel thin layer; (c) patterning the PECVD layer after setting a gate area and depositing a metallic layer; (d) lifting off the metallic layer to form a gage metallic thin layer and depositing a gage insulating layer on the gate metallic thin layer; (e) depositing an a-IGZO layer on the gate insulating layer; (f) etching an active area and the gate insulating layer; (g) forming a source electrode and a drain electrode and attaching a thermal release tape on the source electrode and the drain electrode; (h) delaminating the nickel thin layer; (i) performing transcription on a polyvinyl alcohol thin layer after etching the nickel thin layer; and (j) detaching the tape. |
| US10134912B2 |
Display device and electronic device
A display device including a pixel having a memory. The pixel includes at least a display element, a capacitor, an inverter, and a switch. The switch is controlled with a signal held in the capacitor and a signal output from the inverter so that voltage is supplied to the display element. The inverter and the switch can be constituted by transistors with the same polarity. A semiconductor layer included in the pixel may be formed using a light-transmitting material. Moreover, a gate electrode, a drain electrode, and a capacitor electrode may be formed using a light-transmitting conductive layer. The pixel is formed using a light-transmitting material in such a manner, whereby the display device can be a transmissive display device while including a pixel having a memory. |
| US10134907B2 |
Low temperature polysilicon array substrate and method for manufacturing the same
Disclosed is a low temperature polysilicon array substrate and its manufacturing method. The method includes: forming a light-shielding layer, a buffer layer and U-type polysilicon patterns successively on a glass substrate; doping channels of the U-type polysilicon patterns in the active area and then heavily N+ doping these U-type polysilicon patterns; forming a gate insulation layer and etching first via holes; forming a gate line, a source and lightly-doped regions of the N-type double-gate transistor; and heavily P+ doping U-type polysilicon patterns in the non-active area. |
| US10134906B2 |
Display device
According to one embodiment, a display device includes a first light shielding layer, a second light shielding layer, a first semiconductor layer, a second semiconductor layer, a gate line, a first source line, a second source line, a switching element, and a pixel electrode, wherein an area in which the first light shielding layer and the pixel electrode are opposed to each other and an area in which the second light shielding layer and the pixel electrode are opposed to each other are equal in size. |
| US10134905B2 |
Semiconductor device including wrap around contact, and method of forming the semiconductor device
A method of forming a wrap around contact, includes forming a plurality of semiconductor layers on a plurality of fin structures, forming a sacrificial gate on the plurality of semiconductor layers, forming an epitaxial layer on the plurality of fin structures and on a sidewall of the plurality of semiconductor layers, forming a gate structure by replacing the sacrificial gate and the plurality of semiconductor layers with a metal layer, and forming a wrap around contact on the epitaxial layer. |
| US10134904B2 |
Semiconductor device having a flexible substrate and a crack-preventing semiconductor layer
Provided is a flexible device with fewer defects caused by a crack or a flexible device having high productivity. A semiconductor device including: a display portion over a flexible substrate, including a transistor and a display element; a semiconductor layer surrounding the display portion; and an insulating layer over the transistor and the semiconductor layer. When seen in a direction perpendicular to a surface of the flexible substrate, an end portion of the substrate is substantially aligned with an end portion of the semiconductor layer, and an end portion of the insulating layer is positioned over the semiconductor layer. |
| US10134898B2 |
High dose implantation for ultrathin semiconductor-on-insulator substrates
Methods and structures for forming highly-doped, ultrathin layers for transistors formed in semiconductor-on-insulator substrates are described. High dopant concentrations may be achieved in ultrathin semiconductor layers to improve device characteristics. Ion implantation at elevated temperatures may mitigate defect formation for stoichiometric dopant concentrations up to about 30%. In-plane stressors may be formed adjacent to channels of transistors formed in ultrathin semiconductor layers. |
| US10134891B2 |
Transistor device with threshold voltage adjusted by body effect
A transistor device including a substrate, a gate structure, a first doped region, a second doped region and a body region is provided. The gate structure is disposed on the substrate. The first doped region and the second doped region are respectively disposed in the substrate at one side and another side of the gate structure. The first doped region and the second doped region have a first conductive type. The body region is disposed in the substrate at one side of the first doped region away from the gate structure. The body region has a second conductive type. The body region and the first doped region are separated by a distance, and no isolation structure exists between the body region and the first doped region. |
| US10134890B2 |
Termination region architecture for vertical power transistors
A vertical power switching device, such as a vertical superjunction metal-oxide-semiconductor field-effect-transistor (MOSFET), in which termination structures in the corners of the integrated circuit are stretched to efficiently shape the lateral electric field. Termination structures in the device include such features as doped regions, field plates, insulator films, and high-voltage conductive regions and elements at the applied substrate voltage. Edges of these termination structures are shaped and placed according to a 2nd-order smooth, non-circular analytic function so as to extend deeper into the die corner from the core region of the device than a constant-distance path. Also disclosed are electrically floating guard rings in the termination region, to inhibit triggering of parasitic p-n-p-n structures. |
| US10134886B2 |
Insulated gate bipolar device and manufacturing method thereof
In one embodiment, an IGBT is formed to include a region of semiconductor material. Insulated gate structures are disposed in region of semiconductor material extending from a first major surface. An n-type field stop region extends from a second major surface into the region of semiconductor material. A p+ type polycrystalline semiconductor layer is disposed adjacent to the field stop region and provides an emitter region for the IGBT. An embodiment may include a portion of the p+ type polycrystalline semiconductor being doped n-type. |
| US10134885B2 |
Semiconductor device having an active trench and a body trench
A semiconductor substrate having a first main surface and a transistor cell includes a drift region, a body region between the drift region and the first main surface, an active trench at the first main surface extending into the drift region, a gate insulating layer at sidewalls and a bottom side of the active trench, a gate conductive layer in the active trench, a source region in the body region, and adjacent to the active trench, a body trench at the first main surface extending into the drift region, the body trench being adjacent to the body region and to the drift region, an insulating layer at sidewalls and at a bottom side of the body trench, the insulating layer being asymmetric with respect to an axis extending perpendicular to the first main surface at a center of the body trench, and a conductive layer in the body trench. |
| US10134883B2 |
Electronic device using group III nitride semiconductor and its fabrication method
The present invention discloses an electronic device formed of a group III nitride. In one embodiment, a substrate is fabricated by the ammonothermal method and a drift layer is fabricated by hydride vapor phase epitaxy. After etching a trench, p-type contact pads are made by pulsed laser deposition followed by n-type contact pads by pulsed laser deposition. The bandgap of the p-type contact pad is designed larger than that of the drift layer. Upon forward bias between p-type contact pads (gate) and n-type contact pads (source), holes and electrons are injected into the drift layer from the p-type contact pads and n-type contact pads. Injected electrons drift to the backside of the substrate (drain). |
| US10134871B2 |
Doping of high-K dielectric oxide by wet chemical treatment
A method for fabricating a semiconductor device includes forming a first high-k (HK) dielectric layer over a substrate, performing a wet treatment process to the first HK dielectric layer. The wet treatment includes a dopant. The method also includes performing an annealing process to the first HK dielectric layer such that the dopant diffuses into the first HK dielectric layer to form a modified HK dielectric layer. Therefore the modified HK dielectric layer has a second dielectric constant which is different than the first dielectric constant. |
| US10134870B2 |
Semiconductor structure and method of manufacturing the same
A semiconductor structure includes a substrate, a fin, a bottom capping structure and a top capping structure. The fin disposed on the substrate, the fin has a lower portion and an upper portion extending upwards from the lower portion. The bottom capping structure covers a sidewall of the lower portion of the fin. The top capping structure covers a sidewall of the upper portion of the fin. |
| US10134865B2 |
One-dimensional nanostructure growth on graphene and devices thereof
A method and structure for providing a GAA device. In some embodiments, a substrate including an insulating layer disposed thereon is provided. By way of example, a first metal portion is formed within the insulating layer. In various embodiments, a first lateral surface of the first metal portion is exposed. After exposure of the first lateral surface of the first metal portion, a first graphene layer is formed on the exposed first lateral surface. In some embodiments, the first graphene layer defines a first vertical plane parallel to the exposed first lateral surface. Thereafter, in some embodiments, a first nanobar is formed on the first graphene layer, where the first nanobar extends in a first direction normal to the first vertical plane defined by the first graphene layer. |
| US10134863B2 |
Vertical semiconductor device structure and method of forming
Vertical gate all-around (VGAA) structures are described. In an embodiment, a structure including a first doped region in a substrate, a first vertical channel extending from the first doped region, a first metal-semiconductor compound region in a top surface of the first doped region, the first metal-semiconductor compound region extending along at least two sides of the first vertical channel, and a first gate electrode around the first vertical channel. |
| US10134856B2 |
Semiconductor device including contact plug and method of manufacturing the same
A semiconductor device includes an active fin partially protruding from an isolation pattern on a substrate, a gate structure on the active fin, a source/drain layer on a portion of the active fin adjacent to the gate structure, a source/drain layer on a portion of the active fin adjacent to the gate structure, a metal silicide pattern on the source/drain layer, and a plug on the metal silicide pattern. The plug includes a second metal pattern, a metal nitride pattern contacting an upper surface of the metal silicide pattern and covering a bottom and a sidewall of the second metal pattern, and a first metal pattern on the metal silicide pattern, the first metal pattern covering an outer sidewall of the metal nitride pattern. A nitrogen concentration of the first metal pattern gradually decreases according to a distance from the outer sidewall of the metal nitride pattern. |
| US10134851B2 |
Tunnel barrier schottky
A diode includes: a semiconductor substrate; a cathode metal layer contacting a bottom of the substrate; a semiconductor drift layer on the substrate; a graded aluminum gallium nitride (AlGaN) semiconductor barrier layer on the drift layer and having a larger bandgap than the drift layer, the barrier layer having a top surface and a bottom surface between the drift layer and the top surface, the barrier layer having an increasing aluminum composition from the bottom surface to the top surface; and an anode metal layer directly contacting the top surface of the barrier layer. |
| US10134849B2 |
Semiconductor device and manufacturing method thereof
The present disclosure relates to the technical field of semiconductor technologies and discloses a semiconductor device and a manufacturing method therefor. The method includes forming a growth substrate by providing a substrate structure containing a sacrificial substrate, a first dielectric layer on the sacrificial substrate, and a plurality of recesses formed through the first dielectric layer and into the sacrificial substrate, by forming a buffer layer covering exposes surfaces of the plurality of recesses, by selectively growing a graphene layer on the buffer layer, and by filling the plurality of recesses with a second dielectric layer. The method further includes attaching the growth substrate to a bonding substrate such that the second dielectric layer attaches to the bonding substrate; removing the sacrificial substrate; and removing the buffer layer so as to expose the graphene layer. The method of present disclosure avoids adverse effects from patterning graphene by using selective growth of graphene on a patterned buffer layer. |
| US10134842B2 |
Heterojunction bipolar transistor
A high-performance HBT that is unlikely to decrease the process controllability and to increase the manufacturing cost is implemented. A heterojunction bipolar transistor includes an emitter layer, a base layer, and a collector layer on a GaAs substrate. The emitter layer is formed of InGaP. The base layer is formed of GaAsPBi having a composition that substantially lattice-matches GaAs. |
| US10134840B2 |
Series resistance reduction in vertically stacked silicon nanowire transistors
Embodiments are directed to a method of fabricating a portion of a nanowire field effect transistor (FET). The method includes forming a sacrificial layer and a nanowire layer, removing a sidewall portion of the sacrificial layer and forming a diffusion block in a space that was occupied by the removed sidewall portion of the sacrificial layer. The method further includes forming a source region and a drain region such that the diffusion block is between the sacrificial layer and at least one of the source region and the drain region, and removing the sacrificial layer using a sacrificial layer removal process, wherein the diffusion block prevents the sacrificial layer removal process from also removing portions of at least one of the source region and the drain region. |
| US10134838B2 |
Semiconductor device
A semiconductor device includes a substrate that includes active patterns extending in a second direction, a third device isolation layer disposed on an upper portion of the substrate that includes a PMOSFET region and an NMOSFET region, and a gate electrode that extends across the active patterns in a first direction that crosses the second direction. The active patterns extend across the PMOSFET region and the NMOSFET region. The third device isolation layer lies between the PMOSFET region and the NMOSFET region. The third device isolation layer comprises a first part that extends in the second direction and a second part that extends in a third direction that crosses the first and second directions. The second part has opposite sidewalls parallel to the third direction, in a plan view. |
| US10134833B2 |
Multiple work function device using GeOx/TiN cap on work function setting metal
A method is presented for tuning work functions of transistors. The method includes forming a work function stack over a semiconductor substrate, depositing a germanium oxide layer and a barrier layer over the work function stack, and annealing the germanium oxide layer to desorb oxygen therefrom to trigger oxidation of at least one conducting layer of the work function stack. The work function stack includes three layers, that is, a first layer being a TiN layer, a second layer being a titanium aluminum carbon (TiAlC) layer, and a third layer being a second TiN layer. |
| US10134831B2 |
Deformable and flexible capacitor
A method for forming a capacitive device comprises forming a first dielectric layer on a substrate. Portions of the first dielectric layer are removed to for form a cavity in the first dielectric layer. A first layer of conductive material is deposited on the first dielectric layer and conformally along sidewalls of the cavity. The method further includes depositing a second dielectric layer on the first layer of conductive material, and depositing a second layer of conductive material on the second dielectric layer to form a capacitive device. |
| US10134829B2 |
Display device
A display device includes a non-display area adjacent a display area, a thin film transistor, a display element, a thin film encapsulation layer, an organic insulating layer, a power voltage line, and a protective layer. The thin film transistor is on the display area and is connected to the display element. The thin film encapsulation layer covers the display element. The organic insulating layer is between the thin film transistor and display element and extends to the non-display area. The organic insulating layer includes a central portion corresponding to the display area, an outer portion surrounding the central portion, and a division region dividing the central portion and the outer portion and surrounding the display area. The power voltage line is in the non-display area and includes a portion corresponding to the division region. The protective layer covers an upper surface of the power voltage line in the division region. |
| US10134827B2 |
Display apparatus having reduced defects
Provided is a display apparatus capable of reducing generation of defects during manufacturing of the display apparatus or while in use after being manufactured. The display apparatus includes a substrate including a bending area between a first area and a second area, the substrate being bent in the bending area about a bending axis; an inorganic insulating layer over the substrate and including a first feature that is either a first opening or a first groove, the first feature positioned to correspond to the bending area; and an organic material layer at least partially filling the first feature, and including a second feature that is a second opening or a second groove, the second feature extending along an edge of the substrate. |
| US10134826B2 |
Display apparatus including detour lines
A display apparatus includes a substrate including a display area, a peripheral area surrounding the display area, a function-adding area, of which at least a portion is surrounded by the display area, and a detour area disposed between the display area and the function-adding area. The display apparatus includes a plurality of pixel circuits disposed in the display area. A plurality of driving lines are electrically connected to the pixel circuits and extend in a direction in the display area. A first detour line is disposed in the detour area and is electrically connected to a first driving line. A second detour line is disposed in the detour area. The second detour line is electrically connected to a second driving line and is disposed in a different layer from the first detour line. |
| US10134825B2 |
Organic light emitting diode display
A display device including a substrate comprising a free form active area having pixels defined by scan lines, data lines, and power supply lines, and a bezel area located outside the active area and having power supply routing lines to which a power supply voltage is applied and scan routing lines to which scan pulses are applied; and link lines that are disposed in the bezel area, and that connect the power supply routing lines to the power supply lines and transmit the power supply voltage from the power supply routing lines to the power supply lines, the link lines comprising: a plurality of first link lines; and one or more second link lines that interconnect the first link lines, each of the first link lines comprising one end connected to the power supply routing lines and the other end connected to the power supply lines. |
| US10134824B2 |
Organic light-emitting pixel including four sub-pixels having adjusted microcavity distances
The present disclosure provides an organic light-emitting pixel with four subpixels formed in two groups, each group having two adjacent subpixels. The organic light-emitting pixel includes a first electrode layer formed on a substrate, including a plurality of first electrodes, each first electrode corresponding to one of the subpixels; a second electrode layer; and a first functional layer corresponding to three of the four subpixels. The first function layer is configured to adjust a distance between a first electrode and the second electrode layer. The organic light-emitting pixel also includes a light-emitting layer including a first portion and a second portion, the first portion corresponding to one of the two groups of subpixels and the second portion corresponding to another one of the two groups of subpixels, respectively. |
| US10134821B2 |
TFT substrate, organic light-emitting diode (OLED) display including the same, method of manufacturing TFT substrate, and method of manufacturing OLED display
A thin film transistor (TFT) substrate having reduced differences in heights in areas thereof so as to facilitate subsequent processing is disclosed. In one aspect, the TFT substrate includes a substrate having a first area in which a TFT is not disposed and a second area in which a TFT is disposed, a height adjustment layer disposed on the substrate in an area corresponding to at least a part of the first area. The TFT substrate also includes a TFT disposed on the substrate in an area corresponding to the second area. |
| US10134818B2 |
Shift register circuit, display panel, and electronic apparatus
Disclosed herein is a shift register circuit that is formed on an insulating substrate with thin film transistors having channels of the same conductivity type and includes shift stages, each of the shift stages including: a first thin film transistor; a second thin film transistor; a 3(1)-th thin film transistor; a 3(2)-th thin film transistor; a 4(1)-th thin film transistor; a 4(2)-th thin film transistor; a fifth thin film transistor; and a sixth thin film transistor. |
| US10134817B2 |
OLED display panel, display device and display system
An OLED display panel, a display device, and a display system. The OLED display panel comprises a base plate, first OLED display elements arranged in an array on a side of the base plate, and a first photochromic layer arranged on a side of the first OLED display elements. The first photochromic layer comprises first stripe shaped photochromic bodies and first stripe shaped openings arranged periodically and alternately, and is switchable between a transparent state and an opaque state. When the first photochromic layer stays in the opaque state, the first photochromic layer enables the OLED display panel to realize 3D display on the side where the first photochromic layer is arranged. 2D and 3D display modes are realized on a side of the display panel, which improves user experience and has a low cost. |
| US10134815B2 |
Method and apparatus for detecting infrared radiation with gain
Photodetectors, methods of fabricating the same, and methods using the same to detect radiation are described. A photodetector can include a first electrode, a light sensitizing layer, an electron blocking/tunneling layer, and a second electrode. Infrared-to-visible upconversion devices, methods of fabricating the same, and methods using the same to detect radiation are also described. An Infrared-to-visible upconversion device can include a photodetector and an OLED coupled to the photodetector. |
| US10134811B2 |
Image sensors having light guide members
Image sensors include a color photo-sensing photoelectric conversion device, a first color filter and a second color filter disposed under the color photo-sensing photoelectric conversion device, a first photodiode and a second photodiode disposed under the first color filter and the second color filter, respectively, a first light guide member disposed between the first color filter and the first photodiode, and a second light guide member disposed between the second color filter and the second photodiode. |
| US10134808B2 |
Magnetic tunnel junction (MTJ) devices with heterogeneous free layer structure, particularly suited for spin-torque-transfer (STT) magnetic random access memory (MRAM) (STT MRAM)
Magnetic tunnel junction (MTJ) devices with a heterogeneous free layer structure particularly suited for efficient spin-torque-transfer (STT) magnetic random access memory (MRAM) (STT MRAM) are disclosed. In one aspect, a MTJ structure with a reduced thickness first pinned layer section provided below a first tunnel magneto-resistance (TMR) barrier layer is provided. The first pinned layer section includes one pinned layer magnetized in one magnetic orientation. In another aspect, a second pinned layer section and a second TMR barrier layer are provided above a free layer section and above the first TMR barrier layer in the MTJ. The second pinned layer is magnetized in a magnetic orientation that is anti-parallel (AP) to that of the first pinned layer section. In yet another aspect, the free layer comprises first and second heterogeneous layers separated by an anti-ferromagnetic coupling spacer, the first and second heterogeneous layers differing in their magnetic anisotropy. |
| US10134806B2 |
Semiconductor light emitting device
A semiconductor light emitting device includes first and second light emitting bodies, a first electrode, a second electrode and a first interconnection. The first and second light emitting bodies are disposed on a conductive substrate, and each includes first and second semiconductor layers and a light emitting layer therebetween. The first electrode is provided between the first light emitting body and the conductive substrate, and electrically connected to a first semiconductor layer and the conductive substrate. The second electrode is provided between the second light emitting body and the conductive substrate, and electrically connected to a first semiconductor layer. The first interconnection electrically connects the second semiconductor layer of the first light emitting body and the second electrode. The first interconnection includes a first portion extending over the first and second light emitting bodies and a second portion extending into the second light emitting body. |
| US10134805B2 |
Light emitting structure and mount
In a method according to embodiments of the invention, a light emitting structure comprising a plurality of light emitting diodes (LEDs) is provided. Each LED includes a p-contact and n-contact. A first mount and a second mount are provided. Each mount includes anode pads and cathode pads. The anode pads are aligned with the p-contacts and the cathode pads are aligned with the n-contacts. The method further includes mounting the light emitting structure on one of the first and second mounts. An electrical connection on the first mount between the plurality of LEDs differs from an electrical connection on the second mount between the plurality of LEDs. The first mount is operated at a different voltage than the second mount. |
| US10134804B2 |
Method of forming a light-emitting device
A method of forming a light-emitting device. The light-emitting device includes a first optoelectronic unit, a second optoelectronic unit, a fence, and a cover. The first optoelectronic unit has a first side surface. The second optoelectronic unit is apart from the first optoelectronic unit and has a second side surface. The fence surrounds the first side surface and the second side surface. The cover is on the first optoelectronic unit and the fence. |
| US10134803B2 |
Micro device integration into system substrate
Post-processing steps for integrating of micro devices into system (receiver) substrate or improving the performance of the micro devices after transfer. Post processing steps for additional structures such as reflective layers, fillers, black matrix or other layers may be used to improve the out coupling or confining of the generated LED light. Dielectric and metallic layers may be used to integrate an electro-optical thin film device into the system substrate with transferred micro devices. Color conversion layers may be integrated into the system substrate to create different outputs from the micro devices. |
| US10134802B2 |
Nanophosphors-converted quantum photonic imagers and methods for making the same
An emissive Solid State Imager (SSI) comprised of a spatial array of digitally addressable multicolor micro pixels. Each pixel is a micro optical cavity comprising multiple photonic layers of blue-violet semiconductor light emitting diode. One of the photonic layers is used to generate light at the blue primary of the SSI. Two of the photonic layers are used to generate violet-blue excitation light which is converted with associated nanophosphors layer into the green and the red primaries of the SSI. The light generated is emitted perpendicular to the plane of the imager device via a plurality of vertical optical waveguides that extract and collimate the light generated. Each pixel diode is individually addressable to enable the pixel to simultaneously emit any combination of the colors associated with its multicolor nanophosphors converted semiconductor light emitting diode at any required on/off duty cycle for each color. |
| US10134797B2 |
Solid-state image sensor, imaging device, and electronic equipment
The present technology relates to a solid-state image sensor, an imaging device, and electronic equipment configured such that an FD is shared by a plurality of pixels to further miniaturize the pixels at low cost without lowering of sensitivity and a conversion efficiency. In a configuration in which a plurality of pixels are arranged with respect to at least either of one of the OCCFs or one of the OCLs, a floating diffusion (FD) is shared by a sharing unit including a plurality of pixels, the plurality of pixels including pixels of at least either of different OCCFs or different OCLs. The present technology is applicable to a CMOS image sensor. |
| US10134796B2 |
Semiconductor device and manufacturing method thereof
An improvement is achieved in the performance of a semiconductor device. A semiconductor device includes an n−-type semiconductor region formed in a p-type well, an n-type semiconductor region formed closer to a main surface of a semiconductor substrate than the n−-type semiconductor region, and a p−-type semiconductor region formed between the n−-type semiconductor region and the n-type semiconductor region. A net impurity concentration in the n−-type semiconductor region is lower than a net impurity concentration in the n-type semiconductor region. A net impurity concentration in the p−-type semiconductor region is lower than a net impurity concentration in the p-type well. |
| US10134794B2 |
Image sensor chip sidewall interconnection
An image sensor chip having a sidewall interconnect structure to bond and/or electrically couple the image sensor chip to a package substrate is provided. The image sensor chip includes a substrate supporting an integrated circuit (IC) configured to sense incident light. The sidewall interconnect structure is arranged along a sidewall of the substrate and electrically coupled with the IC. A method for manufacturing the image sensor chip and an image sensor package including the image sensor chip are also provided. |
| US10134793B1 |
Method of forming two-dimensional and three-dimensional semiconductor chip arrays
A sensor chip formed from a plurality of sensor chips fabricated on a wafer, the wafer including a top surface, a bottom surface opposite the top surface and a thickness between the top and bottom surfaces, the sensor chip including an active area formed on the top surface, a first sacrificial edge including a first fiducial and a second fiducial, and a first score line formed in a first portion of the thickness on the top surface between the first sacrificial edge and the active area. |
| US10134791B1 |
Backside illumination global shutter sensor and pixel thereof
A backside illumination global shutter pixel is disposed in a substrate having a first surface and a second surface and includes an isolation structure having a deep trench isolation pattern, a storage node, and a photoelectric conversion element. The deep trench isolation pattern has a channel and defines a first region and a second region connected with each other by the channel. The storage node is disposed in the second region. The photoelectric conversion element has a main photoelectric conversion portion disposed in the first region and an extending photoelectric conversion portion extended from the main photoelectric conversion portion through the channel to the second region. The extending photoelectric conversion portion is disposed between the second surface and the storage node. A backside illumination global shutter sensor including a plurality of backside illumination global shutter pixels is also provided. |
| US10134789B2 |
Imaging device and electronic device
An imaging device with high productivity and improved dynamic range is provided. The imaging device includes a pixel driver circuit and a photoelectric conversion element including a p-type semiconductor, an n-type semiconductor, and an i-type semiconductor. In a plan view, the total area of a part of the i-type semiconductor overlapped with neither a metal material nor a semiconductor material constituting the pixel driver circuit is preferably greater than or equal to 65%, more preferably greater than or equal to 80%, and still more preferably greater than or equal to 90% of the area of the whole i-type semiconductor. Plural photoelectric conversion elements are provided in the same semiconductor, whereby a process for separating the photoelectric conversion elements can be omitted. The i-type semiconductors in the plural photoelectric conversion elements are separated from each other by the p-type semiconductor or the n-type semiconductor. |
| US10134787B2 |
Photographing apparatus for preventing light leakage and image sensor thereof
A photographing apparatus for preventing or reducing light leakage and an image sensor thereof are provided. The photographing apparatus includes an image sensor configured to include a plurality of pixels respectively having a Photo Diode and a Storage Diode for temporarily storing a charge accumulated in the Photo Diode and an image processor configured to perform an image processing operation by receiving the charge stored in the Storage Diode of each of the plurality of pixels. In addition, the image sensor has a structure where the Storage Diodes of the plurality of pixels are arrayed to be adjacent to each other. Accordingly, the photographing apparatus may prevent the light leakage from the adjacent pixel being flowed into a Storage Diode of each pixel. |
| US10134783B2 |
Blue phase liquid crystal display panel and method for manufacturing the same
A blue phase liquid crystal display panel and a method for manufacturing the same are disclosed. The blue phase liquid crystal display panel comprises a lower substrate and an upper substrate. A horizontal electric field between the two substrates can be strengthened while a vertical electric field between the two substrates can be weakened through arranging a pixel electrode and a common electrode on the upper substrate and the lower substrate as well as a first fringe electric field and a second fringe electric field generated therein respectively, so that a driving voltage of the blue phase liquid crystal can be reduced. |
| US10134780B2 |
Display device and manufacturing method thereof
According to one embodiment, a display device includes a first substrate including a first insulative substrate, an outer peripheral wiring formed above the first insulative substrate, an insulation film disposed on the outer peripheral wiring, a pixel electrode formed on the insulation film in an active area for displaying an image, and a first bank formed in a line shape on the insulation film in a peripheral area surrounding the active area, a second substrate including at least a second insulative substrate, and a sealant which is provided in a manner to envelop the first bank, and which attaches the first substrate and the second substrate. |
| US10134777B2 |
Thin film transistor substrate and display device including the same
Disclosed is a thin film transistor substrate capable of preventing a circuit from being damaged by static electricity, and a display device including the same, wherein the thin film transistor substrate includes a substrate having a display area for displaying an image, and a non-display area. The circuit is disposed in the non-display area. The circuit includes a first electrode, an insulating film on the first electrode, and a second electrode on the insulating film. An edge of the first electrode facing the display area extends beyond an edge of the second electrode facing the display area. |
| US10134770B2 |
Preparation method of conductive via hole structure, array substrate and display device
A preparation method of a conductive via hole structure, a preparation method of an array substrate and a preparation method of a display device, the preparation method of the array substrate includes: forming a first metal layer (01) including the first metal structure (01a), forming a non-metallic film including a first part corresponding to the first metal structure (01a) and an organic insulating film (40′) in sequence; patterning the organic insulating film (40′) to form a first organic insulating layer via hole (41) corresponding to the first part; then baking to form an organic insulating layer (40); and then, removing the first part of the non-metallic film to form a non-metallic layer and expose the part of the surface (011) of the first metal structure (01a). This method can avoid the metal structure from being seriously oxidized. |
| US10134766B2 |
Semiconductor device and method for manufacturing the same
The number of photolithography steps used for manufacturing a transistor is reduced to less than the conventional one and a highly reliable semiconductor device is provided. The present invention relates to a semiconductor device including a circuit including a transistor having an oxide semiconductor layer over a first substrate and a second substrate fixed to the first substrate with a sealant. A closed space surrounded by the sealant, the first substrate, and the second substrate is in a reduced pressure state or filled with dry air. The sealant surrounds at least the transistor and has a closed pattern shape. Further, the circuit is a driver circuit including a transistor having an oxide semiconductor layer. |
| US10134763B2 |
Gate top spacer for finFET
The capacitance between gate structures and source/drain contacts of FinFET devices is reduced by the incorporation of inner spacers in the top portions of the gate structures. A replacement metal gate process used in the fabrication of such devices includes formation of the inner spacers following partial removal of dummy gate material. The remaining dummy gate material is then removed and replaced with gate dielectric and metal gate material. |
| US10134759B2 |
Semiconductor device including groups of nanowires of different semiconductor materials and related methods
A method for making a semiconductor device may include forming, above a substrate, a plurality of fins, forming a first semiconductor material on sides of a first group of the fins, and forming a second semiconductor material on sides of a second group of the fins. The method may further include forming a dielectric layer overlying the plurality of fins to define first and second groups of nanowires within the dielectric layer, with the first group of nanowires including the first semiconductor material and the second group of nanowires including the second semiconductor material. |
| US10134757B2 |
Method of processing a substrate and a device manufactured by using the method
A method of processing a substrate by omitting a photolithographic process is disclosed. The method includes forming at least one layer on a stepped structure having an upper surface, a lower surface, and a side surface that connects the upper surface to the lower surface, selectively densifying portions of the at least one layer respectively on the upper surface and the lower surface via asymmetric plasma application, and performing an isotropic etching process on the at least one layer. During the isotropic etching process, the portion of the at least one layer formed on the upper surface is separated from the portion of the at least one layer formed on the lower surface. |
| US10134755B2 |
Semiconductor memory device
A semiconductor memory device includes a memory plane including a plurality of electrode layers stacked on a substrate and a semiconductor layer extending through the plurality of electrode layers in a stacking direction thereof, a circuit provided on the substrate around the memory plane, a first insulating layer including a first portion and a second portion between the substrate and a second insulating layer, and the second insulating layer covering the circuit. The first portion is provided along an outer edge of the memory plane, and the second portion is spaced from the first portion and is provided on the circuit side. The second insulating layer includes a part in contact with the substrate between the first portion and the second portion, and the second insulating layer blocks a diffusion of hydrogen radicals with a higher rate than the first insulating layer. |
| US10134751B2 |
Non-volatile semiconductor memory device and manufacturing method thereof
This non-volatile semiconductor memory device includes a memory cell array including NAND cell units formed in a first direction vertical to a surface of a semiconductor substrate. A local source line is electrically coupled to one end of the NAND cell unit formed on the surface of the substrate. The memory cell array includes: a laminated body where plural conductive films, which are to be control gate lines of memory cells or selection gate lines of selection transistors, are laminated sandwiching interlayer insulating films; a semiconductor layer that extends in the first direction; and an electric charge accumulating layer sandwiched between: the semiconductor layer and the conductive film. The local source line includes a silicide layer. The electric charge accumulating layer is continuously formed from the memory cell array to cover a peripheral area of the silicide layer. |
| US10134748B2 |
Cell boundary structure for embedded memory
Various embodiments of the present application are directed to a method for forming an embedded memory boundary structure with a boundary sidewall spacer. In some embodiments, an isolation structure is formed in a semiconductor substrate to separate a memory region from a logic region. A multilayer film is formed covering the semiconductor substrate. A memory structure is formed on the memory region from the multilayer film. An etch is performed into the multilayer film to remove the multilayer film from the logic region, such that the multilayer film at least partially defines a dummy sidewall on the isolation structure. A spacer layer is formed covering the memory structure, the isolation structure, and the logic region, and further lining the dummy sidewall. An etch is performed into the spacer layer to form a spacer on dummy sidewall from the spacer layer. A logic device structure is formed on the logic region. |
| US10134746B2 |
Self aligned active trench contact
An integrated circuit and method includes self-aligned contacts. A gapfill dielectric layer fills spaces between sidewalls of adjacent MOS gates. The gapfill dielectric layer is planarized down to tops of gate structures. A contact pattern is formed that exposes an area for multiple self-aligned contacts. The area overlaps adjacent instances of the gate structures. The gapfill dielectric layer is removed from the area. A contact metal layer is formed in the areas where the gapfill dielectric material has been removed. The contact metal abuts the sidewalls along the height of the sidewalls. The contact metal is planarized down to the tops of the gate structures, forming the self-aligned contacts. |
| US10134744B1 |
Semiconductor memory device
A semiconductor memory device includes a first inverter, a second inverter, a first and second inner access transistors, and a first and second outer access transistors. The first inverter includes a first pull-up transistor and a first pull-down transistor, the second inverter includes a second pull-up transistor (PL2) and a second pull-down transistor, and the first inverter and the second inverter forms a latch circuit. The first and second inner access transistors and the first and second outer access transistors are electrically connected to the latch circuit, and channel widths of the second inner access transistor and the second outer access transistor are different from each other. |
| US10134739B1 |
Memory array with buried bitlines below vertical field effect transistors of memory cells and a method of forming the memory array
Disclosed is a structure wherein lower source/drain regions of vertical field effect transistors (VFETs) of memory cells in a memory array are aligned above and electrically connected to buried bitlines. Each cell includes a VFET with a lower source/drain region, an upper source/drain region and at least one channel region extending vertically between the source/drain regions. The lower source/drain region is above and immediately adjacent to a buried bitline, which has the same or a narrower width than the lower source/drain region and which includes a pair of bitline sections and a semiconductor region positioned laterally between the sections. The semiconductor region is made of a different semiconductor material than the lower source/drain region. Also disclosed is a method that ensures that bitlines of a desired critical dimension can be achieved and that allows for size scaling of the memory array with minimal bitline coupling. |
| US10134737B2 |
Memory device with reduced-resistance interconnect
An interconnect structure includes a lower interconnect layer, an intermediate interconnect layer, and an upper interconnect layer. First and second conductive lines in the lower interconnect layer extend generally in a first direction over a memory array region, and additional lower conductive lines in the lower interconnect layer extend generally in the first direction over a peripheral region. A first plurality of conductive line segments in the intermediate interconnect layer extend generally in the first direction over the memory array region, and additional intermediate conductive line segments in the intermediate interconnect layer extend generally in a second, perpendicular direction over the peripheral region. A second plurality of conductive line segments in the upper interconnect layer extend generally in the first direction over the memory array region, and additional upper conductive line segments in the upper interconnect layer extend generally in the first direction over the peripheral region. |
| US10134734B2 |
Fin field effect transistor (FET) (FinFET) complementary metal oxide semiconductor (CMOS) circuits employing single and double diffusion breaks for increased performance
Fin Field Effect Transistor (FET) (FinFET) complementary metal oxide semiconductor (CMOS) circuits with single and double diffusion breaks for increased performance are disclosed. In one aspect, a FinFET CMOS circuit employing single and double diffusion breaks includes a P-type FinFET that includes a first Fin formed from a semiconductor substrate and corresponding to a P-type diffusion region. The FinFET CMOS circuit includes an N-type FinFET that includes a second Fin formed from the semiconductor substrate and corresponding to an N-type diffusion region. To electrically isolate the P-type FinFET, first and second single diffusion break (SDB) isolation structures are formed in the first Fin on either side of a gate of the P-type FinFET. To electrically isolate the N-type FinFET, first and second double diffusion break (DDB) isolation structures are formed in the second Fin on either side of a gate of the N-type FinFET. |
| US10134731B2 |
Dielectric liner added after contact etch before silicide formation
A method for forming MOS transistor includes providing a substrate including a semiconductor surface having a gate electrode on a gate dielectric thereon, dielectric spacers on sidewalls of the gate electrode, a source and drain in the semiconductor surface on opposing sides of the gate electrode, and a pre-metal dielectric (PMD) layer over the gate electrode and over the source and drain regions. Contact holes are formed through the PMD layer to form a contact to the gate electrode and contacts to the source and drain. A post contact etch dielectric layer is then deposited on the contacts to source and drain and on sidewalls of the PMD layer. The post contact etch dielectric layer is selectively removed from the contacts to leave a dielectric liner on sidewalls of the PMD layer. A metal silicide layer is formed on the contacts to the source and drain. |
| US10134717B2 |
Semiconductor package, semiconductor device and method of forming the same
According to an exemplary embodiment, a semiconductor package is provided. The semiconductor package includes at least one chip, and at least one component adjacent to the at least one chip, wherein the at least one chip and the at least one component are molded in a same molding body. |
| US10134715B2 |
Display apparatus and methods
A display includes a plurality of pixel chips, chixels, provided on a substrate. The chixels and the light emitters thereon may be shaped, sized and arranged to minimize chixel, pixel, and sub-pixel gaps and to provide a seamless look between adjacent display modules. The substrate may include light manipulators, such as filters, light converters and the like to manipulate the light emitted from light emitters of the chixels. The light manipulators may be arranged to minimize chixel gaps between adjacent chixels. |
| US10134714B2 |
Flexible circuit board for LED lighting fixtures
Techniques are disclosed for making a flexible laminated circuit board using a metal conductor onto which a SMD may be attached. Conductive metal strips may be laminated to form a flexible substrate and the metal strips may then be perforated for the placement of LED package leads. The LED packages may be attached to the conductive strips using solder or a conductive epoxy and the upper laminate layer may include perforations exposing portions of the metal strips for the attachment of the LED packages. Alternatively, strings of LED packages may be fabricated by attaching LED packages to conductive strips and these strings may be laminated between flexible sheets to form a laminated LED circuit. Plastic housings may aid in attaching the LED packages to the conductive strips. The plastic housings and/or the laminate sheets may be made of a reflective material. |
| US10134709B1 |
Substrateless light emitting diode (LED) package for size shrinking and increased resolution of display device
A light emitting diode package including a circuit layer, a light-shielding layer, a plurality of light emitting diodes and an encapsulation layer is provided. A thickness of the circuit layer is less than 100 μm. The light-shielding layer is disposed on a first surface of the circuit layer and the light-shielding layer has a plurality of apertures. The light emitting diodes are disposed on the first surface of the circuit layer and in the apertures of the light-shielding layer. The light emitting diodes are electrically connected to the circuit layer. The encapsulation layer covers the light-shielding layer. A refractive index of the encapsulation layer is 1.4 and to 1.7. The Young's modulus of the encapsulation layer is larger than or equal to 1 GPa. A thickness of the encapsulation layer is greater than thicknesses of the light emitting diodes. |
| US10134708B2 |
Package with thinned substrate
A package includes a substrate, an Under-Bump Metallurgy (UBM) penetrating through the substrate, a solder region over and contacting the UBM, and an interconnect structure underlying the substrate. The interconnect structure is electrically coupled to the solder region through the UBM. A device die is underlying and bonded to the interconnect structure. The device die is electrically coupled to the solder region through the UBM and the interconnect structure. An encapsulating material encapsulates the device die therein. |
| US10134706B2 |
Warpage control of semiconductor die package
Various embodiments of mechanisms for forming a die package using a compressive dielectric layer to contact and to surround through substrate vias (TSVs) in the die package are provided. The compressive dielectric layer reduces or eliminates bowing of the die package. As a result, the risk of broken redistribution layer (RDL) due to bowing is reduced or eliminated. In addition, the compressive dielectric layer, which is formed between the conductive TSV columns and surrounding molding compound, improves the adhesion between the conductive TSV columns and the molding compound. Consequently, the reliability of the die package is improved. |
| US10134705B2 |
Method of manufacturing semiconductor device
As one embodiment, a method of manufacturing a semiconductor device includes the following steps. That is, the method of manufacturing a semiconductor device includes a first step of applying ultrasonic waves to a ball portion of a first wire in contact with a first electrode of the semiconductor chip while pressing the ball portion with a first load. In addition, the method of manufacturing a semiconductor device includes a step of, after the first step, applying the ultrasonic waves to the ball portion while pressing the ball portion with a second load larger than the first load, thereby bonding the ball portion and the first electrode. |
| US10134699B2 |
Packages with solder ball revealed through layer
An integrated circuit structure includes a substrate, a PPI over the substrate, a solder region over and electrically coupled to a portion of the PPI, and a molding compound molding a lower portion of the solder region therein. A top surface of the molding compound is level with or lower than a maximum-diameter plane, wherein the maximum-diameter plane is parallel to a major surface of the substrate, and the maximum-diameter of the solder region is in the maximum-diameter plane. |
| US10134692B2 |
Body-mountable device with a common substrate for electronics and battery
An example device includes a silicon substrate having a first substrate surface and a second substrate surface; a plurality of layers associated with one or more electronic components of an integrated circuit (IC), where the plurality of layers are deposited on the second substrate surface; a lithium-based battery having a plurality of battery layers deposited on the first substrate surface of the silicon substrate, where the lithium-based battery includes an anode current collector and a cathode current collector; a first through-silicon via (TSV) passing through the silicon substrate and providing an electrical connection between the anode current collector and the plurality of layers associated with the one or more electronic components of the IC; and a second TSV passing through the silicon substrate and providing an electrical connection between the cathode current collector and the plurality of layers associated with the one or more electronic components of the IC. |
| US10134691B2 |
Apparatus and method for generating identification key
An apparatus for generating an identification key is provided. The apparatus may include a first conductive layer formed on a semiconductor chip, a second conductive layer formed on the semiconductor chip, wherein a spacing between the first conductive layer and the second conductive layer is equal to or greater than a first threshold and equal to or less than a second threshold, and a reader configured to determine whether a first node associated with the first conductive layer and a second node associated with the second conductive layer are shorted, and to provide an identification key. |
| US10134687B1 |
Semiconductor device and method of manufacturing a semiconductor device
An exemplary semiconductor device can comprise a die, a redistribution structure (RDS), an interconnect, a conductive strap, an encapsulant, and an EMI shield. The redistribution structure can comprise an RDS top surface coupled to the die bottom side. The interconnect can be coupled to the RDS bottom surface. The conductive strap can be coupled to the RDS, and can comprise a strap inner end coupled to the RDS bottom surface, and a strap outer end located lower than the RDS bottom surface. The encapsulant can encapsulate the conductive strap and the RDS bottom surface. The EMI shield can cover and contact the encapsulant sidewall and the strap outer end. Other examples and related methods are also disclosed herein. |
| US10134685B1 |
Integrated circuit package and method of fabricating the same
An integrated circuit package including at least one integrated circuit component, at least one electromagnetic interference shielding layer and an insulating encapsulation is provided. The at least one integrated circuit component includes an active surface, a plurality of sidewalls connected to the active surface and a plurality of conductive pillars protruding from the active surface. The at least one electromagnetic interference shielding layer covers the sidewalls of the at least one integrated circuit component, and the at least one electromagnetic interference shielding layer is electrically grounded. The insulating encapsulation encapsulates the at least one integrated circuit component and the at least one electromagnetic interference shielding layer, and the conductive pillars of the at least one integrated circuit component are accessibly exposed by the insulating encapsulation. Methods of fabricating the integrated circuit package are also provided. |
| US10134683B2 |
Semiconductor device package and method of manufacturing the same
A semiconductor device package includes a first circuit layer having a first surface and a second surface opposite the first side, a first electronic component, a shielding element, a shielding layer and a molding layer. The first electronic component is disposed over the first surface of the first circuit layer, and electrically connected to the first circuit layer. The shielding element is disposed over the first surface of the first circuit layer, and is electrically connected to the first circuit layer. The shielding element is disposed adjacent to at least one side of the first electronic component. The shielding layer is disposed over the first electronic component and the shielding element, and the shielding layer is electrically connected to the shielding element. The molding layer encapsulates the first electronic component, the shielding element and a portion of the shielding layer. |
| US10134682B2 |
Circuit package with segmented external shield to provide internal shielding between electronic components
A module includes a circuit package having multiple electronic components on a substrate, a molded compound disposed over the substrate and the electronic components, and an external shield disposed on at least one outer surface of the circuit package. The external shield is segmented into multiple external shield partitions that are grounded, respectively. Adjacent external shield partitions of the multiple external shield partitions are separated by a corresponding gap located between adjacent electronic components of the multiple electronic components. The external shield is configured to protect the circuit package from external electromagnetic radiation and environmental stress. Each corresponding gap separating the adjacent external shield partitions is configured to provide internal shielding of at least one of the electronic components, between which the corresponding gap is located, from internal electromagnetic radiation generated by the other of the adjacent electronic components. |
| US10134677B1 |
Semiconductor package device and method of manufacturing the same
A semiconductor package device includes a first interconnection structure, a non-silicon interposer and a first die. The first interconnection structure has a first pitch. The non-silicon interposer surrounds the first interconnection structure. The non-silicon interposer includes a second interconnection structure having a second pitch. The second pitch is larger than the first pitch. The first die is above the first interconnection structure and is electrically connected to the first interconnection structure. |
| US10134676B2 |
Flexible device having flexible interconnect layer using two-dimensional materials
A flexible device includes an electronic device having an electrode and a flexible interconnect layer formed on the electrode. The flexible interconnect layer includes a two-dimensional (2D) material and a conductive polymer to have high electric conductivity and flexibility. The flexible device includes a flexible interconnect layer of one or more layers, and in this case, includes a low-dielectric constant dielectric layer between the respective layers. |
| US10134675B2 |
Cobalt top layer advanced metallization for interconnects
An advanced metal conductor structure is described. An integrated circuit device including a substrate having a patterned dielectric layer. The pattern includes a set of features in the dielectric for a set of metal conductor structures. An adhesion promoting layer is disposed over the set of features in the patterned dielectric. A metal layer fills a first portion of the set of features and is disposed over the adhesion promoting layer. A ruthenium layer is disposed over the metal layer. A cobalt layer is disposed over the ruthenium layer fills a second portion of the set of features. The cobalt layer is formed using a physical vapor deposition process. |
| US10134672B2 |
Semiconductor memory device having a stepped structure and contact wirings formed thereon
A semiconductor storage device includes a substrate, a stack of first insulating layers and conductive layers that are alternately formed on the substrate in a memory region and a peripheral region and electrically insulated from each other, a second insulating layer covering the stack of the first insulating layers and the conductive layers in the peripheral region, and a plurality of contact wirings formed in the peripheral region, each contact wiring extending from an upper surface of the second insulating layer towards the substrate and electrically connected to a corresponding one of the conductive layers. In the peripheral region, each conductive layer has an extended portion that covers side and upper surfaces of an end portion of a first insulating layer that is formed immediately thereabove, and each contact wiring is in direct contact with the extended portion of the corresponding conductive layer. |
| US10134669B2 |
Method for forming fin field effect transistor (FinFET) device structure with interconnect structure
A semiconductor device structure includes a first metal layer formed over a substrate and an interconnect structure formed over the first metal layer. The interconnect structure includes an upper portion, a middle portion and a lower portion, the middle portion is connected between the upper portion and the lower portion. The upper portion and the lower portion each have a constant width, and the middle portion has a tapered width which is gradually tapered from the upper portion to the lower portion. |
| US10134665B2 |
Semiconductor device
A BGA 9 includes a wiring substrate 2, a semiconductor chip 1 fixed on the wiring substrate 2, a sealing body 4 that seals the semiconductor chip 1, and a plurality of solder balls 5 provided on a lower surface of the wiring substrate 2. A degree of flatness of an upper surface 2ia of a first wiring layer 2i of the wiring substrate 2 of the BGA 9 is lower than a degree of flatness of a lower surface 2ib, and a first pattern 2jc provided in a second wiring layer 2j is arranged at a position overlapping a first pattern 2ic provided in the first wiring layer 2i. Also, an area of the first pattern 2ic provided in the first wiring layer 2i is larger than an area of a plurality of (for example, two) second patterns 2jd provided in the second wiring layer 2j in a plan view, and a first opening portion 2jm through which a part of a second insulating layer 2h is exposed is formed in the first pattern 2jc provided in the second wiring layer 2j. |
| US10134662B2 |
Mounting substrate and method of manufacturing the same
A method of manufacturing a mounting substrate according to an embodiment of the present technology includes the following three steps: (1) a step of forming a plurality of electrodes on a semiconductor layer, and thereafter forming one of solder bumps at a position facing each of the electrodes; (2) a step of covering the solder bumps with a coating layer, and thereafter selectively etching the semiconductor layer with use of the coating layer as a mask to separate the semiconductor layer into a plurality of elements; and (3) a step of removing the coating layer, and thereafter mounting the elements on a wiring substrate to direct the solder bumps toward the wiring substrate, thereby forming the mounting substrate. |
| US10134659B2 |
Semiconductor device with overlapped lead terminals
The size and thickness of a semiconductor device are reduced. A semiconductor package with a flip chip bonding structure includes: a semiconductor chip having a main surface with multiple electrode pads formed therein and a back surface located on the opposite side thereto; four lead terminals each having an upper surface with the semiconductor chip placed thereover and a lower surface located on the opposite side thereto; and a sealing body having a main surface and a back surface located on the opposite side thereto. In this semiconductor package, the distance between adjacent first lower surfaces of the four lead terminals exposed in the back surface of the sealing body is made longer than the distance between adjacent upper surfaces thereof. This makes it possible to suppress the production of a solder bridge when the semiconductor package is solder mounted to a mounting board and to reduce the size and thickness of the semiconductor package and further enhance the reliability of the semiconductor package. |
| US10134658B2 |
High power transistors
High power transistors, such as high power gallium nitride (GaN) transistors, are described. These high power transistors have larger total gate widths than conventional high power transistors by arranging multiple linear arrays of gate, drain, and source contacts in parallel. Thereby, the total gate width and the power rating of the high power transistor may be increased without elongating the die of the high power transistor. Accordingly, the die of the high power transistor may be mounted in a smaller circuit package relative to conventional dies with the same power rating. |
| US10134654B2 |
Double-encapsulated power semiconductor module and method for producing the same
One aspect relates to a power semiconductor module. The module includes a module housing, a substrate, and a semiconductor chip attached to the substrate. The semiconductor chip is disposed in the module housing. A dielectric first encapsulation is disposed in the module housing, in physical contact with both the semiconductor chip and the substrate and has a first modulus of elasticity. A dielectric second encapsulation is disposed in the module housing and has a second modulus of elasticity. The first encapsulation is a polymer and disposed between the substrate and the second encapsulation. The semiconductor chip is disposed between the first encapsulation and the substrate. Further, the first modulus of elasticity is greater than the second modulus of elasticity. |
| US10134650B2 |
Apparatus and method for cutting a wafer that is substantially covered by an opaque material
A wafer cutting apparatus comprises a wafer positioning device for holding a wafer that is substantially covered with an opaque material such as molding compound and that has an exposed peripheral area, and for displacing the wafer relative to a wafer inspection system comprising a camera having a field of view. To perform visual data acquisition of said dicing street portions, the wafer is displaced such that a center of the camera's field of view follows a path along the exposed peripheral area of the wafer. A processing unit analyzes the visual data acquired for detecting or calculating locations and directions of the dicing streets. A wafer cutting tool cuts the wafer along straight lines between the dicing street portions which have been detected or calculated by the processing unit. |
| US10134648B2 |
Manufacturing method of semiconductor device
Provided is a semiconductor device having a pad on a semiconductor chip, a first passivation film formed over the semiconductor chip and having an opening portion on the pad of a probe region and a coupling region, a second passivation film formed over the pad and the first passivation film and having an opening portion on the pad of the coupling region, and a rewiring layer formed over the coupling region and the second passivation film and electrically coupled to the pad. The pad of the probe region placed on the periphery side of the semiconductor chip relative to the coupling region has a probe mark and the rewiring layer extends from the coupling region to the center side of the semiconductor chip. The present invention provides a technology capable of achieving size reduction, particularly pitch narrowing, of a semiconductor device. |
| US10134638B2 |
FETS and methods of forming FETS
An embodiment is a structure. The structure comprises a fin on a substrate, isolation regions on the substrate, a dielectric region, and a gate structure. The fin includes a first epitaxial portion. The isolation regions are on opposing sides of the fin, and at least the first epitaxial portion of the fin protrudes from between the isolation regions. The dielectric region directly underlies the first epitaxial portion. A material of the dielectric region is different from a material of the isolation regions. The gate structure is along sidewalls and is over an upper surface of the fin. The gate structure defines a channel region in the first epitaxial portion. |
| US10134635B1 |
Stress relieving through-silicon vias
Methods and systems for stress relieving through-silicon vias are disclosed and may include forming a semiconductor device comprising a stress relieving stepped through-silicon-via (TSV), said stress relieving stepped TSV being formed by: forming first mask layers on a top surface and a bottom surface of a silicon layer, forming a via hole through the silicon layer at exposed regions defined by the first mask layers, and removing the first mask layers. The formed via hole may be filled with metal, second mask layers may be formed covering top and bottom surfaces of the silicon layer and a portion of top and bottom surfaces of the metal filling the formed via hole, and metal may be removed from the top and bottom surfaces of the metal exposed by the second mask layers to a depth of less than half a thickness of the silicon layer. |
| US10134634B2 |
Metal-assisted chemical etching of a semiconductive substrate with high aspect ratio, high geometic uniformity, and controlled 3D profiles
An embodiment of a method for metal-assisted chemical etching of a semiconductive substrate comprises forming a patterned coating on a top surface of a substrate layer of a silicon wafer; applying a noble metal layer over the patterned coating such that a portion of the noble metal layer is in contact with the top surface of the substrate layer; and immersing the silicon wafer in a wet etching solution to form a trench under the portion of the noble metal layer that is contact with the top surface of the substrate layer. Further, the trench may be filled with copper material to form a through silicon via structure. Such embodiments provide etching techniques that enable etched formations that are deep (e.g., high-aspect-ratio) and uniform as opposed to shallow etchings (i.e., low-aspect-ratio) or non-uniform deep etchings. |
| US10134630B2 |
Metal-graphene heterojunction metal interconnects, method of forming the same, and semiconductor device including the same
Disclosed herein are a metal-graphene heterojunction metal interconnect, a method of forming the same, and a semiconductor device including the same. The method includes: a) forming a carbon source layer by depositing a carbon source on a top surface of a substrate; b) forming a metal catalyst layer by depositing a metal catalyst on the carbon source layer; and c) carrying out heat treatment on the substrate comprising the carbon source layer and the metal catalyst layer. The graphene can be formed by carrying out the heat treatment only once irrespectively of the number of substrates, and accordingly to the manufacturing time and manufacturing cost of the metal interconnect are reduced, and a damage to the metal interconnect by the heat treatment is not caused. |
| US10134629B1 |
Method for manufacturing a semiconductor structure
A method for manufacturing a semiconductor structure includes the following steps. At first, a titanium layer is formed on a preformed layer. Then, a first titanium nitride layer is formed on the titanium layer. A first plasma treatment is applied to the first titanium nitride layer such that the first titanium nitride layer has a first N/Ti ratio. A second titanium nitride layer is formed on the first titanium nitride layer. A second plasma treatment is applied to the second titanium nitride layer such that the second titanium nitride layer has a second N/Ti ratio larger than the first N/Ti ratio. |
| US10134628B2 |
Multilayer structure including diffusion barrier layer and device including the multilayer structure
A multilayer structure includes a first material layer, a second material layer, and a diffusion barrier layer. The second material layer is connected to the first material layer. The second material layer is spaced apart from the first material layer. The diffusion barrier layer is between the first material layer and the second material layer. The diffusion barrier layer may include a two-dimensional (2D) material. The 2D material may be a non-graphene-based material, such as a metal chalcogenide-based material having a 2D crystal structure. The first material layer may be a semiconductor or an insulator, and the second material layer may be a conductor. At least a part of the multilayer structure may constitute an interconnection for an electronic device. |
| US10134626B2 |
Mechanisms for forming FinFETs with different fin heights
A semiconductor device is provided. The semiconductor device includes a doped isolation structure formed above a substrate, and the doped isolation structure includes a first doped portion and a second doped portion, and a doped concentration of the second doped portion is different from a doped concentration of the first doped portion. The semiconductor device also includes a first fin partially embedded in the doped isolation structure, and a sidewall surface of the first fin is in direct contact with the first doped portion. The semiconductor device includes a second fin partially embedded in the doped isolation structure, and the doped isolation structure is between the first fin and the second fin, and a sidewall surface of the second fin is in direct contact with the second doped portion. |
| US10134622B2 |
Apparatus and method for ascertaining orientation errors
A device for determining alignment errors of structures which are present on, or which have been applied to a substrate, comprising a substrate holder for accommodating the substrate with the structures and detection means for detecting X-Y positions of first markings on the substrate and/or second markings on the structures by moving the substrate or the detection means in a first coordinate system, wherein in a second coordinate system which is independent of the first coordinate system X′-Y′ structure positions for the structures are given whose respective distance from the X-Y positions of the first markings and/or second markings can be determined by the device. |
| US10134619B2 |
Connecting mechanism and connecting method of substrate container
A connecting mechanism includes a mounting unit, a substrate transfer port, a door closing or opening the substrate transfer port, a coupling mechanism coupling a cover of the substrate container mounted on the mounting unit with the door, and a gas exhaust/purge unit. First, second and third seal members respectively seal a first space between a peripheral portion of the substrate transfer port and the door, a second space between the door and the cover of the substrate container, and a space between the peripheral portion of the substrate transfer port and the main body. The gas exhaust unit exhausts the first space and a second space. The purge gas, which has been supplied into the substrate container by the gas exhaust/purge unit, is supplied into the first and the second space by allowing the gas exhaust unit to exhaust the first and the second space. |
| US10134610B2 |
Substrate processing method for drying a substrate by discharging gas to liquid layer on the substrate while rotating the substrate
After a development liquid on a substrate is washed away with a rinse liquid, the rotational speed of the substrate is reduced, so that a liquid layer of the rinse liquid is formed over a top surface of the substrate. Thereafter, the rotational speed of the substrate is increased. The increase in the rotational speed of the substrate causes a centrifugal force to be slightly greater than tension, thereby causing the liquid layer to be held on the substrate with the thickness thereof in its peripheral portion increased and the thickness thereof at the center thereof decreased. Then, gas is discharged toward the center of the liquid layer from a gas supply nozzle, so that a hole is formed at the center of the liquid layer. This causes tension that is balanced with a centrifugal force exerted on the peripheral portion of the liquid layer to disappear. Furthermore, the rotational speed of the substrate is further increased while the gas is discharged. Thus, the liquid layer moves outward from the substrate. |
| US10134608B2 |
Power electronic switching device and power semiconductor module therewith
A switching device and a power semiconductor module are configured with a substrate, a power semiconductor component arranged thereupon and with a load connection device. The substrate incorporates mutually electrically-insulated printed conductors and wherein the load connection device, preferably for an AC potential, comprises at least two partial connection devices, having mutually corresponding contact surfaces and being interconnected in an force-fitted or materially-bonded manner and, on the contact surfaces, an electrically conductive manner, wherein a first partial connection device has a first contact device, which is force-fitted or materially-bonded to the printed conductor of the substrate, and wherein a second partial connection device has a second contact device for the further, preferably external, connection of a load connection device. |
| US10134606B2 |
Method of forming patterns and method of manufacturing integrated circuit device using the same
A method of forming patterns may use an organic reflection-preventing film including a polymer having an acid-liable group. A photoresist film is formed on the organic reflection-preventing film. A first area selected from the photoresist film is exposed to generate an acid in the first area. Hydrophilicity of a first surface of the organic reflection-preventing film facing the first area of the photoresist film may be increased. The photoresist film including the exposed first area is developed to remove a non-exposed area of the photoresist film. The organic reflection-preventing film and a target layer are anisotropically etched by using the first area of the photoresist film as an etch mask. |
| US10134605B2 |
Dual chamber plasma etcher with ion accelerator
The embodiments herein generally deal with semiconductor processing methods and apparatus. More specifically, the embodiments relate to methods and apparatus for etching a semiconductor substrate. A partially fabricated semiconductor substrate is provided in a reaction chamber. The reaction chamber is divided into an upper sub-chamber and a lower sub-chamber by a grid assembly. Plasma is generated in the upper sub-chamber, and the substrate is positioned in the lower sub-chamber. The grid assembly includes at least two grids, each of which is negatively biased, and each of which includes perforations which allow certain species to pass through. The uppermost grid is negatively biased in order to repel electrons. The lowermost grid is biased further negative (compared to the uppermost grid) in order to accelerate positive ions from the upper to the lower sub-chamber. Etching gas is supplied directly to the lower sub-chamber. The etching gas and ions react with the surface of the substrate to etch the substrate as desired. |
| US10134604B1 |
Semiconductor device and method
A method includes forming a metal gate structure over a first fin, where the metal gate structure is surrounded by a first dielectric material, and forming a capping layer over the first dielectric material, where an etch selectivity between the metal gate structure and the capping layer is over a pre-determined threshold. The method also includes forming a patterned hard mask layer over the first fin and the first dielectric material, where an opening of the patterned hard mask layer exposes a portion of the metal gate structure and a portion of the capping layer. The method further includes removing the portion of the metal gate structure exposed by the opening of the patterned hard mask layer. |
| US10134600B2 |
Dielectric contact etch
A method for forming a semiconductor device in a plasma processing chamber is provided. An atomic layer etch selectively etches SiO with respect to SiN and deposits a fluorinated polymer. The fluorinated polymer layer is stripped, comprising flowing a stripping gas comprising oxygen into the plasma processing chamber, forming a plasma from the stripping gas, and stopping the flow of the stripping gas. A SiN layer is selectively etched with respect to SiO and SiGe and Si. |
| US10134598B2 |
Method for manufacturing semiconductor device
As a first grinding step, a peripheral portion of a back surface of a wafer (1) is ground with a first grindstone (17) to form a fractured layer (19) in the peripheral portion. Subsequently, as a second grinding step, a central portion of the back surface of the wafer (1) is ground with the first grindstone (17) to form a recess (21) while the peripheral portion in which the fractured layer (19) is formed is left as a rib (20). Subsequently, as a third grinding step, a bottom surface of the recess (21) is ground with a second grindstone (22) of an abrasive grain size smaller than that of the first grindstone (17) to reduce a thickness of the wafer (1). |
| US10134597B2 |
Apparatuses including memory cells with gaps comprising low dielectric constant materials
Various embodiments include apparatuses and electronic devices. One such apparatus can include a first dielectric material and a second dielectric material, and a conductive material between the first dielectric material and the second dielectric material. A charge storage element, such as a floating gate or charge trap, is located between the first dielectric material and the second dielectric material and adjacent to the conductive material. The charge storage element has a first surface and a second surface. The first and second surfaces are substantially separated from the first dielectric material and the second dielectric material, respectively, by a first gap and a second gap. In various embodiments, the gaps are air gaps. Additional apparatuses and methods are disclosed. |
| US10134593B2 |
Semiconductor device and method for manufacturing same
A semiconductor device includes: a substrate having a cell region with a semiconductor element and an outer peripheral region; and a drift layer on the substrate. The semiconductor element includes a base region, a source region, a trench gate structure, a deep layer deeper than a gate trench, a source electrode, and a drain electrode. The outer peripheral region has a recess portion in which the drift layer are exposed, and a guard ring layer. The guard ring layer includes multiple guard ring trenches having a frame shape, surrounding the cell region and arranged on an exposed surface of the drift layer, and a first guard ring in the guard ring trenches. Each of the linear deep trenches has a width equal to a width of each of the linear guard ring trenches. |
| US10134592B2 |
Resist having tuned interface hardmask layer for EUV exposure
A method is disclosed to prepare a substrate for photolithography. The method includes forming an underlayer over a surface of the substrate; depositing an interface hardmask layer on the underlayer using one of a vapor phase deposition process or an atomic layer deposition process; and forming a layer of extreme UV (EUV) resist on the interface hardmask layer, where the interface hardmask layer is comprised of material having a composition and properties tuned to achieve a certain secondary electron yield from the interface hardmask layer. Also disclosed is a structure configured for photolithography. The structure includes a substrate; an underlayer over a surface of the substrate; an interface hardmask layer disposed on the underlayer; and a layer of EUV resist disposed on the interface hardmask layer. The interface hardmask layer contains material having a composition and properties tuned to achieve a certain secondary electron yield from the interface hardmask layer. |
| US10134584B2 |
Method of manufacturing semiconductor device, substrate processing apparatus, and recording medium
A method of manufacturing a semiconductor device includes forming a seed layer on a substrate by alternately performing supplying a halogen-based first process gas to the substrate and supplying a non-halogen-based second process gas to the substrate, and forming a film on the seed layer by supplying a third process gas to the substrate. A pressure of a space where the substrate exists in the act of supplying the first process gas is set higher than a pressure of the space where the substrate exists in the act of supplying the second process gas. |
| US10134582B2 |
Tantalum compound and methods of forming thin film and fabricating integrated circuit device by using the same
A tantalum compound, a method of forming a thin film, and a method of fabricating an integrated circuit device, the tantalum compound being represented by the following General Formula (I): |
| US10134581B2 |
Methods and apparatus for selective dry etch
Methods for forming a spacer comprising depositing a film on the top, bottom and sidewalls of a feature and treating the film to change a property of the film on the top and bottom of the feature. Selectively dry etching the film from the top and bottom of the feature relative to the film on the sidewalls of the feature using a high intensity plasma. |
| US10134579B2 |
Method for high modulus ALD SiO2 spacer
Methods and apparatuses for forming high modulus silicon oxide spacers using atomic layer deposition are provided. Methods involve depositing at high temperature, using high plasma energy, and post-treating deposited silicon oxide using ultraviolet radiation. Such silicon oxide spacers are suitable for use as masks in multiple patterning applications to prevent pitch walking. |
| US10134576B2 |
Integrated sample processing for electrospray ionization devices
Methods, systems and devices that generate differential axial transport in a fluidic device having at least one fluidic sample separation flow channel and at least one ESI emitter in communication with the at least one sample separation flow channel. In response to the generated differential axial transport, the at least one target analyte contained in a sample reservoir in communication with the sample separation channel is selectively transported to the at least one ESI emitter while inhibiting transport of contaminant materials contained in the sample reservoir toward the at least one ESI emitter thereby preferentially directing analyte molecules out of the at least one ESI emitter. The methods, systems and devices are particularly suitable for use with a mass spectrometer. |
| US10134572B2 |
Techniques for controlling distance between a sample and sample probe while such probe liberates analyte from a sample region for analysis with a mass spectrometer
A system includes a mass spectrometer and associated sample interfacing equipment. The sample interfacing equipment includes a platform structured to support a sample thereon, a fluid source, a high voltage source, a dispensing probe electrically coupled to the high voltage source and defining a fluid dispensing passage therethrough, a collection probe defining a collection passage therethrough, a sensing arrangement coupled to the dispensing probe, and control logic responsive to the sensing arrangement to control distance between the dispensing probe and the sample. The dispensing probe facilitates formation of one or more ionized sample analytes when dispensing the fluid through the dispensing passage proximate to the sample on the platform. The collecting probe receives at least some of the one or more ionized sample analytes to pass through the collection passage into the mass spectrometer for analysis. |
| US10134570B2 |
Radiofrequency adjustment for instability management in semiconductor processing
Methods, systems, and computer programs are presented for reducing chamber instability while processing a semiconductor substrate. One method includes an operation for identifying a first recipe with steps having an operating frequency equal to the nominal frequency of a radiofrequency (RF) power supply. Each step is analyzed with the nominal frequency, and the analysis determines if any step produces instability at the nominal frequency. The operating frequency is adjusted, for one or more of the steps, when the instability in the one or more steps exceeds a threshold. The adjustment acts to find an approximate minimum level of instability. A second recipe is constructed after the adjustment, such that at least one of the steps includes a respective operating frequency different from the nominal frequency. The second recipe is used to etch the one or more layers disposed over the substrate in the semiconductor processing chamber. |
| US10134568B2 |
RF ion source with dynamic volume control
Provided herein are approaches for dynamically modifying plasma volume in an ion source chamber by positioning an end plate and radio frequency (RF) antenna at a selected axial location. In one approach, an ion source includes a plasma chamber having a longitudinal axis extending between a first end wall and a second end wall, and an RF antenna adjacent a plasma within the plasma chamber, wherein the RF antenna is configured to provide RF energy to the plasma. The ion source may further include an end plate disposed within the plasma chamber, adjacent the first end wall, the end plate actuated along the longitudinal axis between a first position and a second position to adjust a volume of the plasma. By providing an actuable end plate and RF antenna, plasma characteristics may be dynamically controlled to affect ion source characteristics, such as composition of ion species, including metastable neutrals. |
| US10134567B2 |
Microwave plasma processing apparatus
In accordance with example embodiments, a plasma processing apparatus includes a chamber configured to peform a plasma process, an upper plate on the chamber, an antenna under the upper plate and the antenna is configured to generate plasma in the chamber, an upper insulator between the upper plate and the antenna and the upper insulator covers a top of the antenna, a lower insulator covering a bottom of the antenna, an antenna support ring configured to fix the antenna to the upper plate, and a metal gasket adhered to the antenna support ring. |
| US10134563B2 |
Contactless temperature measurement in a charged particle microscope
Disclosed is a method of using a charged particle microscope for inspecting a sample mounted on a sample holder. The microscope is equipped with a solid state detector for detecting secondary particles emanating from the sample in response to irradiation of the sample with the primary beam, with the solid state detector in direct optical view of the sample. In some embodiments, the sample is mounted on a heater with a fast thermal response time. The method comprises contactless measurement of the temperature of the sample and/or sample holder using the solid state detector. |
| US10134562B2 |
Multi charged particle beam writing apparatus, and multi charged particle beam writing method
A multi charged particle beam writing apparatus includes a modulation rate data calculation processing circuitry to calculate, for each pixel being a unit region, a modulation rate of a beam to a pixel concerned and each modulation rate of a beam to at least one pixel at a periphery of the pixel concerned, and a corrected-dose calculation processing circuitry to calculate, for the each pixel, a corrected dose by adding a multiplied value obtained by multiplying the modulation rate of the pixel concerned in a modulation rate map by beam dose to the pixel concerned, and a multiplied value obtained by multiplying the modulation rate of the pixel concerned which becomes one of the at least one pixel at the periphery with respect to another pixel defined for the position of the pixel concerned by a beam dose to the another pixel. |
| US10134558B2 |
Scanning electron microscope
A scanning electron microscope according to the present invention includes: an electron source that produces an electron beam; a trajectory dispersion unit that disperses the trajectory of an electron beam of electrons with a different energy value; a selection slit plate having a selection slit that selects the energy range of the dispersed electron beam; and a transmittance monitoring unit that monitors the transmittance of an electron beam, which is being transmitted through the selection slit. Accordingly, there can be provided a scanning electron microscope equipped with an energy filter that implements a stable reduction in energy distribution. |
| US10134555B2 |
Fuse for a device to be protected
A fuse has a first contact and a second contact, with the second contact being used to electrically contact the device to be protected. The fuse has a fuse element that connects the first contact to the second contact. The fuse also has an additional contact being arranged so as to be insulated from the first contact and insulated from the second contact and, in an untripped state, is contactless with respect to the fuse element, with the first contact being directly connected to the first potential during operation and with the device to be protected being directly connected to the second potential during operation, with the additional contact also being directly connected to the second potential during operation. A fourth contact makes external triggering available, with triggering resulting in an electric arc that causes the fuse element to fuse. |
| US10134552B2 |
Method for fabricating MEMS switch with reduced dielectric charging effect
The present disclosure provides methods of fabricating a micro-electro-mechanical systems (MEMS) switch. The methods include providing a substrate, forming a first dielectric layer disposed above the substrate, forming a bump above the first dielectric layer, providing a movable member including a top actuation electrode, and forming at least one support member that includes the first dielectric layer and is directly below the top actuation electrode. The top actuation electrode is electrically coupled to the bump. |
| US10134548B2 |
Vacuum interrupter
The present disclosure relates to a vacuum interrupter that is installed within a vacuum circuit breaker to break a circuit. The vacuum interrupter includes an insulated container, a seal cup, a fixing electrode, a diaphragm, and a movable electrode. The insulated container is formed in a cylindrical form. The seal cup is installed on an upper end of the insulated container. The fixing electrode includes a fixing shaft and a fixing contact member installed on the other end of the fixing shaft. The diaphragm is installed on a lower end of the insulated container. The movable electrode includes a movable shaft having one end fixed to the diaphragm and the other end disposed within the insulated container and formed to be linearly movable, and a movable contact member installed on the other end of the movable shaft to be selectively contacted to the fixing contact member. |
| US10134547B2 |
Insulating housing with integrated functions and manufacturing method therefor
An insulating housing with integrated functions comprises a barrel-shaped shell, an interior wall of which being provided with a protruded or recessed uneven texture configured to increase a creepage distance between both axial ends of the barrel-shaped shell, the path of the creepage distance formed by the protruded or recessed uneven texture having more than two flyover or bypass sub-paths, such that the creepage distance is increased, and the voltage withstanding is increased. |
| US10134542B2 |
Trigger switch with lock member
A lock member includes a fit portion, an inclined portion and a contacting portion. The fit portion is fitted with a projecting portion of a trigger to maintain an off-lock state. The inclined portion is brought into contact with a shaft of an unlock button and moves the lock member to release the off-lock state. The projecting portion is slidable on the contacting portion and maintains an on state. |
| US10134535B2 |
Dry transformer load switch
A dry transformer load switch, and transformer having such switch, has a hollow insulation cylinder extending longitudinally about a virtual center axis and has a plurality of connection contacts arranged along the inner circumference thereof, and a radially oriented main contact arranged in the interior of the hollow insulation cylinder so as to be rotatable about the center axis and which, with a corresponding rotary movement, can be optionally electrically connected by the radially outer end thereof to one of the connection contacts. In a hollow-cylindrical space about the center axis that is defined by the radially inner and outer end of the main contact, there is a barrier shield, which can be rotated together with the main contact about the axis. |
| US10134530B2 |
Anode lead wires for improved solid electrolytic capacitors
An improved solid electrolytic capacitor, and method of making the solid electrolytic capacitor, is described. The solid electrolytic capacitor comprises a pressed powder anode and a braided lead wire extending from the anode. A dielectric is on the anode and a cathode is on the dielectric. |
| US10134524B2 |
Electric power receiving device and electric power transmission device
An electric power receiving device includes a ferrite, and a power receiving coil in which a hollow portion is formed. The power receiving coil is formed so as to surround a winding axis that extends in the thickness direction. When the power receiving coil and the ferrite are viewed from an observation position spaced apart from the power receiving coil in a direction in which the winding axis extends, notch portions are formed in an outer peripheral portion of the ferrite such that the notch portions overlap side portions of the coil. The width of each notch portion as measured in a circumferential direction of the power receiving coil increases in a direction away from the hollow portion of the power receiving coil. |
| US10134523B2 |
Coil component
A coil component has a core part 10 composing a closed magnetic path through which a closed loop of a magnetic flux passes, the magnetic flux being generated by two coils 14A, 14B that are arranged in parallel, and generate a magnetic field, and the core part 10 has a pair of I-type base cores 11A, 11B facing each other, and a pair of coupling core parts 11C, 11D. The coupling core parts 11C, 11D are each formed by linearly aligning three unit coupling cores 12A to 12F, and each of these cores 12A to 12F is formed into a configuration in which a column-shaped projection is provided on a core body, and a two-stage gap including a small gap and a large gap is to be formed mutually in a space in the adjacent unit cores 11A, 11B, and 12A to 12F by the configuration. |
| US10134521B1 |
RF transmitter and method of manufacture thereof
A radio frequency (RF) transmitter, comprising a Tesla transformer and an LC oscillator, said Tesla transformer comprising inner and outer conductors (10, 20), said inner conductor (20) comprising a generally tubular magnetic core (22) carrying a conductive member (22a) on its outer surface and said outer conductor (10) comprising a generally tubular magnetic core (13) carrying a conductive member (12) on its inner surface, said LC oscillator including a secondary winding module (40) comprising a generally tubular body (41) carrying a conductive coil (42) on its outer surface, said inner conductor (20), outer conductor (10) and secondary winding module (40) being arranged in a substantially concentric nested configuration such that said inner conductor (20) is located within said secondary winding module (40) and said secondary winding module (40) is located within said outer conductor (10), wherein a first portion (45) of relatively high permittivity dielectric material is provided between said conductive member (22a) of said inner conductor (20) and said conductive coil (42) and a second portion (33) of relatively high permittivity dielectric material is provided between said conductive coil (42) and said conductive member (12) of said outer conductor (10). |
| US10134516B2 |
Sensor ring
A sensor ring is provided for a magnetic measuring transducer of an ABS system consisting of at least two annularly arranged functional elements. The first functional element is formed as a ferromagnetic annular disc element with a flat upper side and a flat underside with a multiplicity of openings. The second functional element, as a non-ferromagnetic element, has either been applied on the upper side and/or the underside of the annular disc element and/or has been introduced into the openings, as an annular disc element. The sensor ring is protected from contamination or damage by the non-ferromagnetic covering. The covering may also be produced by encapsulation or filling, wherein the openings in the sensor ring can be filled with plastic and also the side faces can be coated with plastic. |
| US10134514B2 |
Method for producing grain-oriented electrical steel sheet
In a method for producing a grain-oriented electrical steel sheet by hot rolling a raw steel material containing C: 0.002˜0.10 mass %, Si: 2.0˜8.0 mass % and Mn: 0.005˜1.0 mass % to obtain a hot rolled sheet, subjecting the hot rolled sheet to a hot band annealing as required and further to one cold rolling or two or more cold rollings including an intermediate annealing therebetween to obtain a cold rolled sheet having a final sheet thickness, subjecting the cold rolled sheet to a primary recrystallization annealing combined with decarburization annealing, applying an annealing separator to the steel sheet surface and then subjecting to a final annealing, when rapid heating is performed at a rate of not less than 50° C./s in a range of 100˜700° C. in the heating process of the primary recrystallization annealing, the steel sheet is subjected to a holding treatment at any temperature of 250˜600° C. for 0.5˜10 seconds 2 to 6 times to thereby obtain a grain-oriented electrical steel sheet being low in the iron loss and small in the deviation of the iron loss value. |
| US10134513B2 |
High silicon steel sheet having excellent productivity and magnetic properties and method for manufacturing same
Provided is a method for manufacturing a high silicon steel sheet having excellent producibility and magnetic properties. The method includes: casting a molten metal as a strip having a thickness of 5 mm or less, the molten metal comprising, by weight %, C: 0.05% or less (excluding 0%), N: 0.05% or less (excluding 0%), Si: 4% to 7%, Al: 0.5% to 3%, Si+Al: 4.5% to 8%, and the balance of Fe and inevitable impurities; hot-rolling the cast strip at a temperature of 800° C. or higher; annealing the hot-rolled strip at a temperature within a range of 900° C. to 1200° C.; cooling the annealed strip; warm-rolling the quenched strip at a temperature within a range of 300° C. to 700° C.; and finally annealing the warm-rolled strip at a temperature within a range of 800° C. to 1200° C. |
| US10134512B2 |
Ceramic material and resistive element
A ceramic material has a composition represented by Cax′NaxMny′MyO12, wherein M denotes at least one of Ni and Cu, and x′, x, y′, and y satisfy any of (a), (b), and (c) in which x′+x=X and y′+y=Y: 0.9 7.0 ≦ X Y < 1.0 7.0 ; ( a ) at a condition of X Y = 1.0 7.0 , 0.03 8 ≦ x X + Y < 0.30 8 and 0 ≦ y X + Y ≦ 0.35 8 ; and ( b ) 1.0 7.0 < X Y ≦ 1.0 6.9 . ( c ) |
| US10134511B2 |
Resistance element, electrostatic protection circuit, temperature detection circuit, and electro-optic apparatus
A resistance element includes a first electro-conductive layer that is formed on a substrate and includes a body portion and a protruding portion protruding from the body portion, and the body portion includes a current path from an input portion to an output portion. The resistance element further includes a second electro-conductive layer that is formed on the first electro-conductive layer via an insulating layer by using a material having a lower resistivity than the first electro-conductive layer. The resistance element further includes a connection portion that is provided to the insulating layer at a position corresponding to the protruding portion and includes a contact hole penetrating from the first electro-conductive layer to the second electro-conductive layer. |
| US10134509B1 |
Electrical power line clamping insulator
A clamping insulator for securing electrical wires to support structures includes an insulating second clamp member, and an insulating first clamp member that is hingebly connected to the insulating second clamp member and an eyebolt, wherein the hinge is positioned at an angle relative to the electrical wire, the first clamp member is simply flipped over upon the second clamp member to secure the wire in place, the eyebolt both secures the first and second clamp members in the closed position and allows easy access for a lineman with a hot stick, and, in the closed position, the eyebolt is positioned at a compound angle relative to the ground and supporting structure it sits upon to provide easy access for a hot stick. |
| US10134508B2 |
MgB2 superconductive wire material, and production method therefor
An MgB2 superconducting wire includes a core containing MgB2 and a metal sheath which surrounds the core. The core includes at least a first MgB2 core positioned on the center side, and a second MgB2 core positioned outside the first MgB2 core, and the density of the second MgB2 core is lower than the density of the first MgB2 core. |
| US10134507B2 |
Cable having improved anti cross talk performance
A cable (100) includes a plurality of wires (10) and a jacket (20) enclosing the wires. The wires includes a plurality of differential signal wires (11) for transmitting high speed signal, a detection signal wire (12), at least one auxiliary signal wire (13), and a plurality of lower speed signal wires (14). All of the differential signal wires, the detection signal wire and the at least one auxiliary signal wire are arranged at an outer peripheral of and enclosing the lower signal wires. Each two adjacent differential signal wire pairs are separated by one of the detection signal wire and the at least one auxiliary signal wire. |
| US10134506B2 |
Electrical characteristics of shielded electrical cables
A shielded electrical cable includes one or more conductor sets extending along a length of the cable and being spaced apart from each other along a width of the cable. Each conductor set has one or more conductors having a size no greater than 24 AWG and each conductor set has an insertion loss of less than about −20 dB/meter over a frequency range of 0 to 20 GHz. First and second shielding films are disposed on opposite sides of the cable, the first and second films including cover portions and pinched portions arranged such that, in transverse cross section, the cover portions of the first and second films in combination substantially surround each conductor set, and the pinched portions of the first and second films in combination form pinched portions of the cable on each side of each conductor. |
| US10134500B2 |
Crystal direction control of alloyed aluminum wire, alloyed aluminum electric wire, and wire harness using same
An aluminum wire 10 has a composition containing at least one element of Fe: 0 to 2.0 mass %, Mg: 0 to 1.0 mass %, Zr: 0 to 0.5 mass %, Si: 0 to 1.2 mass %, or Ni: 0 to 0.3 mass %, with the remainder being composed of aluminum and unavoidable impurities. In a cross section 15 perpendicular to the longitudinal direction 11 of the aluminum wire, the surface area proportion of component crystals for which the angle 14 between the longitudinal direction and the <111> direction of the crystal is 10° or less, relative to the total surface area of the cross section, is 50% or greater, and the surface area proportion of component crystals for which the angle 14 between the longitudinal direction and the <111> direction of the crystal is 20° or less, relative to the total surface area of the cross section, is 85% or greater. |
| US10134499B2 |
Scintillation crystal including a co-doped sodium halide
A scintillation crystal can include a sodium halide that is co-doped with thallium and another element. In an embodiment, the scintillation crystal can include NaX:Tl, Me, wherein X represents a halogen, and Me represents a Group 1 element, a Group 2 element, a rare earth element, or any combination thereof. In a particular embodiment, the scintillation crystal has a property including, for radiation in a range of 300 nm to 700 nm, an emission maximum at a wavelength no greater than 430 nm; or an energy resolution less than 6.4% when measured at 662 keV, 22° C., and an integration time of 1 microsecond. In another embodiment, the co-dopant can be Sr or Ca. The scintillation crystal can have lower energy resolution, better proportionality, a shorter pulse decay time, or any combination thereof as compared to the sodium halide that is doped with only thallium. |
| US10134497B2 |
Methods for producing Cu-67 radioisotope with use of a ceramic capsule for medical applications
The present invention provides a method for producing Cu67 radioisotope suitable for use in medical applications. The method comprises irradiating a metallic zinc-68 (Zn68) target within a sealed ceramic capsule with a high energy gamma ray beam. After irradiation, the Cu67 is isolated from the Zn68 by any suitable method (e.g. chemical and or physical separation). In a preferred embodiment, the Cu67 is isolated by sublimation of the zinc in a ceramic sublimation tube to afford a copper residue containing Cu67. The Cu67 can be further purified by chemical means. |
| US10134494B2 |
Installation device of reactor repair device and method
In an installation device of a reactor repair device and a method, an installation pole (111) connected with an upper portion of a water jet peening device (101), a lifting device (112) that can suspend and support an upper portion of the installation pole (111) and can lift the installation pole (111) from a work floor (121), a moving device (113) that can move the lifting device (112) in two directions intersecting in a horizontal direction, and a position adjustment device (114) that can move the installation pole (111) in the horizontal direction in a state where the installation pole (111) is supported by the lifting device (112). |
| US10134493B2 |
Reactor and operating method for the reactor
Provided are a nuclear reactor and an operating method for the reactor. The reactor includes a driving system and a safety system. The safety system includes isolation vessels, heat exchangers, a coolant pipe, and a communication pipe. Fluid is distributed in the safety system according to thermal, pressure, and leak conditions. |
| US10134491B2 |
Application of compressed magnetic fields to the ignition and thermonuclear burn of inertial confinement fusion targets
Application of axial seed magnetic fields in the range 20-100 T that compress to greater than 10,000 T (100 MG) under typical NIF implosion conditions may significantly relax the conditions required for ignition and propagating burn in NIF ignition targets that are degraded by hydrodynamic instabilities. Such magnetic fields can: (a) permit the recovery of ignition, or at least significant alpha particle heating, in submarginal NIF targets that would otherwise fail because of adverse hydrodynamic instability growth, (b) permit the attainment of ignition in conventional cryogenic layered solid-DT targets redesigned to operate under reduced drive conditions, (c) permit the attainment of volumetric ignition in simpler, room-temperature single-shell DT gas capsules, and (d) ameliorate adverse hohlraum plasma conditions during laser drive and capsule compression. In general, an applied magnetic field should always improve the ignition condition for any NIF ignition target design. |
| US10134490B2 |
Method and system for monitoring labour progression for an obstetrics patient
A graphical user interface is provided displaying a first viewing window selected from a set of possible viewing windows conveying respective feature measurements related to labor progression. At least one viewing window in the set of possible viewing windows conveys a given feature measurement and a safety limit associated to the given feature measurement. The graphical user interface also displays at least one control allowing a user to select a subset of viewing windows from the set of possible viewing windows, the subset of viewing windows including at least one viewing window other than the first viewing window. The selected subset of viewing windows is displayed simultaneously with the first viewing window. In response to the given feature measurement exceeding the associated safety limit, information is displayed to attract the attention of the user to the viewing window conveying the given feature measurement. |
| US10134489B2 |
Medical pad and a wetness reporting system with such a medical pad
A medical pad includes a piece of substrate with a major surface and an electric circuit on the major surface, a sensor connected with the electric circuit for measuring the electrical resistance of the electric circuit, and a wireless data transceiver or a radio frequency identification (RFID) tag electrically connected with the sensor for receiving results of the measuring from the sensor for subsequent transmission. The system carries out real time self-calibration to adaptively monitor the condition of a medical pad even in the face of changing environment and changing material properties. |
| US10134486B2 |
Memory device including a redundancy column and a redundancy peripheral logic circuit
A memory device includes a memory cell array including a plurality of memory cells arranged in a plurality of columns including a normal column and a redundancy column for repairing the normal column, a plurality of peripheral logic circuits including a normal peripheral logic circuit and a redundancy peripheral logic circuit for repairing the normal peripheral logic circuit, and a first path selection logic circuit configured to form first paths between the plurality of columns and the plurality of peripheral logic circuits, based on at least one defect from among a defect in at least one of the plurality of columns or a defect in at least one of the plurality of peripheral logic circuits. |
| US10134481B2 |
Pre-compensation of memory threshold voltage
Methods of operating a memory include storing a first target data state of multiple possible data states of a first memory cell to be programmed in a target data latch coupled to a data node, storing at least one bit of a second target data state of the multiple possible data states of a second memory cell to be programmed in an aggressor data latch coupled to the data node, and programming the first memory cell and performing a program verify operation for the first target data state to determine if the first memory cell is verified for the first target data state. The program verify operation including: an intermediate verify corresponding to an amount of aggression to apply a voltage to the data node when performing the intermediate verify, based on the at least one bit of the second target state stored in the aggressor data latch; and a program verify corresponding to a condition of no aggression to apply to the voltage to the data node when performing the program verify, based on the at least one bit of the second target state stored in the aggressor data latch. The methods including inhibiting the first memory cell from further programming if the first memory cell is verified during the intermediate verify and the at least one bit in the aggressor data latch corresponds to the particular amount of aggression, or the first memory cell is verified during the program verify and the at least one bit in the aggressor data latch corresponds to the condition of no aggression. The second memory cell is a neighbor of the first memory cell. |
| US10134476B2 |
Memory system using non-linear filtering scheme and read method thereof
A method for controlling a nonvolatile memory device includes requesting a plurality of first sampling values from the nonvolatile memory device, each of the first sampling values representing the number of memory cells having a threshold voltage between a first sampling read voltage and a second sampling read voltage. The first sampling values are processed through a non-linear filtering operation to estimate the number of memory cells having the threshold voltage between the first sampling read voltage and the second sampling read voltage. |
| US10134475B2 |
Method and apparatus for inhibiting the programming of unselected bitlines in a flash memory system
Various embodiments for inhibiting the programming of memory cells coupled to unselected bit lines while programming a memory cell coupled to a selected bit line in a flash memory array are disclosed. Various embodiments for compensating for leakage current during the programming of memory cells coupled to a selected bit line in a flash memory array also are disclosed. |
| US10134473B1 |
Input output scheduling for solid state media
Described is a write scheduling scheme for a SSD that significantly increases read performance, in certain embodiments by about 50% compared to a conventional standard write scheduling schemes, for mixed read-write workloads while maintaining the write bandwidth. |
| US10134472B1 |
Floating gate architecture for deep neural network application
A resistive processing unit (RPU) circuit for use in a neural network application includes at least one floating gate storage device, the floating gate storage device including a floating gate, a control gate and an inject/erase gate. The RPU circuit further includes a feedback circuit connected with the floating gate storage device. The feedback circuit is configured to maintain a substantially constant floating gate potential of the floating gate storage device during an update mode of operation of the RPU circuit, and is disabled during a readout mode of operation of the RPU circuit. |
| US10134471B2 |
Hybrid memory architectures
Methods and apparatuses for providing a hybrid memory module having both volatile and non-volatile memories to replace a DDR channel in a processing system. |
| US10134470B2 |
Apparatuses and methods including memory and operation of same
Disclosed herein is a memory cell. The memory cell may act both as a combined selector device and memory element. The memory cell may be programmed by applying write pulses having different polarities. Different polarities of the write pulses may program different logic states into the memory cell. The memory cell may be read by read pulses all having the same polarity. The logic state of the memory cell may be detected by observing different threshold voltages when the read pulses are applied. The different threshold voltages may be responsive to the different polarities of the write pulses. |
| US10134469B1 |
Read operation with data latch and signal termination for 1TNR memory array
Two-terminal memory can be formed into a memory array that contains many discrete memory cells in a physical and a logical arrangement. Where each memory cell is isolated from surrounding circuitry by a single transistor, the resulting array is referred to as a 1T1R memory array. In contrast, where a group of memory cells are isolated from surrounding circuitry by a single transistor, the result is a 1TnR memory array. Because memory cells of a group are not isolated among themselves in the 1TnR case, bit disturb effects are theoretically possible when operating on a single memory cell. Read operations are disclosed for two-terminal memory devices configured to mitigate bit disturb effects, despite a lack of isolation transistors among memory cells of an array. Disclosed operations can facilitate reduced bit disturb effects even for high density two-terminal memory cell arrays. |
| US10134459B2 |
MRAM with metal-insulator-transition material
Memory cells and methods for forming a memory cell are disclosed. The memory cell includes a first selector having a first gate coupled to a first word line (WL) and first and second source/drain (S/D) regions, and a second selector having a second gate coupled to a second WL and first and second S/D regions. The second S/D regions of the first and the second selectors are a common S/D region. The first and the second WLs are a common WL and the second S/D regions of the first and second selectors are coupled to a source line (SL). The memory cell includes a storage element which includes a magnetic tunnel junction (MTJ) element coupled with a bit line (BL) and the first and the second selectors, and a voltage control switch which includes a metal-insulator-transition (MIT) material coupled with the first selector. |
| US10134458B2 |
Electronic device and method for fabricating the same
Provided is an electronic device including a semiconductor memory. The semiconductor memory may include: an under layer including first and second metal layers and a barrier layer having a dual phase structure of different crystal structures and interposed between the first and second metal layers; a first magnetic layer positioned over the under layer and having a variable magnetization direction; a tunnel barrier layer positioned over the first magnetic layer; and a second magnetic layer positioned over the tunnel barrier layer and having a pinned magnetization direction, and the under layer may further include a barrier layer having a dual phase structure between the first and second metal layers. |
| US10134454B2 |
Apparatuses, circuits, and methods for biasing signal lines
Apparatuses, circuits, and methods are disclosed for biasing signal lines in a memory array. In one such example the memory array includes a signal line coupled to a plurality of memory cells and is configured to provide access to the plurality of memory cells responsive to a biasing condition of the signal line. The memory array also includes a signal line driver coupled to the signal line, the signal line driver configured to provide a biasing signal to the signal line and to provide a preemphasis in the biasing signal responsive to a control signal. The control signal is responsive to an operating condition. |
| US10134453B2 |
Invert operations using sensing circuitry
The present disclosure includes apparatuses and methods related to performing logical operations using sensing circuitry. An example apparatus comprises an array of memory cells and sensing circuitry coupled to the array. The sensing circuitry includes a plurality of sensing components coupled to a controller. The controller is configured to selectively activate a first control line and a second control line to invert signals stored on a latch. |
| US10134446B1 |
Heat-assisted rotating disk magnetometer for ultra-high anisotropy magnetic measurements
An apparatus comprises a spindle to rotate a magnetic recording medium and a magnetic field generator to expose a track of the medium to a DC magnetic field. The magnetic field generator is configured to saturate the track during an erase mode and reverse the DC magnetic field impinging the track during a writing mode. A laser arrangement heats the track during the erase mode and, during the writing mode, heats the track while the track is exposed to the reversed DC magnetic field so as to write a magnetic pattern thereon. A reader reads the magnetic pattern and generates a read signal. A processor is coupled to the reader and configured to determine an anisotropy parameter using the read signal. The apparatus can further comprise a Kerr sensor that generates a Kerr signal using the magnetic pattern. |
| US10134434B2 |
Magnetic graphene
A method of making magnetic graphene comprising transferring or growing a graphene film on a substrate, functionalizing the graphene film, hydrogenating the graphene film and forming fully hydrogenated graphene, manipulating the extent of the hydrogen content, and forming areas of magnetic graphene and non-magnetic graphene. A ferromagnetic graphene film comprising film that has a thickness of less than two atom layers thick. |
| US10134433B2 |
Magnetic tape device, magnetic reproducing method, and head tracking servo method
Provided is a magnetic tape device in which a magnetic tape transportation speed is equal to or lower than 18 m/sec, Ra measured regarding a surface of a magnetic layer of a magnetic tape is equal to or smaller than 2.0 nm, a C-H derived C concentration calculated from a C-H peak area ratio of C1s spectra obtained by X-ray photoelectron spectroscopic analysis performed on the surface of the magnetic layer at a photoelectron take-off angle of 10 degrees is 45 to 65 atom %, and ΔSFD (=SFD25° C.−SFD−190° C.) in a longitudinal direction of the magnetic tape is equal to or smaller than 0.50, with the SFD25° C. being SFD measured in a longitudinal direction of the magnetic tape at a temperature of 25° C., and the SFD−190° C. being SFD measured at a temperature of −190° C. |
| US10134428B1 |
Selective data writer coil
A data writer may be constructed and operated as part of a data storage device. The data writer can be positioned proximal a data storage medium. The data writer may have a write pole positioned adjacent a writer coil with the writer coil having a plurality of turns. A controller that is connected to each turn can be adapted to selectively activate less than all the coil turns in response to the data writer being positioned over a first portion of a data storage medium and selectively activate all of the coil turns in response to the data writer being positioned over a second portion of the data storage medium. |
| US10134423B2 |
System and method to provide classification of noise data of human crowd
System(s) and method(s) for classifying noise data of human crowd are disclosed. Noise data is captured from one or more sources and features are extracted by using computation techniques. The features comprise spectral domain features and time domain features. Classification models are developed by using each of the spectral domain features and the time domain features. Discriminative information with respect to the noise data is extracted by using the classification models. A performance matrix is computed for each of the classification model. The performance matrix comprises classified noise elements with respect to the noise data. Each classified noise element is associated with a classification performance score with respect to a spectral domain feature, a time domain feature, and fusion of features and scores. The classified noise elements provide the classification of the noise data. |
| US10134406B2 |
Noise signal processing method, noise signal generation method, encoder, decoder, and encoding and decoding system
Present disclosure provide a linear prediction-based noise signal processing method includes: acquiring a noise signal, and obtaining a linear prediction coefficient according to the noise signal; filtering the noise signal according to the linear prediction coefficient, to obtain a linear prediction residual signal; obtaining a spectral envelope of the linear prediction residual signal according to the linear prediction residual signal; and encoding the spectral envelope of the linear prediction residual signal. According to the noise processing method, the noise generation method, the encoder, the decoder, and the encoding and decoding system that are in the embodiments of the present disclosure, more spectral details of an original background noise signal can be recovered, so that comfort noise can be closer to original background noise in terms of subjective auditory perception of a user, and subjective perception quality of the user is improved. |
| US10134402B2 |
Signal processing method and apparatus
The present disclosure provide a signal processing method and apparatus. The method includes: determining a total quantity of to-be-allocated bits corresponding to a current frame; implementing primary bit allocation on to-be-processed sub-bands; performing a primary information unit quantity determining operation for each sub-band that has undergone the primary bit allocation; selecting sub-bands for secondary bit allocation from the to-be-processed sub-bands according to at least one of a sub-band characteristic of each sub-band of the to-be-processed sub-bands or the total quantity of surplus bits; implementing secondary bit allocation on the sub-bands for secondary bit allocation; and performing a secondary information unit quantity determining operation for each sub-band of the sub-bands for secondary bit allocation. |
| US10134400B2 |
Diarization using acoustic labeling
Systems and method of diarization of audio files use an acoustic voiceprint model. A plurality of audio files are analyzed to arrive at an acoustic voiceprint model associated to an identified speaker. Metadata associate with an audio file is used to select an acoustic voiceprint model. The selected acoustic voiceprint model is applied in a diarization to identify audio data of the identified speaker. |
| US10134397B2 |
Reducing latency caused by switching input modalities
Methods, apparatus, and computer-readable media (transitory and non-transitory) are provided herein for reducing latency caused by switching input modalities. In various implementations, a first input such as text input may be received at a first modality of a multimodal interface provided by an electronic device. In response to determination that the first input satisfies one or more criteria, the electronic device may preemptively establish a session between the electronic device and a query processor configured to process input received at a second modality (e.g., voice input) of the multimodal interface. In various implementations, the electronic device may receive a second input (e.g., voice input) at the second modality of the multimodal interface, initiate processing of at least a portion of the second input at the query processor within the session, and build a complete query based on output from the query processor. |
| US10134391B2 |
System and method for dynamic ASR based on social media
System and method to adjust an automatic speech recognition (ASR) engine, the method including: receiving social network information from a social network; data mining the social network information to extract one or more characteristics; inferring a trend from the extracted one or more characteristics; and adjusting the ASR engine based upon the inferred trend. Embodiments of the method may further include: receiving a speech signal from a user; and recognizing the speech signal by use of the adjusted ASR engine. Further embodiments of the method may include: producing a list of candidate matching words; and ranking the list of candidate matching words by use of the inferred trend. |
| US10134385B2 |
Systems and methods for name pronunciation
Systems and methods are provided for associating a phonetic pronunciation with a name by receiving the name, mapping the name to a plurality of monosyllabic components that are combinable to construct the phonetic pronunciation of the name, receiving a user input to select one or more of the plurality, and combining the selected one or more of the plurality of monosyllabic components to construct the phonetic pronunciation of the name. |
| US10134384B2 |
System and method for synthesizing human speech
A method and apparatus are described for detecting voice related vibration in the upper region of the chest and synthesizing human speech. The innovation finds its use in speech rehabilitation applications among others, specifically in speech impairments and speech disability arising due to accident, congenital defects or other reasons. A set of piezoelectric based sensors are placed on an upper region of the chest atop or near sound tendons. The sensors pick up the vibrations in the sound tendons and convert the vibrations into electrical output signals. These signals are filtered, amplified and processed using the signal recognition unit. Subsequently, a set of parameters are extracted and used to generate speech or a written text. The sensors incorporate piezoelectric or other transducing materials. These sensors are externally affixed to a human body surface corresponding to the position of the sounds tendons in the upper chest/neck region. |
| US10134383B2 |
System and method for distributed voice models across cloud and device for embedded text-to-speech
Systems, methods, and computer-readable storage media for intelligent caching of concatenative speech units for use in speech synthesis. A system configured to practice the method can identify, in a local cache of text-to-speech units for a text-to-speech voice an absent text-to-speech unit which is not in the local cache. The system can request from a server the absent text-to-speech unit. The system can then synthesize speech using the text-to-speech units and a received text-to-speech unit from the server. |
| US10134380B2 |
Noise and vibration sensing
A noise and vibration sensor arrangement which is configured to operate with a road noise control system, and includes four acceleration sensors each configured to generate at least one output signal representative of at least one of accelerations, motions and vibrations that act on the respective acceleration sensor. The arrangement includes a vehicle subframe structure having a shape that is axisymmetric to a first axis and that has a maximum extent along a second axis. The first and the second axis are perpendicular. The four sensors are attached to the subframe structure at positions that correspond to four corners of a virtual rectangle. The virtual rectangle has two perpendicular centerlines, one of the centerlines being in line with the first axis of the subframe structure. The extent of the virtual rectangle along the other centerline is less than fifty percent of the subframe structure's maximum extent along the second axis. |
| US10134379B2 |
Acoustic wall assembly having double-wall configuration and passive noise-disruptive properties, and/or method of making and/or using the same
Certain example embodiments relate to an acoustic wall assembly that uses active and/or passive sound reverberation to achieve noise-disruptive functionality, and/or a method of making and/or using the same. With the active approach, sound waves in a given frequency range are detected by a sound masking circuit. Responsive to detection of such sound waves, an air pump (e.g., speaker) is used to pump air in the wall assembly to actively mask the detected sound waves via reverberation and/or the like. The wall assembly may include one, two, or more walls, and the walls may be partial or full walls. With the passive approach, sound waves in a given frequency range are disrupted via features (e.g., holes, slits, etc.) formed in and/or on a wall itself. These techniques may be used together or separately, in different example embodiments. |
| US10134373B2 |
Machine-control of a device based on machine-detected transitions
Apparatus, methods, and systems that operate to perform machine-control of a device based on machine-detected transitions are disclosed. |
| US10134370B2 |
Smart mirror with focus control
An electronic device includes a display unit configured to display a plurality images, an eye tracking sensor configured to detect a eye-focused area on the display unit, a reflective layer, a reflective control layer configured to change a regional reflectivity of the reflective layer, and a processor configured to receive the eye-focused area on the display unit from the eye tracking sensor, and determine a focus image within the eye-focused area and an unfocused image out of the eye-focused area, and cause the reflective control layer to reflect the unfocused image. In some embodiment, the processor is configured to cause the reflective control layer not to reflect the focused image. |
| US10134367B2 |
Rendering texts on electronic devices
In one embodiment, dividing a set of texts into one or more text blocks, each text block including a portion of the set of texts; rendering each text block to obtain one or more rendered text blocks; determining a placement instruction for each rendered text block, the placement instruction indicating a position of the rendered text block when it is displayed; and sending the one or more rendered text blocks and their respectively associated placement instructions to an electronic device for displaying on the electronic device. |
| US10134366B2 |
Timing-based scheduling for computer-generated animation
A method of scheduling and performing computations for generating an interactive computer-generated animation on behalf of a client device to achieve a desired quality of service includes generating a computational configuration of computations that, when performed, produce the computer-generated animation with the desired quality of service. The configuration includes an identification of a first computation that outputs first data, a first start time for the first computation, and a first end time, where the first computation is to end before the first end time. The configuration also includes an identification of a second computation that depends on the first data, and a second start time for the second computation. The first computation is performed in response to an occurrence of the first start time and the second computation is performed in response to an occurrence of the second start time. |
| US10134359B2 |
Device or method for displaying image
Improving the visibility of the dark portion and to prevent the degradation of image quality caused by excessive correction. A reflectance calculation unit is storing a parameter RGain for adjusting the amplitude of a reflectance component R. An illumination light correction unit generates a corrected illumination light component L1 from an illumination light component L and a formula L1=(log(LAmp*L+1))/(log(LAmp+1)). An image resynthesis unit obtains a corrected illumination light component L′ from L′=LGain*L1+(1−LGain)*L. The image resynthesis unit also calculates a corrected image Iout from the corrected illumination light component L′ and the corrected reflectance R′, as well as from a formula Iout=exp(log L′+RGain(log I−log L)). The value of the corrected illumination light component (L′) is determined based on the ratio (LGain) at which the output value of the correction function (L1) and the original illumination light component (L) are combined. |
| US10134357B2 |
System and method for device pairing, and mobile terminal
The present invention relates to a system and a method for device pairing which can pair a plurality of terminals using a brightness value change pattern. The system for device pairing according to an embodiment of the present invention comprises: an apparatus including a display; n terminals; and a server for connecting the apparatus including the display with the n terminals. The server assigns an ID to the apparatus including the display in accordance with an access request of the apparatus. The apparatus including the display calculates a brightness value change pattern corresponding to the ID, and outputs the pattern on the display. The n terminals can identify the ID after detecting the pattern outputted on the display using a proximity sensor and an illuminance sensor, transmit the ID to the server, and request an access. |
| US10134356B2 |
Transmission apparatus, method of transmitting image data with wide color gamut, reception apparatus, method of receiving image data with color gamut
A transmission apparatus includes a data transmission unit that transmits image data with a wide color gamut to an external apparatus over a transmission path; and an information transmission unit that transmits additional information on the image data with the wide color gamut that is transmitted by the data transmission unit and information on a transmission method for the additional information, to the external apparatus over the transmission path. |
| US10134355B2 |
Two-phase hybrid vertex classification
A processor performs vertex coloring for a graph based at least in part on the degree of each vertex of the graph and based at least in part with another coloring approach, such as comparison of random values assigned to the vertices. For each vertex in the graph, a processor determines whether the degree of the vertex is a local maximum; that is, whether the degree of the vertex is greater than the degree of each of its connected vertices. Each vertex having a local-maximum degree is assigned a specified or randomly selected color, and is then omitted from future iterations of the coloring process. After a stop criterion is met, the processor assigns random values to the remaining uncolored vertices and assigns colors based on comparisons of the random values. |
| US10134353B2 |
Gate driving circuit, display panel and display apparatus having the same, and driving method thereof
The present application discloses a display panel having a plurality of gate lines and a gate driving circuit for driving the plurality of gate lines, the gate driving circuit including a plurality of first cascaded shift register units and a plurality of second cascaded shift register units for applying gate scanning signals to gate lines connected thereto. The display panel includes a first pair of first cascaded shift register unit and second cascaded shift register unit; a second pair of first cascaded shift register unit and second cascaded shift register unit; the second pair adjacent to the first pair; the first cascaded shift register unit in the first pair is electrically coupled to the second cascaded shift register unit in the second pair; and the second cascaded shift register unit in the first pair is electrically coupled to the first cascaded shift register unit in the second pair; a first group of gate lines connecting the first pair of first cascaded shift register unit and second cascaded shift register unit; and a second group of gate lines connecting the first cascaded shift register unit in the first pair and the first cascaded shift register unit in the second pair. The gate driving circuit includes a first column of cascaded shift register units and a second column of cascaded shift register units, the first column and the second column having a same number of cascaded shift register units; the first cascaded shift register unit in the first pair is an odd numbered cascaded shift register unit in the first column, the second cascaded shift register unit in the first pair is an odd numbered cascaded shift register unit in the second column, the first cascaded shift register unit in the second pair is an even numbered cascaded shift register unit in the second column, and the second cascaded shift register unit in the second pair is an even numbered cascaded shift register unit in the first column. |
| US10134351B2 |
Display device
A display device includes pixel electrodes formed in an image display area of a substrate, a common electrode formed in the image display area, inside signal lines formed inside the image display area, and electrically connected to the pixel electrodes, outside signal lines formed outside the image display area, and electrically connected to the inside signal lines, and a common line formed inside and outside the image display area, and electrically connected to the common electrode. An image is displayed under a control of a light using an electric field developed between the pixel electrodes and the common electrode. A coupling capacitance is formed between the inside signal lines and the common electrode. The outside signal lines each include a first portion, and a second portion higher in electric resistance than the first portion and the inside signal lines. |
| US10134342B2 |
Systems and methods for producing narrowband images
A system may produce images including narrow-bandwidth colors. One or more sets of the narrow-bandwidth colors may be selected to be interpreted as substantially a same color by a user. The system may include a light source configured to produce the narrow-bandwidth colors, and/or narrow-passband filters may create narrow-bandwidth colors from light emitted by broad-spectrum light sources or color sources. Spatial and/or time multiplexing may be used to create separate narrow-bandwidth colors interpreted as substantially a same color by the user. The light source and/or the narrow-passband filter elements may be adjustable and may alternate between emission of two or more narrow-bandwidth colors. A viewing device may include filters configured to selectively filter the narrow-bandwidth colors. The user may filter the narrow-bandwidth colors to separate a stereoscopic image pair, to view an image specific to a user, to view desired content obfuscated by an obfuscating image, and/or the like. |
| US10134338B2 |
Inverter, gate driving circuit and display apparatus
The present disclosure relates to display technology, and provides an inverter, a gate driving circuit and a display apparatus, capable of solving the problem that it is difficult to apply Scan Power technology in the display apparatus since a power signal outputted from the inverter has a small current. The inverter comprises: a current amplification module configured to amplify a current of the output terminal of the inverter based on a signal at a first clock signal terminal, a signal at a second clock signal terminal, a signal at a third clock signal terminal, a signal at a fourth clock signal terminal, a signal at a first input signal terminal, and a signal at a second input signal terminal, and to control the output terminal of the inverter to output a high level signal; and a pull-down module configured to control the output terminal of the inverter to output a low level signal. The inverter according to the present disclosure may be applied in a display apparatus employing the Scan Power technology. |
| US10134335B2 |
Systems and method for fast compensation programming of pixels in a display
Circuits for programming a circuit with decreased programming time are provided. Such circuits include a storage device such as a capacitor for storing display information and for ensuring a driving device such as a driving transistor drives a light emitting device according to the display information. To increase programming time, the pixel circuits may be pre-charged or a biasing current may be applied to charge and/or discharge a data line and/or the driving device. Aspects of the present disclosure allow for the biasing current to drain partially through the storage device to allow the portion of the biasing current applied to the driving device to remain small while the data line discharges. Furthermore, the present disclosure provides display architectures and operation schemes for display arranged in segments each including a plurality of pixel circuits. |
| US10134333B2 |
Display device and method of driving the same
A display device includes a display panel, a controller, a power supplier, and an initialization voltage generator. The controller generates a power control signal based on an input image. The power supplier generates a variable driving voltage that is changed based on the power control signal. The initialization voltage generator changes an initialization voltage to initialize the pixels based on the variable driving voltage. |
| US10134320B2 |
Color filter and manufacturing method thereof, display panel, display device and driving method thereof
A color filter and a manufacturing method, a display panel, and a display device and a driving method are provided. The color filter includes a plurality of color resists which include red resists (R), green resists (G) and blue resists (B); and the color filter includes a plurality of pixel regions arranged in a matrix, each pixel region comprises a red sub-pixel region comprising an even number of red sub-sub-pixel regions, a green sub-pixel region including an even number of green sub-sub-pixel regions, a blue sub-pixel region including an even number of blue sub-sub-pixel regions, each red sub-sub-pixel region is provided with a red resist, each green sub-sub-pixel region is provided with a green resist, and each blue sub-sub-pixel region is provided with a blue resist. The manufacturing precision and alignment accuracy of a mask for this color filter is lower than a current technology and reduce the manufacturing difficulty. |
| US10134319B2 |
Illumination display device with illumination region control, electronic apparatus and control method therefor
Provided is a display device capable of illuminating a region desired by a user with a simple operation. A display device according to one exemplary embodiment of the invention includes a display means, a touch panel that is disposed on the display means and outputs coordinate information of a contact point, and a control means that sets a region around a contact point as an illumination region when contact with the touch panel is made at one point and sets a region interposed between a first contact point and a second contact point as the illumination region when contact with the touch panel is made at two points based on the coordinate information of the contact point. |
| US10134312B2 |
Interchangeable covers for stanchions
Certain embodiments disclose a cover fitting over the base of a stanchion. Printed graphics may be included on the cover. The cover may be selectively removed and replaced with a different cover. |
| US10134307B2 |
Software application for a portable device for CPR guidance using augmented reality
A method for guiding a user in performing a Cardio-Pulmonary Resuscitation (CPR) procedure on a patient involving a user portable device comprising a camera, and a display. The method includes receiving a video of the patient captured by the camera, and processing the video to segment a chest region of the patient. A target position on the chest where to position hands for performing CPR is then determined, and this position is then shown on the display, hereby guiding the user in obtaining a suitable hand position for performing CPR. The method can be implemented as a software application in a personal portable device such as a smart phone, a tablet application software, a wearable computer with head-mounted display etc. Further, the video of the scene captured by the camera can be processed to provide information regarding functional quality of CPR, e.g. compression frequency and depth, during the CPR procedure. Further, vital signs of the patient such as heart rate, respiration rate, and blood oxygen saturation may be derived by image processing on the video, i.e. without any dedicated medical sensors. All such information can be provided as visual and/or audible feedback to the user during the CPR procedure, thus improving CPR effectiveness, also in case of an untrained user. |
| US10134306B2 |
Apparatus for simulating insertion of an elongated instrument into a structure and medical insertion simulator
The present disclosure relates to an apparatus for simulating insertion of an elongated instrument attached to a tether into a structure. The apparatus comprises a casing having an aperture for receiving a distal end of the tether therethrough. The apparatus has a pulley having an outer tether receiving groove on a peripheral portion and an anchoring element therein for anchoring the distal end of the tether, the pulley rotating according to a longitudinal translation of the tether relatively to the casing. The apparatus has a sensing arrangement for sensing an angular position of the pulley representative of a relative longitudinal position of the elongated instrument. The apparatus has a feedback force actuator for applying an adjustable resistive force to a rotation of the pulley according to the sensed angular position and resistance characteristics of the structure. The present disclosure also relates to a medical insertion simulator comprising such an apparatus. |
| US10134304B1 |
Scanning obstacle sensor for the visually impaired
Various arrangements for avoiding obstacles for a visually-impaired pedestrian are presented. An m by n matrix of distance measurements may be created using a scanning time of flight (ToF) sensor component for various different directions. The m by n matrix of distance measurements and the m by n direction matrix may be analyzed to identify a first obstacle having a vertical height that differs by at least a predefined threshold measurement from a neighboring second region. Based on identifying the first obstacle, an indication of the first obstacle and an indication of the distance to the first obstacle determined using the m by n matrix of distance indications may be output. |
| US10134300B2 |
System and method for computer-assisted instruction of a music language
The subject matter discloses a computerized system to assist teaching and learning a written music language the system comprising a processor configured to obtain a reference music data object, wherein the reference music data object comprises a sequence of note properties, said note properties comprise one or more note parameters; extract the note properties from the music data object; determine an associated note syllable based on the note properties; generate a visual music notation according to the note properties, and generate a synthesized solfege singing sound according to the determined note syllable and the note properties; a display unit configured to display the music notation; and, an audio generation unit configured to output the synthesized solfege singing sound to a user of the computerized system. |
| US10134299B2 |
Systems and methods for flight simulation
Systems and methods are provided for training a user to control an unmanned aerial vehicle (UAV) in an environment. The systems and methods provide a simulation environment to control a UAV in a virtual environment. The virtual environment closely resembles a real flight environment. The controller used to transmit flight commands and receive flight state data can be used in both simulation and flight modes of operation. |
| US10134294B2 |
System, apparatus, and method using ADS-B and TCAS data for determining navigation solutions for a vehicle
A system using automatic dependent surveillance-broadcast (ADS-B) data and traffic alert and collision avoidance system (TCAS) data for determining navigation solutions for a vehicle is provided. The system has a communal position system (CPS) with a CPS sensor located in the vehicle. The CPS sensor receives ADS-B data and TCAS data from each of one or more proximate vehicles. The system further has a computer system coupled to the CPS. The computer system is configured to perform the steps of: checking the ADS-B data and the TCAS data for data reasonableness; performing data synchronization of the ADS-B data and the TCAS data; and computing a CPS position and a position accuracy based on the ADS-B data and the TCAS data. The navigation solutions include an alternate navigation solution, an independent navigation solution, and a complementary navigation solution. |
| US10134293B2 |
Systems and methods for autonomous drone navigation
Described are systems, methods, and computer readable medium for a drone navigation system. Exemplary embodiments provide a drone with an imaging device and a computing device in communication with the drone. The computing device receives a selection of a CAD blueprint that includes measurements of an interior portion of a building, and receives a start point and an end point on the blueprint. The computing device analyzes the blueprint and generates a route from the start point to the end point, and determines a first set of instructions in terms of distance and degrees to navigate the generated route. The computing device processes the first set of instructions to generate a second set of instructions in terms of yaw, pitch and roll. The second set of instructions are exported to the drone to cause the drone to navigate the generated route in the building. |
| US10134291B2 |
System and method for management of airspace for unmanned aircraft
A system and method for management of airspace for unmanned aircraft is disclosed. The system and method comprises administration of the airspace including designation of flyways and zones with reference to features in the region. The system and method comprises administration of aircraft including registration of aircraft and mission. A monitoring system tracks conditions and aircraft traffic in the airspace. Aircraft may be configured to transact with the management system including to obtain rights/priority by license and to operate in the airspace under direction of the system. The system and aircraft may be configured for dynamic transactions (e.g. licensing/routing). The system will set rates for licenses and use/access to the airspace and aircraft will be billed/pay for use/access of the airspace at rates using data from data sources. |
| US10134285B1 |
FleetCam integration
A system and method for integrating a vehicular camera system is disclosed. A threshold value for metadata of one or more sensor devices and the vehicular camera system positioned in a first carrier vehicle is determined. Captured metadata is processed to determine whether the threshold value is exceeded, and a plurality of images is captured by one or more cameras of the vehicular camera system for a predetermined period, in response to exceeding the threshold value for metadata of the one or more sensor devices. The plurality of metadata is linked with each image from the plurality of captured images by matching the collection time of the metadata with the collection time for each image from the plurality of captured images, and a first image selected from the plurality of captured images is communicated along with the metadata linked to the first image, to at least one electronic device. |
| US10134283B2 |
Road surface image-drawing system for vehicle
In this invention, letters that can be seen by a pedestrian (101) are drawn on an intersection (103). A mark (MM2) that can be seen by the driver of the host vehicle (C) is drawn on the road (104) between the intersection (103) and the host-vehicle (C). The shapes of the letters (MO4) are corrected in accordance with the positional relationship between the pedestrian (101) and the intersection (103). The shape of the mark (MM2) is corrected in accordance with the positional relationship between the driver of the host-vehicle (C) and the road (104). |
| US10134281B2 |
Collision avoidance system and collision avoidance method
Route information indicating a preset route is acquired. Host vehicle position information indicating the position of a host vehicle is acquired. It is detected whether a direction indicator providing advance notice of a traveling direction of the host vehicle is on or off. If the position of the host vehicle agrees with a position on the route, the position of the host vehicle approaches a position to turn on the route, and it is detected that the direction indicator is off, a warning operation pertaining to a warning directed at another vehicle traveling in the vicinity of the host vehicle is performed. |
| US10134277B2 |
Method and system for providing traffic information
A method for prompting traffic condition information, comprising: a server obtaining traffic condition information about a road network (101); a client determining a candidate driving route and sending to the server a traffic condition information request aiming at the candidate driving route, and the server receiving the traffic condition information request, extracting traffic condition information about the candidate driving route from the traffic condition information about the road network, and sending to the client the traffic condition information about the candidate driving route; alternatively, the server actively sending to the client the traffic condition information about the road network (102); and the client displaying the traffic condition information provided by the server (103). The method can prompt traffic condition information in time, thereby improving the reminding efficiency; it can also be applied in various terminal devices, and can be used across platform terminals, thereby having a wide scope of application. |
| US10134274B2 |
Remote control with enhanced modularity
Various devices, systems, products and methods for customizing a remote control are presented. Sensors are optionally used to aid in the identification of users and user specific remote control configurations and layouts are optionally automatically loaded upon determination that a different user is handling the remote control. The devices, systems, products and methods are useful for minimizing inadvertent changes to system setting and modes due to unanticipated or accidental presses of buttons on a remote control. |
| US10134271B1 |
Vehicle integration with security and/or automation systems
A system and method for controlling a security and/or automation system using a aspects of a vehicle. The method may include receiving confirmation of a user's presence in the vehicle, receiving confirmation of vehicle operation, displaying on a display of the vehicle at least one control option for a security and/or automation system of a property monitored by the security and/or automation system, receiving at least one user input on the display related to the at least one control option, and transmitting instructions to control the security and/or automation system based on the at least one user input. |
| US10134267B2 |
System and method for tracking a passive wand and actuating an effect based on a detected wand path
A system in accordance with present embodiments includes a source of electromagnetic radiation that operates to emit electromagnetic radiation into an active playing area. The system also includes a sensing device that operates to receive the electromagnetic radiation after being reflected from a retro-reflective material of an article positioned in the active playing area and operable to generate data based on receiving reflected electromagnetic radiation from a series of article positions. Further, the system includes a controller that operates to process the data generated by the sensing device to determine whether the series of article positions correlate to a stored gesture and output a control signal to actuate an effect when the series of article positions correlate to the stored gesture. |
| US10134263B2 |
Multi alarm remote monitoring system
A remote alarm monitoring system (10) for recording and processing alarm event data. The alarm system (10) comprises one or more alarm devices (12) in connection with an interface (14), wherein the interface (14) is configured to receive alarm event data; a server (18) in communication with the interface (14), wherein the server (18) is configured to receive and process alarm event data from the interface (14); and one or more networked client devices (22) in communication with the server (18), wherein the server (18) is configured to transmit a message to the networked client device (22), said message based upon the processed alarm event data. |
| US10134261B1 |
Method and apparatus for vehicular item tracking
A vehicle comprising includes lights and a controller. The controller, responsive to reception of signals indicative of an opening and closing of a door of the vehicle, the vehicle being within boundaries of a predetermined locale, and an item being within the vehicle, blinks the lights. |
| US10134259B2 |
Asset-based weather and event alerts
In an approach for asset management, a processor identifies the location of an asset. A processor receives information specific to the location of the asset. A processor determines that an alert is required based on at least the asset, the location of the asset, and the information specific to the location of the asset. A processor generates an alert. |
| US10134258B2 |
Car occupant temperature alert
Improvements in an abandoned baby, infant, child or animal alter system is disclosed. When a child or animal is being transported with a driver in the vehicle, the driver will generally maintain a comfortable temperature in the interior of the vehicle. The temperature and temperature changes are monitored to determine that a child or animal is unattended. The monitor is coupled with a connection in the car, a seat belt of a baby seat or integrated into the baby seat. Integrating the sensor with a seat belt or buckle provides a switch for operation of the sensor. The signaling system can be integrated with the light, horn or alarm or can be connected to a cellular network, Wi-Fi or other radio communications system to send a notification that a baby, infant, child or animal has been left and secured in a vehicle and needs attention. |
| US10134252B1 |
Dual-sided security marker
Systems and methods for making a marker. The methods comprise: obtaining a marker housing having first and second cavities formed therein; disposing a first resonator in the first cavity and a second resonator in a second cavity; and placing a bias element at a location on or in the marker so that the first and second resonators are (a) equally spaced apart from the same bias element and (b) biased by the same bias element when the marker is in use to oscillate at a frequency of a received transmit burst. |
| US10134251B2 |
Wrap for an item of merchandise
A merchandise security device configured for use with an electronic key for locking and/or unlocking a lock mechanism is provided. The merchandise security device may include a housing operably coupled with a cable, wherein the cable is configured to be extended and retracted relative to the housing and to at least partially surround an item of merchandise. The security device may also include a lock mechanism configured to releasably secure the cable relative to the housing for locking the cable about the item of merchandise. In addition, the lock mechanism is configured to receive electrical power for unlocking the lock mechanism so that the housing and the cable may be removed from the item of merchandise. |
| US10134247B2 |
Active emergency exit systems for buildings
An active exit system may include one or more active exit signs, each exit sign having at least one sensor, a display, and a transceiver. Each active exit sign monitors building environmental conditions, monitors the locations of users and objects within the building, and assists in location services during normal operation. The exit signs transmit a dynamic exit plan to a user's electronic device based on the user's location. In response to sensing an emergency event, the exit sign transmits an emergency signal to the user's electronic device and updates a user's exit plan as needed based on the location of the emergency event. The exit sign also transmits user location information to emergency responders. |
| US10134246B2 |
Signaling device with light module
An optical signaling device, in particular a signal pillar (1) of modular construction or similar with at least one first exchangeable light module (3) comprising at least one light element (10) is proposed for optical indication of one or more different operating states of a technical device (2) such as a machine, a plant, a vehicle or similar, wherein the first light module (3) comprises at least one first circuit board (11) oriented essentially in direction of a longitudinal axis (8) of the signaling device with the at least one first light element (10) and electrical components, wherein at least one contact (32) is provided between at least one first detachably contactable electrical contact surface (19) and a second electrical contact surface (18) of an adjacently arranged module (3, 4, 5, 6, 7) configured as a second light module (3) and/or as a holding module (5) and/or as a base module (6) for holding and connecting the signaling device at an operating position, wherein the adjacently arranged module (3, 4, 5, 6, 7) comprises at least one second circuit board (11) oriented essentially in direction of the longitudinal axis (8), which meets stringent requirements as regards the contacting between two adjacent modules and at the same time the constructional expenditure and/or realizes an improved energy/power supply of the modules. According to the invention this is achieved in that at least the two electrical contact surfaces (18, 19) of the contact (32), which can be detachably contacted with each other, are arranged between the first circuit board (11) and the second circuit board (11) in direction of the longitudinal axis (8). |
| US10134245B1 |
System, method, and apparatus for monitoring audio and vibrational exposure of users and alerting users to excessive exposure
A system, method, and apparatus for monitoring ambient sound and vibration levels at the location of a user allows a determination as to whether the user is exceeding a maximum allowed exposure time as determined by an occupational standard. The sound and vibration level data can be evaluated locally at the mobile communication device, as well as transmitted to a backend system to allow supervision of personnel associated with the backend system as a further assurance that personnel comply with exposure limits. Further, the mobile communication device, in response to ambient conditions, adjusts the settings of its alerting sound and the vibration level of an associated vibration accessory to ensure perception of alerts by the mobile communication device for the user of the mobile communication device. |
| US10134242B2 |
Systems and methods for allowing players to play poker games having multiple decks
A system for providing a poker-type card game to a plurality of players is described herein. The system includes a display device for displaying the game, a database for storing a plurality of player decks, and a controller coupled to the database. The controller is configured to provide a plurality of player decks with each of the plurality of player decks including a set of randomly-ordered playing cards, assign a player deck of the plurality of player decks to each of the plurality of players, and conduct a first round of the game. During a round, the controller distributes a player hand to each of the plurality of players. Each of the player hands includes one or more cards being distributed from a corresponding player deck assigned to the player. |
| US10134241B2 |
Gaming device and method for poker game having additional award opportunities
Embodiments of the present invention set forth systems, apparatuses and methods for facilitating a poker game having additional award opportunities. Accordingly, a gaming device can be configured to include a display, a player interface, and a processor configured to deal a first poker hand and evaluate the first poker hand. The processor is further configured to deal at least one additional card to the first poker hand to create a second poker hand, and to then evaluate the second poker hand. |
| US10134240B1 |
Types of games based on user-selected game pieces, and game-operating computer systems and computer-implemented methods thereof
In some embodiments, the present invention provides for a specifically programmed game operating computer system for conducting a personalized game requiring each player to only select a single player-selected game piece to play a personalized instance of the game, where the exemplary system includes following components: a specialized computer machine, including: a non-transient memory, storing program code; and a processor configured to perform: requiring, in real-time, via a graphical interface, each player to select a single player-selected game piece out of a pool of game pieces; receiving, in real time, from each player: a selection of the single player-selected game piece and a player-defined size of a set of drawn game pieces; dynamically self-adjusting, in real time, a personalized self-adjusting payout table; and dynamically conducting at least one drawing where each drawn game piece is selected from a full pool of the pool of game pieces. |
| US10134239B2 |
System, method and computer readable recording medium for providing game through connection with challenge opponent
A method for providing a game through a connection with a challenge opponent, performed by a game service platform server managing a plurality of games, the method including: receiving challenge game selection information and challenge opponent request information of a challenge applicant from a first user terminal; transmitting challenge application information to a second user terminal, which is a terminal of at least one member specified based on the challenge opponent request information; and setting the member accepting a challenge to the challenge opponent based on challenge acceptance information received from the second user terminal. The first user terminal and the second user terminal execute a game service platform managing the plurality of games and provide the challenge opponent request information and the challenge acceptance information through the game service platform, respectively. |
| US10134238B2 |
Method of gaming, a game controller and a gaming system
A method of gaming comprising: conducting a game requiring a player to make a choice between at least one optimal action and at least one sub-optimal action having a lower return to player than the optimal action such that the difference between the sub-optimal action and the optimal action represents a lost return to player; receiving a player choice of an action; and conducting a trial for an award in which the probability of success is controlled to provide an expected return to player from the trial that compensates the player for the lost return to player in response to determining that the choice is a sub-optimal action. |
| US10134234B2 |
System and method for integrated multiple source player cash access
The present invention relates to a system and method for integrating player tracking and cash access in a casino or other gaming environment. One aspect of the invention allows for fund access and management wherein gaming machines, such as slot machines or on-line virtual gaming machines, receive playable credits directly from a patron's banking or credit card account. Another aspect of the present invention relates to integrating player tracking and cash access transactions by allowing the players to provide a player tracking card for each financial transaction conducted in a gaming environment. In return, the casino issues gaming or bonus points to the players for allowing their transactions to be tracked. Yet another aspect of the present invention consolidates the players' financial account information into a single casino database. Players can subsequently credit or debit cash from the players' financial accounts using any associated customer identification cards or otherwise receive such credits in other forms that permit negotiations, including quasi-cash documents. |
| US10134232B2 |
Casino gaming exchange market
In a cashless gaming environment, a gaming patron has accounts and may accumulate winnings as well as different types of awards. Methods for efficiently exchanging the awards are disclosed. A secondary market is established for trading different goods and services. Liquidity of credits and awards is established. |
| US10134227B1 |
Systems and methods for making game content from a single online game accessible to users via multiple platforms
A system and method that makes game content from a single online game accessible to users via multiple platforms. The multiple platforms may include virtual reality platforms and non-virtual reality platforms. Amounts of gameplay of the online game by the users via the virtual reality platforms may be monitored. The gameplay of the online game via the virtual reality platforms may be limited. As such, responsive to the amounts of gameplay by the users reaching gameplay thresholds, access to the online game through the first platform is restricted for the users until corresponding requirements are satisfied. The users may be able to play the online game via the non-virtual reality platforms while the gameplay of the online game via the virtual reality platforms is restricted. |
| US10134225B2 |
Controlling wagering game peripherals
A wagering game system and its operations are described herein. In some embodiments, the operations can include establishing a connection with an input device, from a plurality of input devices configured for user input, for use in a wagering game during a wagering game session. The operations can further include receiving input data from the input device, wherein the input data has a first format specific to the input device, and wherein the wagering game requires the input data in a second format different from the first format. The operations can further include converting the input data from the first format to the second format required by the wagering game, and providing the input data to the wagering game in the second format for use as the user input for the wagering game. |
| US10134220B2 |
Method and system for authorizing access to goods and/or services at a point of sale and corresponding point of sale
A system and method for authorizing access to goods and/or services at a point of sale is disclosed. An access voucher may be issued and presented to a reading means of the point of sale. At least one good and/or service of the point of sale can be selected by the user and the corresponding identification can be transferred to the internal processing unit. A comparison can be performed. If the transferred identification of the user matches an identification of the user, and if the transferred identification of the goods and/services matches an identification of the goods/and services, the user profile data and the access parameter can be retrieved. An authorization can be transferred to the point of sale if the user profile data correspond to the access parameter for the goods and/or services. |
| US10134218B2 |
Network connected dispensing device
A device may obtain sensor data regarding the vending device. The device may transmit the sensor data via a network connection for processing by a server. The server may store a data model. The server may be associated with identifying a response action associated with altering a configuration of the vending device. The device may receive information identifying the response action based on transmitting the sensor data via the network connection. The device may cause the response action to be performed based on receiving the information identifying the response action. The response action may be associated with altering a status of a component of the vending device. The device may provide information associated with identifying the status of the component. |
| US10134216B2 |
Bill magazine with an anti-string feature for use with a vending machine
A bill magazine for a vending machine that is configured to prevent bills from being removed from the magazine. The magazine includes an interior space sized to hold the bills. Blades are positioned along the magazine. The blades contact against the top-most bill in the magazine. The blades include teeth that engage with the bill in the event there is an attempt to remove it from the magazine. |
| US10134215B2 |
Security device for security document
A security device for verifying an authenticity of a security document comprises an at least partially transparent substrate with a first surface and a second surface. A first pattern is arranged on the first surface. This first pattern is derivable using a first seed pattern. A second pattern is arranged on said second surface. This second pattern is derivable using the first seed pattern and using a second seed pattern. Transmittances and reflectivities of the first and second patterns are selected such that in a reflection viewing mode, only the first seed pattern is visible. In a transmission viewing mode, however, only the second seed pattern is visible. |
| US10134210B1 |
Vehicle tracking system using smart-phone as active transponder
A system is described for tracking vehicle position using a smart phone or similar device as an active transponder that communicates with roadside equipment. The system may uses existing RF transceivers on the smart-phone, such as Bluetooth® LE or WiFi to periodically transmit an identifying message. Road-based equipment detects and locates the smart phone. In a further aspect, the smart phone is alerted by roadside beacons and responds with identification information. Transaction processing may be performed either on the smart phone or by roadside or back office equipment. The system may be used for automated roadway tolling and monitoring and also for access control. A coded card may be scanned by the smart card to enter identification for access control. |
| US10134207B2 |
Securing SCADA network access from a remote terminal unit
A first message from a remote terminal unit (RTU) is received, where the first message indicates that a motion has been detected. In response to receiving the first message, a timer is started at a supervisory control and data acquisition (SCADA) server. Whether a personal identification number (PIN) verification and a radio-frequency identification (RFID) verification have succeeded is determined before the timer expires. In response to determining that at least one of the PIN verification or the RFID verification fails, a communication port connecting the RTU with the SCADA server is disabled. |
| US10134206B2 |
Method and apparatus for video composition, synchronization, and control
A system includes a smart-phone processor configured to receive a video recording feed from a camera. The processor is also configured to receive a vehicle data feed from a vehicle connected to the processor. The processor is further configured to convert the vehicle data feed into images. The processor is additionally configured to add the images to the video recording feed in real-time and save a combined feed including the video and images resulting from the adding. |
| US10134201B2 |
Parking meter system
A parking meter includes a housing, processor, memory, network interface, display screen, first camera facing outward from the first side of the housing, second camera facing outward from the housing towards a parking space, and a payment acceptor. The meter is configured to sense a vehicle's presence in the parking space, capture an identification of the vehicle, transmit the identification to a remote networked computer system, determine that a parking violation has occurred, transmit the notice to the remote computer system, accept payment of fines, transmit notice of fine payment to the remote computer system, reset the parking time period to zero upon the vehicle's exit from the parking space, and receive updated parking rate parameters by the processor from the remote computer system via the network interface. |
| US10134199B2 |
Rigging for non-rigid structures
Techniques for animating a non-rigid object in a computer graphics environment. A three-dimensional (3D) curve rigging element representing the non-rigid object is defined, the 3D curve rigging element comprising a plurality of knot primitives. One or more defined values are received for an animation control attribute of a first knot primitive. One or more values are generated, for a second animation control attribute for a second knot primitive, based on the plurality of animation control attributes of a neighboring knot primitive. An animation is then rendered using the 3D curve rigging element. More specifically, one or more defined values for the first attribute of the first knot primitive and the generated value for the second attributes of the second knot primitive are used to generate the animation. The rendered animation is output for display. |
| US10134198B2 |
Image compensation for an occluding direct-view augmented reality system
Image compensation for an occluding direct-view augmented reality system is described. In one or more embodiments, an augmented reality apparatus includes an emissive display layer for presenting emissive graphics to an eye of a user and an attenuation display layer for presenting attenuation graphics between the emissive display layer and a real-world scene to block light of the real-world scene from the emissive graphics. A light region compensation module dilates an attenuation graphic based on an attribute of an eye of a viewer, such as size of a pupil, to produce an expanded attenuation graphic that blocks additional light to compensate for an unintended light region. A dark region compensation module camouflages an unintended dark region with a replica graphic in the emissive display layer that reproduces an appearance of the real-world scene in the unintended dark region. A camera provides the light data used to generate the replica graphic. |
| US10134197B2 |
Computer graphics presentation systems and methods
A data processing unit generates graphics data that are sent to a display screen of a head-mountable structure worn by a user. Thereby, the user can observe the image data, which reflect a virtual reality environment implemented by the data processing unit, namely image data representing a field of view as seen by the user from a particular position and in a particular direction in the virtual reality environment. The head-mountable structure includes a first light source projecting a well-defined light pattern on a light-reflecting surface. The data processing unit is associated with an image registering unit recording image data representing the first well-defined light pattern. The data processing unit calculates the graphics data based on the image data. |
| US10134188B2 |
Body-centric mobile point-of-view augmented and virtual reality
Embodiments of a system and methods for displaying virtual or augmented reality are generally described herein. An image of a user may be captured using a camera. Real space in the image may be mapped and a first orientation may be determined relative to a static portion of the user, using the image. A first portion of a virtual reality image may be displayed on a display screen. In response to determining a second orientation of the device relative to the static portion of the user, a second portion of the virtual reality image may be displayed on a display screen. |
| US10134184B2 |
Method of rendering object including path and rendering apparatus for performing path rendering
A method to render an object including a path includes: determining a split line to split a frame; allocating information about the path to a first tile through which the path passes and to a second tile located between the first tile and the split line, among tiles included in the frame; and determining respective winding numbers for the first tile and the second tile, based on information about the allocated path. |
| US10134182B1 |
Large scale dense mapping
A large scale dense mapping technique utilizes range data that identifies points in three dimensions. The large scale dense mapping technique utilizes the range data obtained from range sensors coupled with a depth integration technique. After dividing the world, or a portion of the world, into cells and voxels, a mapping system collects range data for a portion of the environment. To speed up the processing involving the large number range measurements, Graphics Processing Unit (GPU) memory, can be used to store data relating to the mapping of the environment. Instead of storing all of the cells of volumetric representation in the memory, just the portion of the cells associated with the range data are stored within the memory. The mapping system can use an SDF or a TSDF based volumetric representation format to represent the environment. The SDF or TSDF based volumetric representation is updated using the range data. |
| US10134181B2 |
System and method for simulating realistic clothing
A system generates a clothing deformation model which models one or more of a pose-dependent clothing shape variation which is induced by underlying body pose parameters, a pose-independent clothing shape variation which is induced by clothing size and underlying body shape parameters and a clothing shape variation including a combination of the pose-dependent clothing shape variation and/or the pose-independent clothing shape variation. The system generates, for an input human body, a custom-shaped garment associated with a clothing type by mapping, via the clothing deformation model, body shape parameters of the input human body to clothing shape parameters of the clothing type and dresses the input human body with the custom-shaped garment. |
| US10134177B2 |
Method and apparatus for adjusting face pose
A method and an apparatus for adjusting a pose in a face image are provided. The method of adjusting a pose in a face image involves detecting two-dimensional (2D) landmarks from a 2D face image, positioning three-dimensional (3D) landmarks in a 3D face model by determining an initial pose of the 3D face model based on the 2D landmarks, updating the 3D landmarks by iteratively adjusting a pose and a shape of the 3D face model, and adjusting a pose in the 2D face image based on the updated 3D landmarks. |
| US10134169B2 |
Image loads, stores and atomic operations
One embodiment of the present invention sets forth a method for accessing texture objects stored within a texture memory. The method comprises the steps of receiving a texture bind request from an application program, wherein the texture bind request includes an object identifier that identifies a first texture object stored in the texture memory and an image identifier that identifies a first image unit, binding the first texture object to the first image unit based on the texture bind request, receiving, within a shader engine, a first shading program command from the application program for performing a first memory access operation on the first texture object, wherein the memory access operation is a store operation or atomic operation to an arbitrary location in the image, and performing, within the shader engine, the first memory access operation on the first texture object via the first image unit. |
| US10134168B2 |
Dynamically supporting custom dependencies during three-dimensional character animation
One embodiment of the present invention includes a double solve unit that configures a kinematic chain representing an animated character. The double solve unit generates a first solution for the kinematic chain based on a first solving order. While generating the first solution, the doubles solve unit determines the recursion depth of each output connector included in the kinematic chain. Subsequently, the double solve unit identifies any output connectors for which the recursion length exceeds a corresponding expected recursion depth—indicating that a custom recursive dependency exists that is not reflected in the first solution. For these custom recursive output connectors, the double solve unit creates a second solving order and generates a more accurate solution. Advantageously, identifying the custom recursive dependencies as part of the solution process enables the double solve unit to portray animated movements without incurring the quality degradation or prohibitive execution time of conventional techniques. |
| US10134165B2 |
Image distractor detection and processing
Image distractor detection and processing techniques are described. In one or more implementations, a digital medium environment is configured for image distractor detection that includes detecting one or more locations within the image automatically and without user intervention by the one or more computing devices that include one or more distractors that are likely to be considered by a user as distracting from content within the image. The detection includes forming a plurality of segments from the image by the one or more computing devices and calculating a score for each of the plurality of segments that is indicative of a relative likelihood that a respective said segment is considered a distractor within the image. The calculation is performed using a distractor model trained using machine learning as applied to a plurality images having ground truth distractor locations. |
| US10134160B2 |
Anti-aliasing for graphics hardware
Visibility may be analytically resolved rather than using point-sampling, thereby entirely avoiding geometric aliasing and the need to store multiple samples per pixel. By relying on existing techniques for shading, i.e., by shading once per fragment and focusing on visibility, visual results may be equivalent to multi-sampled anti-aliasing (MSAA) using an infinite sampling rate in some embodiments. |
| US10134159B1 |
Data-model-driven visualization of data sets
The disclosed embodiments provide a system that processes data. During operation, the system obtains a data set and metadata corresponding to a data model, wherein the data model includes a metric and a set of dimensions associated with the metric. Next, the system applies a set of rules to the data set to obtain a deconstruction of the metric by the set of dimensions. Finally, the system displays the deconstruction in one or more charts to a user independently of a domain of the data set. |
| US10134158B2 |
Directional stamping
Systems, methods, and software are disclosed herein for supporting directional stamping. In an implementation, an input stroke is received on a canvas in a user interface to an application. The application identifies at least a directional effect with which to render each of a set of discontinuous objects along a continuous path taken by the input stroke on the canvas. The application then renders the set of discontinuous objects on the canvas along the continuous path with at least the directional effect identified for each discontinuous object. |
| US10134156B2 |
Method and evaluation device for evaluating projection data of an object being examined
In a method and an evaluation device for the evaluation of projection data of an object being examined, which are determined along a trajectory in a multiplicity of projection positions relative to a co-ordinate origin, a particular trajectory function is determined for the projection positions, for each of a multiplicity of positions from a reconstruction region of dimension n by establishing an offset (d) and a direction vector at the co-ordinate origin, establishing a hyperplane of dimension n−1 which runs perpendicular to the direction vector and has an offset to the co-ordinate origin, establishing a number of intersection points where the hyperplane intersects the trajectory, establishing a derivative vector of the trajectory according to its trajectory path and calculating the derivative vector in the projection position, and establishing an absolute value of a scalar product between the derivative vector and the position and dividing the absolute value by the number. The determined trajectory functions are transformed to a frequency domain of dimension n and the projection data are evaluated by means of the transformed trajectory functions. |
| US10134152B2 |
Method and system for determining cells traversed by a measuring or visualization axis
A method to locate material bodies on an at least 2-dimensional occupancy grid G, having a first resolution stepsize RG, that includes a set of cells represented by vertices and segments connecting these vertices. The method uses a sensor for detecting an obstacle which is positioned at source point S, and includes at least the following steps: acquisition by the sensor of a measurement of the position of a material body detected at a point F; defining the coordinates of a point M by using a space discretized with the aid of a spatial stepsize δ which is finer than the resolution stepsize RG, initializing an integer, error parameter, and calculating the value of the error parameter for at least one first vertex of the cell of the current grid. |
| US10134151B2 |
Verification method and system for people counting and computer readable storage medium
A verification method for people counting includes steps of displaying a people counting video by a display device, wherein the people counting video shows an entry and exit boundary and an accumulated number of persons; when at least one person exists in the people counting video, displaying an initial position and a current position of each of the at least one person by the display device; determining whether each of the at least one person passes across the entry and exit boundary according to the initial position and the current position of each of the at least one person by a user, so as to determine whether the accumulated number of persons is incorrect; and when the user determines that the accumulated number of persons is incorrect, receiving a modified number of persons from the user by an input device. |
| US10134148B2 |
Method of assessing breast density for breast cancer risk applications
Breast density is a significant breast cancer risk factor measured from mammograms. Disclosed is a methodology for converting continuous measurements of breast density and calibrated mammograms into a four-state ordinal variable approximating the BI-RADS ratings. In particular, the present disclosure is directed to a calibration system for a specific full field digital mammography (FFDM) technology. The calibration adjusts for the x-ray acquisition technique differences across mammograms resulting in standardized images. The approach produced various calibrated and validated measures of breast density, one of which assesses variation in the mammogram referred to as Vc (i.e. variation measured from calibrated mammograms). The variation in raw mammograms [i.e. Vr] is a valid breast density risk factor in both FFDM in digitized film mammograms. |
| US10134144B2 |
System and method for determining dynamic physiological information from four-dimensional angiographic data
A system and method are provided for generating time resolved series of angiographic volume data having flow information. The system and method are configured to receive angiographic volume data acquired from a subject having received a dose of a contrast agent using an imaging system and process the angiographic volume data to generate angiographic volume images. The angiographic volume data is processed to derive flow information by determining a distance between two points along a vessel in the angiographic volume images and determining a phase at each of the two points along the vessel in the angiographic volume images. A flow direction or a velocity of flow within the vessel is determined using the distance between the two points along the vessel and the phase at each of the two points along the vessel. |
| US10134143B2 |
Method for acquiring retina structure from optical coherence tomographic image and system thereof
The present disclosure provides a method for acquiring a retina structure from an optical coherence tomographic image and a system thereof. The method comprises: calculating a region of interest (ROI) image of a source image; performing a Gaussian filtering of the ROI image; calculating a first estimated boundary position of a first layer boundary and a second estimated boundary position of a second layer boundary using a multi-resolution method; refining the first layer boundary and the second layer boundary respectively using a simplified active contour model according to the first estimated boundary position and the second estimated boundary position, to obtain a first initial boundary position of the first layer boundary and a second initial boundary position of the second layer boundary; smoothing the first initial boundary position and the second initial boundary position using a filtering method; acquiring segmentation positions of rest layer boundaries in the ROI image according to a segmented position of the first layer boundary and a segmented position of the second layer boundary. The present disclosure can improve the calculation speed and reduce the calculation complexity while maintaining high location accuracy. |
| US10134142B2 |
Optimization of parameters for segmenting an image
The present invention relates to a device for segmenting an image (12) of a subject (14) comprising a data interface (16) for receiving an image (12) of said subject (14) and at least one contour (18) or at least one part of a contour (18), said contour (18) indicating a structure (19) within said image (12), a selection unit (20) for selecting a region (22) in said image (12) divided into a first and a second disjoint part (24, 26) by said contour (18) or said part of said contour (18), said selected region (22) comprising a drawn region and/or a computed region, a classifier (28) for classifying said selected region (22) based on at least one parameter for image segmentation, an analysis unit (29) for defining an objective function based on the classification result, an optimizer (30) for optimizing said parameter set by varying an output of said objective function and an image segmentation unit (32) for segmenting said image (12) using said optimized parameter set. |
| US10134134B2 |
Method and system for creating depth signatures
A method and system for creating a depth signature from plural images for providing watermark information related to the images. The method comprises analyzing a pair of images, each image containing a plurality of elements, identifying a first element in one of the pair of images, identifying plural elements in the other of the pair of images. The method further comprises measuring a disparity parameter between the first element and a set of the plural elements, matching the first element from the set of plural elements, the matched second element having the smallest measured disparity parameter, and computing a signature based at least in part on the measured disparity between the first and second elements. |
| US10134129B2 |
Method and system for hemodynamic computation in coronary arteries
A method and system for computing blood flow in coronary arteries from medical image data disclosed. Patient-specific anatomical measurements of a coronary artery tree are extracted from medical image data of a patient. A reference radius is estimated for each of a plurality of branches in the coronary artery tree from the patient-specific anatomical measurements of the coronary artery tree. A flow rate is calculated based on the reference radius for each of the plurality of branches of the coronary artery tree. A plurality of total flow rate estimates for the coronary artery tree are calculated. Each total flow rate estimate is calculated from the flow rates of branches of particular generation in the coronary artery tree. A total flow rate of the coronary artery tree is calculated based on the plurality of total flow rate estimates. The total flow rate of the coronary artery tree can be used to derive boundary conditions for simulating blood flow in the coronary artery tree. |
| US10134127B2 |
Method for post-processing flow-sensitive phase contrast magnetic resonance images
A method for generating fluid flow images of a region of interest is disclosed. The method includes: scanning the region of interest to acquire a set of 4D-Flow magnetic resonance images, wherein the set comprises an anatomical magnitude image, a first velocity component image, a second velocity component image, and a third velocity component image; isolating the anatomical magnitude image, the first velocity component image, the second velocity component image, and the third velocity component image from the set of 4D-Flow magnetic resonance images; converting the first, second, and third velocity component images into a velocity vector field; modeling a location of an anatomical wall within the region of interest; calculating at least one flow dynamics parameter for the region of interest; and generating a visual representation of the anatomical wall and the at least one flow dynamics parameter. |
| US10134125B2 |
Systems and methods for ultrasound imaging
Techniques for processing ultrasound data. The techniques include using at least one computer hardware processor to perform obtaining ultrasound data generated based, at least in part, on one or more ultrasound signals from an imaged region of a subject; calculating shadow intensity data corresponding to the ultrasound data; generating, based at least in part on the shadow intensity data and at least one bone separation parameter, an indication of bone presence in the imaged region, generating, based at least in part on the shadow intensity data and at least one tissue separation parameter different from the at least one bone separation parameter, an indication of tissue presence in the imaged region; and generating an ultrasound image of the subject at least in part by combining the indication of bone presence and the indication of tissue presence. |
| US10134119B2 |
Image generation device and operation support system
An image generation device generates an output image based on an input image captured by a camera attached to a shovel. Further, the image generation device includes an output image generation unit that associates a value of an input pixel in the input image with a value of an output pixel in the output image to generate the output image. A value of an output pixel specified by an integer coordinate point on an output image plane is determined based on values of two input pixels specified by two integer coordinate points selected from four integer coordinate points in the vicinity of a real number coordinate point on an input image plane corresponding to the integer coordinate point on the output image plane. |
| US10134118B2 |
Information processing apparatus and method of obtaining information about a projection surface on which a target is projected
An information processing apparatus includes an acquisition unit configured to acquire information about a projection surface on which a projection unit projects a target image, a storage unit configured to store first information indicating a first position, on the projection surface, of the target image projected on the projection surface by the projection unit in a first projection state, and a control unit configured to control a position, on the projection surface, of the target image to move from a second position on the projection surface where the target image is projected by the projection unit in a second projection state to the first position on the projection surface. |
| US10134114B2 |
Apparatus and methods for video image post-processing for segmentation-based interpolation
Apparatus and methods for video image post-processing for segmentation based interpolation. In one embodiment, a computerized apparatus is utilized in order to obtain a first frame of video data; segment one or more objects within the first frame of video data; obtain a second frame of video data; segment one or more objects within the second frame of video data; match at least a portion of the one or more objects within the first frame of video data with the one or more objects within the second frame of video data; compute the motion of the pixels for the matched portion of the one or more objects; compute the motion of pixels associated with a background image; and generate an interpolated frame of video data, the interpolated frame of video data residing temporally between the first frame of video data and the second frame of video data. |
| US10134113B1 |
Digital media environment for removal of interference patterns from digital images
Techniques for removal of interference patterns from digital images are described, in which a spatially-adaptive filter is applied to a pixel based on a context of the pixel. In an example, an edge of an object in a digital image is located in a digital image creation system. Then, context data is generated for a pixel in the digital image. The context data includes a distance from the edge of the object to the pixel. The digital image creation system can also generate color data and luminance data for the pixel, representing a similarity of color and luminance between the pixel and surrounding pixels within the digital image. Then, the digital image creation system constructs a spatially-adaptive filter for the pixel based on the context data for the pixel. The digital image creation system removes an effect of the interference pattern at the pixel in the digital image by applying the spatially-adaptive filter to the pixel. |
| US10134111B2 |
Generating an enhanced image of a predetermined scene from a plurality of images of the predetermined scene
A method, device, system, and article of manufacture are provided for generating an enhanced image of a predetermined scene from images. In one embodiment, a method comprises receiving, by a computing device, a first indication associated with continuous image capture of a predetermined scene being enabled; in response to the continuous image capture being enabled, receiving, by the computing device, from an image sensor, a reference image and a first image, wherein each of the reference image and the first image is of the predetermined scene and has a first resolution; determining an estimated second resolution of an enhanced image of the predetermined scene using the reference image and the first image; and in response to the continuous image capture being disabled, determining the enhanced image using the reference image and the first image, wherein the enhanced image has a second resolution that is at least the first resolution and about the estimated second resolution. |
| US10134107B2 |
Method and apparatus for arranging pixels of picture in storage units each having storage size not divisible by pixel size
A data arrangement method includes following steps: obtaining pixel data of a plurality of first N-bit pixels of a picture; and storing the obtained pixel data of the first N-bit pixels in a plurality of M-bit storage units of a first buffer according to a block-based scan order of the picture. The picture includes a plurality of data blocks, and the block-based scan order includes a raster-scan order for the data blocks. At least one of the M-bit storage units is filled with part of the obtained pixel data of the first N-bit pixels, M and N are positive integers, M is not divisible by N, and the first N-bit pixels include at least one pixel divided into a first part stored in one of the M-bit storage units in the first buffer and a second part stored in another of the M-bit storage units in the first buffer. |
| US10134106B2 |
Method and device for selective display refresh
A method of and device for providing image frames is provided. The method includes outputting portions of a first frame that have changed relative to the one or more other frames without outputting portions of the first frame that have not changed relative to the one or more other frames. Each of the portions are determined to be changed if a rendering engine has written to a frame buffer for a location within boundaries of the portion. This outputting is done in response to one or more portions of a first frame having changed relative to one or more other frames. |
| US10134102B2 |
Graphics processing hardware for using compute shaders as front end for vertex shaders
A GPU is configured to read and process data produced by a compute shader via the one or more ring buffers and pass the resulting processed data to a vertex shader as input. The GPU is further configured to allow the compute shader and vertex shader to write through a cache. Each ring buffer is configured to synchronize the compute shader and the vertex shader to prevent processed data generated by the compute shader that is written to a particular ring buffer from being overwritten before the data is accessed by the vertex shader. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims. |
| US10134097B2 |
Controlling the distribution of energy resources on a smart grid
The present invention relates to a smart grid system and a method for distributing resources in the system. The smart grid system according to the present invention comprises at least one non-shiftable device; at least one controllable device; and at least one shiftable device; wherein price data are provided at each stage, the non-shiftable device is always provided with its resource requirements, the controllable device is provide with resources in the range of its resource requirements, and the shiftable device has its nominal resource requirements but not allowed to be provided with resources at the stage when resource price is highest. |
| US10134095B2 |
System and method for media-centric and monetizable social networking
A method and system connects brands, users and communities via socially shared content elements that take the form of, for example, words, pictures/images, videos and/or audio objects. The method creates a social media engagement and distribution capability of dynamic, interactive impressions linking users to users and users to brands around shared “day in the life” moments. The spectrum of reach and range of content types combined with user daily lives creates a ubiquitous new web medium of social content. The user experience created by this method and system creates a sustainable stickiness for members, capturing, creating, sharing and responding to each other interactively in any communication format, at any time, in any place and for any reason. |
| US10134094B2 |
Display of tax reports based on payroll data and tax profile
Remotely modifying a display of a client. The server transmits first instructions to the client to modify the display to present, on a first area, a plurality of different taxable entities to which the client has access, and to modify the display to present, on a second area, a plurality of different report types. The server determines, based on input from the client, a plurality of different specific forms which relate only to a first subset and are also only within a second subset. The first subset is user input from the first area of a plurality of different taxable entities to which the client has information access. The second subset is user input from the second area of the display from the plurality of different report types. The server transmits second instructions to the client to modify the second area to display only the plurality of different specific forms. |
| US10134089B2 |
Method and apparatus for message flow and transaction queue management
Management of transaction message flow utilizing a transaction message queue. The system and method are for use in financial transaction messaging systems. The system is designed to enable an administrator to monitor, distribute, control and receive alerts on the use and status of limited network and exchange resources. Users are grouped in a hierarchical manner, preferably including user level and group level, as well as possible additional levels such as account, tradable object, membership, and gateway levels. The message thresholds may be specified for each level to ensure that transmission of a given transaction does not exceed the number of messages permitted for the user, group, account, etc. |
| US10134086B2 |
Conversion enhanced auction environment
An environment is established in which a variety of participating entities, including but not limited to auction houses, manufacturers, third party product and service providers, individuals, etc., can interface and benefit from the vast amount of data that is naturally collected or assimilated in the process of evaluating products to be introduced to an auction line. |
| US10134084B1 |
Augmented reality systems for facilitating a purchasing process at a merchant location
A method of facilitating an augmented reality experience to purchase an item at a merchant location may be provided. The method may include storing profile data, receiving location data and environmental data from a computing device associated with the stored profile data. Upon determining that the user device has entered a predefined merchant location, the method may include initiating a sequence of augmented reality modes including at least a first augmented reality mode associated with the selection of an item and a second augmented reality mode associated with the payment of the item. The user device may display virtual content in association with each mode, and upon detecting predetermined user inputs such as gestures, fixed gazes, or moving through thresholds, the system may enable the selection and payment of one or more items by sending a purchase request to a merchant terminal. |
| US10134081B2 |
Single order multiple payment processing
A method and system for providing multiple authorization request messages for multiple products offered by respectively different merchants in a single order are disclosed. If one of the authorization request messages is declined, then an order interrupt message may be sent to the consumer. In order interrupt message may indicate that the single order is canceled, even though authorization request messages for the purchase of other products in the order are approved. |
| US10134078B2 |
Systems and methods for completion of item purchases without merchant interaction
There is provided systems and method for completion of item purchases without merchant interaction. A payment provider may generate a purchase request for a first user, where the purchase request includes a sale of an item to the first user. The purchase request may be generated by first receiving a purchase of an item from another user, where the other user designates that a purchase request should be transferred to the first user. However, the purchase request may also be generated based on purchasing preferences of the first user, such as a specific item that was previously unavailable at a merchant. Once the purchase request is received by the first user, the first user may select a purchase option, which transmits acceptance to the payment provider. The payment provider may then complete the purchase request with the merchant without the first user interacting with the merchant. |
| US10134074B2 |
System for snap and pan of embedded maps within retail store search results and method of using same
A system and method includes receiving a search query for a product to be located in a retail store, obtaining a store map, the store map being indicative of a layout of the retail store, providing one or more search results as a list to the mobile device, each of the one or more search results being associated with a physical location of the product in the retail store, present the store map overlaid with an icon on a graphical display of the mobile device, and changing a location on the store map of the icon to another icon as the customer scrolls the search results displayed on the mobile device, updating the store map by panning/zooming to the changed location on the store map, and providing the changed location of the icon to the physical location on the store map of the currently scrolled to, top-most, product to the mobile device for display. |
| US10134067B2 |
Autocomplete of searches for data stored in multi-tenant architecture
In an example embodiment, identifications of user actions are received from a first user device, the user actions being actions related to identifying data from a multi-tenant database to view. A portion of a first search query is received from a first user device corresponding to a first tenant in a multi-tenant architecture. A list of permissions for the first user device is then obtained. A plurality of fields is retrieved from a multi-tenant database based on the portion of the first search query, the fields obtained from data stored by multiple different tenants in the multi-tenant database, the plurality of fields retrieved being limited to fields for which the first user device has permission to view. Then a plurality of autocomplete suggestions are identified from the plurality of retrieved fields, the identifying based on the user actions. |
| US10134066B2 |
Personalized delivery time estimate system
A personalized delivery estimate system is described. A commercial transaction is generated between a seller and a buyer for an item in an online marketplace. Historical transactions of buyers and sellers in the online marketplace are stored in a storage device. A personalized delivery time estimate is computed for the buyer of the commercial transaction using seller information, buyer information, and item information with the historical transactions of buyers and sellers in the online marketplace. |
| US10134062B2 |
Fixed position multi-state interactive advertisement
Systems and methods for a multi-state advertisement displayed at a fixed position on a primary display space of a display device, such as an electronic device with a display. The fixed position advertisement remains in its fixed position in view of the user as the user scrolls the web page in various directions. A plurality of events trigger a change in the state of the multi-state advertisement, with the change in state resulting in a change of the advertisement content, shape, size, style and appearance. An embodiment deploys an initial video in combination with a billboard. When the interstitial video ends, the fixed position advertisement is sized down to a less obtrusive size, with the billboard and the interstitial video replaced with a navigation bar. |
| US10134061B2 |
Collage-based, integrated advertising systems and methods of advertising
Collage-based, integrated advertising systems and methods of advertising are disclosed. |
| US10134060B2 |
System and method for delivering targeted advertisements and/or providing natural language processing based on advertisements
The system and method described herein may use various natural language models to deliver targeted advertisements and/or provide natural language processing based on advertisements. In one implementation, an advertisement associated with a product or service may be provided for presentation to a user. A natural language utterance of the user may be received. The natural language utterance may be interpreted based on the advertisement and, responsive to the existence of a pronoun in the natural language utterance, a determination of whether the pronoun refers to one or more of the product or service or a provider of the product or service may be effectuated. |
| US10134051B1 |
Methods and systems for audio identification and reward provision and management
Methodologies and apparatuses are provided for identifying audio by analyzing time chunks of audio in the frequency domain, providing rewards associated with identified inputs and managing and monitoring the provision of rewards are provided. |
| US10134049B2 |
Customer service based upon in-store field-of-view and analytics
Concepts and technologies disclosed herein are directed to aspects of customer service based upon in-store field-of-view and analytics. According to one aspect disclosed herein, a store analytics system can collect user information associated with a plurality of users located within an environment. The store analytics system also can collect user device information associated with a plurality of user devices associated with the plurality of users. The store analytics system also can collect estimated fields-of-view associated with the plurality of users. The store analytics system can analyze the user information, the user device information, and the estimated fields-of-view to identify at least one commonality shared among at least two of the plurality of users. The store analytics system can create a logical group. The logical group can include the at least two users of the plurality of users that share the commonality. |
| US10134047B2 |
Audience targeting with universal profile synchronization
Universal synchronization of profiles of audience members targeted for the delivery of content. A unique global identifier may be assigned to and used to manage a profiled audience member. This identifier may also be associated to an authoritative identifier and cookie information used in connection with the collection of profile data. An authoritative identifier may be received in connection with activity, and might not be accompanied by a global identifier. The authoritative identifier may then be used to identify the global identifier, which in turn may be used to identify the cookie related information of record for the profiled audience member. Comparing the cookie related information to previously retained cookie information may be used to determine that the cookie information for a particular, profiled audience member has changed, so that it can be restored. |
| US10134046B2 |
Social sharing and influence graph system and method
Sharing of content by users via the network is facilitated. Sharing suggestions are made to a user, the sharing suggestions including making a suggestion of one or more users with whom the user might wish to share content. A user's influence on other users and the user can be prompted to share content with other users based on the identified influence. |
| US10134045B2 |
Awarding message slots for a consumer mobile device campaign
Techniques and systems are disclosed for forwarding a limited number of vendor messages during a consumer mobile device campaign, such as a CSC campaign. Opt-in events are received from an aggregator's message service platform for a consumer mobile device (e.g., smart-phone), and a time interval is identified for the campaign that comprises a duration for the campaign. Campaign parameters are identified, where the parameters comprise a desired number of campaign messages for the “opted-in” consumer mobile device. Vendors are grouped into one or more campaign message categories (e.g., by service or products), and a bidding frequency is identified for campaign message categories for the campaign duration. Bids are received for message slots at the bidding frequency for a campaign message category, a desired bid is selected if it meets a threshold, and the corresponding vendor message is sent to the opted-in phone(s). |
| US10134042B1 |
Automated vehicle ownership support
A computer system for processing vehicle ownership support data includes an infrastructure platform which includes a plurality of hardware and software components, infrastructure services, APIs, and SDKs adapted to communicate in a communication network. The infrastructure platform receives telematics data such as vehicle identification data, driving performance data, vehicle operation data and vehicle sensor data for a corresponding vehicle. Such telematics data can be received from a vehicle device (Onboard Device (OBD)), or from a cloud-based telematics platform. The infrastructure platform identifies vehicle ownership support services associated with the at least one vehicle and analyzes the received telematics data associated with the identified services. The infrastructure platform provides vehicle ownership support services to a mobile application accessible at a customer's mobile device associated with the vehicle or the customer. Such services may include, without limitations, automated fuel dispensing, emergency roadside assistance, vehicle maintenance and repair assistance, and the like. |
| US10134038B2 |
Point of sale (POS) personal identification number (PIN) security
A key is securely injected into a POS PIN pad processor in its usual operating environment. In response to entry of a personal identification number (PIN) into a PIN pad, the processor puts the PIN into a PIN block; puts additional random data into the PIN block; and encrypts the entire PIN block using asymmetric cryptography with a public key derived from the injected key residing in the PIN pad processor. The corresponding private key may be held securely and secretly by an acquirer processor for decrypting the PIN block to retrieve the PIN. The encrypted random data defends the PIN against dictionary attacks. Time stamp data and constant data encrypted with the PIN block enables a defense of the PIN against replay attacks and tampering. The method may also include accepting the PIN from a mobile phone in communication with the processor. |
| US10134036B1 |
Method and apparatus for performing transactions over a network using cross-origin communication
A transaction is conducted between a merchant site and a customer's electronic device using a payment processor. The merchant site is associated with a client-side application and a server-side application. The client-side application executes on the customer's electronic device. The client-side application electronically sends payment information retrieved from the customer's electronic device to the payment processor. The client-side application does not send the payment information to the server-side application. The payment processor creates a token from the payment information sent by the client-side application. The token functions as a proxy for the payment information. The payment processor electronically sends the token to the client-side application. The client-side application electronically sends the token to the server-side application for use by the server-side application in conducting the transaction. The payment information can thus be used by the server-side application via the token without the server-side application being exposed to the payment information. |
| US10134035B1 |
Invariant biohash security system and method
Systems, methods, and program products for providing secure authentication for electronic messages are disclosed. A method may comprise generating an asymmetric private key based at least in part upon an invariant biometric feature vector derived from an input biometric reading. The private key may be further based at least in part upon a user password. The resulting private key may not be stored but rather may be generated when required to authenticate an electronic message, at which time it may be used to provide a digital signature for the electronic message. The private key may be deleted after use. The private key may be regenerated by inputting both a new instance of the biometric reading as well as a new instance of the password. |
| US10134034B2 |
Terminal data encryption
A method is disclosed. The method includes generating an initial key after interacting with an access device, storing the initial key at a key storage location, altering the initial key with a public key to form an altered key, and sending the altered key to a server computer along with an identifier for the access device. The altered key is changed to the initial key at the server computer and is stored with the identifier in a database in operative communication with the server computer. The initial keys that are stored at the key storage location and in the database are used to alter and restore transaction data associated with multiple financial transactions that are conducted using the access device. |
| US10134030B2 |
Customer token preferences interface
Embodiments are directed to token management. Embodiments initiate presentation of a digital wallet management interface including initiating presentation of a digital wallet; initiating presentation of an original token associated with the digital wallet; initiating presentation of a toggle switch comprising a first position and a second position and associated with the original token and configured for graphical manipulation by the user between the first position and the second position, wherein the first position corresponds to the original token being available for use as a payment credential; and where the second position corresponds to the original token being unavailable for use as a payment credential. |
| US10134029B1 |
System and method for combining disparate commercial transactions under a single identification mechanism
A single swipe system is constructed that allows a person to use a single financial card to receive loyalty benefits (or conduct other non-payment operations) concurrently with a payment transaction. In one embodiment, the user simply swipes his/her financial card and the processing system then concurrently processes a non-payment transaction along with a payment transaction. In some situations, the non-payment transaction can be blended into the payment transaction to allow for discounts and other awards from one or more databases other than the payment processing database. In one embodiment, a single swipe of a financial card connects the consumer with one or more loyalty systems and the consumer can select from the ones desired during the course of payment processing. Discounts and other advantages can be applied to the payment transaction, all based upon a single entry of the consumer's ID. |
| US10134028B2 |
Gift card with principal value and auxiliary value
The present invention relates to methods and systems involving a gift card comprising a principal value and auxiliary value. The principal value may represent a monetary or pre-sale value, while the auxiliary value may represent a virtual good. |
| US10134021B2 |
Method and apparatus for providing a gift using a mobile communication network and system including the apparatus
The present disclosure provides a method of providing a gift icon using a communication network. The method includes: providing an item list of amounts of money to a user terminal connected with the gift provision apparatus through the communication network; selecting at least one of the amounts of money, and inputting information of a receipt terminal to receive the at least one selected amount of money, wherein the receipt terminal is separated from the user terminal; transmitting a request message for a gift to the gift provision apparatus; and providing the gift icon to the receipt terminal through the communication network, when the gift provision apparatus receives the request message. |
| US10134019B2 |
Transaction decisioning by an automated device
Methods, systems, and computer-readable media for determining whether a check may be cashed at an automated teller machine (ATM) are provided. A user may request to cash a check at an ATM and check image data may be transmitted to a return deposit item computing platform. The computing platform may identify an account number of the account on which the check is drawn. Transaction data associated with the account may be retrieved by the computing platform and a number of occurrences of returned deposit items may be identified. The number of occurrences may be used to determine whether the check should be cashed. |
| US10134018B2 |
Flexible open origination
In the field of banking and financial services, a flexible Open Origination allows any type of mobile, internet, online, personal financial management software, finance tool, or other useful function, device or software, that a bank or financial institution provides to account holders, and offers that same functionality that allows any user regardless of account status. Non-account holders can download and utilize the Banking Software in question in order to enjoy its features, an in order to become familiar with the experience of doing business with the bank or financial institution that provides the software. This method, system and software allows any user, regardless of where his/her accounts are located, to use the software and benefit from its functionality. |