| Document | Document Title |
|---|---|
| US09893541B2 |
Charger with hub
A charger includes a charging unit and a hub unit. The charging unit includes an enclosure, a charging circuit and two wires. The enclosure defines a matching groove. Opposite sidewalls of the matching groove separately define a limiting groove. The hub unit includes a foundation, a circuit unit, a locking protrusion, a pair of bolts and a pair of hook assemblies. The foundation defines a holder. The locking protrusion, the bolts and the latching members are all received in the holder. One end of each of the two wires is electrically coupled to the charging circuit, and the other end of each of the two wires extends through the matching groove and the receiving groove in that order and electrically couples to the circuit unit. |
| US09893531B2 |
Power supply apparatus, power supply system, and method for controlling power supply system
A power supply system (101) includes a first power supply apparatus (111a) and a second power supply apparatus (111b) connected to a load in parallel, for supplying power to the load (115). The first supply apparatus (111a) includes a first controller that controls the output voltage of the first supply apparatus (111a) when a power supply from the first supply apparatus (111a) to the load 115 is equal to or greater than a power requirement by the load (115), and controls the output current of the first supply apparatus (111a) when the supplied power is less than the required power. The second power supply apparatus 111b includes a second controller that stops the second supply apparatus from supplying power (111b) when the power supply is equal to or greater than the power requirement, and controls the output voltage of the power supply apparatus (111b) when the power supply is less than the power requirement. |
| US09893528B2 |
Modular multi-level converter and method of controlling voltage balancing of modular multi-level converter
A method of controlling voltage balancing of a modular multi-level converter is provided. The method includes receiving state information on each of n sub modules in an arm module, grouping the n sub modules into m sub module groups, receiving first state information on each of sub modules in a first one of the m sub module groups, among the state information on each of the n sum modules, receiving second state information on each of sub modules not included in the first sub module group, among state information on each of the n sum modules previously stored in a memory, controlling switching of a sub module by using the first state information and the second state information, and updating the memory with the first state information. |
| US09893521B2 |
Digital power network method and apparatus
A digital power network comprises at least one digital electric power routing device that includes (a) at least one DC power bus; (b) at least two power control elements, each with at least two sets of power terminals, at least one of which accommodates electrical power in packet energy transfer format, and wherein each power control element has electrical connections that allow one set of power terminals to be connected to the DC power bus; and (c) at least one network controller operable to execute control functions within the power control elements to route electrical power from at least one power control element to at least one other power control element within the digital power network. The digital power network further includes at least one power source and at least one load. |
| US09893517B2 |
Electrostatic discharge protection circuitry
Various implementations described herein are directed to an integrated circuit for electrostatic discharge (ESD) protection. The integrated circuit may include a detection stage having a resistor and a first capacitor cascaded with a second capacitor. The resistor and the first capacitor are arranged to define a triggering node configured to provide a triggering signal. The first capacitor and the second capacitor are arranged to define a reference node configured to provide a reference signal. The integrated circuit may include a first ESD clamping stage having a first transistor configured to provide a supply voltage to a first clamping transistor based on the triggering signal. The integrated circuit may include a second ESD clamping stage having a second transistor configured to receive the supply voltage from the first transistor and provide the supply voltage to a second clamping transistor based on the reference signal. |
| US09893516B2 |
ESD protection circuits
An ESD protection circuit, which is coupled between either an I/O pad or a power pad and a ground terminal, includes a non-snapback device and a snapback device. When the voltage across the non-snapback device is not less than the non-snapback trigger voltage, the non-snapback device is turned on. When the voltage across the snapback device is not less than the snapback trigger voltage, the snapback device is turned on, and the voltage across the snapback device is held at the snapback holding voltage, in which the snapback holding voltage is less than the snapback trigger voltage. The non-snapback device and the snapback device are cascaded. |
| US09893513B2 |
Fuse element
A fuse element and a method for manufacturing the same are provided whereby the fuse element contains an active response part which is formed by an elongated fuse metal strip having at least four metal sub-strips. At least two of the metal sub-strips are parallel and the sub-strips are defined by two elongated recesses within one or two elongated fuse metal strips. The two recesses are provided in serial alignment along the respective fuse metal strip having leading and trailing parts for electrical connection of each fuse element. The elongated fuse metal strip can be reinforced by an elongated dielectric base layer made of polymer material. Accordingly, performance of such a fuse element can be increased and manufacturing costs can be decreased. The fuse element can be applied to a plurality of capacitor sub-units being integrated in housings and submerged in a cooling and insulating liquid within the housing. |
| US09893511B2 |
Protective circuit assemblage for a multi-voltage electrical system
A protective circuit assemblage for a multi-voltage electrical system includes: a DC voltage converter provided in the region of the transition between a high-voltage loop and a low-voltage loop; and at least one switch respectively provided in each of the high-voltage loop and the low-voltage loop. |
| US09893510B2 |
Electronic circuit for protecting a load against over-voltage
An electronic circuit for protecting a load against over-voltage is disclosed. The electronic circuit comprises an input port for receiving a voltage and an output port for feeding the voltage to the load. The electronic circuit further comprises a switching unit arranged to switch on and off the voltage from the input port. Moreover, the electronic circuit comprises a capacitive component arranged to receive the voltage when the switching unit is switched on and is otherwise arranged to feed voltage to the output port. Furthermore, the electronic circuit comprises a comparing unit configured to control the switching unit to be switched off when a value at the output port exceeds a first threshold; and to control the switching unit to be switched on when the value is below a second threshold. |
| US09893507B2 |
Ball grip compression fitting
A connector is used for terminating an electrical cable, such as a metal clad cable, cord grip, and tray cable, and provides a compression fitting to secure and ground the cable. The connector includes a connector body, a compression nut, and a compression grommet retained therebetween. A gripping member and/or a grounding member is embedded within the grommet for creating a mechanical grip with the cable and providing a grounding pathway, respectively. Tightening the compression nut to the connector body correspondingly compresses the grommet to create a watertight seal with the cable so that no fluid, dirt or debris can pass through the connector. Such tightening also urges the gripping member to form a mechanical grip with the cable for securing the cable and maintaining the watertight seal. Moreover, the grounding member may include an electrically conductive grounding ball that forms the grounding path between the connector and the armor portion of the cable upon tightening the compression nut to the connector body. |
| US09893504B2 |
Outlet cover assembly
A method and apparatus for assembling and installing an outlet cover for an electrical outlet box. The apparatus includes a base having a rectangular mounting aperture for aperture adapter assemblies. To create the desired cover plate, the appropriate aperture adapters has to be selected and assembled to accommodate the desired standard electrical outlet such as a light switch or socket. A cover is hinged to the base by fitting hinge members on both parts together and thus enables the cover to swing forwardly and backwardly against the base. A planar lever and serrated bar is present on one side wall of the base, which is orthogonal with respect to the hinge axis. By retaining the planar lever at different serration on the serrated bar, the planar lever can hold cover at different height and thus adjusts cover plate assembly openings to accommodate various cord sizes. |
| US09893498B2 |
Method for manufacturing tubular metal shell including ground electrode bar for spark plug, and method for manufacturing spark plug
A pair of electrode lugs clamp a bar at side surfaces of the bar so as to be electrically connected to the bar. The electrode lugs respectively include a first contact portion and a second contact portion having different front-back lengths. The bar is clamped such that the first contact portion having a short front-back length L1 opposes a back end portion of the bar within a range of the second contact portion having a front-back length L2. The back end surface of the bar is brought into contact with and welded to a front end surface of a metal shell by resistance butt welding. Since the first contact portion of one lug is short and is close to the abutting surfaces, heat dissipation can be reduced and heat concentration can be increased. |
| US09893496B2 |
Spark plug having improved ground electrode orientation and method of forming
A method of manufacturing a spark plug (20) for being threaded into a cylinder head (28) of an internal combustion engine is provided. The spark plug (20) includes a shell (24) with threads (26) disposed at a predetermined rotational position (a) relative to a shell outer surface (64) and ground electrode (34). The position of the threads (26) relative to the ground electrode (34) places the ground electrode (34) in a desired position in the combustion chamber (22) and relative to components of the engine, thus allowing the ground electrode (34) to provide a robust and reliable ignition. When multiple spark plugs (20) are formed, the threads (26) in each of the shells (24) are repeatedly and accurately formed at the predetermined rotational position (α) by locating the ground electrode (34), threads (26), and dies (76) of a thread forming apparatus (102) in specific locations. |
| US09893489B2 |
Wafer scale monolithic integration of lasers, modulators, and other optical components using ALD optical coatings
After forming a monolithically integrated device including a laser and a modulator on a semiconductor substrate, an anti-reflection coating layer is formed over the monolithically integrated device and the semiconductor substrate by an atomic layer deposition (ALD) process. The anti-reflection coating layer is lithographically patterned so that an anti-reflection coating is only present on exposed surfaces of the modulator. After forming an etch stop layer portion to protect the anti-reflection coating, a high reflection coating layer is formed over the etch stop layer, the laser and the semiconductor structure by ALD and lithographically patterned to provide a high reflection coating that is formed solely on a non-output facet of the laser. |
| US09893461B2 |
Continuable waterproof cable, continuable waterproof power module, and waterproof terminal assembly
A continuable waterproof cable includes a cable body, first, second and third transmitting members, and first and second waterproof elastic members. The cable body has a connecting end and a continuing end opposite to the connecting end. The first transmitting member and the first waterproof elastic member are disposed at the connecting end. The second transmitting member is disposed at the continuing end, coupled to the first transmitting member, and adapted to a first end of the first transmitting member. The second waterproof elastic member is disposed at the continuing end. The third transmitting member is in the cable body and has a fixed end and a free end. The fixed end is at the continuing end, the free end is detachably coupled to the first transmitting member and capable to be apart from the transmitting member by a force. |
| US09893456B2 |
Electrical wiring device with shutters
An electrical device includes a shutter support structure having a return position, at least one blocking position and an open position. A first shutter element is configured to rotate about a first dimensional axis within a predetermined angular range while being translated in two-dimensions between the return position to the open position, each of the two dimensions being orthogonal to the first dimensional axis. A second shutter assembly includes a second shutter element coupled to the first shutter element, the first shutter element allowing the second shutter portion to move in a first direction parallel to the first dimensional axis when the first shutter element is in the open position, the first shutter element being configured to drive the second shutter element in a second direction parallel to the first dimensional axis when the first shutter element is being translated into the return position. |
| US09893455B1 |
Electrical arc protection using a trip contact
A plug comprises power contacts and a plug trip contact. During a plugging action between the plug and a receptacle, the plug trip contact makes a trip connection with mating contacts in the receptacle. Electrical power to the receptacle allows a current through the trip connection, which causes disconnection of the power to the receptacle. A receptacle comprises receptacle power contacts and receptacle trip contacts. During a plugging action between the receptacle and a plug, trip contacts in the receptacle makes a trip connection with a mating contact in the plug. Electrical power to the receptacle allows a current through the trip connection, which can cause disconnection of the power to the receptacle. The receptacle can be included in an enclosure having a trip breaker with a trip mechanism. An electrical system can have an electrical device with a line cord connected to a plug having the trip contact. |
| US09893452B2 |
Low-profile spring-loaded contacts
Contact structures that are readily manufactured, where contacts in the contact structures provide a sufficient normal force while consuming a minimal amount of surface area, depth, and volume in an electronic device. |
| US09893450B2 |
Electrical connecting member and electrical connector having the same
An electrical connecting member includes a plurality of contact pieces for contacting with both a first conductive member and a second conductive member; and a holding member for holding the contact pieces. Each of the contact pieces includes a first contact portion for contacting with the first conductive member, a second contact portion for contacting with the second conductive member, and a held portion disposed between the first contact portion and the second contact portion and held with the holding member. The holding member includes a pair of base portions extending in parallel and a plurality of connecting portions for connecting the base portions. Each of the connecting portions includes a holding portion for holding each of the held portions of the contact pieces respectively so that the contact pieces are aligned in parallel with each other and are inclined relative to the base portions. |
| US09893449B2 |
Electrical connector
An electrical connector includes an insulative housing and two contact modules. The insulative housing has a bottom mounting portion having a cavity opening downwardly and a mating portion, the mating portion has a central mating space and a pair of side walls on both sides of the mating space, and a plurality of contact receiving passageways defined on each side wall. Each contact module has an insulator received in the cavity and a plurality of contacts insert-molded in the insulator, each contact defines a contacting arm and a soldering portion. The insulative housing defines a pair of locating portions extending downwards from two sides of the mounting portion, the distance between the pair of locating portions is smaller than an internal diameter of the cavity, a pair of demising slots are formed on an interior side of each locating portion for the contact modules passing through. |
| US09893448B2 |
Electrical connector having a shell plate with an intermediate connecting portion joined to a wiring board
The contact pressure of a contact member with respect to a connection target can be prevented well from being reduced by a simple configuration. An electrically-conductive shell covering a surface of an insulating housing opposed to a surface facing a wiring board is provided with an intermediate connecting portion extended from a position in the vicinity of a fixed base portion of the contact member toward the wiring board, and the intermediate connecting portion is joined with the wiring board. By virtue of this, deformation such as warpage of the insulating housing and the electrically-conductive shell upon insertion of the connection target is suppressed by retaining force of the intermediate connecting portion, and reduction in the contact pressure of the contact member with respect to the connection target is configured to be prevented. |
| US09893446B1 |
High speed connector and transmission module thereof
A high speed connector includes a housing, an insulating core inserted into the housing, a plurality of first conductive terminals and a plurality of second conductive terminals fixed on the insulating core, and a shielding member. The first conductive terminals arranged in one row parallel to a width direction includes two differential signal terminals and two grounding terminals respectively arranged at two opposite outer sides of the differential signal terminals. The shielding member includes a base portion detachably assembled to the housing and a metallic coating layer coated on the base portion. The metallic coating layer contacts the two grounding terminals to establish an electrical connection between the two grounding terminals. The metallic coating layer is arranged at the two opposite outer sides of the differential signal terminals, and the metallic coating layer is configured to shield the differential signal terminals in the width direction. |
| US09893444B2 |
Board-edge interconnection module with integrated capacitive coupling for enabling ultra-mobile computing devices
A board-edge interconnection module features integrated capacitive coupling, which enables a board design employing the module to avoid having AC capacitors and flexible cables with bulky connectors. The recovered real estate enables further miniaturization, enabling the component to be used on a wide variety of devices, including ultra-mobile computing devices. |
| US09893440B2 |
Vertical type connecting terminal for storage battery
Disclosed is a vertical type connecting terminal for a storage battery, the vertical type connecting terminal including: a body unit 10 which includes an insertion portion 11 which is formed in a cylindrical shape having a cut-out at one side, an electric power outlet 12 which is formed opposite to the cut-out of the insertion portion 11, and a pair of elastic pieces 13 which extends in a radial direction from both ends of the cut-out of the insertion portion 11 and has therein arc-shaped portions 13′, respectively; a fastening member 20 which includes a washer member 21 which has inside thereof arc-shaped grooves 21′ into which the arc-shaped portions 13′ of the elastic piece 13 are inserted such that the washer member 21 is coupled to an upper portion of the elastic piece 13 and adjusts an interval between the elastic pieces 13 while moving vertically, a T-shaped tightening bolt 22 which is positioned below the elastic piece 13 and has a body 22a to be inserted into a through hole 21c formed in the washer member 21, and an elongated head 22b, and a tightening nut 23 which is fastened to the tightening bolt 22 from an upper side of the washer member 21 and allows the washer member 21 to move vertically, in which the tightening bolt 22 has protruding portions 22c which are formed at both ends of the head 22b and each have an inner inclined surface 22′ so that a thickness of the protruding portion 22c decreases upward, the protruding portions 22c are disposed to transverse the elastic pieces 13 in a width direction of the elastic pieces 13, and outer inclined surfaces 21a, which correspond to the inner inclined surfaces 22′ of the protruding portions 22c, are formed at both sides in a width direction of the washer member 21. |
| US09893439B2 |
Terminal fitting with wire connection portion
It is aimed to provide a terminal fitting capable of preventing a large force from acting on joint portions of a wire connecting portion and another constituent component formed separately from the wire connecting portion. The terminal fitting includes a wire connecting portion (10) to be connected to an end part of a wire (30) and another constituent component (20) formed separately from the wire connecting portion (10) and to be arranged in front of the wire connecting portion (10). The other constituent component (20) includes a joint piece (24) to be overlapped on the wire connecting portion (10) and joined. A part of the wire connecting portion (10) behind a part to be crimped to a core (31) of the wire (30) is joined to the joint piece (24). |
| US09893438B1 |
Electrical connectors for high density attach to stretchable boards
A system can include a first portion of a fabric fastener, a second portion of the fabric fastener, wherein the first portion and the second portion are configured to mechanically connect with each other and to resist separation from each other once connected, and wherein the first and second portions include a plurality of corresponding electrical contacts configured to form a plurality of individual electrical connections when the first portion is mechanically connected with the second portion. |
| US09893437B2 |
Securing device for electrically connecting at least two wires
A wire clamp is provided, having a body through which an aperture extends. An opening extending along a side of the body intersects with the aperture along its length. The wire clamp also includes a securing device configured to extend into the aperture. |
| US09893434B2 |
Multi-element omni-directional antenna
An antenna circuit board assembly comprises a substrate having a ground plane comprised of a conductive material; a first antenna element mounted to the substrate and coupled to the ground plane; a second antenna element mounted to the substrate and coupled to the ground plane; a third antenna element mounted to the substrate and coupled to the ground plane; and a plurality of features etched into the ground plane, each of the plurality of features having a respective length and a respective width. The respective length and the respective width of each of the plurality of features are selected to increase isolation between the first, second, and third antenna elements. |
| US09893431B2 |
Compact waveguide power combiner/divider for dual-polarized antenna elements
A waveguide architecture for a dual-polarized antenna including multiple antenna elements. Aspects are directed to dual-polarized antenna architectures where each antenna element includes a polarizer having an individual waveguide with dual-polarization signal propagation and divided waveguides associated with each basis polarization. The waveguide architecture may include unit cells having corporate waveguide networks associated with each basis polarization connecting each divided waveguide of the polarizers of each antenna element in the unit cell with a respective common waveguide. The waveguide networks may have waveguide elements located within the unit-cell boundary with a small or minimized inter-element distance. Thus, unit cells may be positioned adjacent to each other in a waveguide device assembly for a dual-polarized antenna array without increased inter-element distance between antenna elements of adjacent unit cells. Antenna waveguide ports may be connected to unit cell common waveguides using elevation and azimuth waveguide networks of the corporate type. |
| US09893423B2 |
Electromagnetic wave sensor and/or emitter
Provided is a device for performing at least one of detection and emission of electromagnetic waves, including a plurality of antennas, in which a first antenna includes a first radiating element and a first electronic element electrically connected to the first radiating element, and is sensitive to a first frequency band, and in which a second antenna includes a second radiating element and a second electronic element electrically connected to the second radiating element, and is sensitive to a second frequency band. At least a part of the second radiating element is arranged inside the first radiating element. |
| US09893421B2 |
Impedance converter circuit and communication terminal device
An impedance converter circuit includes a transformer with a primary coil connected to a power feed port, a phase shifter circuit connected between a secondary coil of the transformer and an antenna port, and a bypass circuit connected between the power feed port and the antenna port. In a high band, an absolute value of impedance of the transformer viewed from the antenna port via the phase shifter circuit is higher than an absolute value of impedance of the bypass circuit. In a low band, the absolute value of the impedance of the transformer viewed from the antenna port via the phase shifter circuit is lower than the absolute value of the impedance of the bypass circuit. |
| US09893420B2 |
Wireless module with plural in-plane terminals
The wireless module according to the present invention includes a wireless IC chip for processing transmission/reception signals, a substrate on which the wireless IC chip is mounted, an antenna provided on the substrate, and a plurality of terminals extending off from the substrate in an in-plane direction of the substrate. |
| US09893418B2 |
Antenna and mobile device therefor
Disclosed are an antenna and a mobile device having the same. The antenna includes a plurality of radiators having a pillar shape; a connecting member for connecting the radiators with each other in series; and a ground member for grounding the radiators connected with each other through the connecting member. |
| US09893405B2 |
Input/output coupling structure of dielectric waveguide
Dielectric waveguide comprising dielectric body having an exterior coated with an electrically conductive film. Region in one side surface couples to another dielectric waveguide, and slot in bottom surface exposes the dielectric body in an L-shape in two adjacent side surfaces, except for the one side surface. Front surface of printed circuit board has a ground pattern opposed to the slot, which includes opening with outer shape greater than slot, and a back surface having a ground pattern surrounding a strip line disposed to cross through the slot. A distal end of the strip line and the front surface-side ground pattern are coupled together by a via hole. The opening is surrounded by a via hole group which couples the front and the back surface-side ground patterns together. The dielectric waveguide is disposed to allow the opening and the slot to be opposed to each other. |
| US09893404B2 |
Radio frequency (RF) conductive medium
Embodiments of the present disclosure provide a radio frequency (RF) conductive medium for reducing the undesirable insertion loss of all RE hardware components and improving the Q factor or “quality factor” of RF resonant cavities. The RF conductive medium decreases the insertion loss of the RF device by including one or more conductive pathways in a transverse electromagnetic axis that are immune to skin effect loss and, by extension, are substantially free from resistance to the conduction of RF energy. |
| US09893402B2 |
Superposition of guided surface waves on lossy media
Disclosed are various embodiments for superposition of guided surface wave launched along the surface of a lossy medium such as, e.g., a terrestrial medium by exciting a guided surface waveguide probe. In one example, among others, a system includes an array of guided surface waveguide probes configured to launch guided surface waves along a surface of a lossy conducting medium and an array control system configured to control operation of waveguide probes in the array via one or more feed networks. The array control circuit can control operation of the guided surface waveguide probes to maintain a predefined radiation pattern produced by the guided surface waves. In another example, a method includes providing voltage excitation to first and second guided surface waveguide probes to launch guided surface waves with the voltage excitation provided to the second guided surface waveguide probe delayed by a defined phase delay. |
| US09893401B2 |
Effective biasing active circulator with RF choke concept
A multi-port active circulator where each of a plurality of FET transistors has (i) a gate connected to an associated port of the multi-port active circulator via a capacitor of an associated one of a plurality of first RF chokes, each of the first RF chokes being connected to a gate of an associated FET transistor of said plurality of transistors, the associated port of said associated FET transistor and to a power supply bias connection; (ii) a source connected to a common point; and (iii) a drain connected to the gate of the same FET transistor by a feedback circuit and connected to the gate of a neighboring FET transistor via a capacitor of one of a plurality of second RF chokes, each of which coupling gates and drains of neighboring FET transistors via capacitors thereof and being connected to another power supply bias connection. |
| US09893394B2 |
Real-time battery thermal management for electric vehicles
A method includes estimating, for a given battery cell of a plurality of battery cells, an internal resistance, estimating, for the given battery cell, an open-circuit voltage, determining a target output voltage for the given battery cell, determining a target discharge current for the given battery cell, determining a target internal resistance for the given battery cell based on the estimated open-circuit voltage for the given battery cell, the target output voltage for the given battery cell, and the target discharge current for the given battery cell, determining a target cell temperature for the given battery cell based on the target internal resistance for the given battery cell, and controlling a flow of coolant adjacent to the given battery cell based on the target temperature for the given battery cell. |
| US09893390B2 |
Battery pack including an indicator circuit
The invention is directed toward a battery pack. The battery pack includes at least one electrochemical cell; a case; a plate; an indicator circuit; and a battery-to-internal volume ratio. The case includes at least one open end. The plate is placed over the at least one open end. The plate includes a terminal plate, a base plate, or any combination thereof. The indicator circuit includes an integrated circuit and an antenna. The indicator circuit is affixed to the plate. The battery-to-internal volume ratio is greater than about 0.52. |
| US09893387B2 |
Method of charging a lithium-sulphur cell
A method for charging a lithium-sulphur cell, said method comprising: •determining the discharge capacity, Qn, of the cell during a charge-discharge cycle, n, •calculating the value of a*Q n, where a=1.05 to 1.4, and, •in a later charge-discharge cycle, n+x, where x is an integer of 1 to 5, charging the cell to a capacity Qn+x that is equal to a*Qn. |
| US09893382B2 |
Cosolvent electrolytes for electrochemical devices
A system and method for stabilizing electrodes against dissolution and/or hydrolysis including use of cosolvents in liquid electrolyte batteries for three purposes: the extension of the calendar and cycle life time of electrodes that are partially soluble in liquid electrolytes, the purpose of limiting the rate of electrolysis of water into hydrogen and oxygen as a side reaction during battery operation, and for the purpose of cost reduction. |
| US09893381B2 |
Nonaqueous electrolyte containing monofluorophosphoric ester salt and nonaqueous secondary battery using same
Provided are a nonaqueous electrolyte for secondary batteries containing an electrolyte having high solubility in ethylene carbonate, propylene carbonate, dimethyl carbonate, diethyl carbonate, ethyl methyl carbonate, or a like solvent and capable of forming a good-quality film on the positive and the negative electrode interface and a nonaqueous secondary battery having the nonaqueous electrolyte. Specifically, an electrolyte for secondary batteries containing a lithium salt as a solute and a nonaqueous solvent is provided, the nonaqueous solvent containing a monofluorophosphoric ester salt having general formula 1 or 2, in which symbols are as defined in the description. |
| US09893379B2 |
Lithium ion battery, solid electrolyte and method of preparing the same
A solid electrolyte contains an internal component and an external component coated on a surface of the internal component. The internal component is represented by a formula Li1+xMxZr2−x(PO4)3, M is one or more elements selected from a group consisting of Al, La, Cr, Ga, Y, and In, and 0.05≦x≦0.4. The external component contains a plastic deformable material and has a conductivity of about 10−7 S/cm to about 10−5S/cm. A method of preparing the solid electrolyte and a lithium ion battery including the solid electrolyte are also provided. |
| US09893378B2 |
Non-aqueous electrolyte solution and non-aqueous secondary battery
The non-aqueous electrolyte solution of the present invention is a non-aqueous electrolyte solution comprising acetonitrile and a lithium salt, wherein the anion of the lithium salt has a LUMO (lowest unoccupied molecular orbital) energy in the range of −2.00 to 4.35 eV, and a HOMO (highest occupied molecular orbital) energy in the range of −5.35 to −2.90 eV. |
| US09893377B2 |
Nonaqueous electrolyte battery, battery pack and vehicle
According to one embodiment, there is provided a nonaqueous electrolyte battery. The negative electrode of the battery includes a negative electrode active material which can absorb and release lithium ions at a negative electrode potential of 0.4 V (V.S. Li/Li+) or more. The battery satisfying the following equations (I) and (II): 1≦Q2/Q1 (I) 0.5≦C/A≦0.999 (II) |
| US09893374B2 |
Reinforced composite electrolyte membrane for fuel cell
Disclosed is a composite electrolyte membrane comprising a microporous polymer substrate and a sulfonated polymer electrolyte. The composite electrolyte membrane comprises: a first polymer electrolyte layer formed of a first non-fluorinated or partially-fluorinated sulfonated polymer electrolyte; a non-fluorinated or partially-fluorinated microporous polymer substrate stacked on the first polymer electrolyte layer, wherein pores of the microporous polymer substrate are impregnated with a second non-fluorinated or partially-fluorinated sulfonated polymer electrolyte, and the first polymer electrolyte and the second polymer electrolyte are entangled with each other on an interface thereof; and a third polymer electrolyte layer formed on the microporous polymer substrate impregnated with the second polymer electrolyte by a third non-fluorinated or partially-fluorinated sulfonated polymer electrolyte, wherein the second polymer electrolyte and the third polymer electrolyte are entangled with each other on an interface thereof. A method for manufacturing the composite electrolyte membrane, and a membrane-electrode assembly (MEA) and a fuel cell comprising the composite electrolyte membrane are also disclosed. |
| US09893372B2 |
Perceiving method and system of stack state for fuel cell system
A perceiving method and system of a stack state for a fuel cell system is provided. The method includes determining whether a vehicle provided with the fuel cell system is started and calculating a time until first condensate water is discharged through a condensate water discharging valve provided in the fuel cell system after the vehicle starts. Then, an average time until the first condensate water is discharged after the vehicle starts, at the previous starting of the vehicle is calculated over a predetermined number of times. The two calculated times are compared to determine the state of the stack or cathode of the fuel cell system without requiring additional separate components. |
| US09893365B2 |
Electrode catalyst, composition for forming gas diffusion electrode, gas diffusion elelctrode, membrane-electrode assembly, and fuel cell stack
To provide electrode catalyst which has the catalyst activity and durability at a practically durable level and contributes to lowering of the cost in comparison with the conventional Pt/C catalyst. The electrode catalyst has a support and catalyst particles supported on the support. The catalyst particle has the core part, the first shell part formed on the core part, and the second shell part formed on the first shell part. The core part contains W compound including at least W carbide, the first shell part contains simple Pd, and the second shell part contains simple Pt. |
| US09893364B2 |
Porous electrolessly deposited coatings
A new electroless plating approach to generate a porous metallic coating is described in which a metal is electrolessly deposited on a surface. Microparticles in the metal are removed to leave pores in the metal coating. Another method of forming electroless coatings is described in which a blocking ligand is attached to the surface, followed by a second coating step. The invention includes coatings and coated apparatus formed by methods of the invention. The invention also includes catalyst structures comprising a dense substrate and a porous metal adhered to the dense substrate, which is further characterized by one or more of the specified features. |
| US09893361B1 |
Electrochemical cells and methods for making same
The present disclosure is directed to electrochemical cells having injection molded or 3D printed components, such as cathodes, anodes, and/or electrolytes, and methods for making such electrochemical cells. The cathodes, anodes, and/or electrolytes can be formed from a binder resin and various conductive and active materials, mixtures of which are injected into a mold under heat and pressure to form the components of the electrochemical cells. The cathode can include conductive metallic powder, flakes, ribbons, fibers, wires, and/or nanotubes. Further, electrochemical arrays can be formed from multiple electrochemical cells having injection molded or 3D printed components. |
| US09893359B2 |
Cathode binder composition, cathode slurry, cathode, and lithium ion secondary battery
Cathode binder composition having excellent binding properties and oxidation resistance. Also, cathode slurry, cathode, and lithium ion secondary battery produced using the cathode binder composition. The cathode binder composition contains a graft copolymer in which a monomer containing acrylonitrile as the main component is grafted onto polyvinyl alcohol having an average degree of polymerization of 300 to 3000 and a degree of saponification of 70 to 100% by mol. The cathode slurry contains the cathode binder composition, a cathode active material, and a conductive auxiliary. The cathode is produced using the cathode slurry. The lithium ion secondary battery contains a cathode prepared in this manner. |
| US09893356B2 |
Cathode active material for nonaqueous electrolyte secondary battery, nonaqueous electrolyte secondary battery, and method of producing cathode active material for nonaqueous electrolyte secondary battery
The cathode active material for a nonaqueous electrolyte secondary battery according to an aspect of the present disclosure mainly comprises a compound represented by a composition formula: LixNay(LiαNaβMn1−α−β)O2, where x, y, α, and β satisfy 0.75≦x≦1.0, 0 |
| US09893355B2 |
Spinel-type lithium manganese transition metal oxide
Provided is a new spinel type lithium manganese transition metal oxide for use in lithium batteries, which can increase the capacity retention ratio during cycling, and can increase the power output retention ratio during cycling. Disclosed is a spinel type lithium manganese transition metal oxide having an angle of repose of 50° to 75°, and having an amount of moisture (25° C. to 300° C.) measured by the Karl Fischer method of more than 0 ppm and less than 400 ppm. |
| US09893350B2 |
Lithium secondary battery
The present invention relates to a lithium secondary battery, wherein a peak at 167 to 171 eV and a peak at 162 to 166 eV are present in XPS analysis of sulfur (S2p) of a positive electrode surface, and P169/P164 is in the range of 0.7 to 2.0 wherein the P 169/P 164 is the ratio between the intensity of the peak at 167 to 171 eV (P169) and the intensity of the peak at 162 to 166 eV (P164). The present invention can provide a lithium secondary battery having excellent cycle characteristics. |
| US09893345B2 |
Rechargeable battery
A rechargeable battery is provided, which includes a protection layer with an inversion plate, thereby improving safety by preventing the inversion plate from malfunctioning. In one example embodiment, the rechargeable battery includes an electrode assembly including a first electrode plate, a second electrode plate, and a separator disposed between the first electrode plate and the second electrode plate, a case accommodating the electrode assembly, and a cap assembly coupled to the case, wherein the cap assembly comprises a cap plate sealing the case and having a short-circuit opening, an inversion plate installed in the short-circuit opening of the cap plate, and a connection plate installed to cover the short-circuit opening of the cap plate, and a protection layer having a higher melting point than the cap plate is formed under the inversion plate. |
| US09893341B2 |
Battery pack and device for connecting tabs of battery cells in the same
A device for connecting tabs of battery cells includes an isolation board defining a first through slot seated on the surfaces of the battery cells from which the tabs extending out; a metal plate mounted on a surface of the isolation board afar from the battery cells, the metal plate defining a second through slot corresponding to the first through slot of the isolation board; and a metal conductive plate secured to the metal plate. The tabs of the battery cells extending through the first through slot and the second through slot are bent and seated on a surface of the metal plate afar from the isolation board, and the metal conductive plate is detachably fastened to the metal plate so that the tabs of the battery cells are securely sandwiched between the metal plate and the metal conductive plate. |
| US09893340B2 |
Battery wiring module
A battery wiring module may include connecting members for connecting adjacent electrode terminals to each other, an external connection terminal that is connectable to another device, and a resin protector having holding portions that hold the connecting members and the external connection terminal. A lid portion for covering the external connection terminal may be provided integrally with the resin protector via a first hinge. The lid portion may be provided with a second hinge having a hinge axis that is orthogonal to a hinge axis of the first hinge. A first lid portion that is formed by folding the first hinge and a second lid portion that is formed by folding the second hinge can be disposed in directions crossing each other. |
| US09893338B2 |
Secondary battery
A secondary battery includes a contact portion on a bottom retainer that contacts a bottom of a case, thus performing a tension function. The secondary battery includes an electrode assembly having a first electrode, a second electrode, and a separator between the first and second electrodes; a case accommodating the electrode assembly therein, having a top and a bottom and an opening in the top of the case; a cap plate closing the opening of the case; a bottom retainer on an upper surface of the bottom of the case, the bottom retainer including a support portion supporting the electrode assembly and at least one contact portion contacting the bottom of the case. As such, the contact portion may absorb external shocks, thus increasing durability and enhancing safety of the secondary battery. |
| US09893332B2 |
Car battery
A car battery comprises: four lithium ferro-phosphate batteries serially connected and positioned within a battery case with the anode and cathode caps exposed and connected to each other, and each of the lithium ferro-phosphate batteries has a capacity of 10-20 ampere-hour. The car battery also comprises two wires respectively connected to the anode and cathode caps, and the wires are thus connected to the anode and cathode of the lithium ferro-phosphate batteries connected in series. |
| US09893331B2 |
Battery adhesion-fixation structure
A battery adhesion-fixation structure includes battery cells, a holder, an adhesive agent, bus bars, and an insulator. The holder includes holder holes for holding the battery cells therein. The adhesive agent adheres the battery cells with the holder within the holder holes. The bus bars electrically connect the battery cells with each other. The insulator intervenes between the bus bars and the holder. The bus bars include a bus-bar hole, and a terminal tab. The bus-bar hole faces face-to-face to an electrode terminal of the battery cells. The terminal tab projects into the bus-bar hole to be electrically connected with the electrode terminal. The insulator includes a face, and a dent opening in the face. The face opposes to the holder. The dent opens in the face, and accommodates the adhesive agent overflown toward the insulator therein. |
| US09893329B2 |
Electronic power supply device
An electronic power supply device supplies electric power from a plurality of battery cells to an electronic power equipment and has an inner case for housing the plurality of battery cells and an outer case for housing the inner case. The electronic power supply device is designed to protect the plurality of battery cells from water damage and from an impact in the event that the electronic power supply device is accidentally dropped. |
| US09893324B2 |
Method of designing electroluminescent device, electroluminescent device manufactured with the design method, and method of manufacturing electroluminescent device with the design method
A method of designing an electroluminescent device allows more accurate computation of an external emission spectrum output to the outside in a current injection state and accurate estimate of a quantity and/or a color of light extracted to the outside, an electroluminescent device manufactured with the design method, and a method of manufacturing an electroluminescent device with the design method. |
| US09893323B2 |
Method for preparing OLED and OLED device
A method for preparing an OLED and an OLED device are provided. The method for preparing an OLED comprises forming an anode metal layer on an organic layer; forming an inorganic layer on the anode metal layer; and forming the anode metal layer into an anode layer comprising a pattern of an anode. |
| US09893315B2 |
Display device and method of manufacturing the same
A display device includes a display device including a substrate, and a display unit disposed on the substrate. An encapsulating unit encapsulates the display unit. The encapsulating unit includes a barrier organic layer. The barrier organic layer includes a plurality of organic materials and a plurality of inorganic materials. The inorganic materials are arranged in free volumes between the organic materials. |
| US09893297B2 |
Materials for electronic devices
The present invention relates to compounds of the formula (I), to the use of compounds of the formula (I) in electronic devices and electronic devices comprising one or more compounds of the formula (I). The invention furthermore relates to the preparation of the compounds of the formula (I) and to formulations comprising one or more compounds of the formula (I). |
| US09893296B2 |
Aromatic heterocyclic derivative, material for organic electroluminescent element, and organic electroluminescent element
An organic EL device includes an anode, an emitting layer, an electron transporting zone and a cathode in this sequence, in which the electron transporting zone contains an aromatic heterocyclic derivative represented by a formula (1) below. In the formula (1), X1 to X3 are a nitrogen atom or CR1, and A is represented by a formula (2) below. In the formula (2), L1 is s single bond or a linking group, and HAr is represented by a formula (3) below. In the formula (3), Y1 is an oxygen atom, a sulfur atom or the like, and one of X11 to X18 is a carbon atom bonded to L1 by a single bond and the rest of X11 to X18 are a nitrogen atom or CR13. |
| US09893295B2 |
Compound and organic light-emitting device including the same
Provided are a compound represented by Formula 1 and an organic light-emitting device including the same: wherein substituents of Formula 1 are understood by referring to the description provided in the detailed description. |
| US09893292B2 |
Materials for organic electroluminescence devices
The present invention relates to novel materials which can be used in organic electronic devices, in particular electroluminescent devices, and are certain derivatives of fused aromatic systems. |
| US09893291B2 |
Organic light-emitting device
An organic light-emitting device including: a first electrode; a second electrode facing the first electrode; an emission layer between the first electrode and the second electrode; a hole transport region between the first electrode and the emission layer; and an electron transport region between the emission layer and the second electrode, the electron transport region including an intermediate layer, wherein the emission layer includes a first compound and a second compound, each independently selected from compounds represented by Formula 1, and the intermediate layer includes a third compound and a fourth compound, each independently selected from compounds represented by Formula 2: |
| US09893288B2 |
Diketopyrrolopyrrole polymers for use in organic field effect transistors
The present invention relates to polymers comprising a repeating unit of the formula I, or III and their use as organic semiconductor in organic devices, especially an organic field effect transistor (OFET), or a device containing a diode and/or an organic field effect transistor. The polymers according to the invention have excellent solubility in organic solvents and excellent film-forming properties. In addition, high efficiency of energy conversion, excellent field-effect mobility, good on/off current ratios and/or excellent stability can be observed, when the polymers according to the invention are used in organic field effect transistors. |
| US09893286B2 |
Organic single crystal field effect circuit and preparing method thereof
The present invention provides an organic single crystal field effect circuit and method for preparing the same. The method comprises the steps of: preparing circuit masks; preparing a flexible planar embedded lamination electrode with the circuit patterns: 1) attaching octadecyl trichlorosilane on surface of a substrate; 2) preparing the source, drain and gate electrodes on the modified substrate, and attaching mercaptopropyl trimethoxysilane; 3) spin-coating polydimethyl siloxane on surfaces of the source, drain and gate electrodes, respectively; 4) removing the gate electrode spin-coated with polydimethyl siloxane, performing oxygen plasma treatment to the metal electrode surface of the gate electrode and polydimethyl siloxane surfaces of the source and drain electrodes, respectively, to form hydroxyl; 5) adjusting the source and the drain electrodes, attaching the gate, source and drain electrodes into an integration, thereby obtaining the flexible planar embedded lamination electrode; preparing the organic single crystal field effect circuit. The present invention prepares electrodes using photolithography technique with high precision such that patterns with high precision and high complexity can be prepared, which is convenient and practicable. |
| US09893285B2 |
Method of manufacturing organic light-emitting display apparatus and organic light-emitting display apparatus
A method of manufacturing an organic light-emitting display apparatus using a light-blocking photoresist layer which minimizes damage to an intermediate layer, including an emission layer, during a process for manufacturing the organic light-emitting display apparatus. |
| US09893282B2 |
Methods of forming resistive memory elements
A resistive memory element comprises a first electrode, an active material over the first electrode, a buffer material over the active material and comprising longitudinally extending, columnar grains of crystalline material, an ion reservoir material over the buffer material, and a second electrode over the ion reservoir material. A memory cell, a memory device, an electronic system, and a method of forming a resistive memory element are also described. |
| US09893280B2 |
Memory device
A memory device according to an embodiment includes an insulating layer containing silicon, an interface layer provided on the insulating layer and containing a chalcogenide compound of a transition metal, and a conductive layer provided on the interface layer, containing antimony or bismuth, and having a superlattice structure. |
| US09893279B2 |
Methods, apparatuses, and circuits for programming a memory device
Subject matter described pertains to methods, apparatuses, and circuits for programming a memory device. |
| US09893276B2 |
Switching element, switching element manufacturing method, semiconductor device, and semiconductor device manufacturing method
To provide a switching element having excellent operational stability and a high production yield, and a semiconductor device using the switching element, a switching element according to this invention includes a non-volatile resistive-change element, a rectifying element, and an insulating material. The non-volatile resistive-change element includes a first electrode, a second electrode, and a non-volatile resistive-change layer provided between the first electrode and the second electrode. The rectifying element includes the second electrode, a third electrode, and a volatile resistive-change layer provided between the second electrode and the third electrode. The insulating material is provided at least on the side surface of the third electrode. |
| US09893275B2 |
Magnetoresistive structure having two dielectric layers, and method of manufacturing same
A magnetoresistive structure having two dielectric layers, and method of manufacturing same, includes a free magnetic layer positioned between the two dielectric layers. The method of manufacture comprises at least two etch processes and at least one encapsulation process interposed therebetween wherein the encapsulation is formed on sidewalls of the partially formed magnetoresistive stack between etch processes. |
| US09893274B2 |
Methods of manufacturing a magnetic field sensor
A semiconductor process integrates three bridge circuits, each include magnetoresistive sensors coupled as a Wheatstone bridge on a single chip to sense a magnetic field in three orthogonal directions. The process includes various deposition and etch steps forming the magnetoresistive sensors and a plurality of flux guides on one of the three bridge circuits for transferring a “Z” axis magnetic field onto sensors orientated in the XY plane. |
| US09893269B2 |
Piezoelectric element, stator for oscillatory wave motor, oscillatory wave motor, driving control system, optical apparatus, and method for making stator for oscillatory wave motor
The present invention provides a piezoelectric element that includes a piezoelectric material having first and second surfaces; a common electrode disposed on the first surface; and a plurality of drive phase electrodes, a detection phase electrode, and a non-drive phase electrode disposed on the second surface, the piezoelectric material being sandwiched between the common electrode and the electrodes on the second surface. An absolute value d(1) of a piezoelectric constant of the piezoelectric material (1) in portions sandwiched between the drive phase electrodes and the common electrode, an absolute value d(2) of a piezoelectric constant of the piezoelectric material (2) in a portion sandwiched between the detection phase electrode and the common electrode, and an absolute value d(3) of the piezoelectric material (3) in a portion sandwiched between the non-drive phase electrode and the common electrode satisfy d(2)<0.95d(1), d(3)<0.95d(1), and 0.9≦d(3)/d(2)≦1.1. |
| US09893263B2 |
Driver for optical deflector using combined saw-tooth drive voltage and method for controlling the same
In a driver for driving an optical deflector including a mirror, a piezoelectric actuator and a piezoelectric sensor adapted to sense vibrations of the piezoelectric actuator, a saw-tooth voltage generating unit; a combined saw-tooth voltage generating unit; and a control unit, the control unit applies a saw-tooth voltage and its inverted voltage to the piezoelectric actuator; performs a low-pass filtering process using a cut-off frequency upon a sense voltage; calculates a half period of fluctuations included in a low-pass-filtered saw-tooth voltage; combines the low-pass-filtered saw-tooth voltage with a delayed low-pass-filtered saw-tooth voltage; and to applies a combined saw-tooth voltage and its inverted voltage to the piezoelectric actuator. |
| US09893262B2 |
Lumped-element device for quantum information processing systems
In some aspects, a quantum information processing circuit includes a lumped-element device on the surface of a dielectric substrate. The lumped-element device can include a capacitor pad and an inductive transmission line. The capacitor pad can be capacitively coupled to another capacitor pad. The inductive transmission line can reside in an interior clearance area defined by an inner boundary of the capacitor pad. The lumped-element device can be, for example, a resonator device or a filter device. The inductive transmission line can be, for example, a meander inductor. |
| US09893258B2 |
Package, light emitting device, and methods of manufacturing the package and the light emitting device
A package for mounting a light emitting element includes a recess; a pair of lead electrodes exposed at a bottom surface of the recess; a plating layer covering a surface of each of the pair of lead electrodes; and a resin molded body retaining the pair of lead electrodes, and forming an area between the pair of lead electrodes at the bottom surface of the recess and a lateral surface of the recess. At least one of the lead electrodes has a front surface protrusion that is linearly formed along the resin molded body at the bottom surface of the recess and along a periphery of the bottom surface of the recess, and a back surface protrusion that is formed at a position at a back surface opposite to a position of the front surface protrusion, and at least a tip of each of the front surface protrusion and the back surface protrusion is exposed outside the plating layer. |
| US09893256B2 |
Metal coating method, light-emitting device, and manufacturing method for the same
A metal coating method includes forming a metal layer on a substrate including a first member and a second member, the second member having a lower thermal conductivity than a thermal conductivity of the first member, and irradiating the metal layer formed on the first member and the second member with a laser beam such that, after irradiation, the metal layer formed on the first member remains, and the metal layer formed on the second member is removed. |
| US09893251B2 |
Light-emitting device packages and methods of manufacturing the same
A light-emitting device package includes a plurality of luminescent structures arranged spaced apart from each other in a horizontal direction, an intermediate layer on the plurality of luminescent structures, and wavelength conversion layers on the intermediate layer, the wavelength conversion layers vertically overlapping separate, respective luminescent structures of the plurality of luminescent structures. The intermediate layer may include a plurality of layers, the plurality of layers associated with different refractive indexes, respectively. The intermediate layer may include a plurality of sets of holes, each set of holes may include a separate plurality of holes, and each wavelength conversion layer may vertically overlap a separate set of holes on the intermediate layer. |
| US09893250B1 |
Light emitting device having silicone resin-based sealing member
A light emitting device includes at least one light emitting element including a plurality of semiconductor layers; and a light transmissive sealing member covering the at least one light emitting element. The light transmissive sealing member comprises a light transmissive sealing resin containing a silicone resin having a siloxane bond scaffold having methyl and phenyl groups as a principal ingredient. The light transmissive sealing resin has a refractive index in a range between 1.45 and 1.52, a durometer type D hardness at 25° C. specified by JIS K 6253 in a range between 20 and 70, and a DMA tan δ-based glass transition temperature (Tg) in a range between 20° C. and 70° C. |
| US09893249B2 |
Light-emitting device
A light-emitting device includes a base, a substrate, a plurality of light-emitting elements, a filler, and a sealing resin body. The base includes an upper surface and a mounting area. The substrate is disposed on the upper surface of the base. The substrate includes an opening. The mounting area is exposed from the opening of the substrate. The plurality of light-emitting elements are disposed on the mounting area of the base at predetermined intervals with one another. The filler is disposed around each of the plurality of light-emitting elements. The sealing resin body includes a phosphor. The sealing resin body is configured to seal the light-emitting elements and the filler. |
| US09893247B2 |
Light-emitting device including phosphorus layer covering side surfaces of substrate and light-emitting device package including the same
A light-emitting device including a phosphor layer, a light-emitting device package employing the light-emitting device, a method of manufacturing the light-emitting device, and a method of packaging the light-emitting device. The light-emitting device includes: a light-transmissive substrate having a top surface, a bottom surface, and side surfaces; a light-emitting unit formed on the top surface of the light-transmissive substrate; and a phosphor layer covering all the side surfaces of the light-transmissive substrate. According to the present invention, chromaticity inferiorities of light emitted from side surfaces of a substrate may be reduced. |
| US09893241B2 |
Light emitting device having bonding pads formed therein for packaging
A light-emitting device comprises a semiconductor stack comprising a first semiconductor layer, a second semiconductor layer, and an active layer formed between the first semiconductor layer and the second semiconductor layer; a first pad on the semiconductor stack; a second pad on the semiconductor stack, wherein the first pad and the second pad are separated from each other with a distance, which define a region between the first pad and the second pad on the semiconductor stack; and multiple vias penetrating the active layer to expose the first semiconductor layer, wherein the first pad and the second pad are formed on regions other than the multiple vias. |
| US09893240B2 |
Light emitting diode and LED module having the same
Disclosed are an LED and an LED module. The LED includes: a first conductivity type semiconductor layer; a mesa disposed over the first conductivity type semiconductor layer and including an active layer and a second conductivity type semiconductor layer; a first ohmic-contact structure in contact with the first conductivity type semiconductor layer; a second ohmic-contact structure in contact with the second conductivity type semiconductor layer; a lower insulating layer at least partially covering the mesa and the first conductivity type semiconductor layer and disposed to form a first opening part at least partially exposing the first ohmic-contact structure and a second opening part at least partially exposing the second ohmic-contact structure; and a current distributing layer connected to the first ohmic-contact structure at least partially exposed by the first opening part and disposed to form a third opening part at least partially exposing the second opening part. |
| US09893235B2 |
Light emitting device and light emitting apparatus having the same
A light emitting device is provided a transmissive substrate; a first pattern portion including a protrusions; a second pattern portion including a concaves having a width smaller than a width of each protrusion; a light emitting structure including a first conductive semiconductor layer, a second conductive semiconductor layer and an active layer, under the transmissive substrate; a first electrode under the first conductive semiconductor layer; a reflective electrode layer under the second conductive semiconductor layer; a second electrode under the reflective electrode layer; a first connection electrode under the first electrode; a second connection electrode under the second electrode; and an insulating support member around the first electrode and the first connection electrode and around the second electrode and the second connection electrode. A transmissive resin layer is on the transmissive substrate and an insulating layer is between the insulating support member and the reflective electrode layer. |
| US09893234B2 |
Composite substrate for light-emitting element and production method therefor
Provided is a light emitting device composite substrate suitable for manufacturing large-area light emitting devices at low cost. The light emitting device composite substrate comprises a substrate composed of an oriented polycrystalline alumina sintered body, and a light emitting functional layer formed on the substrate and having two or more layers composed of semiconductor single crystal grains, wherein each of the two or more layers has a single crystal structure in a direction approximately normal to the substrate. |
| US09893226B2 |
Conversion of high-energy photons into electricity
Systems and methods for the conversion of energy of high-energy photons into electricity which utilize a series of materials with differing atomic charges to take advantage of the emission of a large multiplicity of electrons by a single high-energy photon via a cascade of Auger electron emissions. In one embodiment, a high-energy photon converter preferably includes a linearly layered nanometric-scaled wafer made up of layers of a first material sandwiched between layers of a second material having an atomic charge number differing from the atomic charge number of the first material. In other embodiments, the nanometric-scaled layers are configured in a tubular or shell-like configuration and/or include layers of a third insulator material. |
| US09893224B2 |
Emitters of a backside contact solar cell
A system and method of patterning dopants of opposite polarity to form a solar cell is described. Two dopant films are deposited on a substrate. A laser is used to pattern the N-type dopant, by mixing the two dopant films into a single film with an exposure to the laser and/or drive the N-type dopant into the substrate to form an N-type emitter. A thermal process drives the P-type dopant from the P-type dopant film to form P-type emitters and further drives the N-type dopant from the single film to either form or further drive the N-type emitter. |
| US09893217B2 |
Radio frequency transparent photovoltaic cell
A radio frequency transparent photovoltaic cell includes a back contact layer formed of an electrically conductive material, at least one aperture formed in the back contact layer, and at least one photovoltaic cell section disposed on the back contact layer. An airship includes one or more radio frequency antennas disposed in an interior of the airship. One or more radio frequency transparent photovoltaic cells are disposed on an outer surface of the airship. |
| US09893210B2 |
Semiconductor device and method of manufacturing the same
A semiconductor device includes: a substrate; a nitride semiconductor layer on the substrate; a source electrode, a drain electrode and a gate electrode on the nitride semiconductor layer; and a SiN surface protective film covering the nitride semiconductor layer, wherein a composition ratio Si/N of Si and N that form a Si—N bond of the SiN surface protective film is 0.751 to 0.801. |
| US09893204B2 |
Semiconductor device having transistor including two oxide semiconductor layers having different lattice constants
One object is to provide a new semiconductor device whose standby power is sufficiently reduced. The semiconductor device includes a first power supply terminal, a second power supply terminal, a switching transistor using an oxide semiconductor material and an integrated circuit. The first power supply terminal is electrically connected to one of a source terminal and a drain terminal of the switching transistor. The other of the source terminal and the drain terminal of the switching transistor is electrically connected to one terminal of the integrated circuit. The other terminal of the integrated circuit is electrically connected to the second power supply terminal. |
| US09893203B2 |
Thin film transistor array panel and method for manufacturing the same
One or more exemplary embodiments disclose a thin film transistor array panel and a manufacturing method thereof including a substrate, a gate line on the substrate, the gate line including a gate electrode, a gate insulating layer on the gate electrode, a semiconductor layer on the gate insulating layer, and the semiconductor layer including an oxide semiconductor, a data wire layer above the semiconductor layer, the data wire layer including a data line, a source electrode coupled to the data line, and a drain electrode facing the source electrode, and a metal phosphorus oxide layer configured to cover the source electrode and the drain electrode. |
| US09893202B2 |
Manufacturing method of semiconductor device
A method for manufacturing a semiconductor device has a first step including a step of forming an oxide semiconductor film, a second step including a step of forming a gate insulating film over the oxide semiconductor film and a step of forming a gate electrode over the gate insulating film, a third step including a step of forming a nitride insulating film over the oxide semiconductor film and the gate electrode, a fourth step including a step of forming an oxide insulating film over the nitride insulating film, a fifth step including a step of forming an opening in the nitride insulating film and the oxide insulating film, and a sixth step including a step of forming source and drain electrodes over the oxide insulating film so as to cover the opening. In the third step, the nitride insulating film is formed through at least two steps: plasma treatment and deposition treatment. The two steps are each performed at a temperature higher than or equal to 150° C. and lower than 300° C. |
| US09893201B2 |
Oxide semiconductor film and semiconductor device
To provide an oxide semiconductor film having stable electric conductivity and a highly reliable semiconductor device having stable electric characteristics by using the oxide semiconductor film. The oxide semiconductor film contains indium (In), gallium (Ga), and zinc (Zn) and includes a c-axis-aligned crystalline region aligned in the direction parallel to a normal vector of a surface where the oxide semiconductor film is formed. Further, the composition of the c-axis-aligned crystalline region is represented by In1+δGa1−δO3(ZnO)m (0<δ<1 and m=1 to 3 are satisfied), and the composition of the entire oxide semiconductor film including the c-axis-aligned crystalline region is represented by InxGayO3(ZnO)m (0 |
| US09893200B2 |
Semiconductor device and method for manufacturing the same
It is an object to provide an oxide semiconductor which is suitable for use in a semiconductor device. Alternatively, it is another object to provide a semiconductor device using the oxide semiconductor. Provided is a semiconductor device including an In—Ga—Zn—O based oxide semiconductor layer in a channel formation region of a transistor. In the semiconductor device, the In—Ga—Zn—O based oxide semiconductor layer has a structure in which crystal grains represented by InGaO3(ZnO)m (m=1) are included in an amorphous structure represented by InGaO3(ZnO)m (m>0). |
| US09893198B2 |
Thin film transistor utilized in array substrate and manufacturing method thereof
A method for manufacturing a thin film transistor (TFT) which includes a gate, a gate insulation layer, a channel layer, an etching stopping layer, a source, and a drain. The gate is formed on a substrate. The gate insulation layer covers the gate and the substrate. The channel layer is formed on the gate insulation layer to correspond with the gate. The etching stopping layer is formed on a surface of the channel layer. The channel layer and the etching stopping layer are formed in a same photo etching process. |
| US09893197B2 |
Thin film transistor substrate, manufacturing method thereof, and liquid crystal display panel using same
A thin film transistor (TFT) includes a substrate, a TFT formed on the substrate, and a passivation layer formed on the TFT. The TFT includes a gate, a source, a drain, and a channel layer. The source and the drain are respectively located at opposite sides of the channel layer. The channel layer includes oxygen ions which are implanted into the channel layer by an oxygen implanting process performed in an environment having an air pressure greater than a standard atmospheric pressure. |
| US09893196B2 |
Semiconductor device comprising oxide semiconductor film
A transistor including an oxide semiconductor with favorable electric characteristics and a manufacturing method thereof are provided. A semiconductor device includes a transistor. The transistor includes an oxide semiconductor film over a base insulating film, a gate electrode overlapping with the oxide semiconductor film with a gate insulating film interposed therebetween, and a pair of electrodes in contact with the oxide semiconductor film and serving as a source electrode and a drain electrode. The base insulating film includes a first oxide insulating film partly in contact with the oxide semiconductor film and a second oxide insulating film in the periphery of the first oxide insulating film. An end portion of the oxide semiconductor film which crosses the channel width direction of the transistor is located over the second oxide insulating film. |
| US09893193B2 |
Thin-film transistor including a gate electrode with a side wall insulating layer and display device
A method of fabricating a thin-film transistor includes: forming an oxide semiconductor layer above a substrate; forming a gate insulating layer above the oxide semiconductor layer; forming a gate electrode above the gate insulating layer; forming a cover layer on the gate electrode; forming a side wall insulating layer on a side wall portion of the gate electrode by heat treatment, after the forming of a cover layer; forming an interlayer insulating layer covering the gate electrode and the oxide semiconductor layer, after the forming of a side wall insulating layer; and forming, above the interlayer insulating layer, a source electrode and a drain electrode electrically connected to the oxide semiconductor layer. |
| US09893191B2 |
FinFET transistor with u-shaped channel
A semiconductor device having a u-shaped FinFET and methods of forming the same are disclosed. The semiconductor device includes a substrate and a fin over the substrate, wherein the fin has a u-shape from a top view with first and second arm portions and a bridge portion connecting the first and second arm portions. The semiconductor device further includes a first gate over the substrate, engaging the fin at both the first and second arm portions and the bridge portion. A source region of the FinFET is formed in the first arm portion, a drain region of the FinFET is formed in the second arm portion, and a channel region of the FinFET is formed in the fin between the source region and the drain region. |
| US09893189B2 |
Method for reducing contact resistance in semiconductor structures
Semiconductor structures and methods reduce contact resistance, while retaining cost effectiveness for integration into the process flow by introducing a heavily-doped contact layer disposed between two adjacent layers. The heavily-doped contact layer may be formed through a solid-phase epitaxial regrowth method. The contact resistance may be tuned by adjusting dopant concentration and contact area configuration of the heavily-doped epitaxial contact layer. |
| US09893188B2 |
Semiconductor structure with template for transition metal dichalcogenides channel material growth
A semiconductor structure includes a substrate, a buffer layer, and a two-dimensional layered material. The buffer layer is above the substrate and is formed from one of SiC and a nitride-based material. The two-dimensional layered material is above the buffer material. The construction as such permits formation, e.g., of a channel of a transistor from the two-dimensional layered material. |
| US09893183B2 |
Semiconductor structure and manufacturing method thereof
Some embodiments of the present disclosure provide a semiconductor structure including a substrate and an epitaxy region partially disposed in the substrate. The epitaxy region includes a substance with a lattice constant that is larger than a lattice constant of the substrate. The concentration profile of a substance in the epitaxy region is monotonically increasing from a bottom portion of the epitaxy region to a of the epitaxy region. A first layer of the epitaxy region has a height to width ratio of about 2. The first layer is a layer positioned closest to the substrate, and the first layer has an average concentration of the substance from about 20 to about 32 percent. A second layer disposed over the first layer. The second layer has a bottom portion with a concentration of the substance from about 27 percent to about 37 percent. |
| US09893181B1 |
Uniform gate length in vertical field effect transistors
A method of fabricating a vertical field effect transistor includes forming a base layer on a doped layer that is formed on a substrate, and forming fin hard masks above the base layer. Spacers are formed adjacent to each side of each of the fin hard masks above the base layer. A width dimension of each of the spacers is the same. Gaps between the spacers are filled with oxide prior to removing the spacers. The spacers are removed to leave gaps of the same width on each side of each of the fin hard masks. An etch in the gaps forms a plurality of fins below the fin hard masks. A height dimension of each of the plurality of fins is the same and a space between two of the plurality of fins is different than a second space between two others of the plurality of fins. |
| US09893178B2 |
Semiconductor device having a channel separation trench
A semiconductor device includes a transistor formed in a semiconductor substrate having a main surface. The transistor includes a source region of a first conductivity type, a drain region of the first conductivity type, a channel region of a second conductivity type, a gate trench adjacent to a first sidewall of the channel region, a gate conductive material disposed in the gate trench, the gate conductive material being connected to a gate terminal, and a channel separation trench adjacent to a second sidewall of the channel region. The second sidewall faces the first sidewall via the channel region. The channel separation trench is filled with an insulating separation trench filling consisting of an insulating material in direct contact with the channel region. The source region and the drain region are disposed along a first direction. The first direction is parallel to the main surface. |
| US09893177B2 |
Silicon carbide semiconductor device and method of manufacturing the same
A silicon carbide semiconductor device includes a silicon carbide semiconductor layer having a main surface, the main surface of the silicon carbide semiconductor layer being provided with a trench having a closed shape when seen in plan view, the trench including a bottom, a plurality of sidewalls continuous with the bottom, and a sidewall-connecting corner portion at a connection portion between two adjacent sidewalls of the plurality of sidewalls, the silicon carbide semiconductor device further including a gate insulating film covering the bottom and the sidewalls of the trench, and a gate electrode provided on the gate insulating film, between the bottom and an upper end of the trench, the thickness of the gate insulating film at the sidewall-connecting corner portion of the trench being greater than the thickness of the gate insulating film at a portion other than the sidewall-connecting corner portion. |
| US09893173B2 |
Method for fabricating a metallic oxide thin film transistor
A method for fabricating a metal oxide thin film transistor comprises the steps of: selecting a substrate and fabricating a gate electrode on the substrate; growing a layer of dielectric or a high permittivity dielectric on the substrate, and allowing the layer of dielectric or high permittivity dielectric to cover the gate electrode to serve as a gate dielectric layer; growing a metal layer on the gate dielectric layer; fabricating a channel in the middle position of the metal layer; anodizing the metal of the channel at atmospheric pressure and room-temperature; fabricating an active region comprising a source, a drain, and the channel; depositing a silicon nitride layer on the active region and forming two contact holes of the electrodes on the silicon nitride layer; and depositing a layer of aluminum film and fabricating two metal contact electrodes of the thin film transistor. |
| US09893172B2 |
Methods to integrate SONOS into CMOS flow
A method of forming a transistor is described. In one embodiment the method includes: forming a channel of a transistor in a surface of a substrate; forming a dielectric stack including a first oxide layer overlying the surface of the substrate, a middle layer comprising nitride overlying the first oxide layer and a second oxide layer overlying the middle layer; forming over the dielectric stack a mask exposing source and drain (S/D) regions of the transistor; etching the dielectric stack through the mask to thin the dielectric stack by removing the second oxide layer and at least a first portion of the middle layer in S/D regions of the transistor; and implanting dopants into S/D regions of the transistor through the thinned dielectric stack to form a lightly-doped drain (LDD) adjacent to the channel of the transistor. Other embodiments are also described. |
| US09893168B2 |
Split gate semiconductor device with curved gate oxide profile
A split gate semiconductor device includes a trench gate having a first electrode region and a second electrode region that are separated from each other by a gate oxide layer and an adjacent dielectric layer. The boundary of the gate oxide layer and the dielectric layer is curved to avoid a sharp corner where the gate oxide layer meets the sidewalls of the trench. |
| US09893162B2 |
Silicon carbide semiconductor device and method of manufacturing silicon carbide semiconductor device
Heat treatment is performed twice with respect to a silicon carbide substrate. In the first heat treatment process, after Si ions are implanted in a front surface of the silicon carbide substrate, the silicon carbide substrate contacting an electrode film is heat treated, and a precursor layer of a thermal reaction layer is formed between the electrode film and the silicon carbide substrate that includes a high-concentration impurity region. Thereafter, the unreacted electrode film remaining on the precursor layer of the thermal reaction layer and on an oxide film is removed. In the subsequent second heat treatment process, the silicon carbide substrate from which the unreacted electrode film has been removed is heat treated and the precursor layer of the thermal reaction layer at a bottom area of the opening is converted into the thermal reaction layer. |
| US09893157B1 |
Structures with contact trenches and isolation trenches
Structures that include contact trenches and isolation trenches, as well as methods for forming structures including contact trenches and isolation trenches. A contact trench is formed that extends through a device layer of a silicon-on-insulator (SOI) substrate to a buried oxide layer of the SOI substrate. An isolation trench is formed that extends through the device layer to the buried oxide layer. An electrical insulator is deposited that fills the contact trench and the first isolation trench. The electrical insulator is removed from the contact trench. After the electrical insulator is removed from the contact trench, an electrical conductor is formed in the contact trench. The electrical contact may be coupled with a doped region in a handle wafer of the SOI substrate. |
| US09893153B2 |
Semiconductor device and method of manufacturing the same
A semiconductor device according to an embodiment includes a SiC layer, a gate electrode, a gate insulating film provided between the SiC layer and the gate electrode, a first region provided between the SiC layer and the gate insulating film, and a second region provided in the SiC layer. The first region contains at least one element selected from the group consisting of N (nitrogen), P (phosphorus), As (arsenic), Sb (antimony), Sc (scandium), Y (yttrium), La (lanthanum), lanthanoids (Ce, Pr, Nd, Pm, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb, and Lu), H (hydrogen), D (deuterium), and F (fluorine). The second region provided adjacent to the first region, and the second region has a higher oxygen concentration than a concentration of the at least one element. |
| US09893148B2 |
Method for fabricating a transistor device with a tuned dopant profile
A transistor device with a tuned dopant profile is fabricated by implanting one or more dopant migrating mitigating material such as carbon. The process conditions for the carbon implant are selected to achieve a desired peak location and height of the dopant profile for each dopant implant, such as boron. Different transistor devices with similar boron implants may be fabricated with different peak locations and heights for their respective dopant profiles by tailoring the carbon implant energy to effect tuned dopant profiles for the boron. |
| US09893144B1 |
Methods for fabricating metal-insulator-metal capacitors
Semiconductor devices having MIM capacitor structures are provided, as well as methods for fabricating semiconductor devices having MIM capacitor structures. For example, a semiconductor device includes a first capacitor electrode formed on a substrate, a capacitor insulating layer formed on the first capacitor electrode, and a second capacitor electrode. The second capacitor electrode comprises a layer of metallic material that is formed by application of a surface treatment to a surface of the capacitor insulating layer to convert the surface of the capacitor insulating layer to the layer of metallic material. As an example, the capacitor insulating layer comprises Ta3N5 insulating material, and the second capacitor electrode comprises TaN metallic material. |
| US09893143B2 |
Analog capacitor
An analog capacitor is disclosed. The analog capacitor may include a main analog capacitor, an interlayer insulating layer, and a plurality of stacked sub analog capacitors. The main analog capacitor may be formed over a semiconductor substrate. The interlayer insulating layer may be interposed between the semiconductor substrate and the main analog capacitor. The plurality of stacked sub analog capacitors may be inserted into the interlayer insulating layer. |
| US09893142B2 |
Method for manufacturing semiconductor device
A method of manufacturing a semiconductor device includes forming a lower metal layer, forming an interfacial oxide film on the lower metal layer, providing a metal precursor on the interfacial oxide film at a first pressure to adsorb the metal precursor into the interfacial oxide film, performing a first purge process at a second pressure to remove the unadsorbed metal precursor, the second pressure lower than the first pressure, providing an oxidizing gas at the first pressure to react with the adsorbed metal precursor, performing a second purge process at the second pressure to remove the unreacted oxidizing gas and form a dielectric film, and forming an upper metal layer on the dielectric film. |
| US09893134B2 |
Organic light-emitting diode display
An organic light-emitting diode (OLED) display is disclosed. In one aspect, the OLED display includes a substrate including a display area configured to display an image and a transmission area positioned on a periphery of the display area, a first insulating layer positioned in the display area and the transmission area and a thin film transistor positioned in the display area and formed on the first insulating layer. The OLED display also includes a second insulating layer positioned in the display area and the transmission area and covering the thin film transistor and an organic light-emitting element positioned in the display area and formed on the second insulating layer. The second insulating layer has a first transmission hole exposing a portion of the first insulating layer on the transmission area, and a spacer is positioned on the first insulating layer in the transmission hole. |
| US09893132B2 |
OLED display device and manufacture method thereof
The present invention provides an OLED display device and a manufacture method thereof, and the OLED display device comprises a first substrate (100), a second substrate (200) spaced and oppositely located with the first substrate (100), a plurality of thin film transistors (101) located at an inner surface of the first substrate (100), a transparent anode (201) located at an inner surface of the second substrate (200), a plurality of partition walls (202) located on the transparent anode (201), transmission holes (203) formed among the partition walls (202), an organic layer (204) located on the transparent anode (201) and in the transmission holes (203), a metal cathode (205) located on the organic layer (204) and the partition walls (202), and the metal cathode (205) is electrically connected to a drain of the thin film transistor (101). The OLED display device possesses a high aperture ratio and high transmittance. The manufacture method of the OLED display device provided by the present invention can manufacture an OLED display device with a high aperture ratio and high transmittance, and promote the yield and the productivity. |
| US09893127B2 |
Organic light emitting diode display and method for manufacturing the same
An organic light emitting diode display comprises a substrate comprising a major surface; first, second, third and fourth electrodes positioned over the substrate; a pixel defining layer positioned over the plurality of electrodes and comprising first, second, third and fourth openings; and a spacer positioned over the pixel defining layer. The first, second, third and fourth openings overlap the first, second, third and fourth electrodes, respectively, when viewed in a viewing direction perpendicular to the major surface. The first, second, third and fourth openings comprise first, second, third and fourth corners, respectively, wherein the first, second, third and fourth corners neighbor one another when viewed in the viewing direction. When viewed in the viewing direction, the spacer comprises at least a portion placed within an imaginary polygon defined by the first, second, third and fourth corners. |
| US09893123B2 |
Image sensor including photoelectric conversion devices
An image sensor includes a substrate comprising a first face and a second surface which faces the first surface and on which light is incident, a semiconductor photoelectric conversion device on the substrate, a gate electrode located between the first surface of the substrate and the semiconductor photoelectric conversion device and extending in a first direction perpendicular to the first surface, and an organic photoelectric conversion device stacked on the second surface of the substrate. |
| US09893119B2 |
Integrated circuit with hall effect and anisotropic magnetoresistive (AMR) sensors
Disclosed examples provide wafer-level integration of magnetoresistive sensors and Hall-effect sensors in a single integrated circuit, in which one or more vertical and/or horizontal Hall sensors are formed on or in a substrate along with transistors and other circuitry, and a magnetoresistive sensor circuit is formed in the IC metallization structure. |
| US09893118B2 |
Light emitting device and method for fabricating the same
A light emitting device that includes a conductive substrate, an insulating layer on the conductive substrate, a plurality of light emitting device cells on the insulating layer, a connection layer electrically interconnecting the light emitting device cells, a first contact section electrically connecting the conductive substrate with at least one light emitting device cell, and a second contact section on the at least one light emitting device cell. |
| US09893108B2 |
Method for manufacturing semiconductor device, and semiconductor device
Provided is a semiconductor device with improved performance. In a method for manufacturing a semiconductor device, after forming a gate electrode of a transfer transistor over a p-type well, a photodiode is formed in one part of the p-type well positioned on one side with respect to the gate electrode. Then, a cap insulating film including silicon and nitrogen is formed over the photodiode before implanting impurity ions for formation of an n-type low-concentration semiconductor region of the transfer transistor, into the other part of the p-type well positioned on a side opposite to the one side with respect to the gate electrode. |
| US09893104B2 |
Solid-state image pickup apparatus, and image pickup system using solid-state image pickup apparatus
A solid-state image pickup apparatus includes a photoelectric conversion unit, a charge storage unit, and a floating diffusion unit, all disposed on a semiconductor substrate. The solid-state image pickup apparatus further includes a first gate electrode disposed on the semiconductor substrate and extending between the photoelectric conversion unit and charge storage unit, and a second gate electrode disposed on the semiconductor substrate and extending between the charge storage unit and the floating diffusion unit. The solid-state image pickup apparatus further includes a light shielding member including a first part and a second part, wherein the first part is disposed over the charge storage unit and at least over the first gate electrode or the second gate electrode, and the second part is disposed between the first gate electrode and the second gate electrode such that the second part extends from the first part toward a surface of the semiconductor substrate. |
| US09893103B2 |
Solid-state image sensor
At least one solid-state image sensor includes a first photoelectric conversion unit configured to convert light into an electric charge, a first field effect transistor including a gate to which the electric charge converted by the first photoelectric conversion unit is input, and a bipolar transistor including a base and an emitter, the base being connected to a source of the first field effect transistor, and the emitter being configured to output a signal. |
| US09893097B2 |
LTPS array substrate and method for producing the same
An LTPS array substrate and a method for producing the same are proposed. The method includes: forming a gate of a thin-film transistor (TFT) of the LTPS array substrate on a substrate; forming a first insulating layer, a semiconductor layer, and a positive photoresist layer on the substrate one by one; exposing one side of the substrate on the opposite side of the gate for forming a polycrystalline silicon layer; forming a second insulating layer on the substrate of the polycrystalline silicon layer; forming a source and a drain of the TFT on the second insulating layer so that the source and the drain is electrically connected to the polycrystalline silicon layer via a contact hole. The use of masks in types and in numbers in the LTPS technology will be reduced. So, both of the processes and the production costs are reduced. |
| US09893086B1 |
Contact punch through mitigation in SOI substrate
A method of forming a contact to mitigate punch through in SOI substrates is disclosed. The method may include providing an active region in SOI substrate isolated from another region in the SOI substrate by a shallow trench isolation (STI), the active region having a silicided source/drain region adjacent the STI. A spacer may be formed at an edge of the silicided source/drain region adjacent to the STI. A contact etch stop layer (CESL) may be deposited over the spacer and a dielectric layer over the CESL. A contact opening may be formed to the source/drain region through the CESL and the dielectric layer. A portion of the contact opening is positioned over the spacer such that the spacer prevents punch through into the STI. A contact may then be formed in the contact opening. |
| US09893085B2 |
Integrated circuit (IC) with offset gate sidewall contacts and method of manufacture
A method of forming logic cell contacts, forming CMOS integrated circuit (IC) chips including the FETs and the IC chips. After forming replacement metal gates (RMG) on fin field effect transistor (finFET) pairs, gates are cut on selected pairs, separating PFET gates from NFET gates. An insulating plug formed between the cut gates isolates the pairs of cut gates from each other. Etching offset gate contacts at the plugs partially exposes each plug and one end of a gate sidewall at each cut gate. A second etch partially exposes cut gates. Filling the open offset contacts with conductive material, e.g., metal forms sidewall cut gate contacts and stitches said cut gate pairs together. |
| US09893083B1 |
Elevationally-extending strings of memory cells individually comprising a programmable charge storage transistor and methods of processing silicon nitride-comprising materials
A method comprises forming material to be etched over a substrate. An etch mask comprising a silicon nitride-comprising region is formed elevationally over the material. The etch mask comprises an elevationally-extending mask opening in the silicon nitride-comprising region that has a minimum horizontal open dimension that is greater in an elevationally-innermost portion of the region than in an elevationally-outermost portion of the region. The elevationally-outermost portion has a greater etch rate in at least one of HF and H3PO4 than does the elevationally-innermost portion. The etch mask is used as a mask while etching an elevationally-extending mask opening into the material. The silicon nitride-comprising region is exposed to at least one of HF and H3PO4 to increase the minimum horizontal open dimension in the elevationally-outermost portion to a greater degree than increase, if any, in the minimum horizontal open dimension in the elevationally-innermost portion. Other aspects and embodiments, including structure independent of method of manufacture, are disclosed. |
| US09893082B2 |
Semiconductor memory device and method of fabricating the same
A semiconductor memory device includes a stack including gate electrodes and insulating layers that are alternately and repeatedly stacked on a substrate. A cell channel structure penetrates the stack. The cell channel structure includes a first semiconductor pattern contacting the substrate and a first channel pattern on the first semiconductor pattern. The first semiconductor pattern extends to a first height from a surface of the substrate to a top surface of the first semiconductor pattern. A dummy channel structure on the substrate and spaced apart from the stack. The dummy channel structure includes a second semiconductor pattern contacting the substrate and a second channel pattern on the second semiconductor pattern. The second semiconductor pattern extends to a second height from the surface of the substrate to a top surface of the second semiconductor pattern. The first height is greater than the second height. |
| US09893081B1 |
Ridged word lines for increasing control gate lengths in a three-dimensional memory device
After formation of a memory opening through an alternating stack of insulating layers and sacrificial material layers, a blocking dielectric having a greater thickness at levels of the insulating layers than at levels of the sacrificial material layers is formed around, or within, the memory opening. A memory stack structure is formed within the memory opening. Backside recesses are formed by removing the sacrificial material layers and surface portions of the blocking dielectric to form backside recesses including vertically expanded end portions. Electrically conductive layers are formed within the backside recesses. Each of the electrically conductive layers is a control gate electrode which includes a uniform thickness portion and a ridged end portion having a greater vertical extent than the uniform thickness region. The ridged end portion laterally surrounds the memory stack structure and provides a longer gate length for the control gate electrodes for the memory stack structure. |
| US09893080B2 |
Semiconductor device having a diverse shaped columnar portion
A surface area of a transverse cross section of an upper portion of a columnar portion is greater than a surface area of a transverse cross section of a lower portion of the columnar portion. A configuration of the transverse cross section of the upper portion is a triangle or a pseudo-triangle having three corners, or a quadrilateral or a pseudo-quadrilateral having four corners. A configuration of the transverse cross section of the lower portion is substantially a circle. The upper portion of the columnar portion is adjacent to an upper layer portion of a stacked body including a control gate of an uppermost layer of control gates. The lower portion of the columnar portion is adjacent to a lower layer portion of the stacked body including a control gate of a lowermost layer of the control gates. |
| US09893079B2 |
Semiconductor memory device
According to an embodiment, a semiconductor memory device comprises a plurality of control gate electrodes, a semiconductor layer, and a charge accumulation layer. The plurality of control gate electrodes are stacked on a substrate. The semiconductor layer has one end connected to the substrate, has as its longer direction a direction perpendicular to the substrate, and faces the plurality of control gate electrodes. The charge accumulation layer is positioned between the control gate electrode and the semiconductor layer. Assuming at least one control gate electrode positioned in a lowermost layer of the plurality of control gate electrodes to be a first control gate electrode, the first control gate electrode comprises: a first portion; a second portion adjacent to the first portion; and a third portion connected to the first portion and the second portion. |
| US09893076B2 |
Access transistor of a nonvolatile memory device and method for fabricating same
A three-dimensional integrated circuit nonvolatile memory array includes a memory array of vertical channel NAND flash strings connected between an upper layer connection bit line and a substrate which includes one or more elevated source regions disposed on at least one side of each row of NAND flash strings so that each NAND flash string includes a lower select transistor with a first channel portion that runs perpendicular to the surface of the substrate through a vertical channel string body, a second channel portion that runs parallel to the surface of the substrate, and a third channel portion that runs perpendicular to the surface of the substrate through the elevated source region. |
| US09893075B1 |
Semiconductor memory device
A semiconductor memory device includes a plurality of electrode layers stacked in a first direction; a semiconductor layer of a columnar shape extending through the electrode layers in the first direction; and a plurality of floating gates provided between the electrode layers and the semiconductor layer respectively. The floating gates surround the semiconductor layer. A gate length in a first direction of a floating gate positioned between one of the electrode layers and the semiconductor layer is longer than a layer thickness in the first direction of the one of the electrode layers. A ratio of the layer thickness of the one of the electrode layers to the gate length has a positive correlation with an outer diameter of a first portion of the semiconductor layer surrounded by the floating gate in a second direction from the semiconductor layer toward the one of the electrode layers. |
| US09893073B2 |
Semiconductor nonvolatile memory element
A semiconductor nonvolatile memory element is used to form a constant current source in a semiconductor integrated circuit device. The semiconductor nonvolatile memory element includes a control gate electrode, a floating gate electrode, source/drain terminals, a thin first gate insulating film, and a second gate insulating film that is thick enough not to be broken down even when a voltage higher than an operating voltage of the semiconductor integrated circuit device is applied thereto, the first and second gate insulating films being formed below the control gate electrode. Thus, provided is a normally on type semiconductor nonvolatile memory element in which a threshold voltage can be regulated through injection of a large amount of charge with respect to the operating voltage from a drain terminal into the floating gate electrode via the second gate insulating film, and injected carriers do not leak in an operating voltage range. |
| US09893069B2 |
Semiconductor device having buried gate structure and method of fabricating the same
A semiconductor device includes a device isolation region defining an active region in a substrate, and gate structures buried in the active region of the substrate. At least one of the gate structures includes a gate trench, a gate insulating layer conformally formed on an inner wall of the gate trench, a gate barrier pattern conformally formed on the gate insulating layer disposed on a lower portion of the gate trench, a gate electrode pattern formed on the gate barrier pattern and filling the lower portion of the gate trench, an electrode protection layer conformally formed on the gate insulating layer disposed on an upper portion of the gate trench to be in contact with the gate barrier pattern and the gate electrode pattern, a buffer oxide layer conformally formed on the electrode protection layer, and a gate capping insulating layer formed on the buffer oxide layer to fill the upper portion of the gate trench. |
| US09893066B2 |
Semiconductor transistor device and method for fabricating the same
A semiconductor transistor device includes an oxide semiconductor layer having an active surface, a source electrode, a drain electrode, a gate electrode and a control capacitor. The gate electrode, the source electrode and the drain electrode are directly in contact with the active surface. The gate electrode is disposed between the drain electrode and the source electrode. The gate electrode, the source electrode and the drain electrode are separated from each other. The control capacitor is electrically connected to the gate electrode through a connection. |
| US09893065B2 |
Semiconductor integrated circuit
A semiconductor integrated circuit includes a first well region of a first conductivity type; a second well region of a second conductivity type provided in an upper part of the first well region; a current suppression layer of the first conductivity type provided in a lower part of the semiconductor substrate immediately below the first well region, separated from the first well region; and an isolation region of the second conductivity type provided in an upper part of the semiconductor substrate, separated from the first well region, a reference potential being applied to the isolation region. The semiconductor substrate is the second conductivity type. |
| US09893061B2 |
Multi-Fin device and method of making same
A multiple-fin device includes a substrate and a plurality of fins formed on the substrate. Source and drain regions are formed in the respective fins. A dielectric layer is formed on the substrate. The dielectric layer has a first thickness adjacent one side of a first fin and having a second thickness, different from the first thickness, adjacent an opposite side of the fin. A continuous gate structure is formed overlying the plurality of fins, the continuous gate structure being adjacent a top surface of each fin and at least one sidewall surface of at least one fin. By adjusting the dielectric layer thickness, channel width of the resulting device can be fine-tuned. |
| US09893058B2 |
Method of manufacturing a semiconductor device having reduced on-state resistance and structure
A semiconductor device includes a singulated region of semiconductor material having a first major surface and a second major surface opposite to the first major surface. In one embodiment, the second major surface includes a recessed surface portion bounded by opposing sidewall portions extending outward from the region of semiconductor material in cross-sectional view. The sidewall portions have outer surfaces defining peripheral edge segments of the singulated region of semiconductor material. An active device region is disposed adjacent to the first major surface and a first conductive layer is disposed adjoining the recessed surface portion. The recessed surface portion provides a semiconductor device having improved electrical characteristics, and the sidewall portions provide a semiconductor device that is less susceptible to warpage, breakage, and other reliability issues. |
| US09893057B2 |
Monolithically integrated semiconductor switch, particularly circuit breaker
A monolithically integrated semiconductor switch, particularly a circuit breaker, has regenerative turn-off behavior. The semiconductor switch has two monolithically integrated field effect transistors, for example a p-JFET and a n-JFET. The source electrodes of both JFETs and the well region of the n-JFET are short circuited. In addition, the gate electrodes of both JFETs and the drain electrode of the p-JFET are short-circuited via the cathode. In contrast, the well region of the p-JFET is short-circuited to the anode. In this way, a monolithically integrated semiconductor switch is created which turns off automatically when a certain anode voltage level or a certain anode current level is exceeded. The threshold values for the anode voltage and the anode current can be set by appropriate dimensioning of the elements. In this way, it is possible to achieve blocking strengths of up to 200 kV with fast response behavior. |
| US09893056B2 |
Multi-layer semiconductor device structure
One embodiment of the instant disclosure provides a semiconductor structure that comprises: a first device layer including a first active layer disposed over a substrate and a first gate layer disposed on the active layer, where at least one of the first active layer and the first gate layer includes a first layer alignment structure; a first bounding layer disposed over the first device layer, the first bounding layer including an opening arranged to detectably expose the first layer alignment structure; and a second device layer disposed over the bounding layer including a second layer alignment structure, where the second layer alignment structure is substantially aligned to the first layer alignment structure through the opening. |
| US09893051B2 |
LED chip having ESD protection
Disclosed herein is a light emitting diode chip having ESD protection. An exemplary embodiment provides a flip-chip type light emitting diode chip, which includes a light emitting diode part aligned on a substrate, and a reverse-parallel diode part disposed on the substrate and connected to the light emitting diode part. Within the flip-chip type light emitting diode chip, the light emitting diode part is placed together with reverse-parallel diode part, thereby providing a light emitting diode chip exhibiting strong resistance to electrostatic discharge. |
| US09893050B2 |
ESD protection structure
An ESD protection structure comprising a thyristor structure. The thyristor structure is formed from a first P-doped section comprising a first P-doped well formed within a first region of a P-doped epitaxial layer, a first N-doped section comprising a deep N-well structure, a second P-doped section comprising a second P-doped well formed within a second region of the epitaxial layer, and a second N-doped section comprising an N-doped contact region formed within a surface of the second P-doped well. The ESD protection structure further comprises a P-doped region formed on an upper surface of the deep N-well structure and forming a part of the second P-doped section of the thyristor structure. |
| US09893043B2 |
Method of manufacturing a chip package
Chip packages and methods of manufacture thereof are disclosed. In some embodiments, a method of manufacturing a chip package includes: stacking a second chip on a first chip, wherein a first interconnect including a support structure and a bonding structure is disposed between the first chip and the second chip; bonding the first chip and the second chip via a thermal process applied to the bonding structure of the first interconnect; stacking a third chip on the second chip, wherein a second interconnect including a support structure and a bonding structure is disposed between the second chip and the third chip; bonding the second chip and the third chip via the thermal process applied to the bonding structure of the second interconnect; and reflowing the bond between the first and second chips and simultaneously reflowing the bond between the second and third chips. |
| US09893039B2 |
Packaging a substrate with an LED into an interconnect structure only through top side landing pads on the substrate
Standardized photon building blocks are packaged in molded interconnect structures to form a variety of LED array products. No electrical conductors pass between the top and bottom surfaces of the substrate upon which LED dies are mounted. Microdots of highly reflective material are jetted onto the top surface. Landing pads on the top surface of the substrate are attached to contact pads disposed on the underside of a lip of the interconnect structure. In a solder reflow process, the photon building blocks self-align within the interconnect structure. Conductors in the interconnect structure are electrically coupled to the LED dies in the photon building blocks through the contact pads and landing pads. Compression molding is used to form lenses over the LED dies and leaves a flash layer of silicone covering the landing pads. The flash layer laterally above the landing pads is removed by blasting particles at the flash layer. |
| US09893036B2 |
Semiconductor device and manufacturing method of semiconductor device
A semiconductor device includes a first substrate, an aluminum pad, a first nickel electrode, a second substrate, a second nickel electrode, and a connection layer. The first substrate includes a wiring therein. The aluminum pad is provided adjacent to a surface layer of the first substrate and is connected to the wiring. A portion of the first nickel electrode extends inwardly of the first substrate and is connected to the aluminum pad. A top surface of the first nickel electrode projects from a surface of the first substrate. A portion of the second nickel electrode extends inwardly of the second substrate. A top surface of the second nickel electrode projects from a surface of the second substrate facing the first substrate. The connection layer comprises an alloy including tin and connects the first nickel electrode and the second nickel electrode. |
| US09893030B2 |
Reliable device assembly
Microelectronic assemblies and methods for making the same are disclosed herein. In one embodiment, a method of forming a microelectronic assembly comprises assembling first and second components to have first major surfaces of the first and second components facing one another and spaced apart from one another by a predetermined spacing, the first component having first and second oppositely-facing major surfaces, a first thickness extending in a first direction between the first and second major surfaces, and a plurality of first metal connection elements at the first major surface, the second component having a plurality of second metal connection elements at the first major surface of the second component; and plating a plurality of metal connector regions each connecting and extending continuously between a respective first connection element and a corresponding second connection element opposite the respective first connection element in the first direction. |
| US09893029B2 |
Semiconductor device and method for manufacturing the same
A semiconductor device includes: an integrated circuit having an electrode pad; a first insulating layer disposed on the integrated circuit; a redistribution layer including a plurality of wirings and disposed on the first insulating layer, at least one of the plurality of wirings being electrically coupled to the electrode pad; a second insulating layer having a opening on at least a portion of the plurality of wirings; a metal film disposed on the opening and on the second insulating layer, and electrically coupled to at least one of the plurality of wirings; and a solder bump the solder bump overhanging at least one of the plurality of wirings not electrically coupled to the metal film. |
| US09893027B2 |
Pre-plated substrate for die attachment
A method for attaching a semiconductor die to a substrate includes providing a substrate that includes an attachment layer at a surface of the substrate. The attachment layer is covered by a protective flash plating layer. The protective flash plating layer has a reflow temperature less than or equal to a reflow temperature of the attachment layer. The method further includes preheating the substrate to a temperature greater than or equal to a reflow temperature of the attachment layer, attaching a semiconductor die to the attachment layer, and cooling the substrate and semiconductor die. |
| US09893026B2 |
Systems, methods and devices for inter-substrate coupling
Inter-substrate coupling and alignment using liquid droplets can include electrical and plasmon modalities. For example, a set of droplets can be placed on a bottom substrate. A top substrate can be placed upon the droplets, which uses the droplets to align the substrates. Using the droplets in a capacitive or plasmon coupling modality, information or power can be transferred between the substrates using the droplets. |
| US09893025B2 |
High isolation wideband switch
A high isolation wideband switch is disclosed. In one aspect, the switch includes an integrated circuit package having an integrated circuit die with a first plurality of leads that is positioned on a package substrate that has a second plurality of leads. The first leads of the integrated circuit die are connected to the second the leads of the package substrate via bond wires and a first electrical coupling occurs between the first leads and the integrated circuit die in response to an RF signal applied to the integrated circuit package. The bond wires have a second electrical coupling in response to the RF signal and the bond wires are arranged such that the second electrical coupling is matched to the first electrical coupling within a selected frequency band so as to reduce the overall electrical coupling of the integrated circuit package for RF signals within the selected frequency band. |
| US09893023B2 |
Semiconductor chip with anti-reverse engineering function
A structure and a method. The structure includes a semiconductor substrate; a stack of wiring levels from a first wiring level to a last wiring level, the first wiring level closest to the semiconductor substrate and the last wiring level furthest from the semiconductor substrate, the stack of wiring levels including an intermediate wiring level between the first wiring level and the last wiring level; active devices contained in the semiconductor substrate and the first wiring level, each wiring level of the stack of wiring levels comprising a dielectric layer containing electrically conductive wire; a trench extending from the intermediate wiring level, through the first wiring level into the semiconductor substrate; and a chemical agent filling the trench, portions of at least one wiring level of the stack of wiring levels not chemically inert to the chemical agent or a reaction product of the chemical agent. |
| US09893020B2 |
Semiconductor device
In one embodiment, a semiconductor device comprising, a substrate comprising a wiring layer, a first conductive shielding layer disposed on the substrate and electrically isolated from the wiring layer, the first conductive shielding layer comprising a first bonding surface and a first end surface extending from the first bonding surface, a semiconductor chip disposed on the first conductive shielding layer, a molding member disposed over the first conductive shielding layer to cover the semiconductor chip, a second conductive shielding layer disposed over the first conductive shielding layer and the molding member, the second conductive shielding layer comprising a second bonding surface and a second end surface extending from the second bonding surface, and a bonding portion disposed between the first and second bonding surfaces, the bonding portion comprising a top surface and a bottom surface opposite to the top surface. The bottom surface of the bonding portion contacts the first bonding surface to form a first contact surface. The top surface of the bonding portion contacts the second bonding surface to form a second contact surface. An area of the second contact surface is larger than an area of the second end surface. |
| US09893017B2 |
Double-sided semiconductor package and dual-mold method of making same
A semiconductor device comprises a first conductive layer formed on a carrier over an insulating layer. A portion of the insulating layer is removed prior to forming the first conductive layer. A first semiconductor die is disposed over the first conductive layer. A discrete electrical component is disposed over the first conductive layer adjacent to the first semiconductor die. A first encapsulant is deposited over the first conductive layer and first semiconductor layer. A conductive pillar is formed through the first encapsulant between the first conductive layer and second conductive layer. A second encapsulant is deposited around the first encapsulant, first conductive layer, and first semiconductor die. A second conductive layer is formed over the first semiconductor die, first encapsulant, and second encapsulant opposite the first conductive layer. The carrier is removed after forming the second conductive layer. A semiconductor package is mounted to the first conductive layer. |
| US09893016B2 |
Multilayer wiring board having wiring structure for mounting multiple electronic components and method for manufacturing the same
A multilayer wiring board includes a main wiring board including insulation layers, first via conductors formed in the insulation layers, and a first conductive layer including first mounting pads such that the first mounting pads are positioned to mount a first electronic component and a second electronic component adjacent to each other on the main wiring board, and a wiring structure body mounted on the main wiring board such that the wiring structure body is positioned in an outermost insulation layer of the insulation layers, the wiring structure body including a second conductive layer which includes second mounting pads such that the second mounting pads are positioned to connect to the first electronic component and the second electronic component mounted on the main wiring board. The first via conductors are formed such that the first via conductors have diameters which increase in a same direction. |
| US09893015B2 |
Semiconductor device
A semiconductor device includes an element layer, plural source electrodes, plural drain electrodes, plural gate electrodes, a source bus bar, a drain bus bar, a first gate bus bar, and a second gate bus bar. The source electrodes, the drain electrodes, and the gate electrodes are disposed on the element layer and extend along a first direction. The gate electrodes are respectively disposed between the source and drain electrodes. The source and drain bus bars and the first and second gate bus bars extend along a second direction interlaced with the first direction. The source bus bar and the drain bus bar are electrically connected to the source electrodes and the drain electrodes, respectively. The first and second gate bus bars are connected to the gate electrodes. The first bus bar is disposed at one end of the source electrodes. The source electrode crosses the second gate bus bar. |
| US09893014B1 |
Designable channel FinFET fuse
On-chip, doped semiconductor fuse regions compatible with FinFET CMOS fabrication are formed from the channel regions of selected fins. One or more fin dimensions are optionally reduced in selected channel regions of the fins following dummy gate removal, such as height and/or width. The channel regions from which the fuse regions are formed are doped to provide electrical conductivity, amorphized using ion implantation, and then annealed to form substantially polycrystalline fuse regions. Source/drain regions function as terminals for the fuse regions. |
| US09893013B2 |
Semiconductor device and a method of increasing a resistance value of an electric fuse
A semiconductor device having an electric fuse structure which receives an electric current to permit the electric fuse to be cut without damaging portions around the fuse. The electric fuse can be electrically connected between an electronic circuit and a redundant circuit as a spare of the electronic circuit. After these circuits are sealed with a resin, the fuse can be cut by receiving the electric current from the outside. The electric fuse is formed in a fine layer, and is made of a main wiring and a barrier film. The linear expansion coefficient of each of the main wiring and the barrier film is larger than that of each of the insulator layers. The melting point of each of the main wiring and the barrier film is lower than that of each of the insulator layers. |
| US09893010B2 |
Device-manufacturing scheme for increasing the density of metal patterns in inter-layer dielectrics
A method includes forming a transistor at a surface of a semiconductor substrate, wherein the step of forming the transistor comprises forming a gate electrode, and forming a source/drain region adjacent the gate electrode. First metal features are formed to include at least portions at a same level as the gate electrode. Second metal features are formed simultaneously, and are over and contacting the first metal features. A first one of the second metal features is removed and replaced with a third metal feature, wherein a second one of the second metal features is not removed. A fourth metal feature is formed directly over and contacting the gate electrode, wherein the third and the fourth metal features are formed using a same metal-filling process. |
| US09893006B2 |
Semiconductor module
A semiconductor module includes a plurality of semiconductor chips that include gate electrodes on front surfaces, a gate terminal that receives a control signal from outside, and a print substrate. The print substrate includes a gate wiring layer that separates the control signal that is input into the gate terminal and passes the control signal to the gate electrodes of the semiconductor chips, and a cross-sectional area of the gate wiring layer becomes larger as the gate wiring layer gets closer to the gate terminal from the gate electrodes. |
| US09893003B2 |
Package substrate and flip-chip package circuit including the same
This disclosure provides a package substrate, a flip-chip package circuit, and their fabrication methods. The package substrate includes: a first wiring layer having a first dielectric material layer and a first metal wire protruding from the first dielectric material layer; a conductive pillar layer formed on the first wiring layer and including a molding compound layer, a second dielectric material layer formed on the molding compound layer, and a metal pillar connected to the first metal wire; a second wiring layer formed on the conductive pillar layer and including a second metal wire connected to the metal pillar; and a protection layer formed on the second wiring layer. |
| US09893000B2 |
Power semiconductor module and method for manufacturing the same
A power semiconductor module includes: a substrate including first, second, and third metal patterns separated from each other, a semiconductor element located on the substrate, a lead frame located on the substrate and including first, second, third, and fourth bodies; a first terminal connected to the first body, a second terminal connected to the second body, and a third common terminal that connects the third body and the fourth body, wherein a length of the third common terminal is longer than that of the first and second terminals. |
| US09892998B2 |
Package module of power conversion circuit and manufacturing method thereof
The present disclosure discloses a package module of a power conversion circuit and a manufacturing method thereof. The package module of the power conversion circuit is surface-mountable on a system board. The package module of the power conversion circuit includes: a substrate, a power device die, a molding layer and a plurality of pins. The substrate has a metal layer, an insulating substrate layer and a thermal conductive layer. The insulating substrate layer is disposed between the metal layer and the thermal conductive layer. The power device die is coupled to the metal layer. Devices on the metal layer of the substrate are embedded in the molding layer. The plurality of pins is electrically coupled to the metal layer and embedded in the molding layer, at least a contact surface of each of the pins which is electrically coupled to the system board is exposed, and the contact surface is parallel and/or perpendicular to the thermal conductive layer. The package module with this structure occupies a small area, and facilitates batch production. |
| US09892997B2 |
Adaptable molded leadframe package and related method
A semiconductor package includes at least one semiconductor device situated on a leadframe island, a first at least one lead protruding from a first side of the semiconductor package and configured to provide a first electrical connection to at least one terminal of the at least one semiconductor device, a second at least one lead protruding from a second side of the semiconductor package and configured to provide a second electrical connection to the at least one terminal of the at least one semiconductor device, and a continuous conductive structure configured to provide a conductive path between the first at least one lead, the second at least one lead, and the at least one terminal of the at least one semiconductor device through the leadframe island such that the at least one semiconductor device continues to function after trimming the first at least one lead. |
| US09892993B2 |
Semiconductor module having stacked insulated substrate structures
A semiconductor module (100) has a first insulating substrate (11); a first conductor layer (12) provided on a mounting surface of the first insulating substrate (11); a first electronic element (13) provided on the first conductor layer (12); a sealing resin (80), which covers an overall mounting region within the mounting surface of the first insulating substrate (11), the first conductor layer (12), and the first electronic element (13); and a frame body (70), which is made of metal and covers the overall sealing resin (80). |
| US09892990B1 |
Semiconductor package lid thermal interface material standoffs
Semiconductor package lid thermal interface material standoffs are disclosed and may include a substrate, a semiconductor die bonded to the substrate, a package lid bonded to the substrate and the semiconductor die thermal interface material in contact the semiconductor die, and standoffs that define a distance between the package lid and the substrate. The package lid may comprise thermal conducting material. The standoff may be within a portion of the thermal interface material. The package lid may provide a hermetic seal with the substrate. A passive device may be bonded to the substrate and covered by the package lid. A standoffs may also be formed on portions of the lid that are not in contact with the substrate. The standoff may be formed on four edges of the package lid. The standoff may comprise structures pressed into the lid. |
| US09892989B1 |
Wafer-level chip scale package with side protection
A semiconductor device includes a device die having a top surface, a bottom surface, and sidewalls between the top and bottom surfaces. A first protective layer covers at least the top surface and the sidewalls of the die. A thickness of the first protective layer on the sidewalls near the top surface is greater than a thickness of the first protective layer on the sidewalls die near the bottom surface. |
| US09892988B2 |
Semiconductor packaging structure and manufacturing method for the same
A semiconductor packaging structure and a manufacturing method for the same are disclosed. The semiconductor packaging structure includes a chip, a dielectric layer and a plurality of redistribution circuit layers. The chip has a plurality of connection pads. The dielectric layer is disposed on the chip and defined with a plurality of containers therein. The connection pads are exposed from the containers, respectively. The redistribution circuit layers are disposed within the containers and electrically connected with the connection pads, respectively. Via these arrangements, the bonding surfaces between the redistribution circuit layers and the dielectric layer can be increased. |
| US09892986B2 |
Packaged wafer manufacturing method and device chip manufacturing method
Disclosed herein is a packaged wafer manufacturing method including the steps of forming a groove along each division line on the front side of a wafer, each groove having a depth greater than the finished thickness of the wafer, next removing a chamfered portion from the outer circumference of the wafer to thereby form a step portion having a depth greater than the depth of each groove, next setting a die of a molding apparatus on the bottom surface of the step portion of the wafer in the condition where a space is defined between the die and the wafer, and next filling a mold resin into this space. Accordingly, the device area of the wafer is covered with the mold resin and each groove of the wafer is filled with the mold resin to thereby obtain a packaged wafer. |
| US09892985B2 |
Semiconductor device and method for manufacturing the same
One aspect of the present disclosure provides a semiconductor device. In some embodiments, the semiconductor device includes an integrated circuit die, at least one conductive terminal disposed on the integrated circuit die, a frame positioned on the integrated circuit die, wherein the frame substantially exposes the at least one conductive terminal, and at least one conductive bump positioned in the frame, wherein the at least one conductive bump electrically connects the at least one conductive terminal. |
| US09892983B2 |
Apparatus for forming a thin layer and method of forming a thin layer on a substrate using the same
An apparatus and method of forming an epitaxial layer are provided. The apparatus includes a process chamber in which an epitaxial process is performed to form epitaxial layer on a substrate. A first supplier supplies source gases for the epitaxial layer into the process chamber. A second supplier supplies dopants into the process chamber. A detector detects a composition ratio of the epitaxial layer and a concentration of the dopants in the epitaxial layer during the epitaxial growth process. And a controller controls a mass flow of at least one of the source gases and a mass flow of the dopants in-line with the epitaxial growth process. Accordingly, the layer thickness of the epitaxial layer can be accurately controlled in real time in line with the epitaxial process. |
| US09892981B2 |
Method and apparatus for depositing phosphor on semiconductor-light emitting device
A method and apparatus for depositing a phosphor using transfer molding. The method includes: forming a plurality of light-emitting devices on a wafer and rearranging the light-emitting devices on a carrier substrate according to luminance characteristics of the plurality of light-emitting devices by examining the luminance characteristics of the plurality of light-emitting devices; depositing the phosphor on the rearranged light-emitting devices using transfer molding; and separating the light-emitting devices on the carrier substrate. |
| US09892977B2 |
FinFET and method of forming fin of the FinFET
A method of generating a fin of a FinFET includes depositing a first hard mask layer on or above a first dummy gate and a second dummy gate, generating first spacers and second spacers by etching the first hard mask layer, removing only the first spacers, depositing a second hard mask layer, generating third spacers and fourth spacers by etching the second hard mask layer, removing the first dummy gate and the second dummy gate, generating first fins using the third spacers, and generating second fins using the second spacers and the fourth spacers. |
| US09892976B1 |
Forming a hybrid channel nanosheet semiconductor structure
A nanosheet semiconductor structure includes a first nanosheet field effect transistor (FET) structure having a first inner spacer comprised of a first material and a second nanosheet FET structure having second inner spacer comprised of a second material. The first material is different than the second material. |
| US09892973B2 |
Stress memorization technique for strain coupling enhancement in bulk finFET device
A method for forming strained fins includes etching trenches in a bulk substrate to form fins, filling the trenches with a dielectric fill and recessing the dielectric fill into the trenches to form shallow trench isolation regions. The fins are etched above the shallow trench isolation regions to form a staircase fin structure with narrow top portions of the fins. Gate structures are formed over the top portions of the fins. Raised source ad drain regions are epitaxially grown on opposite sides of the gate structure. A pre-morphization implant is performed to generate defects in the substrate to couple strain into the top portions of the fins. |
| US09892971B1 |
Crack prevent and stop for thin glass substrates
A method of forming a 3D crack-stop structure in, through, and wrapped around the edges of a substrate to prevent through-substrate cracks from propagating and breaking the substrate and the resulting device are provided. Embodiments include providing a substrate including one or more dies; forming a continuous first trench near an outer edge of the substrate; forming a continuous second trench parallel to and on an opposite side of the first trench from the outer edge; forming a continuous row of vias parallel to and on an opposite side of the second trench from the first trench, forming a continuous third trench parallel to and near an outer edge of each of the dies; forming a protective layer wrapping around the outer edge of the substrate and over and filling the trenches and vias; and patterning active areas of the substrate between the vias and the third trench. |
| US09892969B2 |
Process of forming an electronic device
A process of forming an electronic device includes providing a substrate having a major surface; etching a portion of a the substrate to define a trench extending from the major surface, wherein the portion of the trench has a first width, W1, along the major surface and a second width, W2, at a bottom of the portion of the trench, and wherein the first width is greater than the second width; depositing a protective layer along side surfaces of the portion of the trench; etching the substrate to extend a depth of the trench after depositing the protective layer; and removing the protective layer. |
| US09892967B2 |
Self-aligned contacts
A transistor comprises a substrate, a pair of spacers on the substrate, a gate dielectric layer on the substrate and between the pair of spacers, a gate electrode layer on the gate dielectric layer and between the pair of spacers, an insulating cap layer on the gate electrode layer and between the pair of spacers, and a pair of diffusion regions adjacent to the pair of spacers. The insulating cap layer forms an etch stop structure that is self aligned to the gate and prevents the contact etch from exposing the gate electrode, thereby preventing a short between the gate and contact. The insulator-cap layer enables self-aligned contacts, allowing initial patterning of wider contacts that are more robust to patterning limitations. |
| US09892964B1 |
Gap-fill polymer for filling fine pattern gaps and method for fabricating semiconductor device using the same
A gap-fill polymer for filling fine pattern gaps, which has a low dielectric constant (low-k) and excellent gap filling properties, may consist of a compound formed by condensation polymerization of a first oligomer represented by the formula 1 and a second oligomer represented by the formula 2. |
| US09892963B2 |
Device and method for reducing contact resistance of a metal
A method of fabricating an integrated circuit includes depositing a cap layer on a substrate; depositing a dielectric layer on the cap layer; and forming a trench in the dielectric layer. The method further includes depositing a tantalum nitride (TaN) layer on a sidewall of the trench such that the TaN layer has a greater concentration of nitrogen than tantalum. The method further includes depositing a tantalum (Ta) layer on the TaN layer using physical vapor deposition (PVD); and depositing a metal layer over the Ta layer. |
| US09892961B1 |
Air gap spacer formation for nano-scale semiconductor devices
Semiconductor devices having air gap spacers that are formed as part of BEOL or MOL layers of the semiconductor devices are provided, as well as methods for fabricating such air gap spacers. For example, a method comprises forming a first metallic structure and a second metallic structure on a substrate, wherein the first and second metallic structures are disposed adjacent to each other with insulating material disposed between the first and second metallic structures. The insulating material is etched to form a space between the first and second metallic structures. A layer of dielectric material is deposited over the first and second metallic structures using a pinch-off deposition process to form an air gap in the space between the first and second metallic structures, wherein a portion of the air gap extends above an upper surface of at least one of the first metallic structure and the second metallic structure. |
| US09892957B2 |
Semiconductor device structure and method for forming the same
A semiconductor device structure is provided. The semiconductor device structure includes a substrate and a first dielectric layer over the substrate. The semiconductor device structure includes a second dielectric layer over the first dielectric layer. The first dielectric layer and the second dielectric layer are made of different materials. The semiconductor device structure includes a conductive via structure passing through the first dielectric layer and penetrating into the second dielectric layer. The conductive via structure has a first portion and a second portion. The first portion and the second portion are in the first dielectric layer and the second dielectric layer respectively. The first portion has a first end portion facing the substrate. A first width of the first end portion is greater than a second width of the second portion. |
| US09892956B1 |
Wafer positioning pedestal for semiconductor processing
An assembly used in a process chamber for depositing a film on a wafer and including a pedestal extending from a central axis. An actuator is configured for controlling movement of the pedestal. A central shaft extends between the actuator and pedestal, the central shaft configured to move the pedestal along the central axis. A lift pad is configured to rest upon the pedestal and having a pad top surface configured to support a wafer placed thereon. A pad shaft extends between the actuator and the lift pad and controls movement of the lift pad. The pad shaft is positioned within the central shaft and is configured to separate the lift pad from the pedestal top surface by a process rotation displacement when the pedestal is in an upwards position. The pad shaft is configured to rotate relative to the pedestal top surface between first and second angular orientations. |
| US09892955B2 |
Substrate holding/rotating device, substrate processing apparatus including the same, and substrate processing method
This substrate holding/rotating device includes an opening magnet forming a predetermined magnetic field generation region through which each movable pin rotating in response to rotation of the rotary table is capable of passing, the magnetic field generation region disposed so as to be eccentric with respect to a rotation direction of the rotary table and so as to allow only driving magnets corresponding to part of the plurality of movable pins to pass through the magnetic field generation region, the opening magnet giving a repulsive force or an attractive force to the driving magnet of the movable pin passing through the magnetic field generation region, the opening magnet generating a force that enables the support portion of the movable pin urged to the hold position by the urging unit to move toward the open position against an urging force of the urging unit. |
| US09892951B2 |
Method of controlling adherence of microparticles to substrate to be processed, and processing apparatus
A method of controlling adherence of microparticles to a substrate to be processed includes applying voltage to an electrostatic chuck configured to electrostatically attract the substrate to be processed in a processing container before the substrate to be processed is carried into the processing container; and, after the applying of voltage to the electrostatic chuck, carrying the substrate to be processed into the processing container. Further, in the applying of voltage to the electrostatic chuck, the voltage is applied to the electrostatic chuck to reduce a potential difference between a focus ring and the substrate to be processed, the focus ring being provided to surround the electrostatic chuck. |
| US09892948B2 |
Wafer container having damping device
A wafer container is provided. The wafer container includes a pod base having a top surface and a bottom surface, a cassette disposed on the top surface, and a damping device, disposed on the bottom surface. The damping device includes a housing disposed in the pod base, and a damping mechanism disposed in the housing and protruding over the bottom surface. The damping mechanism is configured to provide a damping force. |
| US09892946B1 |
Processing apparatus and method
A processing apparatus includes a spin coating chamber, an ultraviolet curing chamber, a transfer module and an enclosure. The transfer module is assigned with a plurality transfer destinations, in which two of the transfer destinations are respectively located within the spin coating chamber and the ultraviolet curing chamber. The transfer module, the spin coating chamber and the ultraviolet curing chamber are enclosed by the enclosure. |
| US09892942B2 |
Substrate processing apparatus
The present invention relates to a substrate processing apparatus. The substrate processing apparatus includes a chamber including a chamber body of which one side is opened and having an inner space and a door opening and closing the chamber body, first susceptors disposed to be spaced apart from each other within the chamber, supports each of which is connected to one side surface of the door to support the substrate in parallel to the first susceptor, second susceptors disposed on the supports along a longitudinal direction of the door, the second susceptors being spaced apart from each other in a direction crossing the first susceptors, and at least one heat source unit disposed at least one surface of the chamber to heat the susceptors. |
| US09892938B2 |
Microelectronics package with inductive element and magnetically enhanced mold compound component
The present disclosure relates to a microelectronics package with an inductive element and a magnetically enhanced mold compound component, and a process for making the same. The disclosed microelectronics package includes a module substrate, a thinned flip-chip die with an upper surface that includes a first surface portion and a second surface portion surrounding the first surface portion, the magnetically enhanced mold compound component, and a mold compound component. The thinned flip-chip die is attached to the module substrate and includes a device layer with an inductive element embedded therein. Herein, the inductive element is underlying the first surface portion and not underlying the second surface portion. The magnetically enhanced mold compound component is formed over the first surface portion. The mold compound component is formed over the second surface portion, not over the first surface portion, and surrounding the magnetically enhanced mold compound component. |
| US09892937B2 |
Encapsulated dies with enhanced thermal performance
The present disclosure relates to enhancing the thermal performance of encapsulated flip chip dies. According to an exemplary process, a plurality of flip chip dies are attached on a top surface of a carrier, and a first mold compound is applied over the top surface of the carrier to encapsulate the plurality of flip chip dies. The first mold compound is thinned down to expose a substrate of each flip chip die and the substrate of each flip chip die is then substantially etched away to provide an etched flip chip die that has an exposed surface at the bottom of a cavity. Next, a second mold compound with high thermal conductivity is applied to substantially fill each cavity and the top surface of the second mold compound is planarized. Finally, the encapsulated etched flip chip dies can be marked, singulated, and tested as a module. |
| US09892935B2 |
Limiting electronic package warpage with semiconductor chip lid and lid-ring
An electronic package includes a carrier, semiconductor chip, a lid, and a lid-ring. The carrier includes a top surface and a bottom surface configured to be electrically connected to a system board. The semiconductor chip is electrically connected to the top surface. The lid is attached to the top surface enclosing semiconductor chip and includes a perimeter recess. The lid-ring is juxtaposed within the perimeter recess. The lid-ring exerts a reverse bending moment upon the lid to limit warpage of the electronic package. |
| US09892933B2 |
Lithography using multilayer spacer for reduced spacer footing
A method embodiment for patterning a semiconductor device includes forming a plurality of mandrels over a substrate, and forming a multilayer spacer layer over the plurality of mandrels. The multilayer spacer layer is formed by conformably depositing a spacer layer over the plurality of mandrels and treating the spacer layer with plasma. The plurality of mandrels is exposed by etching a top portion of the multilayer spacer layer, thereby forming a multilayer spacer. |
| US09892931B2 |
Semiconductor manufacturing apparatus and method thereof
In some embodiments of the present disclosure, an apparatus includes an ionizer. The ionizer is configured to dispatch a reactive ion on a surface. The apparatus also has an implanter and the implanter has an outlet releasing an accelerated charged particle on the surface. |
| US09892930B1 |
Semiconductor memory device and method for manufacturing same
A semiconductor memory device includes a first electrode layer; a second electrode layer provided above the first electrode layer; a first insulating oxide layer provided between the first and second electrode layers; a semiconductor layer extending through the first electrode layer, the first insulating oxide layer and the second electrode layer that are stacked in the first direction; and a second insulating oxide layer extending in the first direction between the semiconductor layer and the first insulating oxide layer, the second insulating oxide layer being in contact with the first insulating oxide layer. At least one of the first insulating oxide layer and the second insulating oxide layer includes nitrogen atoms. The nitrogen atoms are distributed around an interface between the first insulating oxide layer and the second insulating oxide layer, or distributed in the vicinity of the interface. |
| US09892926B2 |
Replacement low-k spacer
Forming a semiconductor structure includes forming a dummy gate stack on a substrate including a sacrificial spacer on the peripheral of the dummy gate stack. The dummy gate stack is partially recessed. The sacrificial spacer is etched down to the partially recessed dummy gate stack. Remaining portions of the sacrificial spacer are etched leaving gaps on sides of a remaining portion of the dummy gate stack. A first low-k spacer portion and a second low-k spacer portion are formed to fill gaps around the remaining portions of the dummy gate stack and extending vertically along a sidewall of a dummy gate cavity. The first and second low-k spacer portions are etched. A poly pull process is performed on the remaining portions of the dummy gate stack. A replacement metal gate (RMG) structure is formed with the first low-k spacer portion and the second low-k spacer portion. |
| US09892925B2 |
Overhang hardmask to prevent parasitic epitaxial nodules at gate end during source drain epitaxy
A method of making a semiconductor device includes forming a gate covered by a hard mask over a substrate; disposing a mask over the gate and the hard mask; patterning the mask to expose a portion of the gate and the hard mask; cutting the gate and hard mask to form two shorter gates, each of the two shorter gates having an exposed end portion; undercutting the exposed end portion of at least one of the two shorter gates to form an overhanging hard mask portion over the exposed end portion; and forming spacers along a gate sidewall and beneath the overhanging hard mask portion. |
| US09892924B2 |
Semiconductor structure and manufacturing method thereof
A semiconductor structure comprising a first layer, a metal layer and a second layer is disclosed. The first layer comprises a recessed surface. The metal layer is above a portion of the recessed surface. The second layer is above the metal layer and confined by the recessed surface. The second layer comprises a top surface, a first lateral side and a second lateral side. The etch rate of an etchant with respect to the metal layer is greater than the etch rate of the etchant with respect to the second layer. The thickness of the second layer in the middle of the second layer is less than the thickness of the second layer at the first lateral side or the second lateral side. A method of forming a semiconductor structure is disclosed. |
| US09892922B1 |
Methods for fabricating integrated circuits with triple gate oxide devices
A method of fabricating an integrated circuit includes forming a plurality of polysilicon gate electrode structures over a plurality of fin-shaped channel structures. A portion of the plurality of polysilicon gate electrode structures may then be removed to expose a surface region of a fin-shaped channel structure in the plurality of fin-shaped channel structures. The remaining portion of the polysilicon gate electrode structures may form a plurality of polysilicon transistors. A layer of high-k dielectric material is deposited on the exposed surface region of the fin-shaped channel structure. A metal layer may be deposited over the high-k dielectric material to form at least one high-k metal gate transistor over the fin-shaped channel structure. |
| US09892917B2 |
Plasma assisted atomic layer deposition of multi-layer films for patterning applications
Methods and apparatus for depositing nanolaminate films are provided. In various embodiments, the nanolaminate film may be deposited over a core layer, which may be patterned. The nanolaminate film may act as a spacer while performing a double or quadruple patterning process. The nanolaminate film may include at least two different types of film. In some cases, the two different types of film have different compositions. In some cases, the two different types of film may be deposited under different deposition conditions, and may or may not have the same composition. After the nanolaminate film is deposited, the substrate may be etched to expose the core layer. Some portions of the nanolaminate film (e.g., portions that form on sidewalls of features patterned in the core layer) may remain after etching, and may serve as a mask during later processing steps in a double or quadruple patterning process. |
| US09892916B2 |
Manufacturing method of package substrate and package manufacturing method of semiconductor device
A manufacturing method of a package substrate is provided. A conductive substrate is provided. A first photoresist layer is patterned to form first openings. A first conductive layer is formed in the first openings. A second photoresist layer is patterned to form second openings. A second conductive layer contacting the first conductive layer is formed in the second openings. The first and second photoresist layers are removed. A dielectric layer covers the first, second conductive layers and a portion of the conductive substrate. A portion of the dielectric layer is removed. A third photoresist layer is patterned to form a third opening. A portion of the conductive substrate is removed to form a fourth opening. The third photoresist layer is removed. A fourth photoresist layer is patterned to form a fifth opening. A bonding pad is formed in the fifth opening. The fourth photoresist layer is removed. |
| US09892901B2 |
Mass spectrometry device
A mass spectrometry device that can perform highly robust, highly sensitive, and low-noise analysis and addresses the problems of preventing reductions in ion transfer efficiency and of suppressing the introduction of noise components from droplets, etc. An ion source generates ions, a vacuum chamber is evacuated by an evacuation means and for analyzing the mass of ions, and an ion introduction electrode introduces ions into the vacuum chamber. The ion introduction electrode has an ion-source-side front-stage pore, a vacuum-chamber-side rear-stage pore, and an intermediate pressure chamber between the front-stage pore and the rear-stage pore, the cross-sectional area of an ion inlet of the intermediate pressure chamber is larger than the cross-sectional area of the front-stage pore, the position of the central axis of the front-stage pore and the position of the central axis of the rear-stage pore are eccentric, and the cross-sectional area of an ion outlet of the intermediate pressure chamber is smaller than the cross-sectional area of the ion inlet. |
| US09892899B2 |
Ion manipulation device for guiding or confining ions in an ion processing apparatus
An ion manipulation device for guiding or confining ions in an ion processing apparatus. The device has a first circuit board, wherein at least one first electrode for manipulating the path of ions is mounted on a mounting surface of the first circuit board; a second circuit board, wherein at least one second electrode for manipulating the path of ions is mounted on a mounting surface of the second circuit board; at least one bridging electrode for manipulating the path of ions, wherein the at least one bridging electrode is mounted to both the mounting surface of the first circuit board and the mounting surface of the second circuit board, wherein the bridging electrode is configured to hold the first circuit board and the second circuit board apart from each other in a fixed spatial relationship in which the mounting surface of the second circuit board faces towards the mounting surface of the first circuit board. |
| US09892897B2 |
Method of controlling a DC power supply
A method of controlling a DC power supply to change a DC offset voltage applied to a component for manipulating charged particles. The method includes, whilst an AC voltage waveform is being applied to the component: controlling the DC power supply to produce an initial DC offset voltage that is applied to the component via a link that causes the DC offset voltage at the component to lag behind the DC offset voltage produced by the DC power supply when the DC offset voltage produced by the DC power supply is changed; then controlling the DC power supply to produce an overdrive DC offset voltage that is applied to the component via the link for a predetermined period of time; then controlling the DC power supply to produce a target DC offset voltage that is applied to the component via the link, wherein the target DC offset voltage is between the initial DC offset voltage and the overdrive DC offset voltage. |
| US09892894B2 |
Ion mobility separation device
An ion mobility separator and a method of separating ions according to their ion mobility are disclosed. An RF ion guide is provided having a plurality of electrodes that are arranged to form an ion guiding path that extends in a closed loop. RF voltages are supplied to at least some of the electrodes in order to confine ions within said ion guiding path. A DC voltage gradient is maintained along at least a portion of a longitudinal axis of the ion guide, wherein the voltage gradient urges ions to undergo one or more cycles around the ion guide and thus causes the ions to separate according to their ion mobility as the ions pass along the ion guide. The closed loop ion guide enables the resolution of the ion mobility separator to be increased without necessitating a large device, since the drift length through the device can be increased by causing the ions to undergo multiple cycles around the device. |
| US09892890B2 |
Narrow source for physical vapor deposition processing
A narrow sputtering source and target which are designed to be installed in a series on a sputtering chamber. Each of the narrow sputtering source has length sufficient to traverse one direction of the sputtering zone, but is much narrower than the orthogonal direction of the sputtering zone. When the sputtering chamber performs a pass-by sputtering process, each of the narrow sputtering sources is sufficiently long to traverse the sputtering zone in the direction orthogonal to the substrate travel direction, but is much narrower than the sputtering zone in the direction of substrate travel. Several narrow sputtering sources are installed so as to traverse the entire sputtering zone in all directions. |
| US09892889B2 |
Roll-to-roll hybrid plasma modular coating system
The present invention relates to a roll-to-roll hybrid plasma modular coating system, which comprises: at least one arc plasma processing unit, at least one magnetron sputtering plasma processing unit, a metallic film and at least one substrate feeding unit. Each of the arc plasma processing unit is formed with a first chamber and an arc plasma source. Each of the magnetron sputtering plasma processing unit is formed with a second chamber and at least one magnetron sputtering plasma source. The metallic film is disposed in the arc plasma processing unit to avoid chamber wall being deposited by the arc plasma source; There are at least one arc plasma processing unit, at least one magnetron sputtering plasma processing unit and at least one winding/unwinding unit connected in series to lay at least one thin layer by arc plasma deposition or by magnetron sputtering plasma onto substrate material. |
| US09892888B2 |
Particle generation suppresor by DC bias modulation
Methods for reducing particle generation in a processing chamber are disclosed. The methods generally include generating a plasma between a first electrode and a second electrode of the processing chamber by applying a radio frequency (RF) power to the first electrode during an etch process, wherein the first electrode is disposed above the second electrode, and the second electrode is disposed above and opposing a substrate support having a substrate supporting surface, and applying a constant zero DC bias voltage to the first electrode during the process. |
| US09892887B2 |
Charged particle beam apparatus
The invention has an object to provide a charged particle beam device in which it is possible to perform proper beam adjustment while suppressing a decrease in MAM time, with a simple configuration without adding a lens, a sensor, or the like. In order to achieve the above object, according to the invention, there is provided a charged particle beam device including: an optical element which adjusts a charged particle beam emitted from a charged particle source; an adjustment element which adjusts an incidence condition of the charged particle beam with respect to the optical element; and a control device which controls the adjustment element, wherein the control device determines a difference between a first feature amount indicating a state of the optical element based on the condition setting of the optical element, and a second feature amount indicating a state where the optical element reaches based on the condition setting and executes adjustment by the adjustment element when the difference is greater than or equal to a predetermined value. |
| US09892883B2 |
Rotating-anode X-ray tube assembly with cooling system
According to one embodiment, a rotating-anode X-ray tube assembly includes a rotating-anode X-ray tube, a housing, a coolant, a first shell, an X-ray shielding member, a second shell and an air introduction unit. The first shell is provided apart from the housing and an envelope of the rotating-anode X-ray tube, and surrounds the envelope. The X-ray shielding member is provided between the first shell and the housing and apart from the housing. The second shell is provided apart from the housing to cause an airway to be formed between the second shell and the housing. The air introduction unit produces a flow of air in the airway. |
| US09892877B2 |
Circuit to implement a diode function
A circuit including: a plurality of first switches connected in parallel between a first terminal and a second terminal; and a control circuit capable of implementing the following steps at each period of a clock signal: comparing the voltage between the first and second terminals with a reference voltage; if the voltage between the first and second terminals is greater than the reference voltage, turning on one of the first switches without modifying the state of the other switches; and if the voltage between the first and second terminals is smaller than the reference voltage, turning off one of the first switches without modifying the state of the other switches. |
| US09892875B2 |
Gas circuit breaker
An insulation rod cover is fitted to an end portion of a puffer shaft and the insulation rod cover is fitted to a circuit-breaker side coupling pin coupling between a puffer shaft and an insulation rod, thereby allowing the insulation rod cover to be held at a joint between the puffer shaft and the insulation rod. In a first half of a circuit-breaking operation, the insulation rod cover is positioned in the exhaust cylinder and the exhaust of the hot gas from the puffer shaft is suppressed to increase the pressure of an extinguishing gas to be sprayed onto the arc. In a last half of the circuit-breaking operation, the insulation rod cover is positioned in a guard cylinder to promote the exhaust of the hot gas from the puffer shaft as well as to suppress the flow of the hot gas into the insulation cylinder. |
| US09892873B2 |
Multi-purpose mounting for an electrical switching apparatus
A multi-purpose mounting assembly is provided. The multi-purpose mounting assembly is structured to be disposed in an electrical switching apparatus housing assembly. The multi-purpose mounting assembly includes a body defining a first mounting assembly and a second mounting assembly. The first mounting assembly includes a first mounting construct. The second mounting assembly includes a second mounting construct. The first mounting construct is structured to support a first electrical component. The second mounting construct is structured to support a second electrical component. |
| US09892872B2 |
Disconnecting switch and earthing switch for gas insulated switchgear
Disclosed are a disconnecting switch and an earthing switch for a gas insulated switchgear capable of implementing three positions by a single operator and may have a stable interpolarity contact.According to the present invention, the size of a gas-insulated switchgear may be reduced by operating a disconnecting switch and an earthing switch by a single operator, and implementing three positions. |
| US09892871B2 |
Block-type supercapacitors and fabricating method for the same, graphene oxide-metal oxide composite and synthesizing method for the composite
Disclosed is a block supercapacitor, including two or more unit cells configured such that electrodes having a layered structure are disposed to face each other in an in-plane structure, wherein the two or more unit cells comprises an electrode arranged adjacent to each other respectively and the electrodes adjacent to each other are connected in series. As the unit cells are connected in series, a high-voltage supercapacitor can be provided. |
| US09892870B2 |
Charge storage devices containing carbon nanotube films as electrodes and charge collectors
An energy storage device includes a nanostructured network and an electrolyte in contact with the nanostructured network. The nanostructured network is an electrically conducting nanostructured network that provides combined functions of an electrode and a charge collector of the energy storage device. An electrical device includes an energy storage device that includes a nanostructured network and an electrolyte in contact with the nanostructured network, and a load-bearing electrical circuit electrically connected to the electrical energy storage device. The energy storage device is suitable to power the electrical device while in operation. |
| US09892861B2 |
Anode body for solid electrolytic capacitor
An anode body for a capacitor formed by subjecting the sintered body which is obtained by sintering the molded body of tungsten powder to chemical conversion treatment, which anode body is doped with potassium in the amount of 0.003 to 0.3 mass %; a method of producing an anode body for a capacitor formed by subjecting the sintered body which is obtained by sintering the molded body of tungsten powder to chemical conversion treatment, including a process of doping the anode body with potassium in an amount of 0.003 to 0.3 mass %; and a solid electrolytic capacitor using the anode body. |
| US09892858B2 |
Method for manufacturing electrolytic capacitor
A method for manufacturing an electrolytic capacitor includes: a first step of preparing a capacitor element including an anode having a dielectric layer; a second step of impregnating the capacitor element with a first processing solution including at least a conductive polymer and a first solvent; and a third step of swelling the conductive polymer after the second step, by impregnating the capacitor element with a second processing solution including a swelling agent while at least part of the first solvent remains in the capacitor element. |
| US09892857B2 |
Capacitor circuit, circuit device, physical quantity detecting device, electronic apparatus, and moving object
A capacitor circuit includes: a capacitor array including a plurality of capacitors; a switch array including a plurality of switch circuits, the switch circuits being respectively connected to the capacitors of the capacitor array; a plurality of switch control signal lines supplied with a plurality of switch control signals; and a substrate having a major surface on which the switch circuits are formed. At least part of the capacitors of the capacitor array is formed of a first conductive layer. The switch control signal lines are formed of a second conductive layer provided between the major surface and the first conductive layer. The capacitor array and the switch array are disposed so as to overlap each other at least in part in a plan view when viewed in a normal direction of the major surface. |
| US09892855B2 |
Electronic component
An external electrode includes a sintered metal layer disposed on at least an end surface and a conductive resin layer disposed on the sintered metal layer. The sintered metal layer includes a first portion, a second portion, and a third portion. The first portion is disposed at a central region of the end surface. The second portion is disposed at a part of a peripheral region of the end surface, and extends to an edge portion of the end surface from the first portion. The third portion is disposed at a remaining part of the peripheral region of the end surface. The thickness of the second portion is less than that of the first portion. The thickness of the third portion is less than that of the second portion. The first portion, the second portion, and the third portion are covered with the conductive resin layer. |
| US09892851B2 |
DC-DC converter assembly, method of manufacturing a DC-DC converter assembly and method of manufacturing an output inductor for a DC-DC converter assembly
A DC-DC converter assembly a power stage die of a DC-DC converter attached to a board, an output inductor attached to the board and electrically connected to an output of the power stage die, the output inductor accommodating the power stage die under the output inductor, a plurality of input capacitors attached to the board and electrically connected to input terminals of the power stage die, an output capacitor attached to the board and electrically connected to the output inductor, and a plurality of decoupling capacitors attached to the board and electrically connected to power terminals of the power stage die. A total footprint of the power stage die, the output inductor, the input capacitors, the output capacitor and the decoupling capacitors is at least a third of the combined surface area of the power stage die, the output inductor, the input capacitors, the output capacitor and the decoupling capacitors. |
| US09892846B2 |
Wireless power transmitter, wireless power receiver and wireless power transmission method
Disclosed is a wireless power transmitter. A wireless power transmitter includes a transmission coil for generating a magnetic field by receiving power from a power source, a transmission resonant coil for transmitting power to a receiving coil by using the magnetic field generated from the transmission coil by using resonance, a detection unit for detecting an approach of the receiving coil and a power regulator for adjusting an output of the power source, which supplies the power, based on the approach of the receiving coil detected by the detection unit. |
| US09892844B2 |
Coil unit for thin film inductor, method of manufacturing coil unit for thin film inductor, thin film inductor, and method of manufacturing thin film inductor
A coil unit for a thin film inductor includes an insulating material having double insulating layers of a first and a second insulating layers; and a plurality of coil patterns formed to be embedded in the insulating material. At least one coil pattern among the coil patterns has a thickness different from a thickness of rest of the coil patterns. |
| US09892843B2 |
Laminated inductor
One object is to provide a laminated inductor having a reduced thickness without reduction in the magnetic characteristic and the insulation quality. The laminated inductor includes a first magnetic layer, an internal conductor, second magnetic layers, third magnetic layers, and a pair of external electrodes. The first magnetic layer has a thickness of 4 to 19 μm, and includes three or more magnetic alloy particles arranged in the thickness direction and an oxide film binding the magnetic alloy particles together and containing Cr. The internal conductor includes a plurality of conductive patterned portions electrically connected to each other via the first magnetic layer. The second magnetic layers are composed of magnetic alloy particles and disposed around the conductive patterned portions. The third magnetic layers are composed of magnetic alloy particles and disposed so as to be opposed to each other in thickness direction. |
| US09892836B2 |
Rotary encoder with shielded magnet
A magnetic set-up for use in a rotary encoder is disclosed. The set-up includes a permanent magnet arrangement including at least one permanent magnet, which is rotatable with respect to a rotation axis, and a soft magnetic sleeve encompassing the rotation axis and thus the permanent magnet arrangement for shielding against external magnetic fields. The at least one permanent magnet includes a through-hole, which extends along the rotation axis, so that the permanent magnet fully extends around the rotation axis. |
| US09892835B2 |
Composite materials with magnetically aligned carbon nanoparticles and methods of preparation
The present invention relates to magnetically aligned carbon nanoparticle composites and methods of preparing the same. The composites comprise carbon nanoparticles, host material, magnetically sensitive nanoparticles and surfactant. The composites may have enhanced mechanical, thermal, and/or electrical properties. |
| US09892834B2 |
Magnetic material and coil component employing same
A coil component having a magnetic material and a coil formed on a surface of or inside the magnetic material. The magnetic material is constituted by a grain compact formed by compacting multiple metal grains that in turn are constituted by an Fe—Si—M soft magnetic alloy (where M is a metal element that oxidizes more easily than Fe), wherein individual metal grains have oxide film formed at least partially around them; the grain compact is formed primarily via bonding between oxide films formed around adjacent metal grains; and the apparent density of the grain compact 1 is 5.2 g/cm3 or more, or preferably 5.2 to 7.0 g/cm3. |
| US09892830B2 |
Electronic component and production method therefor
A production method for an electronic component using an exterior packaging material containing a silicone resin comprises a step of dipping an element into an exterior packaging material containing a silicone resin to which aluminum hydroxide or magnesium hydroxide and a nonpolar solvent are added, an additive amount of the aluminum hydroxide or the magnesium hydroxide being controlled to a range of 60 [wt. %] or more to less than 70 [wt. %], a step of drying the exterior packaging material formed on a surface of the element to evaporate the nonpolar solvent and cause a silicone resin component to appear on a surface of the exterior packaging material, and a curing step of curing the exterior packaging material. |
| US09892823B2 |
High density shielded electrical cable and other shielded cables, systems, and methods
A shielded electrical ribbon cable includes a plurality of conductor sets. Each conductor set is surrounded by a shield and includes two insulated conductors. First and second non-conductive polymeric layers are disposed on opposite sides of the cable. The polymeric layers include cover portions and pinched portions. The cover portions surround the plurality of conductor sets, and the pinched portions form pinched portions on each side of the cable. The cable includes a transition portion on each side of the cable. At least one of the polymeric layers has a radius of curvature of at least 50 microns across an entire width of the cable. For at least one of the polymeric layers, the ratio of the minimum radius of curvature in the cover portions to the minimum radius of curvature in the transition portions is from 2 to 15. |
| US09892820B2 |
Differential signal transmission cable having a metal foil shield conductor
A differential signal transmission cable includes an insulated wire section including a pair of signal line conductors extending parallel to each other for transmitting a differential signal and an insulation covering the pair of signal line conductors, and a shield conductor including a band-shaped metal foil and spirally wound around the insulate wire section so as to overlap at a portion in a width direction thereof. An allowable elongation of the shield conductor as a stretchable limit in a longitudinal direction without breaking is not less than 2% at normal temperature. |
| US09892811B2 |
Optical design method for X-ray focusing system using rotating mirror, and X-ray focusing system
An object of the invention is to provide a novel optical design method for an X-ray focusing system capable of collecting all the fluxes, while applying an X-ray of a very small divergence angle to the entire surface of a rotating mirror. The method includes a step of determining the shape of a rotating mirror (3) provided with a reflection surface, the reflection surface being formed by rotating, by one turn around an optical axis (OA), a one-dimensional profile composed of an ellipse or a part of combination of the ellipse and a hyperbolic curve, the ellipse including a downstream focal point (F) serving as a light collecting point of the X-ray focusing system, and including an upstream focal point (F1) deviated from the optical axis (OA); and a step of determining the shape of a reflection surface of an annular focusing mirror (4). |
| US09892810B2 |
Collimator shutter drive mechanism
Technology is described for a collimator assembly for a radiation collimator. In one example, the collimator assembly includes a base and a shutter assembly. The shutter assembly includes a lower shutter and a shutter control. The lower shutter includes a yoke, a control pin, and an inner extension extending from a first end of the yoke and supports the control pin. The shutter control includes a ramp feature that is slidably engaged with the control pin. The yoke rotates as the control pin slides along the ramp feature, and the shutter control is slidably engaged with the base. |
| US09892809B2 |
Modular collimator for imaging detector assembly
A collimator for an imaging detector assembly of a computed tomography imaging system is provided. The collimator includes a collimator module that includes a primary collimation grid having a first edge and a second edge. The primary collimation grid includes multiple radiation absorbing elements spaced apart from each other and configured to provide primary beam collimation. A first radiation absorbing element is disposed on the first edge and a second radiation absorbing element is disposed on the second edge. The collimator module includes multiple plates located on a side of the primary collimation grid and configured to absorb scattered radiation. A respective plate of the multiple plates is disposed over a respective radiation absorbing element of the multiple radiation absorbing elements of the primary collimation grid except the second radiation absorbing element disposed on the second edge of the primary collimation grid. |
| US09892808B2 |
Production of molybdenum-99 using electron beams
An apparatus for producing 99Mo from a plurality of 100Mo targets through a photo-nuclear reaction on the 100Mo targets. The apparatus comprises: (i) an electron linear accelerator component; (ii) a converter component capable of receiving the electron beam and producing therefrom a shower of bremsstrahlung photons; (iii) a target irradiation component for receiving the shower of bremsstrahlung photons for irradiation of a target holder mounted and positioned therein. The target holder houses a plurality of 100Mo target discs. The apparatus additionally comprises (iv) a target holder transfer and recovery component for receiving, manipulating and conveying the target holder by remote control; (v) a first cooling system sealingly engaged with the converter component for circulation of a coolant fluid therethrough; and (vi) a second cooling system sealingly engaged with the target irradiation component for circulation of a coolant fluid therethrough. |
| US09892802B1 |
Hardware assisted scheme for testing memories using scan
A hardware assisted scheme for testing IC memories using scan circuitry is disclosed. An IC includes a memory implemented thereon and a chain of serially-coupled scan elements to enable the inputting of test vectors. The scan elements include first and second subsets forming write and read address registers, respectively, a first control flop, and a second control flop. During a launch cycle of a test operation, a first address loaded into the write address register is provided to a write address decoder to effect a write operation. Also responsive to the launch cycle, the first control flop is configured to cause the first address to be provided to the read address register, while the second control flop causes data to be written into the memory. During a capture cycle, the first address is provided to a read address decoder and the second control flop causes a read of data therefrom. |
| US09892801B2 |
Semiconductor memory device with improved program verification reliability
A semiconductor memory device includes a memory cell array including first and second groups of memory strings respectively coupled to first and second groups of bit-lines, wherein the first and second groups of memory strings respectively include first and second groups of selection transistor cells; a peripheral circuit suitable for applying a program voltage, and performing program verification operation for the memory cell array; and a control logic suitable for controlling the peripheral circuit to perform a first program verification operation for the first group of selection transistor cells and a second program verification operation for the second group of selection transistor cells. |
| US09892793B1 |
Systems and methods for programming data to storage devices
Receiving one or more first write commands to write a first set of data to a storage device. The first set of data is programmed in a plurality of memory cells in the storage device using a first plurality of program levels available in the plurality of memory cells. One or more second write commands to write a second set of data to the storage device is received. The second set of data is programmed in the plurality of memory cells with which the first set of data is programmed. The second set of data is programmed using a second plurality of program levels available in the plurality of memory cells different from the first plurality of program levels. Each program level of the first and second pluralities of program levels is mapped to a respective bit pattern comprising three bits. |
| US09892789B1 |
Content addressable memory with match hit quality indication
A logic circuit is provided including at least two input cells and a sense circuit. The input cells are connected to a common result line. Further, the input cells are operable for influencing an electrical quantity at the result line. The sense circuit is connected to the result line, and is adapted to output a discrete value out of more than two possible values based on the electrical quantity. |
| US09892788B2 |
Memory device including resistance random access memory, and storing method that stores data in the resistance random access memory
It is required to store data to be stored for a holding period required for this data and then erase the data while suppressing power consumption. A memory device 10 to solve such a problem has the following configuration. The memory device 10 includes an ReRAM (resistance random access memory) 100 and a storage controller 101. The storage controller 101 performs control to store, in a storing condition according to a holding period required for data to be stored, the data in the ReRAM 100. |
| US09892787B2 |
Multi-time programmable non-volatile memory cell and associated circuits
A multi-time programmable memory cell has a differential multi-time programmable memory cell and a second-level latch cell. The differential multi-time programmable memory cell provides a first balance signal and a second balance signal, and the second-level latch cell receives the first balance signal and the second balance signal and provides an output signal according to the first balance signal and the second balance signal based on a first latch control signal and a second latch control signal. |
| US09892783B2 |
Non-volatile memory device including memory cells having variable resistance values
A non-volatile memory device comprises: a memory cell array that includes one or more memory groups each including memory cells, each of the memory cells having variable resistance value to hold a piece of data; a read circuit that, for each of the one or more memory groups, performs a read operation to obtain pieces of time information related to the memory cells in the memory group; and a data generation circuit that generates individual identification information on a basis of order of the memory cells in each of the one or more memory groups, the order corresponding to ascending order or descending order of the pieces of time information related to the memory cells in the memory group. The read circuit obtains each of the pieces of time information on a basis of a discharge phenomenon or charge phenomenon that depends on the resistance value of a corresponding one of the memory cells. |
| US09892782B1 |
Digital to analog converters and memory devices and related methods
A digital-to-analog converter (DAC) and memory device includes an array of memory cells including resistive memory elements programmable between a high resistive and low resistive state. In implementations the array of memory cells is segmented into unary and binary coded sub-arrays. The device includes a binarizer configured to couple to the memory array to assign binary weights, or segmented unary and binary weights, to currents through a plurality of memory cells or voltages across a plurality of memory cells. The memory device further includes a summer to sum the weighted outputs of the binarizer. A current to voltage converter coupled with the summer generates an analog output voltage corresponding with digital data stored in a plurality of memory cells. |
| US09892777B2 |
Cell-based reference voltage generation
Methods, systems, and devices for operating a ferroelectric memory cell or cells are described. A first ferroelectric memory cell may be initialized to a first state and a second ferroelectric memory cell may be initialized to a different state. Each state may have a corresponding digit line voltage. The digit lines of the first and second ferroelectric memory cells may be connected so that charge-sharing occurs between the two digit lines. The voltage resulting from the charge-sharing between the two digit lines may be used by other components as a reference voltage. |
| US09892776B2 |
Half density ferroelectric memory and operation
Methods, systems, and devices for operating a ferroelectric memory cell or cells are described. A memory array may be operated in a half density mode, in which a subset of the memory cells is designated as reference memory cells. Each reference memory cell may be paired to an active memory cell and may act as a reference signal when sensing the active memory cell. Each pair of active and reference memory cells may be connected to a single access line. Sense components (e.g., sense amplifiers) associated with reference memory cells may be deactivated in half density mode. The entire memory array may be operated in half density mode, or a portion of the array may operate in half density mode and the remainder of the array may operate in full density mode. |
| US09892764B2 |
Multiple path configuration for power supply power of semiconductor chip modules
A semiconductor chip includes a first circuit block configured to receive a first power supply voltage through a first power supply terminal of the semiconductor chip, a second circuit block configured to receive a second power supply voltage through a second power supply terminal of the semiconductor chip, and an alternative supply unit that is connected between the first power supply terminal and the first circuit block and receives the first power supply voltage through the first power supply terminal. The alternative supply circuit is configured to apply an alternative power supply voltage generated using the second power supply voltage to the first circuit block in response to a supply of the first power supply voltage being stopped. |
| US09892763B2 |
Power supply including regulating transistor for providing current to a load and non-volatile memory devices produced accordingly
Disclosed are methods, circuits, apparatuses and systems for providing power to a dynamic load such as a non-volatile memory array. According to embodiments, a voltage source may be adapted to generate and output a supply current at substantially a target voltage through a regulating transistor whose channel is in series between an output terminal of said charge pump and an input terminal of said NVM array. A discharge circuit branch coupled to an output terminal of the regulating transistor may be adapted to drain away current from the regulating transistor output terminal when a voltage at the regulating transistor output terminal exceeds a first defined threshold voltage. A bulk regulating circuit branch coupled to a bulk of the regulating transistor may be adapted to reduce a bulk-voltage of the regulating transistor when a voltage at the regulating transistor output terminal exceeds a defined threshold voltage. |
| US09892754B2 |
Data detection device, playback device, and data detection method
Data detection capability is improved by whitening crosstalk noise from an equalization signal and detecting binary data. Each of a plurality of detection signals is input to one of a plurality of adaptive equalizers, and outputs of the plurality of adaptive equalizers are computed to obtain an equalization signal for returning light at the time of shining of light onto bounds including a target track subject to data detection and adjacent tracks of an optical recording medium having a plurality of tracks formed thereon. Crosstalk noise from the adjacent tracks included in the equalization signal obtained by this multi-input adaptive equalization process is whitened first, followed by a binarization process. Also, an equalization error is found, and supplied as a control signal for adaptive equalization. Further, a whitening factor updating process is also performed to adaptively update a filter factor of a whitening filter. |
| US09892740B2 |
Speech audio encoding device, speech audio decoding device, speech audio encoding method, and speech audio decoding method
A speech/audio coding apparatus is provided that includes a receiver that receives a time-domain speech input signal and a processor. The processor transforms a time-domain speech input signal into a frequency-domain spectrum, and divides a frequency region of the spectrum in an extended band into a plurality of bands. The processor also sets a limited band for each divided band in the current frame, when a difference between a first frequency with a first maximum amplitude in a spectrum of the divided band in a preceding frame and a second frequency with a second maximum amplitude in a spectrum of the divided band in a current frame is below a threshold. The processor further encodes the spectrum in the limited band within each divided band in the current frame, and does not encode a spectrum outside the limited band within each divided band in the current frame. |
| US09892736B2 |
MDCT-based complex prediction stereo coding
The invention provides methods and devices for stereo encoding and decoding using complex prediction in the frequency domain. In one embodiment, a decoding method, for obtaining an output stereo signal from an input stereo signal encoded by complex prediction coding and comprising first frequency-domain representations of two input channels, comprises the upmixing steps of: (i) computing a second frequency-domain representation of a first input channel; and (ii) computing an output channel on the basis of the first and second frequency-domain representations of the first input channel, the first frequency-domain representation of the second input channel and a complex prediction coefficient. The upmixing can be suspended responsive to control data. |
| US09892735B2 |
Coding of spectral coefficients of a spectrum of an audio signal
A coding efficiency of coding spectral coefficients of a spectrum of an audio signal is increased by en/decoding a currently to be en/decoded spectral coefficient by entropy en/decoding and, in doing so, performing the entropy en/decoding depending, in a context-adaptive manner, on a previously en/decoded spectral coefficient, while adjusting a relative spectral distance between the previously en/decoded spectral coefficient and the currently en/decoded spectral coefficient depending on an information concerning a shape of the spectrum. The information concerning the shape of the spectrum may have a measure of a pitch or periodicity of the audio signal, a measure of an inter-harmonic distance of the audio signal's spectrum and/or relative locations of formants and/or valleys of a spectral envelope of the spectrum, and on the basis of this knowledge, the spectral neighborhood which is exploited in order to form the context of the currently to be en/decoded spectral coefficients may be adapted to the thus determined shape of the spectrum, thereby enhancing the entropy coding efficiency. |
| US09892734B2 |
Automatic decision support
Speech is transcribed to produce a transcript. At least some of the text in the transcript is encoded as data. These codings may be verified for accuracy and corrected if inaccurate. The resulting transcript is provided to a decision support system to perform functions such as checking for drug-drug, drug-allergy, and drug-procedure interactions, and checking against clinical performance measures (such as recommended treatments). Alerts and other information output by the decision support system are associated with the transcript. The transcript and associated decision support output are provided to a physician to assist the physician in reviewing the transcript and in taking any appropriate action in response to the transcript. |
| US09892733B2 |
Method and apparatus for an exemplary automatic speech recognition system
An exemplary computer system configured to user multiple automatic speech recognizers (ASRs) with a plurality of language and acoustic models to increase the accuracy of speech recognition. |
| US09892730B2 |
Generating topic-specific language models
Speech recognition may be improved by generating and using a topic specific language model. A topic specific language model may be created by performing an initial pass on an audio signal using a generic or basis language model. A speech recognition device may then determine topics relating to the audio signal based on the words identified in the initial pass and retrieve a corpus of text relating to those topics. Using the retrieved corpus of text, the speech recognition device may create a topic specific language model. In one example, the speech recognition device may adapt or otherwise modify the generic language model based on the retrieved corpus of text. |
| US09892729B2 |
Method and apparatus for controlling voice activation
A method for controlling voice activation by a target keyword in a mobile device is disclosed. The method includes receiving an input sound stream. When the input sound stream indicates speech, the voice activation unit is activated to detect the target keyword and at least one sound feature is extracted from the input sound stream. Further, the method includes deactivating the voice activation unit when the at least one sound feature indicates a non-target keyword. |
| US09892725B2 |
Automatic accuracy estimation for audio transcriptions
Embodiments of the present invention provide an approach for estimating the accuracy of a transcription of a voice recording. Specifically, in a typical embodiment, each word of a transcription of a voice recording is checked against a customer-specific dictionary and/or a common language dictionary. The number of words not found in either dictionary is determined. An accuracy number for the transcription is calculated from the number of said words not found and the total number of words in the transcription. |
| US09892723B2 |
Systems and methods for presenting social network communications in audible form based on user engagement with a user device
Methods and systems are described herein for generating an audible presentation of a communication received from a remote server. A presentation of a media asset on a user equipment device is generated for a first user. A textual-based communication is received, at the user equipment device from the remote server. The textual-based communication is transmitted to the remote server by a second user and the remote server transmits the textual-based communication to the user equipment device responsive to determining that the second user is on a list of users associated with the first user. An engagement level of the first user with the user equipment device is determined. Responsive to determining that the engagement level does not exceed a threshold value, a presentation of the textual-based communication is generated in audible form. |
| US09892721B2 |
Information-processing device, information processing method, and program
[Object] To provide a feeling of more openness to the user.[Solution] Provided is an information processing device, including: a listening environment characteristic information acquiring unit configured to acquire listening environment characteristic information indicating a characteristic of a listening environment based on an external sound collected through at least one microphone; and a musical signal processing unit configured to perform filtering of a musical signal according to a filter characteristic based on the acquired listening environment characteristic information. |
| US09892720B2 |
Synthesized percussion pedal and docking station
An apparatus for facilitating control of midi-sequence generation is disclosed. The apparatus may include a midi-sequence module configured for generating midi-sequences. Further, the apparatus may also include a foot-operated switch configured to operate the midi-sequence module. Additionally, the apparatus may include a docking station configured to connect the apparatus to a mobile device. Accordingly, the midi-sequence module may be controlled through the mobile device. Further, in some embodiments the midi-sequence module may be included in the mobile device instead of the apparatus. Accordingly, the apparatus may include a switch port configured to electrically couple the foot-operated switch with the mobile device in order to control the midi-sequence module included in the mobile device. |
| US09892718B2 |
Musical instrument restringing device
A restringing device for a stringed instrument may include a guide chuck with one or more guide holes. The restringing device may also include one or more mandrils traversing through the one or more guide holes in a z-direction to restring a string around a tuning peg of the stringed instrument. |
| US09892716B2 |
Image display program, image display method, and image display system
An image display program executed in an image display apparatus includes a display section that displays an image, and the program causes the image display apparatus to function as: an image size determiner that determines whether an image size satisfies a predetermined condition; an image size adjuster that adjusts the image size, when it is determined by the image size determiner that the image size does not satisfy the predetermined condition, in a state where the ratio of vertical length and horizontal length of the image is maintained; and an image displayer that displays the adjusted image by the image size adjuster in the display section, when the image size does not satisfy the predetermined condition, and displays an image stored by an image size storage in the display section, when the image size satisfies the predetermined condition. |
| US09892715B2 |
Rotating display
An apparatus includes a housing and a fixing mechanism configured to attach the housing to an object. The housing includes a display device and at least one processor configured to receive measurement data in a measurement mode during a physical exercise, to process the received measurement data, thus generating exercise data characterizing the exercise, and to display the exercise data through the display device during the physical exercise. The display device is configured to provide a plurality of display view orientations associated with different rotation angles between a first display view orientation, defined by attachment of the fixing mechanism to the object, and a 90-degree rotation from the first display view orientation. At least one function of the processor is associated with the rotation of the display view. |
| US09892708B2 |
Image processing to reduce hold blurr for image display
A display includes: a display section including a plurality of subpixels; and a display driving section driving the display section, based on a first image data set and a second image data set that alternate with each other. The display driving section assigns a predetermined number of subpixels to one pixel, performs first display driving based on the first image data set, and performs second display driving based on the second image data set, and a displacement equivalent to one or a plurality of subpixels is provided between a pixel to be driven by the first display driving and a pixel to be driven by the second display driving. |
| US09892705B2 |
Data driver and method of driving the same
A data driver includes buffers, bias circuits, and a bias signal generator. The buffers respectively output data voltages corresponding to pixel image data. The bias circuits generate bias currents independent of each other and apply the bias currents to respective ones of the buffers. The bias signal generator generates a plurality of bias signals. Each of the bias circuits include a selector and a bias current generator. The selector selects one bias signal among the bias signals based on corresponding pixel image data and outputs the selected bias signal as a final bias signal. The bias current generator generates a corresponding bias current among the bias currents based on the final bias signal. |
| US09892703B2 |
Output circuit, data driver, and display device
A display device includes an output circuit including a differential amplifier circuit, an output amplifier circuit that includes a first transistor of the first conduction type coupled between the first supply terminal and the output terminal, and including a control terminal coupled to the differential amplifier circuit, a first control circuit, an input terminal, an output terminal, and first to third supply terminals to which first to third supply voltages are applied, wherein the third supply voltage is set to a voltage between the first supply voltage and the second supply voltage, or the second supply voltage, and wherein the first control circuit includes a third transistor and a first switch which are coupled in series between the first supply terminal and the control terminal of the first transistor. |
| US09892698B2 |
Controlling device and method for frequency synchronization and LCD television
Disclosed are a controlling device and method for frequency synchronization as well as a LCD TV. The method is applied to an LCD TV, wherein the LCD TV includes a front-end motherboard chip, a main drive control chip and a plurality of column drive control chips, the method includes: when the main drive control chip recognizes that its operating frequency is unstable, it generates a clock turn-off signal; the main drive control chip transmits fixed data to each column drive control chip according to the clock turn-off signal and receives a clock training request initiated by each column drive control chip according to the fixed data; and when recognizing that the operating frequency synchronizes with a frequency corresponding to front-end data transmitted by the front-end motherboard chip, the main drive control chip responds to the clock training request and transmits clock training data to each column drive control chip. |
| US09892696B2 |
Display panel having a plurality of pixels driven in a time-sharing manner, display method thereof and display device
The present invention provides a display panel, a display method thereof and a display device. The display panel comprises multiple pixel units arranged in a matrix, three sub-pixels having different colors in each pixel unit form a first pixel, four sub-pixels in the middle of any two adjacent pixel units in the same row comprise three sub-pixels having different colors that form a second pixel, four sub-pixels in the middle of any two adjacent pixel units in the same column comprise three sub-pixels having different colors that form a third pixel, and four sub-pixels in the middle of any four pixel units in adjacent two rows and adjacent two columns comprise three sub-pixels having different colors that form a fourth pixel, wherein within display time of one frame of image, the first pixel, second pixel, third pixel and fourth pixel are displayed in a time-sharing manner. |
| US09892695B2 |
Display unit, electronic apparatus, and method of driving display unit
A display unit includes a plurality of pixels arranged in a two-dimensional matrix. An image is displayed in a first display mode and a second display mode. In the first display mode, one pixel is configured of a set including J (where J is an integer of 2 or more) first unit pixels emitting a first color, J second unit pixels emitting a second color, and J third unit pixels emitting a third color, and image display is performed through control of operation of each of the unit pixels. In the second display mode, one pixel is configured of a set including j (where j is an integer of 1 or more and less than J) first unit pixels, j second unit pixels, and j third unit pixels, and image display is performed through control of operation of each of the unit pixels. |
| US09892694B2 |
Method and system for improving luminance uniformity of 3D liquid crystal display in 3D displaying
A method for improving luminance uniformity of a 3D liquid crystal display in 3D displaying, comprising: acquiring transmittance of each of n predetermined regions of a liquid crystal display panel, wherein n is a positive integer; adjusting original luminance of each region; and calculating luminance of backlight corresponding to each region according to the transmittance and the adjusted luminance of each region. A system for improving luminance uniformity of a 3D liquid crystal display in 3D displaying is also disclosed. The system improves the luminance uniformity of the 3D liquid crystal display in 3D displaying by compensating for backlight of each of regions of the liquid crystal display panel, so that the luminance of the liquid crystal display panel in 3D displaying that is actually felt by eyes may not be un-uniform. |
| US09892692B2 |
Media system controllers
A controller may include a programmable user interface controls configured to receive user input. The controller may also include multi-color backlights configured to backlight the programmable user interface controls. The controller may receive configuration information specifying an assignment of controllable parameters of the media system and associated backlighting colors to the at least one programmable user interface control, and may direct the multi-color backlights to backlight the programmable user interface controls in colors accordance with backlighting color information specified by the configuration information. The controller may further control a display screen to display the graphics or text descriptive of the assignable buttons in accordance with control descriptions included in the configuration information. |
| US09892690B2 |
Control circuit for backlight, a control method and a liquid crystal display device
The disclosure shows a control circuit for backlight, a control method and a liquid crystal display device. The control circuit includes a display driving chip used to generate a video frame data enable signal and a first PWM signal; a pulse width modulation control circuit for receiving the video frame data enable signal and the first PWM signal, and modulating a duty ratio of the first PWM signal under the video frame data enable signal control to get a second PWM signal; a backlight driving chip for receiving the second PWM signal, and controlling brightness of the backlight based on the second PWM signal to increase brightness of the backlight during a frame data disable period of the video frame data enable signal. Decreasing brightness in liquid crystal display device caused by leakage characteristic of thin film transistor is solved through the disclosure to achieve consistent brightness. |
| US09892689B2 |
Display device and method for reducing power consumption through backlight control of on and off light source regions
There is provided a display device which includes a display panel, a backlight that has a plurality of light sources and applies light to the display panel, a human body detector configured to detect a human body located around the display panel, a human body information acquisition unit configured to acquire information on the human body, and a control that controls an operation of a user recognition unit when the human body is detected in a standby mode, performs user recognition based on the acquired human body information, controls an operation of the display panel such that notification information of the user is displayed in a portion of the display panel, and turns some light sources out of the plurality of light sources on. According to the invention, for the user who views the display device, the local dimming is performed on the backlight which provides content information desired by the user utilizing only a portion of the display device. Therefore, it is possible to increase dynamic contrast and reduce power consumption more than in global dimming. Accordingly, the user may enter a personalized mode of a TV, and content information is provided to the user in the standby mode. |
| US09892688B2 |
Organic light-emitting display
A display includes: a display panel, scan and data drivers, an ADC, a controller, and a data switch. In a first initialization period, the data switch connects data lines to the data driver, which applies an initialization voltage thereto. In a first sensing period, the data switch connects the data lines to the ADC. The ADC receives analog sensing signals corresponding to first voltages of the data lines, and converts the analog sensing signals into digital sensing signals output to the controller. In a second initialization period, the data switch connects the data lines to the data driver, which applies the initialization voltage thereto. In a second sensing period, voltages at the data lines change to second voltages, the data switch connects the ADC to the data lines, and the ADC converts analog sensing signals corresponding to the second voltages into digital sensing signals output to the controller. |
| US09892687B2 |
Organic light-emitting diode (OLED) display unit
The present invention provides an organic light-emitting diode (OLED). The OLED comprises a driving circuit having a power module and a regulation unit. The power module is used to input an initial voltage to the power input terminal of pixel-driving unit. The regulation unit regulates the initial voltage, which is outputted from the power input terminal, based on the real voltage of the power input terminal in the pixel-driving unit for equalizing the real voltage of the power input terminal to a predetermined voltage. |
| US09892685B2 |
Pixel compensation circuit, method and flat display device
Pixel compensation circuit, method and flat display device. The circuit includes a control terminal of a first controllable switch connected with a first scanning line, first terminal connected with data line; second terminal connected with control terminal of the driving switch through a storage capacitor, a first terminal of the driving switch connected with a voltage terminal; a control terminal of the second controllable switch connected with a second scanning line, a first terminal connected with the control terminal of the driving switch, the second terminal connected with second terminal of the driving switch; control terminal of the third controllable switch connected with a third scanning line, first terminal connected with the second terminal of the driving switch; anode of an OLED connected with the second terminal of the third controllable switch, cathode is grounded to avoid unstable current of the OLED by drift of threshold voltage of driving transistor. |
| US09892683B2 |
EL display apparatus
An electroluminescent (EL) display apparatus and manufacturing method are provided. A display screen includes gate signal lines which are arranged to intersect source signal lines. A pixel corresponds to each intersection of the gate signal lines and the source signal lines. Each pixel includes: an EL device; a driving transistor to supply a current to the EL device; a first switch transistor through which the current is supplied by the driving transistor to the EL device; a second switch transistor provided to supply, to the driving transistor, an image signal supplied to a corresponding one of the source signal lines; a third switch transistor provided between a gate terminal and a drain terminal of the driving transistor; and a capacitor connected to the gate terminal of the driving transistor for holding the image signal. The third switch transistor has a multi-gate structure. |
| US09892680B2 |
Display device having display cells capable of being independently driven
Disclosed is a display device capable of achieving a high definition imaging without depending on micronization of display cells. The display device includes: a display panel in which display cells capable of being independently driven are two-dimensionally arranged; and a drive circuit that decomposes an original image that includes plural pixels into plural sub-sampling images that include the pixels which are respectively intermittent in a row direction and a column direction, and sequentially displays the plural sub-sampling images on the display panel. The drive circuit drives a display cell group including plural display cells that are two-dimensionally arranged to be adjacent to each other, corresponding to the respective pixels. The display cell groups respectively corresponding to two arbitrary sub-sampling images are overlapped and are disposed to be mutually shifted. |
| US09892679B2 |
Display device
A voltage equal to the threshold value of a TFT (106) is held in capacitor unit (109). When a video signal is inputted from a source signal line, the voltage held in the capacitor unit is added thereto and a resultant signal is applied to a gate electrode of the TFT (106). Even when a threshold value is varied for each pixel, each threshold value is held in the capacitor unit (109) for each pixel. Thus, the influence of a variation in threshold value can be eliminated. Further, holding of the threshold value is conducted by only the capacitor unit (109) and a charge does not move at writing of a video signal so that a voltage between both electrodes is not changed. Thus, it is not influenced by a variation in capacitance value. |
| US09892678B2 |
Organic light emitting diode display device
Provided is an OLED display device that is in a black mode in which a threshold voltage of a driving TFT need not accurately be sensed. Further, a low voltage value of zero or less is constantly and continuously supplied to a data line during an initialization period, a sampling period, and a programming period in a pixel. As a result, when the pixel is driven in the black mode, a reference voltage and a data voltage having different values are not alternately supplied to the data line to minimize power consumption. |
| US09892676B2 |
Gate driving circuit providing a matched gate driving signal, corresponding driving method, display circuit and display apparatus
A gate driving circuit (12, 13), a display circuit, a driving method thereof and a display apparatus are provided. The gate driving circuit (12, 13) comprises at least three GOA units, each of which comprises a signal input terminal (INPUT), an output terminal (OUT), a reset terminal (RESET) and an idle output terminal (COUNT). The gate driving circuit, the display circuit and the driving method and the display apparatus are capable of providing a matched gate driving signal in the process of threshold compensation outside pixels and applicable to manufacture a displayer. |
| US09892672B2 |
Transparent display device and transparent display panel
The present embodiments relate to a transparent display panel having an excellent transparency, light-emitting efficiency, and viewing angle, and a transparent display device including the same. |
| US09892671B2 |
Method and device for performing gamma correction for LCD panels
A method of performing gamma correction for LCD panels includes: dividing the display area of a LCD panel to form n sub-areas of the display area; dividing all grey-scale images into n sets to form n sets of grey-scale images; displaying a first chosen grey-scale image of each set of grey-scale images on the corresponding sub-area of n sub-areas concurrently; detecting the brightness of the first chosen grey-scale image with a photosensor installed on the sub-area; examining if there is grey-scale image pending for detection in the set of grey scale images; extracting a gamma curve of the LCD panel; and correcting the gamma curve of the LCD panel. |
| US09892664B2 |
Sign holder assembly with mounting member
A sign holder assembly comprises a cross bar and a mounting member. The mounting member is selectively coupled with the cross bar and includes a front panel, at least two elongated reception channels, a first flange, and a second flange. Each of the at least two elongated reception channels is sized and shaped to sit over and extend at least partially around the cross bar to couple the mounting member to the cross bar. The first flange is offset from and extends substantially parallel to the front panel; the first flange defines a free top edge of the mounting member. The second flange is substantially coplanar with and extends in an opposite direction as the first flange to define a free bottom edge of the mounting member opposite the free top edge. The first flange and the second flange are configured to collectively receive a sign holder support member. |
| US09892658B1 |
System and method for dynamically inserting tutorials in a mobile application
Tutorial assets may be dynamically integrated into a mobile application at different locations in game play in a staged manner such that individual tutorial assets can be integrated into the mobile application without requiring a wholesale update of the mobile application. The staged updating may be effected without requiring users to access an updated version of the application from an “app store” or other similar online marketplace for mobile applications. This may be accomplished by implementing the mobile application as an “app” including compiled code that implements game assets and tutorial assets to provide a view of the game to the user. The game assets and tutorial assets may be non-compiled information objects, such as images, scripts, and/or other non-compiled information. |
| US09892657B2 |
Conditioner with sensors for nutritional substances
Nutritional substance systems and methods are disclosed enabling the tracking and communication of changes in nutritional, organoleptic, and aesthetic values of nutritional substances, and further enabling the adaptive storage and adaptive conditioning of nutritional substances. |
| US09892654B2 |
Illustrated phonics board
An illustrated phonics board is provided offering a simplified language learning system using visuals, and moving selectors that are easily manipulated to form simple words. To use, the operator chooses letters from three moving selectors to form a three letter word that shows within a target window. The art on the board provides readily available visual prompts, a quick reference to letters and their phonetic sounds for beginning readers. |
| US09892650B2 |
Recovery of polled data after an online test platform failure
An aspect of the present invention relates to an online test platform adapted to facilitate the development, delivery, and management of educational tests with interactive participation by students, teachers, proctors, and administrators even when some or all of them are remotely located. The platform may include administrator interfaces, test proctor interfaces, and test taker (e.g. student) interfaces to allow each participant to view, navigate, and interact with aspects of the online test platform that are intended to meet their needs. |
| US09892648B2 |
Directing field of vision based on personal interests
A method for directing the field of vision based on personal interests. The method includes receiving a keyword and/or an image file and processing the keyword and/or image file to generate data representing a user interest. The method includes receiving a video input from a camera representative of the field of vision of the camera and processing the video input to identify a visible element in the field of vision of the camera. The method further includes comparing the visible element in the field of vision of the camera and the data representing the user interest to determine whether the visible element is of interest to the user. A notification is provided to the user for identified visible elements that are of interest to the user. |
| US09892647B2 |
On-ground vehicle collision avoidance utilizing shared vehicle hazard sensor data
Systems and methods for on-ground vehicle collision avoidance utilizing shared vehicle hazard sensor data are provided. In one embodiment, a system comprises: a ground based hazard data aggregation system comprising at least one memory storing a hazard position database; and at least one vehicle-ground communications electronics system coupled to the aggregation system; wherein the aggregation system is communicatively coupled to an onboard ground hazard collision avoidance system of at least a first on-ground subscriber vehicle through a wireless datalink established via the vehicle-ground communications electronics system; wherein the hazard position database stores vehicle collected hazard position data generated by a first on-ground contributing vehicle; and wherein the ground based hazard data aggregation system transmits to the first on-ground subscriber vehicle aggregated hazard position data from the hazard position database, the aggregated hazard position data including the vehicle collected hazard position data generated by the first on-ground contributing vehicle. |
| US09892646B2 |
Context-aware landing zone classification
According to an aspect, a method of performing context-aware landing zone classification for an aircraft includes accessing a landing zone map, by a context-aware landing zone classification system of the aircraft, to identify potential landing zones. A database on the aircraft includes land cover map data and impervious surface map data. The database is queried to extract context data. The context data include land cover characteristics and impervious surface characteristics associated with locations corresponding to the landing zone map. The context-aware landing zone classification system of the aircraft evaluates the potential landing zones in view of the context data to adjust classifications of the potential landing zones and produce a context-aware landing zone classification of the potential landing zones. The context-aware landing zone classification of the potential landing zones is provided to landing zone selection logic of the aircraft to select a final landing zone. |
| US09892639B2 |
Emissions reduction in vehicle parking
Given a parking structure where vehicle identification devices are placed so that they can identify the entry and exit of individual vehicles, techniques and systems recommend a parking zone with available spaces to a driver based on likely desirability, which may reduce vehicle emissions associated with cruising for a parking space. Techniques include determining a zone recommendation by selecting the zone having the highest attractiveness value and an occupancy ratio lower than a threshold, and modifying parking metrics in accordance with the probability that the driver will follow the recommendation. Vehicle metadata may be used as a factor in the zone recommendation. Information about actual driver parking behavior and/or an analysis of historical parking records may be used to adjust system parameters, including the probability the driver will follow the recommendation and the attractiveness values. |
| US09892636B2 |
Method of collecting probe information, computer-readable recording media and travel time calculation apparatus
There is provided a method of collecting probe information generated during travel of a vehicle, comprising: (a) receiving probe information including travel time information of a reference area, from a vehicle traveling a reference area that includes at least one of an intersection area that is an area from an approach to an intersection to an exit from the intersection and a road area that connects with the intersection area and is an area from the exit of the intersection to an approach of another intersection adjacent to the intersection in an exit direction; and (b) storing the received probe information. |
| US09892629B2 |
Wireless drive based stage sound and light coordinated operation system
The present patent application provides a wireless drive based stage sound and light stage coordinated operation system. The system comprises a stage performance control center, a first WLAN communication unit, a second WLAN communication unit, a master control unit, a slave control unit, a first ZIGBEE communication unit, a storage unit, a second ZIGBEE communication unit, a stage light subsystem, a third ZIGBEE communication unit and a stage sound subsystem. The system can achieve centralized monitoring, unified management and synchronization control of multiple stage systems. Furthermore, it adopts the method of wireless control, which can reduce interference and improve the stage performance effect and efficiency. |
| US09892624B2 |
Portable device
A portable device for increasing road traffic safety, detecting emergencies and emitting an alarm call for a person. The portable device includes a communication device, a position-determining system, an evaluation unit and a vibration generator. The portable device communicates, by way of the communication device, with at least one further communication device of at least one external system. The person is warned by the vibration generator of a dangerous situation determined by the evaluation unit in combination with the position-determining system and the communication device. The dangerous situation is a collision of the person wearing the portable device with the at least one external system that includes the at least one further communication device. This collision is determined by way of a behavior prediction algorithm. When the, or a further dangerous situation arises, the portable device emits an alarm call by way of the communication device. |
| US09892623B2 |
Systems and methods for detecting gesture events in a hazard detection system
Hazard detection systems and methods according to embodiments described herein are operative to enable a user to interface with the hazard detection system by performing a touchless gesture. The touchless gesture can be performed in a vicinity of the hazard detection system without requiring physical access to the hazard detection system. This enables the user to interact with the hazard detection system even if it is out of reach. The hazard detection system can detect gestures and perform an appropriate action responsive to the detected gesture. In one embodiment, the hazard detection system can silence its audible alarm or pre-emptively turn off its audible alarm in response to a detected gesture. Gestures can be detected by processing sensor data to determine whether periodic shapes are detected. |
| US09892618B2 |
Signal emitting member attachment system and arrangement
A signal emitting member attachment system for attaching at least one signal emitting member to an item to be tracked, which includes an adjustable band configured to be placed on the item; and at least one fob. The adjustable band and the at least one fob are configured so that the at least one fob is connectable to the band. The at least one signal emitting member is disposed on the at least one fob. |
| US09892615B2 |
System and methods for soiled garment detection and notification
Aspects of the present disclosure involve an apparatus, systems, and methods for soiled garment detection and notification. The method may include receiving a measure of odor being released from a garment from a soiled garment detection apparatus. The method may further include determining that the measure of odor exceeds an acceptable odor threshold. A message may then be sent to a user device associated with the garment (e.g. a device of the owner of the garment) in response to determining that the measure of odor exceeds the threshold. The message may include a notification that the garment is soiled, and a suggested course of action to improve the measure of odor released by the garment. |
| US09892612B2 |
Method for responding to a detected fall and an apparatus for implementing the same
There is provided a method of responding to a detected fall, the method comprising determining which one or two or more actions to perform in response to detecting a fall by a user based on a user profile and/or user preference and/or the context of the detected fall; and performing the determined action. |
| US09892606B2 |
Video surveillance system employing video primitives
A video surveillance system extracts video primitives and extracts event occurrences from the video primitives using event discriminators. The system can undertake a response, such as an alarm, based on extracted event occurrences. |
| US09892605B2 |
Method, apparatus, and system for controlling smart home environment using LED lighting device
The present disclosure provides a smart home control system including at least one LED lighting device, a smart home control server and at least one smart terminal. The LED lighting device includes an LED light-emitting module, a power supply module, a video acquisition module, a processing module and a communication module. The video acquisition module may be configured to collect video data within a camera detection range, and send the video data to the processing module. The processing module controls the communication module to send the video data to the smart home control server. The smart home control server parses and recognizes the video data to detect behavioral information, generates control instructions according to the behavioral information, and sends the control instructions to the smart terminal. The system consistent with the present disclosure enables timely detection and prevention of illegal activities and/or unsafe behaviors, as well as recognition and execution of specified user instructions. |
| US09892604B2 |
Gateway-based anti-theft security system and method
Improved systems and techniques are disclosed for controlling the security states of anti-theft security systems such as product display assemblies using security fobs. The tasks relating to fob authentication are offloaded to a computer system, and these authentications can be based on identifiers for the different security fobs. The interactions between security fobs and product display assemblies can be consistent regardless of the population of authorized security fobs by using a security code that is shared by the security fobs. When attempting to use a security fob to change a security status for a product display assembly, the provision of the code to the subject product display assembly can be predicated on authorization of the subject security fob by the computer system. The computer system can maintain a list of identifiers for authorized security fobs that is easily updated when new security fobs are added to or existing security fobs are de-authorized from the system. |
| US09892594B2 |
Gaming, system, method and device including a symbol changing or augmenting feature
Gaming systems, devices and methods are set forth which provide for the selection and application of modifiers to game outcomes. The modifiers confer different functionalities to base game symbols or an augmenting functionality to alter or provide an outcome. Different sets of modifiers may be accessed randomly or under different conditions and events. |
| US09892593B2 |
Gaming device having multiple different types of progressive awards
A gaming system including a plurality of different types of progressive awards adapted to be provided to one or more players of the gaming machines. In one embodiment, one or more progressive awards are each associated with a progressive hit value, wherein when each progressive award increments to its respective progressive hit value, a triggering event occurs and such progressive award is provided to a player. In one embodiment, one or more progressive awards are each associated with a secondary game, wherein if the secondary game is triggered, a player is provided either a static award or one of the progressive awards associated with the secondary game based on a play of the secondary game. In one embodiment, one or more progressive awards are each associated with an outcome of a primary game, wherein if the associated primary game outcome is generated, such progressive award is provided to a player. |
| US09892591B2 |
Wagering game with override award when threshold is exceeded
A gaming method of conducting a wagering game includes receiving, via one or more input devices, an input indicative of a wager, displaying, via one or more display devices, a plurality of symbols to indicate a randomly selected outcome of a wagering game in a display area, and determining, via at least one of one or more processors, one or more award amounts for the randomly selected outcome. The one or more award amounts are based on the wager and the symbols of the randomly selected outcome. The method further includes determining an aggregate award amount based on the one or more award amounts, comparing the aggregate award amount to a predetermined threshold amount, awarding the aggregate award amount if the aggregate award amount is less than the predetermined threshold amount, and awarding an override-award amount if the aggregate award amount is greater than the predetermined threshold amount. |
| US09892589B2 |
System and method for cross platform persistent gaming sessions using a mobile device
Various embodiments directed to systems and methods that enable cross platform persistent gaming sessions using a mobile device in a mobile device-enhanced system are disclosed herein. In one embodiment, a method may include enabling a cross platform gaming session in a system that includes a gaming machine that presents a game, and a computing device distinct from the gaming machine, both in communication with one another. The method may include associating the computing device with the gaming machine. The computing device may have one or more displays. The method may include receiving, by the computing device, reformatted graphical data from the gaming machine. The method may include presenting the game on the one or more displays of the computing device using the reformatted graphical data. |
| US09892584B1 |
Managing electronic keys
Users of a social networking platform may provide electronic keys to other users of the social networking platform. Use of an electronic key may be subject to one or more conditions specified by the issuer of the electronic key. Data may be provided that enables the recipient to use the electronic key in accordance with the one or more conditions on use of the electronic key. |
| US09892582B2 |
Pairable secure-access facilities
Systems and methods are provided for providing access to secure-access facilities based on pairing of the secure-access facilities with a user device such as a wearable device. A pairable secure-access facility may be a public storage facility or device such as a locker that includes communications circuitry for pairing with the user device. Once paired with the user device, the locker may operate a locking mechanism to lock the locker when the user device is away from the locker and to unlock the locker when the user device is in the vicinity of the locker. The locker may include a beacon for detecting and pairing with the user devices. Pairing the user device and the locker may include entering a locker identifier into the user device to ensure that the intended user device is paired with the intended locker. |
| US09892577B2 |
LED lighting device, LED lighting system, and method for controlling thereof
The present disclosure provides an LED lighting device, and the related smart access control systems and methods. The LED lighting device may be installed outside an entrance door and include an LED light-emitting module, a lighting controller, an image acquisition module and a wireless communication module. The image acquisition module is configured to collect a facial image of a person outside the entrance door, and send the collected facial image to the lighting controller. The lighting controller is configured to control the LED light-emitting module to emit light, and send the facial image to the wireless communication module. The wireless communication module is configured to send the facial image to a server. The server matches the facial image with user pre-stored facial feature templates and sends an instruction to open the entrance door when a successful match is found. The LED lighting device and the server form a smart access control system. |
| US09892576B2 |
Biometrics identification module and personal wearable electronics network based authentication and transaction processing
Biometrics identification module and personal wearable electronics network based authentication and transaction processing are disclosed. According to one embodiment, a method for biometric authentication may include (1) a biometric identification device connecting to a plurality of sensing devices, each of the plurality of sensing devices receiving a user characteristic from a user; (2) the biometric identification device receiving the user characteristics from the sensing devices; (3) the biometric identification device communicating the received user characteristics to a server; (4) the biometric identification device receiving a biometric profile for the user; and (5) the biometric identification device storing the biometric profile. |
| US09892569B2 |
Driver-assistance system featuring fatigue detection, and method for predicting a fatigue degree
A method for predicting an instant at which a predefined fatigue degree is expected to be reached in a vehicle system for fatigue detection, includes: (i) detecting the fatigue characteristic by continuously ascertaining the current fatigue degree of the vehicle operator; (ii) ascertaining a change in the fatigue degree over time within a predefinable time interval of the fatigue characteristic, and/or supplying an empirically determined change in fatigue degree over time; and (iii) ascertaining the instant at which a predefined fatigue degree is expected to be reached, based on the ascertained and/or supplied change in the fatigue degree. |
| US09892564B1 |
Augmenting real-time views of a patient with three-dimensional data
Augmenting real-time views of a patient with three-dimensional (3D) data. In one embodiment, a method may include identifying 3D data for a patient with the 3D data including an outer layer and multiple inner layers, determining virtual morphometric measurements of the outer layer from the 3D data, registering a real-time position of the outer layer of the patient in a 3D space, determining real-time morphometric measurements of the outer layer of the patient, automatically registering the position of the outer layer from the 3D data to align with the registered real-time position of the outer layer of the patient in the 3D space using the virtual morphometric measurements and using the real-time morphometric measurements, and displaying, in an augmented reality (AR) headset, one of the inner layers from the 3D data projected onto real-time views of the outer layer of the patient. |
| US09892560B2 |
Marker-based augmented reality authoring tools
An augmented reality-based content authoring tool is presented. A content author arranges machine-recognizable markers in a physical environment. A computing device operating as the authoring tool recognizes the markers and their arrangement based on a captured digital representation of the physical environment. Once recognized, augmented reality primitives corresponding to the markers can be bound together via their primitive interfaces to give rise to a content set. The individual primitives and content set are instantiated based on the nature of the marker's arrangement. |
| US09892558B2 |
Methods for localization using geotagged photographs and three-dimensional visualization
Methods for identifying parts of a target object (e.g., an airplane) using geotagged photographs captured on site by a hand-held imaging device. The geotagged photographs contain GPS location data and camera setting information. The embedded image metadata from two or more photographs is used to estimate the location (i.e., position and orientation) of the imaging device relative to the target object, which location is defined in the coordinate system of the target object. Once the coordinates of the area of interest on the target object are known, the part number and other information associated with the part can be determined when the imaging device viewpoint information is provided to a three-dimensional visualization environment that has access to three-dimensional models of the target object. |
| US09892557B2 |
Integrated system for focused treatment and methods thereof
An integrated system for facilitating local treatment in an organ and capable of universally interfacing with other devices and systems is provided. The integrated system comprises an imaging system interface module configured to functionally associate with an imaging system capable of presenting to a user, through a user-interface device, parameters indicating a mode of operation of the imaging system. The imaging system interface module is configured to receive at least one of the parameters, to interpret such parameter and to allow the integrated system to assume a mode of operation according the parameter. The integrated system further comprises a treatment tool interface module, configured to receive and detect a treatment event signal from a portable treatment tool. The treatment event signal indicates a treatment event, thereby allowing establishing a time of the treatment event and thereby establishing a locality of a treatment provided to the organ by the portable treatment tool. |
| US09892556B2 |
Real-time exploration of video content
A real-time video exploration (RVE) system that allows users to pause, step into, and explore 2D or 3D modeled worlds of scenes in a video. The system may leverage network-based computation resources to render and stream new video content from the models to clients with low latency. A user may pause a video, step into a scene, and interactively change viewing positions and angles in the model to move through or explore the scene. The user may resume playback of the recorded video when done exploring the scene. Thus, rather than just viewing a pre-rendered scene in a movie from a pre-determined perspective, a user may step into and explore the scene from different angles, and may wander around the scene at will within the scope of the model to discover parts of the scene that are not visible in the original video. |
| US09892555B2 |
Systems and methods for creating a three-dimensional texture atlas
Systems and methods for reducing the amount of texture cache memory needed to store a texture atlas by using uniquely grouped refined triangles to create each texture atlas. |
| US09892550B2 |
Photorealistic rendering of scenes with dynamic content
Methods for rendering three-dimensional photo meshes having dynamic content include: (a) detecting a shadow in a three-dimensional photo mesh; (b) removing the shadow from the three-dimensional photo mesh to form a modified photo mesh having a shadow-free texture; (c) simulating a real-time condition in the modified photo mesh; and (d) rendering an image that shows an effect of the real-time condition. Systems for rendering three-dimensional photo meshes having dynamic content are described. |
| US09892549B2 |
Adaptive rendering with linear predictions
Systems, methods and articles of manufacture for rendering an image. Embodiments include selecting a plurality of positions within the image and constructing a respective linear prediction model for each selected position. A respective prediction window is determined for each constructed linear prediction model. Additionally, embodiments render the image using the linear prediction models using the constructed linear prediction models, where at least one of the constructed linear prediction models is used to predict values for two or more of a plurality of pixels of the image, and where a value for at least one of the plurality of pixels is determined based on two or more of the constructed linear prediction models. |
| US09892546B2 |
Pursuit path camera model method and system
A method of pursuit path camera model navigation includes, providing, via processing circuitry of one server, a future viewpoint located at a first location and a current viewpoint located at a second location and calculating a first prefetch region including one or more viewcells and one or more visibility even packets, the first prefetch region corresponding to the first location of the future viewpoint and the second location of the current viewpoint. The method further includes receiving commands to modify the first location of the future viewpoint to a third location at a first velocity, calculating a navigational intent of the future viewpoint based on the commands, and calculating a second prefetch region including the viewcells and the visibility event packets by collapsing the calculated first prefetch region into the second prefetch region, the second prefetch region corresponding to a predicted pursuit path based on the calculated navigational intent. |
| US09892543B2 |
Systems and methods for estimating pose of textureless objects
Systems and methods for estimating the pose of a textureless object are disclosed. A method to estimate a pose of a textureless object includes obtaining, by a processing device, a single image of the textureless object. The pose of the textureless object can be inferred from the single image. The method further includes generating, by the processing device, a three dimensional model of the textureless object from a plurality of viewpoints and a plurality of scales obtained from image data of the textureless object, matching, by the processing device, the single image with a discretized render of the three dimensional model via a multi-level illumination invariant tree structure to obtain an alignment of the single image with the discretized render, and estimating, by the processing device, the pose of the textureless object based on the alignment. |
| US09892542B2 |
Creating bump and normal maps from images with multi-scale control
This disclosure relates to generating a bump map and/or a normal map from an image. For example, a method for generating a bump map includes receiving a texture image and a plurality of user-specified weights. The method further includes deriving a plurality of images from the texture image, the plurality of images vary from one another with respect to resolution or sharpness. The method further includes weighting individual images of the plurality of images according to the user-specified weights. The method further includes generating a bump map using the weighted individual images. The method further includes providing an image for display with texture added to a surface of an object in the image based on the bump map. |
| US09892539B2 |
Fast rig-based physics simulation
A method is disclosed for applying physics-based simulation to an animator provided rig. The disclosure presents equations of motions for simulations performed in the subspace of deformations defined by an animator's rig. The method receives an input rig with a plurality of deformation parameters, and the dynamics of the character are simulated in the subspace of deformations described by the character's rig. Stiffness values defined on rig parameters are transformed to a non-homogeneous distribution of material parameters for the underlying rig. |
| US09892535B1 |
Dynamic mesh generation to minimize fillrate utilization
Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for generating a dynamic mesh for rendering with a graphical user interface. Graphical objects are rendered onto a layer having transparent pixels. The system infers what areas of the layer are drawn areas, and a mesh is generated based on the drawn areas. |
| US09892528B2 |
Temporal dependencies in dependency graphs
Systems and processes are described below relating to evaluating a dependency graph having one or more temporally dependent variables. The temporally dependent variables may include variables that may be used to evaluate the dependency graph at a frame other than that at which the temporally dependent variable was evaluated. One example process may include tracking the temporal dirty state for each temporally dependent variable using a temporal dependency list. This list may be used to determine which frames, if any, should be reevaluated when a request to evaluate a dependency graph for a particular frame is received. This advantageously reduces the amount of time and computing resources needed to reevaluate a dependency graph. |
| US09892526B2 |
Radiotherapy apparatus and radiotherapy method
A radiotherapy apparatus includes an receiver receiving a first projection image of a calibration object under X-ray imaging; a storing portion storing an ideal projection image of the calibration object, the ideal projection image generated based on design information of an X-ray imaging structure, positional information of the calibration object, and volume data of the calibration object; a calculator calculating a transformation parameter for transforming the first projection image into an ideal projection image; a transformed image generator generating a transformed projection image of the patient by transforming a second projection image of a patient obtained under X-ray imaging with the transformation parameter; a reconstructed image generator generating a reconstructed projection image based on volume data of the patient, positional information of the patient, and the design information; and a matching image generator generating a matching reference image used for matching between the transformed projection image and the reconstructed projection image. |
| US09892525B2 |
Saliency-preserving distinctive low-footprint photograph aging effects
Technologies for modifying a digital image to take on the appearance of an antique image. Such modifying is typically based on generating and rendering various effects that are blended with the input image, such as color transformation, simulating film grain, dust, fibers, tears, and vintage borders. Such effects may be rendered to various layers that are overlaid on a color transformed image resulting in what appears to be an antique image. |
| US09892522B2 |
Method, apparatus and computer program product for image-driven cost volume aggregation
In an example embodiment, a method, apparatus and computer program product are provided. The method includes computing a cost volume associated with a reference image. Down-sampling of the cost volume and the reference image into at least one level is performed to generate at least one down-sampled cost volume and at least one down-sampled reference image, respectively. An up-sampling of the at least one down-sampled cost volume and the at least one down-sampled reference image into the at least one level is performed to generate at least one up-sampled cost volume and at least one up-sampled reference image, respectively. A color weight map associated with the cost volume and the at least one down-sampled cost volume is computed based on the reference image and the at least one down-sampled reference image at the at least one level. Aggregated cost volume is determined based at least on the color weight map. |
| US09892519B2 |
Method for detecting an object in an environmental region of a motor vehicle, driver assistance system and motor vehicle
A method for detecting an object captured by a camera in an environmental region of a vehicle based on a temporal sequence of images of the environmental region is disclosed. An electronic evaluation device is used to determine at least one characteristic pixel of the object in a first image of the sequence of images, and the determined characteristic pixel is tracked in at least a second image and a flow vector each having a vertical component and a horizontal component is provided by the tracking. A first depth component, which is perpendicular to the vertical component and the horizontal component, is determined based on the vertical component, and a second depth component, perpendicular to the vertical component and the horizontal component, is determined based on the horizontal component. When the first and second depth component correspond within a tolerance range, a validated final depth component is provided. |
| US09892517B2 |
Sensor noise profile
The invention relates to feature extraction technique based on edge extraction. It can be used in computer vision systems, including image/facial/object recognition systems, scene interpretation, classification and captioning systems. A model or profile of the noise in the sensor is used to improve feature extraction or object detection on an image from a sensor. |
| US09892516B2 |
Three-dimensional coordinate computing apparatus, three-dimensional coordinate computing method, and non-transitory computer readable recording medium having therein program for three-dimensional coordinate computing
A three-dimensional coordinate computing apparatus includes an image selecting unit and a coordinate computing unit. The image selecting unit selects a first selected image from multiple captured images, and selects a second selected image from multiple subsequent images captured by the camera after the first selected image has been captured. The second selected image is selected based on a distance between a position of capture of the first selected image and a position of capture of each of the multiple subsequent images and the number of corresponding feature points, each of which corresponds to one of feature points extracted from the first selected image and one of feature points extracted from each of the multiple subsequent images. The coordinate computing unit computes three-dimensional coordinates of the multiple corresponding feature points based on two-dimensional coordinates of each corresponding feature point in the first and second selected images. |
| US09892515B2 |
Motion compensation in image processing
Methods and systems for processing a set of images are described. In accordance with this disclosure, images are registered and an analysis is performed in view of one or more constraints (such as constraints based upon anatomical or physiological considerations). Weighting factors are determined based on the analysis. The weighting factors are used in subsequent processing of the registered (and/or unregistered) images and/or to formulate a visualization that conveys the degree of confidence in the motion estimation used in the registration process. |
| US09892511B2 |
Apparatus and method for visualization of myocardial infarct areas and accessory pathways
A visualization apparatus includes a storage unit and a computation unit. The storage unit stores a three-dimensional model of a heart, excitation propagation data indicating temporal variations of electrical signal strength in myocardium during propagation of excitation in the heart, and infarct area data indicating locations of infarct areas in the heart. The computation unit places a measurement point on an accessory pathway between the infarct areas. Then based on the excitation propagation data, the computation unit determines a variation range of electrical signal strength as a range between its minimum and maximum values at the measurement point. The computation unit outputs a picture that visualizes propagation of cardiac excitation in the three-dimensional model, based on the excitation propagation data, by varying a visual property in the picture to represent variations of the electric signal strength within the determined variation range. |
| US09892510B2 |
Method and apparatus for automatic cancer diagnosis using percentage scoring
Certain aspects of an apparatus and method for automatic ER/PR scoring of tissue samples may include for determining a cancer diagnosis score comprising identifying a positive stained nucleus in a slide image of the tissue sample, identifying a negative stained nucleus in the slide image, computing a proportion score based on number of the positive stained nucleus identified and number of the negative stained nucleus identified and determining the cancer diagnosis score based on the proportion. |
| US09892505B2 |
Method and device for determining vital parameters
The Invention relates to a method for determining vital parameters of a human body by means of a device (10) with at least one optical recording unit (11) and a computinig unit (12), said method comprising the following steps: recording a sequence of Individual image data of a single limited area of the skin (30) of the human body by means of the optical recording unit (11); evaluating the image data, including determining a pulse wave transit time; and determining vital parameters of the human body from the image data by means of the computing unit (12). The invention further relates to a method for authenticating a person and to a method for identifying a reaction of a person. |
| US09892502B2 |
Image inspection method with a plurality of cameras
A digital image inspection method checks printing material processing machine products by recording digital printed partial images using recording devices and combining partial images in an image processing computer forming a digital overall image causing abutment edges at an overlap. The computer inspects the digital overall image and transmits a result to a machine control computer. The computer creates a new image, only containing detected edges, using edge detection methods after combining partial images forming a digital overall image. The computer uses known positions of abutment edges of recording devices to create a further new image only containing regions with abutment edges of recording devices. The computer overlays the new images, providing a resultant image containing only edges along abutment edges of recording devices. The computer applies the resultant image to the digital overall image, defining masking zones in the resultant digital overall image not being checked by image inspection. |
| US09892501B2 |
Estimation of food volume and carbs
There is disclosed a system for estimating the volume of food on a plate, for example meal, with a mobile device. The system uses a camera and a light pattern projector. Images of the food with and without a projected light pattern on it enable to compute the tridimensional shape and volume, while image segmentation and recognition steps estimate one or more food types in said images. By applying accessible knowledge databases, the carbs content is estimated and the associated insulin bolus doses are provided. Developments comprise coding of the light pattern, different light sources and associated wavelengths, motion compensations, additional optics, estimation of fat content and associated multi-wave boluses. The invention can be implemented in a glucometer or in an insulin pump controller provided with a test strip port or with a mobile phone. |
| US09892496B2 |
Edge-aware bilateral image processing
Example embodiments may allow for the efficient, edge-preserving filtering, upsampling, or other processing of image data with respect to a reference image. A cost-minimization problem to generate an output image from the input array is mapped onto regularly-spaced vertices in a multidimensional vertex space. This mapping is based on an association between pixels of the reference image and the vertices, and between elements of the input array and the pixels of the reference image. The problem is them solved to determine vertex disparity values for each of the vertices. Pixels of the output image can be determined based on determined vertex disparity values for respective one or more vertices associated with each of the pixels. This fast, efficient image processing method can be used to enable edge-preserving image upsampling, image colorization, semantic segmentation of image contents, image filtering or de-noising, or other applications. |
| US09892495B2 |
Image processing device, imaging device, image processing method, and image processing program
Disclosed are an image processing device, an imaging device, an image processing method, and an image processing program capable of, when recovering a deteriorated image due to a point spread function of an optical system, effectively performing phase recovery and suppressing the occurrence of artifact due to frequency recovery processing. The image processing device includes a phase recovery processing unit which subjects image data acquired from an imaging element by capturing an object image using an optical system to phase recovery processing using a phase recovery filter based on a point spread function of the optical system, a gradation correction processing unit which subjects image data subjected to the phase recovery processing to nonlinear gradation correction, and a frequency recovery processing unit which subjects image data subjected to the gradation correction to frequency recovery processing using a frequency recovery filter based on the point spread function of the optical system. |
| US09892492B2 |
Image processing device, imaging apparatus, parameter generating method, image processing method, and non-transitory computer readable recording medium storing a program
A restoration processing section 38 performs restoration processing using a restoration filter based on a point spread function for image data. An outline enhancement processing section 39 performs sharpening processing using a sharpening filter for image data. A sharpness restoration control section 37 acquires a total sharpness restoration rate based on the restoration rate (restoration strength magnification U) of the image data based on the restoration processing and the sharpening rate (sharpening strength magnification V) of the image data based on the sharpening processing, acquires one of the restoration rate and the sharpening rate, and calculates the other one of the restoration rate and the sharpening rate based on the total sharpness restoration rate. |
| US09892490B2 |
Electronic apparatus
In order to distinguish between a state where an upper casing of an electronic device is closed and a state where the upper casing is folded towards its back side, the electronic device having an upper casing (10) and a lower casing (20) that are connected to each other via a hinge (30) is arranged such that: a magnetic axis (12a) passing through a south pole and a north pole of a magnet (12) provided in the upper casing (10) is inclined with respect to a direction vertical to a surface of the upper casing (10) that faces the lower casing (20); and magnetic sensors (A and B) provided in the lower casing (20) distinguish between magnetic fields generated by the magnet (12) in a closed state and magnetic fields generated by the magnet (12) in a tablet state. |
| US09892488B1 |
Multi-camera frame stitching
Various examples are directed to an image processing system comprising a mounting assembly, a first image sensor, a second image sensor, and a third image sensor. A processor may be programmed to receive, from the first image sensor, a first frame, receive, from the third image sensor, a third frame, and identify a first optical flow from the first frame to the third frame. Based at least in part on the first optical flow, the processor may generate a translation kernel describing a first translation from a first position of the first frame to a destination position, and apply the translation kernel to generate a translated first frame. |
| US09892487B1 |
Method and apparatus for combining pixel values in array including linear pixels and logarithmic pixels
A signal processing circuit, a method of processing an image, and an imaging device are disclosed. In one example of the present disclosure, the signal processing circuit includes image processing circuitry configured to receive a first set of signals corresponding to linear pixels in an array of pixels, receive a second set of signals corresponding to logarithmic pixels in the array of pixels, perform a linear pixel interpolation using the first set of signals to determine a linear rgb value associated with a given pixel in the array of pixels, perform a logarithmic pixel interpolation using the second set of signals to determine a logarithmic RGB value associated with the given pixel in the array of pixels, and combine the linear rgb value and the logarithmic RGB value to generate a combined pixel value associated with the given pixel in the array of pixels. |
| US09892486B2 |
Data processing
A computer-implemented method of down-sampling time series data for display is described. The method comprises a step of determining an absolute distance between a previous data point in the series and the present data point, and discarding the present data point if the determined absolute distance is less than a threshold value. The threshold value is dependent on a data value range for the time series data, and a size of a display area within which the time series data is to be displayed. |
| US09892484B2 |
Methods for checking dependencies of data units and apparatuses using the same
A memory access request associated with a data unit is received from a first thread of a pixel shader. A processing status associated with the data unit is obtained from a window buffer. It is determined whether the data unit is being processed by a second thread. If so, a rejection procedure is performed to avoid the first thread gaining to access an attribute value associated with the data unit from/to a DRAM (Dynamic Random Access Memory). Otherwise, an acknowledgement procedure is performed to grant the first thread to access the attribute value associated with the data unit from/to the DRAM. |
| US09892481B2 |
CPU/GPU synchronization mechanism
A thread on one processor may be used to enable another processor to lock or release a mutex. For example, a central processing unit thread may be used by a graphics processing unit to secure a mutex for a shared memory. |
| US09892480B2 |
Aborting graphics processor workload execution
According to some embodiments, a graphics processor may abort a workload without requiring changes to the kernel code compilation or intruding upon graphics processing unit execution. Instead, it is possible to only read the predicate state once before starting and once before restarting a workload that has been preempted because the user wishes to abort the work. This avoids the need to read from each execution unit, reducing the drain on memory bandwidth and increasing power and performance in some embodiments. |
| US09892478B2 |
Digital watermarking applications
In one aspect, assembly of multi-part food packaging is checked by reference to payloads of steganographically-encoded digital watermarks printed across plural components of the packaging. Marking all surfaces of the packaging components allows arbitrary orientation of feed stock in assembly equipment, and wide latitude in placement of inspection cameras along the packaging line. In another aspect, a scanner at a retail checkout station is alert to any gap detected in steganographic encoding on retail product packaging and, if found, alerts an operator to possible presence of an adhesive label with a misleading barcode. A great variety of others features and arrangements are also detailed. |
| US09892470B2 |
System and method for configurable deployment of transit agency content
Systems and methods for configurable deployment of transit agency content are provided that allow plug and play functionality modules, based on available transit data required by such functionality modules, to be placed on webpages. Further, content may be developed and published to various transit data sinks from a single dashboard. |
| US09892469B2 |
Determining intent of a recommendation on a mobile application
Methods and systems are provided for determining the intent of a recommendation made by a user of a mobile application where the application includes a plurality of separable components, any one or more of which the recommendation can apply to. An application in which a user recommendation control is provided for presentation to a user also includes a tag indicating how a recommendation of the application should be interpreted with respect to the components included therein. The tag can be set by the application developer and can be in the form of text (e.g., a keyword or term) or a uniform resource locator (URL). Where a tag references multiple components of an application, a recommending user can be presented with a recommendation intent query. The recommendation intent query allows a user to designate one or more components of the application to which the user's recommendation should be attributed. |
| US09892468B1 |
Method and system for recommending activities to a community of contacts
A monitoring component installed in a network navigation interface, such as an Internet browser, is disclosed. The monitoring component monitors activity of a user performed via the network navigation interface among one or more network resources, such as e-commerce sites, blogs, media hosting sites, and social networking sites. The monitoring component further enables the user to selected at least one monitored activity to be shared with contacts known to the user. An activity service is provided that notifies the contacts of the selected activity and generates recommendations for the user based on the activities reported by the monitoring component. In this manner, users may share activities of interest with their contacts, as well obtain recommendations about items of possible interest. |
| US09892463B1 |
System and methods for community-based cause of loss determination
Methods and systems for determining a cause of loss to a property for damage associated with an insurance-related event based upon data received from a second property. A smart home (or other building) controller and/or an insurance provider remote processor may generate a time sequence of events for damage associated with an insure-related event. The smart home controller or remote processor may also receive a time-sequence of events generated by a smart home controller associated with a second property. The smart home controller or remote processor may compare the two time-sequences of events to determine causes of loss associated with damage to the property. The compared data may be further used to assign a portion of the overall damage to each cause of loss. Subsequently, the smart home controller or remote processor may automatically generate an insurance claim for damage to the property associated with the insurance-related event. |
| US09892450B2 |
Device for delivery service
In some cases, a handheld electronic device may operate in a voice input mode or a scanner input mode. When operating in the voice input mode, the handheld electronic device may record and store audio data in memory. In some cases, the stored audio data may be communicated from the handheld electronic device (e.g., via a Wi-Fi connection) to one or more remote computing devices (e.g., for speech processing). When operating in the scanner input mode, the handheld electronic device may record and store item identifier information (e.g., as barcode data) in the memory. In some cases, the stored item identifier data may be communicated to the one or more remote computing devices (e.g., for item identification processing). |
| US09892442B2 |
Data processing systems and methods for efficiently assessing the risk of privacy campaigns
Data processing systems and methods, according to various embodiments are adapted for efficiently processing data to allow for the streamlined assessment of the risk level associated with particular privacy campaigns. The systems may provide a centralized repository of templates of privacy-related question/answer pairings for various vendors, products (e.g., software products), and services. Different entities may electronically access the templates (which may be periodically updated and centrally audited) and customize the templates for evaluating the risk associated with the entities' respective business endeavors that involve the relevant vendors, products, or services. |
| US09892441B2 |
Data processing systems and methods for operationalizing privacy compliance and assessing the risk of various respective privacy campaigns
Data processing systems and methods for retrieving data regarding a plurality of data privacy campaigns and for using that data to assess a relative risk associated with the data privacy campaign. In various embodiments, the system may be adapted to: (1) display one or more visual summaries of one or more data flow diagrams that visually depicts key features of the data flow, such as whether data is confidential and/or encrypted; (2) allow for multiple users to be assigned responsibility for populating different respective questions that are required to define the data flow; (3) automatically assess and display a relative risk associated with each campaign; and (4) automatically set, monitor, and facilitate the timely completion of an audit schedule for each campaign. |
| US09892432B2 |
Bidding based on the relative value of identifiers
Methods, systems, and apparatus include computer programs encoded on a computer-readable storage medium, including a method for providing content. A linking is provided of identifiers for users or devices known to a content delivery service. Each identifier is associated with the user or device in a specific context. The linking includes first and second identifiers. A request for content is received that includes either the first or second identifier. Bidders in an exchange are identified that have expressed an interest in bidding on a content delivery opportunity associated with the user or the device. For each bidder, a relative value is determined for a respective bidder for the opportunity to present content to the user or device in association with each identifier known to the bidder. For each bidder, a real-time bid request is generated in the exchange that includes the highest value identifier for submission to a respective bidder. |
| US09892427B2 |
On-demand generating e-book content with advertising
A method of providing fixed computer-displayable content in response to a consumer request for content is presented. Upon obtaining a digital image corresponding to the requested content, an advertisement is selected. The advertisement is to be included in an on-demand electronic content corresponding to the requested content. The advertisement is included with the digital image corresponding to the requested content. A fixed computer-displayable content corresponding to the requested content is generated. The fixed computer-displayable content is then provided to the consumer. |
| US09892425B2 |
System for managing dynamic placement of advertisements in electronic information pages
A system for serving electronic advertisements over a data packet network has a node connected to the data packet network, data storage accessible to the node for holding advertisements for service and associated data, and a software instance running on the node for selecting and causing placement of advertisements including selected associated data. The system is characterized in that the advertisements are selected and served base on some real time information accessible to the software instance and wherein the associated data may be individually or collectively embedded into or deployed with the advertisements based at least in part on evaluation of the information accessed. |
| US09892421B2 |
Measuring display effectiveness with interactive asynchronous applications
A system to measure effectiveness of displayed content includes a video processing service configured to receive and process a stream of video images captured by one or more video cameras, a display application service configured to produce display content to be displayed on one or more display monitors and to capture user interactions with the displayed content, and a display effectiveness service configured to correlate data received from the video processing service and the display application service and generate a display effectiveness measurement that is a measure of an effectiveness of the displayed content for specific periods of time. |
| US09892420B2 |
System and method for managing message campaign data
A server system comprising one or more processors and memory initiates delivery of a plurality of message campaigns to a plurality of users. A respective message campaign of the plurality of message campaigns includes one or more messages addressed to at least a subset of the plurality of users. The server system receives, from a plurality of client devices associated with the plurality of users, campaign-feedback data, where the campaign-feedback data is indicative of user interaction with the messages transmitted to the plurality of client devices as part of the plurality of message campaigns. After receiving the campaign-feedback data, the server system conditionally transmits, when a transmission criterion is satisfied, to one or more remote storage systems, campaign-tracking data that is based on the campaign-feedback data. |
| US09892419B1 |
Coupon deposit account fraud protection system
Apparatus and methods for providing electronic coupons are provided. The apparatus and methods include a system that uses a plurality of coupon processors to pull coupon data from an electronic coupon platform upon the expiration of a predetermined time period. The apparatus and methods additionally include a system that uses an electronic coupon platform to pushes data to a plurality of coupon processors upon the expiration of a predetermined time period. The apparatus and methods also include a system that redeems electronic coupons by initiating a deposit of an amount of funds in a customer bank account at predetermined time intervals. The apparatus and methods further include an electronic coupon platform that sends an electronic notification to a plurality of coupon processors upon the receipt of data from a first coupon processor which relates to the receipt of customer payment card and/or loyalty card information. |
| US09892417B2 |
System and method for applying tracing tools for network locations
A method is disclosed for enabling a network location to provide an ordering process for data relevant to connected network devices' activities. The method includes assembling the data, utilizing the activity data, and associating the data, such that information is derived to enable a desired expansion of at least one designated activity. Another method is disclosed for managing an object assignment broadcast operations for a network location based on a network device's previous activities. This second method includes tracing a network device's conduct to determine that a network device prefers a particular class of content. The method also includes tagging a network device's profile with the respective observation and deciding by a network location as to the classification factor for a network device to be targeted for an object assignment broadcast. |
| US09892410B2 |
System and method for issuing prepaid negotiable instruments
Pre-paid negotiable instruments are issued in response to a request at a host system from the holder of a stored-value account. The request is made through an IVR system or a web interface, and the host allocates funds from the account and provides a balance remaining after the negotiable instrument is issued. The instrument is printed with a transaction number or other identifier at an issuing system, and is then sent to the account holder. The account holder activates the instrument after receipt. The payee receives the instrument and authorizes the instrument by providing the transaction number or identifier to the host. When authorized, payment is guaranteed to the payee from the issuer. |
| US09892409B2 |
Methods of authenticating a user for data exchange
A method of facilitating the exchange of data between a user having a computing device, and a remote entity, where a first connection has been established between the user and the remote entity, and where the user has associated data exchange information with an application on the computing device, the data exchange information defining properties of the data to be exchanged between the user and the remote entity. The method comprises establishing, at a server, a second connection to the computing device; enabling retrieval of a user authentication attribute associated with the data exchange information; enabling retrieval of a device authentication attribute associated with the data exchange information; enabling authentication of the user using the user authentication attribute; and enabling authentication of the computing device using the device authentication attribute, where data may be exchanged between the computing device and the remote entity in accordance with the data exchange information following authentication of the user and the computing device. |
| US09892405B2 |
Payment card and methods
One variation of a payment card includes: a sheet comprising first and second icons; a transducer configured to output a voltage in response to an impulse on the sheet; a wireless communication module; a first input region adjacent the first icon; a second input region adjacent the second icon; a magnetic stripe emulator; and a processor configured to transition from a passive state to an active state in response a voltage output from the transducer, to receive a first magnetic sequence command associated with a first payment method and a second magnetic sequence command associated with a second payment method, to assign the first payment method to the first input region and the second payment method to the second input region, to receive a selection for the second payment method from the second input region, and to control the magnetic stripe emulator according to the second magnetic sequence command. |
| US09892404B2 |
Secure identity authentication in an electronic transaction
An approach is provided for securely authenticating an identity of a user participating in an electronic transaction. A request for a biometric identifier/security question is converted to a first Quick Response (QR) code. Based on user attributes and a request from the user's mobile device to a computer to initiate the transaction, the first QR code is disassembled into first and second portions. The first portion, but not the second portion, is sent to the mobile device. Responsive to the mobile device receiving and converting the biometric identifier/answer to the security question to a second QR code, and disassembling the second QR code into first and second portions, the second QR code is reassembled. The transaction is authorized based on whether the biometric identifier/answer matches a data repository record. |
| US09892401B2 |
Transaction completion using identity aggregator
A transaction processing server acts as an identity aggregator and enables transactions between a user computing device and plurality of merchant servers. The transaction processing server receives a request from the user computing device to conduct the financial transaction with a merchant server. The transaction processing server determines a plurality of user identifiers identifying a user account associated with the user computing device at each of a plurality of online systems, where a first identifier is a transaction processing server identifier identifying a user account at the transaction processing server and a second identifier is a merchant identifier identifying a user account at the merchant server. Financial information is retrieved using the plurality of user identifiers. The transaction processing server transmits the merchant identifier and the financial information of the user to the merchant server, which conducts the transaction with the user computing device using the financial information. |
| US09892399B2 |
Reading apparatus
In accordance with one embodiment, a reading apparatus is arranged between an operator and a customer who stand in a face-to-face manner. The reading apparatus includes a main body, a first image capturing section for the operator, a second image capturing section for the customer, and a first display section for the operator. The main body has an opening on a surface thereof facing the operator. The first image capturing section is housed in the main body and photographs a commodity through the opening of the main body. The second image capturing section is arranged at the main body and photographs an object held by the customer. The first display section is arranged above the opening of the main body and displays information relating to sales registration processing. The main body has an upper surface inclined downwards from the operator side to the customer side, and the second image capturing section is arranged at the inclined upper surface. |
| US09892396B2 |
Multi-point authentication for payment transactions
Authentication includes receiving an indication of physical possession of a payment card by a merchant and receiving a purchase request for an authorization of an exchange from the payment account of the cardholder to the merchant. Authentication includes assigning a randomized transaction identifier to the request for the authorization of the exchange. The method also includes transmitting the request for the authorization of the exchange from the payment account of the cardholder to the merchant and receiving the assigned randomized transaction identifier and a randomized authentication identifier associated with the randomized transaction identifier from a payment association, the payment association determining whether the request for the authorization of the exchange is valid. Authentication includes transmitting a copy of the randomized authentication identifier to the mobile device and receiving validation that the transmitted copy of the randomized authentication identifier from the mobile device matches the randomized authentication identifier. |
| US09892395B2 |
System and method for the distribution of software products
A system and method for selling software products over a network. The system includes a server computer with access to software products. The system is configured to allow a user to purchase a subscription for the periodic acquisition of selected software products. In one embodiment, as part of the subscription, the user pays an amount during selected billing intervals. In return, the system issues to the user a number of credits for downloading at no additional charge at least one of the software products during a credit interval, which may be equal in length to the billing interval. In one embodiment, the system debits a number of credits in response to fulfilling a user's purchase request. The system may be also configured to deduct credits that are not used within selected credit intervals. |
| US09892394B2 |
System and method for the distribution of software products
A system and method for selling software products over a network. The system includes a server computer with access to software products. The system is configured to allow a user to purchase a subscription for the periodic acquisition of selected software products. In one embodiment, as part of the subscription, the user pays an amount during selected billing intervals. In return, the system issues to the user a number of credits for downloading at no additional charge at least one of the software products during a credit interval, which may be equal in length to the billing interval. In one embodiment, the system debits a number of credits in response to fulfilling a user's purchase request. The system may be also configured to deduct credits that are not used within selected credit intervals. |
| US09892393B2 |
System and method for the distribution of software products
A system and method for selling software products over a network. The system includes a server computer with access to software products. The system is configured to allow a user to purchase a subscription for the periodic acquisition of selected software products. In one embodiment, as part of the subscription, the user pays an amount during selected billing intervals. In return, the system issues to the user a number of credits for downloading at no additional charge at least one of the software products during a credit interval, which may be equal in length to the billing interval. In one embodiment, the system debits a number of credits in response to fulfilling a user's purchase request. The system may be also configured to deduct credits that are not used within selected credit intervals. |
| US09892392B2 |
System and method for the distribution of software products
A system and method for selling software products over a network. The system includes a server computer with access to software products. The system is configured to allow a user to purchase a subscription for the periodic acquisition of selected software products. In one embodiment, as part of the subscription, the user pays an amount during selected billing intervals. In return, the system issues to the user a number of credits for downloading at no additional charge at least one of the software products during a credit interval, which may be equal in length to the billing interval. In one embodiment, the system debits a number of credits in response to fulfilling a user's purchase request. The system may be also configured to deduct credits that are not used within selected credit intervals. |
| US09892389B2 |
Method, system, and computer program product for customer-level data verification
A system, method, and computer program to reduce incorrectly declined transactions and improve risk calculation accuracy by reducing error probability during fraud detection. The tool first receives at least one data element as well as transaction account data and/or financial transaction instrument data. Then a customer is determined from a first record associated with the transaction account data and/or financial transaction instrument data. A record search is performed to identify at least one additional record associated with the customer. Finally, the data element is compared to the information contained in the additional record to create a comparison result that verifies a customer address. The comparison result may be used as an input to transaction risk calculations. The comparison result may also be provided to a merchant system and/or merchant for use in a decision-making process, for example, to verify customer identity. |
| US09892384B2 |
Extracting product purchase information from electronic messages
Improved systems and methods for extracting product purchase information from electronic messages transmitted between physical network nodes to convey product purchase information to designated recipients. These examples provide a product purchase information extraction service that is able to extract product purchase information from electronic messages with high precision across a wide variety of electronic message formats and thereby solve the practical problems that have arisen as a result of the proliferation of different electronic message formats used by individual merchants and across different merchants and different languages. In this regard, these examples are able to automatically learn the structures and semantics of different message formats, which accelerates the ability to support new message sources, new markets, and different languages. |
| US09892383B2 |
Transactional services platform
One or more devices within a transaction services hub receive, via an internal distribution network interface, configuration settings for a network connection between merchant devices and a host device and establish, based on the configuration settings, a virtual private network (VPN) session between the one or more devices within the transaction services hub and the host device. The one or more devices receive, from a first merchant device, a first transaction authorization request originating via a voice network and receive, from second merchant transaction device, a second transaction authorization request originating via an Internet Protocol network. The one or more devices route, via the VPN session, the first and the second transaction authorization requests to the host device, collect data regarding the first and the second transaction authorization requests, and provide, via a public network connection, an interface to retrieve reports based on the collected data. |
| US09892379B1 |
Monitoring and notification of delivered packages
Methods, systems and computer program products for monitoring delivered packages are provided. Aspects include receiving, from a shipping information system, a first notification of an expected delivery of a package and responsively activating a smart mat and monitoring the smart mat for a delivery of the package, the delivery being indicated by a change in a weight measured by the smart mat. Aspects also include activating a camera to capture one or more images of the smart mat and the package based at least in part on detecting a change in the weight measured by the smart mat after the delivery. Aspects further include notifying one or more individuals with a second notification based on a determination that the package has been removed from the smart mat by analyzing the one or more images. |
| US09892378B2 |
Devices, systems and methods for tracking and auditing shipment items
Devices, systems and methods for tracking and auditing shipment items are provided by capturing video of the shipment items handled in a facility. In certain embodiments, tracking devices are disclosed that can be integrated in a platform for material handling vehicle and manufacturing systems. In certain embodiments, tracking devices can provide tracking and auditing of shipment items by using a method of capturing video of shipment items as they are being handled. In certain embodiments, tracking devices can be coupled to video cameras. The video to be captured may be determined based on the information collected and/or commands received in relation to the items. In some embodiments, the method can create metadata and associate video and item information for shipment items handled in a facility. The video and metadata can be accessed through a communication network at a later time for tracking, auditing and other purposes. |
| US09892373B2 |
Point in phasetime system and method thereof
A Phasetime Method and Automated System for tracking Element Efforts that result in end products, at least including products of art, industry, and nature, and reporting Development Event Efforts by their virtual Points in Phasetime within designated Past, Present, and Future Project Development Phases. Dynamically generated Phasetime Reports display Element Project Efforts within a live Phasetime Matrix in relation to their Phase of Development and Points in Phasetime. Development Events occur within Project Development Phases, which Phases may vary in number and kind depending on the end product. Development Events include Project Production Elements, Element Efforts, the duration of said Efforts, and Efforts' Points in Phasetime. Element Efforts, tracked by Phasetime Project Development Event Instances, are reported in edited Storyboard Beats in Phasetime Macro, Micro, and Nano Views depicting the Efforts' effect on the end Product's Storyline. Effortology keys allow browsers to alter the Storyboard Storyline Report. |
| US09892352B2 |
Systems and methods for predicting, identifying, and/or confirming presence of objects in a predefined space or otherwise associated with a container
Systems and methods for predicting, identifying, and/or confirming the presence of an object in a predefined space include communication between the object and a sensor having a detection range. The detection range of the sensor is limited to a predefined space or direction that may be less than its maximum detection range. |
| US09892349B2 |
Image forming apparatus having a groove forming part to form a groove on a base member
An image forming apparatus includes: a setting part that sets image data; an image forming part that forms an image based on the image data on a base member of a recording material; a groove forming part having an opposing member mounted on a portion facing the base member of having an image, the groove forming part urging a projecting part against the recording material to form a groove in the base member; an acquisition part that acquires a type of the opposing member; a storage part that stores a content of the image data and the type of the opposing member in an associated manner; and a control part that controls an image forming operation, on the basis of the association between the content of the image data and the type of the opposing member stored in the storage part in an associated manner. |
| US09892346B2 |
Method of converting image data from source format into target format
A method is provided for converting image data from a source format into a target format in a system including a converter for converting a sequence of data from the source format into an intermediate format, and an image processing system for converting the data from the intermediate format into the target format. The inverter is capable of dividing the data in the intermediate format into separate files. The method includes the steps of processing a first file in the image processing system; compiling a second file in the converter; and when the first file has been processed completely, instructing the converter to close the second file and send it to the image processing system and to open a new file for the next data to be converted. |
| US09892343B2 |
Computer-implemented method for classification of a picture
The present invention relates to a computer-implemented method for classification of a picture to be analyzed, by attribution of a grade thereto, comprising: a) determining the distance between the picture to be analyzed and pictures from a database of graded pictures; b) selecting from within the database of graded pictures a predetermined number of the closest neighboring pictures or neighboring pictures which are at a distance from the picture to be analyzed below a threshold; c) determining the mean of the grades of the selected neighboring pictures; d) attributing the mean grade to the picture to be analyzed; and e) displaying the mean grade attributed to the picture to be analyzed on an output device. |
| US09892338B2 |
Encoding method and encoder for constructing an initial color table
In an embodiment, an encoding method includes generating a histogram corresponding to all pixels in a coding unit. The encoding method further includes seeking a first color value according to the histogram, wherein a first number of pixels of the first color value in the histogram is greater than or equals to a first threshold. The encoding method further includes seeking a second color value in a first range of the first color value according to the histogram. The encoding method further includes removing one or more pixels of the first color value from the histogram when a second number of pixels of the second color value is greater than or equals to a second threshold. The encoding method further includes adding the first color value into an initial color table when the second number of pixels is less than the second threshold. An encoder is also provided in the disclosure. |
| US09892331B2 |
Imaging system and method with ego motion detection
An imaging system and method for a vehicle is provided, and includes an imager configured to image a scene external and forward of the vehicle and to generate image data corresponding to the acquired images. A controller is configured to receive the image data and analyze an optical flow between successive image frames to compute a relative motion between the imager and the imaged scene, wherein the optical flow includes a pattern of apparent motion of objects of interest in the successive image frames. |
| US09892325B2 |
Image management system
The present invention relates to systems and processes for the management of image data captured by a network covering a plurality of imaging nodes. The systems and processes may include a surveillance network arranged to receive surveillance streams from a plurality of checkpoints that are spatially separated along a route, extracting image data containing facial image content from the surveillance streams, and identifying individual people and determining an elapsed time between distinct checkpoints along the route, to track progress of people along the route. |
| US09892323B2 |
Augmented reality device based on recognition of spatial structure and method thereof
An augmented reality device based on recognition of a spatial structure includes: a point cloud normal vector extracting unit extracting a normal vector for a point cloud from image data input from a camera; a plane object segmenting unit segmenting a plane in the image data by using the extracted normal vector; a representative plane selecting unit selecting a representative plane among the segmented planes; a spatial structure extracting unit recognizing a spatial structure by using the representative plane; and a virtual object matching unit matching a virtual object in the recognized spatial structure. |
| US09892322B1 |
Cascade recognition for personal tracking via unmanned aerial vehicle (UAV)
Systems and methods for tracking a subject using an unmanned aerial vehicle (UAV) are disclosed. An unmanned aerial vehicle (UAV) includes an onboard camera to capture/stream multiple images. An onboard visual recognition module isolates image elements by analyzing the captured images, and determines whether the image elements correspond or do not correspond to the subject. Current image elements corresponding to a subject are stored in a positive database, and non-corresponding current image elements are stored in a negative database. An onboard subject tracking module defines the chosen subject, determines attributes of the subject based on comparisons of image elements, and follows the subject by directing the attitude control system to adjust the velocity and orientation of the UAV based on the determined attributes. |
| US09892321B2 |
Using maximal inscribed spheres for image-based rock property estimation
A method for analyzing a rock sample comprises analyzing a three dimensional image of the rock sample using maximal inscribed sphere analysis to determine proxies for at least one of grain size distribution, mean grain size and standard deviation of grain size. The proxy or proxies are used to determine at least one mechanical property of the rock formation. |
| US09892319B2 |
Fingerprint detection apparatus and method
A fingerprint detection apparatus and a fingerprint detection method employ a collection module and a processing module. The collection module is configured to collect fingerprint information and generate a fingerprint detection signal. The processing module is configured to process the fingerprint detection signal and generate fingerprint image data, and includes a frequency mixer. The frequency mixer is configured to perform quadrature mixing and low pass filtering on the fingerprint detection signal, and to convert an alternating current signal of the fingerprint detection signal into a direct current signal. Therefore, the bandwidth of the fingerprint detection signal can be decreased, noises in the fingerprint detection signal can be filtered out, the signal to noise ratio can be improved, the fingerprint detection sensitivity can be enhanced, and the anti-interference capacity can be increased, so that the adaptability of the fingerprint detecting apparatus to an application environment can be improved. |
| US09892315B2 |
Systems and methods for detection of behavior correlated with outside distractions in examinations
Techniques for behavior detection in electronic examinations may be realized as a method including: collecting sensor data of an examinee taking an electronic examination, the sensor data including visual image data of the examinee taken over time; automatically detecting from the collected sensor data a pattern of behavior correlated with potential misconduct; and providing an alert to an administrator of the electronic examination based on the detected pattern of behavior. The techniques may further be realized as a system configured to collect visual image data of the examinee and one or more processors configured to carry out the method. |
| US09892310B2 |
Methods and systems for detecting prohibited objects in a patient room
A prohibited object detection system detects prohibited objects in a patient room. An image of an object detected in a room of a patient is initially collected. The system identifies reference points on the object, for example, points along the contours of the object. The system may compare the reference points to reference points of images associated with prohibited objects. The system then determines, based on the comparison, if the object is a prohibited object. One or more designated recipients may be alerted if the object is a prohibited object. The system may also register the object in a database of prohibited objects. |
| US09892308B2 |
Fingerprint recognition methods and devices
A fingerprint recognition device and method thereof are provided. The fingerprint recognition method includes: obtaining a plurality of swiping frames; generating a plurality of registered fingerprint datasets according to the swiping frames; obtaining a pressing fingerprint dataset; and comparing the pressing fingerprint dataset with the registered fingerprint datasets. |
| US09892307B2 |
Optical fingerprint imaging system and optical assembly thereof
An optical fingerprint imaging system and an optical assembly are provided. The optical fingerprint imaging system includes: a sensor including a substrate and a photosensitive layer, wherein the substrate has a first surface and a second surface which is opposite to and lower than the first surface, and the photosensitive layer is in contact with the first surface of the substrate; a light source disposed at a position lower than the first surface and higher than the second surface, and light emitted from the light source is adapted to be guided by the substrate of the sensor to the first surface of the substrate; and a mounting element adapted to mount the light source at a fixed position. Accordingly, the optical fingerprint imaging system has high light use efficiency and stable light source. |
| US09892306B2 |
Device and method for the direct optical recording of live skin areas
A device and method for direct optical recording of live skin areas, particularly of fingerprints or handprints, is disclosed. A novel possibility for direct optical recording of human skin prints with forensic quality where interference through ambient light is excluded is achieved in that, from a skin area to be recorded, image data of a calibration image generated under homogeneous illumination from an areal source and ambient light that may be present are read out from the sensor array, an adapted illumination pattern is calculated by means of the stored calibration image such that, through application of the adapted illumination pattern, a two-dimensionally structured illumination pattern is generated to minimize the influence of the ambient light and to homogenize the illumination at least of the deposited skin print, wherein an illumination array is controlled in individual light-emitting elements or in groups of light-emitting elements with the calculated illumination pattern. |
| US09892303B2 |
Display panel, electronic apparatus having the same, and driving method thereof
A display panel having a plurality of pixels, each of which includes a subpixel region and an inter-subpixel region. The display panel includes a light filtering layer forming a light filtering region within the inter-subpixel region, the light filtering layer comprising a light filtering material at least partially transmissive for a light of a selected wavelength; and a photosensor in the light filtering region for detecting the light of the selected wavelength, the photosensor being sensitive to the light of the selected wavelength. |
| US09892299B1 |
Module and system for, and method of, electro-optically reading a target with reduced specular reflection
One light source is energized and another light source is simultaneously deenergized during one frame of an imager that captures return light from an illuminated target as a first image portion having a first target portion. The other light source is energized and the one light source is simultaneously deenergized during another frame to capture the return light from the illuminated target as a second image portion having a second target portion. Either the target portions are combined to form the target to be read, or the image portions are combined to form a composite image from which the target is read. |
| US09892297B2 |
Arrangement for, and method of, processing products associated with RFID tags and bar code symbols at the same workstation
A workstation has a metallic housing for supporting an electro-optical reader for reading bar code symbols. A radio frequency (RF) antenna of an RF identification (RFID) reader for reading RFID tags is mounted in a metallic container that is connected to the housing. The RF antenna radiates RF energy at a frequency greater than 900 MHz through RF excitation slots formed between the container and the housing. |
| US09892296B2 |
Method and system for autonomous vehicles
A method and system for facilitating cost effective, reliable, system redundant, self-driving vehicles involves the employment of specialized lane marking components that permit unprecedented sensor feedback, and in particular, a system and method that enables accurate lane marking recognition despite adverse weather conditions, which presently pose problems experienced by self-driving systems that rely upon vision based camera systems. |
| US09892294B2 |
Systems and methods for job site management
Systems and methods for job site management, such as those, for example, configured validate a worker, clock-in a worker, clock-out a worker, detect a geographic location of a worker, provide information relating to a worker, and the like. |
| US09892293B1 |
Tamper detection system
Disclosed is a technique for prevention of false tamper positives experienced by an electronic device by use of a custom profile. The technique includes application of sensors of the device to collect data from the environment. Further, the device determines whether an event causes accidental triggering of tamper response as the environmental data varies. Accordingly, the conditions triggering a tamper response are dynamically changed as the environmental data changes. |
| US09892291B2 |
Radio frequency identification (RFID) reader, RFID tag, and method thereof for performing write check of tag data
An RFID reader, RFID tag, and method thereof for performing a write check of tag data. According to an exemplary embodiment, the RFID reader may include: a transmitter to transmit a write check command to an RFID tag; a receiver to receive a response including a check value of data, which needs a write check, from an RFID tag that has received the write check command; and a controller to perform information transmission and reception processes, and check data written on the RFID tag by using the received response. |
| US09892286B2 |
Shape actuation encapsulant of a cryptographic module
To provide for a physical security mechanism that forms a complete envelope of protection around the cryptographic module to detect and respond to an unauthorized attempt at physical access, a tamper sensing encapsulant generally encapsulates the cryptographic module. The tamper sensing encapsulant includes a first shape actuation layer associated with an electrically conductive first trace element and a second shape actuation layer associated with an electrically conductive second trace element. The first shape actuation layer is positioned against the second shape actuation layer such that the first trace element and the second trace element do not physically touch at an operating temperature of the cryptographic module and do physically touch when the first shape actuation layer and the second shape actuation layer are thermally loaded. Upon first trace element and the second trace element touching, a circuit is formed that disables the cryptographic module. |
| US09892285B2 |
Accessory, electronic apparatus and system for accessory certification
An accessory, an electronic apparatus and a system for accessory certification is disclosed. The accessory comprises an encryption chip, with the encryption chip comprising a first memory module, configured to store a private certification key and a mixed certification key formed at least by combining a public certification key and pseudo keys according to a predetermined rule. The processing module of the electronic apparatus at least extracts the public certification key from the mixed certification key according to an algorithm matched with the predetermined rule when the electronic apparatus and the accessory are forming a physical connection. The processing module uses the public certification key to certify the accessory. In such a manner, the present invention can improve the security level of keys so as to improve the security and reliability for the electronic apparatus to use the accessory. |
| US09892284B2 |
Trusted execution thread in an embedded multithreaded system
A multithreaded system includes a processor core having a plurality of hardware threads. One or more of the hardware threads is dedicated to execute only trusted code and the remaining hardware threads are configured to execute untrusted code. The multithreaded system further includes a DLNA (Digital Living Network Alliance) server configured to communicate secure requests to one or more of the hardware threads dedicated to execute only trusted code and communicate other requests to one or more of the remaining hardware threads configured to execute untrusted code. |
| US09892283B2 |
Decryption of encrypted instructions using keys selected on basis of instruction fetch address
A microprocessor and method are provided for securely decrypting and executing encrypted instructions within a microprocessor. A plurality of master keys are stored in a secure memory. Encrypted instructions are fetched from an instruction cache. A set of one or more master keys are selected from the secure memory based upon an encrypted instruction fetch address. The selected set of master keys or a decryption key derived therefrom is used to decrypt the encrypted instructions fetched from the instruction cache. The decrypted instructions are then securely executed within the microprocessor. In one implementation, the master keys are intervolved with each other to produce a new decryption key with every fetch quantum. Moreover, a new set of master keys is selected with every new block of instructions. |
| US09892277B2 |
Device and method for encoding data column
A device and a method for encoding a data column are disclosed. A schema inquiry unit inquires into a schema of an original table which is a data table for performing encoding in a database in which a plurality of data tables are stored. A backup performing unit generates schema information of a backup table on the basis of the schema of the original table, generates a backup table by using the schema information of the backup table so as to copy data of the original table into the backup table, changes the original table by adding a backup column to the original table, and inactivates constraint conditions included in the changed original table so as to copy original columns included in the changed original table into the backup column. An encoding unit encodes data of an encoding target column, a column in which encoding is to be performed in the changed original table, and enters the data in each field of the original columns of the changed original table. Then, when the encoding for the data of the encoding target column is completed, the backup performing unit deletes the backup column from the changed original table and activates the constraint conditions. |
| US09892270B2 |
System and method for programmably creating and customizing security applications via a graphical user interface
A system and method for programmably creating a security application via a graphical user interface. The method comprises: causing a display of a service stage GUI window including at least one security phase zone; receiving a selection of at least one security service including at least one security decision engine; causing a display of an event rule stage window including at least one event rule parameters zone; receiving a selection of at least one event rule related to the at least one SDE; causing a display of an event relationship stage GUI window including at least one rule selection zone; receiving a selection of at least one workflow rule and at least one action; and configuring the security application based on the selected at least one work rule and the selected at least one action. |
| US09892269B2 |
Techniques for data monitoring to mitigate transitive problem in object-oriented contexts
Techniques for mitigating the transitive data problem using a secure asset manager are provided. These techniques include generating a secure asset manager compliant application by tagging source code for the application with a data tag to indicate that a data element associated with the source code is a sensitive data element, accessing a policy file comprising transitive rules associated with the sensitive data element, and generating one or more object files for the application from the source code. These techniques also include storing a sensitive data element in a secure memory region managed by a secure asset manager, and managing the sensitive data element according to a policy associated with the sensitive data element by an application from which the sensitive data element originates, the policy defining transitive rules associated with the sensitive data element. |
| US09892268B2 |
Extensible deployment system
An extensible deployment system is disclosed that provides for flexible deployment and centralized management of a scalable communication system. The scalable communication system may be segmented into multiple groups of services, e.g. multiple solutions, that may be deployed across one or more servers. The groups of services may each access separate databases in a single database instance that may allow for the groups of services to be deployed and upgraded independently. A management interface may be provided that allows for centralized management, and deployment, of all of the groups of services, irrespective of the independent upgrade paths of the groups of services. The management interface may include a local authentication system and may also be interoperable with one or more external authentication systems, such that users may use login credentials of an external authentication system to access the management interface. |
| US09892265B1 |
Protecting virtual machine data in cloud environments
Various systems, methods, and processes to protect virtual machine data in a cloud environment are disclosed. A request for requested data is received at an encryption virtual machine. The requested data is encrypted, and the encryption virtual machine is configured to receive the request from an application virtual machine via a loader. The requested data includes one or more operating system modules, and the operating system modules are configured to be used by the application virtual machine. The requested data is accessed in a storage volume, which is communicatively coupled to the encryption virtual machine. The requested data is then retrieved from the storage volume and decrypted at the encryption virtual machine. The decrypted data is then sent to the loader. |
| US09892263B2 |
System, method and apparatus to visually configure an analysis of a program
A method extracts views from an application program, where at least some extracted views include at least one view component, and presenting the extracted views to a user. In response to the user selecting a view component in a presented extracted view, the method presents a form to the user having a plurality of vulnerability types indicated for the selected view component and, for each vulnerability type, provides an ability for the user to set an indicator in the form as to indicate whether the view component is at least one of a source or a sink. The method further includes saving the form containing the user's input in conjunction with a user-provided label for the selected view component and a unique identification of the selected view component, and deriving an analysis policy configuration from the saved form that is formatted for use by a program security analyzer. |
| US09892255B2 |
Presenting service processes
Technical solutions for presenting service processes are provided. In the solutions, operation instructions are received, and in response to the received operation instructions, a page of a first service process is displayed and the first service process is started; when a page of a second service process is displayed instead of the page of the first service process, execution progress of the first service process is presented through an icon of the first service process. |
| US09892254B2 |
Hypervisor enforcement of cryptographic policy
Techniques for restricting the execution of algorithms contained in applications executing on virtual machines executing within a computer system are described herein. A first sampled set of computer executable instructions is gathered from a virtual machine by a controlling domain and compared against a reference set of computer executable instructions. If the first set is similar to the reference set, and if the execution of the algorithm corresponding to the reference set is restricted by one or more computer system polices, one or more operations limiting the execution of the restricted algorithm are performed, thus ensuring conformance with the computer system policies. |
| US09892253B1 |
Buffer overflow exploit detection
A call to a memory management application programming interface (API) that results in a buffer overflow due to inaccurate bounds checking could potentially leave the system vulnerable to being exploited by a third party. Approaches presented herein can monitor calls to these APIs in order to determine typical memory sizes passed to these APIs. During an initial baselining period a number of profiles are generated that indicate expected memory size parameters under various different call conditions, such from specific sources or call stacks. Comparing subsequently received API calls against the expected values from the relevant profile enables the legitimacy of an API call to be determined with relatively high accuracy. A suspicious call is identified based at least in part upon determining that the memory size of the call falls outside an expected range for that API and the relevant context. |
| US09892248B2 |
Refrigerator and method for measuring body composition using the refrigerator
A refrigerator includes a handgrip arranged on one side of a door to open and close a storage compartments, a measurer configured to measure fingerprints and body composition of a user when the user grabs the handgrip, a display configured to display the measured body composition information, and a controller configured to recognize the user based on the measured fingerprints and store the measured body composition information as information regarding the recognized user. |
| US09892245B2 |
Method and apparatus for using a multi-factor password or a dynamic password for enhanced security on a device
A method and apparatus for performing authentication may comprise: determining a first value of a dynamic password applicable for a first scenario, the dynamic password having a plurality of values for a plurality of scenarios defined by at least one parameter; authenticating a user in the first scenario by a device based on the first value of the dynamic password; determining a second value of the dynamic password applicable for a second scenario; and authenticating the user in the second scenario by the device based on the second value of the dynamic password. |
| US09892241B2 |
Out-of band tokens for rights access
Access to content may be administered by storing content, the content comprising one or more selections, accessing a passive optical out-of-band token associated with the content, determining an access right for the content based on the passive optical out-of-band token, and enabling access to the content in accordance with the access right. |
| US09892235B2 |
Insulin management
A method of managing insulin includes receiving blood glucose measurements on a computing device from a glucometer. The blood glucose measurements are separated by a time interval. The method includes determining, by the computing device, an insulin dose rate based on the blood glucose measurements and determining a blood glucose drop rate based on the blood glucose measurements and the time interval. The method also includes determining a blood glucose percentage drop based on the blood glucose measurements. The method includes decreasing the time interval between blood glucose measurements by the glucometer when the blood glucose drop rate is greater than a threshold drop rate, and decreasing the time interval between blood glucose measurements by the glucometer when the blood glucose percentage drop is greater than a threshold percentage drop. |
| US09892228B2 |
Systems and methods for generating orthotic device models from user-based data capture
A method for generating an orthotic device is disclosed. The method includes receiving data from a client device of a patient, the data comprising patient information and image data representative of a body part of the patient. The method further includes generating, based on the image data, three-dimensional model data representative of the body part, and generating parametric CAD model data of the orthotic device based on the three-dimensional model data and the patient information. The parametric CAD model data is transmitted to a three-dimensional printer, wherein the three-dimensional printer is to generate the orthotic device based on the parametric CAD model data. |
| US09892227B1 |
Systems, methods and storage media for clock tree power estimation at register transfer level
Systems, methods and storage media are provided for clock tree power estimation at register transfer level. For example, a physical power model is generated based at least in part on a reference post-layout design. A clock tree is modeled at register transfer level based at least in part on the physical power model. Power estimation is performed for the modeled clock tree at the register transfer level. |
| US09892226B2 |
Methods for providing macro placement of IC
A method for providing a macro placement of an integrated circuit is provided. An initial placement of the integrated circuit is obtained, wherein the initial placement includes a plurality of first macro blocks. The first macro blocks are divided into a plurality of groups according to the hierarchy of the integrated circuit. A value of layout area is obtained for each of the groups according to macro areas of the first macro blocks. A plurality of candidate placements are obtained for each of the groups according to the value of placement area corresponding to the group, wherein the candidate placement includes the first macro blocks corresponding to the group. A first macro placement is obtained according to a specific placement o selecting from the candidate placements for each of the groups. |
| US09892225B2 |
Method for optimizing the design of micro-fluidic devices
Described herein is a method of designing micro-fluidic devices. A target cost function based on device design parameters is chosen. The performance of one or more design candidates is run in a simulation model. A design candidate with a cost function closest to the target cost function is chosen and modified in an optimization routine to provide a modified design candidate having modified device design parameters. The cost function for the modified initial design candidate is computed, and when the modified design candidate has a computed cost function that meets the target cost function, optimized device design parameters of an optimized device design are obtained. Additional optimization iterations may be performed as needed to arrive at an optimized device design. A micro-fluidic device based on the optimized device design is manufactured. |
| US09892222B1 |
Automated attribute propagation and hierarchical consistency checking for non-standard extensions
Examples of techniques for automated attribute propagation and hierarchical consistency checking are disclosed. In one example implementation according to aspects of the present disclosure, a computer-implemented method may include: detecting, by a processor, a non-standard extension during convergence of an integrated circuit logic design; propagating, by the processor, the non-standard extension to each level of a plurality of hierarchies of the integrated circuit design for which a net utilizes a special constraint; and verifying, by the processor, a hierarchy consistency across each level of the plurality of hierarchies. |
| US09892219B2 |
Using fracture mechanism maps to predict time-dependent crack growth behavior under dwell conditions
A computing system for predicting crack growth behavior includes technologies to predict a time-dependent crack growth mechanism in a manufactured component once a crack has been initiated in the component. The computing system generates one or more time-dependent fracture mechanism maps for the component and uses the fracture mechanism maps to determine a modified dwell transition temperature for the component. The system predicts a crack growth mechanism based on the modified dwell transition temperature and a mission-specific temperature to which the component may be subjected. Based on the predicted crack growth mechanism, the system can estimate the cyclic life or the remaining life of the component. The life prediction and/or other output of the system can be used to assess the component for a turbine engine application; for example, to modify the design, material selection, and/or maintenance plan for the component. |
| US09892218B2 |
Parasitic-aware blockage
A parasitic-aware blockage structure is provided to replace a detailed blockage structure for use in connection with a capacitance extraction operation. The parasitic-aware blockage structure includes one or more parasitic-aware blockage polygons, each representing a plurality of polygons of the detailed blockage structure. The parasitic-aware blockage polygons can be formed by expanding and merging the polygons of the detailed blockage structure. Physical information is associated with each of the parasitic-aware blockage polygons, wherein the physical information defines physical characteristics of the polygons of the detailed blockage structure. Capacitance error information may also be associated with each of the parasitic-aware blockage polygons, specifying capacitive errors of the parasitic-aware blockage polygons with respect to the polygons of the detailed blockage structure. |
| US09892216B2 |
Information processing apparatus, method, and program product for simulating processes with parent-child and sibling relationships
An information processing apparatus includes a simulator configured to simulate a process to be executed by an apparatus based on an operation procedure defined in first definition information, and one or more status changers each configured to detect arrival of a time specified in second definition information by monitoring an event generated based on the simulated process, and to change a status of the simulator to a status specified in the second definition information based on the detected time. In the information processing apparatus, the simulator simulates a process to be executed by the apparatus in accordance with a request from a program to cause the apparatus to execute the process in the status changed by the status changer. |
| US09892214B2 |
Systems and methods for 3D printing of lacrosse heads
Methods for the individualized design and manufacture of lacrosse heads using point of sale additive fabrication. In one aspect, a subscription-based method includes digitizing a plurality of lacrosse heads having different three-dimensional attributes, storing the resulting digital object data into a digital lacrosse head library, transmitting the digital lacrosse head library to a subscriber, recording the number of lacrosse heads formed by the subscriber using additive fabrication, and generating an invoice based on the number of formed lacrosse heads. In another aspect, a method includes displaying images of lacrosse heads on a user interface, enabling the user-specified selection of discrete components of a lacrosse head, enabling the user specification combination of the discrete components, superimposing the user-specified combination to form a digital object representation of a lacrosse head, forming a tangible three-dimensional lacrosse head by additive fabrication, and transferring the tangible three-dimensional lacrosse head to the consumer. |
| US09892213B2 |
Asymmetric cable-membrane tensegrity structure of opening type, method of constructing the same and method of designing the same
A cable-membrane tensegrity structure which is asymmetric, and construction method and design method thereof are provided. The cable-membrane tensegrity structure comprises a central opening and is formed by a ring cable (4) and three layers of radial cables comprising a suspension cable (1), a ridge cable (2) and a valley cable (3), wherein the suspension cable (1) is located above the ridge cable (2), the ridge cable (2) is located above the valley cable (3), wherein one end of each of the suspension cable (1), the ridge cable (2) and the valley cable (3) is connected to the ring cable (4), and the other end of each of the suspension cable (1), the ridge cable (2) and the valley cable (3) is connected to a peripheral supporting structure (7), wherein a coating membrane (5) is tensioned between the ridge cable (2) and the valley cable (3) that are adjacent to each other and function as a skeleton to tension the coating membrane (5). The method of constructing the cable-membrane tensegrity structure comprises steps of: lifting step by step the suspension cable (1), the ridge cable (2) and the valley cable (3) to positions adjacent to respective cable anchor nodes by a traction device, based on a shape of formed cable-membrane tensegrity structure; and tensioning and anchoring synchronously the suspension cable (1), the ridge cable (2) and the valley cable (3) in place by a tensioning device, so as to achieve a final shape of the cable-membrane tensegrity structure. A multi-stage design method, based on the bearing whole-process, of a cable-membrane tensegrity structure of an opening type is also provided. |
| US09892212B2 |
Creation of variable cut files for package design
A package design system creates a package design file. The file includes comprises a two-dimensional representation of a three-dimensional structure having a plurality of facets having alternative design scenarios that can be selected based on conditions of the cutting and/or folding device that is used to create the package. An example of such a condition is a thickness of a substrate that is being processed by the device. The system creates the file by creating a set of cut and/or fold line definitions. At least one of the cut and/or fold line definitions will be a variable cut/fold line definition. For each identified variable cut/fold line definition, the system identifies one or more alternate parameters for the variable cut/fold line definition, a first cutting/folding scenario that will not use the alternate parameters, and a second cutting/folding scenario that will use the alternate parameters. |
| US09892206B2 |
Content metadata directory services
Audio signals are processed in a distributed reader and metadata routing system to provide metadata responses to mobile application programs. A routing system registers identifiers for different content ID schema. These identifiers are encoded in audio signals. Mobile device application programs are equipped with reader programs to extract identifiers from audio sensed by the microphone of a mobile device. Metadata responses are identified by the ID provider of the content ID schema and extracted identifiers. The metadata routing system routes metadata responses to a requesting mobile device, supporting a variety of different ID providers and mobile device applications. |
| US09892203B2 |
Organizing network-stored content items into shared groups
Systems, methods, and computer-readable storage media for adding users to groups of content items organized into events based on a common attribute. An example system configured to practice the method can receive, from a client device, content items uploaded to a synced online content management system, wherein the content items are associated with an account of a first user. The system can cluster at least some of the content items as an event, wherein the event is associated with a common attribute, and identify a second user satisfying a minimum similarity threshold for the event based on the common attribute. The system can provide a suggestion to share the event with the second user. Upon receiving a confirmation of the suggestion, the system can make content items clustered in the event available to the second user. |
| US09892202B2 |
Web page load time reduction by optimized authentication
Loading of web application pages and dependent files are optimized both in terms of load order and selective authentication. A baseline file (also referred to as the wire frame page) may include main page framework and most dependent files. Files referenced in the baseline file may be organized such that they load in an optimized fashion. The baseline file and the dependent files referenced therein may be loaded anonymously without waiting for the completion of the authentication process. The secure content may be the only authenticated request made, thus allowing most of the files to load in parallel to the longer authenticated request. |
| US09892201B2 |
Search engine classification
Techniques for enabling a search engine to automatically classify the content type of Web documents. In an exemplary embodiment, Web documents may be classified as adult or non-adult, based on whether a document contains adult content. In an aspect, Web documents are mined offline to determine the presence of “adult hubs” to which adult documents are connected. The presence of such adult hubs is a strong indicator that linking Web documents may themselves contain adult content. Computational techniques for quantifying the connection between a candidate document and adult hubs are disclosed. The techniques may be utilized in an Internet search engine platform designed to accept user search queries and deliver highly relevant results. |
| US09892200B2 |
Location-based and alter-ego queries
A user at a geographical location may submit a search query and receive results responsive to the search query. The search results provided to the user may be based on the user's geographical location. The search results may also be based on one or more attributes of the user or an alter ego. The alter ego may be an individual user or another type of entity, such as a group or a business. A user at a geographical location submitting an alter-ego search query may see the results that would be presented to the alter ego if the alter ego were at the geographical location. Each user's interests may be selected through an interest-selection interface, automatically generated as the user interacts with search results, dynamically generated as a user follows or likes search results, or otherwise determined. |
| US09892199B2 |
Specialized virtual personal assistant setup
An apparatus for setting up a specialized personal electronic assistant on an electronic device includes a processor, a display, a language module, a tracking module, a knowledge module, and a rendering module. The language module interprets a communication from a user into a data request. The tracking module stores the data request as one of a plurality of stored data requests. The knowledge module determines a response to the data request. The rendering module displays the response in a tiled area on an image display of the electronic device. |
| US09892198B2 |
Page personalization performed by an edge server
A method is provided for performing page personalization at an edge server. In response to a page request from a user's browser, page mark-up is retrieved from a page server, the page mark-up including embedded edge server instructions. An edge server matching object is parsed from the embedded edge server instructions, the edge server matching object defining a plurality of content feature vectors which are respectively associated with a plurality of content modules. A user feature vector associated with the user is determined. The user feature vector is matched against the plurality of content feature vectors to determine a closest matching content feature vector to the user feature vector. A selected content module associated with the closest matching content feature vector is retrieved. The selected content module is combined with the page mark-up to define an edge-personalized page mark-up. |
| US09892195B2 |
Providing information via a network
An efficient method and system is provided for promptly providing recommended information on a product or service giving consideration to a site user trend. It comprises a recommended information providing server for managing information on users and user terminals used by users to access the recommended information providing server. The recommended information providing server has an information management section for managing transmission network information for specifying a channel for transmitting information among the plurality of user terminals. The transmission network information includes settings of users similar in trends to a target user as virtual users. Upon receiving event information (e.g., purchase of product A) from a user terminal of a user set as a virtual user, the recommended information providing server references the transmission network information, specifies a destination (target user) of the recommended information, and sends the recommended information to a user terminal of the destination via a user agent section. |
| US09892193B2 |
Using content found in online discussion sources to detect problems and corresponding solutions
A method for detecting solutions to a problem using content in online discussion sources. The method includes receiving a request, such request identifying a problem, and searching multiple online discussion sources for content related to the problem. Responsive to finding content related to the problem, the method searches the multiple online discussion sources for a plurality of solutions to the problem. Responsive to finding a plurality of solutions to the problem, the method forms groups containing the solutions from each of the multiple online discussion sources. The method then determines a likeliness to solve the problem for each of the groups and ranks the groups based on the determined likeliness to solve the problem. The method then determines that the rank of at least one group meets a threshold value, wherein the threshold value is based on a confidence in the likeliness to solve the problem. |
| US09892192B2 |
Information handling system and computer program product for dynamically assigning question priority based on question extraction and domain dictionary
An approach is provided dynamically prioritizing question requests based on extracted question data. In the approach, performed by an information handling system, a number of question requests to a question and answering (QA) system are received from a computer network, and a plurality of question priority parameters are identified, including one or more question topics and a plurality question context parameters, by performing natural language processing (NLP) analysis of each question request. The approach determines a target priority value for each question request based on the plurality of question priority parameters identified for said question request. By evaluating the target priority values for the plurality of question requests, processing of the question requests is prioritized by applying an artificial intelligence (AI) learned models and rule-based logic at the information handling system to evaluate the target priority values for the plurality of question requests. |
| US09892187B2 |
Data analysis method, data analysis device, and storage medium storing processing program for same
A data analysis method for analyzing data on a data analysis apparatus having: setting, a plurality of dimension tables each having a first identifier for identifying data to be analyzed and attributes corresponding to the first identifier; setting, a history table having a second identifier associated with each of the first identifiers of the dimension tables, and having attributes corresponding to the second identifier; setting, a relation table for storing attributes relating to the first identifier, the dimension tables having a first dimension table associated with the relation table through the attribute relating to the first identifier; associating, the first identifiers that refers to the first identifier of a first dimension table with the attributes; and processing, a query for the relation table and the first dimension table, and generating a second dimension table. |
| US09892183B2 |
Computer system, computer system management method, and program
A computer system, comprising a plurality of computers coupled to one another via a network, the computer system being configured to execute a task using a database constructed from the plurality of computers, the plurality of computers including a first computer and a second computer, the second computer being configured to execute: data replication for receiving the recovery request, for reading data, and for transmitting the read data to the first computer as first replicated data; and update processing for determining, in a case where a command to update the data is received in a recovery state, the sequence number of the update command, for updating predetermined data, and for transmitting the updated predetermined data as second replicated data, the first computer or the second computer being configured to control a write order of the first replicated data and the second replicated data by the first computer. |
| US09892182B2 |
Automatic repair of corrupted blocks in a database
A distributed data warehouse system maintains data blocks on behalf of clients, and stores primary and secondary copies of data blocks on different disks or nodes in a cluster. The data warehouse system may back up data blocks in a key-value backup storage system. In response to a query targeting a data block previously stored in the cluster, the data warehouse system may determine whether a consistent, uncorrupted copy of the data block is available in the cluster (e.g., by applying a consistency check). If not (e.g., if a disk or node failed), the data warehouse system may automatically initiate an operation to restore the data block from the backup storage system, using a unique identifier of the data block to access a backup copy. The target data may be returned in a query response prior to restoring primary and secondary copies of the data block in the cluster. |
| US09892177B2 |
Systems and methods for interacting with external content objects
Disclosed are methods, apparatus, systems, and computer readable storage media for interacting with a content object from an on-demand database service. The content object can be stored in an external content management data source. Access can be established with the external content object using information data identifying the content object, where the information data identifying the content object can be stored in a persistent object in a database of the on-demand database service. An indication of an event requesting interaction with the content object can be received. The persistent object can be updated to reflect the interaction with the content object. |
| US09892172B2 |
Date and time handling
Embodiments are provided for date and time handling. In some embodiments, a timestamp and a location of creation for a content item is received, a time zone offset is retrieved for the location, the timestamp is converted into a local date and time using the time zone offset, and the local date and time and the time zone offset are used to create a value for a temporal identifier, and the temporal identifier is stored for the content item. |
| US09892161B2 |
Adaptive intersect query processing
A computer-implemented method includes identifying a query, including one or more predicates and one or more branches, wherein one or more branches includes one or more legs. The computer-implemented method further includes, for each branch, in parallel: determining a risk, determining a return row threshold, estimating a number of return rows; terminating access if the return rows exceed the threshold. The computer-implemented method further includes, for each leg, in parallel: determining a leg return row threshold; accessing the leg; fetching one or more return rows into one or more leg return row pages; terminating access if the return rows exceed the threshold; intersecting one or more leg return row pages into one or more intersected leg return row pages; and applying the one or more predicates to the one or more intersected leg return row pages. The method may be embodied in a corresponding computer system or computer program product. |
| US09892159B2 |
Distance-based logical exploration in a relational database query optimizer
Systems and methods are described that generate an execution plan for a query in a relational database system. The systems and methods generate the execution plan by generating one or more initial logical representations of the query, performing an exploration process around each of the one or more initial logical representations of the query, the performing of the exploration process around a particular initial logical representation of the query comprising applying transformation rules to generate one or more additional logical representations of the query that are logically equivalent to the particular initial logical representation of the query and that are within a maximum allowable transformation distance of the particular initial logical representation of the query, generating one or more execution plans for each initial logical representation of the query and each additional logical representation of the query, and selecting an execution plan from among the generated execution plans. |
| US09892157B2 |
Min/max query with synopsis guided scan order
An approach for synopsis guided scan processing of MIN/MAX data queries where a minimal or maximal data query operation and a synopsis store are received. The synopsis store includes at least one of tuple range identifiers, column minimal and maximal metadata values. The synopsis store is sorted, where the column minimal or maximal metadata values search order is created for the tuple range identifiers. Dataset data associated with the tuple range identifiers is searched in the search order for a minimal or maximal value result until the minimal value result is less than or equal to a next column minimal metadata values or the maximal value result is greater than or equal to a next column maximal metadata values respectively and the minimal or maximal value result associated with the respective minimal or maximal data query operation is output. |
| US09892155B2 |
System and method for selection of data according to measurement of physiological parameters
It is one object of the present invention to disclose a method for filtering targeted data comprising steps of: a. providing a plurality of M devices Di; each of the Di is adapted to measure a physiological parameter; b. providing a data base of plurality of classified data; the classification is according to the physiological parameters; c. measuring a plurality of N physiological parameters of a mammalian subject using the devices; d. storing results of the measurement in a computer readable medium having instruction thereon; wherein the method, additionally comprising step of e. selecting via the instructions, at least some of the classified data according to the result of measurement of physiological parameters. |
| US09892154B2 |
Verifying data structure consistency across computing environments
According to one aspect of the present disclosure, a method and technique for verifying data structure consistency across computing environments is disclosed. The method includes: generating a first signature for a data structure corresponding to a first computing environment; generating a second signature for the data structure corresponding to a second computing environment; comparing the first and second signatures; and responsive to a disparity between the first and second signatures, indicating a change to the data structure between the first and second computing environments. |
| US09892153B2 |
Detecting lost writes
Techniques are described that determine occurrences of lost write by comparing version identifiers of corresponding replica data blocks and checkpoints of data files that include the data blocks. A method determines lost writes that may have occurred among a first set of data blocks and a second set of data blocks. Each data block in the first set of data blocks corresponds to a respective data block in the second set that is a version of data blocks in the first set. The data blocks in the first set and the second set are associated with version identifiers. The second set of data blocks is associated with a second checkpoint for which any version of a data block in the second set associated a version identifier below the second checkpoint has been acknowledged to a database server as having been written to persistent storage. The method proceed to determining the lost writes by determining that a data block in the first set and a data block in the second set satisfy criteria, such as the version identifier of the first data block is between the version identifier of the second data block and the second checkpoint. |
| US09892148B2 |
Methods of operating a column-store database engine utilizing a positional delta tree update system
A column-store database engine operates in response to database requests for the update and retrieval of data from within a stable data table and provides for the storage of database tuples within a column-store organized database structure. A positional delta tree data structure is implemented in the memory space of the database engine and is operatively coupled in an update data transfer path between a database engine interface and the stable data table. The positional delta tree data structure includes a differential data storage layer operative to store differential update data values in positionally defined relative reference to database tuples stored by the stable data table. |
| US09892147B1 |
Maintaining data associated with a storage device
An indication of a power-up of a storage device may be received. In response to receiving the indication, a first data structure that is stored at a volatile memory of the storage device may be retrieved. The first data structure may include first information associated with characteristics of a plurality of data blocks of the storage device. A second data structure stored at a non-volatile memory of the storage device may be retrieved where the second data structure includes second information associated with the characteristics of the plurality of data blocks of the storage device. A new data structure may be created based on the first information and the second information and a rule where an entry of the new data structure is provided a value from one of the first information or the second information based on the rule. |
| US09892145B2 |
Free space management in a database
A row is inserted in a database table on a page having a first space reserved for inserting rows of the database table. A second space is reserved for adding data to the inserted row, wherein reserving the second space includes reserving the second space on the page responsive to inserting the row, so that the amount of space reserved for adding data to inserted rows grows as more rows are inserted. The page is marked full for the second space independently of whether the first space is full for inserting new rows. Data is added to rows on the page, responsive to detecting that the second space is full, by adding the data to one or more new pages, even though rows may still be inserted on the page using any remaining room in the first space on the page. |
| US09892139B2 |
Distributed indexing in an enterprise
A method for distributing indexing of objects for an enterprise, comprising providing by a computer to an indexing server of an enterprise index entries respective to at least one object of the computer that was indexed in the computer, thereby updating an index of the indexing server of the enterprise with respect to the at least one object of the computer, and an apparatus for performing the same. |
| US09892138B2 |
Archive migration system
A computer detects that a threshold value associated with a storage capacity of a first storage account has been exceeded. The computer determines one or more other storage accounts to migrate a determined amount of data contained in the first storage account, wherein the determined one or more storage accounts are linked to the first storage account. The computer migrates the determined amount of data from the first storage account to the determined one or more other storage accounts. |
| US09892133B1 |
Verifying item attributes using artificial intelligence
A system that verifies the attributes included in the description of an item using artificial intelligence is provided. For example, the system may use a feature extractor to identify color, shape, and/or texture features of a provided image. The system may then use a linear classifier to process the extracted features to identify attributes of the item depicted in the image. The system may compare the identified attributes with the attributes listed in the item's description. If there are any discrepancies, the system may revise the item description to include the identified attributes or provide suggested revisions to a user based on the identified attributes. |
| US09892131B2 |
Method, electronic device, and storage medium for creating virtual directory
A method for creating a virtual directory includes locating at least one file of a designated type by traversing a storage region, extracting attribute information of the at least one file, and creating a virtual directory according to the attribute information of the at least one file. The attribute information including at least two of a name, a play address, or episode information of the at least one file. |
| US09892128B2 |
Techniques for improving deduplication efficiency in a storage system with multiple storage nodes
Techniques for selecting a storage node of a storage system to store data include applying a first function to at least some data chunks of an extent to provide respective first values for each of the at least some data chunks. A storage node, included within multiple storage nodes of a storage system, is selected to store the extent based on a majority vote derived from the respective first values. |
| US09892127B2 |
Global digests caching in a data deduplication system
For utilizing a global digests cache in deduplication processing in a data deduplication system using a processor device in a computing environment, input data is partitioned into data chunks and digest values are calculated for each of the data chunks. The positions of similar repository data are found in a repository of data for each of the data chunks. The repository digests of the similar repository data are located and loaded into the global digests cache. The global digests cache contains digests previously loaded by other deduplication processes. The input digests of the input data are matched with the repository digests contained in the global digests cache for locating data matches. |
| US09892126B2 |
Optimized caching based on historical production patterns for catalogs
A method, system and computer readable medium that predict times where cost of catalog caching is not efficient and deactivating catalog caching for that catalog during the predicted times. More specifically, an optimized catalog caching operation conducts historical analysis on catalog usage via records such as resource measurement facility (RMF) records and catalog statistical data. |
| US09892125B1 |
Method for logging update queries
A system and method logs update queries by epoch, including at checkpoints performed at various times. |
| US09892118B2 |
Dynamic display of filter criteria
Example techniques described herein may provide a dynamic display of filter criteria on a control device of a media playback system. In one aspect, an implementation is provided that involves (a) causing a graphical display of a computing device to display (i) a first set of filter criteria and (ii) search results that include at least a plurality of media-source identifiers that identify a plurality of respective media sources, (b) receiving by the computing device selection data that indicates a selection of one of the plurality of media-source identifiers, (c) determining by the computing device a second set of filter criteria based on the selected media-source identifier, where the second set of filter criteria is different from the first set of filter criteria, and (d) causing the graphical display to display the determined second set of filter criteria. |
| US09892117B2 |
Optimizing relational database queries with multi-table predicate expressions
Responding to relational database queries (for example, SQL queries) in a new way. More specifically, qualifying queries are written (for example, written by a human individual) in a way so that a join operation precedes a row limiting operation. Notwithstanding the fact that the join operation precedes the row limiting operation, when responding to the query, machine logic (for example, software) performs the row limiting operation before the join operation. This can improve time and processing efficiency. |
| US09892113B2 |
Generating distributed word embeddings using structured information
A computer program that uses structured information, such as syntactic and semantic information, as context for representing words and/or phrases as vectors, by performing the following steps: (i) receiving a first set of natural language text and a set of information pertaining to the first set of natural language text, where the information includes metadata and corresponding contextual information indicating a relationship between the metadata and the first set of natural language text; and (ii) generating a first vector representation for the first set of natural language text utilizing the metadata and its corresponding contextual information. |
| US09892106B1 |
Methods, systems and articles for correcting errors in electronic government forms
Methods, systems and articles of manufacture for analyzing a government form for a filer to be filed with an appropriate government agency. A computerized form analysis system receives a plurality of data values for completing the government form. The system creates a first feature vector using the plurality of data values representing the first government form. The form analysis system compares the first feature vector to a set of training set feature vectors for previously filed government forms. Each of the training set feature vectors is associated with a respective known outcome in filing the form, such as a positive outcome or negative outcome. The system determines that the first feature vector is similar to one or more training set feature vectors and based upon this determination, and the likelihood of an expected outcome in filing the first government form based on this determination. |
| US09892103B2 |
Social media guided authoring
Techniques and systems for assisting an author in creating content for social media (e.g., blog posts, microblogs, tweets, etc.) are disclosed, wherein hints are provided to the author as a function of social media stored in a social media knowledge store. Social media is collected and stored in a social media knowledge store according to some criteria. Upon the happening of some predetermined event, for example, relevant information is retrieved from the social media knowledge store. The relevancy of information may be a function of editing context (provided by the author) and/or social media behavior, for example. The relevant information may be translated into hints that provide an author with suggestions and/or corrections, for example. This information is provided to the author through a social media environment (e.g., an authoring tool) that may be also be capable of receiving input from the author and outputting editing context. |
| US09892101B1 |
Author overlay for electronic work
A processing device receives data associated with consumer interactions with an electronic work. The processing device determines, based on the received data, a plurality of aggregated consumption behaviors with regards to the electronic work. The processing device associates one or more of the plurality of aggregated consumption behaviors with portions of the electronic work in a data file. The processing device then provides the data file to a user device. |
| US09892097B2 |
Enabling absolute positioning with publishable HTML code
This document describes techniques and apparatuses that enable absolute positioning with publishable HTML code. These techniques permit a designer to place objects at absolute positions in a design interface and see how a webpage will actually look in response to that placement. A designer need not publish the design before seeing how it will actually look because the design interface determines and then uses publishable HTML code to present the design, even in real time. Furthermore, in some embodiments, the techniques provide real-time feedback showing parameters of the publishable HTML code, thereby permitting the designer to quickly and easily change the publishable HTML code by altering the shown parameters. |
| US09892091B2 |
Computing intersection cardinality
A computer-implemented method for computing an intersection or an intersection cardinality of each pair of a set in a first list of a plurality of sets and a set in a second list of a plurality of sets, the method including calculating a first union of a predetermined number of sets in the first list, obtaining filtered sets of the second list by filtering out an element from the plurality of sets in the second list, the element being not included in the first union, and intersecting a set in the first list and a set in the filtered sets of the second list. |
| US09892087B2 |
Mobile computing device and method of transmitting data therefrom
A mobile computing device is provided. The device includes a first port having a pinout configuration that is configured to support at least one data format, a data source configured to provide data of a second data format that is different from the at least one data format, and a first multiplexer configured to selectively direct data from the data source towards the first port. The pinout configuration is modified to enable the first port to support the second data format. |
| US09892083B1 |
Method and apparatus for controlling a rate of transmitting data units to a processing core
Embodiments include a network device comprising: at least one processing core; a packet processing module configured to perform a first set of packet processing operations at a first rate, to partially process data units that are received at the network device, the packet processing module being further configured to transmit ones of the data units to the at least one processing core, the at least one processing core being configured to perform a second set of processing operations at a second rate, wherein the second set of processing operations is different from the first set of processing operations; an interconnecting module configured to interconnect the packet processing module and the at least one processing core; and a rate limiter configured to selectively control a transmission rate at which the data units are transmitted by the packet processing module to the at least one processing core based on the second rate. |
| US09892081B2 |
Split transaction protocol for a bus system
A method of and apparatus for communicating between a host and an agent. The method includes the step of performing a first transaction between a host controller and a hub. The hub is operable to perform a single transaction with an agent based on the first transaction. The method then includes the step of performing a second transaction between the host controller and the hub. The second transaction is based on the single transaction. |
| US09892077B2 |
Camera control interface slave device to slave device communication
In a shared bus where communications are managed by a master device, direct slave device to slave device (S2S) communications is implemented. A first slave device wanting to communicate with a second slave device may make a S2S communication request to the master device. The request may include a requested number of words that the first slave device wishes to send over the shared bus. The master device may have a current word limit which may vary based upon operating parameters. The master device may deny the request if the requested number of words is greater than the current word limit or if it does not support S2S communications. Denial of the request may also be for other reasons, like activity over the shared bus. If the master device grants the request, the slave device may send the requested number of words to another slave device over the shared bus. |
| US09892073B1 |
Bus addressing systems and methods using repurposed bits
Systems and methods for dynamically assigning unique identifiers for devices on a bus using repurposed bits. Dynamically assigned unique identifiers can be dynamically assigned bus addresses. Exemplary methods do not require prior knowledge of the presence of devices on the network, accommodate networks with different numbers and types of devices, and allow for a node addresses as small as the number of devices on the network. |
| US09892070B1 |
Migrating interrupts from a source I/O adapter of a computing system to a destination I/O adapter of the computing system
Migrating interrupts from a source I/O adapter of a computing system to a destination I/O adapter of the computing system, includes: collecting, by a hypervisor of the computing system, interrupt mapping information, where the hypervisor supports operation of a logical partition executing and the logical partition is configured to receive interrupts from the source I/O adapter; configuring, by the hypervisor, the destination I/O adapter with the interrupt mapping information collected by the hypervisor; placing, by the hypervisor, the destination I/O adapter and the source I/O in an error state; deconfiguring the source I/O adapter from the logical partition; and enabling the logical partition and destination I/O adapter to recover from the error state. |
| US09892069B2 |
Posting interrupts to virtual processors
Embodiments of systems, apparatuses, and methods for posting interrupts to virtual processors are disclosed. In one embodiment, an apparatus includes look-up logic and posting logic. The look-up logic is to look-up an entry associated with an interrupt request to a virtual processor in a data structure. The posting logic is to post the interrupt request in a data structure specified by information in the first data structure. |
| US09892063B2 |
Contention blocking buffer
In response to a processor receiving data associated with a shared memory location, a contention blocking buffer stores a memory address of the shared memory location. In response to a probe seeking to take ownership of the shared memory location, the contention blocking buffer determines if the memory address indicated by the probe is stored at the contention blocking buffer. If so, the contention blocking buffer blocks the probe, thereby preventing another processor from taking ownership of the shared memory location. |
| US09892060B2 |
Identifying stale entries in address translation cache
A mapping may be changed in a table stored in memory. The table may map a first set of addresses, for a set of data, to a second set of addresses. The changing of the mapping may including mapping the first set of addresses to a third set of addresses. In response to the changing of the mapping, one or more flush operations may be executed to invalidate one or more entries within one or more address translation caches. The one or more entries may include the second set of addresses. In response to the executing of the one or more flush operations, a first test case may be run. The first test case may be to test whether any of the first set of addresses are mapping to the second set of addresses. |
| US09892051B1 |
Method and apparatus for use of a preload instruction to improve efficiency of cache
A method can include executing a store instruction that instructs storing of data at an address and, in response to the store instruction, inserting a preloading instruction after the store instruction but before a dependent load instruction to the address. Executing the store instruction can include invalidating a data entry of a cache array at an address of the cache array corresponding to the address and writing the data to a backing memory at an address of the backing memory corresponding to the address. The preloading instruction can cause filling the data entry of the cache array, at the address of the cache array corresponding to the address, with the data from the backing memory at the address of the backing memory corresponding to the address and validating the data entry of the cache array. |
| US09892049B2 |
Semiconductor device and method for prefetching to cache memory
A semiconductor device includes a processor, a memory, a plurality of tags, a plurality of ways each of which can store a plurality of data of consecutive addresses of the memory in which a tag value stored in each tag of the plurality of tags is taken as a reference address, and a cache controller configured to determine whether a second way has an address change direction flag matching an address change direction flag of the first way and has a tag value continuous with a tag value of the first way in a direction opposite to a direction that the address change direction flag of the first way indicates and prefetch data indicated by a tag value continuous with the tag value of the first way in the direction that the address change direction flag indicates to the second way based on the result of the determination. |
| US09892046B2 |
Cache allocation based on quality-of-service information
A cache memory device shared by a plurality of processors includes a cache memory configured to store some of data stored in a main memory and to be accessed by the plurality of processors. A cache controller stores quality-of-service (QoS) information of each of the plurality of processors and differently sets a size of a storage space of the cache memory to be managed by a target processor, based on the QoS information of the target processor. |
| US09892041B1 |
Cache consistency optimization
Various methods and systems for optimizing cache consistency are disclosed. For example, one method involves writing data to a file during a write transaction. The file is stored in a persistent storage device and cached in a non-volatile storage device. The method determines if an in-memory flag associated with the persistent storage device set. If the in-memory flag is not set, the method increases a generation count associated with the persistent storage device before a write transaction is performed on the file. The method then sets the in-memory flag before performing the write transaction on the file. In other examples, the method involves using a persistent flag associated with the non-volatile storage device to maintain cache consistency during a data freeze related to the taking of a snapshot by synchronizing generation counts associated with the persistent storage device and the non-volatile storage device. |
| US09892040B2 |
Semiconductor memory device
A semiconductor memory device includes: a memory cell array including memory strings, one of the memory strings including memory cells; word lines commonly connected to the memory strings; and a controller configured to execute a write operation and a read operation on a page, the page being stored in memory cells connected to one of the word lines. The controller is configured to measure a cell current flowing in the memory string, and adjust a write voltage applied to a word line, based on a result of the cell current. |
| US09892038B2 |
Method, apparatus, and system for data caching
A data caching method is disclosed. The method comprises changing, according to an instruction, a cache value, corresponding to a key, in a cache on a volatile memory, recording the instruction following a first effective content of a log file in a non-volatile memory to obtain a second effective content, the second effective content including the first effective content and the recorded instruction, and storing the key and the changed cache value corresponding to the key into the non-volatile memory. |
| US09892037B2 |
Efficient and secure direct storage device sharing in virtualized environments
A method, system and computer program product are disclosed for direct storage device sharing in a virtualized environment. In an embodiment, the method comprises assigning each of a plurality of virtual functions an associated memory area of a physical memory, and executing the virtual functions in a single root-input/output virtualization environment to provide each of a plurality of guests with direct access to the physical memory. In one embodiment, each of the guests is associated with a respective one of the virtual functions; and the assigning each of the plurality of virtual functions an associated memory area includes maintaining a per-virtual function mapping table identifying a respective one mapping function for each of the virtual functions, and each of the mapping functions mapping one of the memory areas of the physical area to an associated virtual memory. |
| US09892036B2 |
Apparatus and method of converting address and data of memory in a terminal
An apparatus and method of converting an address and data of a memory in a terminal. The apparatus includes a random key generator configured to generate a new random key, each time the terminal is powered on, an address mapper configured to convert an address of a memory area for data writing or reading using the random key and transmit the converted address to a data converter, and the data converter configured to convert data to be written to the memory using the converted address and convert data to read from the memory using the converted address to original data. |
| US09892033B1 |
Management of memory units
A method for memory management, the method may include calculating, by a memory controller, an estimate of an effect of read operations on a first flash memory entity; and performing, by the memory controller, at least one memory management operation in response to the estimate of the effect of read operations on the first flash memory entity. |
| US09892029B2 |
Apparatus and method for expanding the scope of systems management applications by runtime independence
An apparatus for automatic conversion of existing systems management software applications to run in multiple middleware runtime frameworks by automating the unification of runtime framework ontologies and isolating runtime dependent code in the build process of system management applications through the introduction of a runtime dependency processor and performing runtime dependency analysis. |
| US09892028B1 |
System and method for debugging of webcasting applications during live events
A system and method for debugging of live webcasting applications during live events is disclosed. The debugging system permits a user to quickly locate errors in real time during time sensitive webcasting where it is imperative to find and fix errors before the conclusion of the live event. |
| US09892027B2 |
Event-driven software testing
A method may include determining sequence-execution constraints that constrain execution orders of a plurality of events of an event-driven software application. The method may also include determining sequence-position constraints that constrain positions of the plurality of events in one or more possible event sequences of the plurality of events. Further, the method may include determining event-relation constraints that each indicates a relationship between an event input and an event output of each of the plurality of events. Moreover, the method may include forming a constraint set that enumerates the one or more possible event sequences and that includes the sequence-execution constraints, the sequence-position constraints, and the event-relation constraints. In addition, the method may include encoding control flow information of the one or more possible event sequences into the constraint set. |
| US09892021B2 |
Injection of code modifications in a two session debug scripting environment
In one general aspect, a method can include receiving at least one set of correction instructions, validating the at least one set of correction instructions for use by a debugger when debugging an application program, and generating a debug script. The debug script can include text for automatically implementing the validated at least one set of correction instructions in the debugger when debugging an application program. The method can further include generating a plurality of data structures for use by the debug script based on the validated at least one set of correction instructions, and outputting the debug script to the debugger for use by the debugger when debugging the application program. |
| US09892018B2 |
Suspending and resuming a graphics application executing on a target device for debugging
Debugging a graphics application executing on a target device. The graphics application may execute CPU instructions to generate graphics commands to graphics hardware for generation of graphics on a display. A breakpoint for the graphics application may be detected at a first time. In response to detecting the breakpoint, one or more graphics commands which were executed by the graphics hardware proximate to the first time may be displayed. Additionally, source code corresponding to CPU instructions which generated the one or more graphics commands may be displayed. |
| US09892017B2 |
Automatic repair of scripts
A method and associated system for repairing a running script. A missed object is detected among one or more objects of the running script, the missed object being unrecognized from an original object of a previous running of the script. A change type of the detected missed object is determined. The script is repaired based on the change type. |
| US09892016B2 |
Method for securing a program
A method for securing a first program, the first program including a finite number of program points and evolution rules associated to program points and defining the passage of a program point to another, the method including defining a plurality of exit cases and, when a second program is used in the definition of the first program, for each exit case, definition of a branching toward a specific program point of the first program or a declaration of branching impossibility, defining a set of properties to be proven, each associated with one of the constitutive elements of the first program, said set of properties comprising the branching impossibility as a particular property and establishment of the formal proof of the set of properties. |
| US09892013B2 |
Method and device for displaying incremental update progress
A method and device for displaying incremental update progress. The method includes: drawing representation parts corresponding to a file package increment and a file package non-increment in one and the same geometric graph using a first color and a second color, respectively; and in a process of loading the file package increment, updating the first color of the representation part corresponding to the file package increment, until the first color of the representation part corresponding to the file package increment is completely changed into the second color. |