| Document | Document Title |
|---|---|
| US09653768B2 |
Coupling of signals on multi-layer substrates
A signal distribution structure including: a dielectric material; an overlying conducting layer on a first level of the dielectric material; a first signal line on a second level of the dielectric material, the first signal line being physically separated from the overlying conducting layer by the dielectric material; wherein the overlying conducting layer includes a window running parallel to the first signal line, and further comprising within the window a first coupler electrode on the first level of the dielectric material, the first coupler electrode above, parallel to, and electrically isolated by the dielectric material from the first signal line, wherein the first coupler electrode is electrically isolated from the overlying conducting layer along at least most of its periphery. |
| US09653760B2 |
Battery pack
A battery pack includes a plurality of battery units, a protective circuit module on each of the plurality of battery units and that is electrically connected to each of the plurality of battery units, and an upper cover on the protective circuit module. Each of the battery units includes a bare cell including a can, an electrode assembly in the can, and a cap plate that seals an opening of the can, and a holder between the bare cell and the protective circuit module. The bare cells are located side by side along a first direction such that each cap plate is exposed along the same direction. One of the holder and the upper cover includes a protrusion that protrudes in a second direction, and another one of the holder and the upper cover includes a hole combined with the protrusion. |
| US09653759B2 |
Method and apparatus for optimized battery life cycle management
Method and apparatus for optimized battery life cycle management are described. A battery management system (BMS), comprising a battery, identifies battery-specific factors with associated environmental conditions, and battery history profiles at a current time instant. The BMS measures current, voltage, and/or power of the battery instantaneously. The resulting battery measurements, the battery-specific factors with associated environmental conditions, and the battery history profiles, formed as battery dynamic situations at the current time instant, may be time stamped for estimating an instantaneous battery state of the battery. The time stamped battery dynamic situations may be aggregated for long-term trend analysis for the battery state. The instantaneous battery state estimate is updated by comparing with the long-term trend analysis to manage battery charging or discharging. The battery operating conditions are determined based on the updated battery state estimate. The BMS may manage system power consumptions based on the determined battery conditions. |
| US09653758B2 |
Surface treatment method of solid electrolyte for sodium secondary battery
Provided are a solid electrolyte for a sodium secondary battery, and a surface treatment method thereof, and more specifically, a solid electrolyte for a sodium secondary battery capable of having excellent electrochemical performance by improving wettability with respect to molten sodium, even under a low temperature operation environment of 250° C. or less, and a surface treatment method thereof. |
| US09653755B2 |
Electrolyte formulations for lithium ion batteries
Electrolyte solutions including additives or combinations of additives that provide low temperature performance and high temperature stability in lithium ion battery cells. |
| US09653752B2 |
Secondary battery, battery pack, electric vehicle, electric power storage system, electric power tool, and electronic apparatus
A secondary battery includes: a cathode; an anode; and a gel electrolyte. The gel electrolyte includes an electrolytic solution and a polymer compound. The electrolytic solution includes an unsaturated cyclic ester carbonate represented by the following Formula (1), where X is a divalent group in which m number of >C═CR1-R1 and n number of >CR3R4 are bonded in any order; each of R1 to R4 is one of a hydrogen group, a halogen group, a monovalent hydrocarbon group, a monovalent halogenated hydrocarbon group, a monovalent oxygen-containing hydrocarbon group, and a monovalent halogenated oxygen-containing hydrocarbon group; any two or more of the R1 to the R4 are allowed to be bonded to one another; and m and n satisfy m≧1 and n≧0. |
| US09653748B2 |
Apparatus and method for securing battery cell packs
A framed lithium battery cell group includes a first frame member (20) and a second frame member (30). The frame members are locked together, clamping the lithium battery cell pack (10) on the seal edge surfaces (13, 16), thereby providing structural rigidity and protection from damage due to handling and vibration. Each of the frame members (20, 30) has multiple pins (25) and sockets (26) on the side opposite the clamping surface (33) to facilitate aligning and stacking multiple lithium battery cell pack and frame assemblies to form a lithium battery cell group (50). Each of the frame members (20, 30) include a buss bar capture feature (22, 32) having a bus bar (40) inserted therein for electrically connecting all of the terminals for a given lithium battery pack group to the buss bar (40). |
| US09653744B2 |
Method of starting fuel cell system for vehicle and fuel cell system
A method of starting a fuel cell system for a vehicle includes determining whether or not an activation signal of a fuel cell provided in the fuel cell system has been inputted, operating, if it is determined that the activation signal has been inputted, a cooling medium circulation pump to supply a cooling medium to an impurity removal mechanism for reducing a conductivity of the cooling medium, and driving an oxidant gas supply device and a fuel gas supply device in the fuel cell system to start activation of the fuel cell if it is determined that the conductivity of the cooling medium is less than or equal to a predetermined value. |
| US09653743B2 |
Method and apparatus for detecting defects of fuel cell membrane-electrode assembly
Disclosed herein is a method of detecting defects of a fuel cell membrane-electrode assembly which comprises a gas diffusion layer, a catalyst layer and an electrolyte membrane. The method includes steps of: supplying gas to a first side of the membrane-electrode assembly; deducing a pressure of the supplied gas and a permeation rate of the gas permeating to a second side of the membrane-electrode assembly and then deducing an interface pressure between the electrolyte membrane and the gas diffusion layer of the membrane-electrode assembly using the deduced pressure of the supplied gas and the permeation rate; calculating a gas permeability of the electrolyte membrane using the deduced values of the pressure of the supplied gas and the permeation rate and a predetermined outlet pressure at the second side of the membrane-electrode assembly; and determining a defect state of the electrolyte membrane using a variation in the calculated gas permeability according to a change in the pressure of the supplied gas. |
| US09653735B2 |
Lithium anodes for electrochemical cells
Provided is an anode for use in electrochemical cells, wherein the anode active layer has a first layer comprising lithium metal and a multi-layer structure comprising single ion conducting layers and polymer layers in contact with the first layer comprising lithium metal or in contact with an intermediate protective layer, such as a temporary protective metal layer, on the surface of the lithium-containing first layer. Another aspect of the invention provides an anode active layer formed by the in-situ deposition of lithium vapor and a reactive gas. The anodes of the current invention are particularly useful in electrochemical cells comprising sulfur-containing cathode active materials, such as elemental sulfur. |
| US09653733B2 |
Electrodes and lithium-ion cells with a novel electrode binder
An electrode for a lithium ion battery includes a matrix based on at least one polysaccharide and also particles of at least one electrochemically active material which are embedded in the matrix, with the electrode being free of synthetic polymeric compounds. A battery contains the electrode and a polysaccharide is a binder for electrochemically active electrode materials for such an electrode. |
| US09653730B2 |
Non-aqueous secondary battery having a blended cathode active material
An electrochemically active material comprising a mixture or blend of two groups of particles, exhibits synergetic effect. The two groups of particles are compounds of formula LixHyV3O8 and compounds of formula LixMyPO4 wherein M is one or more transition metals, comprising at least one metal which is capable of undergoing oxidation to a higher valence state. In order to obtain a synergistic effect, the particles of formula (I) and the particles of formule (II) are present in amounts of 5:95% by weight to 95:5% by weight. |
| US09653729B2 |
Lithium carbon monofluoride-oxygen battery and method of using the same
A lithium carbon monofluoride-oxygen battery is provided that includes a lithium metal-containing electroactive anode; an electroactive cathode formed of a carbon monofluoride compound; an electrolyte solution formed of an organic solvent and a lithium salt; a casing surrounding the anode, the cathode, and the electrolyte solution; and a port bored through the casing wherein the port selectively allows the flow of gas into the casing. In addition, a method of using an electrochemical battery is provided that includes providing a lithium carbon monofluoride-oxygen battery; closing the valve of the electrochemical battery to block the flow of gas into the battery; discharging the electrochemical battery after closing the valve of the battery; opening the valve of the electrochemical battery after discharging the electrochemical battery to expose the cathode to the flow of oxygen containing gas; and discharging the electrochemical battery after opening the valve of the electrochemical battery. |
| US09653722B2 |
Prismatic secondary battery
There is provided a prismatic secondary battery having high reliability and including a connecting part, wherein a terminal member and an external conduction member are connected by a swaged part and a welded part. The terminal member includes a flange, a first connecting part formed on a first surface side of the flange, and a second connecting part formed on a second surface side of the flange. The flange and the second connecting part are disposed on a battery exterior side than a sealing body. The first connecting part penetrates a through-hole formed in the sealing body. The second connecting part penetrates a through-hole formed in an external conduction member. The second connecting part includes a tip part swaged on the external conduction member. An abutting part of a tip of the swaged part of the second connecting part and a protruding part of the external conduction member is weld-connected. |
| US09653719B2 |
Battery
A battery includes a first mechanical coupling unit and a second mechanical coupling unit. The first coupling unit includes a plurality of mechanical coupling pins (18). Each of the mechanical coupling pins (18) includes a pin head (22) and a pin shaft (20). The pin heads (22) have a greater diameter than the pin shafts (20). The second mechanical coupling unit includes a plurality of capture elements (24, 26) configured to capture heads of mechanical coupling pins of a first mechanical coupling unit. |
| US09653717B2 |
Separator for electrochemical element, process for producing separator and electrochemical element using separator
A separator for electrochemical element, comprising a porous sheet that contains as a main fiber, a fibrillated solvent spun cellulose fiber with an average fiber length of 0.40 to 1.10 mm, has an average internal bond strength of 60 mJ or more in a thickness direction, and has a lowest internal bond strength of 30 mJ or more in the thickness direction, a process for producing the separator, and an electrochemical element using the separator. The separator for electrochemical element has strong mechanical strength and excellent processability. |
| US09653709B2 |
Optoelectronic device formed with controlled vapor flow
An organic optoelectronic device (OED) includes a plurality of OED cells separated by a vapor flow barrier that extends away from a substrate surface. The vapor flow barrier partially defines an OED cell area and helps prevent stray organic material deflected away from the substrate surface during deposition from being deposited outside the cell area. An organic vapor jet (OVJ) print head can be used to deposit organic material along the vapor flow barrier and may include one or more features configured to capture some of the stray organic material. A method that includes use of vapor flow barriers and/or capturing stray organic material can facilitate high-density printing of OED cells such as OLEDs with sharply defined edges and without cross-contamination among adjacent cells. |
| US09653708B2 |
Emissive display
A display comprises a first substrate, a second substrate opposite to the first substrate, an electrode structure, and a light-emitting combination (LEC) layer positioned between the first and second substrates, wherein the LEC layer comprises a light emitting material and a LC material, and a horizontal or vertical electric field is generated when a voltage is applied to that electrode structure. One of exemplified displays has an electrode structure comprising a first electrode and a second electrode oppositely disposed, and the LEC layer is positioned between the first and second electrodes, wherein a vertical electric field is generated when a voltage is applied. The device can further comprise an electron injection layer and a hole transport layer. Another exemplified display has an electrode structure arranged on one side of the first substrate, and a horizontal electric field is generated when a voltage is applied. |
| US09653704B2 |
Display panel
A display panel includes: a first substrate; a display unit disposed on a principal surface of the first substrate; a first sealing wall disposed in a frame shape on the principal surface of the first substrate, along an outer periphery of the first substrate; a second sealing wall disposed in a frame shape on the principal surface of the first substrate, along an outer periphery of the display unit; a desiccant material filled between the first sealing wall and the second sealing wall; a protective material filled on the display unit, in a region surrounded by the second sealing wall; and a second substrate. The second sealing wall covers at least a portion of a surface of the display unit opposite a surface of the display unit which is in contact with the first substrate. |
| US09653701B2 |
Flexible display apparatus and method of manufacturing the same
A flexible display apparatus includes a flexible substrate, a display layer disposed on one surface of the flexible substrate and including a plurality of pixels, graphene disposed on a surface opposing the one surface of the flexible substrate, and an encapsulation layer covering the display layer. |
| US09653698B2 |
Organic light-emitting display apparatus and fabrication method thereof
Provided are an organic light-emitting display apparatus and a method of manufacturing the same. The organic light-emitting display apparatus includes a display substrate; a thin film transistor (TFT) on the display substrate; an organic light-emitting diode (OLED) electrically connected to the TFT and including a first electrode on sub-pixels of the display substrate, an intermediate layer on the first electrode, and a second electrode on the intermediate layer; a pixel-defining layer which includes an opening exposing at least a portion of the first electrode and defines each sub-pixel; and a sealing substrate covering the OLED, the intermediate layer including a plurality of stacked layers, and a cross-sectional width of the intermediate layer gradually decreasing in a direction perpendicular to the display substrate. |
| US09653697B2 |
Light-emitting element, lighting device, light-emitting device, and electronic device
A light-emitting element includes a first electrode; a first light-emitting layer over the first electrode, containing a first phosphorescent compound and a first host material; a second light-emitting layer over the first light-emitting layer, containing a second phosphorescent compound and a second host material; a third light-emitting layer over the second light-emitting layer, containing a third phosphorescent compound and a third host material; and a second electrode over the third light-emitting layer. Between peaks of emission spectra of the first, second, and third phosphorescent compounds, the peak of the emission spectrum of the second phosphorescent compound is on the longest wavelength side and that of the emission spectrum of the third phosphorescent compound is on the shortest wavelength side. The third host material has higher triplet excitation energy than the first host material and the second host material. |
| US09653695B2 |
Transistor device with vertical carbon nanotube (CNT) arrays or non-vertical tapered CNT arrays
A transistor device includes an array of fin structures arranged on a substrate, each of the fin structures being vertically alternating stacks of a first isoelectric point material having a first isoelectric point and a second isoelectric point material having a second isoelectric point that is different than the first isoelectric point; one or more carbon nanotubes (CNTs) suspended between the fin structures and contacting a side surface of the second isoelectric point material in the fin structures; a gate wrapped around the array of CNTs; and source and drain contacts arranged over the fin structures; wherein each of the fin structures have a trapezoid shape or parallel sides that are oriented about 90° with respect to the substrate. |
| US09653692B2 |
Light-emitting device and electronic appliance using the same
The light emitting element includes a first electrode and a second electrode, between which a light emitting layer, a hole transporting layer provide in contact with the light emitting layer, an electron transporting layer provided in contact with the light emitting layer, and a mixed layer provided between the electron transporting layer and the second electrode. The mixed layer includes an electron transporting substance and a substance showing an electron donating property with respect to the electron transporting substance. The light emitting layer includes an organometallic complex represented in General Formula (1) and a host. R1 and R2 each represent an electron-withdrawing substituent group. R3 and R4 each represent any of hydrogen or an alkyl group having 1 to 4 carbon atoms. L represents any of a monoanionic ligand having a beta-diketone structure, a monoanionic bidentate chelating ligand having a carboxyl group, or a monoanionic bidentate chelating ligand having a phenolic hydroxyl group. |
| US09653690B2 |
Organic compound, organic optoelectronic device and display device
An organic compound represented by Chemical Formula 1, an organic optoelectric device including the organic compound, and a display device are disclosed. |
| US09653678B2 |
Magnetic memory, magnetic memory device, and operation method of magnetic memory
A magnetic memory includes a magnetic thin line including a plurality of magnetic domains, a reference layer having a magnetization, a nonmagnetic layer, a first fixed magnetization part having a magnetization, a second fixed magnetization part having a magnetization, a first electrode, a second electrode, and a third electrode. |
| US09653675B2 |
Driving apparatus, lens apparatus including the same, and imaging apparatus
A driving apparatus comprises a movable portion having movable side guide portions; a base portion having fixed side guide portions; a vibrator having a piezoelectric element; a friction member provided at one of the movable portion and the base portion; a pressing portion, provided at the other of the movable member and the base portion, for applying a pressing force to the vibrator; and rolling portions sandwiched between the movable side guide portions and the fixed side guide portions. The movable side guide portions and the fixed side guide portions extend with a predetermined length in a moving direction in which the movable portion is moved with respect to the base portion, and one of movable side guide portions is positioned within spacing in a direction orthogonal to the moving direction of a pair of movable side guide portions of the movable side guide portions. |
| US09653673B1 |
System and method for capacitive heat to electrical energy conversion
A system includes at least one capacitor comprising a dielectric material having a Curie temperature, each capacitor exhibiting an increased capacitance at a temperature below the Curie temperature and exhibiting a decreased capacitance at a temperature above the Curie temperature, a liquid source positioned adjacent to the capacitor and having a temperature above the Curie temperature, and means for exposing the capacitor to the liquid source for a predetermined time so the temperature of the dielectric material exceeds the Curie temperature, at which point the capacitance decreases. A voltage storage is connected to the capacitors to capture the increased voltage discharged from the capacitors. The capacitors are then removed from the liquid source and cooled. The capacitors may iteratively be recharged, exposed to the liquid source until their temperature exceeds the Curie temperature, connected to the voltage storage, removed from the liquid source, and cooled. |
| US09653664B2 |
Chip substrate comprising a groove portion and chip package using the chip substrate
Disclosed is a chip substrate. The chip substrate includes: conductive portions laminated in one direction to constitute the chip substrate; insulation portions alternately laminated with the conductive portions to electrically isolate the conductive portions; a cavity formed at a predetermined depth in a recessed shape in a region including the insulation portions on an upper surface of the chip substrate; and a groove portion disposed outside the cavity in a spaced-apart relationship with the cavity and formed at a predetermined depth in a recessed shape. According to the present invention, an adhesive agent is applied in a groove portion formed in advance. It is therefore possible to prevent the adhesive agent from being exposed to the light emitted from optical elements and to prevent the adhesive agent from being denatured. This makes it possible to enhance the reliability of lens bonding. Furthermore, there is no need to use an expensive resistant adhesive agent. An existing typical adhesive agent may be used as it is. This provides an effect of saving costs. Thus, there is an advantage in that a low-priced existing bonding material may be applied to a high-priced UV-C (deep-UV) package. |
| US09653662B2 |
Light emitting device
A light emitting device (100) according to the present disclosure includes a base substrate (10) having a recessed portion (15) at its upper surface (11); a light emitting element (20) provided in the recessed portion (15); and a sealing member (30) provided in the recessed portion (15), in which the sealing member (30) contains surface-treated particles (40), or particles (40) coexisting with a dispersing agent, and at least a part of an edge portion of the sealing member (30) is a region located in the vicinity of an edge (17) of the recessed portion, and in which at least one of the particles (40) and aggregates (41) of particles are unevenly distributed. |
| US09653661B2 |
Light-emitting device, method of manufacturing the same, method of mounting the same and lighting device
A method of manufacturing a light-emitting device includes a hole forming process for forming a through-hole that continues from a front surface to a back surface of a mounting substrate, a pattern forming process for continuously forming a circuit pattern on an inner surface of the through-hole in the mounting substrate, from an end portion of the through-hole on the front surface of the mounting substrate to a mounting portion of a light-emitting element, and on a periphery of the through-hole on the back surface of the mounting substrate, a mounting process for mounting the light-emitting element on the mounting portion, and a hot pressing process in that an inorganic material softened by heating is placed on the surface of the mounting substrate and is advanced into the through-hole while sealing the light-emitting element by pressing and bonding the inorganic material to the surface of the mounting substrate. |
| US09653659B2 |
Light emitting device including supporting body and wavelength conversion layer
Provided is a light emitting device having a phosphor layer on a surface of a semiconductor light emitting element and reducing unevenness in light distribution color, and a method of manufacturing the same. A light emitting device 100 includes a light emitting element 20 with a supporting body which is composed of a semiconductor light emitting element 1 and a supporting body 10, and a phosphor layer 7 which continuously covers an upper surface and side surfaces of the semiconductor light emitting element 1, and side surfaces of the supporting body 10. The phosphor layer 7 is configured such that at least a lower portion of the side surface of the supporting body 10 is thinner than the upper surface and the side surface of the semiconductor light emitting element 1. Such a configuration of the phosphor layer can be formed by applying a spray-coating of a slurry containing phosphor particles and a thermosetting resin in a solvent on the semiconductor light emitting element 1 side of the light emitting element 20 which has the supporting body. |
| US09653656B2 |
LED packages and related methods
An LED package with trenches traversing a die pad to provide a mechanical interlock mechanism to strengthen bonding between the die pad and an insulator such that de-lamination is less likely to occur between the die pad and the insulator. A chip carrying region is defined by a barrier portion formed by the insulator in the trenches and in gaps between electrodes and the die pad, such that a light converting layer is confined within the barrier portion. |
| US09653654B2 |
Solid-state radiation transducer devices having at least partially transparent buried contact elements, and associated systems and methods
Solid-state radiation transducer (SSRT) devices having buried contacts that are at least partially transparent and associated systems and methods are disclosed herein. An SSRT device configured in accordance with a particular embodiment can include a radiation transducer including a first semiconductor material, a second semiconductor material, and an active region between the first semiconductor material and the second semiconductor material. The SSRT device can further include first and second contacts electrically coupled to the first and second semiconductor materials, respectively. The second contact can include a plurality of buried-contact elements electrically coupled to the second semiconductor material. Individual buried-contact elements can have a transparent portion directly adjacent to the second semiconductor material. The second contact can further include a base portion extending between the buried-contact elements, such as a base portion that is least partially planar and reflective. |
| US09653652B2 |
Flexible display apparatus and method of manufacturing the same
Provided is a flexible display apparatus having an improved light extracting efficiency and a method of manufacturing the flexible display apparatus. The flexible display apparatus includes a flexible substrate having a rippled surface, a pixel electrode on the flexible substrate and having a rippled surface, an intermediate layer on the pixel electrode and including a light emission layer, and an opposing electrode facing the pixel electrode. A method of manufacturing the flexible display apparatus includes applying a tensile force to a flexible substrate, forming a pixel electrode on the flexible substrate, removing the tensile force applied to the flexible substrate to form a rippled surface in the pixel electrode, forming an intermediate layer including an light emission layer on the pixel electrode, and forming an opposing electrode facing the pixel electrode. |
| US09653648B2 |
LED die
An LED die includes a substrate, a first semiconductor layer, an active layer, a second semiconductor layer, a transparent conductive layer, a first electrode and a second electrode. The first semiconductor layer, the active layer, the second semiconductor layer and the transparent conductive layer are successively formed on the substrate. The first electrode and the second electrode respectively is formed on the first semiconductor layer and the transparent conductive layer. A plurality of grooves defined on the first semiconductor layer, and a plurality of hole groups defined on the second semiconductor layer. The present disclosure also provides a method of manufacturing the LED die. |
| US09653645B2 |
Light emitting diode
A light emitting diode includes: a light emitting structure including a first conductive type semiconductor layer, a second conductive type semiconductor layer, and an active layer interposed between the first conductive type semiconductor layer and the second conductive type semiconductor layer; a first contact electrode forming ohmic contact with the first conductive type semiconductor layer; a second contact electrode disposed on the second conductive type semiconductor layer; and an insulation layer disposed on the light emitting structure and insulating the first contact electrode from the second contact electrode, wherein the first conductive type semiconductor layer includes a nitride-based substrate, the nitride-based substrate having a thread dislocation density of 104 cm−2 or less, an oxygen impurity concentration of 1019 cm−3 or less, and an optical extinction coefficient of less than 5 cm−1 at a wavelength of 465 nm to 700 nm. |
| US09653644B2 |
Method for manufacturing semiconductor element
A method for manufacturing a semiconductor element includes providing a wafer having a sapphire substrate and a semiconductor stacked body disposed on the sapphire substrate, performing a first scanning of a portion of the sapphire substrate in which a laser beam is irradiated into an interior of the sapphire substrate, performing a second scanning of the portion of the sapphire substrate in which a laser beam is irradiated into the interior of the sapphire substrate, the second scanning occurring after the first scanning and before a void is produced in the interior of the sapphire substrate irradiated with the laser beam in the first scanning, and separating the wafer into a plurality of semiconductor elements. |
| US09653642B1 |
Manufacturable RGB display based on thin film gallium and nitrogen containing light emitting diodes
A method for manufacturing a display panel comprising light emitting device including micro LEDs includes providing multiple donor wafers having a surface region and forming an epitaxial material overlying the surface region. The epitaxial material includes an n-type region, an active region comprising at least one light emitting layer overlying the n-type region, and a p-type region overlying the active layer region. The multiple donor wafers are configured to emit different color emissions. The epitaxial material on the multiple donor wafers is patterned to form a plurality of dice, characterized by a first pitch between a pair of dice less than a design width. At least some of the dice are selectively transferred from the multiple donor wafers to a common carrier wafer such that the carrier wafer is configured with different color emitting LEDs. The different color LEDs could comprise red-green-blue LEDs to form a RGB display panel. |
| US09653640B2 |
Metal-oxide-semiconductor field-effect phototransistors based on single crystalline semiconductor thin films
MOSFET phototransistors, methods of operating the MOSFET phototransistors and methods of making the MOSFET phototransistors are provided. The phototransistors have a buried electrode configuration, which makes it possible to irradiate the entire surface areas of the radiation-receiving surfaces of the phototransistors. |
| US09653636B2 |
Device for interconnecting photovoltaic cells having contacts on their back side, and module comprising such a device
The invention relates to a device for interconnecting photovoltaic cells having contacts on their back side, comprising at least one layer of a woven produced from electrically insulating fibers, comprising at least one thread or tape section made of an electrically conductive material woven with said fibers and arranged so as to be flush with the surface of at least one region of the woven in order to form an electrical contact region intended to be connected to a contact pad located on the back side of a cell. The invention also relates to a module of interconnected photovoltaic cells having contacts on the back side, comprising an interconnecting device arranged along the back side of the cells, and a process for manufacturing such a module. |
| US09653632B1 |
Solar power system and related methods
A solar power system. A plurality of solar cells are joined to a foldable base. The foldable base has areas between the solar cells configured to fold to enable stacking of the solar cells. A voltage regulator is coupled to solar cells and an electrical connector is electrically coupled to the voltage regulator and configured to electrically couple to, and deliver an electric current to, an electrical device. In implementations a reflector is coupled to the foldable base adjacent to one or more of the plurality of solar cells, the reflector including a reflective material on a face of a flexible material, the reflective material configured to reflect light towards one or more of the plurality of solar cells. In implementations the voltage regulator is a pulse width modulation (PWM) voltage regulator. In implementations a switch coupled to the voltage regulator adjusts the voltage output between two or more levels. |
| US09653631B2 |
Optoelectronic device with modulation doping
An improved heterostructure for an optoelectronic device is provided. The heterostructure includes an active region, an electron blocking layer, and a p-type contact layer. The p-type contact layer and electron blocking layer can be doped with a p-type dopant. The dopant concentration for the electron blocking layer can be at most ten percent the dopant concentration of the p-type contact layer. A method of designing such a heterostructure is also described. |
| US09653630B2 |
Quantum dot solar cell performance with a metal salt treatment
The performance of lead sulfide quantum dot (QD) photovoltaic cells is improved by exposing a QD layer to a solution containing metal salts after the synthesis of the QDs is completed. The halide ions from the salt solution passivate surface lead (Pb) sites and alkali metal ions mend Pb vacancies. Metal cations and halide anions with small ionic radius have high probability of reaching QD surfaces to eliminate surface recombination sites. Compared to control devices fabricated using only a ligand exchange procedure without salt exposure, devices with metal salt treatment show increases in both the form factor and short circuit current of the PV cell. Some embodiments comprise a method for treatment of QDs with a salt solution and ligand exchange. Other embodiments comprise a photovoltaic cell having a QD layer treated with a salt solution and ligand exchange. |
| US09653626B2 |
Photoelectric conversion device and method for producing photoelectric conversion device
There is provided a photovoltaic device (100) having a substrate (10), i-type amorphous layers (16i, 18i) formed over a region of at least a part of a back surface of the substrate, and an i-type amorphous layer (12i) formed over a region of at least a part of a light-receiving surface of the substrate (10); and characterized in that electrodes (24n, 24p) are provided on the back surface and no electrode is provided on the light-receiving surface, and an electrical resistance per unit area of the back surface side i-type amorphous layers is lower than an electrical resistance per unit area of the light-receiving surface side i-type amorphous layer. |
| US09653623B2 |
Methods of manufacturing a semiconductor device
In a method for fabricating a semiconductor, a first conductive pattern structure partially protruding upwardly from first insulating interlayer is formed in first insulating interlayer. A first bonding insulation layer pattern covering the protruding portion of first conductive pattern structure is formed on first insulating interlayer. A first adhesive pattern containing a polymer is formed on first bonding insulation layer pattern to fill a first recess formed on first bonding insulation layer pattern. A second bonding insulation layer pattern covering the protruding portion of second conductive pattern structure is formed on second insulating interlayer. A second adhesive pattern containing a polymer is formed on second bonding insulation layer pattern to fill a second recess formed on second bonding insulation layer pattern. The first and second adhesive patterns are melted. The first and second substrates are bonded with each other so that the conductive pattern structures contact each other. |
| US09653622B2 |
Image pickup apparatus and image pickup system
An image pickup apparatus includes photoelectric conversion units each including a first semiconductor region of a first conductivity type and a semiconductor region of a second conductivity type disposed in contact with the first semiconductor region, a potential barrier formed between photoelectric conversion units, and a contact plug disposed in an image sensing area. The number of contact plugs is smaller than the number of photoelectric conversion units. The photoelectric conversion units include first and second photoelectric conversion units and are arranged such that at least two first photoelectric conversion units are adjacent in a first direction. The potential barrier includes a first part formed between the two first photoelectric conversion units disposed adjacently and a second part formed between first and second photoelectric conversion units adjacent to each other. The contact plug is located closer to the first part than to the second part. |
| US09653621B2 |
Semiconductor apparatus
A semiconductor apparatus (10) includes: a layered structure (100) that includes double junction structures that have a first junction (151, 153) where a wide-bandgap layer (102, 104) and a narrow-bandgap layer (101, 103, 105) are layered on each other and a second junction (152, 154) where a narrow-bandgap layer (101, 103, 105) and a wide-bandgap layer (102, 104) are layered on each other, and electrode semiconductor layers (110, 120) are joined to each layer of the layered structure. Each double junction structure includes a pair of a first region (131, 133) that has negative fixed charge and a second region (132, 134) that has positive fixed charge. The first region is closer to the first junction than to a center of the wide-bandgap layer. The second region is closer to the second junction than to the center of the wide-bandgap layer. A 2DEG or a 2DHG is formed at each junction. The semiconductor apparatus functions as an electric energy storage device such as a capacitor. |
| US09653619B2 |
Chip diode and method for manufacturing same
The present invention is directed to a chip diode with a Zener voltage Vz of 4.0 V to 5.5 V, including a semiconductor substrate having a resistivity of 3 mΩ·cm to 5 mΩ·cm and a diffusion layer formed on a surface of the semiconductor substrate and defining a diode junction region with the semiconductor substrate therebetween, in which the diffusion layer has a depth of 0.01 μm to 0.2 μm from the surface of the semiconductor substrate. |
| US09653618B1 |
Planar triple-implanted JFET
A JFET is formed with vertical and horizontal elements made from a high band-gap semiconductor material such as silicon carbide via triple implantation of a substrate comprising an upper drift region and a lower drain region, the triple implantation forming a lower gate, a horizontal channel, and an upper gate, in a portion of the drift region. A source region may be formed through a portion of the top gate, and the top and bottom gates are connected. A vertical channel region is formed adjacent to the planar JFET region and extending through the top gate, horizontal channel, and bottom gate to connect to the drift, such that the lower gate modulates the vertical channel as well as the horizontal channel, and current from the sources flows first through the horizontal channel and then through the vertical channel into the drift. |
| US09653617B2 |
Multiple junction thin film transistor
A multiple junction thin film transistor (TFT) is disclosed. The body of the TFT may have an n+ layer residing in a p− region of the body. The TFT may have an n+ source and an n+ drain on either side of the p− region of the body. Thus, the TFT has an n+/p−/n+/p−/n+ structure in this example. The n+ layer in the p− region increases the breakdown voltage. Also, drive current is increased. The impurity concentration in the n+ layer in the p− body and/or thickness of the n+ layer in the p− body may be tuned to increase performance of the TFT. In an alternative, the body of the TFT has a p+ layer residing in an n− region of the body. The TFT may have a p+ source and a p+ drain on either side of the p− region of the body. |
| US09653614B2 |
Semiconductor device and method for manufacturing the same
A metal element of a metal film is introduced into the oxide semiconductor film by performing heat treatment in the state where the oxide semiconductor film is in contact with the metal film, so that a low-resistance region having resistance lower than that of a channel formation region is formed. A region of the metal film, which is in contact with the oxide semiconductor film, becomes a metal oxide insulating film by the heat treatment. After that, an unnecessary metal film is removed. Thus, the metal oxide insulating film can be formed over the low-resistance region. |
| US09653609B2 |
Thin film transistor and organic light emitting diode display including the same
A thin film transistor including a substrate; a first gate electrode on the substrate; a first insulating layer covering the substrate and the first gate electrode; a semiconductor on the first insulating layer and overlapping the first gate electrode; a second insulating layer covering the first insulating layer and the semiconductor; a second gate electrode on the second insulating layer and crossing the first gate electrode in plane; a third insulating layer covering the second gate electrode and the second insulating layer; a first source electrode and a first drain electrode on the third insulating layer and connected to the semiconductor; and a second source electrode and a second drain electrode on a same layer as the first source electrode and the first drain electrode and connected to the semiconductor. |
| US09653608B2 |
Array substrate and manufacturing method thereof, display device and thin film transistor
An array substrate and a manufacturing method thereof, a display device and a thin film transistor are provided. The method includes forming a pattern that includes an active layer, a pixel electrode and a data line on a base substrate; forming a pattern that includes a gate insulating layer and at least two gate via-holes therein, the at least two gate via-holes are located in regions in the gate insulating layer that correspond to outer surroundings of the active layer and do not overlap with areas where the pixel electrode and the data line are located; forming a pattern that includes a gate line and at least two gate electrodes, the at least two gate electrodes are connected to the gate line, and are provided in the at least two gate via-holes, respectively. With this method, the fabricating process and the fabricating cost are saved. |
| US09653599B2 |
Semiconductor device and method of manufacturing semiconductor device
In a front surface of a semiconductor base body, a gate trench is disposed penetrating an n+-type source region and a p-type base region to a second n-type drift region. In the second n-type drift region, a p-type semiconductor region is selectively disposed. Between adjacent gate trenches, a contact trench is disposed penetrating the n+-type source region and the p-type base region, and going through the second n-type drift region to the p-type semiconductor region. A source electrode embedded in the contact trench contacts the p-type semiconductor region at a bottom portion and corner portion of the contact trench, and forms a Schottky junction with the second n-type drift region at a side wall of the contact trench. |
| US09653595B2 |
Semiconductor device and semiconductor device fabrication method
An n− drift layer is a parallel pn layer having an n-type region and a p-type region are alternately arranged in the direction parallel to the main surface so as to come into contact with each other, and have a width in a direction parallel to the main surface of the substrate which is less than a length in a direction perpendicular to the main surface of the substrate. A second-main-surface-side lower end portion of the p-type region has a structure in which a high-concentration lower end portion and a low-concentration lower end portion of a p-type low-concentration region are repeated at a predetermined pitch in the direction parallel to the main surface of the substrate. It is possible to provide a super junction MOS semiconductor device which can improve a trade-off relationship between turn-off loss and turn-off dv/dt and improve avalanche resistance. |
| US09653584B2 |
Pre-sculpting of Si fin elements prior to cladding for transistor channel applications
Transistor fin elements (e.g., fin or tri gate) may be modified by radio frequency (RF) plasma and/or thermal processing for purpose of dimensional sculpting. The etched, thinned fins may be formed by first forming wider single crystal fins, and after depositing trench oxide material between the wider fins, etching the wider fins using a second etch to form narrower single crystal fins having undamaged top and sidewalls for epitaxially growing active channel material. The second etch may remove a thickness of between a 1 nm and 15 nm of the top surfaces and the sidewalls of the wider fins. It may remove the thickness using (1) chlorine or fluorine based chemistry using low ion energy plasma processing, or (2) low temperature thermal processing that does not damage fins via energetic ion bombardment, oxidation or by leaving behind etch residue that could disrupt the epitaxial growth quality of the second material. |
| US09653578B2 |
Thin film transistor, its manufacturing method and display device
The present disclosure relates to the field of display technology, and provides a TFT, its manufacturing method and a display device. A first region of an active layer of the TFT corresponding to a gap between a source electrode and a drain electrode includes a metallic oxide semiconductor layer and a silicon semiconductor layer arranged on the metallic oxide semiconductor layer. The source electrode and the drain electrode are directly lapped onto the active layer. |
| US09653576B2 |
Patterning of vertical nanowire transistor channel and gate with directed self assembly
Directed self-assembly (DSA) material, or di-block co-polymer, to pattern features that ultimately define a channel region a gate electrode of a vertical nanowire transistor, potentially based on one lithographic operation. In embodiments, DSA material is confined within a guide opening patterned using convention lithography. In embodiments, channel regions and gate electrode materials are aligned to edges of segregated regions within the DSA material. |
| US09653573B2 |
Replacement metal gate including dielectric gate material
A method of fabricating a semiconductor device includes forming at least one semiconductor fin on a semiconductor substrate. A plurality of gate formation layers is formed on an etch stop layer disposed on the fin. The plurality of gate formation layers include a dummy gate layer formed from a dielectric material. The plurality of gate formation layers is patterned to form a plurality of dummy gate elements on the etch stop layer. Each dummy gate element is formed from the dielectric material. A spacer layer formed on the dummy gate elements is etched to form a spacer on each sidewall of dummy gate elements. A portion of the etch stop layer located between each dummy gate element is etched to expose a portion the semiconductor fin. A semiconductor material is epitaxially grown from the exposed portion of the semiconductor fin to form source/drain regions. |
| US09653568B2 |
Method of manufacturing an insulated gate bipolar transistor with mesa sections between cell trench structures
A method of manufacturing an insulated gate bipolar transistor includes providing trenches extending from a first surface to a layer section in a semiconductor portion, introducing impurities into mesa sections between the trenches, and forming, from the introduced impurities, second portions of doped regions separated from source regions by body regions. The source regions are electrically connected to an emitter electrode. The second portions have a second mean net impurity concentration exceeding at least ten times a first mean net impurity concentration in first portions of the doped layer. The first portions extend from the body regions to the layer section, respectively. |
| US09653563B2 |
Connection structure for vertical gate all around (VGAA) devices on semiconductor on insulator (SOI) substrate
A vertical gate all around (VGAA) nanowire device circuit routing structure is disclosed. The circuit routing structure comprises a plurality of VGAA nanowire devices including a NMOS and a PMOS device. The devices are formed on a semiconductor-on-insulator substrate. Each device comprises a bottom plate and a top plate wherein one of the bottom and top plates serves as a drain node and the other serves as a source node. Each device further comprises a gate layer. The gate layer fully surrounds a vertical channel in the device. In one example, a CMOS circuit is formed with an oxide (OD) block layer that serves as a common bottom plate for the NMOS and PMOS devices. In another example, a CMOS circuit is formed with a top plate that serves as a common top plate for the NMOS device and the PMOS devices. In another example, a SRAM circuit is formed. |
| US09653562B2 |
Nonvolatile memory device and method for manufacturing the same
A nonvolatile memory device includes a pipe gate electrode layer formed over a substrate; a plurality of conductive layers stacked over the pipe gate electrode layer; source lines formed over an uppermost one of the conductive layers; first slits passing through the pipe gate electrode layer at positions overlapping with the source lines, and dividing the pipe gate electrode layer into a plurality of pipe gate electrodes, and second slits passing through the conductive layers at positions different from the first slits, and dividing the conductive layers into a plurality of memory blocks. |
| US09653554B2 |
Reusable nitride wafer, method of making, and use thereof
Techniques for processing materials for manufacture of gallium-containing nitride substrates are disclosed. More specifically, techniques for fabricating and reusing large area substrates using a combination of processing techniques are disclosed. The methods can be applied to fabricating substrates of GaN, AlN, InN, InGaN, AlGaN, and AlInGaN, and others. Such substrates can be used for a variety of applications including optoelectronic devices, lasers, light emitting diodes, solar cells, photo electrochemical water splitting and hydrogen generation, photo detectors, integrated circuits, transistors, and others. |
| US09653552B2 |
Body-tied, strained-channel multi-gate device and methods
A fin-FET or other multi-gate transistor is disclosed. The transistor comprises a semiconductor substrate having a first lattice constant, and a semiconductor fin extending from the semiconductor substrate. The fin has a second lattice constant, different from the first lattice constant, and a top surface and two opposed side surfaces. The transistor also includes a gate dielectric covering at least a portion of the top surface and the two opposed side surfaces, and a gate electrode covering at least a portion of the gate dielectric. The resulting channel has a strain induced therein by the lattice mismatch between the fin and the substrate. This strain can be tuned by selection of the respective materials. |
| US09653551B2 |
Field effect transistors including fin structures with different doped regions and semiconductor devices including the same
Field effect transistors are provided. According to the field effect transistor, a source region and a drain region are provided on a substrate and a fin portion is provided to protrude from the substrate. The fin portion connects the source region and the drain region to each other. A gate electrode pattern is disposed on the fin portion and extends to cross over the fin portion. A gate dielectric layer is disposed between the fin portion and the gate electrode pattern. A semiconductor layer is disposed between the fin portion and the gate dielectric layer. The semiconductor layer and the fin portion have dopant-concentrations different from each other, respectively. |
| US09653545B2 |
MOSFET structure with T-shaped epitaxial silicon channel
A MOSFET disposed between shallow trench isolation (STI) structures includes an epitaxial silicon layer formed over a substrate surface and extending over inwardly extending ledges of the STI structures. The gate width of the MOSFET is therefore the width of the epitaxial silicon layer and greater than the width of the original substrate surface between the STI structures. The epitaxial silicon layer is formed over the previously doped channel and is undoped upon deposition. A thermal activation operation may be used to drive dopant impurities into the transistor channel region occupied by the epitaxial silicon layer but the dopant concentration at the channel location where the epitaxial silicon layer intersects with the gate dielectric, is minimized. |
| US09653544B2 |
Methods for fabricating radiation hardened MOS devices
Radiation hardened NMOS devices suitable for application in NMOS, CMOS, or BiCMOS integrated circuits, and methods for fabricating them. A device includes a p-type silicon substrate, a field oxide surrounding a moat region on the substrate tapering through a Bird's Beak region to a gate oxide within the moat region, a heavily-doped p-type guard region underlying at least a portion of the Bird's Beak region and terminating at the inner edge of the Bird's Beak region, a gate included in the moat region, and n-type source and drain regions spaced by a gap from the inner edge of the Bird's Beak and guard regions. A variation of minor alterations to the conventional moat and n-type source/drain masks. The resulting devices have improved radiation tolerance while having a high breakdown voltage and minimal impact on circuit density. |
| US09653543B2 |
Methods of fabricating isolation regions of semiconductor devices and structures thereof
Methods of fabricating isolation regions of semiconductor devices and structures thereof are disclosed. In a preferred embodiment, a semiconductor device includes a workpiece and at least one trench formed in the workpiece. The at least one trench includes sidewalls, a bottom surface, a lower portion, and an upper portion. A first liner is disposed over the sidewalls and the bottom surface of the at least one trench. A second liner is disposed over the first liner in the lower portion of the at least one trench. A first insulating material is disposed over the second liner in the lower portion of the at least one trench. A second insulating material is disposed over the first insulating material in the upper portion of the at least one trench. The first liner, the second liner, the first insulating material, and the second insulating material comprise an isolation region of the semiconductor device. |
| US09653541B2 |
Structure and method to make strained FinFET with improved junction capacitance and low leakage
A method of forming a semiconductor device that includes forming a gate structure on a fin structure and etching the source and drain region portions of the fin structure to provide a recessed surface. A first semiconductor layer is formed on the recessed surface of the fin structure that is doped to a first conductivity type. A leakage barrier layer is formed on the first semiconductor layer. A second semiconductor layer is formed on the leakage barrier layer. The second semiconductor layer is doped to a second conductivity type. |
| US09653540B2 |
Semiconductor wafer and method of manufacturing semiconductor devices in a semiconductor wafer
A method of manufacturing semiconductor devices in a semiconductor wafer comprises forming charge compensation device structures in the semiconductor wafer. An electric characteristic related to the charge compensation device structures is measured. At least one of proton irradiation and annealing parameters are adjusted based on the measured electric characteristic. The semiconductor wafer is irradiated with protons and annealed based on the at least one of the adjusted proton irradiation and annealing parameters. Laser beam irradiation parameters are adjusted with respect to different positions on the semiconductor wafer based on the measured electric characteristic. The semiconductor wafer is irradiated with a photon beam at the different positions on the wafer based on the photon beam irradiation parameters. |
| US09653539B2 |
Semiconductor device
It is an objective to improve reverse surge withstand capability of a semiconductor device, for example, a Schottky barrier diode.A p-type semiconductor section 14 includes a p+ type semiconductor portion (first concentration portion) 14a and a p− type semiconductor portion (second concentration portion) 14b, which have different impurity concentrations from each other. Additionally, a part of a side surface 13S of a metal portion 13 and a part of a bottom surface 13B of the metal portion 13 connected to the side surface 13S thereof are in contact with a part of the p+ type semiconductor portion 14a. Further, at least a part of a side surface 14bS of the p− type semiconductor portion 14b is in contact with a side surface 14aS of the p+ type semiconductor portion 14a. |
| US09653538B2 |
Method of localized modification of the stresses in a substrate of the SOI type, in particular FD SOI type, and corresponding device
A substrate of the silicon on insulator type includes a semi-conducting film disposed on a buried insulating layer which is disposed on an unstressed silicon support substrate. The semi-conducting film includes a first film zone of tensile-stressed silicon and a second film zone of tensile-relaxed silicon. Openings through the buried insulating layer permit access to the unstressed silicon support substrate under the first and second film zones. An N channel transistor is formed from the first film zone and a P channel transistor is formed from the second film zone. The second film zone may comprise germanium enriched silicon forming a compressive-stressed region. |
| US09653534B2 |
Trench metal-insulator-metal capacitor with oxygen gettering layer
A method including forming an oxygen gettering layer on one side of an insulating layer of a deep trench capacitor between the insulating layer and a substrate, the oxygen gettering layer including an aluminum containing compound, and depositing an inner electrode on top of the insulating layer, the inner electrode including a metal. |
| US09653533B2 |
Multi-layer interconnected spiral capacitor
An upper planar capacitor is spaced above a lower planar capacitor by a dielectric layer. A bridged-post inter-layer connector couples the capacitances in parallel, through first posts and second posts. The first posts and second posts extend through the dielectric layer, adjacent the upper and lower planar capacitors. A first level coupler extends under the dielectric layer and couples the first posts together and to a conductor of the lower planar capacitor, and couples another conductor of the lower planar capacitor to one of the second posts. A second level coupler extends above the dielectric layer, and couples the second posts together and to a conductor of the upper planar capacitor, and couples another conductor of the upper planar capacitor to one of the first posts. |
| US09653532B2 |
High resistivity soft magnetic material for miniaturized power converter
An on-chip magnetic structure structure includes a magnetic material comprising cobalt in a range from about 80 to about 90 atomic % (at. %) based on the total number of atoms of the magnetic material, tungsten in a range from about 4 to about 9 at. % based on the total number of atoms of the magnetic material, phosphorous in a range from about 7 to about 15 at. % based on the total number of atoms of the magnetic material, and palladium substantially dispersed throughout the magnetic material. |
| US09653522B2 |
Organic light-emitting diode display apparatus including a photo sensor
An organic light-emitting diode display apparatus includes a substrate. An organic light-emitting device is disposed on the substrate and includes a first electrode, a second electrode, and an emission layer disposed between the first electrode and the second electrode. A reflectance of the first electrode is greater than a reflectance of the second electrode. A thin-film transistor is disposed between the substrate and the first electrode and is connected to the first electrode. A first light reflective layer is connected to the thin-film transistor that is disposed between the substrate and the first electrode. A photo sensor is disposed in an outer area of the substrate and is configured to sense light reflected from the first light reflective layer. |
| US09653520B2 |
Organic light emitting display panel and method of manufacturing the same
An organic light emitting display panel with improved efficiency and lifespan and a method of manufacturing the same are disclosed. The organic light emitting display panel according to the present invention includes a substrate having red, green, blue, and white sub-pixel regions, red, green, and blue color filters respectively formed in the red, green, and blue sub-pixel regions, an overcoat layer that is formed in the red and green sub-pixel regions except for the blue and white sub-pixel regions or is formed in the sub-pixel regions such that a thickness of the overcoat layer in the red and green sub-pixel regions is greater than a thickness of the overcoat layer in the blue and white sub-pixel regions; and organic emitting cells respectively formed in the red, green, blue, and white sub-pixel regions. |
| US09653519B2 |
Light emitting device, method of preparing the same and device for fabricating the same
A light emitting device having a high definition, a high aperture ratio and a high reliability is provided. The present invention realizes a high definition and a high aperture ratio for a flat panel display of full colors using luminescent colors of red, green and blue without being dependent upon the film formation method and deposition precision of an organic compound layer by forming the laminated sections 21, 22 by means of intentionally and partially overlapping different organic compound layers of adjacent light emitting elements. Moreover, the protective film 32a containing hydrogen is formed and the drawback in the organic compound layer is terminated with hydrogen, thereby realizing the enhancement of the brightness and the reliability. |
| US09653518B2 |
Light-emitting display device and method of manufacturing the same
A light-emitting display device and a method of manufacturing the same including preparing a substrate such that the substrate includes a pixel area and a seal area; forming first pixel electrode patterns on the substrate; forming insulating patterns on the pixel area and the seal area; forming hole injection patterns on the pixel area and the seal area; forming surface treatment patterns on the pixel area and the seal area; forming light-emitting patterns on the pixel area and the seal area; and forming second pixel electrode patterns on the pixel area, wherein forming the surface treatment patterns includes forming the surface treatment patterns on the pixel area and the seal area such that the surface treatment patterns and the hole injection patterns can be alternately arranged on the top surface of the pixel area, and that only the surface treatment patterns can be arranged on the top surface of the seal area. |
| US09653517B2 |
Light-emitting device
A light-emitting device in which different electrodes in a work function are used in a first light-emitting element and a second light-emitting element are provided. A light-emitting device includes a first light-emitting element and a second light-emitting element. The first light-emitting element includes a first electrode, an EL layer, and a second electrode in this order. The second light-emitting element includes a third electrode, the EL layer, and the second electrode in this order. The EL layer includes a first light-emitting layer, a layer, and a second light-emitting layer in this order. The structure of the first light-emitting layer is different from the structure of the second light-emitting layer. The first light-emitting element and the second light-emitting element are different in a carrier-injection property. |
| US09653516B2 |
Acoustic wave device structure, integrated structure of power amplifier and acoustic wave device, and fabrication methods thereof
An integrated structure of power amplifier and acoustic wave device comprises: a compound semiconductor epitaxial substrate, a power amplifier upper structure formed on a first side of said compound semiconductor epitaxial substrate, and a film bulk acoustic resonator formed on a second side of said compound semiconductor epitaxial substrate; wherein forming an epitaxial structure on a compound semiconductor substrate to form said compound semiconductor epitaxial substrate; wherein said first side of said compound semiconductor epitaxial substrate and said power amplifier upper structure form a power amplifier; said second side of said compound semiconductor epitaxial substrate and said film bulk acoustic resonator form an acoustic wave device; the integrated structure of power amplifier and acoustic wave device on the same compound semiconductor epitaxial substrate is capable of reducing the component size, optimizing the impedance matching, and reducing the signal loss between power amplifier and acoustic wave device. |
| US09653515B2 |
Semiconductor light emitting device and semiconductor light emitting apparatus including the same
A semiconductor light emitting device includes a substrate; a light emitting structure and a Zener diode structure disposed to be spaced apart from each other on the substrate, and including a first semiconductor layer and a second semiconductor layer, respectively; and a common, integrally formed, electrode electrically connected to the first semiconductor layer of the light emitting structure and the second semiconductor layer of the Zener diode structure. At least a portion of the Zener diode formed by the Zener diode structure is disposed below the common electrode. |
| US09653513B1 |
CMOS image sensor and a method of forming the same
A complementary metal-oxide-semiconductor (CMOS) image sensor includes an implant region of a second type formed in a crystalline layer of a first type. A channel of a transfer gate entirely covers the implant region, which partially joins a photodiode, a doped well and a floating diffusion node. |
| US09653509B2 |
Image sensor and electronic device
There is provided an image sensor including pixels each configured to include a transfer transistor configured as an embedded channel type MOS transistor and to output a pixel signal based on a charge transferred to a floating diffusion from a photodiode by the transfer transistor in an on state, and a determination unit configured to convert the output pixel signal to a digital value, then compare the converted digital value to a threshold value, and thereby make a binary determination on presence or absence of incidence of a photon on the pixel that has generated the pixel signal. |
| US09653506B2 |
Image sensor and method for fabricating the same
An image sensor includes a substrate including a photoelectric conversion region, an interlayer insulation layer including an interconnection line and formed on the substrate, a condensing pattern having a first refractive index and including a first region upwardly protruding from the interlayer insulation layer and a second region buried in the interlayer insulation layer, and a color filter formed on the condensing pattern to bury the condensing pattern. |
| US09653502B2 |
Solid-state imaging device, method of manufacturing solid-state imaging device, and imaging apparatus
There is provided a solid-state imaging device including a semiconductor substrate having an effective region in which a photodiode performing a photoelectric conversion is formed and, an optical black region shielded by a light shielding film; a first film which is formed on the effective region and in which at least one layer or more of layers having a negative fixed charge are laminated; and a second film which is formed on the light shielding region and in which at least one layer or more of layers having a negative fixed charge are laminated, in which the number of layers formed in the first film is different from the number of layers formed in the second film. |
| US09653497B2 |
Manufacturing method of sensing integrated circuit
A manufacturing method of a sensing integrated circuit including the following acts. A plurality of transistors are formed. At least one dielectric layer is formed on or above the transistors. A plurality of connecting structures are formed in the dielectric layer. The connecting structures are respectively and electrically connected to the transistors. A plurality of separated conductive wells are respectively formed in electrical contact with the connecting structures. |
| US09653491B1 |
Array substrate and manufacturing method, display panel and display device
An array substrate comprises a plurality of data lines and a plurality of gate lines arranged to intersect with each other, an annular common signal line surrounding the data lines and the gate lines, and at least one annular repair line. The repair line is electrically connected with the common signal line through an anti-static ring. The repair line comprises a first line segment and a second line segment insulated from each other. The first line segment intersects with and is insulated from each of the data lines, the second line segment does not intersect with the data lines and is electrically connected with the common signal line through the anti-static ring. A repair portion is arranged between the first line segment and the second line segment, which is used for enabling the first line segment to be electrically connected with the second line segment after being welded. |
| US09653480B1 |
Nanosheet capacitor
Embodiments are directed to a method of forming a semiconductor device and resulting structures having a nanosheet capacitor by forming a first nanosheet stack over a substrate. The first nanosheet stack includes a first nanosheet vertically stacked over a second nanosheet. A second nanosheet stack is formed over the substrate adjacent to the first nanosheet stack. The second nanosheet stack includes a first nanosheet vertically stacked over a second nanosheet. Exposed portions of the first and second nanosheets of the second nanosheet stack are doped and gates are formed over channel regions of the first and second nanosheet stacks. |
| US09653476B2 |
On-SOI integrated circuit comprising a lateral diode for protection against electrostatic discharges
An integrated circuit includes a transistor, an UTBOX buried insulating layer disposed under it and a ground plane disposed under the layer. A well is disposed under the plane and a first trench is at the periphery of the transistor and extends through the layer into the well. There is a substrate under the well and a p-n diode on a side of the transistor. The diode comprises first and second zones of opposite doping and the first zone is configured for electrical connection to a first electrode of the transistor. The first and second zones are coplanar with the plane and a second trench for separating the first and second zones. The second trench extends through the layer into the plane to a depth less than an interface between the plane and the well. There is a third zone under the second trench forming a junction between the zones. |
| US09653473B2 |
Semiconductor device and method of manufacturing the same
A semiconductor device, including: interlayer insulating patterns and conductive patterns alternately stacked on a substrate; a channel structure passing through the interlayer insulating patterns and the conductive patterns; and tapered patterns interposed between the channel structure and the interlayer insulating patterns, spaced apart with any one of the conductive patterns interposed therebetween, and having widths decreased toward the substrate. |
| US09653471B2 |
Pattern layout to prevent split gate flash memory cell failure
A semiconductor structure of a split gate flash memory cell is provided. The semiconductor structure includes a semiconductor substrate including a first source/drain region and a second source/drain region. The first and second source/drain regions form a channel region therebetween. The semiconductor structure further includes a select gate and a memory gate spaced between the first and second source/drain regions over the channel region. The select gate extends over the channel region and terminates at a line end having a top surface asymmetric about an axis that extends along a length of the select gate and that bisects a width of the select gate. Even more, the semiconductor structure includes a charge trapping dielectric arranged between neighboring sidewalls of the memory gate and the select gate, and arranged under the memory gate. A method of manufacturing the semiconductor structure is also provided. |
| US09653470B2 |
Individually read-accessible twin memory cells
The present disclosure relates to a non-volatile memory on a semiconductor substrate, comprising: a first memory cell comprising a floating-gate transistor and a select transistor having an embedded vertical control gate, a second memory cell comprising a floating-gate transistor and a select transistor having the same control gate as the select transistor of the first memory cell, a first bit line coupled to the floating-gate transistor of the first memory cell, and a second bit line coupled to the floating-gate transistor of the second memory cell. |
| US09653467B2 |
Method of maintaining the state of semiconductor memory having electrically floating body transistor
Methods of maintaining a state of a memory cell without interrupting access to the memory cell are provided, including applying a back bias to the cell to offset charge leakage out of a floating body of the cell, wherein a charge level of the floating body indicates a state of the memory cell; and accessing the cell. |
| US09653466B2 |
FinFET device and method of making the same
A finFET device according to some examples herein may include an active gate element above an active fin element and a dummy fin element that partially breaks the active gate element. In another example, a dummy gate element adjacent to an active gate element contains a dummy fin element that partially breaks the dummy gate element. In another example, a first dummy fin element partially breaks an active gate element and a second dummy fin element partially breaks a dummy gate element. In another example, the dummy fin element is of the same material as the active fin element. In another example, the dummy fin element partially breaks a gate element but does not extend to the substrate like the active fin element. |
| US09653461B2 |
FinFETs with low source/drain contact resistance
An integrated circuit structure includes a semiconductor substrate, insulation regions extending into the semiconductor substrate, with the insulation regions including first top surfaces and second top surfaces lower than the first top surfaces, a semiconductor fin over the first top surfaces of the insulation regions, a gate stack on a top surface and sidewalls of the semiconductor fin, and a source/drain region on a side of the gate stack. The source/drain region includes a first portion having opposite sidewalls that are substantially parallel to each other, with the first portion being lower than the first top surfaces and higher than the second top surfaces of the insulation regions, and a second portion over the first portion, with the second portion being wider than the first portion. |
| US09653458B1 |
Integrated device with P-I-N diodes and vertical field effect transistors
An integrated device includes a substrate, first and second vertical transistors and first and second common epitaxy. The substrate includes an upper surface with first substrate regions doped with a first dopant and second substrate regions doped with a second dopant. The first vertical transistor is operably disposed on the upper surface at a first one of the first substrate regions. The second vertical transistor is operably disposed on the upper surface at a first one of the second substrate regions. The first diode is operably disposed on the upper surface at a second one of the first substrate regions. The second diode is operably disposed on the upper surface at a second one of the second substrate regions. The first common epitaxy is provided for the first vertical transistor and the second diode and the second common epitaxy is provided for the second vertical transistor and the first diode. |
| US09653456B2 |
MIM capacitor formation in RMG module
A method is provided for forming a metal-insulator-metal capacitor in a replacement metal gate module. The method includes providing a gate cap formed on a gate. The method further includes removing a portion of the gate cap and forming a recess in the gate. A remaining portion of the gate forms a first electrode of the capacitor. The method also includes depositing a dielectric on remaining portions of the gate cap and the remaining portion of the gate. The method additionally includes depositing a conductive material on the dielectric. The method further includes removing a portion of the conductive material and portions of the dielectric to expose a remaining portion of the conductive material and a remaining portion of the dielectric. The remaining portion of the conductive material forms a second electrode of the capacitor. The remaining portion of the dielectric forms an insulator of the capacitor. |
| US09653455B1 |
FET—bipolar transistor combination
A transistor switch device is provided that exhibits relatively good voltage capability and relatively easy drive requirements to turn the device on and off. This can reduce transient drive current flows that may perturb other components. |
| US09653454B1 |
Methods for an ESD protection circuit including trigger-voltage tunable cascode transistors
Methods to forming trigger-voltage tunable cascode transistors for an ESD protection circuit in FinFET IC devices and resulting devices. Embodiments include providing a substrate including adjacent first-type well areas, over the substrate, each pair of first-type well areas separated by a second-type well area; providing one or more junction areas in each first and second type well area, each junction area being a first type or a second type; forming fins, spaced from each other, perpendicular to and over the first and second type junction areas; and forming junction-type devices by forming electrical connections between the first and second type junction areas in the first-type well areas and the substrate, wherein a first-stage junction-type device in a first-type well area includes stacked first and second type junction areas, and wherein the first-stage junction-type device is adjacent a second-type well area including first and second type junction areas. |
| US09653453B2 |
Electrostatic discharge protection device
An electrostatic discharge (ESD) protection device is disclosed including at least an NPN transistor and a PNP transistor coupled between a first node and a second node, wherein the ESD protection device may be configured to sink current from the first node to the second node in response to an ESD event. The transistors may be coupled such that a collector of the NPN may be coupled to the first node. A collector of the PNP may be coupled to the second node. A base of the NPN may be coupled to the emitter of the PNP. An emitter of the NPN may be coupled to a base of the PNP. |
| US09653452B2 |
Semiconductor integrated circuit device having an ESD protection circuit
Diffusion regions having the same conductivity type are arranged on a side of a second wiring and a side of a third wiring, respectively under a first wiring connected to a signal terminal. Diffusion regions are separated in a whole part or one part of a range in a Y direction. That is, under first wiring, diffusion regions are only formed in parts opposed to diffusion regions formed under the second wiring and third wiring connected to a power supply terminal or a ground terminal, and a diffusion region is not formed in a central part in an X direction. Therefore, terminal capacity of the signal terminal can be reduced without causing ESD resistance to be reduced, in an ESD protection circuit with the signal terminal. |
| US09653451B2 |
Semiconductor arrangement with protection circuit
A semiconductor arrangement (10) with an electrostatic discharge (ESD) protection circuit is disclosed. The semiconductor arrangement (10) comprises a first semiconductor chip (20a) with a first integrated circuit (25a) and a second semiconductor chip (20b) with a second integrated circuit (25b). The semiconductor arrangement has an ESD protection circuit (30). The first semiconductor chip (20a) is isolated otherwise form the second semiconductor chip (20b) and the first integrated circuit (25a) is connected to the second integrated circuit (25b) exclusively via the ESD protection circuit (30). |
| US09653450B2 |
Electrostatic discharge protection semiconductor device
An ESD protection semiconductor device includes a substrate, a gate set formed on the substrate, a source region and a drain region formed in the substrate respectively at two sides of the gate set, and at least a first doped region formed in the drain region. The source region and the drain region include a first conductivity type, and the first doped region includes a second conductivity type. The first conductivity type and the second conductivity type are complementary to each other. The first doped region is electrically connected to a ground potential. |
| US09653449B2 |
Cascoded semiconductor device
A semiconductor device of an embodiment includes a normally-off transistor having a first source electrically connected to a source terminal, a first drain, and a first gate electrically connected to a gate terminal, a normally-on transistor having a second source electrically connected to the first drain, a second drain electrically connected to a drain terminal, and a second gate, a capacitor having one end electrically connected to the gate terminal and the other end electrically connected to the second gate; and a first diode having a first anode electrically connected to the capacitor and the second gate and a first cathode electrically connected to the first source. |
| US09653444B2 |
Microelectronic die packages with metal leads, including metal leads for stacked die packages, and associated systems and methods
Microelectronic die packages, stacked systems of die packages, and methods of manufacturing them are disclosed herein. In one embodiment, a system of stacked packages includes a first die package having a bottom side, a first dielectric casing, and first metal leads; a second die package having a top side attached to the bottom side of the first package, a dielectric casing with a lateral side, and second metal leads aligned with and projecting towards the first metal leads and including an exterior surface and an interior surface region that generally faces the lateral side; and metal solder connectors coupling individual first leads to individual second leads. In a further embodiment, the individual second leads have an “L” shape and physically contact corresponding individual first leads. In another embodiment, the individual second leads have a “C” shape and include a tiered portion that projects towards the lateral side of the second casing. |
| US09653443B2 |
Thermal performance structure for semiconductor packages and method of forming same
An embodiment device includes a first die, a second die electrically connected to the first die, and a heat dissipation surface on a surface of the second die. The device further includes a package substrate electrically connected to the first die. The package substrate includes a through-hole, and the second die is at least partially disposed in the through hole. |
| US09653442B2 |
Integrated circuit package and methods of forming same
An embodiment package-on-package (PoP) device includes a package structure, a package substrate, and a plurality of connectors bonding the package structure to the package substrate. The package structure includes a logic chip bonded to a memory chip, a molding compound encircling the memory chip, and a plurality of conductive studs extending through the molding compound. The plurality of conductive studs is attached to contact pads on the logic chip. |
| US09653441B1 |
Monolithic integration of a III-V optoelectronic device, a filter and a driving circuit
After forming an opening extending through a (100) silicon layer and a buried insulator layer and into a (111) silicon layer of a semiconductor-on-insulator (SOI) substrate, a light-emitting element is formed within the opening. A portion of the (111) silicon layer located beneath the light-emitting element is patterned to form a patterned structure for tuning light emission characteristics and enhancing efficiency of the light-emitting element. Next, at least one field effect transistor (FET) is formed on the (100) silicon layer for driving the light-emitting element. |
| US09653440B2 |
Optoelectronic component with integrated protection diode and method of producing same
An optoelectronic component includes an optoelectronic semiconductor chip having a first surface on which a first electrical contact and a second electrical contact are arranged, wherein the first surface adjoins a molded body, a first pin and a second pin are embedded in the molded body and electrically conductively connect to the first contact and the second contact, and a protection diode is embedded in the molded body and electrically conductively connect to the first contact and the second contact. |
| US09653431B2 |
Metal to metal bonding for stacked (3D) integrated circuits
The present invention provides a stabilized fine textured metal microstructure that constitutes a durable activated surface usable for bonding a 3D stacked chip. A fine-grain layer that resists self anneal enables metal to metal bonding at moderate time and temperature and wider process flexibility. |
| US09653430B2 |
Semiconductor devices having stacked structures and methods for fabricating the same
Semiconductor devices having stacked structures and methods for fabricating the same are provided. A semiconductor device includes at least one single block including a first semiconductor chip and a second semiconductor chip stacked thereon. Each of the first and second semiconductor chips includes a semiconductor substrate including a through-electrode, a circuit layer on a front surface of the semiconductor substrate, and a front pad that is provided in the circuit layer and is electrically connected to the through-electrode. The surfaces of the semiconductor substrates face each other. The circuit layers directly contact each other such that the semiconductor chips are bonded to each other. |
| US09653428B1 |
Semiconductor package and fabricating method thereof
A semiconductor package structure and a method for making a semiconductor package. As non-limiting examples, various aspects of this disclosure provide various semiconductor package structures, and methods for making thereof, that comprise a connect die that routes electrical signals between a plurality of other semiconductor die. |
| US09653427B2 |
Integrated circuit package with probe pad structure
A package includes a substrate, the substrate having a first side and a second side, the second side being opposite the first side, and a stack of dies on a first side of the substrate. The package further includes a probing pad on the first side of the substrate, the probing pad being electrically coupled to the stack of dies, and a contact pad on the second side of the substrate, the contact pad being electrically coupled to the stack of dies. |
| US09653419B2 |
Microelectronic substrate having embedded trace layers with integral attachment structures
A microelectronic substrate may be formed to have an embedded trace which includes an integral attachment structure that extends beyond a first surface of a dielectric layer of the microelectronic substrate for the attachment of a microelectronic device. In one embodiment, the embedded trace may be fabricated by forming a dummy layer, forming a recess in the dummy layer, conformally depositing surface finish in the recess, forming an embedded trace layer on the dummy layer and abutting the surface finish, and removing the dummy layer. |
| US09653414B2 |
Shielded QFN package and method of making
Consistent with an example embodiment, a semiconductor device comprises a device die having bond pads providing connection to device die circuitry and a QFN half-etched lead frame with a package boundary; the QFN half-etched lead frame has a top-side surface and an under-side surface. The QFN half-etched lead frame includes a sub-structure of I/O terminals and a die attach area, the die attach area facilitating device die attachment thereon and the terminal I/O terminals providing connection to the device die bond pads and additional terminals located about the corners of the sub-structure. An envelope of molding compound encapsulates the device die mounted on the top-side surface of the QFN half-etched lead frame. A RF (radio-frequency) shield layer is on the envelope of the molding compound, the RF shield electrically connected to the additional terminals via conductive connections defined in corresponding locations on the envelope of the molding compound. |
| US09653411B1 |
Electronic package that includes fine powder coating
An electronic package that includes a substrate; an electronic component mounted to a surface of the substrate; and a porous coating that includes grains of metal powder formed onto the electronic component by melting the metal powder onto the electronic component. An electronic package that includes a substrate; an electronic component mounted to a surface of the substrate; and a porous coating that includes grains of metal powder formed onto the substrate by melting the metal powder onto the substrate. An electronic package that includes a substrate; an electronic component mounted to a surface of the substrate; an initial mold covering the electronic component; and a porous coating that includes grains of metal powder formed onto the initial mold by melting the metal powder onto the initial mold. |
| US09653405B2 |
Chip arrangement and a method of manufacturing a chip arrangement
In various embodiments, a chip arrangement may be provided. The chip arrangement may include a metallic carrier. The chip arrangement may also include at least one chip arranged on the metallic carrier, wherein the at least one chip includes a chip contact, wherein the chip contact is electrically coupled to the metallic carrier. The chip arrangement may also include encapsulation material at least partially encapsulating the at least one chip. The chip arrangement may also include an electrically conductive shielding structure formed over at least a portion of the encapsulation material to electrically contact the metallic carrier. |
| US09653403B1 |
Structure and process for W contacts
Structures and processes include a single metallization step for forming a metal nitride liner layer suitable for contact formation. The structure and processes generally includes forming a nitrogen-enriched surface in a deposited metal liner layer or forming a nitrogen-enriched surface in the dielectric material prior to deposition of the metal liner layer. In this manner, nitridization of the metal occurs upon deposition of nitrogen ions into the metal liner layer and/or as a function of additional conventional processing in fabricating the integrated circuit such that the deposited nitrogen ions diffuse into at least a portion of the metal liner layer. As a consequence, only a single metal layer deposition step is needed to form the metal liner layer. |
| US09653396B2 |
Semiconductor device and method of manufacturing the same
A coil CL1 is formed on a semiconductor substrate SB via a first insulation film, a second insulation film is formed so as to cover the first insulation film and the coil CL1, and a pad PD1 is formed on the second insulation film. A laminated film LF having an opening OP1 from which the pad PD1 is partially exposed is formed on the second insulation film, and a coil CL2 is formed on the laminated insulation film. The coil CL2 is disposed above the coil CL1, and the coil CL2 and the coil CL1 are magnetically coupled to each other. The laminated film LF is composed of a silicon oxide film LF1, a silicon nitride film LF2 thereon, and a resin film LF3 thereon. |
| US09653392B2 |
Metallic device having mobile element in a cavity of the BEOL of an integrated circuit
In order, for example, to improve the ohmic contact between two metal pieces located at a metallization level, these two metal pieces are equipped with two offset vias located at the metallization level and at least partially at the via level immediately above. Each offset via comprises, for example, a nonoxidizable or substantially nonoxidizable compound, such as a barrier layer of Ti/TiN. |
| US09653391B1 |
Semiconductor packaging structure and manufacturing method thereof
A semiconductor structure includes a die, a molding interfacing with the die along a first direction, wherein a coefficient of thermal expansion (CTE) mismatch is between the molding and the die, a via extending within and through the molding, an elongated member extending within the molding and at least partially along the first direction, a conductive trace over the elongated member and the die, and a dielectric between the elongated member and the conductive trace, wherein the elongated member is proximal to the die than the via. |
| US09653385B1 |
Lead frame
A lead frame has a metal base, a silver-plated layer, and a silver oxide layer. The silver-plated layer is formed between the metal base and the silver oxide layer. The silver oxide layer has a polar outer surface and a thickness of equal to or more than 1.3 nanometers. The silver oxide layer is beneficial to increase the adhesive strength between the lead frame and the molding compound and avoid delamination of the molding compound from the lead frame, so the lead frame of the present invention can pass a more severe moisture sensitivity level when exposed to the environment. |
| US09653384B2 |
Semiconductor device and method for manufacturing semiconductor device
A semiconductor device is provided with a semiconductor element having a plurality of electrodes, a plurality of terminals electrically connected to the plurality of electrodes, and a sealing resin covering the semiconductor element. The sealing resin covers the plurality of terminals such that a bottom surface of the semiconductor element in a thickness direction is exposed. A first terminal, which is one of the plurality of terminals, is disposed in a position that overlaps a first electrode, which is one of the plurality of electrodes, when viewed in the thickness direction. The semiconductor device is provided with a conductive connection member that contacts both the first terminal and the first electrode. |
| US09653383B2 |
Semiconductor device with thick bottom metal and preparation method thereof
A semiconductor device with thick bottom metal comprises a semiconductor chip covered with a top plastic package layer at its front surface and a back metal layer at its back surface, the top plastic package layer surrounds sidewalls of the metal bumps with a top surface of the metal bumps exposing from the top plastic package layer, a die paddle for the semiconductor chip to mount thereon and a plastic package body. |
| US09653381B2 |
Semiconductor structures and die assemblies including conductive vias and thermally conductive elements and methods of forming such structures
A semiconductor structure comprises conductive vias extending from an active surface of a substrate to a back side of the substrate and surrounded by a dielectric material. The conductive vias are surrounded by recessed isolation structures formed within the back side of the substrate. Conductive elements extend over the conductive vias and laterally over at least portions of the isolation structures. The conductive elements are in electrical contact with the conductive vias and electrically isolated from the substrate by the isolation structures. Thermally conductive elements in contact with the substrate are laterally spaced from the conductive elements. Die assemblies comprising the semiconductor structure, methods of forming the semiconductor structure, and methods of forming the die assemblies are also disclosed. |
| US09653379B2 |
Cooler and semiconductor device having cooler
A cooler for cooling a semiconductor module includes a top plate; a jacket having a side plate and a bottom plate and firmly fixed to the top plate; a refrigerant inflow port through which a refrigerant flows into a space surrounded by the top plate and jacket; a refrigerant outflow port through which the refrigerant flows out from the space; a plurality of fins firmly fixed to the top plate and disposed separately on each of the left and right relative to a main refrigerant path in the jacket to be inclined toward the inflow side of the main refrigerant path; heat transfer pins disposed on the top plate on the refrigerant inflow sides of the fins; and a curved plate-like bimetal valve having one end connected to each respective heat transfer pin and another free end. |
| US09653378B2 |
Heat dissipation solution for advanced chip packages
A solution for dissipating heat generated from high power chip packages, e.g., a fcBGA package, wbBGA package, 2.5D/3D TSV package, PoP, etc. The heat dissipation system may include a high power chip package including a high power chip. A micro-jet may be attached to the high power chip. A micro-pump may be in fluidic communication with the micro-jet. A heat exchanger may be in fluidic communication with the micro-pump. The high power chip package is assembled on the same PCB with the micro-pump and the heat exchanger. |
| US09653377B2 |
Semiconductor device
A semiconductor device includes two or more semiconductor elements, a lead with island portions on which the semiconductor elements are mounted, a heat dissipation member for dissipating heat from the island portions, a bonding layer bonding the island portions and the heat dissipation member, and a sealing resin covering the semiconductor elements, the island portions and a part of the heat dissipation member. The bonding layer includes mutually spaced individual regions provided for the island portions, respectively. |
| US09653375B2 |
Vehicular power conversion device
Semiconductor elements work for power conversion and generate heat. A plurality of heat-radiating fins are juxtaposed at intervals to form a passage in a first axis direction, receive the heat from the semiconductor elements, and expel the heat into the air flowing through the passage. A first protective fin has an end face having an equal length in the juxtaposition direction to and mutually facing the end face on the first axis positive side of at least some of the heat-radiating fins, and extends in the first axis positive direction from that end face. A second protective fin has an end face having an equal length in the juxtaposition direction to and mutually facing the end face on the first axis negative side of at least some of the heat-radiating fins, and extends in the first axis negative direction from that end face. |
| US09653372B2 |
Method for fabricating fan-out wafer level package and fan-out wafer level package fabricated thereby
A method for fabricating a fan-out wafer level package includes disposing a first semiconductor chip on a dummy substrate, forming a mold substrate on the first semiconductor chip and the dummy substrate, removing the dummy substrate to expose the first semiconductor chip, disposing a second semiconductor chip on the exposed first semiconductor chip, forming an insulating layer on the second semiconductor chip, the first semiconductor chip, and the mold substrate, and forming a plurality of redistribution lines that electrically connects the first semiconductor chip and the second semiconductor chip through the insulating layer. |
| US09653362B2 |
Complementary heterogeneous MOSFET using global SiGe substrate and hard-mask memorized germanium dilution for nFET
A method includes providing a substrate that underlies a layer of SiGe; forming a plurality of fins in the layer of SiGe. Each formed fin has a fin shape and fin location preserving hard mask layer on a top surface. The method also includes depositing Si on a first subset of the set of fins in what will be an nFET area; performing a Si—Ge inter-mixing process on the first subset of fins to reduce a concentration of Ge in the first subset while producing a Si—Ge intermix layer; removing the Si—Ge intermix layer leaving the first subset of fins having the reduced concentration of Ge, and forming a second subset of fins in what will be a pFET area. The second subset is also formed from the layer of SiGe and has a greater percentage of Ge than a percentage of Ge in the first subset of fins. |
| US09653356B2 |
Methods of forming self-aligned device level contact structures
One illustrative method disclosed includes, among other things, forming a silicon dioxide etch stop layer on and in contact with a source/drain region and adjacent silicon nitride sidewall spacers positioned on two laterally spaced-apart transistors having silicon dioxide gate cap layers, performing a first etching process through an opening in a layer of insulating material to remove the silicon nitride material positioned above the source/drain region, performing a second etching process to remove a portion of the silicon dioxide etch stop layer and thereby expose a portion of the source/drain region, and forming a conductive self-aligned contact that is conductively coupled to the source/drain region. |
| US09653352B2 |
Methods for forming metal organic tungsten for middle of the line (MOL) applications
Methods for forming metal organic tungsten for middle-of-the-line (MOL) applications are provided herein. In some embodiments, a method of processing a substrate includes providing a substrate to a process chamber, wherein the substrate includes a feature formed in a first surface of a dielectric layer of the substrate; exposing the substrate to a plasma formed from a first gas comprising a metal organic tungsten precursor to form a tungsten barrier layer atop the dielectric layer and within the feature, wherein a temperature of the process chamber during formation of the tungsten barrier layer is less than about 225 degrees Celsius; and depositing a tungsten fill layer over the tungsten barrier layer to fill the feature to the first surface. |
| US09653349B2 |
Semiconductor integrated circuit with nano gap
A method of fabricating a semiconductor integrated circuit (IC) is disclosed. A substrate having a dielectric layer over it is provided. A block co-polymer (BCP) layer is deposited over the dielectric layer. The BCP layer is then annealed to form a first polymer nanostructures surrounded by a second polymer nanostructures over the dielectric layer. The second polymer nanostructure is selectively etched using the first polymer nanostructure as an etch mask to form a nano-block. The dielectric layer is selectively etched using the nano-block as an etch mask to form a nano-trench. The nano-trenched is sealed to form a nano-air-gap. |
| US09653348B1 |
Semiconductor device and manufacturing method thereof
In a method for manufacturing a semiconductor device, a first dielectric layer is formed over a substrate, first recesses are formed in the first dielectric layer. Metal wirings extending is a first direction are formed in the first recesses. A mask layer is formed over the metal wirings and the first dielectric layer, which includes a first opening extending in the first direction and is located above a space between adjacent two metal wirings. A first groove corresponding to the first opening is formed between the adjacent two metal wirings by etching the first dielectric layer using the mask layer as an etching mask. A second dielectric layer is formed so that a first air gap is formed in the first groove. A width of the first opening in a perpendicular direction to the first direction is smaller than a space between the adjacent two metal wirings. |
| US09653346B2 |
Integrated FinFET structure having a contact plug pitch larger than fin and first metal pitch
An integrated circuits structure includes a semiconductor substrate, at least an non-planar field effect transistor (FET) device formed on the semiconductor substrate, and an interconnection structure formed on the semiconductor substrate. The non-planar FET device includes a plurality of fins and a gate electrode. The interconnection structure includes a plurality of first group metals and a plurality of second group metals. The first group metals are formed on the non-planar FET and the second group metals are formed on the first group metals. The first group metals include a first metal pitch and the second group metals include a second metal pitch. The second metal pitch is 1.2-1.5 times to the first metal pitch. |
| US09653344B2 |
Device isolation structure and manufacture method
A method for forming a semiconductor device includes forming a buried doped layer in a semiconductor substrate and forming a plurality of first trenches that expose the buried doped layer. A first dielectric layer is formed covering sidewalls of the first trenches, and a doped polysilicon layer is formed covering side surfaces of the first dielectric layer and bottom portions of the first trenches. The method also includes forming a second trench in each of the plurality of first trenches, each second trench extending through a bottom portion of the doped polysilicon layer and the buried doped layer into a lower portion of the substrate. The method also includes forming a second dielectric layer inside each second trench. An isolation pocket structure is formed that includes the doped buried layer at the bottom and sidewalls that includes the doped polysilicon layer sandwiched between the first and second dielectric layers. |
| US09653341B2 |
Semiconductor structure and manufacturing method thereof
A semiconductor structure includes a die including a first surface, a recess extended from an aperture disposed on the first surface and including a sidewall disposed within the die, and a polymeric member configured for filling and sealing the recess and including a first outer surface and a second outer surface, wherein the first outer surface is interfaced with the sidewall of the recess. |
| US09653337B2 |
Transport arm, transport apparatus and transport method
A transport arm including a holding unit that holds a substrate by vacuum adsorption. The holding unit has an air discharge port and an adsorption member formed so as to surround the air discharge port. The adsorption member is a squeeze packing. |
| US09653336B2 |
Semiconductor device and manufacturing method thereof
An electronic device and a method of making an electronic device. As non-limiting examples, various aspects of this disclosure provide various methods of making electronic devices, and electronic devices made thereby, that utilize a film assist mold process. |
| US09653331B2 |
Single and dual stage wafer cushion
Improvements in a single and dual stage wafer cushion is disclosed where the wafer cushion can use an edge hinge as a single first stage cushion and a second mid span hinge for the dual stage wafer cushion. This dual stage design gives two distinctly different cushioning forces as opposed to using a single stage design where the force is linear with the amount of compression that is being applied to the outer surfaces of the wafer cushion. The outside edge of the ring provides the greatest expansion such that only the outer edge of the ring makes contact with the outer edge of a wafer. The wafer cushion is a material that flexes and absorbs shocks before the shock is transferred to the wafer stack. The material minimizes debris or contaminants from embedding into the wafer cushion and also prevents sheading of material from the wafer cushion. |
| US09653330B1 |
Threshold voltage (VT)-type transistor sensitive and/or fan-out sensitive selective voltage binning
Disclosed are methods for performing threshold voltage (VT)-type transistor sensitive and/or fan-out sensitive selective voltage binning (SVB) to improve SVB accuracy and, thereby product yield and reliability. In the methods, a process distribution for an integrated circuit chip design is divided into process windows, each associated with a corresponding performance range and a corresponding minimum supply voltage. First performance measurements are acquired from first performance monitors associated with first transistors on chips manufactured according to the design. Based on the first performance measurements, the chips are assigned to groups corresponding to the process windows. Second performance measurements are also be acquired from second performance monitors associated with second transistors, which are on the chips and which have either a different VT-type or a different maximum fan-out than the first transistors. Based on the second performance measurements, a determination is made as to whether chip group reassignment is warranted. |
| US09653329B2 |
Semiconductor treating device and method
A semiconductor processing device with bearing means for supporting a plate with one plate plane. The plate has a function region with evenness, a bearing region which surrounds the function region at least in sections, and an action region which is located outside the function region and outside the bearing region. The bearing means is made to support the plate in the bearing region and the action means is controllable such that by deformation of the function region the evenness can be adjusted and/or changed and/or influenced and/or re-set. The action means comprise at least one vacuum region which allows a deformation of the plate in the bearing region. |
| US09653326B2 |
Method of cleaning, method of manufacturing semiconductor device, substrate processing apparatus, and recording medium
A method of cleaning an interior of a process chamber by supplying a cleaning gas into the process chamber after a process of forming a thin film on a substrate in the process chamber is performed, including alternately repeating changing a pressure in the process chamber from a first pressure range to a second pressure range, and changing the pressure in the process chamber from the second pressure range to the first pressure range. In this method, when the pressure in the process chamber is changed to the first pressure range, the pressure in the process chamber is changed to the first pressure range without being maintained at the second pressure range, and when the pressure in the process chamber is changed to the second pressure range, the pressure in the process chamber is changed to the second pressure range without being maintained at the first pressure range. |
| US09653320B2 |
Methods for etching a hardmask layer for an interconnection structure for semiconductor applications
Embodiments of the present disclosure provide methods for patterning a hardmask layer disposed on a metal layer, such as a copper layer, to form an interconnection structure in semiconductor devices. In one embodiment, a method of patterning a hardmask layer on a metal layer disposed on a substrate includes supplying a first etching gas mixture comprising a carbon-fluorine containing gas and a chlorine containing gas into a processing chamber to etch a portion of a hardmask layer disposed on a metal layer formed on a substrate, supplying a second etching gas mixture comprising a hydrocarbon gas into the processing chamber to clean the substrate, and supplying a third etching gas mixture comprising a carbon-fluorine containing gas to remove a remaining portion of the hardmask layer until a surface of the metal layer is exposed. |
| US09653315B2 |
Methods of fabricating substrates
A method of fabricating a substrate includes forming spaced first features over a substrate. An alterable material is deposited over the spaced first features and the alterable material is altered with material from the spaced first features to form altered material on sidewalls of the spaced first features. A first material is deposited over the altered material, and is of some different composition from that of the altered material. The first material is etched to expose the altered material and spaced second features comprising the first material are formed on sidewalls of the altered material. Then, the altered material is etched from between the spaced second features and the spaced first features. The substrate is processed through a mask pattern comprising the spaced first features and the spaced second features. Other embodiments are disclosed. |
| US09653314B2 |
Semiconductor device and manufacturing method thereof
A semiconductor device according to the present embodiment includes a plurality of wires. A plurality of wire drawing pads are provided correspondingly to the wires and electrically connecting a plurality of contacts to the wires, respectively. First space portions widen toward a first direction from the wires to the wire drawing pads and are located between adjacent ones of the wire drawing pads in a connection region between the wires and the wire drawing pads. Second space portions are provided at edge portions of the wire drawing pads. Air gaps or insulating layers are provided in the first space portions and the second space portions. |
| US09653312B2 |
Sealing structure for a bonded wafer and method of forming the sealing structure
A method of forming a sealing structure for a bonded wafer is provided. The method includes providing the lower wafer and the upper wafer, forming a sealing material layer on each of the lower wafer and the upper wafer, forming a mask layer on the sealing material layer on each of the lower wafer and the upper wafer, etching the sealing material layer using the mask layer as an etch mask, so as to form a first protrusion at an edge of the lower wafer and a second protrusion at an edge of the upper wafer, and bonding the first protrusion and the second protrusion together to form the sealing structure. The sealing structure encloses a gap between the lower wafer and the upper wafer at an edge of the bonded wafer, so as to form a hermetically sealed cavity at the edge of the bonded wafer. |
| US09653311B1 |
3D NAND staircase CD fabrication utilizing ruthenium material
Embodiments of the present disclosure provide an apparatus and methods for forming stair-like structures with accurate profiles and dimension control for manufacturing three dimensional (3D) stacked semiconductor devices. In one embodiment, a method of forming stair-like structures on a substrate includes forming a film stack including a dielectric layer and a ruthenium containing material, and etching the ruthenium containing material in the film stack exposed by a patterned photoresist layer utilizing a first etching gas mixture comprising an oxygen containing gas. |
| US09653309B2 |
Method for fabrication of high aspect ratio trenches and formation of nanoscale features therefrom
A process for forming trenches in a target material includes forming a masking layer onto the target material, where the masking layer comprises a material having high selectivity to a plasma etch gas adapted for etching the target material. A pattern is formed in the masking layer to expose portions of the target material and the sample is placed on an angle mount at a pre-determined angle relative to a cathode of a reactive ion etcher so that the target material is within a plasma dark space of the plasma etch gas. Ballistic ions within the plasma dark space form a trench structure within the target material. The process may further include repeating the steps of positioning the sample and etching the exposed portions of the target material with the substrate at a different angle to define a triangular structure. |
| US09653304B2 |
Semiconductor device and method of manufacturing semiconductor device
A method of manufacturing a semiconductor device includes forming a first gate member on a semiconductor substrate through a gate insulating film, forming a spacer on the first gate member, flattening a surface of the spacer, forming a first gate by partially etching the first gate member using the spacer as a mask, forming a second gate member so as to cover the first gate and the spacer having the flattened surface, forming a first insulating film on a surface of the second gate member, and forming a second gate by causing the second gate member to retreat while removing the first insulating film by etching. |
| US09653303B2 |
Method of manufacturing semiconductor device
In one embodiment, a method of manufacturing a semiconductor device includes forming a structure in which first to N-th insulating layers and first to N-th metal layers are alternately provided on a substrate where N is an integer of two or more. The method further includes processing the first insulating layer. The method further includes forming a first film on a side face of the first insulating layer, the first film containing a first reaction product generated by processing the first insulating layer. The method further includes processing the first metal layer under the first insulating layer, and the second insulating layer under the first metal layer by using the first film as a mask. |
| US09653302B2 |
Gate structure with multiple spacer and method for manufacturing the same
A semiconductor structure and a method for forming the same are provided. The semiconductor structure includes a substrate and a floating gate structure formed over the substrate. The semiconductor structure further includes a dielectric structure formed over the floating gate structure and a control gate structure formed over the dielectric structure. The semiconductor structure further includes a first spacer formed over a lower portion of a sidewall of the control gate structure and an upper spacer formed over an upper portion of the sidewall of the control gate structure. In addition, a portion of the control gate structure is in direct contact with the upper spacer. |
| US09653297B2 |
Method of manufacturing silicon carbide semiconductor device by forming metal-free protection film
A method of manufacturing a silicon carbide semiconductor device includes a step of preparing a silicon carbide substrate having a first main surface and a second main surface located opposite to the first main surface, a step of forming a doped region in the silicon carbide substrate by doping the first main surface with an impurity, a step of forming a first protecting film on the doped region at the first main surface, and a step of activating the impurity included in the doped region by annealing with the first protecting film having been formed, the step of forming a first protecting film including a step of disposing a material which will form the first protecting film and in which the concentration of a metal element is less than or equal to 5 μg/kg on the first main surface. |
| US09653296B2 |
Method for processing a semiconductor device and semiconductor device
A method for processing a semiconductor device in accordance with various embodiments may include: depositing a first metallization material over a semiconductor body; performing a heating process so as to form at least one region in the semiconductor body including a eutectic of the first metallization material and material of the semiconductor body; and depositing a second metallization material over the semiconductor body so as to contact the semiconductor body via the at least one region in the semiconductor body. |
| US09653295B1 |
Method of manufacturing a static random access memory
In a method of manufacturing an SRAM, first dummy patterns are formed over a substrate, on which a first to a third mask layer are formed. Intermediate dummy patterns are formed on sidewalls of the first dummy patterns. The first dummy patterns are removed, thereby leaving the intermediate dummy patterns. The third mask layer is patterned by using the intermediate dummy patterns, by which the second mask layer is patterned, thereby forming second dummy patterns. Sidewall spacer layers are formed on sidewalls of the second dummy patterns. The second dummy patterns are removed, thereby leaving the sidewall spacer layers as hard mask patterns over the substrate, by which the first mask layer is patterned. The substrate is patterned by using the patterned first mask layer. Each of the plurality of SRAM cells is defined by a cell boundary, within which only two first dummy patterns are included. |
| US09653288B1 |
Method of forming ultra-thin nanowires
Provided is a method of forming a nanowire-based device. The method includes forming a first mask layer over a substrate; forming a first opening in the first mask layer; growing a first nanowire that protrudes through the first opening in the first mask layer, wherein the first nanowire has a first diameter; removing the first mask layer; oxidizing a sidewall of the first nanowire; etching the oxidized sidewall of the first nanowire; forming a second mask layer overlaying the substrate; removing the first nanowire thereby forming a second opening in the second mask layer; and growing a second nanowire that protrudes through the second opening in the second mask layer, wherein the second nanowire has a second diameter and the second diameter is different than the first diameter. |
| US09653287B2 |
S/D connection to individual channel layers in a nanosheet FET
A field effect transistor (FET) and a method to form the FET are disclosed. The FET comprises a channel region comprising a nanosheet layer/sacrificial layer stack. The stack comprises at least one nanosheet layer/sacrificial layer pair. Each nanosheet layer/sacrificial layer pair comprises an end surface. A conductive material layer is formed on the end surface of the pairs, and a source/drain contact is formed on the conductive material layer. In one embodiment, the sacrificial layer of at least one pair further may comprise a low-k dielectric material proximate to the end surface of the pair. A surface of the low-k dielectric material proximate to the end surface of the pair is in substantial alignment with the end surface of the nanosheet layer. Alternatively, the surface of the low-k dielectric material proximate to the end surface of the pair is recessed with respect to the end surface of the nanosheet layer. |
| US09653285B2 |
Double aspect ratio trapping
A semiconductor structure is provided by a process in which two aspect ratio trapping processes are employed. The structure includes a semiconductor substrate portion of a first semiconductor material having a first lattice constant. A plurality of first semiconductor-containing pillar structures of a second semiconductor material having a second lattice constant that is greater than the first lattice constant extend upwards from a surface of the semiconductor substrate portion. A plurality of second semiconductor-containing pillar structures of a third semiconductor material having a third lattice constant that is greater than the first lattice constant extend upwards from another surface of the semiconductor substrate portion. A spacer separates each first semiconductor-containing pillar structure from each second semiconductor-containing pillar structure. Each second semiconductor-containing pillar structure has a width that is different from a width of each first semiconductor-containing pillar structure. |
| US09653282B2 |
Silicon-containing substrate cleaning procedure
A method for cleaning a substrate, such as a silicon substrate, a silicon-germanium substrate, or other silicon-containing substrate is disclosed. The method includes exposing the substrate to a first plasma configured to attack a sub-oxide on the substrate. The method also includes exposing the substrate to a second plasma configured to attack the native oxide on the substrate. The method further includes exposing the substrate to a gas containing at least one of molecular chlorine or a chlorine compound. The gas may be configured to remove at least some of the remaining native oxide and sub-oxide. After the cleaning process, the substrate may be further processed. Further processing steps may include, for example, an epitaxial growth process. An epitaxial growth process performed on a substrate cleaned according to the methods disclosed herein will exhibit few defects. |
| US09653279B2 |
Device allowing improved reaction monitoring of gas phase reactions in mass spectrometers using an auto ejection ion trap
A collision or reaction device for a mass spectrometer is disclosed comprising a first device arranged and adapted to cause first ions to collide or react with charged particles and/or neutral particles or otherwise dissociate so as to form second ions. A second device is arranged and adapted to apply a broadband excitation with one or more frequency notches to the first device so as to cause the second ions and/or ions derived from the second ions to be substantially ejected from the collision or reaction region. The collision or reaction device further comprises a device arranged and adapted to determine the time when the second ions and/or ions derived from the second ions are substantially ejected from the first device. |
| US09653268B2 |
Inspection method of vitreous silica crucible
A method of manufacturing a vitreous silica crucible includes an inspection method comprising: a measurement step of measuring an infrared absorption spectrum or a Raman shift of a measurement point on an inner surface of the vitreous silica crucible; a determining step of predicting whether a surface defect region is generated or not in the measurement point based on an obtained spectrum to determine a quality of the vitreous silica crucible. |
| US09653262B2 |
Method of measuring beam position of multi charged particle beam, and multi charged particle beam writing apparatus
A method of measuring beam positions of multi charged particle beams includes acquiring a number of multi charged particle beams needed for the measurement reproducibility of a current amount to be within the range of an allowable value. The method further includes setting measurement points depending on a desired dimensional accuracy value in an irradiation region irradiated by the whole of the multi charged particle beams, and setting, for each of a plurality of measurement points, a beam region, including a measurement point of measurement points irradiated by a plurality of beams whose number is the number of beams needed for the measurement reproducibility in the multi charged particle beams. Further, the method includes measuring, for each of a plurality of measurement points, the position of a measurement point concerned in a plurality of measurement points by using a plurality of beams of a corresponding beam region. |
| US09653260B2 |
High throughput TEM preparation processes and hardware for backside thinning of cross-sectional view lamella
A method for TEM sample preparation and analysis that can be used in a FIB-SEM system without re-welds, unloads, user handling of the lamella, or a motorized flip stage. The method allows a dual beam FIB-SEM system with a typical tilt stage to be used to extract a sample to from a substrate, mount the sample onto a TEM sample holder capable of tilting, thin the sample using FIB milling, and rotate the sample so that the sample face is perpendicular to an electron column for STEM imaging. |
| US09653255B2 |
Scanning particle microscope having an energy selective detector system
The disclosure provides a scanning particle beam microscope for inspecting an object. The scanning particle beam microscope includes a particle optical system having an objective lens. The microscope further includes a detector system having a particle optical detector component configured to generate an electrostatic field in the beam path of particles emitted from the object. The detector system is configured to spatially filter the emitted particles after the emitted particles have passed through the electrostatic field and to detect a portion of the filtered emitted particles. The particle optical detector component is configured such that the spatial filtering filters the emitted particles according to a kinetic energy of the emitted particles. |
| US09653254B2 |
Particle-optical systems and arrangements and particle-optical components for such systems and arrangements
The present invention concerns a charged-particle multi-beamlet system that comprises a source of charged particles (301); a first multi-aperture plate (320) having plural apertures disposed in a charged particle beam path of the system downstream of the source; a first multi-aperture selector plate (313) having plural apertures; a carrier (340), wherein the first multi-aperture selector plate is mounted on the carrier; and an actuator (350) configured to move the carrier such that the first multi-aperture selector plate is disposed in the charged particle beam path of the system downstream of the source in a first mode of operation of the system, and such that the first multi-aperture selector plate is disposed outside of the charged particle beam path in a second mode of operation of the system. The source, the first multi-aperture plate and the carrier of the system are arranged such that a first number of charged particle beamlets is generated at a position downstream of both the first multi-aperture plate and the first multi-aperture selector plate in the first mode of operation, and that a second number of charged particle beamlets is generated at the position in the second mode of operation, wherein the first number of beamlets differs from the second number of beamlets. |
| US09653252B2 |
X-ray generating tube, X-ray generating apparatus and X-ray imaging system using the same
Provided is an X-ray generating tube with improved withstand voltage property by a simple structure, the X-ray generating tube including a cathode connected to one opening of an insulating tube and an anode connected to the other opening, in which a resistive film having a lower sheet resistance value than that of the insulating tube is disposed on an outer periphery of the insulating tube, and the cathode and the anode are electrically connected to each other via the resistive film. |
| US09653251B2 |
X-ray apparatus and a CT device having the same
The present application provides an external thermionic cathode distributed x-ray apparatus, including a vacuum box which is sealed at its periphery, where the interior thereof is high vacuum; a plurality of electron transmitting units arranged in a linear array and installed on the side wall of the vacuum box, where each electron transmitting unit is independent to each other; an anode installed in the center inside the vacuum box, where in the direction of length, the anode is parallel to the orientation of the electron transmitting unit, and in the direction of width, the anode has a predetermined angle with respect to the plane of the electron transmitting unit; a power supply and control system having a high voltage power supply and a focusing power supply; and a transmitting control means and a control system. |
| US09653248B2 |
X-ray tube
According to one embodiment, an X-ray tube includes an anode target, a cathode including a filament and a convergence electrode which includes a groove portion, and an envelope. The groove portion includes a pair of first bottom surfaces which are located in the same plane as the filament and between which the filament is interposed in a width direction of the groove portion, and a pair of second bottom surfaces between which the filament and the pair of first bottom surfaces are interposed in a length direction of the groove portion and which are located closer to an opening of the groove portion than the pair of first bottom surfaces. |
| US09653244B1 |
Lockout relay device
This disclosure relates to various embodiments of lockout relay devices. In one embodiment, a lockout relay device may transition between a closed position and a lockout position in response to an action of a deck device. The lockout relay may further be configured to transition from the lockout position to the closed position only in response to one of a manual adjustment and a reset operation. A manual actuator may permit a manual transition of the lockout relay device from the closed position to the lockout position and from the lockout position to the closed position. A lockout mechanism may be configured to cause the lockout relay device to transition to the lockout position in response to the force generated by the deck device. The lockout relay device may remain in the lockout position until the occurrence of one of a manual adjustment and a reset operation. |
| US09653243B2 |
Separating unit with electromagnetic drive
A mechanical circuit breaker unit for interrupting a line includes a contact arrangement and an electromagnetic drive. The contact arrangement has first and second fixed contacts and a guided moving contact. The electromagnetic drive moves the moving contact. The separating unit can assume a first state and a second state. No electric connection exists between the first and second fixed contacts in the first state. The moving contact electrically connects the two fixed contacts to each other in the second state. The separating unit can be transferred from the second state into the first state by moving the moving contact. The second fixed contact has a recess for receiving the moving contact, and the moving contact engages at least partly into the recess when the separating unit is in the first state. |
| US09653240B2 |
Circuit breaker and safety circuit and secondary battery circuit including the same
A circuit breaker 1 comprises: a fixed-contact piece 2 with a fixed contact 21; a movable-contact piece 4 with a movable contact 41; a thermal actuator element 5 thermally transformable to move the movable-contact piece; a PTC thermistor 6 for conducting electricity between the movable-contact piece 4 and the fixed-contact piece 2; a main body 71 of a package provided with a holding recess 73 housing the above-mentioned components; and a cover 81 hermetically covering the holding recess 73. The fixed-contact piece 2 is embedded between an internal wall 74 and an external wall 75 of the main body 71. The PTC thermistor 6 is housed in an opened hollow 73d. In a planar view of the circuit breaker, a through-hole 76 penetrating through the external wall 75 overlaps with the opened hollow 73d, but does not overlap with the centroid O of the opened hollow 73d. |
| US09653239B2 |
Wear-resistant material, method for producing the same, puffer cylinder and puffer-type gas circuit breaker
The present invention includes a wear-resistant material including: a base material formed of pure aluminum or an aluminum alloy having a projection, and a depression in a pit-like shape on a surface thereof; and a coat including a dehydrate of a hydrated oxide of aluminum, the coat being formed on a surface of the base material. Further, the present invention including a method for producing a wear-resistant material including the steps of: forming a hydrated oxide coat of aluminum on a surface of the base material by a chemical conversion coating; and heating the hydrated oxide coat. Further, the present invention also includes a puffer cylinder and a puffer-type gas circuit breaker applied to the above wear-resistant material. |
| US09653234B2 |
Multidirectional switch
There is provided a multidirectional switch in which, when a knob in a neutral position is operated to be tilted with respect to a reference axis at the time the knob is in the neutral position, a pressing part positioned in an operating direction side of the knob moves in an axial direction of the reference axis to selectively close a switch element corresponding to the moved pressing part. The switch element and the pressing part respectively comprise four switch elements and four pressing parts that are respectively provided at intervals each having 90 degrees in the circumferential direction around the reference axis, and one pressing part is connected to another pressing part adjacent thereto in the circumferential direction around the reference axis by a flexible connecting element formed in a wave shape as viewed in a radial direction of the reference axis. |
| US09653232B2 |
Electrical rotary switch with closing elements at stationary contact locations inhibiting spark discharge and/or with a locking spring member
A rotary electrical switch comprises a housing having a first rotary contact space for accommodating a rotary contact and a plurality of stationary contact spaces for selectively accommodating at least one stationary contact. The housing comprises one or more closing elements for closing one or more of the stationary contact spaces not in use for accommodating a stationary contact. Another aspect comprises a locking spring member having a first portion being a resilient spring member configured for releasably engaging a locking member, while a second portion is configured for mechanically coupling to a spindle portion for imparting a rotational force on at least one rotary contact of the switch. |
| US09653229B2 |
Electronic device
A portable electronic device includes a casing with a casing pivotal portion and a key device. The key device is installed on the casing and includes a button cap. The button cap includes a cap pivotal portion, a first cap body and a second cap body. The cap pivotal portion is pivoted to the casing pivotal portion. The first cap body extends from the cap pivotal portion along a first axis. The second cap body extends from the first cap body along a second axis. The button cap rotates in an activating direction when the first cap body is applied by an external force along the first axis or when the second cap body is applied by the external force along the second axis. |
| US09653226B2 |
Power shutoff device
A power shutoff device includes: a fuse to shut off conduction between the input portion connected to a power source side and the output portion connected to a load side; a box having a first face side with the input portion, the output portion, and the fuse to be assembled thereon; and a lock portion to fix one of the input portion and the output portion to the box. The one of the input portion and the output portion is integrally provided to the fuse. The other of the input portion and the output portion includes a first terminal portion integrally provided to the fuse and fixed to the box via a bolt, and a second terminal portion separately provided from the fuse and connected to the first terminal portion via a connecting member being attachable and detachable on a second face side of the box. |
| US09653224B2 |
Interruption apparatus employing actuator having movable engagement element
An improved interruption apparatus includes a plurality of poles, with each of the poles including an actuator. In one embodiment, the actuator can be a fuse having a movable engagement element, and in another embodiment the actuator can be an electric coil that is operable to move a movable engagement element. The interruption apparatus has a single trip unit, and the engagement element of any actuator can actuate the trip unit to move all of the poles from a CLOSED state to an OPEN state. |
| US09653222B2 |
Contact device, and electromagnetic switch in which the contact device is used
A contact device includes a pair of fixed contacts fixedly disposed inside an arc extinguishing chamber and maintaining a predetermined interval from each other; a movable contact disposed inside the arc extinguishing chamber, and contacting to and separating from the pair of fixed contacts; a first arc root movement promotion portion formed on the pair of fixed contacts, and promoting a movement of a root of an arc in a direction away from the movable contact, the arc being generated when contacts are opened in which the movable contact moves away from the pair of fixed contacts; and a second arc root movement promotion portion formed on the movable contact, and promoting a movement of the root of the arc in a direction away from the relevant fixed contact. |
| US09653216B2 |
Sealing element and wound-type solid state electrolytic capacitor thereof
A sealing element of the instant disclosure includes a cover body, an exterior convex portion, and an interior convex portion. The cover body has a first surface, a second surface arranged opposite to the first surface, and a pair of terminal holes formed on the cover body and extending through the first and second surfaces. The exterior convex portion has at least one first abutting surface arranged on the first surface of the cover body and an expansion space formed concavely in the exterior convex portion. The interior convex portion has at least one second abutting surface arranged on the second surface of the cover body. Specifically, the sealing element is configured to prevent the capacitor element from swaying, so that the electrical property of the wound-type solid state electrolytic capacitor with the sealing element can be improved. |
| US09653211B2 |
Conductive paste, electronic component and method for manufacturing electronic component
A conductive paste includes a metal powder, a glass frit containing a Si component, and an organic vehicle. The metal powder has a flat shape with a ratio a/b of a maximum length a to a maximum thickness b of 2.5 or more, a molar content of SiO2 in the glass frit is 36 to 59 percent by mole, and a volume content of the glass frit is 6 to 11 percent by volume. In external electrodes of a multilayer ceramic capacitor using this conductive paste, the molar content of SiO2 in a glass phase is 38 to 60 percent by mole, and an occupation rate of the glass phase is 30% to 60% on the area ratio, and a maximum length c of the glass phase is 5 μm or less. |
| US09653206B2 |
Wireless power charging pad and method of construction
Systems, methods and apparatus for a wireless power transfer are disclosed. In one aspect a wireless power transfer apparatus is provided. The apparatus includes a casing. The apparatus further includes an electrical component housed within the casing. The apparatus further includes a sheath housed within the casing. The apparatus further includes a conductive filament housed within the sheath. The electrical component is electrically connected with the conductive filament. The casing is filled with a settable fluid bound with the sheath to form a structural matrix. |
| US09653198B2 |
Permanent magnet and manufacturing method thereof, and motor and generator using the same
In one embodiment, a permanent magnet includes a composition represented by RpFeqMrCusCo100-p-q-r-s (R: rare earth element, M: at least one element selected from Zr, Ti and Hf, 10≦p≦13.5 atomic %, 28≦q≦40 atomic %, 0.88≦r≦7.2 atomic %, 4≦s≦13.5 atomic %), and a metallic structure in which a composition region having an Fe concentration of 28 mol % or more is a main phase. A Cu concentration in the main phase is 5 mol % or more. |
| US09653196B2 |
Electricity transmission cooling system
A cooling system includes a first section of high temperature superconducting (HTS) cable configured to receive a first flow of coolant and to permit the first flow of coolant to flow therethrough. The system may further include a second section of high temperature superconducting (HTS) cable configured to receive a second flow of coolant and to permit the second flow of coolant to flow therethrough. The system may further include a cable joint configured to couple the first section of HTS cable and the second section of HTS cable. The cable joint may be in fluid communication with at least one refrigeration module and may include at least one conduit configured to permit a third flow of coolant between said cable joint and said at least one refrigeration module through a coolant line separate from said first and second sections of HTS cable. Other embodiments and implementations are also within the scope of the present disclosure. |
| US09653195B2 |
Shielded electrical cable
A shielded electrical cable includes conductor sets extending along a length of the cable and spaced apart from each other along a width of the cable. First and second shielding films are disposed on opposite sides of the cable and include cover portions and pinched portions arranged such that, in transverse cross section, the cover portions of the films in combination substantially surround each conductor set. An adhesive layer bonds the shielding films together in the pinched portions of the cable. A transverse bending of the cable at a cable location of no more than 180 degrees over an inner radius of at most 2 mm causes a cable impedance of the selected insulated conductor proximate the cable location to vary by no more than 2 percent from an initial cable impedance measured at the cable location in an unbent configuration. |
| US09653194B2 |
Low resistance insert
A conductive insert which provides a low resistance bond between low conductive materials. The insert includes a first surface and an oppositely facing second surface. A plurality of openings extends between the first surface and the second surface. At least one first projection extends from the first surface proximate respective first openings, the at least one first projections extend from the first surface in a direction away from the second surface. At least one second projection extends from the second surface proximate respective second openings, the at least one second projections extend from the second surface in a direction away from the first surface. |
| US09653193B2 |
Coating method and coating for a bearing component
A coating method for producing an electrically insulating coating on a bearing component, wherein, in a first step, a substance mixture comprising at least a) a silane and/or siloxane compound, b) a metal alcoholate, and c) PEEK and/or PTFE in the form of a dispersion is applied to the bearing component and, in a second step, is solidified on the component surface by means of a laser beam. |
| US09653188B2 |
Fabrication method of burnable absorber nuclear fuel pellets and burnable absorber nuclear fuel pellets fabricated by the same
A fabrication method of burnable absorber nuclear fuel pellets and burnable absorber nuclear fuel pellets fabricated by the same are provided, in which the fabrication method includes adding boron compound and manganese compound to one or more type of nuclear fuel powders selected from the group consisting of uranium dioxide (UO2), plutonium dioxide (PuO2) and thorium dioxide (ThO2) and mixing the same (step 1), compacting the mixed powder of step 1 into compacts (step 2), and sintering the compacts of step 2 under hydrogen atmosphere (step 3). According to the fabrication method, sintering can be performed under hydrogen atmosphere at a temperature lower than the hydrogen atmosphere sintering that is conventionally applied in the nuclear fuel sintered pellet mass production, by adding sintering additives such as manganese oxide or the like. |
| US09653187B2 |
Standing wave nuclear fission reactor and methods
Disclosed embodiments include nuclear fission reactor cores, nuclear fission reactors, methods of operating a nuclear fission reactor, and methods of managing excess reactivity in a nuclear fission reactor. |
| US09653186B2 |
Memory-testing device and memory-testing method
A memory-testing device for testing a memory is provided. The memory-testing device includes a testing circuitry and a register. The testing circuitry is coupled to the memory for testing performance of the memory. The register is coupled to the testing circuitry and inputted by a testing clock signal, wherein the testing clock signal is different from an original clock signal of the memory and/or the testing circuitry. The testing clock signal is utilized for adjusting the time when the memory-testing device latches data from the memory to decrease a timing slack of the memory-testing device. |
| US09653185B2 |
Reducing error correction latency in a data storage system having lossy storage media
In at least one embodiment, a read operation in a data storage system having lossy storage media includes fetching target data of the read operation from a lossy storage device into a buffer, transferring the target data from the buffer to an external controller external to the lossy storage device via a communication bus, performing error location processing on the target data during the transferring of the target data, communicating error location information regarding at least one error location to error repair logic via the communication bus, the error repair logic repairing the at least one error in the target data using the error location information, and the external controller causing the target data as repaired to be transmitted toward a destination. By deserializing the suboperations comprising the read operation, read latency can be reduced. |
| US09653179B2 |
Shift register, driving method and gate driving circuit
Embodiments of the disclosure provide a shift register, a driving method and a gate driving circuit. In an embodiment, the shift register includes: a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a seventh transistor, an eighth transistor, a ninth transistor, a first storage capacitor and a second storage capacitor. The shift register is driven by the cooperation of the respective transistors. In the case that the shift register is applied in the gate driving circuit to implement a line-by-line scanning, shift registers corresponding to two adjacent pixel rows are cascaded directly and no inverters are provided following the shift registers corresponding to the respective pixel rows, thereby decreasing the number of transistors in the gate driving circuit, reducing the layout area of the gate driving circuit, and being advantageous for narrowing the border. |
| US09653171B2 |
Partial page memory operations
Apparatuses may include a memory block with strings of memory cells formed in a plurality of tiers. The apparatus may further comprise access lines and data lines shared by the strings, with the access lines coupled to the memory cells corresponding to a respective tier of the plurality of tiers. The memory cells corresponding to at least a portion of the respective tier may comprise a respective page of a plurality of pages. Subsets of the data lines may be mapped into a respective partial page of a plurality of partial pages of the respective page. Each partial page may be independently selectable from other partial pages. Additional apparatuses and methods are disclosed. |
| US09653168B2 |
Nonvolatile memory device and a method of operating the nonvolatile memory device
A method of programming a nonvolatile memory device includes: applying a first voltage to a first wordline of the nonvolatile memory device; and applying a second voltage to a second wordline of the nonvolatile memory device, wherein the second voltage is greater than the first voltage; decreasing the first voltage; decreasing the second voltage, wherein a difference between the first voltage and the second voltage is maintained for a predetermined time; and discharging the second voltage. |
| US09653166B2 |
In-memory computational device
A computing device includes a memory array built of several sections having memory cells arranged in rows and column, at least one cell in each column of the memory array being connected to a bit line; and at least one multiplexer to connect a bit line in a first column of a first section to a bit line in a second column in a second section different from the first section, where the second column is not continuous with the first column ; and a decoder to activate at least two word lines of the first section and a word line connected to a cell in the second column in the second section to write a bit line voltage associated with a result of a logical operation performed on the first column into the cell in the second column. |
| US09653164B2 |
Method for integrating non-volatile memory cells with static random access memory cells and logic transistors
A method of making a semiconductor device is described. The method comprises depositing a first polysilicon layer in a non-volatile memory (NVM) region and a logic region of a substrate. A first coating layer is deposited over the first polysilicon layer. The first coating layer and the first polysilicon layer are patterned to form a first gate in the NVM region. A memory cell is formed including the first gate. The first coating layer and the first layer of polysilicon in the logic region are removed and a logic gate polysilicon layer is deposited. The logic gate polysilicon layer is patterned to form a second gate in the logic region while the logic gate polysilicon layer is removed from the NVM region. Source/drain regions of the memory cell and the second gate are implanted concurrently. |
| US09653161B2 |
Tamper-resistant non-volatile memory device comprising an arithmetic circuit that, in operation, calculates a binary reference value based on at least a part of the pieces of resistance value information, a read circuit that, in operation, selectively assigns, based on the binary reference value, one of two values to each of the pieces of resistance value information, and a write circuit that, in operation, performs a write operation corresponding to one of the two values among memory cells
A non-volatile memory device includes a memory cell array including memory cells, each having a resistance value reversibly transitioning among resistance value ranges, a read circuit that, in operation, obtains pieces of resistance value information each relating to the resistance value of one of the memory cells, an arithmetic circuit that, in operation, calculates a binary reference value based on at least a part of the pieces of resistance value information, and a write circuit. In operation, the read circuit selectively assigns, based on the binary reference value, one of two values to each of the pieces of resistance value information. In operation, the write circuit performs a first write operation on a memory cell corresponding to one of the two values among the memory cells. |
| US09653158B2 |
Light incident angle controllable electronic device and manufacturing method thereof
Disclosed herein is a method of changing characteristics of an electronic device, including the steps of: applying light to an electronic device through a plurality of media having different refractive indexes from each other, the electrical characteristics of the electronic device being changed depending on the amount of incident light; and changing an incident angle of light applied the electronic device to adjust the amount of incident light. There is provided a method of providing light incident angle dependency by a simple procedure of accumulating additional media in various electronic devices. In the method, the light incident angle selectivity of the electronic device can be maintained even when the inclination angle of the device is changed depending on the axis parallel to the incident direction of light even though the incident direction thereof is fixed. This means that the performance of the device can be controlled only by changing the inclination angle of the device without greatly changing the dynamic state of the device. Further, since the movement speed of photons is higher than that of electrons and the signal interference of photons is lower than that of electrons, an additional effect of increasing the operating speed of the device or decreasing the size of the device can be expected. |
| US09653157B1 |
Memory system and operating method thereof
A memory system includes a memory device including a plurality of memory blocks, each memory block including a plurality of word lines, each word line being coupled to a plurality of memory cells, and a controller suitable for grouping the word lines into a plurality of word line groups, wherein when receiving a read command for data stored in a first memory block, the controller performs a read operation for word lines of the first memory block, checks for read fail word lines in the word lines of the first memory block, checks for word line groups including the read fail word lines, and transmits a set command corresponding to the read fail word lines to the word line groups which contain read fail word lines. |
| US09653156B2 |
Memory controller, nonvolatile semiconductor memory device and memory system
According to one embodiment, a memory system includes a nonvolatile semiconductor memory and a memory controller. The memory controller has a first signal generation section that generates a first signal related with a read voltage used for read operation of the nonvolatile semiconductor memory, a second signal generation section that generates a second signal that specifies the temperature coefficient used for the correction for temperature of the read voltage, and a first interface section that outputs the first signal, the second signal and a read command. The nonvolatile semiconductor memory has a word line, a memory cell array includes memory cells connected to the word line, and a second interface section that receives the first signal, the second signal and the read command. |
| US09653149B2 |
Complementary bipolar SRAM
A complementary lateral bipolar SRAM device and method of operating. The device includes: a first set and second set of lateral bipolar transistors forming a respective first inverter device and second inverter device, the first and second inverter devices being cross-coupled for storing a logic state. In each said first and second set, a first bipolar transistor is an PNP type bipolar transistor, and a second bipolar transistor is an NPN type bipolar transistor, each said NPN type bipolar transistor having a base terminal, a first emitter terminal, a second emitter terminal, and a collector terminal. Emitter terminals of the PNP type transistors of each first and second inverter devices are electrically coupled together and receive a first applied wordline voltage. The first emitter terminals of each said NPN transistors of said first inverter and second inverter devices are electrically coupled together and receive a second applied voltage. The second emitter terminal of one NPN bipolar transistor of said first inverter is electrically coupled to a first bit line conductor, and the second emitter terminal of the NPN bipolar transistor of said second inverter device is electrically coupled to a second bit line. |
| US09653148B1 |
Multi-bank memory device and system
A memory device includes a common data bus, a plurality of memory banks and a control circuit. The memory banks are coupled to the common data bus. The memory banks share the common data bus. Each of the memory banks includes a storage device and a data register. The data register is coupled between the storage device the common data bus, and is arranged for storing data read from the storage device. The control circuit is coupled to storage devices and data registers of the memory banks, and is arranged for referring to an address signal and an access signal to control the storage device of said each memory bank to output the data to the corresponding data register, and referring to the address signal and a programmable latency time to control the data registers to output data from the memory banks to the common data bus. |
| US09653147B1 |
Asymmetrical emphasis in a memory data bus driver
An apparatus includes an interface and a circuit. The interface may be configured to generate a memory signal that carries read data from a memory channel. The circuit may be configured to modify a read signal that transfers the read data across a read line to a memory controller. A filter may delay the memory signal to generate a delayed signal. A driver generally amplifies the memory signal to generate the read signal. The driver may modify the read signal with a de-emphasis on each pull up of the memory signal and a pre-emphasis on each pull down of the memory signal based on the delayed signal. |
| US09653141B2 |
Method of operating a volatile memory device and a memory controller
A method of operating a volatile memory device includes storing address information of weak cell rows. According to some examples, after writing to a weak cell row, a refresh operation is performed on the weak cell row within a predetermined time. According to some examples, the writing operation to a weak cell row may be performed with a longer write recovery time than a write recovery time to normal cell rows. |
| US09653140B2 |
Memory device and system including the same
A memory device may include: an active controller configured to output a row active signal in response to a refresh control signal and a row enable signal when an active signal is activated; a refresh controller configured to generate and store a flag bit for controlling a refresh operation in response to a refresh signal, a precharge signal, and a precharge stop signal, and output the row enable signal corresponding to the stored flag bit to the active controller; and a cell array circuit configured to perform a refresh operation in memory cell array areas in response to the row active signal. |
| US09653132B2 |
Semiconductor packages usable with semiconductor chips having different pad arrangements and electronic devices having the same
A semiconductor package includes an external electrode, an interface chip, and a semiconductor chip. The interface chip includes an external interface pad bonded to the external electrode, a plurality of internal interface pads, and an interface circuit coupled between the external interface pad and the plurality of internal interface pads. The semiconductor chip includes a signal pad that is selectively bonded to one of the plurality of internal interface pads. The interface circuit activates a connection between a selected pad, which corresponds to a pad that is bonded to the signal pad among the plurality of internal interface pads, and the external interface pad, and deactivates connections between unselected pads, which correspond to pads that are not bonded to the signal pad among the plurality of internal interface pads, and the external interface pad. |
| US09653131B1 |
Apparatuses and methods for voltage level control
Apparatuses for voltage level control in a semiconductor device are described. An example apparatus includes: a plurality of circuits coupled in parallel between first and second nodes, the first node being supplied with a first voltage; and a voltage supply circuit that supplies the second node with one of second and third voltages, the first voltage being greater than the second voltage, and the second voltage being greater than the third voltage. The plurality of circuits includes a first circuit including a transistor coupled to the second node. The first circuit activates the transistor responsive to a first control signal and further sets a voltage level of the second node higher than the second voltage after the voltage supply circuit supplies the second nodes with the second voltage. |
| US09653129B2 |
Driver structure for chip-to-chip communications
Apparatus for chip-to-chip communications may include a first driving unit and a second driving unit. The first driving unit may receive input data, generate a first output data based on the input data, and output the first output data. The second driving unit may receive the input data, generate a second output data with a pre-emphasis peak and output the second output data. The second output data may be generated by delaying and inverting the input data, and have a predetermined weight. |
| US09653128B2 |
Systems and methods for acoustic wave enabled data storage
The present disclosure provides systems and methods for storing, reading, and writing data using particle-based acoustic wave driven shift registers. The shift registers may physically shift particles along rows and/or columns of wells through the interactions of two parallel surfaces. A transducer may generate an acoustic wave to displace one or more of the two parallel surfaces. The particles may be transferred to and/or otherwise constrained by a buffer surface during at least a portion of the acoustic wave, such that the particles may be shifted during one or more cycles of the acoustic wave. In various embodiments, the amplitude of the acoustic wave may correspond to the spacing distance between each of the wells. The wells may be physical and/or potential wells. |
| US09653127B1 |
Methods and apparatuses for modulating threshold voltages of memory cells
Methods and apparatuses for increasing the voltage budget window of a memory array are disclosed. One or more pre-bias voltages may be applied across a selected cell by providing voltages to memory access lines coupled to the selected cell. The threshold voltage of the selected cell may decrease responsive to the pre-bias voltage. Conversely, threshold voltage of deselected cells coupled to only one of the memory access lines coupled to the selected cell may increase responsive to the pre-bias voltage. The decrease of the threshold voltage of the selected cell and the increase of the threshold voltage of the deselected cells may increase the voltage window of the memory array. |
| US09653122B1 |
Storage device carrier and mounting apparatus for storage device
A storage device carrier includes a first frame and a second frame. The first frame includes two opposite sidewalls. Two through holes are defined in each of the sidewalls, for allowing screws to extend therethrough. The second frame is detachably mounted in the first frame. The second frame includes two opposite side plates. Each side plate defines two through slots for allowing screws and unthreaded fasteners to extend therethrough. When the second frame is mounted in the first frame, the side plates of the second frame respectively abut against the sidewalls of the first frame, and the through slots of the side plates respectively align with the through holes of the sidewalls. A mounting apparatus having the storage device is also provided. |
| US09653114B1 |
Detecting media defects
An apparatus according to one embodiment includes at least one write transducer, and a plurality of detector structures positioned in an array. Each of the detector structures includes a pair of conductive layers separated by an insulating material. None of the detector structures include an operable reader for reading data from a magnetic medium. A computer-implemented method according to one embodiment includes monitoring a resistance value of each of a plurality of detector structures positioned in an array, and detecting a change in a resistance value of at least one of the detector structures for identifying a defect on a magnetic medium. Each of the detector structures include a pair of conductive layers separated by an insulating material. None of the detector structures include an operable reader for reading data from a magnetic medium. |
| US09653113B2 |
File format for synchronized media
Metadata defining decoding and rendering instructions for media content to be co-rendered in a media presentation is divided and distributed as track fragments provided in different media container files. Track fragment adjustment information is included in at least one such track fragment in order to define rendering timing relationships between media content portions defined by the track fragments in a current media container file. The rendering timing relationships enable a correct time alignment of the playback of the media content to be co-rendered to achieve a synchronized media presentation. The track fragment adjustment information is particularly advantageous in connection with tuning in or a random access in a stream of media container files comprising fragmented metadata. |
| US09653112B2 |
Enlarged substrate for magnetic recording medium
A data storage device having a housing member for a selected one of a 3½ inch form factor hard disc drive (HDD) or a 2½ inch form factor HDD. A spindle motor coupled to the housing member supports a rotatable data recording disc with a plurality of data tracks and an outermost perimeter. The outermost perimeter has an average overall radius of 48.5 millimeters, mm responsive to the housing member being for a 3½ inch form factor HDD or an average overall radius of 33.5 mm responsive to the housing member being for a 2½ inch form factor HDD. The rotatable data recording disc further has an outermost data track at an average selected radius such that the difference between the average overall radius of the outermost perimeter and the average selected radius is more than 1 mm. |
| US09653111B1 |
Track quality classifier
An apparatus includes a storage medium operable to store a number of data tracks, a read channel circuit operable to process the data tracks read from the storage medium, and a track quality classifier circuit operable to determine a track quality metric for the data tracks read from the storage medium. The track quality metric indicates whether a corresponding one of the data tracks that has failed to successfully process in the read channel circuit can be reprocessed within a track gap period. |
| US09653108B2 |
Optical recording device, optical recording method, and optical recording medium
When recording is performed by focusing a short pulse laser on an inside of a transparent medium such as quartz glass, and forming a minute deformed region in which the refractive index is different from that of surroundings thereof, it is difficult to ensure a recording quality. Therefore, a recorded dot length in a depth direction is monitored 111 and a power of the laser light is adjusted based on the monitored recorded dot length, or a difference between a focus position where a region of the recorded dots appears brighter than the surroundings and a focus position where the region of the recorded dots appears darker than the surroundings is measured and the power of the laser light is adjusted based on the difference. |
| US09653099B2 |
Information storage apparatus and method
An information storage apparatus includes a magnetic track, a writer, and a reader, where the magnetic track includes a number of magnetic domains. Each magnetic domain is divided into at least two magnetic regions, and the writer is disposed on the magnetic track, and configured to write information to the at least two magnetic regions of each magnetic domain. The reader, disposed on the magnetic track, is configured to read the written information from the at least two magnetic regions. Therefore, multiple pieces of valid information are written to one magnetic domain of the magnetic track, thereby increasing storage density of the magnetic track, and expanding a storage capacity of the storage apparatus. |
| US09653095B1 |
Systems and methods for determining a repeatogram in a music composition using audio features
A dataset representing repeated sounds within a musical composition recorded on an audio track may be constructed. An audio track duration of an audio track may be partitioned into partitions of a partition size. A current partition may be compared to remaining partitions of the audio track. Audio information for the current partition may be correlated to audio information for remaining partitions to determine a correlated partition for the current partition from among the remaining partitions of the track duration. The correlated partition determined may be identified as most likely to represent the same sound as the current partition. This comparison process may be performed iteratively, for individual ones of the remaining partitions. Correlation results of the comparison process may be recorded to represent the partition time period of the correlated partition as a function of partition time period of the current partition. |
| US09653088B2 |
Systems, methods, and apparatus for signal encoding using pitch-regularizing and non-pitch-regularizing coding
A time shift calculated during a pitch-regularizing (PR) encoding of a frame of an audio signal is used to time-shift a segment of another frame during a non-PR encoding. |
| US09653084B2 |
Apparatus and method for providing enhanced guided downmix capabilities for 3D audio
An apparatus for downmixing three or more audio input channels to obtain two or more audio output channels is provided. The apparatus includes a receiving interface for receiving the three or more audio input channels and for receiving side information. Moreover, the apparatus includes a downmixer for downmixing the three or more audio input channels depending on the side information to obtain the two or more audio output channels. The number of the audio output channels is smaller than the number of the audio input channels. The side information indicates a characteristic of at least one of the three or more audio input channels, or a characteristic of one or more sound waves recorded within the one or more audio input channels, or a characteristic of one or more sound sources which emitted one or more sound waves recorded within the one or more audio input channels. |
| US09653066B2 |
System and method for estimating the reliability of alternate speech recognition hypotheses in real time
Disclosed herein are systems, methods, and computer-readable storage media for estimating reliability of alternate speech recognition hypotheses. A system configured to practice the method receives an N-best list of speech recognition hypotheses and features describing the N-best list, determines a first probability of correctness for each hypothesis in the N-best list based on the received features, determines a second probability that the N-best list does not contain a correct hypothesis, and uses the first probability and the second probability in a spoken dialog. The features can describe properties of at least one of a lattice, a word confusion network, and a garbage model. In one aspect, the N-best lists are not reordered according to reranking scores. The determination of the first probability of correctness can include a first stage of training a probabilistic model and a second stage of distributing mass over items in a tail of the N-best list. |
| US09653065B2 |
Audio processing device, method, and program
Provided is an audio processing device including a narration canceling section configured to generate a narration canceling signal by removing a narration component from an input signal, and a reverberation adding section configured to add a reverberation effect to the narration canceling signal. |
| US09653059B2 |
Musical sound control device, musical sound control method, and storage medium
A CPU 41 acquires a string vibration signal in a case where a string picking operation is performed with respect to the stretched string 22, analyzes a frequency characteristic of the acquired string vibration signal, determines whether or not the analyzed frequency characteristic satisfies a predetermined condition, and changes a frequency characteristic of a musical sound generated in the connected sound source 45 depending on a case where it is determined that the predetermined condition is satisfied or determined that the predetermined condition is not satisfied. |
| US09653055B1 |
Vibrato tailpiece and method of output signal control for stringed instruments
A vibrato tailpiece system for a stringed instrument includes a tailpiece, a vibrato bar operable with the tailpiece and having an end portion rotatable about an axis of rotation, and a magnet attached to the end portion of the vibrato bar. A sensor chip is spaced from the magnet by a gap sufficiently small to enable the sensor chip to detect a change in the magnetic field due to a rotation of the vibrato bar. The sensor chip outputs a control signal based on the change in the magnetic field. A sensor circuit uses the control signal from the sensor chip to adjust or modify the pickup output signal based on the position of the vibrato bar and deliver an adjusted output signal to an output connector of the stringed instrument. |
| US09653053B2 |
Interchangeable drum bearing edge rings
Provided are interchangeable bearing edge rings for drum shells assembled with traditional lug holders. Different bearing edge rings can be inserted in between the drum shell and the drumhead to change the sound of the drum during play. Some embodiments provide a modified drum shell with top and bottom rims that have a groove. Bearing edge rings with complimentary slits can be inset in the grooves in order to change the drum bearing edge and sound as desired. Alternatively, the bearing edge rings can have support extensions instead of the slits for coupling to unmodified drum shells. The support extensions extend downwards from either side of the ring and are separated by a distance equal to the width of the drum shell rim. The support extensions straddle the drum shell rim to retain the position of bearing edge ring over the drum shell rim. |
| US09653048B1 |
Automatic tuning floating bridge for electric stringed instruments
A method, computer program product, and system for automatically tuning a stringed instrument. An initial height of a first string of an instrument having a plurality of strings and a floating bridge is determined. The height of the plurality of strings is determined using a bridge sensor. The floating bridge is locked. A frequency of the first string is analyzed. In response to determining the frequency of the first string does not match a predetermined frequency, a tuning peg servo motor to adjust a tuning peg, thereby adjusting a string tension of the first string. The one or more bridge servo motors adjusts a spring tension until the spring tension of the one or more springs equals the string tension of the first string. In response to determining the first string is tuned, the floating bridge is unlocked. |
| US09653034B2 |
Column data driving circuit including a precharge unit, display device with the same, and driving method thereof
Provided are a column data driver configured to apply a voltage or current corresponding to image data to a display panel, a display device having the column data driver, and a driving method of the display device. The column data driving circuit includes a precharge unit configured to precharge at least one of a plurality of column lines in response to a plurality of preset signals corresponding to image data; and a driving unit configured to sequentially drive the plurality of column lines in response to a data signal corresponding to the image data. |
| US09653033B2 |
Liquid crystal display device to mitigate dark corners
In an IPS mode liquid crystal display device, measures are taken against dark unevenness at the corner portion of a screen. The problem can be solved by a liquid crystal display device in which a comb tooth pixel electrode is formed on a common electrode formed in a flat surface through an interlayer insulating film; a TFT substrate is formed with a dummy pixel region and a display region surrounding the display region; a pixel on the display region is formed with a comb tooth display region pixel electrode bent in a projection in the first direction; and a pixel on the dummy pixel region is formed with a comb tooth dummy pixel region pixel electrode bent in a projection in a direction opposite to the first direction at an angle of 180 degrees. |
| US09653028B2 |
Pixel structure
A pixel structure is provided. The pixel structure includes a first pixel unit, a second pixel unit and a discharge unit. The first pixel unit includes a first active device and a first pixel electrode. The second pixel unit includes a second active device and a second pixel electrode. Gates of the first active device and the second active device are electrically connected to a scan line. Drains of the first active device and the second active device are electrically connected to a data line. The first pixel electrode is electrically connected to a source of the first active device. The second pixel electrode is electrically connected to a source of the second active device. The discharge unit is configured to set that a voltage of the second pixel electrode is smaller than a threshold voltage according to a driving signal received by a driving line. |
| US09653027B2 |
Display apparatus
According to an embodiment, a display apparatus includes a display panel displaying an image, a backlight circuit supplying a light to the display panel, a host connector connected to a host, a main control board controlling the display panel to display an image in response to an image signal and a control signal that are provided from the host through the host connector, and a backlight control board separately provided from the main control board and receiving a source voltage from the host through the host connector to drive the backlight circuit. |
| US09653024B1 |
Method of compensating AMOLED IR drop and system
The present invention provides a method of compensating AMOLED IR Drop and a system. In the method of compensating AMOLED IR Drop, many times of iterated operations are performed to the power supply voltages and the driving currents of respective pixel driving circuits coupled in series on the same power supply line, and the adjustment and compensation are performed to the initial values Vdata1 to Vdatan of the data signal voltages for being inputted to respective pixel driving circuits according to the power supply voltages OVdd1 to OVddn of respective pixel driving circuits obtained with the last iterated operation of the calculation unit, and outputs the compensated data signal voltages Vdata1 to Vdatan corresponding to respective pixel driving circuits. The method can make that the driving currents flowing through respective pixels can be more uniform for solving the mura problem caused by IR Drop. The system of compensating AMOLED IR Drop can improve the brightness uniformity of an AMOLED display panel for solving the mura problem caused by IR Drop with setting the calculation unit, the storage unit, the compensation unit and the plurality of pixel driving circuits. |
| US09653020B2 |
Display apparatus, driving method thereof, and electronic system
A display apparatus includes: a pixel array section including a row of first and second scanning lines, a column of signal lines, and pixels in a matrix, each of the pixels disposed at an intersection of both of the lines; and a drive section. The drive section performs line progressive scanning on the pixels. The pixel includes a light emitting device, a sampling transistor, a driving transistor, a switching transistor, and a holding capacitor. The sampling transistor samples a video signal on the signal line to hold the signal potential in the holding capacitor, the driving transistor makes the light emitting device conductive to be in a luminous state in accordance with the held signal potential, and the switching transistor becomes ON in accordance with the control signal supplied in advance of the sampling of the video signal to change the light emitting device to a non-luminous state. |
| US09653019B2 |
Display device
A display device is disclosed. The device includes a display panel including a plurality of pixels including a first pixel electrically connected to a first data line and a second pixel electrically connected to a second data line. The display device also includes a current path switch configured to electrically connect the first pixel to the second pixel during a voltage drop test operation and electrically disconnect the first pixel from the second pixel during an image display operation. The display device further includes a voltage drop detector electrically connected to an end of the first data line and an end of the second data line, the voltage drop detector being configured to apply a test voltage to the end of the first data line and measure a dropped test voltage at the end of the second data line. The display device additionally includes a line resistance calculator. |
| US09653017B2 |
Pixel structure, driving method thereof and display device
A pixel structure, a driving method thereof and a display device are provided. The pixel structure includes a plurality of closely arranged repeating groups, and each of the repeating groups includes linearly arranged square pixel units of different colors. Each of the square pixel units in each of the repeating groups is formed by two sub-pixels with a same color and a same shape; and two sub-pixels in adjacent square pixel units have different arrangement modes. The repeating groups disposed on two adjacent parallel straight lines are staggered by a distance of one and a half square pixel units. With such a pixel structure, input information is subjected to brightness redistribution and intensively outputted to the actual physical positions, the optional switching of the sub-pixels can be applied on the premise of not reducing the pixel size, and hence the resolution of the display image can be improved. |
| US09653012B2 |
Array substrate, display device and mother board
The present invention provides an array substrate, a display device, and a mother board. One or more short-circuit rings are each arranged at an end of a corresponding signal line and connected to the corresponding signal line, and the short-circuit rings are serially connected through a common electrode line. The array substrate is added with a test line and a testing terminal pad, the testing terminal pad is connected to the common electrode line via the test line and is configured to apply a negative voltage onto the common electrode line connected to the test line while testing the signal line. |
| US09653010B2 |
Image processing apparatus, image processing method and storage medium
An image processing apparatus, which generates low gradation luminance correction values with respect to an overlap region and a non-overlap region of a plurality of images constituting a multi-screen display, generates the low gradation luminance correction values so as to make the values gradually change from the overlap region throughout the non-overlap region. |
| US09653009B2 |
Slippery surface warning apparatus
A Slippery Surface Warning Apparatus includes a Ultra-Violet Emitting Device, a Sign with Indicia, a Mounting Assembly, a Light-refracting liquid or powder to be added to a cleaning solution or other fluid, and a Light Housing. This Slippery Surface Warning Apparatus is used for the purpose of alerting people in the vicinity of a potential safety hazard whereby light emitted from the Ultra-Violet Emitting Device is directed to the slippery surface imbued with UV-Reflected cleaning solution for the purpose of showing persons where a slippery surface or hazardous condition is. |
| US09653008B2 |
Portable collapsible fabric-tensioned sign assembly
A portable collapsible sign assembly including a fabric covering and support frame which is adjustable between a collapsed and expanded position. When the sign assembly is expanded, or in its deployed state, the fabric covering and support frame possess a connective tension relationship with respect to one another which creates and supports both the sign assembly display sign and base in a stable manner. The fabric covering engagement with the support frame enables the entire sign assembly, including both the display sign and assembly base, to be simultaneously deployed in one user-initiated motion. |
| US09653007B2 |
Channel letter and trim cap retaining clip therefor
A channel letter has a rear surface for mounting against a raceway, wall, or a structure for supporting the signage, and sheet metal sides defining the figuration of the letter or shape to be depicted. A lighting element is positioned against the rear surface of the enclosure, and a lens is retained to the open front of the enclosure. The lens is secured with a retainer cap and a plurality of retainer clips. Each of the retainer clips comprises as least one side including an outwardly extending leg for retention with the retainer cap. |
| US09653004B2 |
Systems and methods for downloading code and data into a secure non-volatile memory
A method for downloading information into a secure non-volatile memory of a secure embedded device (SED) during a manufacturing or personalization process. The method involves communicating the information and a software program from a device to a temporary storage memory of the SED. The method also involves starting the software program provided to facilitate an initialization of a first key and to facilitate a transfer of at least a portion of the information from the temporary storage memory to the secure non-volatile memory. In response to starting, the software program, the first key is initialized and the portion of information is transformed into transformed information locally at the SED using at least one of a scramble algorithm and a cipher algorithm. Thereafter, the transformed information is written to a memory element of the secure non-volatile memory. |
| US09653001B2 |
Vehicle driving aids
Automotive vehicle driving aid includes a computer program with a training module having instructions for providing audio/visual feedback during training route (TR) execution, and dynamically adjusting the TR to enable practice of a maneuver and avoidance of another maneuver. The program includes a driver aid module, practice module and/or test module. Driver aid module includes instructions for providing feedback during driver aid route (DAR) execution, dynamically adjusting the DAR to enable practice of a maneuver and avoidance of another maneuver, and providing a notification upon recognizing an object outside a vehicle during DAR execution. Practice module includes instructions for receiving a learning preference input and generating a practice route including the learning preference. Test module includes instructions for disabling feedback systems, assessing a driving maneuver during a test route (TR), and upon completion of TR, providing a driving report. Audio system provides audio feedback, and electronic display provides visual feedback. |
| US09653000B2 |
Method for providing foreign language acquisition and learning service based on context awareness using smart device
According to the method of the present invention for providing a foreign language acquisition and learning service based on context awareness by using a smart device, a service provider server receives user information from a user terminal, extracts foreign language learning content by using the user information, and transmits same to the user terminal, thereby providing the foreign language learning content that is tailored to the context of the user and the information of the user. |
| US09652996B2 |
Measuring cognitive load
A computer implemented method for measuring a person's cognitive load comprises initially receiving 100 stroke data (FIG. 4, FIG. 5(a)) representative of hand-based strokes produced by a person 200 while performing a task. A processor 216 selects 104 a subset of the stroke data FIG. 5(c) that meets one or more predetermined stability criteria. A measure indicative of the person's cognitive load based on the subset of stroke data is determined 106. In this was the user's cognitive load in an objective, uniform and non-intrusive manner by analyzing the user's writing behavior. An analysis of all of a user's writing strokes will bias the evaluation result. The accuracy of the cognitive load measurement is increased by applying stability criteria to select the best strokes for further analysis. By disregarding unstable strokes the computation costs for determining the user's cognitive load is also improved. |
| US09652993B2 |
Method and apparatus for providing differentiated content based on skill level
A system and method is disclosed for providing differentiated content to a user comprising determining a skill level of the user, obtaining unmodified content, aligning the unmodified content to a set of content standards, modifying the aligned content in accordance with the user's skill level, providing the modified aligned content to the user, re-assessing the user's skill level based on a response from the user to the modified aligned content, and modifying new aligned content in accordance with the re-assessed user's skill level. |
| US09652992B2 |
Personalized avatar responsive to user physical state and context
Systems and methods are disclosed that facilitate providing guidance to a user during performance of a program or routine using a personalized avatar. In an aspect, a system includes a reception component configured to receive biochemical information about a physiological state or condition of a user, including information identifying a presence or a status of one or more biomarkers. The system further includes an analysis component configured to determine or infer one or more characteristics of the physiological state or condition of the user based on the information identifying the presence or the status of the one or more biomarkers, and a visualization component configured to adapt an appearance of an avatar presented to the user based on the one or more characteristics to reflect the one or more characteristics. |
| US09652991B2 |
Systems and methods for content scoring of spoken responses
Computer-implemented systems and methods are provided for automatically scoring the content of moderately predictable responses. For example, a computer performing the content scoring analysis can receive a response (either in text or spoken form) to a prompt. The computer can determine the content correctness of the response by analyzing one or more content features. One of the content features is analyzed by applying one or more regular expressions, determined based on training responses associated with the prompt. Another content feature is analyzed by applying one or more context free grammars, determined based on training responses associated with the prompt. Another content feature is analyzed by applying a keyword list, determined based on the test prompt eliciting the response and/or stimulus material. Another content feature is analyzed by applying one or more probabilistic n-gram models, determined based on training responses associated with the prompt. Another content feature is analyzed by comparing a POS response vector, determined based on the response, to one or more POS training vectors, determined based on training responses associated with the prompt. Another content feature is analyzed by comparing a response n-gram count to one or more training n-gram counts using an n-gram matching evaluation metric (e.g., BLEU). Another content feature is analyzed by comparing the response to one to training responses associated with the prompt using a dissimilarity metric (e.g., edit distance and word error rate). |
| US09652990B2 |
Systems and methods for monitoring unmanned aerial vehicles
Embodiments of the present invention include devices and methods for monitoring a drone(s). The method includes: receiving information of a drone via a communication unit and displaying the information of the drone on a display panel of a device. The information includes the location of the drone and an icon indicating the location of the drone is displayed on a map rendered on the display panel. The method further includes determining, based on the information, whether the drone poses a danger and, responsive to the danger, issuing a warning of the danger. |
| US09652984B2 |
Travel information sensing and communication system
Method for conveying driving conditions includes determining when a vehicle is within a set distance from an activatable sensor using a proximity sensor coupled thereto. Only when the proximity sensor determines that the vehicle is within the set distance from the activatable sensor, the activatable sensor is activated (from a deactivated state) to measure or detect a property or condition of the travel surface or the environment around the travel surface that affects interaction between tires of the vehicle and the travel surface using a measuring or detecting component, and communicate the sensor-generated information directly from the activatable sensor to the vehicle or occupant thereof. Energy is provided to the activatable sensor from an energy harvesting system associated with the activatable sensor to enable it to measure or detect the property or condition of the travel surface or the environment around the travel surface. |
| US09652982B2 |
Method and system for learning traffic events, and use of the system
A method for learning traffic events, the traffic events being transmitted to a data network using vehicle-to-X communication. The traffic events include position data and time data assigned to the traffic events, and the traffic events are stored electronically in the data network. The method is characterized in that an individual storage duration is determined for each traffic event, and the traffic event is deleted from the data network after the storage duration expires. The invention further relates to a corresponding system and to the use thereof. |
| US09652981B2 |
Method for systematically penalizing drivers who fail to stop at a crosswalk
Systems and methods are provided for systematically penalizing drivers who fail to stop at crosswalk on different circumstances. The system and method generally employ a sensor to detect a vehicle approaching the cross walk and ambient conditions. The sensor may collect information about the speed and any changes in speed of the vehicle approaching. An image capture device may be used to identify any passengers waiting to cross or actively crossing within the crosswalk. The analyzer processes the information and determines if a fine should be levied upon the vehicle approaching the cross walk. The analyzer may also determine the magnitude of the fine that is to be issued. An additional camera for sensing vehicle speed may be placed at the cross walk to obtain further information to properly assess a fine. |
| US09652980B2 |
Enhanced clear path detection in the presence of traffic infrastructure indicator
A method for detecting a clear path of travel for a vehicle utilizing analysis of a plurality of images generated by a camera device located upon the vehicle includes monitoring the images. The images are analyzed including determining a clear path upon which a potential road surface can be estimated from other portions of the images that do not indicate a potential road surface, and determining an image of a traffic infrastructure indication. The method further includes determining the content of the traffic infrastructure indication, modifying the clear path based upon the content of the traffic infrastructure indication, and utilizing the modified clear path in navigation of the vehicle. |
| US09652970B2 |
Hygiene alert system
A hygiene alert system includes a toilet that has a tank and the tank may contain a fluid. The tank has a lid and the lid has a top surface and a bottom surface. An alert is coupled to the tank such that the alert may detect the fluid in the tank. The alert issues a verbal reminder and a visual reminder when the alert detects the fluid has drained from the tank. Thus, the alert communicates a reminder for personal hygiene. |
| US09652969B2 |
Portable device for improving hygiene and method
A portable device for improving hygiene, comprising at least one warning unit that cooperates with a unit for detection of a disinfection treatment in such a way that a signal can be activated, said warning unit being operatively connected to at least one step counting unit; and, a method and a system for improving hygiene in medical facilities, including the use of a portable device. |
| US09652961B2 |
Alarm notifying system
A sound amplification apparatus includes one or more microphones that convert collected sound into an audio signal and transmit the audio signal by radio and a sound receiving apparatus that receives the audio signal transmitted from the microphone and amplifies and outputs the sound based on the audio signal. The sound receiving apparatus is configured to perform sound output control in an emergency mode upon receiving an emergency signal transmitted in response to operation of an emergency switch of the microphone. With this configuration, it is possible to perform appropriate sound control in a dangerous situation such as intrusion of a suspicious person. |
| US09652958B2 |
Chamber-less smoke sensor
A method for detecting smoke via a chamber-less smoke sensor includes applying one or more filters to eliminate a flooding of ambient light upon the smoke sensor and emitting, by a source, light. At least one detector detects at least a portion of the emitted light and a processor processes the detected light to signal an alarm condition when one or more threshold levels are reached. A chamber-less smoke sensor includes a light source configured to emit light and at least one detector configured to detect at least a portion of the emitted light. An electronic filter and/or a processor is configured to apply one or more filters to eliminate a flooding of ambient light upon the smoke sensor and process the detected light to signal an alarm condition when a threshold level is reached. |
| US09652957B2 |
Smoke detector chamber architecture and related methods
Various arrangements for using multiple wavelengths of electromagnetic radiation to detect smoke by a smoke detector are present. Multiple modes of the smoke detector may be used in which a first wavelength of electromagnetic radiation is emitted into a smoke chamber while a second electromagnetic radiation emitter is disabled, a period of time is waited, and a second wavelength of electromagnetic radiation is emitted into the smoke chamber while the first emitter is disabled. Depending on the mode of the smoke detector, the period of wait time may be varied. |
| US09652955B1 |
Real-time asset location system and method with long-range wireless backhaul
A system and method for transmitting information using first and second wireless communication protocols, including an object having a short range radio frequency signal transmitter for transmitting a signal using the first protocol, the signal including information transmitted from the object; a collector including a signal receiver for receiving the signal transmitted by the short range radio frequency transmitter and further including a collector transmitter that transmits a collector signal using the second protocol via a low power wide area network, the collector signal including the information transmitted from the object; a gateway in wireless communication with the collector via the low power wide area network, the gateway including a gateway receiver for receiving the collector signal; a processing application for processing the information transmitted from the object and creating an information processing outcome; and an end user terminal having an interface for displaying the information processing outcome. |
| US09652952B2 |
Device for detecting the theft of an object
A device for detecting the theft of an object, intended to be integrated to said object, includes an antenna for receiving a remote-supply signal and means for detecting an interruption of the remote-supply signal. Means for delivering an alarm signal when the interruption of the remote-supply signal is detected are also provided. |
| US09652946B2 |
Hands-free, wearable vibration devices and method
A wearable haptic device includes (a) substrate having provided thereon a fastener (e.g., adhesive) for attachment to a user; (b) one or more EMP transducers attached to the substrate, such that a mechanical response in each EMP transducer may provide a haptic response of sufficient magnitude to be felt by the user; and (c) control circuit controlling the vibration frequency, the time of operation and the duration for each activation of the EMP transducer. The wearable haptic device may include a wireless communication circuit (e.g., Bluetooth transceiver) for receiving message from an external device (e.g., smartphone). The control circuit interprets message received and according to the interpreted message provides an electrical stimulus to cause the mechanical response of the EMP transducer. The EMP transducer may also serve as a sensor, such that a mechanical stimulus on the EMP transducer provides an electrical response that is detected by the control circuit. |
| US09652945B2 |
Method and system for providing haptic effects based on information complementary to multimedia content
The present disclosure is generally directed to systems and methods for providing haptic effects based on information complementary to multimedia content. For example, one disclosed method includes the steps of receiving multimedia data comprising multimedia content and complementary data, wherein the complementary data describes the multimedia content, determining a haptic effect based at least in part on the complementary data, and outputting the haptic effect while playing the multimedia content. |
| US09652941B2 |
Lottery-type game based upon at least two casino games
A lottery-type game is enabled via two or more casino games such as keno or video poker games. If the outcome of the first game is winning, the player may be awarded first winnings. If the outcome of the second game is winning, the player may be awarded second winnings. Regardless of the outcomes of the base games, if designated indicia comprising certain indicia from the first and second games match a selected set of indicia, then the lottery-type game is winning. In the case of a keno game, the designated indicia may be certain player numbers from the keno games and in the case of a poker game, certain player-selected cards. The selected set of indicia may comprise drawn keno numbers or dealt cards. |
| US09652940B1 |
Lotto sports game
A method and system for a lotto-style game is provided in which a single random number, in a universe of 1-100, is generated and corresponds to a specific pre-numbered box in a two dimensional grid. This box will represent a lotto player's score related to a specific sporting game and date selected by the player. Random numbers will be generated each time a player purchases a ticket based on the date, and teams (game) chosen by the player. A system for playing a lottery game is also provided. |
| US09652936B2 |
Methods and systems for rewarding friends of a player based on bonus qualifying condition triggered by player
In accordance with some embodiments, provided herein are systems, methods and articles of manufacture for providing bonuses to player of games (e.g., online wagering games) based on the achievement of a qualifying event by another player (e.g., a friend of the players who are provided the bonuses). In accordance with some embodiments, such bonuses are funded out of respective bonus funding accounts maintained and managed for the players (which may be game-specific). In accordance with some embodiments, such bonus funding accounts may be maintained for players without the player's knowledge or control and may be funded based on gaming activity of the players (e.g., a portion of each wager made by a player may be contributed to the balance of the player's bonus funding account). |
| US09652935B2 |
Wagering games having reduced maximum wagering levels
A gaming system and method includes receiving a wager and in response thereto a basic game is conducted. The basic game includes a plurality of symbols that indicate a randomly selected outcome. In response to an offer trigger, an offer is displayed to conduct one or more subsequent plays of the basic game at a reduced maximum bet wager having a wager amount that is less than a normal maximum bet wager amount. A second input is received indicative of an acceptance of the offer for a reduced maximum bet wager. A randomly selected outcome is displayed. The plurality of possible outcomes each include a plurality of symbols arranged in an array. If the randomly selected outcome includes a winning symbol combination, an award is provided for any winning outcome. The provided award is determined as though a normal maximum bet wager amount was received. |
| US09652934B2 |
Method and apparatus for providing secondary gaming machine functionality
A modified gaming machine includes a plurality of gaming machine peripheral devices for use in implementing one or more games to a player, and a master gaming controller configured to implement primary gaming machine functionality, including generating and transmitting information to the plurality of gaming machine peripherals. The modified gaming machine further comprises a secondary controller interposed between one or more of the plurality of gaming machine peripheral devices and the master gaming controller, whereby the secondary controller may forward information generated by the master gaming controller to the gaming machine peripheral devices and transmit secondary information to the peripheral devices. |
| US09652927B2 |
Information storage medium, server, and registration method
A server notifies another user that a virtual item of the user has been registered when the virtual item of the user has been registered, receives a registration request for the virtual item of the user from the terminal of the other user, and registers the virtual item of the user in association with the identification information of the other user as a virtual item of the other user when the registration request for the virtual item of the user from the terminal of the other user has been received. |
| US09652920B2 |
Voting systems and voting methods based on smart mobile communication devices
The invention provides a voting system based on smart mobile communication devices. It comprises at least one smart mobile communication device, at least one server device, a client module, and a server module. The client module is installed on the smart mobile communication device and it is used for temporarily saving the voter's information, submitting identity verification request, showing voting inquiries, and submitting votes. The server module is installed on the server device and it is used for storing the voter's information, verifying the voter's registration and identity, issuing and verifying the voting certificate, creating and publishing the voting affair, and calculating and publishing the voting contents statistics. The client module and the server module perform digital communications through a mobile communication network. The invention also provides a voting method based on smart mobile communication device. According to this invention, voting can be safe, convenient and fast. |
| US09652917B2 |
Intelligent door lock system with automatic unlock
A lock system is coupled to a lock at a dwelling of a dwelling user, resource owner, or end-user, collectively the user. An intelligent door lock system is provided with a remotely operable lock at the dwelling accessible by the user. The intelligent door lock system is configured to be in communication with a server. An automatic unlock system is activated when the user communicates with the server using the user's mobile device. The server is configured to transmit a crossing notification message in response to tracking the user's mobile device and enable an automatic unlock feature of the lock using the server and a mobile device App. |
| US09652910B2 |
Access system employing dynamic badges
Techniques pertaining to management of and construction of a dynamic badge having at least one display device on the badge are described. A computer receives a message that identifies a user to which the badge is assigned, receive geographic location information that indicates a current location of the badge, access a database that stores information associated with the user; determining by the computer based on the accessed information and the current location of the badge the specific information to display on the display device; and forwards the determined information over a network to a communication node for delivery to the badge. |
| US09652909B1 |
Security badge
An identification device includes a radio-frequency identification (RFID) card, a base member, and a front panel. The RFID card is configured to transmit an identification number. The front panel includes a laser-markable layer. The base member has a back panel and a perimeter wall extending transverse from the back panel. The base member forms a recess accommodating the front panel. The base member and the front panel are joined to form an assembly in which the RFID card is enclosed. |
| US09652908B2 |
System allowing a service provider to selectively open a vehicle
A system for selectively opening a vehicle includes a first communication module for establishing a communication link to a service provider who obtains authorization data via a communication network, a first identification routine for unambiguously identifying the service provider, and a second communication module for establishing, via wireless communication, a communication link to a control unit of an access arrangement on a vehicle. A second identification routine allows the access arrangement to unambiguously identify the system. A third communication module receives update request data from the driver. An update routine updates authorization data in a memory of the system. When authorization is valid, the control unit receives a profiled control signal via the communication link, the profiled control signal causing the vehicle to be selectively opened via the control unit. |
| US09652903B2 |
Method and apparatus for determining a wheel end condition
Various embodiments of an apparatus and method for determining a wheel end condition are disclosed. In one example, a controller for determining a wheel end condition comprises a plurality of wheel speed sensor inputs for receiving wheel speed sensor signals from a plurality of associated wheel speed sensors installed at associated wheel ends. The controller includes control logic that determines a speed as a function of the wheel speed sensor signal; receives a resistance value of the individual wheel speed sensor and compares the resistance value to a first and second high resistance threshold and a low resistance threshold. The control logic determines a wheel end condition exists at the associated wheel end as a function of the speed and the resistance value. |
| US09652902B2 |
Pitch trim actuator servicing monitoring system
A method includes detecting at least one position measurement of a separator piston of a pitch trim actuator. The method includes detecting at least one pressure measurement of a gas. The method includes detecting at least one temperature measurement of the gas. The method includes storing at least one position value based on the at least one position measurement of the separator piston, at least one pressure value based on the at least one pressure measurement of the gas and at least one temperature value based on the at least one temperature measurement of the gas. The method includes determining a volume of an oil within an oil chamber of the pitch trim actuator and a pressure of the gas within the gas chamber of the pitch trim actuator, based on the at least one position value, the at least one pressure value and the at least one temperature value. |
| US09652901B2 |
Health management unit and method for monitoring health information and transmitting information from the aircraft
A health management unit for an aircraft and method of monitoring health information of an aircraft and transmitting information from the aircraft including determining capabilities of one or more radios onboard the aircraft, selecting one of the multiple radios to transmit the transmission based, and transmitting the transmission utilizing the selected radio. |
| US09652899B2 |
Methods, apparatus and systems for accessing vehicle operational data using an intelligent network router
Systems and methods are provided that allow more efficient access to vehicle health maintenance information within a vehicle. In addition, it is desirable to provide remote access to the health information by a plurality of users. |
| US09652895B2 |
Augmented reality image transformation
There is provided a system and method for augmented reality image transformation. In one implementation, such a system includes a system processor, a system memory, and an image transformation engine stored in the system memory. The system processor is configured to execute the image transformation engine to receive image data corresponding to an image, to detect a feature on a surface of the image, and to synthesize a texture corresponding to the feature. The system processor is further configured to execute the image transformation engine to produce an augmented reality representation of the image having the texture for display to a user, the texture covering a surface of the augmented reality representation of the image corresponding to a portion of the feature that is not visible on the surface of the image. |
| US09652890B2 |
Methods and systems of generating an anatomically-constrained local model for performance capture
Techniques and systems are described for generating an anatomically-constrained local model and for performing performance capture using the model. The local model includes a local shape subspace and an anatomical subspace. In one example, the local shape subspace constrains local deformation of various patches that represent the geometry of a subject's face. In the same example, the anatomical subspace includes an anatomical bone structure, and can be used to constrain movement and deformation of the patches globally on the subject's face. The anatomically-constrained local face model and performance capture technique can be used to track three-dimensional faces or other parts of a subject from motion data in a high-quality manner. Local model parameters that best describe the observed motion of the subject's physical deformations (e.g., facial expressions) under the given constraints are estimated through optimization. The optimization can solve for rigid local patch motion, local patch deformation, and the rigid motion of the anatomical bones. The solution can be formulated as an energy minimization problem for each frame that is obtained for performance capture. |
| US09652888B1 |
Predicted weather display and decision support interface for flight deck
A system and method for providing visual depictions of a predictive weather forecast for in-route vehicle trajectory planning. The method includes displaying weather information on a graphical display, displaying vehicle position information on the graphical display, selecting a predictive interval, displaying predictive weather information for the predictive interval on the graphical display, and displaying predictive vehicle position information for the predictive interval on the graphical display, such that the predictive vehicle position information is displayed relative to the predictive weather information, for in-route trajectory planning. |
| US09652883B2 |
Volume rendering of images with multiple classifications
Processes and systems for computer enabled volume data rendering, and more particularly for volume rendering of multiple classificated volume datasets using an Interpolation-Classification (IC) order are provided. Further, an octree min/max can be used for volume rendering with the multiple classifications and at the same time applying the IC order to visualize the multiple classifications volume rendering. |
| US09652881B2 |
Image processing device and image processing method
An image processing device includes: a data obtainment unit which obtains an input image captured from a first viewpoint, and depth information indicating a depth of a subject in the input image; a viewpoint transformation unit which generates, using the depth information, a plurality of first transformed images each of which is an image of the input image seen from a corresponding one of second viewpoints different from the first viewpoint; and a blank area analysis unit that analyzes a blank area which is included in each of the first transformed images and includes a pixel which does not have a corresponding pixel in the input image, and generate blank information which indicates, for each of the second viewpoints, a size of the blank area in the first transformed image corresponding to the second viewpoint. |
| US09652880B2 |
2D animation from a 3D mesh
Two-dimensional (2D) animation may be generated from a three-dimensional (3D) mesh by a machine or device that flattens, textures, and modifies the 3D mesh, which results in distorting the texture of the 3D mesh. The machine or device is configured to access and flatten a 3D mesh of 3D vertices. At least some of the 3D vertices of the flattened 3D mesh are texture mapped with a 2D image. The machine or device generates a first 2D frame of animation by rendering the 3D mesh (e.g., with graphics acceleration hardware), modifies the 3D mesh by repositioning one or more of the 3D vertices, and generates a second 2D frame of animation by rendering the modified 3D mesh (e.g., with graphics acceleration hardware). Accordingly, 2D animation may be generated by distorting the 2D image that is mapped onto at least part of the 3D mesh. |
| US09652876B1 |
Label propagation in a distributed system
Data are maintained in a distributed computing system that describe a graph. The graph represents relationships among items. The graph has a plurality of vertices that represent the items and a plurality of edges connecting the plurality of vertices. At least one vertex of the plurality of vertices includes a set of label values indicating the at least one vertex's strength of association with a label from a set of labels. The set of labels describe possible characteristics of an item represented by the at least one vertex. At least one edge of the plurality of edges includes a set of label weights for influencing label values that traverse the at least one edge. A label propagation algorithm is executed for a plurality of the vertices in the graph in parallel for a series of synchronized iterations to propagate labels through the graph. |
| US09652871B2 |
Three dimensional localization of a moving target for adaptive radiation therapy
The present disclosure relates to systems, methods, and computer-readable storage media for segmenting medical image. Embodiments of the present disclosure may locate a target in a three-dimensional (3D) volume. For example, an image acquisition device may provide a 3D medical image containing a region of interest of the target. A processor may then extract a plurality of two-dimensional (2D) slices from the 3D image. The processor may also determine a 2D patch for each 2D slice, wherein the 2D patch corresponds to an area of the 2D slice associated with the target. The processor may also convert the 2D patch to an adaptive filter model for determining a location of the region of interest. |
| US09652869B2 |
Interface adjustment method, apparatus, and terminal
The present disclosure belongs to the field of computer technologies and discloses an interface adjustment method, apparatus, and terminal. The method includes: capturing a current image by an image capture device of the terminal; analyzing current ambient brightness according to the current image; and adjusting display of an interface on the terminal according to the current ambient brightness. According to the present disclosure, current ambient brightness is obtained by capturing a current image and analyzing the current image, thereby implementing interface adjustment. Such approach solves the problem that an existing interface adjustment method can only be used in a smart TV having a light sensor, and any terminal having an image capture function can adjust an interface by sensing light. |
| US09652867B2 |
Grain generation and blending
A method and system for providing a dynamic grain effect tool for a media-editing application that generates a grain effect and applies the grain effect to a digital image. The application first generates a random pixel field for the image based on a seed value. The application then generates a film grain pattern for the image by consecutively applying a blurring function and an unsharp masking function, based on an ISO value, to the randomly generated pixel field. The application then blends the grain field with the original image by adjusting each pixel based on the value of the corresponding pixel location in the grain field. The application then adjusts the grain amount in the previously generated full-grain image by receiving a grain amount value from a user and applying this value to the full-grain image. |
| US09652859B2 |
Method of measuring a property of a trajectory of a ball with a mobile computer device
Methods for determining a property of a trajectory of a ball with a mobile computer device are described, which include: (a) capturing a sequence of video frames of the ball with a camera of the mobile computer device; (b) determining a first picture coordinate of the ball in a first video frame of the sequence; (c) determining a second picture coordinate of the ball in a second video frame of the sequence; and (d) computing a property of the trajectory of the ball based on a difference of the first and second picture coordinates, a time difference between the first and second video picture and a reference quantity, which may be determined based on a form and/or dimension of the ball in a picture taken with the camera. |
| US09652858B2 |
Image processing apparatus, image processing method, and image processing system
Provided is an image processing apparatus including an image information acquiring unit that acquires image information of an image, a position information acquiring unit that acquires position information of a containing region input by a user so as to contain a designated region that is a specific image region in the image, a first representative position setting unit that sets a first representative position that is a representative position of the designated region based on the position information of the containing region, a second representative position setting unit that sets a second representative position that is a representative position of a region-outside-designated-region that is a region outside the designated region, and a region detection unit that detects the designated region based on the first representative position and the second representative position. |
| US09652857B2 |
Object detection apparatus detection method and program
An object detection apparatus acquires the value of an overlapping area which indicates a high probability that an object is located within a three dimensional space using data including a back projection of an object area on a three-dimensional space, acquires the integral quantity of the value of the overlapping area in a shape model including a three-dimensional target, and acquires the distribution degree of the value of the overlapping area in the shape model of the detection target. The apparatus further determines whether the inside of the shape model is an object or non-object using the integral quantity and the distribution degree. |
| US09652853B2 |
Image processing device
For reduced processing time involved in an image recognition process, correctors 26a and 26b corrects two source images, acquired by two cameras during the imaging of an object, so that when the two source images are arranged side by side in a lateral direction, the imaged object has the same height in both images. A parallax calculation section 28 calculates, by block matching process, a parallax on the basis of the two corrected source images. A parallax image generation section 30 generates a parallax image on the basis of the parallax calculated by the parallax calculation section 28. If a block that has been used during block matching has a rectangular shape including an ‘m’ number of pixels in a longitudinal direction and an ‘n’ number of pixels in a lateral direction, a first reduced-image generation section 32 generates a first reduced image from one of the two corrected source images so that the number of pixels in the longitudinal direction is 1/m and so that the number of pixels in the lateral direction is 1/n. Thus, resolution of the first reduced image equals that of the parallax image. An image recognition section 34 performs image recognition of the object, on the basis of the parallax image and the first reduced image. |
| US09652851B2 |
Side window detection in near-infrared images utilizing machine learning
Methods, systems and processor-readable media for side window detection in near-infrared (NIR) images utilizing machine learning. An image-capturing unit can capture an image/video in a near-infrared (NIR) band via a side window of an incoming vehicle. A deformable part model can be generated utilizing a side window detection and B-frame detection in order to obtain a set of candidate side-windows. Side window detection can be performed based on a mixture of a tree model and a shared pool and can be globally optimized with dynamic programming and still-capture to detect the backseat side window boundary utilizing a B-pillar. A false alarm with respect to the deformable part model can be removed utilizing a super pixel generation and a longest-line detection unit in order to generate a refined deformable part model. |
| US09652846B1 |
Viewpoint recognition in computer tomography images
A solution is presented for cardiac CT viewpoint recognition to identify the desired images for a specific view and subsequent processing and anatomy recognition. A new set of features is presented to describe the global binary pattern of cardiac CT images characterized by the highly attenuating components of the anatomy in the image. Five classic image texture and edge feature sets are used to devise a classification approach based on SVM classification, class likelihood estimation, and majority voting, to classify 2D cardiac CT images into one of six viewpoint categories that include axial, sagittal, coronal, two chamber, four chamber, and short axis views. Such an approach results in an accuracy of 99.4% in correct labeling of the viewpoints. |
| US09652845B2 |
Surgical assistance planning method using lung motion analysis
A medical analysis method for estimating a motion vector field of the magnitude and direction of local motion of lung tissue of a subject is described. In one embodiment a first 3D image data set of the lung and a second 3D image data set is obtained. The first and second 3D image data sets correspond to images obtained during inspiration and expiration respectively. A rigid registration is performed to align the 3D image data sets with one another. A deformable registration is perforated to match the 3D image data sets with one another. A motion vector field of the magnitude and direction of local motion of lung tissue is estimated based on the deforming step. The motion vector field may be computed prior to treatment to assist with planning a treatment as well as subsequent to a treatment to gauge efficacy of a treatment. Results may be displayed to highlight. |
| US09652839B2 |
System and method for ground based inspection of wind turbine blades
A ground based wind turbine blade inspection system and method consists of a thermal imaging camera configured to detect propagating defects by acquiring thermal imaging data from a wind turbine blade when it is substantially at thermal equilibrium with respect to surrounding air and analyzing the thermal imaging data with a processor to identify thermal effects associated with latent defects caused by internal friction due to cyclic gravitational stresses and wind loads during normal turbine operation. The system permits latent defects to be identified using a ground-based in situ inspection before they become visually apparent, which allows repairs to be made economically while the blade is in place. |
| US09652829B2 |
Video super-resolution by fast video segmentation for boundary accuracy control
A method includes generating, by a processor, a label map by labeling pixels in an image. A percentage of a first and second type of texture pixels is determined based on the label map to generate a texture map. The texture map is updated. A directional edge map is generated based on a data correlation analysis based on the texture map and the label map. A gain map with boundaries and smoothing is generated using localized pixels based on information from one or more of the label map, the texture map, and the directional edge map. An enhancement controlled upscaled image frame is generated using one or more of the label map, the texture map, the directional edge map and the gain map as a weight factor. |
| US09652828B1 |
Method and apparatus for imaging a scene
A method and apparatus for imaging a scene. The method includes receiving a plurality of images of the scene from a plurality of first source devices. The method also includes receiving a first metadata identifying a location and a field-of-view of each of the plurality of first source devices. The method also includes receiving a second metadata identifying a location and a field-of-view of each of one or more available image source devices. The method also includes identifying overlapping portions of the plurality of images. The method also includes stitching the plurality of images together to form a combined image of the scene based on the overlapping portions of the plurality of images. The method also includes identifying a missing portion of the combined image of the scene and responsive to identifying the missing portion, performing one or more actions to fill a part of the missing portion. |
| US09652827B2 |
System and method for color image acquisition
An imaging system color image acquisition including: an image sensor; a tunable spectral filter arranged in an optical path of light propagation towards the image sensor; and a controller connected to the image sensor and to the tunable spectral filter. The controller is configured and operable for generating a colored image by sequentially operating the tunable spectral filter for sequentially filtering light passing towards the image sensor with three or more different spectral filtering curves during three or more corresponding integration time durations. The tunable spectral filter is configured, as an etalon and includes a pair of reflective surfaces. At least one of the reflective surfaces includes a layer of high refractive index of at least n=2.3 or even higher than 3, or a layer of low refractive index, smaller than n=1. The configuration of the etalon provide wide transmission peaks of the spectral curves with full-width-half maximum (FWHM) in the range of about 50 to 80 nm, free spectral range (FSR) of at least 300 nm, and thickness of the etalon in the order to 1 mm or even less. |
| US09652824B2 |
Display system, display device, display terminal, display method of display terminal, and control program
Since a display device is used in a relatively large room, it often displays images on a large screen. On the other hand, a display terminal often displays images on a small screen. Therefore, when the same image is displayed on the display device and the display terminal, the displayed image on the display terminal is so small that the viewer has difficulty in discerning details of the image, which poses a problem that the display terminal is disadvantageous. In a display system including a display terminal and a display device, the display device detects position coordinates optically pointed out by a pointer on a displayed image, and displays a given pointer mark at the detected position coordinates. The display terminal displays a magnified version of the displayed image approximately around received position coordinates serving as a center thereof, and displays a given pointer mark at the position coordinates. |
| US09652823B2 |
Method and terminal device for controlling display of video image
The present disclosure relates to a method and a terminal device for controlling a display of a video image. The method includes: obtaining the video image captured by a smart camera device; obtaining orientation variation data of a terminal device when the video image is displayed on a screen of the terminal device; and controlling the video image to slide on the screen according to the orientation variation data of the terminal device. |
| US09652810B2 |
Dynamic chat box
In particular embodiments, a method comprising, by one or more computing devices, communicating, from a client device, to a remote host a resource locator of a content object being currently accessed by a first user at the client device, receiving from the remote host an indication that one or more second users have accessed the content object or a domain hosting the content object, and responsive to the indication, displaying a chat messaging interface to the first user at the client device, wherein the chat messaging interface includes identifiers for the one or more second users and messaging controls operative to establish a chat session with the one or more second users. |
| US09652809B1 |
Using user profile information to determine an avatar and/or avatar characteristics
An instant messaging user may be able to convey information about the user by displaying self-expression items in the instant message communications. Examples of self-expression items generally include non-animated icons, animated avatars, sounds, wallpaper, or objects associated with an avatar or wallpaper. A user may select an avatar, and one or more other types of self-expression items, from among many available avatars and other types of self-expression items. A user profile that provides information about the user (e.g., geographical location of the user, the user's occupation, and various interests held by the user) may be used to identify a subset of the universe of available avatars and self-expression items to be presented to the user for selection. |
| US09652806B2 |
System and method for providing and activating commoditized insurance
A system and method for providing commoditized insurance products to at least one consumer is disclosed. The system includes a commoditized insurance product including an activation code and an insurance company that underwrites the commoditized insurance product and provides the commoditized insurance product to a retail outlet. Based on consumer purchase of the commoditized product at the retail outlet and initiation of an activation process, the insurance company receives an activation code associated with the commoditized insurance product and provides verification queries to the consumer, and based on positive responses to the queries activates the policy providing the selected insurance coverage for the consumer. |
| US09652803B2 |
Virtualizing for user-defined algorithm electronic trading
Certain embodiments reduce the risks of traditionally programmed algorithms such as syntax errors, unclear logic, and the need for a non-trader programmer to develop the algorithm as specified by a trader by reducing or eliminating the writing of programming code by a user. Certain embodiments provide a design canvas area and blocks for designing an algorithm. Certain embodiments provide for grouping blocks placed in the design canvas area. Certain embodiments provide for virtualized group blocks enabling dynamic instantiation of portions of an algorithm to handle particular discrete events. Certain embodiments provide for operation of some or all portions of an algorithm when a connection between a client device and an algorithm server is broken. |
| US09652801B2 |
System and computer method for tracking online actions
System and computer-implemented method of dynamically modifying a user interface and displaying a circular meter with a selectable slider. The identity of the UI is extracted from the UI and looked up in a table to determine two scores associated with the UI. A UI-specific score indicates how many actions a user has taken with the UI, and a total score indicates how many actions a user has taken with all UIs that the user has permitted to track. A graphic having two concentric circular meters is combined with the UI to produce a composite UI that is displayed to the user as the user is interacting with the UI. The meters fill up in opposite directions, and a slider on one of the meters can be slid clockwise or anti-clockwise to permit the user to make a selection based on the two scores. |
| US09652797B2 |
Intent prediction based recommendation system using data combined from multiple channels
User intent is identified while the user browses online and recommendations are provided to the user. The recommendations are based on the identified intent, interests, and preferences of the user who is performing the searches. The determination of user intent and interests is based on a statistical model derived from data compiled from the user and a plurality of other users. Other resources may also be determined to be relevant, for example, because of past interactions of the user, memberships of the user in ecommerce websites, the user's interests and preferences are similar to those of other users, and so on. The result of the user search is a ranked set of recommendations that is provided to the user. |
| US09652796B2 |
Method and system for providing a shopping cart with feedback information generated by user social network connections
A system, computer-readable storage medium storing at least one program, and computer-implemented method for automatically providing item feedback information during the checkout process is provided. Feedback information related to one or more items added to an electronic shopping cart of a user is obtained. A message including the feedback information is provided automatically to the user during the checkout process. |
| US09652792B1 |
Dynamically generating resource tracking codes
Systems and methods are provided for generating a tracking code that may be included in an identifier, such as an identifier identifying a network resource or network location, in order to track various information associated with the identifier upon user selection of the identifier. For example, a tracking code may be dynamically generated and appended to an identifier associated with one or more selectable options in a user interface. The tracking code may, for example, identify the section or portion within the user interface that the selectable option is included and/or other information. When a user selects such a selectable option in the user interface, information included in the tracking code may be stored and/or analyzed to determine effectiveness or performance of various selectable options. |
| US09652786B2 |
Attributing and allocating advertising revenue for embedded software
A method for attributing revenue for embedded software that displays advertising. The method includes the first step of determining the presence of more than one type of embedded software on a given client site. Then, the process assigns priority based on the length of time each type has resided on the client system and the source of each type, followed by classifying each software type, based on the history of present and predecessor copies of the software. A distribution factor is applied to each software type, based on the amount of advertising displayed by each software type and the length of time each software type has been installed. The partner revenue is distributed based on the distribution factor applied to each software type and a rate table. |
| US09652785B2 |
System and method for matching advertisements to multimedia content elements
A system and method for matching an advertisement item to a multimedia content element. The method comprises: extracting at least one multimedia content element from a personalized multimedia content channel, the personalized multimedia content channel having at least one user, wherein multimedia content elements in the personalized multimedia content channel are customized for each user; generating at least one signature of the at least one multimedia content element; searching for at least one advertisement item respective of the at least one generated signature; and causing a display of the at least one advertisement item within a display area of a user node associated with a user of the personalized multimedia content channel. |
| US09652777B2 |
Self optimizing and reducing user experiences
In an example embodiment, a method of dynamically optimizing a user interface on an electronic device is provided. A user interface is presented to a user, wherein the user interface includes one or more elements. User interactions with the one or more elements are then measured. The one or more elements of the user interface are then dynamically modified based on the measured user interaction. |
| US09652775B2 |
System, method, procedure and components for preparing an article for authentication and tracking
Persons and/or business entities (inquirers), interested in acquiring a BRANDED article, or availing themselves of a BRANDED service, upon seeing IDENTIFIER 110 with BRAND 120 of authenticator 54, as carried by the article or its packaging or associated with a service, are enabled to recognize that the BRAND SOURCE of such article(s) or service is authenticatable and the article trackable. By imaging the unique encoded symbology 112, carried by IDENTIFIER 110, and transmitting the image, and/or its decode, to administrator 54 authentication of the BRAND SOURCE and tracking of the article may be accomplished. Authenticator 54, upon receipt of the image, and/or decode, of the encoded symbology 112 carried by the article or service, may query authenticator data base 58 (FIG. 1) and seek a match, from data previously stored in data base 58 for stored data corresponding to the so received decode of the specific encoded symbology carried by the article or service. According to one aspect of this invention all inquiries concerning authentication of BRAND SOURCE are routed to authenticator 54. |
| US09652774B2 |
System and methods for selective advertising in media content
Embodiments of techniques for distributing and rendering media content are provided. In response to a request for a first media file, a combined media file is generated having first and second segments that together include data from the first media file and from a second media file. The combined media file is then provided to a player module operable to render only data from the first media file during a first operating mode, and operable to render data from both the first and second media files during a second operating mode. For example, the first media file may be a music file, and the second media file an advertisement. A consumer may play the music portion without special software or a license, but the advertisement will be rendered as well. Alternatively, the consumer may purchase a license and use special playback software to render the music without the advertisement. |
| US09652772B1 |
Systems and methods for fraud detection
The invention provides systems and methods for identifying fraud in an ATM transaction and in other financial processing environments. The system, tangibly embodied in the form of a computer processer includes a profile database, a filter processing portion, a scoring engine, and an authorization processing portion. The profile database contains card profiles and ATM profiles. The filter processing portion inputs transaction data generated from a requested ATM transaction. The filter processing portion includes a plurality of filters that filter high risk transactions, and outputs customer related data and ATM related data to the profile database. The scoring engine assesses risk of the high risk transaction based on attributes of the transaction, data in at least one card profile, and data in at least one ATM profile. The authorization processing portion determines whether the requested transaction should be approved or declined based on the fraud score and transaction data. |
| US09652769B1 |
Methods, apparatus and systems for securely storing and/or accessing payment information or other sensitive information based on tokens
A token is generated and processed as a substitute for sensitive information, e.g., payment information associated with a customer making a purchase of a product/service from a vendor. The customer's payment information is encrypted and stored in a first memory record of a secure computer system. A token is generated that includes memory-related information identifying the first memory record, and the token is transmitted to the vendor for storage in a customer record. To facilitate payment for the purchase, the vendor transmits the token to another party (e.g., a billing service or payment processor), and the encrypted payment information is read from the first memory record of the secure computer system based on the memory-related information in the token. The encrypted payment information is then decrypted to recover the payment information which is then used to effect payment. |
| US09652767B2 |
Method and system for maintaining privacy in scoring of consumer spending behavior
A method for maintaining consumer privacy in behavioral scoring includes a first computing system and a second computing system. The first computing system disguises consumer characteristics and maps disguised consumer characteristics to unencrypted account identifiers, and then transmits the data to the second computing system. The second computing system encrypts the account identifiers upon receipt, and maps the encrypted account identifiers to anonymous transaction data. The second computing system uses the transaction data to calculate consumer behavioral scores, and then generates a scoring algorithm that uses disguised consumer characteristics to calculate consumer behavior scores based on the calculated consumer behavioral scores and corresponding disguised consumer characteristics. The generated algorithm is then returned to the first computing system, with the second computing system not receiving any unencrypted account identifiers, any undisguised consumer characteristics, or any personally identifiable information. |
| US09652755B2 |
Method and system for securely updating field upgradeable units
Devices and methods for securely upgrading devices, such as field upgradeable units, are disclosed. In response to receiving an update object, a device may determine whether a predefined location of memory includes a predetermined value. Based on the value in the predefined location, the device may store the received update object in a verification portion of the memory. After verifying the authenticity of the update object, the device may copy the update object from the verification portion of the memory to an inactive portion. The inactive portion of the memory can be swapped with an active portion of the memory, such that the inactive portion becomes active. |
| US09652750B2 |
System and method for providing a distributed decisioning environment for processing of financial transactions
A system and method for providing one or more client systems for communicating with a host system over a network. The client systems use a scanner to convert a paper form of a check, coupon, or other paper document to a digital representation and then the client systems send the digital representation over a network to the host system for storage. The host system archives the digital representation and determines the appropriate processing stream for a transaction related to the paper document (e.g. coupon, check), via a decisioning engine, based on a set of predefined stream selection rules. The host system then communicates the transaction to a back end transaction destination, according to the selected processing stream. Examples of the transaction destination can include ACH, Reproduce Paper, and Remittance. |
| US09652748B1 |
Technology for automatically identifying and scheduling provider appointments in response to accident events
Systems and methods for managing accident events are disclosed. According to certain aspects, an electronic device may access sensor data associated with operation of a vehicle, and analyze the sensor data to determine that an accident event has occurred, where the accident event may have one or more effects such as damage or injury. The electronic device may also interface with a server to identify one or more providers who may be capable of addressing the effects of the accident event. The electronic device or the server may automatically schedule an appointment(s) with the one or more providers, resulting in an effective handling of the accident event. |
| US09652746B2 |
Systems and methods for delivering an entity report associated with an attendee of a calendared event
Systems and methods for delivering an entity report associated with an attendee of a calendared event are disclosed. A method for delivering an entity report associated with an attendee of a calendared event includes determining, by a computer, an entity associated with the attendee of the calendared event. The method further includes retrieving, by the computer, entity data based on the determined entity and generating the entity report. The entity report includes the retrieved entity data. The method further includes delivering the generated report. |
| US09652740B2 |
Fan identity data integration and unification
An analytical request for information that includes queryable attributes mapped to corresponding fields of customer records from in-memory database of a number of data sources is received. Semantic mapping of the queryable attributes to the corresponding fields of the customer records is resolved according to semantic mapping metadata. A query that includes the corresponding fields is generated and over the in-memory database views and a number fan records each representing a unique fan entity. Fan related data is retrieved from the number of fan records and the in-memory database views based on the executed at least one query. Upon executing the query, at runtime the in-memory database views are dynamically integrated with the number fan records based on a cross-reference table linking the in-memory database views with the number of fan records based on a fan identifier. |
| US09652738B2 |
System and method for a communication session identifier
Disclosed herein are systems, methods, and non-transitory computer-readable storage media for a communication session identifier. A communication session identifier can act as a virtual relay between conference participants, forwarding emails, phone calls, attachments, messages, and other information from a central address associated with the communications session identifier. In this manner, a user who desires to communicate with other conference participants only needs to send the communication to the communication session identifier, which in turn distributes the communication to the other parties. These communications can include emails, social networking messages, instant messaging, voice messages, and other forms of communication. |
| US09652736B2 |
Portable RFID reading terminal with visual indication of scan trace
A portable radio-frequency identifier (RFID) reading terminal can comprise a microprocessor, a memory, an RFID reading device, and a display. The portable RFID reading terminal can be configured to display a scan trace provided by a line comprising a plurality of time varying points. Each point can be defined by a projection of a radio frequency (RF) signal coverage shape of the RFID reading device onto a chosen plane at a given moment in time. |
| US09652735B2 |
System and method for reading data from a plurality of chips comprising an RFID tag
The present application provides a system which includes a registration unit which reads data from the chip located within the communication range at a first timing via the antenna, and registers the data in the database, an updating unit which reads data from the chip located within the communication range at a second timing which occurs later than the first timing via the antenna, and updates the database based on the data read, a determination unit which reads data from the chip located within the communication range at a third timing occurring later than the first timing via the antenna, and determines whether or not data of a chip other than the chip read is registered in the database, and a communication unit which, when it is determined by the determination unit that data of a chip other than the chip read is registered in the database, communicates individually with each chip other than the chip read. |
| US09652729B2 |
Metrology management
A method for managing a metrology system includes receiving a part, identifying, with a processing device, a part type associated with the part, retrieving, with the processing device, test rule logic associated with the part type from a database, retrieving, with the processing device, measurement data associated with the identified part type, processing, with the processing device, the measurement data, applying, with the processing device, the test rule logic to the processed measurement data to determine whether the part should be measured, outputting the part responsive to determining that the part should not be measured, and incrementing, with the processing device, a counter and saving a value of the counter in the database responsive to outputting the part responsive to determining that the part should not be measured. |
| US09652727B1 |
Mobile care with a virtual queue
An apparatus, a method, and a computer program receive a request message from a mobile device to connect with an agent and authenticate the request message and provisioning a database for enabled services and service location. A service provider is identified and selected from a plurality of service providers. As a result, the request message is transmitted to the service provider in order to determine availability of the service provider. |
| US09652725B2 |
Placeholder management in an activity manager in a collaborative computing environment
A method, system and apparatus for placeholder management in a unified activity manager in a collaborative computing environment. A method for managing placeholders in a unified activity manager in a collaborative environment can include the step of inserting a placeholder in an activity in lieu of a specified collaborator, resource, or event. The inserting step can include describing a type of resource without specifying an identity of an actual resource; and, inserting the described type in the placeholder. The inserting step also can include describing a type of event without specifying an identity of an actual event; and, inserting the described type in the placeholder. The inserting step also can include describing a type of collaborator without specifying an identity of an actual collaborator; and, inserting the described type in the placeholder. |
| US09652722B1 |
Methods and systems for robust supervised machine learning
A disclosed method may include iterating a model optimization process, the iterating including one or more iterations. The method may also include updating a classification model based on the iterating, the updating performed using training data. The method may further include generating a final version of the classification model based on a final iteration. The method may also include setting a parameter (q), the parameter corresponding to a total number of observations (Q) that are to be removed from the training data by the final iteration. The method may further include determining one or more corresponding numbers of observations to remove from the training data, where the corresponding number of observations are to be removed at some of select iterations tk, and the corresponding number of observations are to be removed based on the number Q and an estimate of the number of iterations remaining until the final iteration. |
| US09652717B2 |
Avoidance of supporting evidence processing based on key attribute predictors
Systems, methods, and computer program products to perform an operation comprising receiving a case, generating a set of candidate answers for the case, excluding a first candidate answer from the set of candidate answers upon determining that a first attribute in the case precludes returning the first candidate answer as a valid response to the case, and processing supporting evidence for the remaining candidate answers in the set of candidate answers. |
| US09652713B2 |
Apparatus and methods for developing parallel networks using a general purpose programming language
Apparatus and methods for developing parallel networks. Parallel network design may comprise a general purpose language (GPC) code portion and a network description (ND) portion. GPL tools may be utilized in designing the network. The GPL tools may be configured to produce network specification language (NSL) engine adapted to generate hardware optimized machine executable code corresponding to the network description. The developer may be enabled to describe a parameter of the network. The GPC portion may be automatically updated consistent with the network parameter value. The GPC byte code may be introspected by the NSL engine to provide the underlying source code that may be automatically reinterpreted to produce the hardware optimized machine code. The optimized machine code may be executed in parallel. |
| US09652711B2 |
Analog signal reconstruction and recognition via sub-threshold modulation
Certain aspects of the present disclosure support a method and apparatus for analog signal reconstruction and recognition via sub-threshold modulation. The analog waveform recognition in a sub-threshold region of an artificial neuron of the artificial nervous system can be performed by providing a predicted waveform in parallel to an input associated with the artificial neuron. The predicted waveform can be compared with the input and the signal can be generated based at least in part on the comparison. The signal can be a detection signal that detects matching and mismatching between the input and the predicted waveform |
| US09652709B2 |
Communications between multiple radio frequency identification (RFID) connected tags and one or more devices, and related systems and methods
Protocols, systems, and methods are disclosed for two or more RFID tags to communicate with each other and a device using direct connections. A disclosed system includes a first RFID tag, a second RFID tag, and a device. The first and second RFID tags are configured to mate to each other and directly exchange information. The second RFID tag is further configured to directly exchange information with the device such that information received directly at the second RFID tag from the first RFID tag may then be directly exchanged with the device. The first RFID tag may send a first tag identification directly from the first RFID tag to the second RFID tag. The second RFID tag may then send a first acknowledgement to the first RFID tag if the first tag identification was correctly received by the second RFID tag. |
| US09652707B2 |
Radio frequency identification (RFID) connected tag communications protocol and related systems and methods
Protocols, systems, and methods are disclosed for two or more RFID tags to communicate with each other using direct connections, wherein the two or more RFID tags are configured to mate and directly exchange identification information. A disclosed method includes detecting that a first RFID tag is connected to a second RFID tag. A first message comprising a first tag identification is sent directly from the first RFID tag to the second RFID tag, and the first RFID tag receives a first acknowledgement from the second RFID tag if the first tag identification was correctly received. A second message comprising a second tag identification may be sent directly from the second RFID tag to the first RFID tag and a second acknowledgement may be received from the first RFID tag if the second tag identification was correctly received. |
| US09652704B2 |
Method of providing content transmission service by using printed matter
Provided is a content delivery service method using printed matter. The content delivery service method using printed matter may include executing, by a first terminal, a service app and selecting an image, editing content on the selected image in an app screen, sending, by the first terminal, the image and information about the edited content to a server, storing, by the server, the image and the information about the edited content and sending information about the storage to the first terminal, generating, by the first terminal, specific recognition code in which the storage information has been recorded and inserting the specific recognition code into the image, and sending, by the first terminal, the image into which the recognition code has been inserted to a printing device so that the image is printed by the printing device. |
| US09652698B2 |
System and method for updating memories used to store information in a printing system
Electronic systems, such as printing systems, often use components that have a memory. The integral memory can be used to store information about the component. In some printing systems this memory includes storing a portion that stores a value indicative of an amount of a consumable that has been used. Discloses is a method and system for updating a memory that is integral to a component within a printing system. The value stored in the memory can be read to determine an amount of a consumable used. Alternatively, when a specific value is stored in the memory the printing system can deactivate the component. |
| US09652693B2 |
Automatic photo grouping by events
Intuitive photo grouping is accomplished utilizing photo metadata information, including photos' timestamps, GPS information, name and storage folder identity, to automatically generate logical and meaningful event photo groupings for users. |
| US09652689B2 |
Magnification factor estimation device and method for same
A magnification factor is estimated for a magnified image. A generating means generates an image by removing a high frequency component from an input image. A first calculating means calculates a high frequency component greater than or equal to a prescribed frequency component in the spatial frequency component of the input image, as a spatial frequency component characteristic value. A second calculating means calculates the spatial frequency component of the input image, as a second spatial frequency component characteristic value. A determining means determines whether each pixel is block noise. A magnification factor estimating means removes pixels determined to be block noise by the determining means from summation target pixels and, estimates the magnification factor of the input image to be higher when the difference between the first spatial frequency component characteristic values and second spatial frequency component characteristic values of the remaining pixels is smaller. |
| US09652688B2 |
Analyzing content of digital images
Methods, apparatuses, and embodiments related to analyzing the content of digital images. A computer extracts multiple sets of visual features, which can be keypoints, based on an image of a selected object. Each of the multiple sets of visual features is extracted by a different visual feature extractor. The computer further extracts a visual word count vector based on the image of the selected object. An image query is executed based on the extracted visual features and the extracted visual word count vector to identify one or more candidate template objects of which the selected object may be an instance. When multiple candidate template objects are identified, a matching algorithm compares the selected object with the candidate template objects to determine a particular candidate template of which the selected object is an instance. |
| US09652681B1 |
Using geospatial context information in image processing
Using geospatial context information in image processing is disclosed. Contextual information that identifies features in an area of earth is accessed. An image of the area of the earth is accessed. A mask is generated based on the contextual information. The mask spatially corresponds to the image and identifies at least one image portion of interest in the image and at least one image portion of non-interest in the image. The at least one image portion of interest is processed to detect a target depicted in the at least one image portion of interest. |
| US09652678B2 |
Method and device for reproducing content
Provided is a device including: a display unit configured to display handwritten content based on an analog handwritten input of a user; a user input unit that receives a user input of selecting a portion of the handwritten content displayed on the display unit; and a control unit reproduces a segment of multimedia content, which corresponds to the portion of the handwritten content, from the multimedia content synchronized with the handwritten content. |
| US09652672B2 |
Digital video content fingerprinting based on scale invariant interest region detection with an array of anisotropic filters
Video sequence processing is described with various filtering rules applied to extract dominant features for content based video sequence identification. Active regions are determined in video frames of a video sequence. Video frames are selected in response to temporal statistical characteristics of the determined active regions. A two pass analysis is used to detect a set of initial interest points and interest regions in the selected video frames to reduce the effective area of images that are refined by complex filters that provide accurate region characterizations resistant to image distortion for identification of the video frames in the video sequence. Extracted features and descriptors are robust with respect to image scaling, aspect ratio change, rotation, camera viewpoint change, illumination and contrast change, video compression/decompression artifacts and noise. Compact, representative signatures are generated for video sequences to provide effective query video matching and retrieval in a large video database. |
| US09652668B2 |
Enhanced contrast for object detection and characterization by optical imaging based on differences between images
Enhanced contrast between an object of interest and background surfaces visible in an image is provided using controlled lighting directed at the object. Exploiting the falloff of light intensity with distance, a light source (or multiple light sources), such as an infrared light source, can be positioned near one or more cameras to shine light onto the object while the camera(s) capture images. The captured images can be analyzed to distinguish object pixels from background pixels. |
| US09652667B2 |
Automatic generation of video from spherical content using audio/visual analysis
A spherical content capture system captures spherical video content. A spherical video sharing platform enables users to share the captured spherical content and enables users to access spherical content shared by other users. In one embodiment, captured metadata or video/audio processing is used to identify content relevant to a particular user based on time and location information. The platform can then generate an output video from one or more shared spherical content files relevant to the user. The output video may include a non-spherical reduced field of view such as those commonly associated with conventional camera systems. Particularly, relevant sub-frames having a reduced field of view may be extracted from each frame of spherical video to generate an output video that tracks a particular individual or object of interest. |
| US09652660B2 |
Control system, robot system, and control method
A control system includes a projection section that projects predetermined patterned light on a target object, a first imaging section that captures an image of the target object on which the predetermined patterned light is projected by the projection section, a second imaging section that is disposed in a position different from a position where the first imaging section is disposed and captures an image of the target object on which the predetermined patterned light is projected by the projection section, and a calculation section that calculates a three-dimensional shape of the target object based on a first point in a first captured image captured by the first imaging section and a second point in a second captured image captured by the second imaging section. |
| US09652655B2 |
System and method for estimating extracorporeal blood volume in a physical sample
One method for estimating the extracorporeal blood volume in a portion of a physical sample includes: extracting a feature from a portion of an image of the sample; tagging the portion of the image of the sample with a blood volume indicator according to the extracted feature; and estimating the extracorporeal blood volume in at least the portion of the physical sample, associated with the portion of the image of the sample, according to the blood volume indicator. |
| US09652653B2 |
Acceleration-based motion tolerance and predictive coding
A method of predicting the location of a region of interest within an image of a scannable object comprising providing a scanner having a processor and an image sensor; sensing in a viewing direction toward a scannable object, with an imaging plane being perpendicular to the viewing direction; capturing an image of the scannable object with the image sensor; sensing motion of the scanner within a motion sensor plane relative to the scannable object, the motion sensor plane being parallel to the imaging plane; outputting a velocity and a movement direction corresponding to the velocity; locating a region of interest in said captured image in response to the velocity and the movement direction; and scanning the captured image beginning with the region of interest. |
| US09652650B2 |
Method for updating indicia readers
An indicia reader system includes: an indicia reader for reading symbol indicia and producing a symbol signal representative of the symbol indicia, the indicia reader capable of transferring and receiving data formatted in a plurality of protocols; a controller capable of transferring and receiving data formatted in a plurality of protocols; and, a translation interface for translating data from the controller which is in a first protocol to a second protocol for receipt by the indicia reader. |
| US09652648B2 |
Positioning an object with respect to a target location
Systems and methods are provided for positioning an object with respect to a target location, such as for auto-focusing. One implementation includes a positioning device, which includes a reference object having a plurality of dark-shaded bars arranged in parallel with and separated from each other by spaces equal to a width of each of the bars. The positioning device also includes a motor configured to move in a reciprocating manner and a sensor configured to sense at least one of the bars or spaces. The motor is connected to the reference object or the sensor and moves the reference object or sensor with respect to the other. The motor is configured to stop at a target location in two phases of motion. |
| US09652646B1 |
Methods, systems and apparatuses for radio frequency identification
A system for radio frequency identification (RFID) includes an enclosure defining an interior region interior to the enclosure, and a feed for generating an electromagnetic field in the interior region in response to a signal received from an RFID reader via a radio frequency (RF) transmission line and, in response to the electromagnetic field, receiving a signal from an RFID sensor attached to an item in the interior region. The structure of the enclosure may be conductive and may include a metamaterial portion, an electromagnetically absorbing portion, or a wall extending in the interior region. Related apparatuses and methods for performing RFID are provided. |
| US09652639B2 |
Card holding member and card connector
A card holding member is provided for holding a card with terminal members and insertion into a card connector. The holding member comprises a frame portion containing a front frame portion in front of the holding member in the insertion direction and side frame portions connected on both ends to the front frame. The frame portion includes a metal portion composed of a metal panel and a resin portion covering at least some of the periphery of the metal portion. The front end surface of a front metal frame of the metal portion is exposed on the front end surface of the front frame. The front metal frame includes a subsiding portion. The front surface of the subsiding portion is flush with the front end surface of the front metal frame and includes a section displaced from the front end surface in the thickness direction of the front frame. |
| US09652628B2 |
Systems, methods, and computer program products for interfacing multiple service provider trusted service managers and secure elements
System, methods, and computer program products are provided for interfacing between one of a plurality of service provider (SP) trusted service managers (TSM) and one of a plurality of secure elements (SE). A first request including a mobile subscription identifier (MSI) is received from an SP TSM over a communications network. At least one memory is queried for SE data including an SE identifier corresponding to the MSI. The SE data is transmitted to the SP TSM over the communications network. A second request based on the SE data is received from the SP TSM over the communications network. A third request, based on the second request, is transmitted, over a mobile network, to an SE corresponding to the SE data. The mobile network is selected from multiple mobile networks, and is determined based on the SE data queried from the memory. |
| US09652623B2 |
Electronic address book storing apparatus and method for storing electronic address book
An electronic address book storing apparatus keeps a login user's information confidential. A destination information storing section is configured to store items of registered destination information. Each item of registered destination information including a right-of-use associated with a registered user. An information extracting section is configured to extract an item of registered destination information from the destination information storing section in response to a login user's command. The extracted item of registered destination information is associated with the login user's right-of-use. A display controller is configured to display the extracted item of registered destination information to the login user. |
| US09652621B2 |
Electronic transmission security process
An electronic transmission system and method for converting and transmitting transmissions to provide secure communication between a plurality of users and protect or secure content of each transmission by preventing unauthorized individuals from capturing and viewing or hearing the transmitted content in its entirety. The electronic transmission system breaks a transmission apart into a random plurality of pieces and randomly transmits each piece separately to a plurality of remote servers. If an unauthorized party tries to intercept and access an electronic transmission, they will not be able to capture the entire transmission and will not be able to recompile its actual content, but rather misleading content. A password or other suitable authentication requirement(s) authenticates the intended recipient and allows the original pieces to be retrieved and re-compiled for viewing or hearing. |
| US09652619B2 |
Method of inputting confidential data on a terminal
The invention relates to a method of inputting confidential data on a terminal including an input interface, at least one processor for running a trusted program and a display screen, the method including the following steps applied before the input: taking exclusive control of the input interface by the trusted program; displaying on the screen a trusted image known to the user of the terminal to indicate that exclusive control of the input interface has been taken by the trusted program; after control has been taken and before displaying the trusted image, selecting the trusted image as part of a reference image predetermined by the user, wherein the selected trusted image varies from one input to another. The invention also relates to a terminal for use of said method. |
| US09652616B1 |
Techniques for classifying non-process threats
Techniques for classifying non-process threats are disclosed. In one particular exemplary embodiment, the techniques may be realized as a method for classifying non-process threats comprising generating trace data of at least one observable event associated with execution of a process, representing a first feature of the at least one observable event of the trace data, calculating, using a computer processor, a similarity between the first feature and at least one sample feature, and classifying the process based on the similarity. |
| US09652615B1 |
Systems and methods for analyzing suspected malware
The disclosed computer-implemented method for analyzing suspected malware may include (1) identifying a file suspected of including malware, (2) performing a static analysis of the file to identify at least one indication of an attack vector that the file uses to attack computing systems, (3) obtaining, from at least one computing system, telemetry data that identifies at least one indication of an attack vector that the file uses to attack computing systems, (4) constructing, using the indications obtained from the static analysis and the telemetry data, an execution profile that describes an execution environment that provides the attack vectors indicated by the static analysis and the telemetry data, and (5) configuring the execution environment described in the execution profile to test the file for maliciousness. Various other methods, systems, and computer-readable media are also disclosed. |
| US09652613B1 |
Virus detection by executing electronic message code in a virtual machine
An intermediary isolation server receives electronic messages and isolates any viral behavior from harming its intended destination. After the intermediary receives an electronic message, it determines that the electronic message has associated executable code, and then identifies the environment in which the electronic message code would be executed if delivered. The intermediary then executes the code by emulating how it would be executed in its ultimate environment. If a viral-like behavior is detected, appropriate action is taken to prevent the execution of the code at its intended destination. The attachment is executed in a contained environment that allows for the contained environment to be easily restarted in a clean state. |
| US09652603B1 |
Fingerprint identification device
A fingerprint identification device is directly integrated with and formed on a touch panel, a color filter (CF), a thin-film transistor (TFT) or a liquid crystal module (LCM). The fingerprint identification device improves the shortcoming of the conventional fingerprint identification device that it is necessary to first manufacture the fingerprint identification device on a silicon wafer and then integrate the fingerprint identification device with another component. Moreover, the fingerprint identification device has much higher fingerprint identification precision. |
| US09652602B2 |
Method, system and computer program for comparing images
A method of verifying, by a processing system, whether a user of a device corresponds to a previously authenticated user. The processing system has access to a first image and a second image. The first image is an image of an identity document comprising an image of the previously authenticated user. The second image is an image captured by the device. The method comprises: comparing said first image to said second image, whereby to determine whether they are images of the same user; and, in the event that it is determined that the first and second images are images of the same user: designating one of the first and second images as a higher quality image; and, storing said designated image as a validated image of the previously authenticated user. |
| US09652601B2 |
Method for plagiarism detection of multithreaded program based on thread slice birthmark
A method for plagiarism detection of multithreaded program based on a thread slice birthmark includes steps of: 1) monitoring target programs during executing, real-time identifying system call, and recording related information comprising thread IDs, system call numbers, and return values; then pre-treating the information for obtaining a valid system call sequence Trace; 2) slicing the valid system call sequence Trace, for generating a series of thread slices Slice identified by the thread IDs; 3) generating dynamic thread slice birthmarks Birth of all the thread slices of two programs; 4) respectively generating corresponding software birthmarks PB1 and PB2 of the P1 and the P2 ; 5) matching based on a max bilateral diagram for calculating a max similarity between the software birthmarks PB1 and PB2; and 6) determines whether the program is plagiarized or not according to an average value of the birthmark similarity and a given threshold ε. |
| US09652592B2 |
Analyzing data from a sensor-enabled device
An approach for analyzing data collected by a sensor-enabled device over a network is provided. Specifically, in a typical embodiment, a set of usage data will be received from a device over a network. The set of usage data may be collected via at least one sensor integrated with the device, and the set of usage data may pertain to use of the device by a user. Regardless, the set of usage data will be compared to a set of diagnostic information stored in at least one computer storage device. The set of diagnostic information typically pertains to a condition (e.g., medical) treated by use of the device (e.g., dental, cardiac, renal, etc.). Based on the comparison, at least one determination (e.g., diagnosis, treatment plan, level of compliance with applicable standards, etc.) will be made and a set of reports will be generated based thereon. |
| US09652587B2 |
Bambam: parallel comparative analysis of high-throughput sequencing data
The present invention relates to methods for evaluating and/or predicting the outcome of a clinical condition, such as cancer, metastasis, AIDS, autism, Alzheimer's, and/or Parkinson's disorder. The methods can also be used to monitor and track changes in a patient's DNA and/or RNA during and following a clinical treatment regime. The methods may also be used to evaluate protein and/or metabolite levels that correlate with such clinical conditions. The methods are also of use to ascertain the probability outcome for a patient's particular prognosis. |
| US09652586B2 |
Method and system for faster and more sensitive homology searching
An area of research in the field of bioinformatics deals with the identification of similarities within one, or between two DNA sequences. Current techniques are quite slow and many matches are missed. The invention provides a faster and more sensitive solution, by using “optimized spaced seeds” to perform these biological sequence homology searches. Various techniques are shown for identifying seeds which are optimized to improve the sensitivity or speed of the searching. In the preferred embodiment, optimized spaced seeds are determined by the parameters of the search and independent of the actual databases being searched (for example, using the length and weight of the spaced seed, as well as the probability of a hit in a similar region). Thus, these optimized seeds can be stored in libraries which are accessed as required. |
| US09652583B2 |
Methods and apparatus to automatically fabricate fillers
Methods and apparatus to automatically fabricate fillers are disclosed. An example method includes aligning rigid surface data with flexible surface data, the rigid surface data and the flexible surface data being permitted to overlap when aligned; when aligned, defining the rigid surface data and the flexible surface data based on a same parameter space; calculating a displacement function based on differences between corresponding ones of first points in the flexible surface data and second points in the rigid surface data; determining a modified position of a first one of the first points by modifying the first one of the first points based on a value of the displacement function; calculating a gap between the modified position of the first one of the first points and a second one of the second points; and creating a physical filler to fill a physical gap corresponding to the calculated gap. |
| US09652580B2 |
Integrated circuit layout design system and method
A method of generating a photo mask for use during fabrication of a semiconductor device includes; generating an initial layout design including critical circuit paths and non-critical circuit paths by shielding all gate line patterns used to implement transistors in the critical circuits and non-critical circuits, and thereafter generating a layout design from the initial layout design by selectively un-shielding a non-critical gate line pattern among the gate line patterns used to implement a gate of a non-critical transistor in a non-critical circuit, while retaining the shielding of all critical gate line patterns among the gate line patterns. |
| US09652565B2 |
System and method for producing display of petrophysical property height profile for both vertical and horizontal wellbores
A computerized system creates and communicates to a user a wellbore property-height profile of a selected property, such as permeability, at each cell location defining the wellbore. The property-height value is determined based on a “summation from base” algorithm. The system may also be used to create a property-height profile in horizontal and slant wells, by creating a plurality of vertical pseudo-wells which intersect the trajectory of the horizontal or slant well. |
| US09652561B2 |
Method, system and program for processing input data to facilitate selection of a corresponding tag candidate
According to an illustrative embodiment an information processing system is provided. The system includes a processor for determining one or more candidate tags based on input data, the candidate tags being included within a hierarchical structure; and a display for displaying the candidate tags in a manner indicative of the candidate tags' positions in the hierarchical structure. |
| US09652557B2 |
Methods for presenting online advertising at a social network site based on correlating users and user adoptions
An advertising system generates customized advertising for social network members. The ads results are personalized based on members' explicit and implicit interests derived from user actions, advertising and content selections, friend designations, etc. |
| US09652553B2 |
Method and device for displaying a web page
Embodiments of the present application relate to a method for displaying a web page, a system for displaying a web page, and a computer program product for displaying a web page. A method for displaying a web page is provided. The method includes pre-processing text information to be picture processed in a web page, creating a picture, generating a position description for each text block in the picture, filling the corresponding text blocks into the picture based on the position descriptions, generating a call address for the picture, and correspondingly saving the call address and the position description of each text block as metadata. If an access request for the web page is received, invoking the metadata, loading the picture, selecting at least one corresponding text block from the picture, and displaying the at least one text block is performed. |
| US09652550B2 |
Indexing application pages of native applications
Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for indexing application pages of native applications that operate independent of a browser application on a user device. In one aspect, a method includes instantiating a virtual machine emulating an operating system of a user device; instantiating, within the virtual machine, a native application that generates application pages for display on a user device within the native application; accessing, within the virtual machine, application pages of the native application, and for each of the application pages: generating application page data describing content of the application page, the content described by the application page data including text that a user device displays on the application page when the user device displays the application page; and indexing the application page data for the native application in an index that is searchable by a search engine. |
| US09652545B2 |
Result types for conditional data display
A set of user interfaces is provided to an administrator of a website. The user interfaces enable the administrator to configure search functionality of the website to present different types of search results differently. For instance, the administrator can use the user interfaces to configure the search functionality to present different properties for search results belonging to different result types. |
| US09652534B1 |
Video-based search engine
A video search system provides a user with a list of videos that are similar to a reference video selected by the user. A client device operated by the user may receive the reference video and transmit it to the video search system. The video search system generates a reference textual representation of actions depicted in the reference video based on an analysis of the contents of the reference video. The video search system further compares the reference textual representation with a plurality of textual representations generated based on videos stored in a library of videos. Based at least partly on the comparison, the video search system generates video search results that are provided to the client device. In certain functions, the client device may generate the reference textual representation and transmit the reference textual representation to the video search system for comparison. |
| US09652533B2 |
Information processing device, information processing method, and program for the same
An information processing device includes: a storage unit; a first display control unit; and a demanding unit. The storage unit that stores attribute data representing specified attribute of contents and category data representing a category of the attribute correlated to each other. The first display control unit that provides controls for displaying information for a selected attribute and for displaying, in a categorized state, information for related attributes correlated to the same category as that of the attribute on a correlation display screen. The demanding unit that demands data search by referring to the correlated attribute selected corresponding to information selected from among those displayed on the correlation display screen to an information provision device. |
| US09652529B1 |
Methods and systems for augmenting a token lexicon
Methods and systems for augmenting a token lexicon are presented. In one embodiment, a method comprising identifying a first token from a search request, storing the first token in a lexicon data storage, receiving a character string comprising a second token, wherein the second token is substantially similar to the first token, and parsing the character string using the lexicon data storage to resolve the second token is set forth. According to another embodiment, a method comprising identifying a first token from an internet article, storing the first token in a lexicon data storage, receiving a character string comprising a second token, wherein the second token is substantially similar to the first token, and parsing the character string using the lexicon data storage to resolve the second token is set forth. |
| US09652528B2 |
Prompting subject matter experts for additional detail based on historical answer ratings
An approach is provided for evaluating a potential post based on historical data. In the approach, historically highly rated attributes that to previously received highly rated posts are identified. The process receives a potential post from an online Subject Matter Expert (SME). The process analyzes the potential post, using a Natural Language Processing (NLP) routine performed by computer processors. The analysis identifies a lack of one or more of the historically highly rated attributes in the potential post. The process then notifies the SME, based on the analysis, regarding the lack of one or more of the historically highly rated attributes in the potential post. |
| US09652524B2 |
System and method for creating topic neighborhood visualizations in a networked system
A computer-implemented system and method for creating topic neighborhoods and a visualization for related topic neighborhoods in a networked system are disclosed. The apparatus, in an example embodiment, includes a neighborhood generator configured to receive user input that identifies a topic for association with a neighborhood; create a neighborhood in association with the identified topic; gather neighborhood information using the identified topic as a search term to search from sources including information related to the topic; automatically invite users to join the created neighborhood; and provide access to the neighborhood via a neighborhood visualization on a webpage. |
| US09652523B2 |
Aging of friends in social network
Social network relationships are “aged” in that if a social network friend has not communicated with a user's social network site in a certain amount of time, then the friend is downgraded to “acquaintance” level automatically. One result may be that the “acquaintance” does not see certain postings to the website. The “aging” setting can be programmable on the social networking site so that users can elect to employ the “aging” or not. The downgrading of social standing of people in social network allows a more streamlined and private way to communicate with those with whom the user has an on-going social network relationship. Similarly, based on aging, “close friends” can be automatically downgraded to just “friends”. When the aging happens, the aged friend may be cut off from certain postings, mimicking a natural way that relationships evolve. |
| US09652522B2 |
Object naming
A processor-implemented method, system, and/or computer program product names an object comprising a set of properties. One or more processors define a property as a name of the object, and then generate a name for the object with a naming scheme referring to properties of the object and connected objects. The processors store the generated name as part of the defined property. In response to the processors detecting changes in the referred properties and connected objects, the stored name is automatically updated according to the naming scheme. |
| US09652521B2 |
Compressing massive relational data
A relational dependency transform is introduced as a way to exploit information redundancy in conditioning data in a relational database for better compressibility. An optimum relational dependency transform of the relational database is first computed. Fields of the relational database are then sorted topologically based on a weighted, directed graph having nodes representing predictor and predictee fields. For each predictee field in the topological order, a transformed field is then computed via the relationship between predictor and predictee in the optimum relational dependency transform. |
| US09652519B2 |
Replicating data across multiple copies of a table in a database system
A mechanism is provided for handling transaction messages in asynchronous data replication in a database system, in which the database system includes a source node and a target node, and each transaction message has information concerning a row change to a table copy at the source node. The mechanism determines whether a first transaction message has a dependency on a preceding non-completed transaction message. Responsive to the first transaction message having a dependency on the preceding non-completed transaction, the mechanism holds the first transaction message, completes the preceding non-completed transaction message including applying the row change associated with the preceding non-completed transaction message to the table copy at the target node, and responsive to completing the preceding non-completed transaction message, and releases the first transaction message and applying the row change associated with the first transaction message to the table copy at the target node. |
| US09652517B2 |
Data management system
In connection with processing asynchronous streams of aircraft telemetry data, data processing logic is developed to run on multiple aircraft, even if different avionics equipment are installed on the aircraft. An electronic inventory system tracks all data available on affected aircraft. A set of “global” data elements applicable to all aircraft in a fleet is defined and is tracked in the electronic inventory system, with relationship to the underlying native data elements and specific aircraft. The global units are derived as appropriate, for each specific aircraft avionics environment. An interface enables definition of data processing logic that is integrated with the electronic inventory system and ensures the general validity of the defined logic. The data processing logic is deployed to one or more aircraft in a function integrated with the electronic inventory system, to ensure the validity of the data processing logic for each aircraft specified as a deployment target. |
| US09652513B2 |
Generating data pattern information
A data storage system stores at least one dataset including a plurality of records. A data processing system, coupled to the data storage system, processes the plurality of records to produce codes representing data patterns in the records, the processing including: for each of multiple records in the plurality of records, associating with the record a code encoding one or more elements, wherein each element represents a state or property of a corresponding field or combination of fields as one of a set of element values, and, for at least one element of at least a first code, the number of element values in the set is smaller than the total number of data values that occur in the corresponding field or combination of fields over all of the plurality of records in the dataset. |
| US09652509B2 |
Prioritization of continuous deployment pipeline tests
A method to prioritize a plurality of tests in a continuous deployment pipeline. The method ranks the plurality of tests based on a test attribute and a test context to provide a test rank for each of the plurality of tests. The method sets a test set for the continuous deployment pipeline using the test ranks. The method executes the test set in the continuous deployment pipeline. |
| US09652505B2 |
Content search pattern matching using deterministic finite automata (DFA) graphs
An improved content search mechanism uses a graph that includes intelligent nodes avoids the overhead of post processing and improves the overall performance of a content processing application. An intelligent node is similar to a node in a DFA graph but includes a command. The command in the intelligent node allows additional state for the node to be generated and checked. This additional state allows the content search mechanism to traverse the same node with two different interpretations. By generating state for the node, the graph of nodes does not become exponential. It also allows a user function to be called upon reaching a node, which can perform any desired user tasks, including modifying the input data or position. |
| US09652503B2 |
Methods and apparatus for monitoring execution of a database query program
A method includes, receiving, during a first portion of an execution of a main program including a database query program and based on a first configuration for monitoring the database query program, a parameter value representing performance of execution of the database query program. The method further includes determining that a performance condition has been satisfied based on the parameter value, and triggering execution of a second configuration for monitoring the database query program during a second portion of the execution of the main program in response to the performance condition being satisfied. |
| US09652502B2 |
Method and system for continuous query processing
The invention relates to a method and system that provide a continuous querying mechanism that analyses real-time data streams to generate relevant results. It leverages data grid and event processing technology to provide a high performance and extremely scalable continuous querying solution. An embodiment of the invention provides a flexible querying language and data storage to allow users to register their interest in specific types of data, e.g. processes. The users are notified of matching results using an event-based mechanism. In order to efficiently analyze a large amount of data, the embodiment uses a grid infrastructure that allows storage of the data across many grid nodes and distributes the query execution workload, avoiding the bottleneck represented by constantly querying a database. Continuous queries are stored in a Continuous Query Registry and that Registry is invoked every time an insert or update event occurs on the triple store. |
| US09652500B2 |
Transformation and classification of time spent in collaborative activities for assessing organizational productivity and effectiveness
The assessing of collaboration time includes the extraction of collaboration data from collaborators and storing the collaboration data as a dataset. Attributes for each of the collaborators is defined, and a group of collaborators is defined by filtering based on the attributes. For the dataset, collaboration time is assigned for each member of the group using the collaboration data. Data from certain activities by collaborators are mined as representative of the collaboration activities, and in combination with organizational structure data, time is allocated between people, teams, and companies for the purpose of assessing organizational productivity and effectiveness. No manual data gathering or imposition on collaborators to provided data is required. Real data for the collaborative activities are used, instead of self-reported data. This provides a more granular picture of how time is allocated to relationships and activities than could be gathered manually. |
| US09652499B1 |
Search-based recommendation engine
The embodiments determine the recommendations for a search term and its criteria, whereby a threshold is used for accepting a result, whether it is a document, message, file, or any other form of communication. The input may be part of a larger repository, and there is no restriction on how many documents constitute the returned recommendation set. |
| US09652488B2 |
Computer product, verification support method, and verification support apparatus
A computer-readable recording medium stores a program that causes a computer to execute a verification support process that includes acquiring a series of data transmitted and received between apparatuses; creating a plurality of data groups by dividing the series of acquired data; detecting among the created data groups, a data group that includes given data acting as an issuance request for identification information of a transmission source; adding the given data to the beginning of subsequent data groups that are among the created data groups and transmitted after the detected data group; and outputting the subsequent data groups to which the given data has been added. |
| US09652487B1 |
Programmable checksum calculations on data storage devices
Techniques for performing data-related operations using data storage devices are described herein. Data storage devices are configured and/or enabled to perform data operations against one or more logical data addresses thereon. The data storage device receives a request including at least executable instructions defining the data operations to be performed and a range of logical data addresses upon which to execute the data operations. Upon request, either the same request as the one defining the data operations or in a separate request, the defined data operations are executed against the specified logical data addresses. |
| US09652485B1 |
Method and apparatus for namespace versioning
Methods and systems for digital asset management are described. Some embodiments provide methods and systems for: (1) a high-performance database system for storing assets and the associated metadata, (2) computing an inverse delta between two files without generating any intermediate files or deltas, (3) uniquely identifying a digital asset and storing the digital asset's namespace change history in a version control system, (4) inferring dependencies amongst namespace changes, (5) a workflow management tool that is tightly integrated with a version control system, (6) publishing milestones in a project which can consistently maintain the namespace uniqueness invariant, and/or (7) implicitly versioning data and/or files that are associated with certain types of digital assets in a version control system. |
| US09652480B2 |
Backup management of software environments in a distributed network environment
Backup management of software environments in a distributed network environment includes: Creating a platform specific software environment according to a predefined software environment definition by a user in the network environment; automatically creating a generalized backup of the software environment by extracting platform independent data contents and platform specific transformation rules; automatically calculating enhanced meta data describing the generalized backup; assigning the enhanced metadata with the predefined software environment definition; registering the generalized backup with the enhanced metadata in a backup storage accessible by a plurality of distributed users connected via said network environment, creating a software environment according to a predefined software environment definition by automatically checking the backup storage for an available generalized backup by means of the predefined software environment definition. |
| US09652474B2 |
Providing regional content by matching geographical properties
A method and a system provide regional content to users by associating data files with geographical properties and matching the geographical property of a data file with the geographical property of the user. The system extracts geographical information from a data file, and associates the data file with a source geographical property corresponding to the extracted geographical information according to a geographical information database. Upon obtaining a user geographical property of a user, the system provides the data file to the user if the source geographical property matches the user geographical property. The method and the system may be implemented using a geographical name lexicon or a geographical name suffix lexicon. |
| US09652473B2 |
Correlating social media data with location information
Techniques for correlating social media data with location information are described. In at least some embodiments, social media data is gathered from a social media platform, and the social media data is processed to determine correlations between topic information from the social media data and locations. The correlations can be aggregated to generate a database of social media information. The database can be searchable with various search terms to determine interest levels at different locations for topics associated with the social media data. Results of such a search can be provided in a variety of ways, such as via maps, tables, and so on. |
| US09652469B2 |
Clustered file service
A cluster based file service may operate on a cluster of two or more independent devices that have access to a common data storage. The file service may have a namespace definition with each device in the cluster, but may be modified by any device operating the file service. Each instance of the file service may identify and capture a command that changes the namespace structure and cause the change to be propagated to the other members of cluster. If one of the devices in the cluster does not successfully perform an update to the namespace structure, that device may be brought offline. The cluster based file service may permit adding or removing devices from the cluster while the file service is operating, and may provide a high throughput and high availability file service. |
| US09652465B2 |
Aggregate service with enhanced cloud device management
One embodiment provides a method, comprising: receiving, from a client device, a request by a user to access an aggregate service device; authenticating, at an aggregate service device, the user to provide access to a plurality of cloud storage accounts of the user hosted by a single cloud storage service; providing, by the aggregate service device, data analogous to data of the plurality of cloud storage accounts; receiving, by the aggregate service device, a selection of data accessible by the user from the plurality of cloud storage accounts of the user; and facilitating data transfer associated with the selection. |
| US09652464B2 |
Systems and methods for continuous active data security
Systems and methods are provided for active continuous data security. An active receiver module, an active marker module, an active transmitter module and an active profiler module work together to monitor data requests, detect suspicious activity and characteristics, and responds to hinder the suspicious activity. A method includes: obtaining a request for data; obtaining a characteristic associated with the request for data; comparing the characteristic with a database of known patterns and characteristics to determine if the request is suspicious; storing the request and the characteristic in the database for future comparison; and initiating a response to hinder the request for the data when the request is determined to be suspicious. Markers embedded in data are used to track the data, including data that is exposed to a security risk. Pattern detection is used to uncover suspicious activity and the systems are able self-learn as more data is provided. |
| US09652462B2 |
Identifying responsive resources across still images and videos
Methods, systems, and apparatus, including computer programs encoded on computer storage media, for associating still images and videos. One method includes receiving a plurality of images and a plurality of videos and determining whether the images are related to the videos. The determining includes, for an image and a video, extracting features from the image and extracting features frames of the video, and comparing the features to determine whether the image is related to the video. The method further includes maintaining a data store storing data associating each image with each video determined to be related to the image. |
| US09652461B2 |
Method and system for providing targeted marketing and services in an SDARS network
A targeted area audio distribution system for Satellite Digital Audio Radio Services Receivers (“SDARS”) provides specific content to listeners based on location. A service provider can facilitate delivery of local content using a telematics device installed in the listener's vehicle. The telematics device uses a content database indexed on an identifier formed from coordinates of a desired geographical area to target particular content for users in a targeted area as small as a few blocks. In addition, interstate drivers can receive location specific advertisements for exits that they may be approaching. Digital audio content can be queued up for insertion into the audio stream based on specific locations. The identifier can also be used to report vehicle performance information from a plurality of vehicles to facilitate providing real-time traffic conditions for many traffic corridors. |
| US09652458B1 |
Deriving associations between assets
A system and method for deriving associations between assets is disclosed. The system comprises a signature module, a matching module and an association module. These components of the system are communicatively coupled to each other. The signature module generates a first fingerprint for a first asset. The matching module determines a matching fingerprint that matches the first fingerprint from a candidate set. The matching module determines a first asset type for the first asset associated with the first fingerprint and a second asset type for a second asset associated with the matching fingerprint. The matching module determines an association test. The association module associates the first asset with the matching asset based on whether the association test is passed. |
| US09652455B2 |
Dynamic language translation of web site content
A method, system and computer program product for providing translated web content is disclosed. The method includes receiving a request from a user on a web site, the web site having a first web content in a first language, wherein the request calls for a second web content in a second language. The method further includes dividing the first web content into a plurality of translatable components and generating a unique identifier for each translatable component. The method further includes identifying a plurality of translated components of the second web content using the unique identifier of each of the plurality of translatable components of the first web content and putting the plurality of translated components of the second web content to preserve a format that corresponds to the first web content. The method further includes providing the second web content in response to the request that was received. |
| US09652453B2 |
Estimation of parameters for machine translation without in-domain parallel data
A system and method for estimating parameters for features of a translation scoring function for scoring candidate translations in a target domain are provided. Given a source language corpus for a target domain, a similarity measure is computed between the source corpus and a target domain multi-model, which may be a phrase table derived from phrase tables of comparative domains, weighted as a function of similarity with the source corpus. The parameters of the log-linear function for these comparative domains are known. A mapping function is learned between similarity measure and parameters of the scoring function for the comparative domains. Given the mapping function and the target corpus similarity measure, the parameters of the translation scoring function for the target domain are estimated. For parameters where a mapping function with a threshold correlation is not found, another method for obtaining the target domain parameter can be used. |
| US09652449B2 |
Method and apparatus for detecting a sentiment of short messages
A method, computer readable medium and apparatus for detecting a sentiment for a short message are disclosed. For example, the method receives the short message, and obtains an abstraction of the short message. The method then determines the sentiment of the short message based upon the abstraction. |
| US09652446B2 |
Automatically adjusting spreadsheet formulas and/or formatting
In some embodiments, a computer-implemented spreadsheet management method is provided that automatically copies formatting and formulas from appropriate peer rows to an updated row. In some embodiments, the method automatically determines which peer rows, if any, should be used as the source of copied formatting and formulas. In some embodiments, the method automatically fixes formulas that are affected by the updated row in order to maintain consistency throughout the spreadsheet. |
| US09652440B2 |
Concurrent utilization of a document by multiple threads
A computing system concurrently executes a builder thread and a reader thread. The builder thread modifies a document by modifying an active representation of the document. The reader thread perform operations regarding the document using a non-active representation of the document. The active representation of the document and the non-active representation of the document are stored in a memory of the computing system. The active representation of the document and the non-active representation of the document do not include different copies in the memory of the same data. When reading data in the non-active representation of the document, logical consistency is ensured without locking any data in the non-active representation of the document. |
| US09652438B2 |
Method of distinguishing documents
The document relates to a method for visually indicating on a display those documents that have been displayed a plurality of times on a plurality of axes of documents based on a matching value of an attribute, the method comprising providing a first group of documents at least some of which associated with one or more attributes; displaying documents of the first group of documents along a first axis; receiving an input representing a selected attribute of one of the first group of documents that is associated with one or more attributes; displaying to a second axis documents of the first group of documents that has a value matching the value of the user-selected attribute; and displaying a visual distinctive feature for each displayed document in the first group of documents that is displayed along the second axis, whereby a user is able to visualize which documents displayed along the first axis are also displayed on the second axis for having a value matching the value of the selected attribute. A system and a graphical user interface providing same are also provided. |
| US09652437B2 |
Solution method and solution apparatus for underdetermined system of linear equations
A solution method for solving an underdetermined system of linear equations, in which the number of elements of a variable to be determined is N and the number of linear equations is M (where M and N are integers satisfying 1≦M |
| US09652434B1 |
Modification indication implementation based on internal model
The subject disclosure is generally directed towards caching property values in a sparse cache for use in translating notifications to contain previous and source property values, e.g., for use in SMI-S compliant notifications (modification indications). When a modification indication that needs a previous instance and source instance, but only the source instance is available, a cache is accessed to obtain the previous property value. The modification indication is translated to contain the previous and source instance, and output, e.g., to a client subscriber. The cache is updated with the property values of the source instance in anticipation of being needed for a subsequent modification indication of that property. |
| US09652432B2 |
Efficient and scalable system and computer program product for handling RX packet on a MR-IOV array of NICS
There are provided a system and a computer program product for operating of network cards in computing systems. The computing systems detect resource utilization of all network cards of physical servers connected via one or more networks. The computing systems monitor network statistics of the network. The computing systems determine an operation of each network card connected to the network according to the monitored network statistics. |
| US09652428B2 |
Coupling device and method for dynamically allocating USB endpoints of a USB interface, and exchange trading system terminal with coupling device
The invention relates to a method and a coupling device (10) for dynamically allocating USB endpoints (31, 32, 33, 34) of a USB interface (30), which can be accessed using at least two applications, comprising: a USB interface (30) that has at least two ports (P0, P2, P4), each of which comprises at least one USB endpoint (31, 32, 33, 34); and a control device (20) for dynamically allocating the USB endpoints (31, 32, 33, 34). The control device is designed so as to preconfigure each USB endpoint (31, 32, 33, 34) which is required for the at least two applications by means of an initialization process, and thus the control device can switch the allocation of the endpoints according to the access using at least one of the applications without the USB endpoints (31, 32, 33, 34) affected by the switch having to be deactivated. |
| US09652422B2 |
Multi-bus system
A multi-bus system includes a first layer bus, a second layer bus connected to the first layer bus, at least one master device, and a decoder. The at least one master device is configured to be connected to the first layer bus via a first data path, and configured to be connected to the second layer bus via a second data path. The decoder is configured to directly connect the at least one master device to the first layer bus via the first data path, and directly connect the at least one master device to the second layer bus via the second data path. |
| US09652418B2 |
High throughput register file memory with pipeline of combinational logic
Pipelining is included inside a register file memory. A register file memory device includes a static bitcell, and pipelined combinational logic. The combinational logic pipeline couples the I/O (input/output) node to the static bitcell. The pipeline includes multiple stages, where each stage includes a static logic element and a register element, where the operation of each stage transfers data through to a subsequent stage. The number of stages can be different for a read than a write. The multiple stages perform the operations to execute the read or write request. |
| US09652417B2 |
Network interface card rate limiting
Systems and methods for limiting the rate of packet transmission from a NIC to a host CPU are provided. According to one embodiment, data packets are received from a network by the NIC. The NIC is coupled to a host central processing unit (CPU) of a network appliance through a bus system. A status of the host CPU is monitored by the NIC. A rate limiting mode indicator is set by the NIC based on the status. When the rate limiting mode indicator indicates rate limiting is inactive, then the received data packets are transmitted from the NIC to the host CPU for processing. When the rate limiting mode indicator indicates rate limiting is active, then rate limiting is performing by temporarily stopping or slowing transmission of the received data packets from the NIC to the host CPU for processing. |
| US09652413B2 |
Signal processing system and integrated circuit comprising a prefetch module and method therefor
A signal processing system comprising at least one master device at least one memory element and prefetch module arranged to perform prefetching from at least one memory element upon a memory access request to the at least one memory element from the at least one master device. Upon receiving a memory access request from the at least one master device, the prefetch module is arranged to configure the enabling of prefetching of at least one of instruction information and data information in relation to that memory access request based at least partly on an address to which the memory access request relates. |
| US09652410B1 |
Automated modification of configuration settings of an integrated circuit
Automated modification of configuration settings for an IC (IC) includes receiving, within a data processing system, desired data for a configuration setting of an IC, reading stored data for the configuration setting. A determination is made using the data processing system that the configuration setting is static and that the stored data differs from the desired data. Responsive to the determination, configuration data including the desired data is provided from the data processing system to the IC. At least a portion of a boot process of the IC is automatically initiated, wherein the boot process uses the configuration data. |
| US09652409B2 |
Memory access during memory calibration
A multi-rank memory system in which calibration operations are performed between a memory controller and one rank of memory while data is transferred between the controller and other ranks of memory. A memory controller performs a calibration operation that calibrates parameters pertaining to transmission of data via a first data bus between the memory controller and a memory device in a first rank of memory. While the controller performs the calibration operation, the controller also transfers data with a memory device in a second rank of memory via a second data bus. |
| US09652408B2 |
System and method for providing data integrity
Systems and methods for providing data integrity for stored data are disclosed. A method may include, in connection with the receipt of a read command at a storage resource, reading a data block from the storage resource, the data block including a data field, a data integrity field indicating the integrity the data field, and an encryption indicator field indicating whether the data block is encrypted with a current cryptographic key for the storage resource. The method may further include determining whether the data field is encrypted with the current cryptographic key based at least on the encryption indicator field. The method may additionally include returning at least a portion of the data block in reply to the read command in response to determining that the data field is encrypted with a cryptographic key other than the current cryptographic key. |
| US09652405B1 |
Persistence of page access heuristics in a memory centric architecture
Systems, methods, and articles of manufacture comprising processor-readable storage media are provided for managing memory by persistence of page access heuristics. For example, a method includes collecting, during run-time execution of an application, access heuristics with regard to each page of data that is accessed by the application and cached in a page cache associated with the application, and generating metadata for each cached page in the page cache. The metadata for a given cached page represents the access heuristics of the given cached page. The metadata for each cached page is maintained in a volatile memory during run-time execution of the application. Moreover, the metadata for each cached page is persistently stored in a non-volatile memory during run-time execution of the application. The persistently stored metadata for each cached page is accessed when the application is restarted to restore the page cache associated with the application to a previous state. |
| US09652404B2 |
Multicore, multibank, fully concurrent coherence controller
This invention optimizes non-shared accesses and avoids dependencies across coherent endpoints to ensure bandwidth across the system even when sharing. The coherence controller is distributed across all coherent endpoints. The coherence controller for each memory endpoint keeps a state around for each coherent access to ensure the proper ordering of events. The coherence controller of this invention uses First-In-First-Out allocation to ensure full utilization of the resources before stalling and simplicity of implementation. The coherence controller provides Snoop Command/Response ID Allocation per memory endpoint. |
| US09652397B2 |
Dynamic power reduction and performance improvement in caches using fast access
With the increasing demand for improved processor performance, memory systems have been growing increasingly larger to keep up with this performance demand. Caches, which dictate the performance of memory systems are often the focus of improved performance in memory systems, and the most common techniques used to increase cache performance are increased size and associativity. Unfortunately, these methods yield increased static and dynamic power consumption. In this invention, a technique is shown that reduces the power consumption in associative caches with some improvement in cache performance. The architecture shown achieves these power savings by reducing the number of ways queried on each cache access, using a simple hash function and no additional storage, while skipping some pipe stages for improved performance. Up to 90% reduction in power consumption with a 4.6% performance improvement was observed. |
| US09652385B1 |
Apparatus and method for handling atomic update operations
An apparatus and method are provided for handling atomic update operations. The apparatus has a cache storage to store data for access by processing circuitry, the cache storage having a plurality of cache lines. Atomic update handling circuitry is used to handle performance of an atomic update operation in respect of data at a specified address. When data at the specified address is determined to be stored within a cache line of the cache storage, the atomic update handling circuitry performs the atomic update operation on the data from that cache line. Hazard detection circuitry is used to trigger deferral of performance of the atomic update operation upon detecting that a linefill operation for the cache storage is pending that will cause a chosen cache line to be populated with data that includes data at the specified address. The linefill operation causes the apparatus to receive a sequence of data portions that collectively form the data for storing in the chosen cache line. Partial linefill notification circuitry is used to provide partial linefill information to the atomic update handling circuitry during the linefill operation, and the atomic update handling circuitry is arranged to initiate the atomic update operation responsive to detecting from the partial linefill information that the data at the specified address is available for the chosen cache line. This can provide a performance benefit, by avoiding the need for the atomic update handling circuitry to await completion of the linefill operation before beginning the atomic update operation. |
| US09652384B2 |
Apparatus, system and method for caching compressed data
Techniques and mechanisms to efficiently cache data based on compression of such data. The technologies of the present disclosure include cache systems, methods, and computer readable media to support operations performed with data that is compressed prior to being written as a cache line in a cache memory. In some embodiments, a cache controller determines the size of compressed data to be stored as a cache line. The cache controller identifies a logical block address (LBA) range to cache the compressed data, where such identifying is based on the size of the compressed data and on reference information describing multiple LBA ranges of the cache memory. One or more such LBA ranges are of different respective sizes. In other embodiments, LBA ranges of the cache memory concurrently store respective compressed cache lines, wherein the LBA ranges and are of different respective sizes. |
| US09652383B2 |
Managing a collection of data
A measurement sampling facility takes snapshots of the central processing unit (CPU) on which it is executing at specified sampling intervals to collect data relating to tasks executing on the CPU. The collected data is stored in a buffer, and at selected times, an interrupt is provided to remove data from the buffer to enable reuse thereof. The interrupt is not taken after each sample, but in sufficient time to remove the data and minimize data loss. |
| US09652382B1 |
Look-ahead garbage collection for NAND flash based storage
One or more source locations in a group of solid state storage cells on which garbage collection is to be performed are stored in a garbage collection queue. A garbage collection speed is determined, including by: analyzing one or more source locations stored in the garbage collection queue; determining a look-ahead metric, wherein the look-ahead metric comprises an anticipated amount of freed up storage associated with the analyzed source locations; and determining the garbage collection speed based at least in part on the look-ahead metric. One or more garbage collection operations are performed interleaved with one or more host operations, wherein the ratio of garbage collection operations to host operations is based at least in part on the garbage collection speed. |
| US09652378B2 |
Writing method, memory controller and memory storage device
A writing method, a memory controller and a memory storage device are provided. The writing method includes steps of: configuring logical addresses to map to part of physical programming units in a storage area, wherein at least one of the physical programming units stores a valid data; transmitting a first write command for writing data having a first data length to at least one of the physical programming units; receiving a status signal; and selecting a spare physical erasing unit and copying the valid data having a second data length to the spare physical erasing unit, after transmitting the first write command and before receiving the status signal, wherein the first data length is not greater than the second data length. Therefore, it prevents a host system from waiting too long when writing data. |
| US09652377B2 |
Memory system
According to one embodiment, the memory system includes a nonvolatile semiconductor memory, a data buffer, a volatile memory for storing a management table uniquely associates the user data with an address of the physical storage region of nonvolatile semiconductor memory, a controller that carries out a force quit process for writing the user data stored in a data buffer, the management table stored in volatile memory into the nonvolatile semiconductor memory, and a storage battery. The controller starts the force quit process prior to the power supply of the internal power supply regulator is switched from an external power supply to the storage battery. |
| US09652375B2 |
Multiple chunk support for memory corruption detection architectures
Memory corruption detection technologies are described. An example processing system includes a processing core including a register to store an address of a memory corruption detection (MCD) table. The processing core can allocate a memory block of pre-determined size and can allocate a plurality of buffers within the memory block using a memory metadata word stored in an entry of the MCD table. The memory metadata word can include metadata that can identify a first bit range within the memory block for a first buffer and a second bit range within the memory block for a second buffer. |
| US09652372B2 |
Method and apparatus for improving non-uniform memory access
A method, computer readable medium and apparatus for improving non-uniform memory access are disclosed. For example, the method divides a plurality of stream processing jobs into a plurality of groups of stream processing jobs to match a topology of a non-uniform memory access platform. The method sets a parameter in an operating system kernel of the non-uniform memory access platform to favor an allocation of a local memory, and defines a plurality of processor sets. The method binds one of the plurality of groups to one of the plurality of processor sets, and runs the one group of stream processing jobs on the one processor set. |
| US09652369B2 |
Extraction of problem diagnostic knowledge from test cases
Embodiments of the present invention enable users to extract knowledge from testing scenarios performed during application development, and later employ that knowledge to interpret application usage scenarios to enhance serviceability of applications by expediting identification and solving of problems. In an exemplary embodiment, log data generated during simulation of test cases is analyzed to create one or more rules based on patterns in which one or more log entries appear in the log data. Later, log data may be analyzed to look for a pattern of log entries that matches a pattern-based rule, thereby facilitating faster identification and resolution of the problem. |
| US09652368B2 |
Using linked data to determine package quality
Arrangements described herein relate to determining a quality of a software package. Via linked data, the software package can be linked to at least one test plan and a requirement collection. The software package can be executed in accordance with the test plan using at least one test case. At least one test result of the execution of the software package can be generated. A score can be assigned to the test result and a score can be assigned to the test based at least on the test result. Based at least the scores on assigned to the test result and the test case, a package quality score can be assigned to the software package. |
| US09652367B1 |
Exploratory testing on multiple system landscapes
The present disclosure involves systems, software, and computer implemented methods for testing applications on multiple system landscapes. In one example, a method may include identifying instructions to test a plurality of system landscapes, executing a test of a first system landscape from the plurality of system landscapes, validating a response received from the first system landscape by a user associated with the testing, executing tests of at least a subset of the remaining plurality of system landscapes which includes sending requests including the predefined input to the entry point of each of the subset of the remaining plurality of system landscapes, receiving responses from the subset of the remaining plurality of system landscapes, and comparing each received response to the validated response from the first system landscape, and in response to the comparison, generating a result set of the comparison of each received response to the validated response. |
| US09652366B2 |
Code change analysis to optimize testing lifecycle
The present disclosure relates to system(s) and method(s) for detecting change in software code of elements in a current version associated with a software application as compared to a reference version of the software application. The system and method further determines whether the change in the software code of the elements is a functional change or a non-functional change. The system and method also provides an optimized test suite for testing the current version of the software application, in order to test the elements with functional change, in the current version. |
| US09652364B1 |
Cloud service for mobile testing and debugging
Techniques for providing a cloud mobile device debugging service may be provided. For example, input may be received that is formatted in a particular debugging protocol. The input may be intended for execution on a browser of a mobile device that is remotely hosted with respect to the source of the input. The input may be translated from the particular debugging protocol to a common debugging protocol and provided to the remotely hosted mobile device. A result of executing the translated input with the remotely hosted mobile device may be displayed via a user interface. |
| US09652354B2 |
Unsupervised anomaly detection for arbitrary time series
Examining time series sequences representing performance counters from executing programs can provide significant clues about potential malfunctions, busy periods in terms of traffic on networks, intensive processing cycles and so on. An unsupervised anomaly detector can detect anomalies for any time series. A combination of known techniques from statistics, signal processing and machine learning can be used to identify outliers on unsupervised data, and to capture anomalies like edge detection, spike detection, and pattern error anomalies. Boolean and probabilistic results concerning whether an anomaly was detected can be provided. |
| US09652352B1 |
Techniques for storage capacity configuration
Described are techniques for reconfiguring a storage device. A first plurality of parameters characterizing the storage device at a first point in time are received. The first plurality of parameters includes a first raw capacity and a first published capacity. The first raw capacity represents a physical storage capacity of the storage device. The first published capacity represents a logical storage capacity of the storage device. A second plurality of parameters is determined characterizing the storage device at a subsequent second point in time. The second plurality of parameters includes a second raw capacity and a second published capacity, The storage device is used at the first point in time as a device having the first plurality of parameters and at the second point in time as a device having the second plurality of parameters. |
| US09652351B2 |
System to detect charger and remote host for type-C connector
The present techniques include detecting a charger and remote host for a Type-C connector. An apparatus, system, and method are described herein. The apparatus comprises a USB Type-C port and a USB receiver detector. A charger and a remote host are differentiated based on the USB receiver detector. |
| US09652350B2 |
Evaluation of complex SAN environments
A method for evaluating error recovery effectiveness in a complex Storage Area Network (SAN) by a processor device is provided. At least one baseline performance metric is recorded. A predetermined error is injected into at least one component of the SAN associated with the recorded baseline performance metric. An elapsed time is recorded from the injection of the error to the return to the recorded baseline performance metric. |
| US09652345B2 |
Techniques and systems for local independent failure domains
Techniques and systems are described for enabling local independent failure domains in a host server or datacenter environment. Included is a locally-attached independent failure device (LA-IFD) with an independent data buffer and a local communications bus for attaching to a host server. Techniques for a communications protocol between the LA-IFD and its host server are provided, including: receiving a request to write a data segment to persistent storage; synchronously storing the data segment in a buffered data segment at the LA-IFD and initiating an asynchronous update of the data segment at a remote storage system; sending a write acknowledgement indicating completion to the requestor; and, after receiving a completion notification from the remote storage system, removing the buffered data segment from the LA-IFD. In some cases, techniques allow a host server and LA-IFD pair to monitor one another for failures and implement a modified protocol in the event of unavailability. |
| US09652342B2 |
Redundancy processing method and system, and information processing apparatus thereof
In this method, a first information processing apparatus in a first system identifies a second system that performs a first processing on behalf of the first system when an abnormality occurs in the first system, and transmits a first request that includes data concerning resources used to perform the first processing to a second information processing apparatus in the second system. Upon detecting an abnormality in the second system, the first information processing apparatus identifies a third system other than the second system, transmits a second request that includes data concerning resources used to perform the first processing to a third information processing apparatus in the third system, and transmits a third request to release resources secured for the first system to the second information processing apparatus in the second system, upon detecting return of the second system. |
| US09652337B2 |
Resilient programming frameworks for handling failures in parallel programs
An information processing system, computer readable storage medium, and method for supporting resilient execution of computer programs. A method provides a resilient store wherein information in the resilient store can be accessed in the event of a failure. The method periodically checkpoints application state in the resilient store. A resilient executor comprises software which executes applications by catching failures. The method uses the resilient executor to execute at least one application. In response to the resilient executor detecting a failure, restoring application state information to the at least one application from a checkpoint stored in the resilient store, the resilient executor resuming execution of the at least one application with the restored application state information. |
| US09652334B2 |
Increasing coordination service reliability
The present invention extends to methods, systems, and computer program products for increasing coordination service reliability. A coordination service maintains state (e.g., using replication) for one or more software components (e.g., applications). Tokens can be used to identify incarnations of a member set within the coordination service. When a member starts and has no token, the member attempts to learn the token from a majority other members. If no such token exists, the member requests a new token. Aspects of the invention can be used to detect and compensate for lost state within the coordination service, including state lost due to storage device failures (which may be referred to as “silent data loss”). Detecting and compensating for silent data loss makes the coordination service more reliable and can essentially guarantee that the coordination service notifies clients when data is lost and ceases processing when incorrect state may exist. |
| US09652328B2 |
Restoring an application from a system dump file
An application is identified that was running at a time of a system crash. A system dump file is received that was created responsive to the system crash. A restoration dataset stored in the system dump file is determined. The application is restored based, at least in part, on the restoration dataset. |
| US09652325B2 |
Storage system and method to support scheduled and operational going down of a storing unit
There are provided: a distribution storage processing unit for distributing and storing a plurality of fragment data including division data obtained by dividing storage target data into a plurality of pieces and redundant data into a plurality of storing unit; an operation status detecting unit for detecting operation statuses of the respective storing unit; and a data regenerating unit for, in accordance with a result of the detection by the operation status detecting unit, when any of the storing unit goes down, regenerating the fragment data having been stored in the down storing unit based on the other fragment data stored in the other storing unit different from the down storing unit. Moreover, the data regenerating unit has a function of transferring and storing the fragment data stored in the storing unit previously scheduled to go down into the other storing unit before the storing unit goes down. |
| US09652323B2 |
Computer memory access
A computer memory access method includes: receiving external data with a prefetching length, the external data having an unmasked first data portion and a masked second data portion; writing the unmasked first data portion to a corresponding data storage unit of a computer memory by a writing unit and reading a third data portion corresponding to the masked second data portion from the data storage unit by a reading unit; producing modified external data by merging the unmasked first data portion and the third data portion in place of the masked second data portion; generating parity bits from the modified external data by an error correction code encoding circuit according to a given rule; and then writing the parity bits to a parity bit storage unit of the computer memory by the writing unit, in substitution of previous information in the parity bit storage unit. |
| US09652322B2 |
User station of a bus system and method for transmitting messages between user stations of a bus system
A user station for a bus system is described and a method for transmitting messages between user stations of a bus system. The user station has a CAN-Controller for reading data of a message to be sent directly from a RAM without buffer storage in a buffer store, and a memory access error detection/processing device for detecting a memory access error of the CAN controller and for processing a detected memory access error. |
| US09652321B2 |
Recovery algorithm in non-volatile memory
Apparatus, systems, and methods for Recovery algorithm in memory are described. In one embodiment, a controller comprises logic to receive a read request from a host device to read a line of data to the memory device, wherein the data is spread across a plurality (N) of dies and comprises an error correction code (ECC) spread across the plurality (N) of dies, retrieve the line of data from the memory device, perform an error correction code (ECC) check on the line of data retrieved from the memory device, and invoke a recovery algorithm in response to an error in the ECC check on the line of data retrieved from the memory device. Other embodiments are also disclosed and claimed. |
| US09652319B2 |
Process rescue by an OS module after a device error
A method for performing process fault tolerant control of an electronic device, and an associated apparatus and an associated computer program product are provided, where the method includes: using at least one driver in a kernel layer of an operating system (OS) of the electronic device to perform detection to determine whether a specific process running on the electronic device will be influenced by an error of the electronic device; and when it is detected that the specific process running on the electronic device will be influenced by the error of the electronic device, using at least one control signal of the OS to perform process control on the specific process and using a package manager service (PMS) module of the OS to trigger a rescue procedure. For example, the method may further include: when triggering the rescue procedure, preventing immediately triggering termination of the specific process. |
| US09652317B2 |
Remedying identified frustration events in a computer system
A data processing system comprising: a constantly updating database of a plurality of processes having a plurality of operation times, relating to a plurality of applications, relating to at least one user activity, and using a plurality of computing resources; a monitor arranged to identify a plurality of clashes between the processes, a plurality of frustration events and to correlate between the frustration events and the clashes between the processes; a cause identifier arranged to identify, for each frustration event, a cause for the correlated clash of processes; a remedy generator arranged to generate, for each cause, a remedy arranged to solve the frustration event; a communication module arranged to provide the remedies to users in relation to respective user activities in view of their frustration events; and an analyzer arranged to monitor an efficacy of the remedies in respect to their corresponding frustration events. |
| US09652315B1 |
Multi-core RAM error detection and correction (EDAC) test
A system and method for detection and correction of single-bit errors in a multi-core processing resource (MCPR) of an avionics processing system includes a RAM EDAC testing module called by the MCPR health monitor to access EDAC registers of a system-on-chip module coupled to the MCPR and access memory addresses passed by the MCPR health monitor to detect single-bit errors. Single-bit errors detected in memory mapped to the hypervisor are corrected by the RAM EDAC testing module. Single-bit errors detected in memory associated with a partition or core of the MCPR are corrected by the health monitor running on the particular partition or core with which the memory portion is associated. Single-bit errors may be detected in unmapped memory associated with a partition or core by accessing the unmapped memory via a temporary TLB entry. |
| US09652314B2 |
Dynamic application programming interface publication for providing web services
Systems and methods are disclosed for automatically generating and publishing API information for web services, and for informing a requestor for the web services of a correct format of the request. One embodiment comprises an API gateway that identifies a plurality of software code objects for deployment, where the code objects include executable code for performing functions. The API gateway receives a request for a web service from an application, queries a code object for usage information regarding a function to perform the web service, and determines that a format of the request for the web service is incorrect based on the query for the usage information. The API gateway transmits a response to the application that specifies a correct format of the web service request based on the query, and receives a subsequent request from the application that specifies the correct format for the web service request. |
| US09652313B2 |
Collection of memory allocation statistics by provenance in an asynchronous message passing system
In one embodiment, a method is disclosed that includes executing, by a device, one or more programs that use asynchronous message passing. The one or more programs comprise instrumentation code that causes message context information to be generated regarding asynchronous messages passed by the one or more programs. The message context information is indicative of one or more points within the one or more programs at which a particular message is sent or received. The method includes maintaining a current message context associated with a particular portion of the one or more programs. The method includes receiving a first asynchronous message that includes message context information for the received message. The method includes updating the current message context to include the message context information received via the first asynchronous message. |
| US09652306B1 |
Event-driven computing
A service manages a plurality of virtual machine instances for low latency execution of user codes. The service can provide the capability to execute user code in response to events triggered on various event sources and initiate execution of other control functions to improve the code execution environment in response to detecting errors or unexpected execution results. The service may maintain or communicate with a separate storage area for storing code execution requests that were not successfully processed by the service. Requests stored in such a storage area may subsequently be re-processed by the service. |
| US09652303B2 |
Command line output redirection
In one embodiment the invention provides a method. The method includes invoking, via an application, a call of a command line utility; providing, via the application, an identifier in the call of the command line utility, wherein the identifier comprises an operating system controlled memory location; storing output from the command line utility in operating system shared memory at the operating system controlled memory location identified by the identifier; and retrieving, by the application, the command line utility output from the operating system shared memory at the operating system controlled memory location identified by the identifier. |
| US09652302B2 |
Method for building a ranked register and a compare-and-swap object, a ranked register and compare-and-swap-objects
A method is used to build a concurrent data structure in the form of a ranked register based on a Compare-And-Swap (CAS) functionality and an according ranked register, to allow reliable access of shared data within a storage by multiple clients. Read and write operations are defined within the ranked register. The read operation takes a rank as argument and returns a rank-value pair. The write operation takes a rank-value pair as argument and returns either commit or abort. The read operation returns a rank-value pair that was written in a previous write operation. |
| US09652301B2 |
System and method providing run-time parallelization of computer software using data associated tokens
A system and method of parallelizing programs assigns write tokens and read tokens to data objects accessed by computational operations. During run time, the write sets and read sets for computational operations are resolved and the computational operations executed only after they have obtained the necessary tokens for data objects corresponding to the resolved write and read sets. A data object may have unlimited read tokens but only a single write token and the write token may be released only if no read tokens are outstanding. Data objects provide a wait list which serves as an ordered queue for computational operations waiting for tokens. |
| US09652294B2 |
Cross-platform workload processing
According to one aspect of the present disclosure, a method and technique for workload processing is disclosed. The method includes: receiving a request to process a workload by a scheduler executing on a processor unit; accessing historical processing data by the scheduler to determine execution statistics associated with previous processing requests; determining whether the data of the workload is available for processing; in response to determining that the data is available for processing, determining whether a process for the workload is available; in response to determining that the process is available, determining resource availability on a computing platform for processing the workload; determining whether excess capacity is available on the computing platform based on the resource availability and the execution statistics; and in response to determining that excess capacity exists on the computing platform, initiating processing of the workload on the computing platform. |
| US09652289B2 |
Systems and methods for S-list partitioning
Systems and techniques of the management of the allocation of a plurality of memory elements stored within a plurality of lockless list structures are presented. These lockless list structures (such as Slists) may be made accessible within an operating system environment of a multicore processor—and may be partitioned within the system. Memory elements may also be partitioned among these lockless list structures. When a core processor (or other processing element) makes a request for allocating a memory element to itself, the system and/or method may search among the lockless list structures for an available memory element. When a suitable and/or available memory element is found, the system may allocate the available memory element to requesting core processor. Dynamically balancing of memory elements may occur according to a suitable balancing metric, such as maintain substantial numerical equality of memory elements or avoid over-allocation of resources. |
| US09652285B2 |
Effective roaming for software-as-a-service infrastructure
A method for providing a roaming service to a first client may be provided. The first client may be associated to at least one application service running on an associated virtual machine as a Cloud service via a primary route between the first client and the at least one application service. The method may comprise providing a first agent on the first client, and providing an alternative route to the primary route between the first client and the at least one application service utilizing a second agent running on a second client. Thereby, the alternative route is based on a set of preferences submitted by the first client. |
| US09652284B2 |
GPU divergence barrier
A device includes a memory, and at least one programmable processor configured to determine, for each warp of a plurality of warps, whether a Boolean expression is true for a corresponding thread of each warp, pause execution of each warp having a corresponding thread for which the expression is true, determine a number of active threads for each of the plurality of warps for which the expression is true, sort the plurality of warps for which the expression is true based on the number of active threads in each of the plurality of warps, swap thread data of an active thread of a first warp of the plurality of warps with thread data of an inactive thread of a second warp of the plurality of warps, and resume execution of the at least one of the plurality of warps for which the expression is true. |
| US09652273B2 |
Method and system for creating a hierarchy of virtual machine templates in a virtualized computing system
A virtualized computing system supports the execution of a plurality of virtual machines, where each virtual machine supports the execution of applications therein. Each application executes within a container that isolates the application executing therein from other processes executing on the computing system. A hierarchy of virtual machine templates is created by instantiating a parent virtual machine template, the parent virtual machine template having a guest operating system and a container. An application to be run in a container is determined, and, in response, the parent virtual machine template is forked to create a child virtual machine template, where the child virtual machine template includes a replica of the container, and where the guest operating system of the parent virtual machine template overlaps in memory with a guest operating system of the child virtual machine template. The application is then installed in the replica of the container. |
| US09652271B2 |
Autonomously managed virtual machine anti-affinity rules in cloud computing environments
System, method, and computer program product to perform an operation comprising collecting performance metrics of a first virtual machine, and defining, based on the collected performance metrics, at least one rule to restrict collocation of the first virtual machine with other virtual machines on one or more host machines in a cloud computing environment. |
| US09652269B2 |
System and method for supporting representational state transfer services natively in a service bus runtime
In accordance with an embodiment, described herein is a system and method for supporting REST services natively in a service bus runtime. The service bus runtime can include one or more native REST proxy services, one or more native REST pipelines, and one or more native REST reference services. A native REST proxy service can deliver a message payload of a REST native format into a native REST pipeline, which can process the payload without converting the payload to or from an XML-based Simple Object Access Protocol (SOAP) format. JavaScript code can be supported in the pipeline to manipulate the message payload. A REST branch node can be used in the service bus runtime to route a message based on an HTTP verb or a relative URL path in a header of the message. |
| US09652265B1 |
Architecture for managing I/O and storage for a virtualization environment with multiple hypervisor types
A system for managing storage devices, includes a plurality of nodes that implement a virtualization environment, each node of the plurality of nodes comprising a hypervisor, a service virtual machine that sits above the hypervisor, and one or more user virtual machines that sit above the hypervisor; a plurality of storage devices that are accessed by the user virtual machines via the service virtual machines, wherein a first node of the plurality of nodes comprises a first hypervisor, a first service virtual machine and a first set of one or more user virtual machines, wherein a second node of the plurality of nodes comprises a second hypervisor, a second service virtual machine and a second set of one or more user virtual machines, wherein the first hypervisor and the second hypervisor are of different types, and wherein the first virtual machine and the second service virtual machine are of the same type. |
| US09652260B2 |
Scriptable hierarchical emulation engine
In a data storage system, a hierarchical data structure, such as a file system or a database, is utilized to organize a hierarchical arrangement of device containers corresponding to various device identifiers of the plurality of hardware components in the target hardware system, scripts corresponding to various packet types of communication packets in the target hardware system, and responses corresponding to various packet data in the communication packets in the target hardware system. In response to receipt by a hierarchical emulation engine of a communication packet during emulation of the target hardware system, the communication packet including a device identifier, packet type and packet data, a response to the communication packet is determined by traversing the hierarchical arrangement based on the device identifier, packet type and packet data of the communication packet. The determined response is then provided. |
| US09652258B2 |
Dynamic time zone definition update manager
A system that manages dynamic time zone definition updates can access stored time zone definitions and receive a subscription request from an application. The system can receive new time zone definitions and, while the application is being executed, update the stored time zone definitions to include the new time zone definitions. The system can then send a notification to the application that the stored time zone definitions have been updated, and the notification can cause the application to resolve impacts, if any, of the time zone definition update while the application continues to be executed. |
| US09652257B2 |
Vehicle safety system
A vehicle safety system made up of multiple processors connected together into a multiprocessor system where the system is configured to operate the vehicle. Multiple sensors are connected to the processors and configured to gather information from vehicle and a lidar sensor attached to the windshield and oriented to gather data from the road in front of the vehicle. A processor is connected and collocated with the lidar sensor for controlling the lidar and a second processor is configured to operate an application configured to receive data from the multiprocessor system, merge the data from multiprocessor system into a message, prioritize the message against other messages, add a priority label to the message, send and process the message according to the priority label attached. |
| US09652256B2 |
Method and system for providing data-related information and videos to software application end-users
A user operations engine allows an end-user to select a specific region of a document. The user operations engine then provides the end-user with access to one or more video clips that demonstrate modifications that were made to the selected region of the document using one or more tools associated with a software application. |
| US09652249B1 |
Preloading an application while an operating system loads
This disclosure describes techniques and/or apparatuses for reducing the total time used to boot up a computer and load applications onto the computer. |
| US09652248B2 |
Load queue entry reuse for operand store compare history table update
Embodiments relate to load queue entry reuse for operand store compare (OSC) history table update. An aspect includes allocating a load queue entry in a load queue to a load instruction that is issued into an instruction pipeline, the load queue entry comprising a valid tag that is set and a keep tag that is unset. Another aspect includes based on the flushing of the load instruction, unsetting the valid tag and setting the keep tag. Another aspect includes reissuing the load instruction into the instruction pipeline. Another aspect includes based on determining that the allocated load queue entry corresponds to the reissued load instruction, setting the valid tag and leaving the keep tag set. Another aspect includes based on completing the reissued load instruction, and based on the valid tag and the keep tag being set, updating the OSC history table corresponding to the load instruction. |
| US09652247B2 |
Capturing snapshots of offload applications on many-core coprocessors
Methods are provided. A method for swapping-out an offload process from a coprocessor includes issuing a snapify_pause request from a host processor to the coprocessor to initiate a pausing of the offload process executing by the coprocessor and another process executing by the host processor using a plurality of locks. The offload process is previously offloaded from the host processor to the coprocessor. The method further includes issuing a snapify_capture request from the host processor to the coprocessor to initiate a local snapshot capture and saving of the local snapshot capture by the coprocessor. The method also includes issuing a snapify_wait request from the host processor to the coprocessor to wait for the local snapshot capture and the saving of the local snapshot capture to complete by the coprocessor. |
| US09652245B2 |
Branch prediction for indirect jumps by hashing current and previous branch instruction addresses
Branch prediction for indirect jumps, including: receiving, by a branch prediction module, a branch address for each of a plurality of executed branch instructions; receiving, by the branch prediction module, an instruction address of a current branch instruction; creating, by the branch prediction module, an execution path identifier in dependence upon the branch address for each of the plurality of executed branch instructions and the instruction address of the current branch instruction; and searching, by the branch prediction module, a branch prediction table for an entry that matches the execution path identifier. |
| US09652242B2 |
Apparatus for predicate calculation in processor instruction set
An apparatus and method for calculating flag bits is disclosed. The flag bits may be used in a processor utilizing branch predication. More particularly, the apparatus and method may be used to calculate a predicate that can be used by a branch unit to evaluate whether a branch is to be taken. In one embodiment, the apparatus is coupled to receive a condition code associated with an instruction, and flag bits generated responsive to execution of the instruction. The condition code is indicative of a condition to be checked resulting from execution of the instruction. The apparatus may then provide an indication of whether the condition is true. |
| US09652241B2 |
Data processing apparatus with instruction encodings to enable near and far memory access modes
Apparatus comprises a processor configured for operation under a sequence of instructions from an instruction set, wherein said processor comprises: means for conditionally inhibiting at least one type of trap, interrupt or exception (TIE) event, wherein, when operating under a sequence of instructions, said inhibition means is inaccessible by said instructions to inhibit the or each type of TIE event, without interrupting said sequence. A data processing apparatus includes a processor adapted to operate under control of program code comprising instructions selected from an instruction set, the apparatus comprising: a predefined memory space providing a predefined addressable memory for storing program code and data, a larger memory space providing a larger addressable memory, means for accessing program code and data within the predefined memory space, and means for controlling the access means so as to enable the access means to access program code located within the larger memory space. |
| US09652237B2 |
Stateless capture of data linear addresses during precise event based sampling
A processor includes a logic for stateless capture of data linear addresses (DLA) during precise event based sampling (PEBS) for an out-of-order execution engine. The engine may include a PEBS unit with logic to increment a counter each time an instance of a designated micro-op is retired a reorder buffer, capture output DLA referenced by an instance of the micro-op that executes after the counter overflows, set a captured bit associated with a reorder buffer identifier for the instance of the micro-op, and store a PEBS record in a debug storage when the instance of the micro-op is retired from the reorder buffer. The designated micro-op references a DLA of a memory accessible to the processor. |
| US09652231B2 |
All-to-all permutation of vector elements based on a permutation pattern encoded in mantissa and exponent bits in a floating-point SIMD architecture
Mechanisms are provided for dynamic data driven alignment and data formatting in a floating point SIMD architecture. At least two operand inputs are input to a permute unit of a processor. Each operand input contains at least one floating point value upon which a permute operation is to be performed by the permute unit. A control vector input, having a plurality of floating point values that together constitute the control vector input, is input to the permute unit of the processor for controlling the permute operation of the permute unit. The permute unit performs a permute operation on the at least two operand inputs according to a permutation pattern specified by the plurality of floating point values that constitute the control vector input. Moreover, a result output of the permute operation is output from the permute unit to a result vector register of the processor. |
| US09652227B2 |
Assigning an annotation to a variable and a statement in a source code of a software application
A method and system for assigning an annotation to a statement in a source code. The method comprises generating intermediate representation of the source code by parsing the source code. The method comprises identifying one or more instances of definition of a variable and one or more instances of use of the variable. The method comprises categorizing the variable into a group of variables based on the one or more instances of definition of the variable, the one or more instances of use of the variable, a description of the variable, and mathematical operators defining a correlation between the variable and one or more other variables. Further, a data description table and a data dictionary of the plurality of variables are created. The method assigns an annotation to the variable present in the statement of the source code based on the data description table and the data dictionary. |
| US09652222B1 |
Prototyping apparatus with built-in programming facility and corresponding methods
A prototyping apparatus includes a housing, a connector on the housing for accepting a component, a microcontroller within the housing interacting with the component where the microcontroller has program memory, a user interface on an exterior surface of the housing for interaction between a user and the apparatus, a connection to a source of upgrade software, and programming circuitry within the housing for causing the microcontroller to enter an upgrade mode. The prototyping apparatus may further include a processor in communication with the microcontroller and the user interface, a device driver running on the processor for actuating the programming circuitry responsive to the command received through the user interface. The prototyping apparatus may include circuitry for generating a voltage that is higher than an operating voltage of the prototyping apparatus, and may further include level-shifting circuitry for shifting signals that are at the operating voltage to the higher voltage. |
| US09652221B2 |
Runtime patching of an operating system (OS) without stopping execution
Techniques for runtime patching of an OS without stopping execution of the OS are presented. When a patch function is needed, it is loaded into the OS code. Threads of the OS that are in kernel mode have a flag set and a jump is inserted at a location of an old function. When the old function is accessed, the jump uses a trampoline to check the flag, if the flag is set, processing returns to the old function; otherwise processing jumps to a given location of the patch. Flags are unset when exiting or entering the kernel mode. |
| US09652219B2 |
Small/medium business application delivery platform
Systems and/or methods are provided for the purchase, dissemination, configuration, or provisioning of applications to a mobile device. The systems can comprise devices that receive indications from a small to medium sized businesses of a need for an application, obtain the application from an independent software vendor, configure the application for utilization on the mobile device, and thereafter dispatches the application to the mobile device. |
| US09652217B2 |
Electric tool
The disclosure relates to an electric tool, particularly a hand-held power tool, comprising a control unit which has control software with control parameters, and is provided for the purpose of controlling a drive unit. According to the disclosure, said electric tool comprises an interface unit that is provided to fundamentally update and/or modify the control software and/or the control parameters. |
| US09652216B2 |
System and method for providing out-of-band software or firmware upgrades for a switching device
An information handling system is provided. The information handling system includes at least one network switch that includes at least one processing unit, a memory coupled to the at least one processing unit, the memory storing at least one image including instructions controlling functions of the at least network switch, and a baseband management controller coupled to the memory and the at least one processing unit, the baseband management controller receiving and storing at least one upgraded image for writing to the memory to replace the at least one image. The baseband management controller receives the at least one upgraded image from a remote terminal, powers off the at least one processing unit, and writes the at least one upgraded image to the memory while the at least one processing unit is powered off. |
| US09652215B2 |
Application installation/uninstallation across multiple systems
The subject matter described herein relates to application installation/uninstallation across multiple systems. Responsive to installation or uninstallation of an application on a first system running on a device, it is determined whether the application is to be installed or uninstalled on a second system. Responsive to determining that the application is to be installed or uninstalled on the second system, an indication is set while the first system is running, where the indication causes installation or uninstallation of the application on the second system. |
| US09652212B2 |
Managing change events for devices in an enterprise system
Techniques are disclosed for communicating to remote devices information about change events related to changes in access to an enterprise system. A device access management system may facilitate communication about a change event to the remote devices. Information about a change event may be stored in a change event object based on the type of change event (e.g., a policy change, an application change, and a settings change). A change event queue may persistently store information corresponding to change events. One or more computing nodes may be scheduled to execute an action process for each change event based on the type of the change event. A computing node may communicate information (e.g., an instruction to implement adjust access) about a change event to remote devices. A change event may persist on the queue until all remote devices are notified about the change event. |
| US09652209B2 |
Static analysis and reconstruction of deep link handling in compiled applications
A disassembler module is configured to generate ARM code by performing a disassembly of a compiled iOS application. An intermediate representation generator module is configured to: (i) from the ARM code, identify an implementation of a predetermined method of providing a deep link into the iOS application; and (ii) generate intermediate representation code by formatting portions of the ARM code having predetermined patterns according to predetermined instructions, respectively. A loader module is configured to translate the intermediate representation code into executable code including objects in a tuple format and to load the executable code for execution. An execution and emulation module is configured to: (i) execute the executable code line by line to identify NSURL objects; (ii) emulate the NSURL objects to identify valid ones of the NSURL objects; (iii) determine deep links for the valid ones, of the NSURL objects, respectively; and (iv) store the deep links in memory. |
| US09652204B2 |
Dynamically reconfigurable code execution architecture for building diagnostic algorithms
Methods and apparatus are provided for building and executing reconfigurable algorithms in on-board environments which require pre-certification of the compiled code, such as avionics, flight control, and military applications. The code execution architecture includes a library of reusable function modules in the form of pre-compiled code blocks; an algorithm execution utility (AEU) for processing a user-assembled string of code blocks; and a customer interface for selecting code blocks, defining their associated parameters and sequence (execution order), structuring inputs and outputs, and for providing the integrated, machine readable application to the AEU at run time. The various sequences, permutations and combinations of functions and their associated parameters, inputs and outputs are pre-approved or certified a priori; consequently, the on-board reconfiguration and execution of complex algorithms may be performed in real time without the need for recoding, verification, or redeployment of the code base. |
| US09652203B1 |
Application development framework using configurable data types
Disclosed by way of example embodiments is an application development and execution framework that enables application developers to create comprehensive business software without writing code and/or complex business or data manipulation logic. The fundamental building blocks of the framework are configurable dynamic data types that operate as pre-programmed units configured to perform one or more data collection and/or data manipulation operations. An application developer can combine and extend a variety of the configurable dynamic data types to create software that encapsulates complex business workflows. Importantly, the configurable dynamic data types can be configured and combined in an easy-to-use graphical interface that enables faster and less time-consuming application development. |
| US09652191B2 |
Electronic beacon, use of the electronic beacon, a print system comprising an electronic beacon and a method for an electronic beacon in a printed product production process
An electronic beacon is used in a print system connected to an at least partially wireless network system. The electronic beacon is linkable to the print job via the network system, placeable on top of, attachable to or insertable in a physical intermediate product or a physical end product resulting from the print job. The electronic beacon includes a switch for activating and deactivating the electronic beacon, a memory for storing a link to the print job, and a signaling device for giving an electronic signal when the print job linked to the electronic beacon is selected on a mobile device connected to the network system. Upon detection that a mobile device and an electronic beacon are in each other's proximity, a link of a print job selected on the mobile device is sent via the network system to the memory of the electronic beacon upon activation of the electronic beacon, a link of a print job stored in the memory of the electronic beacon is sent via the network system to the mobile device, and a link of a print job stored on the electronic beacon is deleted from the memory of the electronic beacon upon deactivation of the electronic beacon. |
| US09652188B2 |
Image forming apparatus, method for controlling image forming apparatus, and computer-readable storage medium storing program for executing an operation based on a storage mode of the image forming apparatus
An image forming apparatus includes a storage unit having a first storage area and a second storage area, and a control unit configured to store externally input print data in the first storage area when the image forming apparatus is operating in a forcible storage mode. The control unit, if a storage instruction is added to the externally input print data, stores the input data in the second storage area, not in the first storage area. |
| US09652187B1 |
Image forming system that ensures continuous use of print resources and image forming method
An image forming system includes a plurality of image forming apparatuses, a client computer, and a print server. The print server requests, in response to a new connection of the plurality of the image forming apparatuses to the network, a resource related to the image formation process available for the plurality of the image forming apparatuses, and a license key including a validity term of a license for using the resource in the print server to the newly connected image forming apparatuses. The print server stores the resource and the license key provided by the plurality of the image forming apparatuses and registers resource information related to the resource and the license key in a database of the print server. |
| US09652186B2 |
Apparatus and system for controlling output of data
An apparatus includes a data receiving part that receives output data from an information terminal; a data recording part that records the output data received by the data receiving part in a storage part in association with user information identifying a plurality of users; an information accepting part that accepts user information identifying a user; a first control part that controls output execution of output data included in the recorded output data that is associated with the user information accepted by the information accepting part; and a second control part that implements a control measure after the output data associated with the user information identifying the plurality of users is executed based on user information identifying one user of the plurality of users. The control measure is implemented to prevent output execution of the executed output data. |
| US09652182B2 |
Shareable virtual non-volatile storage device for a server
Disclosed are a system, a method and/or an apparatus of a shareable virtual non-volatile storage device for a server. In one embodiment, the system includes a server, a storage array, a management processor, and a switching fabric. The storage array includes a storage device coupled with a controller associated with a shared driver to receive a data request from the server at a remote location from the storage array through the switch fabric via a communication link to direct the data request to the storage device coupled with it and transmit data to the server through the switch fabric. A virtual storage device is generated in the server to enable the server to share the shared driver in the storage array with other servers through the switch fabric between the server and the storage array. The server distributes the data across the storage devices through the shared driver. |
| US09652180B2 |
Memory device, memory system, and control method performed by the memory system
Provided are a memory device, a memory system, and a control method performed by the memory system. The control method includes operations of generating, by a first function block of the memory system, a main request comprising a first sub-request for a first operation that is requested by an external source and a second sub-request for a second operation that is dependent upon a processing result of the first operation; processing, by a second function block of the memory system, the first sub-request or the second sub-request; and when a processing result of the first sub-request performed by the second function block is a fail, transmitting, by a third function block of the memory system, abortion information to the first function block in response to the main request, regardless of processing the second sub-request. |
| US09652174B2 |
Managing an analytic function to be performed on data stored in an input block
In an example, an analytic function to be performed on data stored in an input block is managed through an interface to a framework through which a user is to define the analytic function. The framework is to buffer batches of the data into a memory through implementation of a Reader, a Writer, a PreReader, and a PreWriter on the data stored in the input block when the user-defined analytic function is performed, and wherein the Reader, the Writer, the PreReader, and the PreWriter are individually movable with respect to each other in the input block. In addition, the user-defined analytic function is received through the interface. |
| US09652171B2 |
Datapath subsystem, method and device utilizing memory sharing
A packet processing system having a control path memory of a control path subsystem and a datapath memory of a datapath subsystem. The datapath subsystem stores packet data of incoming packets and the control path subsystem performs matches of a subset of packet data, or a hash of the packet data, against the contents of a the control path memory in order to process the packets. The packet processing system enabling a portion of the datapath memory to be used by the control subsystem if needed or a portion of the control path memory to be used by the datapath subsystem if needed. |
| US09652167B2 |
Memory system and method of controlling nonvolatile memory
According to one embodiment, a controller executes first refreshing in a case where a first value of a first block is larger than a first threshold and less than a second threshold. The first refreshing includes reprogramming a plurality of second memory cells among a plurality of first memory cells included in the first block. |
| US09652157B2 |
Accelerated non-volatile memory recirculation processing
A method, according to one embodiment, includes: receiving a recirculation command, performing a coarse page lookup to determine valid ones of logical pages to be recirculated, issuing write commands for the valid logical pages, requesting performance of a fine page lookup on source physical addresses containing the valid logical pages to verify the valid logical pages, receiving verified valid logical pages resulting from the fine page lookup, and sending the write commands corresponding to the verified valid logical pages. Other systems, methods, and computer program products are described in additional embodiments. |
| US09652155B2 |
Computer system, cash data management method, and computer
A computer system, comprising: a service server on which an application; a storage server for storing data used by the application; and a management server for managing the service server and the storage server, the service server including a cache device which a server cache for temporarily storing data is set, and including an operating system and an I/O request monitoring unit for monitoring an I/O request issued by the application, and issuing a dummy I/O request for controlling an arrangement of data in the server cache in a case where a predetermined condition is satisfied, the management server including a cache optimization unit for generating a control policy for issuing the dummy I/O request. |
| US09652152B2 |
Efficient decompression locality system for demand paging
Aspects include computing devices, systems, and methods for implementing executing decompression of a compressed page. A computing device may determine a decompression block belonging to a compressed page that contains a code instruction requested in a memory access request. Decompression blocks, other than the decompression block containing the requested code instruction, may be selected for decompression based on their locality with respect to the decompression block containing the requested code instruction. Decompression blocks not identified for decompression may be substituted for a fault or exception code. The computing device may decompress decompression blocks identified for decompression, terminating the decompression of the compressed page upon filling all blocks with decompressed blocks, faults, or exception code. The remaining decompression blocks belonging to the compressed page may be decompressed after or concurrently with the execution of the requested code instruction. |
| US09652151B2 |
Conflict management for application directed data placement in storage environments
A storage controller receives hints provided by one or more applications over a period of time, wherein the hints are used by the storage controller for organizing data in storage managed by the storage controller. Data on conflicts caused by the provided hints are collected over the period of time. Based on the collected data on the conflicts, one or more conflict avoidance rules are executed to reduce possibility of future conflicts. |
| US09652145B2 |
Method and apparatus for providing user interface of portable device
A method includes displaying a user interface for displaying a graphic and a hidden graphic in a first area; displaying a set of contents corresponding to the graphic in a second area distinguishable from the first area; detecting a user's gesture for selecting a part of the first area; enlarging the first area to include a part of the second area; displaying a plurality of graphics including the graphic and the hidden graphic in the extended first area in response to the user's gesture; detecting a user's additional gesture for moving a first graphic among the plurality of graphics; and moving the first graphic to a part of the extended first area in response to the user's additional gesture, and moving a second graphic of the plurality of graphics to an area from which the first graphic is moved out. |