| Document | Document Title |
|---|---|
| US09578246B2 |
Electronic device and method for controlling image display
An electronic device and a method for controlling photographic capture. A first image is acquired by a first camera having a first viewing angle. A second image is acquired by a second camera having a second viewing angle, the second viewing angle being different from the first viewing angle. The first image is overlaid with at least one object from the second image, or an icon corresponding to the object. The first camera and the second camera are mounted to a same surface, or to disparate surfaces relative to one another. Photographic capture or control is triggered in response to movement of the object. |
| US09578243B2 |
Photographing apparatus and photographing control method
A photographing apparatus includes a movable-member driver configured to move a movable member in a direction that is different from an optical axis of a photographing optical system, wherein the movable member includes at least one of an optical element, constituting at least one part of the photographing optical system, and an image sensor; a movable-member drive controller configured to drive the movable member to move in a circular path of a predetermined diameter via the movable-member driver; and a processor configured to select a drive diameter D of the circular path by which the drive controller drives the movable member within a range of the following condition (1): d*π/(2*21/2)≦D≦d*π/2 (1), wherein d designates a pixel interval of the image sensor. |
| US09578241B2 |
Image stabilizing apparatus and method based on a predicted movement position
Provided are an image stabilizing apparatus and method thereof. The image stabilizing apparatus performs image stabilization by using both an image sensor and a motion sensor. Image distortion and movement are stably corrected by using both the position of a feature point, which is extracted by the image sensor and image processing, and the movement position of the feature point, which is predicted by the motion sensor. |
| US09578237B2 |
Array cameras incorporating optics with modulation transfer functions greater than sensor Nyquist frequency for capture of images used in super-resolution processing
A variety of optical arrangements and methods of modifying or enhancing the optical characteristics and functionality of these optical arrangements are provided. The optical arrangements being specifically designed to operate with camera arrays that incorporate an imaging device that is formed of a plurality of imagers that each include a plurality of pixels. The plurality of imagers include a first imager having a first imaging characteristics and a second imager having a second imaging characteristics. The images generated by the plurality of imagers are processed to obtain an enhanced image compared to images captured by the imagers. In many optical arrangements the MTF characteristics of the optics allow for contrast at spatial frequencies that are at least as great as the desired resolution of the high resolution images synthesized by the array camera, and significantly greater than the Nyquist frequency of the pixel pitch of the pixels on the focal plane, which in some cases may be 1.5, 2 or 3 times the Nyquist frequency. |
| US09578230B2 |
Image capturing apparatus that performs shading correction and control method therefor
An image capturing apparatus comprises an image sensor including a photoelectric conversion portion configured to receive light beams having passed through a portion of a pupil area of an imaging lens and output an image signal, a control unit configured to output, from the photoelectric conversion portion, a plurality of image signals captured by shifting a focus position of the imaging lens, an acquisition unit configured to acquire an image shift amount on an image sensing plane of the image sensor, which corresponds to a shift amount when shifting the focus position of the imaging lens; and a calculation unit configured to calculate a correction coefficient for shading on the image sensing plane based on the image shift amount by comparing signals corresponding to the same object among the plurality of image signals. |
| US09578221B1 |
Camera field of view visualizer
Camera field of view visualizers differentially illuminate objects visible within and without a camera lens focal area, and also supporting surfaces located outside of but relative to the focal area wherein objects located thereon are visible within the focal area, relative to different supporting surfaces that are also located outside of the focal area but relative to the focal area wherein objects located thereon are not visible within the focal area. At an end of an illumination time period an amount or type of illumination that is visible within image information acquired from objects illuminated thereby within the focal area is reduced or revised for an image data acquisition time period so that it is not visible within image information acquired by an image data receiving means, and image information is captured via the image data receiving means from objects that are located within the focal area. |
| US09578219B2 |
Image-capturing device having infrared filtering switchover functions
An image-capturing device having infrared filtering switchover functions includes an infrared light emitting diode, an image sensor, an ambient light sensor, an infrared filter member and a switch module. The infrared light emitting diode emits infrared lights outwardly. The image sensor receives a reflection light reflected from an object. The ambient light sensor receives an ambient light. The infrared filter member filters infrared rays from the reflection light at a first location or the ambient light at a second location. The switch module is coupled to the infrared filter member, and can alternatively move the infrared filter member to the first location and the second location. The infrared lights are part of the reflection light and the ambient light. |
| US09578218B2 |
Comb drive and leaf spring camera actuator
An actuator package includes a base frame member and an image sensor. The actuator package further includes a plurality of comb drive actuators affixed to the base frame member by a plurality of respective electrically conductive leaf spring flexures. The respective electrically conductive leaf spring flexures provide an electrical current conductive path between the image sensor and conductors mounted on the base frame member, and the plurality of comb drive actuators is arranged to control the motion of the image sensor in multiple degrees of freedom relative to the fixed structure. Each of the plurality of comb drive actuators includes at least two independent comb drive array portions. At least one of the comb drive array portions generates force tending to move the image sensor out of a plane of the base frame member. |
| US09578214B2 |
Image pickup apparatus with air cooling unit
An image pickup apparatus that is excellent in rigidity and in heat radiation efficiency. The image pickup apparatus has a heat sink-cum-duct disposed between a pair of cover members that constitute left and right exteriors of an apparatus main unit and that are fixed to the heat sink-cum-duct. The heat sink-cum-duct has an opening formed to correspond to an air inlet port of an air cooling fan and has a plurality of fins, and sucks air through the opening from the outside. The sucked air is guided to the air inlet port of the cooling fan through a ventilation path defined by the plurality of fins. |
| US09578210B2 |
A/V Receiving apparatus and method for delaying output of audio signal and A/V signal processing system
An A/V receiving apparatus is disclosed. The A/V receiving apparatus includes a first interface connected to a display apparatus, a second interface connected to an audio signal output apparatus, and a controller configured to, when a video signal and an audio signal are received, transmit an audio signal return request to the display apparatus along with the video signal and the audio signal, when the audio signal is returned from the display apparatus, calculate an output time difference of the video signal and the audio signal based on a return timing of the audio signal, delay the audio signal according to the output time difference and transmit the audio signal to the audio signal output apparatus. |
| US09578202B2 |
Communication apparatus and method of controlling communication apparatus
A communication apparatus is connected to an external apparatus in a connection mode selected from a plurality of connection modes including a first connection mode in which an external apparatus is connected in accordance with a predetermined operation on the communication apparatus and a second connection mode in which an external apparatus is connected in accordance with an operation whose operation amount is smaller than the predetermined operation. The communication apparatus has a plurality of operation modes to select at least one of contents saved in a recording medium. When connecting the external apparatus in the second connection mode, an operation mode in which the contents are selected based on the operation on the external apparatus is selected out of the plurality of operation modes. |
| US09578200B2 |
Detecting a document using one or more sensors
A mobile device may have a rear facing camera and a depth sensor to capture a portion of a document or a book in an environment. A processor may identify the document or the book based on the captured portion, a captured first part of the environment, a captured second part of the environment, and information received via a network adapter. |
| US09578199B2 |
Control of driving element
An apparatus according to the present invention includes a reception unit which receives selection of a function from a plurality of types of functions, an execution unit which executes the function received by the reception unit, a determination unit which determines whether temperature rise suppression of a predetermined driving element is necessary, and a stop control unit which performs stop control on the predetermined driving element in accordance with the type of the selected function, if the determination unit determines that temperature rise suppression is necessary. |
| US09578195B1 |
Automatic scanning of document stack with a camera
Automatically scanning multiple document sheets with a camera includes receiving a video stream while the camera is pointed at the multiple document sheets, detecting presence of a first top page of the multiple document sheets based on the video stream, taking a still photograph of the first top page in response to detecting presence of the first top page, detecting presence of a second top page based on the video stream by confirming that the second top page is different from the first top page and by waiting a predetermined amount of time for an image of the second top page to stabilize, and taking a still photograph of the second top page in response to detecting presence of the second top page. Detecting the pages may include determining that the camera is pointing at the stack of documents and a detected page is not obstructed. |
| US09578194B2 |
Image forming apparatus using sync signals for duplex scanning
In an image reading device, a sync signal outputting portion alternately outputs a first sync signal and a second sync signal while the document sheet is moving in a range including a first position and a second position in a conveyance path. A first image sensor and a second image sensor read images from both sides of a document sheet and output image signals in synchronization with the first sync signal and the second sync signal, respectively. An AFE performs a predetermined signal processing in sequence to the image signals that are output alternately. |
| US09578186B2 |
Image display apparatus having image-related information displaying function
A first mobile electronic device includes a camera that has a lens and that outputs image data from a subject; a first communication circuit that transmits the image data to a server; and a second communication circuit different from the first communication circuit and that transmits information related to the server to a second mobile electronic device. |
| US09578181B2 |
Digital security network system and method
A monitoring device 100 comprises a control unit 101 including a positional information acquisition section 101A that tracks an existing position of the communication terminal 120 and acquires positional information of the communication terminal 120 and a jurisdiction retaining section 101B that retains a jurisdictional district to receive an emergency telephone call where a building under security exists, an input/output unit 102 that detects an emergency situation based on a sensor output from the input/output device 110, and an alarm sending unit 103 that reports an e-mail transmission or an image via the telephone line 130. The control unit 101, when having detected an emergency situation, performs control to specify a communication terminal 120 that exists in the police jurisdictional district or fire jurisdictional district with reference to the jurisdiction retaining section 101B, and to report preferentially to the specified communication terminal 120. Accordingly, reporting preferentially to a mobile phone within a jurisdictional district where a building under security exists allows promptly reporting when an emergency call is made from the mobile phone. |
| US09578178B2 |
Multicall telephone system
A Multicall telephony system has a first land-line telephone connected to a central switch in a land-line telephone network and a server executing SW on a processor from a non-transitory medium, the server also coupled to the land-line telephone system by a service telephone number. In operation a user dials the service telephone number, and when connected, dials two or more telephone numbers separated by delimiters and followed by a terminator character, and the server, executing the software, dials the two or more telephone numbers separated by delimiters in the call from the first land-line telephone, and connects answered calls in a conference with the call placed by the first land-line telephone. |
| US09578174B2 |
System and method for out-of-band communication with contact centers
A method for connecting a website user to a contact center includes: establishing a communication channel between a user and an agent of the contact center, the communication channel comprising a voice communication channel; establishing a supplemental channel between the user and the contact center for exchanging data between the user and the contact center; and storing the data exchanged in the supplemental channel in association with the communication channel. |
| US09578172B2 |
System and method for providing interaction history via a customer application
A system and method for processing interaction requests includes a computer system that receives over a data channel from an end user device accessible to the customer, a request for an interaction. The request includes data from an application running on the end user device. The data is stored by the computer system upon receipt. When a voice call from a telephony device accessible to the customer is received, a voice media session is established with the telephony device over a voice channel. The data is identified based on information associated with the voice call. A contact center resource is further identified for routing the voice call. The data is attached to a request to route the call to the identified contact center resource. |
| US09578163B2 |
Electronic device and method thereof for calling phone number
The present disclosure disclose an electronic device and a method thereof for calling a phone number, and the method includes: judging whether a component of a gravitational acceleration of the electronic device in a preset direction is more than or equal to a first threshold after a program installed on the electronic device is started; detecting an object in front of the electronic device at a distance from the electronic device, which is less than or equal to a second threshold when the component of the gravitational acceleration of the electronic device in the preset direction is more than or equal to the first threshold; and calling the phone number automatically when there is an object in front of the electronic device at a distance from the electronic device, which is less than or equal to the second threshold. |
| US09578156B2 |
Method and apparatus for operating an electronic device
An electronic device comprising: a communication interface; a memory; and at least one processor coupled to the memory and the communication interface, wherein the at least one processor is configured to: detect a change of state of the electronic device; transmit to a secondary electronic device a first information item associated with the change of state of the electronic device; receive a second information item from the secondary electronic device in response to the first information item; and perform an operation based on the secondary information item. |
| US09578149B2 |
Electronic device including display with bent area
A portable electronic device is provided. The electronic device includes a transparent front glass cover including a planar portion that forms a front surface of the electronic device, a planar rear glass cover that forms a rear surface of the electronic device, a metal bezel that surrounds a space formed by the front glass cover and the rear glass cover, and a flexible display device that is embedded in the space and exposed through the front glass cover. The front cover includes a left bent portion and a right bent portion on the left and right of the planar portion at the center of the front cover. |
| US09578148B2 |
Smartphone capable of detecting touch position and pressure
A smartphone may be provided that includes: a cover layer; an LCD panel; a backlight unit which is located under the LCD panel; a pressure electrode which is located under the backlight unit; a shielding member which is located under the pressure electrode; and a converter which converts a signal comprising information for a capacitance change amount outputted from the pressure electrode to a digital signal. A magnitude of a touch pressure is detected from the digital signal. |
| US09578146B2 |
Electronic assembly and electronic apparatus
An electronic assembly including a housing, a circuit board, and a battery module is provided. The housing has an accommodating space and at least a portion of the housing is curved surface. The circuit board is disposed in the accommodating space. The battery module is disposed in the accommodating space and stacked on the circuit board, wherein at least a portion of the battery module is located between the housing and the circuit board, and at least a portion of the battery module is bent and corresponded to the curved surface of the housing. An electronic apparatus including the electronic assembly aforementioned is also provided. |
| US09578134B2 |
Mobile hub devices and docking stations for controlled delivery of digital multimedia data
Mobile hub devices and docking stations facilitate controlled delivery of digital multimedia data from a content service provider. A mobile hub device includes a transceiver configured to receive and transmit digital multimedia data over a plurality of communication links. The mobile hub device includes a processor for identifying content providers which permit the mobile hub device to download multimedia data hosted by the content providers. The processor schedules delivery of the multimedia data from the content providers to the mobile hub device. |
| US09578131B2 |
Virtual machine migration based on communication from nodes
Technologies are generally described for systems, devices and methods effective to migrate a virtual machine between computing devices. A first and second node may be identified effective to access the virtual machine at a first computing device. First and second vectors related to the first and second nodes, respectively, may be determined. The first and second vectors may relate to values of a parameter. The parameter may relate to communication between the nodes and the first computing device. The vectors may form a distribution. A feature of the distribution of the vectors may be determined. A first magnitude between the first computing device and the feature may be determined. A second magnitude between the second computing device and the feature may be determined. The virtual machine may be migrated from the first computing device to the second computing device if the second magnitude is less than the first magnitude. |
| US09578126B1 |
System and method for automatically discovering wide area network optimized routes and devices
A system, medium and method of automatically discovering a wide area network optimized route is disclosed. A client request is received at a second optimization device to access a server. The second optimization device is of a second local area network with respect to a wide area network (WAN) and is configured to communicate with the server. A probe request is received at the second optimization device from a first optimization device of a first local area network. The probe request establishes an optimization route with the first optimization device. A probe response is sent to the first optimization device, wherein the probe response provides identifying information of the second optimization device. A paired relationship is established, wherein configuration information of the first and second optimization devices are exchanged. An optimization route based on the configuration information is exchanged between the paired first and second optimization devices. |
| US09578122B1 |
Communicating an E-mail from a sender to a plurality of recipients
An e-mail comprising general content is communicated from a sender to a plurality of recipients. The general content is identical for all recipients of the plurality of recipients. A definition of the plurality of recipients for the e-mail is received. The general content of the e-mail is received. A tag is inserted into the e-mail. The tag is indicative of personalized information designated for a recipient of the plurality of recipients. The e-mail is sent to the plurality of recipients. The general content is adapted with dynamically-generated content. The adaptation is based on the tag and based on the personalized information. |
| US09578120B1 |
Messaging with key-value persistence
Techniques are described for providing a messaging service that employs a distributed key-value store for message persistence. On receiving a message to be enqueued for subsequent delivery, a message identifier is generated and employed as a key to store the message in the key-value store. The message identifier may be generated based on an available location in a message tracking data structure. In some cases, the message tracking data structure may be an append tree data structure that is substantially self-balancing as an increasing number of messages are tracked using the append tree data structure. The message tracking data structure may be further employed to determine a message identifier for a message to be vended from the key-value store. |
| US09578119B2 |
Method, server, and client for pushing and displaying splash screen
Methods, servers, and clients for pushing and/or displaying a splash screen are provided herein. In an exemplary embodiment, a server can receive identification information sent from a client. The identification information can include user identification, a globally unique identifier (GUID) of the client, or a combination thereof. The server can obtain feature information correlated with the identification information from a preset database. The server can configure a splash screen according to the feature information and send the splash screen to the client. The splash screen can be displayed next time when the client is opened up. |
| US09578117B2 |
Service discovery using a network
Described are techniques and systems for service discovery on a network. A media device on the network generates a signature indicative of a particular set of one or more services available for execution on the media device. The signature may be distributed on the network using beacon transmissions from the media device. A receiving media device compares the signature with previously stored service data which associates signatures with service sets. The stored service data may include a local signature indicative of a local service set. Determinations of a match result in the receiving media device using the previously stored data. Unmatched signatures may result in the receiving media device sending a request for service set data. The received service set data may then be used to provide service availability information. The received service set data and associated signature may be added to the stored service data. |
| US09578115B2 |
Indoor location server provision and discovery
Systems and methods are presented for discovering a local location server associated with a local provider based on a relationship between the local provider and another regional/global provider. A mobile device discovers the local provider and queries a home location server which returns the address of a regional/global location server associated with the regional/global provider. A mobile device then queries the regional/global location server to discover the local location server and may then access the local location server to obtain location services. The method may be employed with the OMA SUPL location solution wherein the home location server may be an H-SLP and the local and regional/global location servers may be D-SLPs. |
| US09578114B2 |
External service application discovery method
An external service application discovery process that connects a host with an external application server running a service application allowing a user of a client computing device to work with a file via a web browser. The host brokers the functionality of an external application server and serves as the platform where interactions between the client computing device and the external application server occur. An open interface protocol, which is a shared communication protocol, allows the host to communicate instructions from the client computing device to the external application server. Through the external service application discovery process, the external application server describes functionality provided by the service application to the host. The host selectively makes the functionality provided by the service application available to users based on the level of implementation of the open platform interface and the conventions of the external service application discovery process understood by the host. |
| US09578113B2 |
Method and apparatus for transferring remote session data
Examples of systems and methods are provided for communication and for forwarding display data and cursor type related to a remote session between a client device and a remote server. The system may facilitate establishing the remote session with the remote server. After the client device is connected to a remote session, it is determined if the style of the client device's cursor should be changed. The RDP client of the remote server creates the changed cursor based on bitmap details. The change cursor may be a 1-bit or 32-bit cursor. When the remote session is disconnected, the default cursor for the client device is re-instated at the client device. |
| US09578108B1 |
Method and apparatus for configuring a data source name (DSN) for use during a data source access
Certain aspects of the present disclosure relate to a technique to configure a data source name (DSN) for use during a data source access. A driver is selected. An identifier is provided that identifies a class, and a library or an application that implements a driver interface for accessing the data source. A connection string is forwarded with the identifier from an implementation of the driver interface to the driver. The connection string is forwarded from the driver to a driver manager managing a client. |
| US09578106B2 |
System and method for binding a virtual desktop infrastructure host and media soft client together
Methods and systems are provided that utilize the functionality of an end user device in binding a virtual desktop infrastructure (VDI) media client on an end user device with a VDI host client on a VDI server. In particular, the native operating system (OS) on the end user device may take a screen-shot of a quick response (QR) code displayed to a graphical user interface of the end user device. The end user device may provide information associated with the screen-shot of the QR code to a collaboration server where the collaboration server binds the VDI media client together with the VDI host client upon verifying the information associated with the screen-shot of the QR code. |
| US09578103B1 |
Crowd sourced content for local social media context aboard a mobile communications platform
A system includes a local social media context server aboard a vehicle, the local social media context server including logic to implement a local social media context for a passenger aboard the vehicle, the local social media context being configured with a duration commensurate with a duration of a trip by the passenger on the vehicle; an antenna coupled to the local social media context server; and logic to prioritize content posted to the local social media context by the person for promotion to the person's global social media context. |
| US09578101B2 |
System and method for sharing san storage
According to various embodiments, systems and methods are provided that relate to shared access to Storage Area Networks (SAN) devices. In one embodiment, a Storage Area Network (SAN) host is provided, comprising: a server component: a first host bus adapter configured to be connected to a SAN client over a first SAN; a second host bus adapter configured to be connected to a SAN storage device over a second SAN; and wherein the server component is configured to manage a data block on the SAN storage device, receive a storage operation request from the SAN client through the first host bus adapter, and in response to the storage operation request, perform a storage operation on the data block, the storage operation being performed over the second SAN through the second host bus adapter. |
| US09578098B2 |
Management system and management method
A management system manages a storage system and a server computer. The management system (A) acquires the storage level pool information that includes the information of a capacity of a storage level pool from the storage system, (B) acquires the server level pool information that includes the information of a capacity of a server level pool from the server computer, (C) determines a first risk degree that indicate a risk of a depletion of a free capacity of the storage level pool based on the storage level pool information, (D) determines a second risk degree that indicate a risk of a depletion of a free capacity of a server level pool based on the server level pool information, and (E) displays the information that is associated with the first risk degree that indicate a risk of a depletion of a free capacity of the storage level pool and the second risk degree that indicate a risk of a depletion of a free capacity of the server level pool. |
| US09578093B1 |
Geographic space management
Geographic space may be managed by a system including a plurality of subsystems operable to respectively perform data processing, the data processing relating to traffic, of a plurality of regions, the plurality of regions obtained by dividing a geographic space including routes on which mobile objects move, and one or more servers collectively operable to obtain statistic information of at least one subsystem among the plurality of subsystems, the statistic information relating to a processing load of the at least one subsystem, and divide the geographic space into the plurality of regions based on the statistic information. |
| US09578091B2 |
Seamless cluster servicing
Embodiments are directed to progressively migrating source computer nodes where the source computer nodes perform a computer-implemented service. In one embodiment, a computer system determines that execution of the performed service is to be migrated from the source computer nodes to target computer nodes. The computer system groups the source computer nodes into multiple source subgroups, where each source subgroup includes at least one source computer node. The computer system then schedules creation of target subgroups of target nodes. These target subgroups include at least one source computer node and, themselves, correspond to a source subgroup. The computer system activates a first target subgroup corresponding to a first source subgroup, and deactivates the first source subgroup. In this manner, the first target subgroup replaces the first source subgroup. Still further, the target subgroups are scheduled to be created only after the first source subgroup has been deactivated. |
| US09578089B2 |
Remote invocation mechanism for logging
One or more events occurring within a client-side web application are logged at a remote server using a script-based invocation mechanism. The mechanism comprises a client-side script, and associated server-side code. Upon occurrence of an event to be logged, a script object is created on the client and used to pass logged data to the server, which then issues a response to destroy the script object. In this manner, the script object is created and persists in the client only as long as it is needed to log the event. |
| US09578088B2 |
Globally distributed utility computing cloud
Teachings of this application include a computing network that may include multiple different data centers and/or server grids which are deployed in different geographic locations. In at least one embodiment, at least some of the server grids may be operable to provide on-demand, grid and/or utility computing resources for hosting various types of distributed applications. In at least one embodiment, a distributed application may be characterized as an application made up of distinct components (e.g., virtual appliances, virtual machines, virtual interfaces, virtual volumes, virtual network connections, etc.) in separate runtime environments. In at least one embodiment, different ones of the distinct components of the distributed application may be hosted or deployed on different platforms (e.g., different servers) connected via a network. In some embodiments, a distributed application may be characterized as an application that runs on two or more networked computers. |
| US09578085B2 |
Mobile application system
A method includes accessing a webpage at a web server from a mobile application executing at a mobile device. A mobile application tag may be identified in the webpage, where the mobile application tag is independent of a device type of the mobile device. The method also includes determining that the mobile application tag corresponds to a native device function of the mobile device and accessing the native device function. |
| US09578083B1 |
Dynamically designing shared content
A system and method for dynamically designing shared content served via a content sharing source. The system includes a content size determination unit to determine a size of content sourced from the content sharing source; a shared content size allocation unit to determine a size of the shared content based on the size of the content; a shared content rules database to determine a design style associated with the shared content based on the determined size of the shared content; and a shared content transmitting unit to communicate the shared content in accordance with the design style to the content sharing source. |
| US09578075B2 |
Software streaming system and method
A method for streaming software may include downloading blocks associated with a software title until an executable threshold is reached, initiating execution of the software title, and continuing to download blocks of the software title while the software title is executed. Another method for streaming software may include sending to a client data sufficient for the client to build a virtual directory structure for use in executing a software title, streaming a subset of blocks associated with the software title to the client, and streaming additional blocks associated with the software title to the client on demand. A system for streaming software may include a server computer and a client computer. The server computer may include a program database and a streaming engine. In operation the streaming engine may stream an executable streaming application from the program database to the client. |
| US09578073B2 |
System and method for decision support in a virtual conference
A virtual conferencing system is described which evaluates and selects participants for active participation based on one or more criteria. For example, one embodiment of virtual conferencing system comprises: a plurality of clients operated by participants and at least one moderator of a virtual conference, each of the clients comprising state management logic to maintain a current state of the virtual conference; a virtual conferencing service to establish audio and/or video connections between the plurality of clients during the virtual conference, the virtual conferencing service further including a state synchronization service communicatively coupled to the state management logic on each client to ensure that the current state of the virtual conference is consistent on each client; a virtual conferencing graphical user interface (GUI) to be rendered on the plurality of clients, the virtual conferencing GUI configured, via signals sent from the state synchronization service, to display a video stream of one or more current speakers during the virtual conference utilizing the established video connections; and a decision support module to evaluate the participants according to one or more criteria in the virtual conference and to select a subset of the set of participants as candidates to actively participate in the virtual conference based on the evaluation. |
| US09578071B2 |
Context aware interaction
A network-connected server for meeting initiation has software executing on the server from a non-transitory physical medium, the software providing a function allowing a user to schedule a meeting and to configure availability conditions, a function for informing scheduled participants of the scheduled meeting, a function for receiving indications of availability for the scheduled meeting from communication appliances associated with scheduled participants, and a function for connecting the communication appliances to communicate when the configured availability conditions are met. |
| US09578069B1 |
Cooperative IMS access from a visited domain
Embodiments disclosed herein provide systems, methods, and computer readable media to provide roaming IP multimedia subsystem (IMS) access. In a particular embodiment, a method provides, in a communication interface, attaching a communication device to provide the communication device with access to a broadband access network associated with a visited domain of the communication device. The method further provides, in a proxy call session control element of a broadband services gateway (BSG), registering the communication device to access IMS services on behalf of an IMS core in the visited domain over the broadband access network, conveying Session Initiation Protocol (SIP) signaling between the communication device and the IMS core as a SIP proxy, and establishing a communication session between the communication device and the IMS core. |
| US09578068B2 |
Methods and apparatus for processing an IMS session
There is provided a method of processing an IMS session originated by a UE after restart of a S-CSCF that was previously assigned to a user of the UE during registration with the IMS, when a further S-CSCF is currently assigned to the user. The method comprises, at a HSS, receiving a request to register a user identity of the user from the previously assigned S-CSCF, determining that the previously assigned S-CSCF is not the same as a S-CSCF currently assigned to the user, determining if IMS restoration procedures are supported for the UE, and, if IMS restoration procedures are not supported for the UE, sending a response to the previously assigned S-CSCF, the response identifying the further S-CSCF currently assigned to the user. |
| US09578066B1 |
Systems and method for assuring security governance in managed computer systems
An agile governance system provides recommendations for infrastructure change requests concerning a cloud-based computer environment in accordance with security policies regarding data to be used in connection with applications impacted by the requests. The nature and character of the data is determined using an interactive dialog with a requesting entity. Possible responses provided by the requesting entity are mapped to security policy requirements, which, in turn, are used to determine infrastructure stack requirements. Where pre-approved solutions that satisfy the security needs for the requested infrastructure change exist, they are recommended; otherwise, the requesting entity is presented with the recommendation for the requested infrastructure change along with a list of required approvals and approvers. |
| US09578063B1 |
Application self-service for assured log management in cloud environments
A log management service provides automated log management for any applications deployed on a cloud. A security profile defining the logging requirements for the application is associated with the application. During deployment, a deployment appliance queries the service, providing an application context and deployment topology. The log management service references the supplied application context and deployment topology against the defined log requirements in the security profile and, in response, determines an applicable set of log files, residency and longevity requirements. The log management service then identifies/specifies the log collection resources and requirements that are necessary and instructs the requesting deployment process to configure the one or more log sources and event collectors as needed. As log data is generated by the log sources, logs are sent to a specified log management service provider for the deployed application, and the log management service provider handles particular audit requirements. |
| US09578060B1 |
System and method for data loss prevention across heterogeneous communications platforms
In one embodiment, a method includes activating a cross-platform DLP policy for enforcement against a plurality of users on each of a plurality of heterogeneous communications platforms. The method further includes monitoring communications of the plurality of users on each of the plurality of communications platforms for violations of the cross-platform DLP policy. The method also includes, responsive to a detected violation of the cross-platform DLP policy by at least one user on at least one communications platform, dynamically acquiring context information for the detected violation using information associated with the detected violation. In addition, the method includes publishing violation information to one or more designated users. The violation information includes at least a portion of the information associated with the detected violation and at least a portion of the context information. |
| US09578059B2 |
Policy enforcement in a secure data file delivery system
A server interacts with a sender to form a package which can include one or more attached data files to be sent to one or more recipients, and the server applies a policy established by a policy authority of the sender to the package. Since the server both forms the package through interaction with the sender and applies the policy, violations of the policy by the package can be brought to the sender's attention during an interactive session with the sender and before encryption of all or part of the package. As a result, the sender is educated regarding the policy of the sender's policy authority, and the sender can modify the package immediately to comport with the policy. The server delivers the package to intended recipients by sending notification to each recipient and including package identification data, e.g., a URL by which the package can be retrieved. |
| US09578058B2 |
Method and internet terminal for remotely performing operations on a secure element connected to a communication device
The invention relates to a method for remotely performing operations determined by a service provider on a secure element connected to a communication device having a user application capable of IP based communication, characterized by providing a non service provider specific Internet terminal client module for the user application for establishing connection with the secure element; obtaining context parameters for connection to an Internet terminal provider module hosted on a remote server via the user application, launching the Internet terminal client module by the user application, using the context parameters to establish remote connection between the Internet terminal provider module and the Internet terminal client module, detecting the secure element connected to the communication device via the Internet terminal client module, opening a virtual communication channel between the Internet terminal provider module and the secure element over the connection between the Internet terminal client module and the Internet terminal provider module, transmitting secure element commands determined by the service provider to the secure element over the virtual communication channel and performing an operation corresponding to the secure element commands on the secure element. The invention further relates to an Internet terminal comprising an Internet terminal provider module for remotely performing operations determined by a service provider on a secure element connected to a communication device having a user application capable of IP based communication, characterized by comprising a non service provider specific Internet terminal client module that can be launched by the user application which Internet terminal client module is configured to establish connection with the secure element, and to connect to the Internet terminal provider module and to open a virtual communication channel between the Internet terminal provider module and the secure element, which virtual communication channel is adapted to transmit secure element commands to the secure element for performing operations determined by the service provider. |
| US09578049B2 |
Methods and systems for using causal analysis for boosted decision stumps to identify and respond to non-benign behaviors
A computing device processor may be configured with processor-executable instructions to implement methods of detecting and responding non-benign behaviors of the computing device. The processor may be configured to monitor device behaviors to collect behavior information, generate a behavior vector information structure based on the collected behavior information, apply the behavior vector information structure to a classifier model to generate analysis results, use the analysis results to classify a behavior of the device, use the analysis results to determine the features evaluated by the classifier model that contributed most to the classification of the behavior, and select the top “n” (e.g., 3) features that contributed most to the classification of the behavior. The computing device may display the selected features on an electronic display of the computing device. |
| US09578048B1 |
Identifying phishing websites using DOM characteristics
Embodiments of the present invention are directed to identifying phishing websites by rendering and analyzing document object model (DOM) objects associated with a website for features that indicate phishing behavior. Embodiments analyze the full scope and functionality associated with a website by executing functions embedded in a DOM object before analyzing the website for phishing activity. Accordingly, embodiments render and analyze a fully executed DOM object for phishing behavior. Embodiments may then perform steps to mediate a website that is classified as performing phishing. Thus, embodiments are configured to (1) collect website information from a variety of websites and web servers connected to the internet, (2) analyze the collected data to determine whether the website information is performing phishing, and (3) mediate websites and other actors that are determined to be performing phishing based on the results of the phishing analysis. |
| US09578045B2 |
Method and apparatus for providing forensic visibility into systems and networks
Methods and systems for providing forensic visibility into systems and networks are provided. More particularly, a sensor agent may receive events defining an action of a first object acting on a target. The object, the event, and the target are then correlated to at least one originating object such that an audit trail for each individual event is created. A global perspective indicating an age, popularity, a determination as to whether the object may be malware, and IP/URL information associated with the event may then be applied to at least one of the object, the event, the target, and the originating object. A priority may then be determined and assigned to the event based on at least the global perspective. An event line containing event information is then transmitted to an end recipient where the information may be heuristically displayed. |
| US09578043B2 |
Calculating a trust score
Systems, devices, and methods are described herein for calculating a trust score. The trust score may be calculated between entities including, but not limited to, human users, groups of users, organizations, businesses/corporations, and locations. A system trust score may be calculated for an entity by combining a variety of factors, including verification data, a network connectivity score, publicly available information, and/or ratings data. A peer trust score targeted from a first entity to a second entity may also be calculated based on the above factors. In some embodiments, the peer trust score may be derived from the system trust score for the target entity and may take into account additional factors, including social network connections, group/demographic info, and location data. Finally, a contextual trust score may be calculated between the first and second entities based on a type of transaction or activity to be performed between the two entities. |
| US09578042B2 |
Identifying malicious web infrastructures
Identifying malicious servers is provided. Malicious edges between server vertices corresponding to visible servers and invisible servers involved in network traffic redirection chains are determined based on determined graph-based features within a bipartite graph corresponding to invisible server vertices involved in the network traffic redirection chains and determined distance-based features corresponding to the invisible server vertices involved in the network traffic redirection chains. Malicious server vertices are identified in the bipartite graph based on the determined malicious edges between the server vertices corresponding to the visible servers and invisible servers involved in the network traffic redirection chains. Access by client devices is blocked to malicious servers corresponding to the identified malicious server vertices in the bipartite graph. |
| US09578040B2 |
Packet receiving method, deep packet inspection device and system
Embodiments of the present invention provide a packet receiving method, a deep packet inspection device and system, which relates to the field of communications. The packet receiving method includes: receiving a service request packet sent by a terminal device, where the packet carries a terminal domain name indicating the terminal device and a server domain name indicating a service server required by the service request; resolving the received server domain name to obtain a service server Internet protocol (IP) address; and discarding the packet if the resolved service server IP address does not belong to the preset service server IP address corresponding to the received terminal domain name in a preset list. Embodiments of the present invention are applied to the processing of the packet. |
| US09578036B2 |
Access revocation
Systems and apparatuses for revoking access to one or more applications for one or more individuals or users are provided. In some examples, revocation settings may be received from different business divisions or enterprises or business groups within an entity and may be compiled to form a standardized set of revocation settings that may be applied across the entity. Accordingly, upon receiving an item that may be associated with access and may include one or more applications to which access may be revoked and/or one or more users from which access may be revoked, the system may apply the standardized revocation settings to determine whether access should be revoked. If it is determined that access should be revoked, the system may revoke access to the one or more applications for the one or more users. |
| US09578035B2 |
System and method to use a cloud-based platform supported by an API to authenticate remote users and to provide PKI- and PMI-based distributed locking of content and distributed unlocking of protected content
A security system for authenticating users and protecting content that provides an application program interface (API) with a Cloud Platform integration (Platform) to extend the security capabilities of Public Key Infrastructure and Privilege Management Infrastructure systems to authenticated external users and protected content. |
| US09578034B2 |
Trusted peripheral device for a host in a shared electronic environment
A trusted peripheral device can be utilized with an electronic resource, such as a host machine, in order to enable the secured performance of security and remote management in the electronic environment, where various users might be provisioned on, or otherwise have access to, the electronic resource. The peripheral can have a secure channel for communicating with a centralized management system or service, whereby the management service can remotely connect to this trusted peripheral, using a secure and authenticated network connection, in order to run the above-described functionality on the host to which the peripheral is attached. |
| US09578026B1 |
Method and system for device dependent encryption and/or decryption of music content
A method and system is disclosed that provides at least one server device; and at least one remote audio playback device, the remote audio playback device including a unique identifier stored thereon. An encryption key is created by the at least one server device. The at least one server device transmits, over a long range communication network, to the remote audio playback device, music content encrypted using the encryption key and the remote audio playback device's unique identifier. |
| US09578025B2 |
Mobile network-based multi-factor authentication
Verification of a user login to a secure account from a mobile device occurs when the user provides login credentials and a hardware identifier (ID) corresponding to the mobile device. The provided login credentials and hardware ID are then verified against a registry. Further, the mobile device determines and provides a geographic location of the mobile device using a global positioning system (GPS) component installed therein. The location provided by the mobile devices is then matched with a location of a network element with which the mobile device is currently communicating. |
| US09578024B2 |
Continuous authentic of mobile device users
Technology for performing continuous authentication of a mobile device utilizes user activity context data and biometric signature data related to the user. A biometric signature can be selected based on the activity context, and the selected biometric signature can be used to verify the identity of the user. |
| US09578021B2 |
Methods and systems for distributing cryptographic data to authenticated recipients
A method includes receiving, by an access control management system, from a first client device, information associated with an encrypted data object. The access control management system receives, from a second client device, a request for the information. The access control management system verifies that a user of the second client device is identified in the received information. The access control management system selects an identity provider, based on a user identifier included in the received information, the user identifier associated with the user of the second client device. The access control management system requests from the selected identity provider, authentication of the user of the second client device. The access control management system sends, to the second client device, the received information. The access control management system stores an identification of at least one of the second client device and the received request for the information. |
| US09578020B2 |
Module for controlling usability of a device
Module (10) for controlling usability of a processing unit (2) of a device (1), the module comprising a modem (11) for communicating with a cellular network, and an access circuit (12) connected to the modem for cellular network authentication and access, which access circuit comprises or is connected to a secure element (12), characterized by a state machine configured to control the device in accordance with one of a plurality of usability states, including at least a normal state and an alert state, wherein operation of the processing unit is inhibited in said alert state. |
| US09578019B2 |
Method and system for managing an embedded secure element eSE
A method and system for managing an embedded secure element (50) accessible as a slave of the resident applications (App1-3) of a host device of the eSE. The eSE includes an issuer security domain (51), ISD, with which cryptographic keys are associated. The method includes, in an application agent embedded in an OS of the host device: sending (420) the ISD a random value; receiving (435) a cryptogram corresponding to the random value encrypted using a key associated with the ISD; sending (440, 450) the random value and the cryptogram to a first extern entity entered in the application agent. The method includes: sending (455, 4555) the random value and the cryptogram from the first entity to a second external entity; verifying (4556) that the second entity possesses keys associated with the ISD from the cryptogram and the random value. |
| US09578018B2 |
Remote sign-out of web based service sessions
Remote sign-out of web based service sessions. As a part of remote sign-out of web based service sessions, a user authentication token is accessed that is used to establish a web based service session and this user authentication token is stored in memory of an authentication server and returned in a cookie to the device. User access and deletion of the user authentication token from memory is accommodated using a device different from that which initially established the web based service session. Upon receipt of a browser request involving the user authentication token, it is determined whether the user authentication token is stored in memory. An access denial indication is provided to a web based service that indicates that the user authentication token is not stored in memory. |
| US09578017B2 |
Secure management of operations on protected virtual machines
Deploying an encrypted entity on a trusted entity is illustrated herein. A method includes, at a trusted entity, wherein the trusted entity is trusted by an authority as a result of providing a verifiable indication of certain characteristics of the trusted entity meeting certain requirements, receiving an encrypted entity from an untrusted entity. The untrusted entity is not trusted by the authority. At the trusted entity, a trust credential from the authority is used to obtain a key from a key distribution service. The key distribution service is trusted by the authority. The key is used to decrypt the encrypted entity to allow the encrypted entity to be deployed at the trusted entity. |
| US09578014B2 |
Service profile-specific token attributes and resource server token attribute overriding
A framework, which conforms to the OAuth standard, involves a generic OAuth authorization server that can be used by multiple resource servers in order to ensure that access to resources stored on those resource servers is limited to access to which the resource owner consents. Each resource server registers, with the OAuth authorization server, metadata for that resource server, indicating scopes that are recognized by the resource server. The OAuth authorization server refers to this metadata when requesting consent from a resource owner on behalf of a client application, so that the consent will be of an appropriate scope. The OAuth authorization server refers to this metadata when constructing an access token to provide to the client application for use in accessing the resources on the resource server. The OAuth authorization server uses this metadata to map issued access tokens to the scopes to which those access tokens grant access. |
| US09578012B2 |
Restricted content publishing with search engine registry
A processor-implemented method is provided. The method may include providing a content registry with at least one application program interface (API) to manage a plurality of entries stored in the content registry. The method may also include providing access to the plurality of entries by a pre-authorized search engine to the content registry in response to a search requested by an authorized requester. |
| US09578006B2 |
Restricted content publishing with search engine registry
A processor-implemented method is provided. The method may include providing a content registry with at least one application program interface (API) to manage a plurality of entries stored in the content registry. The method may also include providing access to the plurality of entries by a pre-authorized search engine to the content registry in response to a search requested by an authorized requester. |
| US09578004B2 |
Authentication of API-based endpoints
A method includes detecting an incoming request from a first application to a second application. The method further includes performing an authentication that involves sending a challenge message to a first application. The challenge message may request an account of information associated with processed transactions between the first application and the second application during a particular period preceding the incoming request, a solution to a high-cost calculation associated with a high level of resource use, or a concatenated sequence of characters located at specific positions of a shared value. The authentication further involves receiving a challenge response to the challenge message from the first application, determining a verified response based on the challenge message, and determining whether the challenge response matches the verified response. The method includes authorizing the second application to process the incoming request in response to determining that the challenge response matches the verified response. |
| US09578003B2 |
Determining whether to use a local authentication server
The present disclosure discloses a method and a system for determining whether to use a local authentication server. Specifically, a first network device executing a first authentication server receives a request for authentication from a client device. The first network device determines whether the client device was previously successfully authenticated by a second authentication server executing on a second network device within a particular period of time. If so, the first network device attempts to authenticate the client device using the first authentication server. Otherwise, the first network device declines the request for authentication from the client device. |
| US09577999B1 |
Enhanced security for registration of authentication devices
A system, apparatus, method, and machine readable medium are described for enhanced security during registration. For example, one embodiment of a method comprises: receiving a request at a relying party to register an authenticator; sending a code from the user to the relying party through an authenticated out-of-band communication channel; and verifying the identity of the user using the code and responsively registering the authenticator in response to a positive verification. |
| US09577995B1 |
Systems and methods for enabling secure communication between endpoints in a distributed computerized infrastructure for establishing a social network
A computer-implemented method performed in a system comprising a first endpoint, the first endpoint comprising at least one central processing unit, a memory, a storage system and a network interface unit, the system being accessible by a user, the method involving: generating a message at the first endpoint for sending to a second endpoint, the message incorporating a message body and a message metadata, the message metadata comprising a secure channel invitation for the second endpoint to securely communicate with the first endpoint, the secure channel invitation being hidden within the message metadata; communicating the message from the first endpoint to the second endpoint; receiving a response message, at a first endpoint, from the second endpoint; and establishing the secure communication channel between the first endpoint and the second endpoint based on the received response message. |
| US09577992B2 |
Data encryption/decryption using neuro and neuro-mechanical fingerprints
In accordance with one embodiment, a method for securing data is disclosed. The method includes sensing multi-dimensional motion of a body part of a user to generate a multi-dimensional signal; in response to the multi-dimensional signal and user calibration parameters, generating a neuro-mechanical fingerprint; and encrypting data with an encryption algorithm using the neuro-mechanical fingerprint as a key. |
| US09577990B2 |
Control of access to a secondary system
A method for controlling access of a user to a secondary system. A primary system receives, from a user system connected to the secondary system, first authentication information comprising an encryption of a random string. The encryption of the random string is a user-specific key. Second authentication information is generated from protected secondary authentication data stored in the primary system. Generation of the second authentication information includes applying the user-specific key to the protected secondary authentication data to generate the second authentication information. The second authentication information is provided to the secondary system to enable access of the user to the secondary system. |
| US09577988B2 |
Data encryption, transport, and storage service for carrier-grade networks
A method, a system, and a non-transitory storage medium for storing user preferences pertaining to a data encryption service that provides on-demand encryption for data in-flight and at rest; receiving data from a user device; determining whether to invoke the data encryption service based on the data and the user preferences; generating a key to encrypt the data based on determining that the data encryption service is to be invoked; generating a first message that includes the data, the key, and data indicating where encrypted data is to be stored; establishing a secure connection with a device; and transmitting the first message to the device via the secure connection. |
| US09577985B2 |
Provisioning work environments on personal mobile devices
A virtual business mobile device can be provisioned on a personal mobile device, by binding a mobile application for provisioning the business mobile device to a privileged component of a host operating system of the personal mobile device, wherein the binding enables a software virtualization layer and a management service component of the mobile application to execute in a privileged mode. The mobile application is then able to download a virtual phone image for the business mobile device and security-related policy settings relating to use of the business mobile device from a mobile management server, wherein the software virtualization layer is able to launch a virtual machine for the business mobile device based on the virtual phone image. Once the virtual phone image has been downloaded, the management service component initiates a periodic attempt to establish a connection with the mobile management server to comply with the downloaded security-related policy settings. |
| US09577982B2 |
Method and apparatus for extending remote network visibility of the push functionality
An approach is provided for extending remote network visibility for push functionality. An application is transmitted, via a push agent, from a first network to a device of a second network, wherein the device is configured to execute the application. The device is remotely controlled using the application. |
| US09577979B1 |
Local name resolution
Embodiments described herein relate to systems and methods for local name resolution in network communications. Particular embodiments may enable a device resolution request to include a name that identifies the user device issuing the resolution request. A proxy server may accept the resolution request, and respond with a service internet protocol address that is customized to that user device, such that compatible user devices on the same local area network will each receive a different service IP address. When the proxy server receives traffic on a particular service IP address from a local area network, the proxy server may identify the compatible device even if a network address translation device has adjusted the requesting IP address for the device. Particular implementations may enable acceleration of HTTPS communications by the proxy server, or other such benefits. |
| US09577977B2 |
Messaging system and method
A method of cross-platform messaging including receiving, by a messaging system, at least one initial message having a message format, an initial message layout and data indicative of at least one user associated with the at least one initial message, and before delivery to a destination communication device associated with the at least one user, converting, by the messaging system, an initial message into an adapted message, and facilitating, by the messaging system, delivery of the adapted message to the destination communication device. The adapted message is characterized by, at least, an adapted message layout, and the adapted message layout differs from the initial message layout in a characteristic associated with respective message layout such as number of media objects, a graphical image of a media object, a size of a placeholder related to a media object, and a location of a media object within a respective message layout. |
| US09577975B2 |
Linking multiple entities associated with media content
In one embodiment, a method includes determining that media content being viewed by a user comprises a plurality of entities, accessing information indicative of the plurality of entities, and querying a social graph of the social-networking system for social content associated with each of the plurality of entities and one or more other users of the social-networking system. The social graph includes user nodes that are each associated with a particular user of the social-networking system. The method further includes providing at least a portion of the queried social content from the social graph for display along with the information on a display device of the user. |
| US09577971B1 |
Cost optimized email attachment download in a mobile device
A system and method for reducing data usage for wireless subscription plans. An email and an attachment are downloaded to a first device of a first recipient. An attachment is identified on the email by an attachment processing service that ensures that sharing from the first device is based on a credit policy. That there is more than one recipient for the email and attachment is determined. That a second device of a second recipient is in the vicinity of the first device is determined. Verification of the second device is established with an email fingerprint exchange handshake based on a fingerprint of the email for the second recipient that is computed from a hash of content of the email, an identifier of the attachment, and an email id of the second recipient. A second network is utilized to copy the attachment from the first device to the second device. |
| US09577966B1 |
Device independent message distribution platform
An example system for device-independent point to multipoint communication is configured to receive a message addressed to one or more destination users, the message type being, for example, Short Message Service (SMS), Instant Messaging (IM), E-mail, web form input, or Application Program Interface (API) function call. The system also is configured to determine information about the destination users, the information comprising preferred devices and interfaces for receiving messages, the information further including message receiving preferences. The system applies rules to the message based on destination user information to determine the message endpoints, the message endpoints being, for example, Short Message Service (SMS), Instant Messaging (IM), E-mail, web page output, or Application Program Interface (API) function call. The system translates the message based on the destination user information and message endpoints and transmits the message to each endpoint of the message. |
| US09577963B2 |
Application for augmenting a message with emotional content
Implementations of this disclosure may assist users to communicate more effectively in online communications over a network such as emails, instant messaging, text messages, and social networking messages. In some implementations, systems and methods of this disclosure enable a message composer to augment a first message with one or more predefined or custom second messages where the second message is intended to convey an unspoken meaning about the first message. In some implementations, systems and methods of this disclosure enable a recipient of the augmented first message to rate the first message on its genuineness and to provide a predefined or custom explanation of the recipient's rating. In some implementations, systems and methods of this disclosure can change an online users' online picture (e.g., profile picture, avatar, etc.) based on ratings of the user's messages by recipients. |
| US09577961B2 |
Input/output management in a distributed strict queue
Methods and systems for implementing input/output management in a distributed strict queue are disclosed. A plurality of messages are distributed to a plurality of queue servers based on strict order parameters for the messages. Messages that share a value for the strict order parameter are distributed to the same queue server. The messages are enqueued at the queue servers. Messages that share a value for the strict order parameter are enqueued in a strict order based on the time of receipt at the queue server. One or more queue clients are configured to attempt message processing for the enqueued messages. Network interactions between the queue clients and one or more external components are configured to be routed through a network proxy. |
| US09577957B2 |
Facilitating congestion control in a network switch fabric based on group traffic rates
The disclosed embodiments relate to a system for communicating packets through a network switch fabric. During operation, at an aggregation point in the network switch fabric, the system segregates packet flows from multiple sources into a set of quality-of-service (QoS) buckets. Next, the system monitors traffic rates for each QoS bucket. The system then determines a state for each QoS bucket by comparing a traffic rate for the QoS bucket with one or more state-specific thresholds. When a packet is subsequently received for a given QoS bucket, the system performs an action based on a state of the given QoS bucket. |
| US09577956B2 |
System and method for supporting multi-homed fat-tree routing in a middleware machine environment
A system and method can support multi-homed routing in a network environment, which can be based on InfiniBand architecture using a fat-tree or a similar topology. The system can provide an end node that is associated with a switch port on a leaf switch in a network fabric. Then, the system can perform routing for each of a plurality of ports on the end node, and ensure that the plurality of ports on the end node take mutually independent paths. |
| US09577955B2 |
Indefinitely expandable high-capacity data switch
A data switch for a packet data switch includes switching nodes connected to each other in an interconnecting matrix, providing a multiplicity of data paths between an incoming data or telecom port and an outgoing data or telecom port of the data switch. The interconnecting switching nodes can achieve high capacity data switching by providing a partial switching solution at each node, distributing the switching load. A switching protocol for interconnecting switching nodes allows data packets to be selectively passed from any incoming port on an interconnecting switch node to any interconnecting switching node or outgoing port connected to it. In at least one example, the switching protocol has mechanisms in it to provide for the duplicating of the contents of the data packet and pass them to multiple interconnecting switching nodes or outgoing ports. |
| US09577948B2 |
Method and apparatus for connecting to server using trusted IP address of domain
An apparatus for connecting to an update server includes an update unit configured to connect to the update server over a network using a pre-stored domain name address of the update server and an IP address acquisition unit configured to acquire an IP address of the connected update server. The IP address acquired by the IP address acquisition unit is stored as a trusted IP address in a storage unit. The apparatus further includes a reconnection processing unit configured to fetch the trusted IP address of the update server and try connecting to the update server using the trusted IP address in the case of failure to connect to the update server using the pre-stored domain name address. |
| US09577947B2 |
System and architecture to optimize video traffic over internet protocol networks
Techniques are provided for managing network traffic and alleviating network congestion issues in video conference environments. At a video conference bridge device configured to send and receive communications to an endpoint device in a network, one or more video streams are received from the endpoint participating in a video conference. Each of the video streams is classified as a rate adaptive stream or as a non-rate adaptive stream. For video streams classified as rate adaptive streams, the video streams are assigned to a buffer queue for rate adaptive streams. For video streams classified as non-rate adaptive streams, the video streams are assigned to a buffer queue for non-rate adaptive streams. |
| US09577941B2 |
Controller, method for distributing load, non-transitory computer-readable medium storing program, computer system, and control device
An OpenFlow network includes multiple controllers. Each controller includes a load control table and a load control unit. The load control table controls at least one of the number of messages which each of switches in the OpenFlow network has transmitted to a controller controlling the switch over a predetermined time and the number of packets that the switch has received over a predetermined time. When a predetermined event occurs, the load control unit detects a controller having a processing load higher than or equal to a first threshold on the basis of the load control table and places at least one of the switches controlled by the detected controller under the control of another controller. |
| US09577936B2 |
Packetized radio frequency transport system
Means for transporting multi-band RF spectrum over a digital network including: means for converting radio frequency signal into internet protocol packets; means for time stamping and preserving timing for the converted radio frequency signal; and means for transporting the radio frequency signal using a radio transport standard. |
| US09577934B2 |
Optimizing physiologic monitoring based on available but variable signal quality
When transmitting patient data over a hospital network, data types are prioritized into a data type hierarchy (26) that is employed to rank data types in order of criticality for transmission during periods of diminished signal quality. As signal quality decreases, less critical data types are omitted from transmission and stored to a gap data buffer for later transmission. As signal quality recovers, the less critical data types are restored to current data transmissions. Once all data types are restored during current transmission, previously omitted gap data is transmitted to fill in the gaps in a receiving device such as a network server to ensure that a complete data set is provided to the network and/or other devices coupled thereto. |
| US09577931B2 |
Switching system, switching control system, and storage medium
A switch system realizes extension of the number of entries of an open flow table by using tables in a switch as existing resources. Specifically, the switch configures an open flow table by logically combining a plurality of tables, each of which defines processing to a given packet, based on a condition and a processing content defined in each table. The switch refers to the open flow table to determine the processing content to a reception packet. The switch executes the processing of the reception packet based on the determined processing content. |
| US09577926B2 |
Authorizing communications between computing nodes
Techniques are described for managing communications between multiple computing nodes, such as computing nodes that are separated by one or more physical networks. In some situations, the techniques may be used to provide a virtual network between multiple computing nodes that are separated by one or more intermediate physical networks, such as from the edge of the one or more intermediate physical networks by modifying communications that enter and/or leave the intermediate physical networks. In some situations, the computing nodes may include virtual machine nodes hosted on one or more physical computing machines or systems, such as by or on behalf of one or more users (e.g., users of a program execution service). The managing of the communications may include determining whether communications sent to managed computing nodes are authorized, and providing the communications to the computing nodes only if they are determined to be authorized. |
| US09577920B2 |
Communication system, control device, node, processing rule setting method and program
A communication system includes a plurality of nodes each including a packet processor that processes a packet in accordance with a packet handling operation(s) when the packet is received, the packet handling operation(s) correlating a processing to be applied to the packet with a matching rule that identifies the packet to which the processing is to be applied, and a control device that calculates a packet forwarding path in response to a request to set the packet handling operation from any one of the nodes; the control device setting a plurality of the packet handling operations that implement the packet forwarding path for the node(s) on the packet forwarding path and recording the packet handling operations in correlation with one another, the control device inquiring at the node(s) on the packet forwarding path about a setting state(s) of the packet handling operation(s). |
| US09577918B2 |
Increasingly minimal bias routing
A system and algorithm configured to generate diversity at the traffic source so that packets are uniformly distributed over all of the available paths, but to increase the likelihood of taking a minimal path with each hop the packet takes. This is achieved by configuring routing biases so as to prefer non-minimal paths at the injection point, but increasingly prefer minimal paths as the packet proceeds, referred to herein as Increasing Minimal Bias (IMB). |
| US09577907B2 |
In-vehicle services through attendant devices, user-provided devices, and/or an in-vehicle computer system
An approach to facilitating in-vehicle services through attendant devices, user-provided devices, and/or an in-vehicle computer system is provided. In one implementation, one or more communication sessions with the in-vehicle computer system may be facilitated by an attendant device. Passenger information relating to one or more passengers of a vehicle and service information relating to one or more services to be provided to the one or more passengers may be obtained by the attendant device from the in-vehicle computer system via the one or more communication sessions. The passenger information and the service information may be provided by the attendant device. An indication that at least one service is in progress or is complete is received by the attendant device. |
| US09577881B2 |
Method and system for managing quality of service via a broadband gateway
Aspects of a method and system for managing quality of service via a broadband gateway are provided. In this regard, a broadband gateway that supports one or more first QoS protocols may determine, based on communications with a plurality of communication devices, whether each of the plurality of communication devices supports the one or more first QoS protocols. The gateway may communicate a result of the determination to a content provider and/or service provider. In this manner, the content provider and/or service provider may determine whether to utilize one or more second QoS protocols to deliver content to a particular one of said plurality of communication devices based on whether said particular of communication devices based on whether said particular one of said plurality of communication devices supports the one or more first QoS protocols. The gateway may be operable to map between QoS protocols. |
| US09577878B2 |
Geographic awareness in a distributed strict queue
Methods and systems for implementing geographic awareness in a distributed strict queue are disclosed. A plurality of queue servers are selected to receive a plurality of messages from a plurality of queue producers. The queue servers are selected from a pool of available queue servers to optimize the performance of a distributed strict queue system. The plurality of messages are distributed to the queue servers based on strict order parameters for the messages. Messages that share a value for the strict order parameter are distributed to the same queue server. The messages are enqueued at the queue servers. Messages that share a value for the strict order parameter are enqueued in a strict order based on the time of receipt at the queue server. |
| US09577877B2 |
Method for managing device configurations using configuration templates
Aspects of the subject disclosure may include, for example, identifying a configuration of a second end user device that includes device data and applications, generating a configuration template associated with the second end user device, providing a first end user device with access to the configuration template for enabling the first end user device to be configured, detecting an adjustment to the configuration of the second end user device, and transmitting a notification of a configuration change at the second end user device responsive to the detecting of the adjustment to enable the first end user device to be reconfigured according to the adjustment to the configuration of the second end user device. Other embodiments are disclosed. |
| US09577875B2 |
Performing value and context aware communications networking
An aspect of this invention is a computer-executable method for distributing one or more features associated with information to be transported by a communications network that includes a plurality of end nodes interconnected via a plurality of network nodes. The method includes receiving one or more features associated with information to be transported by the communications network, wherein the one or more features are specified at an end node of the plurality of end nodes for receipt by a network node of the plurality of network nodes; responsive to the one or more received features, configuring at least a portion of the communications network to perform actions on information based upon the features; receiving the information using the plurality of network nodes; and based at least on the received features and the configuring, performing one or more actions with the information. Illustratively, the one or more actions comprise sending the information to one or more edge entity nodes in accordance with the configuring and the received features. |
| US09577872B2 |
Fiber channel 1:N redundancy
Network devices, systems, and methods, including executable instructions and/or logic thereon to achieve fiber channel one for N (1:N) redundancy. A network device includes a processing resource coupled to a memory. The memory includes program instructions executed by the processing resource to group a number of switches in a 1:N cluster and provide each switch with a (virtual) A_Port link to all members of the 1:N cluster. If a failure of a fiber channel over ethernet forwarder (FCF) occurs, the program instructions execute to re-establish or redirect a connection over an alternate path through a redundant FCF without having to synchronize a connection state across all switches in the cluster. |
| US09577867B2 |
Determining a time before a post is viewed by a recipient
In an approach to determining a time before a recipient views a communication, a computer receives a communication from a sender in a collaboration application. The computer determines one or more attributes of the communication, the attributes including at least a recipient of the communication, and a plurality of viewing data for the recipient of the communication. The computer determines, based, at least in part, on the one or more attributes of the communication and the plurality of viewing data for the recipient, a time before the recipient views the communication in the collaboration application. |
| US09577865B2 |
Carrier recovery aided by pilot symbols carrying information
A receiver may comprise: a symbol receiver configured to receive a first modulated symbol at a first resolution and thereafter a second modulated symbol at a second resolution greater than the first resolution; an output path coupled to the symbol receiver and configured to forward the first modulated symbol; a decision device coupled to the symbol receiver and configured to determine a most probable symbol represented by the first modulated symbol; a phase detector coupled to the decision device and configured to compare the first modulated symbol and the most probable symbol to generate a phase error value; and a phase modifier coupled to the decision device and configured to determine a phase correction value based on the phase error value and to adjust the phase of the second modulated symbol based on the phase correction value. |
| US09577861B2 |
Broadcast signal transmission apparatus, broadcast signal reception apparatus, broadcast signal transmission method, and broadcast signal reception method
The present invention provides a method for transmitting a broadcast signal. The method for transmitting the broadcast signal according to the present invention may comprise the steps of: formatting input streams into multiple data pipes (DPs); encoding data of the multiple DPs according to a code rate for each DP; generating at least one signal frame by mapping the encoded data of the multiple DPs; and modulating data of the generated signal frame in an orthogonal frequency division multiplexing (OFDM) scheme, and transmitting the broadcast signal including data of the modulated signal frame. |
| US09577860B2 |
Method and apparatus for reducing peak-to-average power ratio in single carrier-frequency division multiple access based radio communication system
A method for reducing Peak-to-Average Power Ratio (PAPR) in a Single Carrier Frequency Division Multiple Access (SC-FDMA) based radio communication system is provided. The method includes arranging symbols mapped to predetermined sub-carrier allocation types such that phases of the symbols do not overlap, and transmitting the arranged symbols. |
| US09577858B2 |
RF chirp receiver synchronization
A radio frequency communication system includes a radio frequency transmitter having a chirp generator operable to transmit a first chirp signal, and transmit a second chirp signal that is circular shifted relative to the first chirp signal. A receiver receives the first chirp signal and the second chirp signal, such that the proportion of phase offset between the first and second chirp signals is proportional to the frequency offset of the received signals. The first and second chirp signals are despread, and the phase difference between the first and second chirp signals is used to determine a frequency offset of the received first and second chirp signals that is proportional to the phase difference between the first and second chirp signals. |
| US09577856B1 |
Frequency compensation techniques and systems
Techniques for compensating for frequency offset of a frequency used in a translation of a signal from a first band to a second band may include using a frequency reference signal located in a different band from an information-bearing signal, where the different band may be a guard band. The frequency reference signal may be offset from a particular frequency, which may be a center frequency, of the information-bearing signal by a known amount. The frequency reference signal may be received by the transmitting station, a frequency offset may be derived, and the frequency offset may be used to pre-compensate further transmitted signals. At another station, the received frequency reference signal may be used to lock a local oscillator for demodulation and/or transmission of the information-bearing signal based on the known offset of the frequency reference signal from the frequency of the information-bearing signal. |
| US09577855B1 |
Channelized multicarrier digitizer
A method is provided for individually processing multiple frequency bands in a composite RF signal is disclosed. The composite RF signal is separated into a plurality of gain controlled and bandlimited frequency bands. The gain controlled and bandlimited frequency bands are then recombined to produce a controlled composite RF signal, which is then digitized by undersampling with an ADC to produce a plurality of unambiguous frequency bands convolved around baseband. The sample frequency can be substantially less than the Nyquist Limit of twice the highest frequency present for digitization. Each baseband signal is monitored for amplitude spikes therein. In response to an amplitude spike, the appropriate frequency band is modified by a control signal to hold the ADC to within its dynamic range. |
| US09577854B1 |
Apparatuses and methods for asymmetric bi-directional signaling incorporating multi-level encoding
Apparatuses and methods for asymmetric bi-directional signaling incorporating multi-level encoding are disclosed. An example apparatus may include first and second channels, a receiver coupled to the first and second channels, and first and second transmitters coupled to the first and second channels, respectively. The receiver may be configured to receive differential data signals to receive write data at a rate, and each of the first and second transmitters may be configured to encode a plurality of bits into a respective data signal and provide the respective data signals at the data rate. |
| US09577852B2 |
Common-mode suppressor based on differential transmission line
A common-mode suppressor for eliminating common-mode noise in high frequency differential data transmission systems and an associated method includes a long coiled differential transmission line configured to transfer data between a source and a load. The differential transmission line comprises a first conductive wire and a second conductive wire which are inductively and capacitively coupled and are laterally aligned or vertically aligned with each other. Further, the differential transmission line is matched for differential signals and un-matched for common-mode noise. |
| US09577848B1 |
Decision feedback equalizer
A decision feedback equalizer (DFE) includes first through sixth flip-flops, and first and second summer circuits. The first through fourth flip-flops sample an analog input signal received at the first and second summer circuits, detect the logic level of a data bit in the analog input signal and generate the first through fourth compensated signals. The first multiplexer outputs at least one of the first and second compensated signals as a first feedback signal, based on a fourth feedback signal generated by the sixth flip-flop. The second multiplexer outputs at least one of the third and fourth compensated signals as a second feedback signal, based on a third feedback signal generated by the fifth flip-flop. The first and second feedback signals are multiplied by a weight coefficient and fed back to the first and second summer circuit, respectively, to compensate an error in the analog input signal. |
| US09577847B2 |
Non-reciprocal components with balanced distributedly modulated capacitors (DMC)
A non-reciprocal radio frequency transceiver front end utilizing multiple time-varying transmission lines (TVTLs) implemented using distributed modulated capacitors (DMC) to exploit time-varying properties of transmission line structures to isolate the transmit and receive signals. The TVTLs are coupled at an input side to an antenna and ground through a first 90 degree coupler, and the outputs of the TVTLs are coupled through a second 90 degree coupler for connection to a receiver and transmit circuit, respectively. The apparatus allows simultaneously operating a transmitter and receiver sharing a single antenna (or single antenna array). |
| US09577843B2 |
Method and system to route a VoIP call to a representative at a provider's site
A method and system to contact a provider are described. The system may include a communication module to detect a voice over Internet protocol (VoIP) call to a seller; a suitable representative associated with the seller; a decision module to determine, utilizing the detected VoIP call to the seller; and a call routing module to route the VoIP call to the suitable representative. |
| US09577838B2 |
Device and method for multicast in wireless local access network
A device and method for multicasting data in a wireless network. The method includes receiving multicast data at a specific node of the wireless network, the multicast data including a multicast acknowledgement request; and determining by the specific node whether or not the specific node is requested to send an acknowledgement to the multicast acknowledgement request. Also, a device and method for multicasting data in a wireless network. The method includes transmitting multicast data, the multicast data including a multicast acknowledgement request, the multicast acknowledgement request including information configured to enable a specific node of the wireless network to determine whether or not the specific node is requested to send an acknowledgement to the multicast acknowledgement request. |
| US09577830B2 |
Multi-tenant discovery and claiming of distributed storage nodes over an insecure network
A technique is introduced that enables a server to establish trust of and a secure channel of communication with an unverified client computer, which can be on a different insecure network. To establish trust, the server needs to ensure that the client computer is legitimate, and the client computer similarly needs to ensure that the server is legitimate. With mutual trust established, a secure channel of communication is established between the server and the client computer. With mutual trust and a secure channel of communication established, the client computer can safely communicate with the server, for example, to download software that enables the client computer to join a central management system at the server. |
| US09577821B2 |
Function masking apparatus in symmetric cryptographic algorithm for preventing side channel attacks and method thereof
Disclosed is a function masking apparatus in a symmetric cryptographic algorithm for preventing side channel attacks, including: a controller creating lookup tables for one or more internal functions included in a high security and light weight (HIGHT) algorithm, respectively based on a plurality of non-linear functions, a plurality of linear functions, and a plurality of constants which are randomly generated; and a storage unit storing the lookup tables for one or more internal functions included in the generated HIGHT algorithm. |
| US09577820B2 |
Elastic gear first-in-first-out buffer with frequency monitor
An elastic gear First-In-First-Out (FIFO) buffer architecture is disclosed. The proposed elastic gear FIFO buffer uses a frequency monitor unit to control clock frequency compensation. By using an independent frequency monitor unit, the data latency and FIFO buffer size are best optimized. An elastic gear FIFO could be utilized in applications where clock compensation and asynchronous data width conversion are desired or required. |
| US09577819B2 |
Communication device, pulse signal delay adjustment method and communication system
A communication device includes a reception buffer configured to receive a pulse signal cyclically transmitted from a transmission source device via a transmission line; a branch circuit configured to generate a branch pulse signal by branching the pulse signal; a delay circuit configured to add a predetermined delay time to the generated branch pulse signal; and a transmission buffer configured to transmit the branch pulse signal to which the predetermined delay time was added to the transmission source device via the transmission line. |
| US09577815B1 |
Clock data alignment system for vector signaling code communications link
A communications system receiver is described providing automatic timing adjustment of receive data sampling. A concurrently received clock signal is used as both a reference for generation of internal receiver timing signals, and as an exemplar for adjustment of those timing signals to optimize received data sample timing. |
| US09577801B2 |
Uplink transmission method and apparatus in inter-eNB inter-duplex carrier aggregation system
A method and apparatus are provided for transmitting uplink signals including feedback for use in scheduling at different evolved Node Bs (eNBs) without intermodulation interference, especially in cases where the User Equipment (UE) is connected to an inter-duplex inter-eNB system in which the cooperation between eNBs is very slow or non-existent. |
| US09577799B2 |
Wireless device, method, and computer readable media for signaling a resource allocation in a high-efficiency signal field
Wireless device, computer readable medium, and methods for signaling a resource allocation in a high-efficiency (HE) signal field are disclosed. A HE wireless local area network (HEW) device may include circuitry configured to: generate a HE signal (HE-SIG) field comprising one or more resource allocations each comprising an identical allocation subfield, an allocation or no allocation subfield, if the identical allocation subfield indicates the resource allocation is not identical, an allocation size if the identical allocation subfield indicates the resource allocation is not identical, and a station identification (ID), if the allocation or no allocation subfield indicates there is an allocation. The circuitry is further configured to transmit the HE-SIG field to one or more HEW stations. The allocation size may be based on a number of basic allocation units. The resource allocations may be allocated from a left side of a bandwidth to a right side of a bandwidth. |
| US09577796B2 |
Mitigating interference in wireless systems
According to one embodiment of the invention, a non-transitory computer readable medium for configuring a noise floor of a network device based on the detection of a non-Wi-Fi signal is described. One embodiment of the non-transitory computer readable medium comprises instructions that detect a non-Wi-Fi signal, determine a noise floor based on at least one attribute of the non-Wi-Fi signal and configure the noise floor of the network device such that the network device receives signals with a signal strength above the noise floor value. |
| US09577795B2 |
Impulse noise diagnosis during retransmission
Disclosed and recited herein are devices, systems, methods, and programs by which data is transmitted and, when receipt of the transmitted data has not been acknowledged, an impulse noise occurrence may be diagnosed at the transmitter based on flag streams associated with data transfer units corresponding to the transmitted data. Characteristics of the impulse noise occurrence may be diagnosed based on, at least, a number of consecutive error bits in at least one of the flag streams associated with the data transfer units corresponding to the transmitted data. |
| US09577784B2 |
System, device, and method for securing voice authentication and end-to-end speech interaction
A method, device, and system for secure end-to-end audio recognition is disclosed. A client device launches an application that connects with a server. The client device and server exchange cryptographic keys and establish a secure connection and a shared cryptographic key. The server transmits an encrypted audio prompt to the client device. The client device decrypts the encrypted audio prompt and stores the decrypted audio prompt in secure memory inaccessible to the operating system using an audio engine of the client device. The audio engine then retrieves the audio and renders it for the user through the speakers of the client device. The client device captures the user's audio response with a microphone and stores the audio response in the secure memory. The stored audio response is encrypted and transmitted to the server. |
| US09577780B2 |
Method and system for a polarization immune wavelength division multiplexing demultiplexer
Methods and systems for a polarization immune wavelength division multiplexing demultiplexer are disclosed and may include, in an optoelectronic transceiver having an input coupler, a demultiplexer, and an amplitude scrambler: receiving input optical signals of different polarization via the input coupler, communicating the input optical signals to the amplitude scrambler via waveguides, configuring the average optical power in each of the waveguides utilizing the amplitude scrambler, and demultiplexing the optical signals utilizing the demultiplexer. The amplitude scrambler may include phase modulators and a coupling section. The phase modulators may include sections of P-N junctions in the two waveguides. The demultiplexer may include a Mach-Zehnder Interferometer. The demultiplexed signals may be received utilizing photodetectors. The input coupler may include a polarization splitting grating coupler. The average optical power may be configured above which demultiplexer control circuitry is able to control the demultiplexer to process incoming optical signals. |
| US09577776B2 |
Communication system, local area base station apparatus, mobile terminal apparatus and communication method
The present invention is designed to provide a communication system, a local area base station apparatus, a mobile terminal apparatus and a communication method that can provide highly efficient local area radio access. In a communication system in which a mobile terminal apparatus performs radio communication with a wide area base station apparatus that covers a wide area, using a first carrier frequency, and performs radio communication with a local area base station apparatus that covers a local area, using a second carrier frequency, the wide area base station apparatus allocates different frequencies between the uplink and the downlink in the first carrier frequency and communicates with the mobile terminal apparatus, and the local area base station apparatus dynamically switches between the uplink and the downlink in the second carrier frequency on a per time basis based on the communication environment, and communicates with the mobile terminal apparatus. |
| US09577774B2 |
Time synchronization method and system
Disclosed are a time synchronization method and system. The method comprises: an NE1 and the upstream nodes of the NE1 are classified into the first level, and the downstream nodes of the NE1 are classified into the second level, where the first level priority of the first level is higher than the second level priority of the second level; an NE3 connected to the NE1 through a PTP synchronization link in the downstream node receives a first device priority of the NE1 and the first level priority from the NE1; and after the NE3 receives the second device priority of an NE2 and the second level priority sent by the NE2 in the downstream nodes which is connected to the NE1 through the 1PPS+TOD synchronization link, determines that a clock parameter of the NE1 is optimal, and synchronizes the local clock to the NE1. |
| US09577773B2 |
Station assisted interference measurement
A station assisted interference measurement scheme is described containing a system and devices that facilitate the measurement of interference levels or path loss values between nearby potentially interfering transmitting transceivers and candidate victim receivers. Such interference levels or path loss values are used to assist intelligent assignment of communication channels in an authorized shared access system (ASAS). Using control signals from a controller of the ASAS, suspected interfering devices transmit specialized signals on specific channels at specific times that may have a waveform and/or bit format different from typically used data communication signals. A candidate victim receiver may receive one or more of the specialized signals and measure a signal parameter of the received specialized signal. The controller of the authorized shared access system uses the measured signal parameters to determine interference between devices and improve the assignment of communication channels to mitigate interference. |
| US09577771B1 |
Radio frequency time skew calibration systems and methods
Systems and method for improving operation of a radio frequency system are provided. One embodiment provides a radio frequency system that includes an amplifier device with a first data path and a second data path. Additionally, the radio frequency system includes a controller that instructs the radio frequency system to transmit a calibration signal, which includes a first portion that excites the first data path and a second portion that excites the second data path; determines time skew between the first and second data paths based at least in part on phase shift between a first sample of a feedback signal and the first portion, phase shift between a second sample of the feedback signal and the second portion, or both; and instructs the radio frequency system to adjust delay applied on the first data path, the second data path, or both based at least on the time skew. |
| US09577770B2 |
Method for analyzing the RF performance of a probe card, detector assembly and system for analyzing the RF performance of a probe card
A system for analyzing a probe card comprises a signal generator adapted to generate a radio frequency test signal. a connector for inputting into the probe card the radio frequency test signal, and a detector assembly. The detector assembly comprises an RF chuck for receiving a radio frequency signal from the probe card, and a sensor configured to receive the radio frequency signal from the RF chuck. The sensor is configured to measure a magnitude of the radio frequency signal and to output a measurement signal that represents only the magnitude of the radio frequency signal. The RF chuck and the sensor are mechanically coupled. |
| US09577768B2 |
Method for determining a performance of a MIMO communication and communication device
A method for determining a performance of a MIMO communication is described comprising determining an estimate for the performance of the communication when using a first detection method, determining a measure of the orthogonality of a communication channel used in the communication and weighting the estimate for the performance of the communication when using the first detection method based on the orthogonality of the communication channel to generate an estimate for the performance of the communication when using a second detection method. |
| US09577767B2 |
Dynamic wavelength management using bi-directional communication for the prevention of optical beat interference
Preventing optical beat interference includes dynamically managing an adjustable optical transmitter wavelength of each of a plurality of customer premises equipment, wherein each of the plurality of customer premises equipment is in bidirectional communication with a customer premises equipment controller. A bidirectional communication system includes a customer premises equipment controller; and a plurality of customer premises equipment coupled to the customer premises equipment controller, each of the plurality of customer premises equipment having an adjustable optical transmitter wavelength, wherein each of the plurality of customer premises equipment is in bidirectional communication with the customer premises equipment controller to prevent optical beat interference by dynamically managing the adjustable optical transmitter wavelength of each of the plurality of customer premises equipment. |
| US09577762B2 |
Subcarrier power balance control
A method of controlling a multiple sub-carrier optical channel of an optical communications system. The multiple sub-carrier optical channel includes at least two sub-carriers modulated with respective sub-channel data streams within a spectral range allocated to a single optical channel of the optical communications system. A transmitter modem of the optical communications system applies a respective dither signal to each sub-carrier. A receiver modem of the optical communications system detects a respective quality metric of each sub-carrier. A respective optimum power level of each sub-carrier is estimated based on the applied dither signals and the detected quality metrics. A respective power level of each sub-carrier is then adjusted in accordance with the estimated respective optimum power level of each sub-carrier. |
| US09577761B2 |
Controlling an optical transmitter that supports multiple modulation formats and baud rates
A device receives a modulation format and a baud rate for transmission of an optical signal, and generates optical signals based on the modulation format and the baud rate. The device generates quadrature-delay-interferometer signals based on the optical signal, the modulation format, and the baud rate, and generates a particular optical signal with a particular wavelength for the modulation format and the baud rate. The device determines whether a point of the quadrature-delay-interferometer signals is associated with the particular wavelength of the particular optical signal, and sets or adjusts the particular wavelength of the particular optical signal for the modulation format and the baud rate based on whether a point of the quadrature-delay-interferometer signals is associated with the particular wavelength of the particular optical signal. |
| US09577759B2 |
Method of monitoring an optoelectronic transceiver with multiple flag values for a respective operating condition
The circuit monitors operation of an optoelectronic transceiver that includes a laser transmitter and a photodiode receiver. The circuit includes analog to digital conversion circuitry configured to convert a first analog signal corresponding to a first operating condition of said optoelectronic transceiver into a first digital value, and convert a second analog signal corresponding to a second operating condition of said optoelectronic transceiver into a second digital value corresponding to a second operating condition. The circuit also includes a memory configured to store the first digital value in a first memory location that is mapped to a predefined and unique first address and to store the second digital value in a second memory location that is mapped to a predefined and unique second address. The circuit includes an interface configured to enable a host external to the optoelectronic transceiver to access the first digital value using the first address and to access the second digital value using the second address. |
| US09577758B2 |
Method and system for scheduling cascaded PON
One embodiment provides an apparatus for coupling between a trunk passive optical network (PON) and a leaf PON. The apparatus includes a trunk-side optical transceiver coupled to the trunk PON, a leaf-side optical transceiver coupled to the leaf PON, and an integrated circuit chip that includes an optical network unit (ONU) media access control (MAC) module, an optical line terminal (OLT) MAC module, and an on-chip memory. |
| US09577745B2 |
Code division multiple access mobile communication system
In a mobile communication system using a code division multiple access (CDMA) method, spreading code detection and frame/slot timing synchronization (cell search) is conducted by using a long code masked symbol. The spreading factor of the long code masked symbol is set to a value lower than spreading factors of other ordinary symbols. As a result, it becomes possible to reduce the circuit scale and power dissipation of the mobile terminal and raise the speed of cell search. |
| US09577741B2 |
Multicast service delivery over high throughput satellite in a Ka spot-beam network
A method and a satellite communication system are provided. At least one satellite gateway earth station receives at least one multicast stream from an external network. In a static forwarding mode, the at least one satellite gateway earth station replicates and forwards traffic from the at least one multicast stream over at least one first respective outroute carrier of at least one first respective spot beam of a satellite regardless of whether any terminal is arranged to actively receive any of the at least one multicast stream. In a dynamic forwarding mode, the at least one satellite gateway earth station replicates and forwards second traffic from any of the at least one multicast stream over at least one second respective outroute carrier of at least one second respective spot beam only when at least one respective terminal is arranged to actively receive the any of the at least one multicast stream. |
| US09577733B2 |
Method for installing a backhaul link with multiple antenna patterns
An intelligent backhaul system is disclosed for deployment in the presence of existing radio systems. A backhaul system for co-channel deployment with existing licensed and unlicensed wireless networks, including conventional cellular backhaul radios, Common Carrier Fixed Point-to-Point Microwave Service, Private Operational Fixed Point-to-Point Microwave Service and other FCC 47 C.F.R. §101 licensed microwave networks is disclosed. Processing and network elements to manage and control the deployment and management of backhaul of radios that connect remote edge access networks to core networks in a geographic zone which co-exist with such existing systems or other sources of interference within a radio environment are also disclosed. |
| US09577732B2 |
Information processing method and electronic device which selectively operates a target antenna
One embodiment provides a method, including: displaying a plurality of contents via a display screen of a first electronic device; determining a subset of a plurality of antennas of the first electronic device based on positions of the antennas relative to the display screen, wherein said subset of antennas corresponds with respective contents as displayed via the display screen of the first electronic device; activating the subset of the antennas of the first electronic device to determine a target antenna from said subset of the antennas that is closest to a second electronic device arranged with respect to the display screen of the first electronic device; and transmitting a target content from said contents as displayed from the first electronic device to the second electronic device, wherein the target content corresponds with the target antenna. Other aspects are described and claimed. |
| US09577723B1 |
Systems and methods of analog beamforming for direct radiating phased array antennas
A method for processing data from an antenna array including a plurality of elements distributed on opposite sides of a central point is disclosed. The method includes determining an adjustment for a first signal associated with a beam and a first element of the plurality of elements. The first element is located on a first side of the central point of the antenna array. The method includes applying the determined adjustment to the first signal, and applying the determined adjustment to a second signal. The second signal is associated with the beam and a second element of the plurality of elements. The second element is located on a second side of the central point of the antenna array substantially a same distance away from the central point as the first element. |
| US09577715B2 |
Resonance-type non-contact power supply system
A resonance system that receives power from a power source section is configured by at least a primary resonance coil, a secondary resonance coil, and a load. The output frequency fo of the power source section is set to lie within one of the frequency ranges f1≦fn≦f2, f3≦fo≦f4, . . . , f2n-1≦fo≦f2n. The frequencies f1, f2, f3, f4, . . . , f2n-1, f2n (f1 |
| US09577712B2 |
Non-display signal encoding method and matrix substrate
A non-display signal encoding method cooperates with a matrix substrate including a plurality of electrodes. The electrodes cross each other and transmit a plurality of display signals and a plurality of non-display signals. The non-display signal encoding method comprises steps of: transmitting the non-display signals by at least one of the electrodes during a first time; and receiving by coupling at least a part of the non-display signals by at least an external object, wherein the non-display signals have at least three states, i.e. a first state, a second state, a third state or their any combination, and the first, second and third states are different from one another. A matrix substrate is also disclosed. |
| US09577708B1 |
Systems and methods for a twisted pair transceiver with correlation detection
The systems and methods for a twisted pair transceiver with correlation detection includes a transceiver system operating on a cable. The transceiver system includes a receiver to obtain one or more data samples related to one or more encoded data symbols. The transceiver system further includes a first correlation filter to generate a first correlation output based on the one or more data samples, and a second correlation filter to generate a second correlation output based on the one or more data samples. The transceiver system further includes a detector. The detector compares the first correlation output with the second correlation output, generates an output data bit based on a comparison result, and sends the output data bit for data decoding. |
| US09577706B2 |
Outbound interference reduction in a broadband powerline system
Disclosed is a method and apparatus for reducing outbound interference in a broadband powerline communication system. Data is modulated on first and second carrier frequencies and is transmitted via respective first and second lines of the powerline system. A characteristic of at least one of the carrier signals (e.g., phase or amplitude) is adjusted in order to improve the electrical balance of the lines of the transmission system. This improvement in electrical balance reduces the radiated interference of the powerline system. Also disclosed is the use of a line balancing element on or more lines of the powerline system for altering the characteristics of at least one of the power lines in order to compensate for a known imbalance of the transmission system. |
| US09577696B2 |
Tablet holding device
A tablet holding device for allowing a user to view a mobile electronic device while lying in a supine position. The tablet holding device includes a base portion and an upper portion securable thereto, wherein the base portion and upper portion form a cavity in which the user can position his or her head. The base portion is shaped so as to support a pillow thereon or may include padding thereon. The upper portion is positioned directly above the base portion and includes a fastener on a front end thereof for securing a mobile electronic device in position for a user lying on the base portion to view. The tablet holding device may further include an audio unit having a microprocessor, speakers, and a wireless transceiver for communicating with a mobile electronic device so as to play audio from said mobile electronic device. |
| US09577695B2 |
Wireless communication accessory for a mobile device
A wireless communication accessory for a mobile communication device comprising: a casing that conforms, at least partially, to the outer shape of the mobile communication device; a processing circuit housed within the casing and configured to process a first data; and a wireless transmitter coupled to the processing circuit, where the transmitter is configured to transmit the first data. The wireless communication accessory may further comprise a wireless receiver that is configured to receive a second data from an external wireless device. The first data may be associated with any or all of the following: payment card information for processing purchase transactions; public transportation account information for processing travel credits on public transportation systems; and access card information for gaining access into restricted areas. |
| US09577690B2 |
Wideband digital spectrometer
A processor, comprising a first data input configured to receive a stream of samples of a first signal having a spectral space, the stream having a data rate of at least 4 GHz; a second data input configured to receive a stream of samples of a second signal; a multitap correlator, configured to receive the first stream of samples and the second stream of samples, and producing at least one correlation output for each respective sequential sample of the first signal received; and a programmable control configured to alter a relationship of the stream of samples of the first signal and the stream of samples of the second signal, to thereby select, under program control, an alterable correlation output. |
| US09577686B2 |
Providing for radio frequency auto gain control (RF AGC)
A method and system for providing radio frequency auto gain control (RF AGC) for a specific frequency is provided herein. The method includes obtaining a noise measurement (N) and radio frequency level for the specific frequency; scanning a band of frequencies that the specific frequency is part of, and storing a plurality of undesired frequencies; computing a frequency intermodulation up to a predetermined level based on the plurality of undesired frequencies; and in response to the frequency intermodulation being not equal to the specific frequency, performing an iterative process to readjust the RF AGC, the iterative process including a readjustment of the RF AGC based on a noise floor performance. |
| US09577684B1 |
High frequency time interleaved digital to time converter (DTC)
Described herein are technologies related to an implementation of a time interleaved digital-to-time converter (DTC) topology to generate high frequency phase modulated local oscillator (LO) signals. A first and second DTC are connected to an oscillator where outputs of the two DTCs are combined to generate a phase modulated signal and the two DTCs have a frequency rate that is half the frequency rate of the phase modulated signal. The two DTCs can operate at a 50 percent or lower duty cycle. |
| US09577678B2 |
Bit interleaver for low-density parity check codeword having length of 64800 and code rate of 7/15 and quadrature phase shift keying, and bit interleaving method using same
A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 64800 and a code rate of 7/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for quadrature phase shift keying (QPSK) modulation. |
| US09577674B2 |
Bit interleaver for low-density parity check codeword having length of 64800 and code rate of 2/15 and 16-symbol mapping, and bit interleaving method using same
A bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 64800 and a code rate of 2/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 16-symbol mapping. |
| US09577673B2 |
Error correction methods and apparatuses using first and second decoders
Apparatuses and methods for error correcting data are provided. A first error correction code (ECC) decoder is configured to decode a first codeword to provide a first result and to decode a second codeword to provide a second result. The decoder is configured to run up to a particular number of iterations to provide each of the results. A second ECC decoder is configured to decode a third codeword to provide decoded data, wherein the third codeword includes the first result and the second result. An evaluation module is configured to initiate a recovery scheme responsive to the decoded data including an error. |
| US09577668B2 |
Systems and apparatuses for performing CABAC parallel encoding and decoding
Apparatuses, systems, and computer program products that encode and/or decode information of a video stream, such as an MPEG-4 video stream, are disclosed. Some embodiments comprise an apparatus having a binarizer module to create a plurality of bins for a syntax element for information of the video stream, a context selection module to generate an index value and a most probable symbol (MPS) value for encoding the plurality of bins, and an arithmetic coding module to encode a first and a second bin of the plurality of bins based on a first probability value and a second probability value, respectively, wherein the first and second probability values are determined via the generated index value and MPS value. Examples of some embodiments are high definition personal video recorders, transcoders, computers, personal digital assistants, cellular telephones, portable video players, high definition digital versatile disc (HD-DVD) devices, and Blu-ray disc-read only memory (BD-ROM) devices. |
| US09577665B2 |
Deflate compression algorithm
A compression algorithm replaces duplicative strings with a copy pair indicating a location and length of a preceding identical string that is within a window from the duplicative string. Rather than a replacing a longest matching string within a window from a given point with a copy pair, the longest matching string may be used provide it is at least two bytes larger than the next longest matching string or is at a distance that is less than some multiple of a distance to the next longest matching string. In another aspect, the length of the window in which a matching string may be found is dependent on a length of the matching string. In yet another aspect, rather than labeling each literal and copy pair to indicate what it is, strings of non-duplicative literals are represented by a label and a length of the string. |
| US09577663B1 |
Bandwidth extension of oversampled analog-to-digital converters by means of gain boosting
A digitized system operates to receive one or more analog signals from a sensor or other component and convert the analog signals to one or more digital signals. An analog-to-digital converter comprises a loop filter, a quantizer and one or more feedback digital-to-analog converters. A gain component provides coefficients along different points of a signal processing path to extend a bandwidth of the analog-to-digital converter. The gain component can modify a signal transfer function of the analog-to-digital converter while preserving a noise transfer function in order to process a signal in a higher frequency band in an extended mode of operation than other signals being processed in a normal operating mode. |
| US09577660B1 |
Successive approximation ADC and control method thereof
Successive approximation ADC includes a digital-to-analog converter, a comparator, a comparison unit, a timing unit and a control logic circuit. The digital-to-analog converter converts a digital signal to a reference analog signal. The comparator compares an analog input signal with a reference analog voltage and generates a comparing signal. The comparison unit generates a comparison result signal according to the comparing signal. The timing unit generates a clock signal, and sequentially enables N supplementary clock signals corresponding to N bits when the comparison result signal is enabled. The control logic circuit updates the digital signal according to the comparing signal, and generates N bits of digital value sequentially from the most significant bit to the least significant bit, and then determines whether the digital value is valid according to whether the Nth supplementary clock signal corresponding to the least significant bit is enabled. |
| US09577658B1 |
Analog to digital converter and data conversion method
An analog-to-digital converter includes comparator modules and an encoder module. Each of the comparator modules is configured to compare a reference voltage with an input signal according to a first clock signal to generate a first comparison signal and a second comparison signal, and to generate a detection signal according to a second clock signal, the first comparison signal, and the second comparison signal. A delay duration is present between the first clock signal and the second clock signal. The encoder module is configured to generate a first bit of digital data according to the first comparison signals from the comparator modules, and to generate a second bit of the digital data according to the detection signals from the comparator modules and the first bit. |
| US09577654B2 |
Analog-digital converter and control method
In an example embodiment, an analog-digital converter includes digital-analog converter, a comparator, and a register. The digital-analog converter is configured to output a differential voltage between a reference voltage and a voltage of an analog signal. The comparator is configured to output a comparison signal corresponding to the differential voltage output by the digital-analog converter. The register is configured to cause the digital-analog converter to generate N pairs of differential voltages (N≧1), to cause the digital-analog converter to generate an (N+1)th pair of differential voltages by causing one of a positive side and a negative side of the digital-analog converter to output an (N+1)th differential voltage and causing the other of the positive side and the negative side to output a differential voltage equal to the Nth differential voltage as an (N+1)th differential voltage, and to output a digital signal corresponding to a comparison signal having a smallest voltage among (N+1) comparison signals. |
| US09577653B2 |
Quasi-linear spin torque nano-oscillators
Techniques, systems, and devices are disclosed for implementing a quasi-linear spin-torque nano-oscillator based on exertion of a spin-transfer torque on the local magnetic moments in the magnetic layer and precession of the magnetic moments in the magnetic layer within a spin valve. Examples of spin-torque nano-oscillators (STNOs) are disclosed to use spin polarized currents to excite nano magnets that undergo persistent oscillations at RF or microwave frequencies. The spin currents are applied in a non-uniform manner to both excite the nano magnets into oscillations and generate dynamic damping at large amplitude as a feedback to reduce the nonlinearity associated with mixing amplitude and phase fluctuations. |
| US09577650B2 |
Phase lock loop lock indicator
A lock-on detection circuit for a phase-locked loop includes circuitry configured to receive first up and down outputs and second up and down outputs from one or more phase detectors and to determine from the first up and down outputs and the second up and down outputs how well the phase-locked loop is locked on to a reference clock. |
| US09577649B1 |
Methods and apparatus for reducing power in clock distribution networks
Integrated circuits with clock distribution circuitry are provided. The clock distribution circuitry may include a clock source, a clock distribution network, a frequency encoder placed at the output of the clock source, and one or more frequency decoders placed at the destinations of the clock distribution network. The frequency encoder can be used to obtain calibrated delay settings proportional to a reference clock generated by the clock source. Each frequency decoder can be placed in a closed loop configuration and can use the calibrated delay settings to locally self-generate a recovered clock at the destination during a locked state. During the locked state, clock buffers in the clock distribution network can be powered down to save power. |
| US09577643B1 |
Secure partial reconfiguration regions
Systems and methods for partially reconfiguring a programmable IC device are presented. Processing circuitry on the programmable IC device may identify a first region of the IC device to be reconfigured from a received bitstream. The processing circuitry may read a configuration bit associated with the identified first region, and determine, based on the configuration bit, whether to permit the received bitstream to reconfigure the identified first region. The received bitstream may be authenticated using an authentication key from a first set of authentication keys. The processing circuitry may determine whether to permit the received bitstream to reconfigure the identified first region based on the authentication key and the configuration bit. |
| US09577638B2 |
Digital signal up-converting apparatus and related digital signal up-converting method
A digital signal up-converting apparatus includes: a clock generating circuit arranged to generate a reference clock signal; an adjusting circuit coupled to the clock generating circuit and arranged to generate a first clock signal and a second clock signal according to the reference clock signal; a baseband circuit coupled to the adjusting circuit for receiving the first clock signal, wherein the baseband circuit further generates a digital output signal according to the first clock signal; and a sampling circuit coupled to the adjusting circuit and the baseband circuit for receiving the second clock signal and the digital output signal, wherein the second clock signal and the digital output signal are non-overlapping; wherein the sampling circuit samples the digital output signal based on the second clock signal and then combines the sampled digital output signal in order to generate a combined digital signal. |
| US09577634B2 |
Scalable crossbar apparatus and method for arranging crossbar circuits
Described is an apparatus (e.g., a router) which comprises: multiple ports; and a plurality of crossbar circuits arranged such that at least one crossbar circuit receives all interconnects associated with a data bit of the multiple ports and is operable to re-route signals on those interconnects. |
| US09577632B2 |
Wireless switching circuit
A wireless switching circuit includes a charging capacitor, a voltage converter, an infrared sensor unit, a single chip microcomputer (SCM), a zero trigger circuit, and a thyristor. The charging capacitor is used to store and supply power. The voltage converter is used to convert alternating current (AC) voltage into direct current (DC) voltage to charge the charging capacitor. The infrared sensor unit is used to output control signals according to sensed infrared signals. The SCM outputs a trigger signal according to the control signals from the infrared sensor unit. Input ends of the zero trigger circuit are connected to the SCM to receive the trigger signal. An anode and a cathode of the thyristor is connected to a power supply line for the socket. A control end of the thyristor is connected to an output end of the zero trigger circuit. |
| US09577626B2 |
Apparatus and methods for controlling radio frequency switches
Apparatus and methods for controlling radio frequency (RF) switches are disclosed. Provided herein are apparatus and methods for controlling RF switches. In certain configurations, an RF system includes a charge pump for generating a charge pump voltage, an RF switch, a level shifter for turning on or off the RF switch, and a level shifter control circuit for controlling the level shifter. The charge pump receives a mode signal used to enable or disable the charge pump. Additionally, the level shifter receives power in part from the charge pump voltage, and controls the RF switch based on a switch enable signal. The level shifter control circuit receives the mode signal and biases the level shifter with a bias voltage that changes based on a state of the mode signal. |
| US09577625B2 |
Semiconductor device
A semiconductor device including a common delay circuit configured to delay an input signal in response to a delay control code to output a first delayed input signal and a second delayed input signal; a first delay circuit configured to delay the first delayed input signal in response to the delay control code and to output a first output signal; and a second delay circuit configured to delay the second delayed input signal in response to the delay control code and to output a second output signal. |
| US09577624B2 |
Signal conversion circuit and power supply apparatus
A power supply apparatus including: a boost converter configured to generate a power supply voltage to drive to a load circuit from a voltage received from a voltage generation unit; an oscillator configured to receive the minute voltage, and to generate an alternating current signal; and a signal conversion circuit which further includes a half-wave generation circuit configured to receive the alternating current signal, and to generate a half-wave signal of a high potential side or a low potential side, and at least one inverter configured to receive the generated half-wave signal, and to generate a pulse signal; wherein the boost converter is driven by the pulse signal output from the signal conversion circuit in order to generate the power supply voltage. |
| US09577622B2 |
Phase interpolator
Phase interpolators are provided where an adjustment current is added to currents from a plurality of switchable current sources, for example to reduce an integrated nonlinearity. |
| US09577619B2 |
Buffer circuit having amplifier offset compensation and source driving circuit including the same
Provided are an output buffer circuit having an amplifier offset compensation function and a source driving circuit including the output buffer circuit. The output buffer circuit may include a plurality of channel amplifiers, each of which is configured to adjust an amount of current flowing through transistors connected to at least one of a non-inverted input terminal and an inverted input terminal of a differential input unit to compensate an amplifier offset, and adjust buffer input voltage signals to generate output voltage signals. |
| US09577616B2 |
Level shifter
An exemplary level shifter includes a clock level shifter configured to generate a level shifted clock signal from an input clock signal; and a switched capacitor logic controller coupled to the clock level shifter. The switched capacitor logic controller is configured to steer the level shifted clock signal based on a data signal and the input clock signal, providing a level shifted version of the data signal. |
| US09577614B2 |
Detecting method and device for suppressing interference of low-frequency noise
The invention detects the difference between the maximum signal and the minimum signal at each of a plurality of cycles separately when a sine wave is received. All differences are summed for generating a single detected signal for suppressing the interference of low-frequency noise. No synchronization with the sine wave is necessary and the detection can start at any phase of the sine wave. |
| US09577610B2 |
Active LED voltage clamp
An active clamp current sink is used to voltage protect a low voltage rated, high power current sink that drives illumination current through a string of serially connected LEDs. When the LEDs are turned off as part of a PWM configuration, the forward voltage on the LEDs falls, and the voltage presented to the low voltage rated, high power current sink rises. The active clamp current sink monitors the voltage across the high power current sink and ensures that an adequate current flows through the LEDs. This minimally adequate current maintains a sufficiently large forward voltage through the LEDs, and therefore a sufficiently small voltage is presented to the high power current sink. |
| US09577609B2 |
Method and apparatus for dynamically adapting FM tuner sensitivity to a local environment for a single-tuner system
A method of operating a single-tuner radio includes tuning into a first frequency. A pause in a first signal associated with the first frequency is detected. Tuning is switched from the first frequency to a second frequency. A signal quality metric for the second frequency is measured. Tuning is switched from the second frequency to the first frequency. |
| US09577606B2 |
Duplexer and method for increasing the isolation between two filters
A duplexer includes an antenna terminal, a transmission amplifier terminal and a reception amplifier terminal. The transmission amplifier terminal is coupled to the antenna terminal via a transmission filter. The reception amplifier terminal is coupled to a reception filter and the reception filter is coupled to the antenna terminal via a band-stop filter. |
| US09577598B2 |
Thin film type common mode filter
Disclosed herein is a thin film type common mode filter including: a base substrate made of an insulating material; a first insulating layer formed on the base substrate; a coil-shaped internal electrode formed on the first insulating layer; a second insulating layer formed on the internal electrode; an external electrode terminal having a vertical section connected to a side surface of the internal electrode and a horizontal section extended from an upper end of the vertical section toward a horizontal direction to thereby form a parallel surface spaced apart from the internal electrode by a predetermined distance; and a ferrite resin layer formed between the horizontal section of the external electrode terminal and the internal electrode. |
| US09577597B2 |
LC composite component
Provided is an LC composite component having a multi-layer substrate, a pattern coil, and a chip capacitive element. The multi-layer substrate is configured such that insulating layers are stacked. The pattern coil forms a coiled shape of which the coil axis extends along a stacking direction of the multi-layer substrate, and includes a coil conductor disposed between the insulating layers. The chip capacitive element includes a ceramic body having a relative permittivity higher than that of the insulating layers and counter electrodes. The chip capacitive element is at least partially disposed within the pattern coil. |
| US09577596B2 |
System and method for personalization of an audio equalizer
The invention is directed to synthesizing a personalized audio equalization filter based on an individual's hearing profile when listening to audio signals using a preferred electronic means of transduction and production of the audio signals through headphones, earphones, or loudspeakers and is presented in two steps. In the first step, the deviation of the listener's hearing profile, when the preferred listening device is donned, is measured and recorded relative to predetermined equal-loudness contours (e.g., ISO standard equal-loudness contours). The hearing profile is used to compute an equalization filter such that when the audio signal to be reproduced is played through the filter, the equal-loudness contour for a specified phon level is restored. Thus, the invention compensates for deviations of the user's listening device, the user's own hearing profile from a standard hearing profile that represents natural hearing, and other factors. The equalization filter can be adapted to any phon level through adaptation of filter coefficients as a function of the volume of the listening level. |
| US09577592B2 |
Method and device for controlling a power amplifier configured to use nonlinearity correction and a power amplifier system
There is disclosed a method for controlling a power amplifier capable of utilizing nonlinearity correction in a nearly steady operation status of non-linearity correction, in a periodical fast switching system in time domain. The method may comprise receiving a periodic switch signal indicating switch time of the periodical fast switching system; and providing, based on the periodic switch signal, a pre-bias signal with a pre-determined voltage amplitude to the power amplifier for a pre-determined time period before each downlink time slot to preheat a transistor of the power amplifier so as to compensate a temperature change of a die inside the transistor. |
| US09577590B2 |
Dual inductive element charge pump buck and buck power supplies
A direct current (DC)-DC converter, which includes a charge pump buck power supply and a buck power supply is disclosed. The charge pump buck power supply includes a charge pump buck converter, a first inductive element, and an energy storage element. The charge pump buck converter and the first inductive element are coupled in series between a DC power supply, such as a battery, and the energy storage element. The buck power supply includes a buck converter, a second inductive element, and the energy storage element. The buck converter and the second inductive element are coupled in series between the DC power supply and the energy storage element. As such, the charge pump buck power supply and the buck power supply share the energy storage element. |
| US09577588B1 |
Systems and methods for signal predistortion
A single or multistage signal predistorter includes an input coupled to receive an information signal comprising input samples and an output coupled to the high power amplifier, the signal predistorter configured to receive an input sample, generate a distortion sample based on an estimate of nonlinearity of the high power amplifier at an operating saturation level, modify the input sample with a correction term to generate a predistortion signal, wherein the correction term is proportional to the distortion sample, and further wherein the predistortion signal comprises the information signal modified to account for nonlinearities in the high power amplifier. |
| US09577583B2 |
Power amplifier
A power amplifier may include a first amplifying unit receiving a first bias signal to amplify a power level of an input signal; an envelope detecting unit detecting an envelope of the input signal; a comparing circuit unit comparing a peak value of the detected envelope with a preset reference voltage; and a second amplifying unit amplifying the power level of the input signal according to a second bias signal set depending on a comparison result of the comparing circuit unit. |
| US09577577B2 |
Power amplifiers, systems, and methods
An apparatus includes a cascode amplifier. The cascode amplifier includes a first transistor and a second transistor. The cascode amplifier is configured to receive a first bias voltage, a second bias voltage, and a signal. The cascode amplifier is also configured to amplify the signal based at least on the first bias voltage and the second bias voltage. The apparatus also includes a first feedback module and a second feedback module. The first feedback module is configured to adjust the first bias voltage based at least on the amplified signal. The second feedback module is configured to adjust the second bias voltage based at least on a voltage distribution across the first transistor and the second transistor. A system and method for maintaining cascode amplifier performance are also provided. |
| US09577573B2 |
Photovoltaic module
A photovoltaic module includes: a solar cell module including a plurality of solar cells; a junction box including a dc/dc converter unit to convert the level of DC power supplied from the solar cell module; a plate on one surface of the solar cell module and disposed between the solar cell module and the junction box; and a coupling member attaching and detaching the junction box from the solar cell module. |
| US09577568B2 |
Detection of a wire-break fault during the operation of a brushless d.c. motor
A method recognizes a wire-break fault during operation of a brushless DC motor. A switch-on delay duration of a transition of an electrical phase potential that rests on the stator winding phase from a switch-off potential to a switch-on potential and a switch-off delay duration of the transition of the phase potential from the switch-on potential to the switch-off potential are detected for a stator winding phase of the stator winding of the motor during each pulse width modulation cycle period. Moreover, a lower deviation limit is defined for a deviation of detected switch-off delay durations from detected switch-on delay durations. A wire-break fault is deduced if the deviations of the detected switch-off delay durations from the detected switch-on delay durations fall below the lower deviation limit. |
| US09577567B2 |
Method for operating a work apparatus having an electric motor
An electric motor in a work apparatus has a power characteristic line which runs between a lower rotational speed of the electric motor and an upper rotational speed of the electric motor. The power characteristic line has a power characteristic with a pronounced maximum (M) and an operating plateau (AP) which lies in a working rotational speed range (AD) of the work apparatus. A method for operating the electric motor provides for configuring the position of the operating plateau (AP) to be variable with respect to the rotational speed of the electric motor to achieve stable operating points over a wide rotational speed range. |
| US09577565B2 |
Motor control device and method for controlling the same
When detecting an amount of noise current generated in an inverter and flowing into a noise filter, sampling the detection values with an interval of a carrier frequency, determining whether envelope curves of respective sampled values are deemed to be constant, and in a case where the envelope curves of the sampled values are deemed to be constant, the motor control device changes the carrier frequency to another frequency that does not overlap a cutoff frequency fr of the noise filter, or to another frequency that is not close to the cutoff frequency fr of the noise filter. Due to this configuration, even when the noise filter incorporated in the motor control device is a noise filter that is manufactured without demanding any special measures to be taken to the manufacturers and is manufactured with specifications of noise filter manufacturers, a desired noise reduction effect can be obtained. |
| US09577561B2 |
Method for suppressing a speed fluctuation, a control apparatus and a compressor control system
A method for suppressing a speed fluctuation of a permanent magnet synchronous motor is provided in the present disclosure, including: obtaining a target speed ω_ref, a feedback speed, a fluctuation speed Δω, a q-axis inductance Lq and a permanent magnet flux linkage φf of the permanent magnet synchronous motor; performing a PI adjusting on Δω to obtain a q-axis reference current Iq_ref, and obtaining a q-axis target voltage U*q according to Iq_ref, ω_ref, Δω and φf; performing a PI control on a q-axis actual voltage according to U*q to obtain a q-axis compensation current Iq_add; obtaining a d-axis target voltage U*d according to Iq_ref, Iq_add, ω_ref, Δω and Lq; performing a PI control on a d-axis actual voltage according to U*d to obtain a d-axis compensation current Id_add; superposing Iq_add and Iq_ref to perform a feedforward compensation on a q-axis current and superposing Id_add and the d-axis reference current to perform a feedforward compensation on a d-axis current. |
| US09577560B2 |
Synchronous machine control device
A synchronous machine control device is provided with a magnet state outputter that estimates a magnetic flux of a permanent magnet forming the magnetic field of a synchronous machine. In a magnet state correction value calculation mode, the magnet state outputter calculates a magnet state correction value. In a magnet state estimation mode, the magnet state outputter obtains, from a magnet state estimation device, a magnetic flux estimation value of the permanent magnet under a given condition of a magnetic flux command and a δ-axis current command and controls a magnet state corrector to correct the magnetic flux estimation value of the permanent magnet obtained by the magnet state estimation device, by use of the magnet state correction value. |
| US09577552B2 |
Systems and methods for braking an electric motor
A motor controller for an electric motor having a stator and a rotor. The motor controller includes a power input for receiving AC power from a power source; a control input for receiving a control signal from a control; and circuitry for switching power from the power source to the electric motor in response to the control signal. The circuitry is operable to: apply a braking waveform to the stator while the rotor is rotating; monitor a reactive power of the stator; detect an increase in the reactive power of the stator to determine the rotor has substantially stopped rotating; and remove the braking waveform from the stator in response to detecting the increase in the reactive power. |
| US09577551B2 |
Motor drive apparatus
A motor drive apparatus that controls a current flowing through a coil of a motor, including a comparing section that compares the current flowing through the coil to a control current input thereto; an operation selecting section that selects an operational state according to a comparison result of the comparing section; a driving section that receives a designation signal designating a current mode and a stop mode, drives the coil in the operational state selected by the operation selecting section when the designation signal designating the conductive mode is received, and drives the coil in the braking state when the designation signal designating the stop mode is received; and a setting section that controls a start of the designation signal designating the stop mode or a start of a period during which the control current is zero. |
| US09577546B2 |
Power converter with self-driven synchronous rectifier control circuitry
An AC-DC power converter is provided with two pairs of self-driven synchronous rectifier switches in addition to, or in place of, diode bridge rectifiers for boosting efficiency and reducing cost. An AC sensing circuit is coupled to AC input terminals, and a DC level shifting circuit applies a DC offset to an AC input signal received via the sensing circuit. A comparator circuit determines positive and negative half waves of the AC input signal relative to the DC offset value. Gate drive signals are provided for driving a first set of parallel rectifier switches during a positive half cycle of the AC input signal, and for driving a second and opposing pair of parallel rectifier switches during a negative half cycle of the AC input signal. In an embodiment, high side gate drive signals may be electrically isolated from the active rectifier control circuitry. |
| US09577545B2 |
Power circuit, converter structure and wind power generation system thereof
A power circuit, a converter structure and a wind power generation system thereof are disclosed. The power circuit includes a first converter having an AC input side and a DC output side, a second converter having a DC input side and an AC output side, and a DC bus storage unit electrically connected to the DC output side of the first converter and the DC input side of the second converter. A level number, a switching valve type and/or a circuit connection of the first converter are different from those of the second converter. |
| US09577544B2 |
Device and method for connecting an electric power generator to an HVDC transmission system
A device for connecting an electric power generator to an HVDC transmission system is provided, the device having (a) a first unit for converting an AC output voltage from the electric power generator to a DC input voltage for the HVDC transmission system, the first unit having a transformer and a full-bridge rectifier, and (b) a second unit for generating control voltages and/or control currents in the transformer and/or in the electric power generator, the second unit having a PWM full-bridge converter adapted to receive the AC output voltage from the electric power generator or an AC voltage based on said AC output voltage. Furthermore, a system and a method are provided. |
| US09577541B2 |
Single switch infinite-level power inverters
An electrical power converter includes a circuit with a single switching transistor that is electrically connected to a direct current power source, a first inductor-capacitor (LC) circuit electrically connected to the single switching transistor, a second LC circuit electrically connected to the first LC circuit and configured to provide an output signal to a load. A controller is operatively connected to the single switching transistor. The controller identifies an error between the output signal of the circuit and a reference signal and adjusts a duty cycle of a pulse width modulation (PWM) switching signal to switch the single switching transistor at a predetermined frequency with the adjusted duty cycle to reduce the identified error. |
| US09577540B1 |
Multi-stage flyback converter for wide input voltage range applications
A multi-stage flyback circuit is provided for a wide range of DC input voltage applications. An intermediate circuit is coupled across a DC source which may be for example an output from a diode bridge rectifier. A first flyback stage includes a primary winding of a flyback transformer and a first switch coupled in series between a midpoint of the intermediate circuit and a negative DC terminal. A second flyback stage includes a second primary winding and a second switch coupled in series between the midpoint of the intermediate circuit and a positive DC terminal. A secondary winding of the flyback transformer is coupled to a DC load. The first and second switches are operated synchronously, wherein the voltage stress on each of the first and second switches is substantially reduced. |
| US09577539B2 |
Power supply device and power supply system that have a serial connection terminal, a reverse flow prevention rectifying device and a bypass rectifying device
A power supply device includes a transformer, a rectification smoothing circuit having positive and negative output ends that rectifies and smoothes an induced voltage at a secondary winding of the transformer so as to generate a direct current voltage between positive and negative output terminals, a serial connection terminal to which another power supply device is connectable and is connected to the positive output end, the negative output terminal is connected to the negative output end, the reverse flow prevention rectifying device is connected between the positive output end and the positive output terminal, its forward direction faces toward the positive output terminal, and the bypass rectifying device is connected between the positive output end and the negative output end, its forward direction faces toward the positive output end. Therefore, a plurality of power supply devices are easily connected in series without providing external diodes for each power supply device. |
| US09577537B2 |
Systems and methods for load compensation with primary-side sensing and regulation for flyback power converters
System and method for regulating an output voltage of a power conversion system. The system includes a sampling component located on a chip, which for example, receives an input voltage through a terminal. The sampling component, for example, samples the input voltage and generates a sampled voltage. Additionally, the system includes an error amplifier which for example, processes information associated with the sampled voltage and a threshold voltage and generates a first output signal, and a first signal generator which for example, generates a second output signal and one or more third output signals. Moreover, the system includes a comparator which for example, receives the first output signal and the second output signal and generates a comparison signal, and a gate driver directly or indirectly coupled to the comparator. The gate driver, for example, generates a drive signal based on at least information associated with the comparison signal. |
| US09577536B2 |
System and method providing reliable over current protection for power converter
System controller and method for protecting a power converter. The system controller includes a first controller terminal configured to output a drive signal to a switch to affect a first current flowing through a primary winding of a power converter. The power converter further includes a secondary winding coupled to the primary winding, and the drive signal is associated with one or more switching periods. Additionally, the system controller includes a second controller terminal configured to receive a sensing voltage from a sensing resistor. The sensing voltage represents a magnitude of the first current flowing through the primary winding of the power converter. The system controller is configured to process information associated with the sensing voltage and a reference voltage, and determine whether an average output current of the power converter is larger than a current threshold. |
| US09577535B2 |
Power conversion apparatus
A power conversion apparatus includes a switch circuit which drives switching elements based on a control signal, a feedback section which performs feedback control, a signal output section which outputs the control signal based on a controlled variable of the feedback control, an output value detecting section which detects an output value outputted from the switch circuit, and an operation determining unit which has an operation stop determination section which determines whether to stop operation of the switching elements based on a rate of change of the output value, and an operation start determination section which determines whether to start operation of the switching elements based on the controlled variable. |
| US09577531B2 |
Buck-boost converter and control circuit thereof
A buck-boost converter and a control circuit thereof are disclosed. When an input voltage is close to an output voltage (i.e., the buck-boost converter operates in a buck-boost mode), the control circuit of the buck-boost converter generates specific switching signals. Four switches of a switching regulator are switched by the switching signals, so that the four switches are not turned-on or turned-off frequently because of the input voltage closing to the output voltage. Accordingly, the buck-boost converter and the control circuit thereof of the disclosure can reduce switch noise of the four switches and switching loss of the whole circuit, to improve conversion efficiency of the buck-boost converter. |
| US09577530B1 |
Boost converter with zero voltage switching
A power converter circuit is disclosed. The circuit includes a capacitor connected across first and second output terminals, an inductor configured to receive current from a power source, and a main switch configured to selectively conduct current from the inductor to a ground. The circuit also includes a diode configured to conduct current from the inductor to the capacitor, and a second switch connected in parallel with the diode, where the second switch is configured to selectively conduct current from the capacitor to the inductor. |
| US09577529B2 |
Energy harvesting circuit and method
An energy harvesting circuit is based on a switch mode inductive DC-DC converter circuit. The inductor current is sensed and a duration of an on-time is controlled in dependence on the sensed inductor current. A duration of an overall switching period of the converter circuit is controlled in dependence on an on-time set by a first timing control circuit and input and output voltages. This converter circuit enables independent control of the on-time and a full period of a converter cycle. Very rapid switching can be avoided which can give rise to very high energy consumption. The full cycle period can be set to achieve a desired constant value of an input resistance of the DC-DC converter, and thereby maximize power transfer. |
| US09577528B2 |
Power converter
A power converting circuit includes a converter. The converter receives and converts an input power to provide power for a load. The converter includes a power storage unit, a switch unit, a capacitor unit, and a current sampling unit. The power storage unit includes input and output terminals. The switch unit includes first and second switches, which are series connected at a common terminal, and the common terminal is coupled to the output terminal of the power storage unit. The capacitor unit includes first and second capacitors. The first capacitor and the switch unit are parallel connected to form a capacitor-switch parallel structure. The second capacitor capacitance is more than ten times larger than the first capacitor capacitance. The current sampling unit and the capacitor-switch parallel structure are series connected to form a capacitor-sampling unit series structure. The capacitor-sampling unit series structure and the second capacitor are parallel connected. |
| US09577527B2 |
Current metering for transitioning between operating modes in switching regulators
Current metering for transitioning to low power operation in switching regulators is disclosed. In an exemplary embodiment, a method is provided that includes generating pulse width modulated charging cycles that enable current to flow to an inductor to adjust an output voltage, and detecting a skipped charging cycle. The method also includes determining whether a number of charging cycles are skipped over a time interval that begins when the skipped charging cycle is detected. The method also includes transitioning to a low power operating mode if it determined that the number of charging cycles have been skipped over the selected time interval. During the low power operating mode pulse frequency modulated charging cycles are generated that enable the current to flow to the inductor to generate the output voltage. |
| US09577526B2 |
Voltage adjusting apparatus with jumper
A voltage adjusting apparatus includes a pulse width modulation (PWM) controller, a switch module, and a feedback module. The PWM controller outputs control signals. The switch module receives the control signals, and outputs working voltages accordingly. The feedback module includes a jumper, a first resistor, a second resistor, and a third resistor. If the first terminal and the second terminal of the jumper are electrically coupled together, the third resistor is cut off from the feedback module by the jumper, the first resistor and the second resistor are electrically coupled in the feedback module, and the switch module outputs a first working voltage accordingly. If the second terminal and the third terminal of the jumper are electrically coupled together, the first resistor, the second resistor, and the third resistor are all electrically coupled in the feedback module, the switch module outputs a second working voltage accordingly. |
| US09577523B2 |
Dual mode voltage regulator with reconfiguration capability
A dual mode voltage regulator according to one embodiment includes a passive regulator circuit, a switching regulator circuit, and a controller circuit configured to determine parameters of an external select input. The controller is configured to selectively couple, on a cold boot up, either the passive regulator circuit or the switching regulator circuit between an input voltage port and an output load based on the determination of parameters. |
| US09577520B2 |
Power converter with bootstrap circuit
A power converter with bootstrap circuit, the power converter has a high side switch, a low side switch, a bootstrap circuit and a bootstrap capacitor for providing a bootstrap voltage to supply a high side driver of the high side switch. The power converter receives an input voltage and provides an output voltage based on driving the high side switch and the low side switch to switch on and off. The bootstrap circuit has a first comparing circuit, a first comparing circuit, a boost circuit and a second charging circuit. The second charging circuit charges the bootstrap capacitor when a voltage difference between the input voltage and the output voltage is smaller than a voltage threshold. |
| US09577514B2 |
Peak sample circuit for AC voltage and method thereof
A peak sample circuit for AC voltage, including: a rectifier coupled to receive an AC voltage and to rectify the AC voltage to generate a rectified signal; a delay circuit coupled to receive the rectified signal and to delay the rectified signal to generate a delayed rectified signal; a comparison circuit coupled to receive the delayed rectified signal and to generate a square signal based on the comparison of the rectified signal and the delayed rectified signal; and a sample output circuit coupled to receive the rectified signal, wherein the sample output circuit samples the rectified signal under the control of the square signal and provides a peak sample signal representative of the peak value of the AC voltage. |
| US09577508B2 |
NMOS LDO PSRR improvement using power supply noise cancellation
Power-supply ripple rejection (PSRR) at high frequencies is improved for an LDO voltage regulator with an NMOS pass transistor (MN1). A ripple voltage (Vripple) present on the input voltage causes a ripple current (Iripple) through parasitic gate-drain capacitance of the pass transistor. A small ripple current (Ifraction) proportional to the ripple current (Iripple) is generated and amplified to generate a cancellation current (Icancel). The cancellation current is drawn from the gate of NMOS pass transistor (MN1) to cancel the ripple current so that no net ripple current flows through the finite output impedance of an error amplifier (2), to thereby achieve the PSRR improvement. |
| US09577507B2 |
Inverter assembly without galvanic isolation
Disclosed is an inverter assembly without galvanic isolation, the inverter assembly including a PCB mounted with a power supply circuit unit, an inverter unit, an analogue circuit unit and a controller, a first ground circuit pattern to supply a ground power to the power supply circuit unit and the inverter unit, a second ground circuit pattern to supply the ground power to the analogue circuit unit, a third ground circuit pattern to supply the ground power to the controller, a first bead between the first ground circuit pattern and the second ground circuit pattern to isolate an impedance between the first ground circuit pattern and the second ground circuit pattern, and a second bead between the second ground circuit pattern and the third ground circuit pattern to isolate an impedance between the second ground circuit pattern and the third ground circuit pattern. |
| US09577501B2 |
Claw pole rotor with cavity for minimizing flux leakage
A rotor for a rotary electric machine, the rotor including first and second pole pieces each having a respective magnetic hub arranged for rotation about an axis along which they are spaced. Pluralities of magnetic first and second pole fingers are spaced from each other and extend between the hubs. Each pole finger has a proximal end connected to its respective hub, and an axially opposite distal end. The first and second pole fingers circumferentially alternate about the axis, and each pole finger has a respective radially inner surface defining a cavity that extends axially from the distal end to a cavity terminus. Relative to each pole finger, at a respective axial position between the distal end and the cavity terminus the radial distance between the axis and the radially inner surface is substantially greater inside of the cavity than outside of the cavity. |
| US09577497B2 |
Rotating electric machine having a magnetic sensor that detects a rotation position of a rotor core
A rotating electric machine has a semiconductor magnetic sensor and a cylindrical housing with a cylinder part, which is made of a soft magnetic material, positioned closer to the semiconductor magnetic sensor relative to a back yoke of a stator core. The semiconductor magnetic sensor is positioned away from the cylindrical housing so that a shortest distance between a center of the semiconductor magnetic sensor and the cylindrical housing is equal to or greater than 50 times of a sum of a first space distance and a second space distance. With such an arrangement, a leak magnetic field generated by magnetic poles that leaks in an axial direction is prevented from disturbing the semiconductor magnetic sensor. Thus, a rotation position detection accuracy of the semiconductor magnetic sensor is improved. |
| US09577494B2 |
Elastic cone for sealing and method
A motor includes a casing having a cavity, a stator configured to be attached to an inside of the cavity, an elastic cone configured to be attached to a first end of the casing, a rigid cone configured to be attached to a second end of the casing that is opposite to the first end, a non-metallic part configured to be attached to the elastic cone and the rigid cone, and a rotor provided inside the cavity and configured to rotate inside the stator. The casing, the elastic cone, the rigid cone, and the non-metallic part form a hermetic enclosure in which the entire stator is enclosed and the hermetic enclosure is configured to hold a cooling fluid that cools the stator and also to prevent the cooling fluid to reach the rotor. |
| US09577492B2 |
Marine propulsion device and boat
A marine propulsion device, including an engine including a crankshaft, and a power generator including a rotor configured to be rotated by the crankshaft, and a stator arranged to face the rotor, the stator including a first coil group and a second coil group each configured to generate alternating current (AC), the second coil group being configured to generate more electric power than the first coil group. The marine propulsion device further includes a rectifier configured to rectify the AC generated by the first coil group to thereby obtain a first direct current (DC), and to output the first DC to a first battery, a converting device configured to convert the AC generated by the second coil group into a second DC, and a transformation device configured to transform a voltage of the second DC, and to output the voltage-transformed DC to a second battery. |
| US09577490B2 |
Spindle motor
A spindle motor having a turntable is disclosed, the spindle motor including a rotating rotation shaft, a turn table coupled to the rotation shaft to rotate along with the rotation shaft, and formed at a central upper surface with an accommodation groove, and a torque enhancement member coupled to the rotation shaft, and arranged inside the accommodation groove of the turn table to enhance a rotational torque of the turn table by depressing the turn table. |
| US09577488B2 |
Drive unit integrated rotating electrical machine
ProblemTo obtain a drive unit integrated rotating electrical machine that makes it easier to connect power circuits and achieves not only excellent vibration resistance but also excellent heat releasing properties.Means for SolutionA drive unit integrated rotating electrical machine has a motor, a drive unit driving the motor under control and provided with power switching elements and conductors passing a current to the power switching elements, and a heat sink cooling the drive unit, which are combined into one unit. The drive unit integrated rotating electrical machine is characterized in that: the power switching elements are molded and formed into mold modules in a state in which terminals thereof are exposed; the conductors are insert-molded in a frame in a state in which terminals thereof are exposed; and the exposed terminals of the mold modules are connected to the exposed terminals of the insert-molded conductors and the mold modules are firmly fixed to the heat sink. |
| US09577487B2 |
Electronic cylinder with waterproof structure
An electronic cylinder includes a knob; a cylinder core connected with the knob; a motor having a protrusion block; a clutch unit; a coupler including a chamber receiving the clutch unit and a front portion having a front end face with an opening constituted by an injection channel indented inwardly from the end face and extending from a first point of a periphery confining the end face, an recess indented inwardly from a bottom surface of the injection channel and an outflow channel indented inwardly from the end face and extending from a second point of the periphery, the bottom of the recess being formed with a hole permitting extension of an axle for engaging the clutch unit, a preventing block in a depth of the opening such that after assembly, the end face abuts against the motor; and a waterproof filler hermetically filling the recess. |
| US09577483B2 |
Rotor for a permanent-magnet embedded motor having permanent magnets fitted into a plurality of magnet insertion holes formed in a circumferential direction
A rotor includes a plurality of magnets, and an annular rotor core having a plurality of magnet insertion holes formed in a circumferential direction, into which the magnets are respectively inserted, in which each of the magnet insertion holes is formed with a protruding portion A on an inner wall surface on an inner diameter side in a radial direction of the rotor, and each of the magnets is formed with a recessed portion that is fitted to the protruding portion A when the magnet is inserted into the magnet insertion holes. With this configuration, fixation of the magnets is facilitated, and generation of chipping and vibration noise due to a movement of the magnets at the time of activation or rotation can be suppressed, thereby enabling to provide the rotor having high quality and high reliability. |
| US09577481B2 |
Rotor for an electric machine and electric machine including the same
A rotor as disclosed for an electric machine which includes a rotor core having a plurality of rotor sheets stacked in an axial direction, each of the plurality of rotor sheets having a plurality of flux paths made of a material of high permeance, a plurality of flux barriers made of a material of low permeance, a plurality of bridges made of a material of high permeance, each of the plurality of bridges extending across a corresponding flux barrier, and at least one axial magnet located axially adjacent a corresponding bridge and configured to saturate the corresponding bridge, each axial magnet being axially pressed between two elements at least one of which is a bridge corresponding to the axial magnet. |
| US09577480B2 |
Rotor for rotary electric machine
A rotor includes a plurality of salient poles, each of which is formed by a plurality of plate members including steel plates that are stacked together, provided extending in a radial direction and around which a coil is wound. The plurality of salient poles has auxiliary salient poles that protrude from the salient poles between two salient poles that are adjacent to one another. The auxiliary salient poles are formed by only a first plate member that is a portion of plate members that forms the salient poles. |
| US09577476B2 |
Wireless power transmission device and control method of the same
Performing power transfer to a plurality of power receiving devices, a power transmission device allocates one of a plurality of channels to perform wireless power transfer to a power receiving device in response to a power transmission request transmitted from the power receiving device designating one or more of the plurality of the channels having different frequencies. In a case where a power transmission request using the first channel is received from a second power receiving device, the device stops power transfer to the first power receiving device using the first channel, starts power transfer to the first power receiving device using a channel other than the first channel and starts power transfer to the second power receiving device using the first channel. |
| US09577468B2 |
Wireless charging receiving device and wireless charging system using the same
A wireless charging receiving device includes a body, a metal housing, a receiving coil, and a power storage device. The metal housing is coupled to the body to form an accommodating space. The metal housing includes an aperture and at least one slit. The slit interconnects the aperture and the edge of the metal housing. The receiving coil is disposed between the metal housing and the body. The receiving coil defines a through hole by a looped configuration, and the through hole overlaps at least part of the aperture of the metal housing. The power storage device is disposed within the accommodating space and electrically connected to the receiving coil. Electromagnetic waves are able to pass through the aperture of the metal housing and are magnetically coupled to the receiving coil, such that the receiving coil transfers the energy of the electromagnetic waves to the power storage device. |
| US09577465B2 |
Contactless power transmission device
A contactless power transmission device includes a switching unit that switches a power transmission line so that a first power is transmitted through the first line when an AC power supply outputs a first AC power and so that a second power is transmitted through a second line when the AC power supply outputs a second AC power. An impedance conversion unit is arranged on the second line that converts an impedance from an output of the AC power supply to a variable load when the second power is transmitted through the second line to approach an impedance from the output of the AC power supply to the variable load when the first power is transmitted through the first line. |
| US09577463B2 |
Portable device to portable device wireless power transfer methods and systems
Some embodiments provide a portable consumer electronic device comprising: a battery; a user interface configured to provide a user with information and receive inputs from a user; and a wireless power distribution circuitry coupled with the battery, wherein the wireless power distribution circuitry comprises: a power transfer antenna electrically coupled with the battery and configured to wirelessly and inductively couple with a separate second portable consumer electronic device that is configured to wirelessly and inductively couple with the portable consumer electronic device, and the wireless power distribution circuitry is configured to wirelessly transfer power from the battery through the power transfer antenna to the second portable consumer electronic device; and a power supply controller configured to control the wireless transfer of power through the power transfer antenna. |
| US09577461B2 |
Multi axis vibration unit in device for vectored motion
Charging a first device by a second device. The first device determines a first position of the first device relative to the second device. Based on the charging position, automatically moving, by the first device, into a second position on the second device. The first device comprises a first motor and a second motor. The first motor is capable of moving the first device along a first axis. The second motor is capable of moving the first device along a second axis. |
| US09577459B2 |
Systems and methods for regulating inductive energy transfer to an implantable system
Systems and methods are provided for regulating the transfer of energy inductively between an implantable device and an external charging system, wherein the energy transfer rate is regulated by varying an operating frequency of an inductive energy transfer circuit of the implantable device responsive a temperature measured within the implantable device. |
| US09577458B2 |
Electrical storage system
An electrical storage system includes: an electrical storage device (10) including serially connected electrical storage blocks; a relay (SMR-B, SMR-G) switching a connection state between the electrical storage device and a load; a controller (30, 34) controlling the relay; and a current interruption circuit (60) interrupting energization of the electrical storage device. The current interruption circuit (60) includes an alarm circuit (63) outputting an alarm signal indicating that any one electrical storage block is overcharged or overdischarged by comparing a voltage value of each electrical storage block with a threshold; a latch circuit (64) retaining the alarm signal; and a transistor (68) causing the relay to switch from an on state to an off state upon reception of a latch circuit output signal. The controller determines an energization state of the electrical storage device after executing control for causing the alarm circuit to output the alarm signal by changing the voltage value or the threshold. |
| US09577455B2 |
High power charging device
A charging device switchable between a first charging current and a second charging current includes a USB port and an identification signal providing circuit. The identification signal providing circuit outputs an identification signal to the electronic device when the electronic device is first coupled to the USB port. The electronic device determines whether the charging device matches the electronic device or not according to the identification signal. The electronic device is recharged using the first charging current when the charging device does match the electronic device, and the electronic device is recharged using the second charging current when the charging device does not match the electronic device. |
| US09577453B2 |
Mechanism for charging an electronic device with a retractable cord reel
An mechanism for charging an electronic device with a retractable cord reel. The device maintains a substantially continuous converted power source connection during operation, including operations adjusting the length of the retractable cord. |
| US09577442B2 |
Cell balance device and battery system
Provided are a cell balance device with high cell balance performance and high cell balance speed and requiring no high voltage process, and a battery system including the cell balance devices. The cell balance device includes: three terminals to be connected to secondary batteries; one terminal to be connected to a voltage hold device; three switches provided between the three terminals and the one terminal; and a receiving terminal and a transmitting terminal for a synchronization signal. Alternatively, the cell balance device includes: four terminals to be connected to secondary batteries; two terminals to be connected to a voltage hold device; six switches provided between the four terminals and the two terminals; and a receiving terminal and a transmitting terminal for a synchronization signal. The battery system includes: a plurality of secondary batteries; a plurality of voltage hold devices; a plurality of cell balance devices; and a clock generation circuit. |
| US09577437B2 |
Power system
The present invention provides methods and apparatus for reducing power consumption. One method includes detecting the presence of an object, identifying whether the object is a valid device and restricting power if it is not a valid device. Another method includes temporarily applying a low amount of power to the primary unit to detect a load, supplying more power to determine if it is a valid secondary device, and restricting power if it is not. An apparatus for reducing power consumption includes two power inputs, where the lower power input powers a sense circuit. A switch selectively decouples the higher power input from the primary subcircuit during detection mode and couples the higher power input to the primary subcircuit during power supply mode. |
| US09577435B2 |
Method and apparatus for managing demand response resources in a power distribution network
In one aspect of the teachings herein, demand responsive loads are selected for involvement in a given DR event using an advantageous approach to selection that is based on using a mathematical network model to evaluate power loss in a power distribution network as a function of different combinations of demand responsive load selections and corresponding load reduction values. The mathematical network model comprises a mathematical representation of the power distribution network as a multi-phase unbalanced distribution network, including mathematical representations of the physical components in the power distribution network and the connecting relationships of those components. As overall power loss in the system is a function of different combinations of demand responsive load selections, the mathematical network model is used to evaluate system power loss under different demand response load selections, in a manner that automatically accommodates mesh networks and other complex network topologies, distributed generation sources, etc. |
| US09577434B2 |
Methods and apparatuses for allocating amounts of energy
The present invention relates to methods and apparatuses for allocating amounts of energy for prosumers, wherein the prosumers provide minimum and maximum amounts of energy for a future interval of time and the respective amounts of energy from the prosumers are generated in such a manner that, on the one hand, a relative position of the amount of energy within an interval for the particular prosumer, as defined by the minimum amount of energy and the maximum amount of energy, assumes an identical value for all prosumers and, on the other hand, a sum of the amounts of energy from all prosumers produces a value of zero. The invention can be used in the distribution of amounts of energy in a power supply system having conventional energy producers and energy consumers as well as in novel participants in the power supply system which can both consume and provide energy, for example an electric vehicle. |
| US09577432B2 |
Advanced energy monitoring and control in a complex system
A system includes a plurality of smart outlets and a backend system in wireless communication with the smart outlets. The smart outlets are configured to provide electrical power from an electrical system to respective power loads, and configured to measure power consumption characteristics thereof the respective power loads. The power consumption characteristics may include real power, apparent power or a combination thereof consumed by the respective power loads. The backend system may be configured to wirelessly receive the power consumption characteristics from the smart outlets for analysis in accordance with a power distribution schedule of the electrical system, and wirelessly transmit a command signal to one or more of the smart outlets in various instances response to the analysis. This command signal may instruct the respective one or more smart outlets to shed or restore power to respective power loads from the electrical system. |
| US09577427B2 |
Load-balancing device on a polyphase network
A load-balancing device includes a control module, and a converter for generating a voltage supplying a single-phase electrical load connected to a polyphase electrical network. The converter selectively modifies a phase shift between its output and phases of the polyphase electrical network. The control module controls synchronization of the output with a first phase of the network and its progressive phase shifting when it is synchronized with a second phase of the polyphase electrical network. It also controls connection of the load to the network and to the converter when the converter and first phase are synchronized. The control module maintains disconnection of the load from the network during the progressive phase shifting of the converter output voltage, and controls its connection the second phase of the network when its output is synchronized with the second phase. |
| US09577423B2 |
Power system including a load panel protecting a facility from a broken or missing neutral of a split phase electrical distribution configuration
A power system is for a facility. The power system includes a load panel powered from a split phase electrical distribution configuration having a first line, a second line and a neutral. A two-pole circuit interrupter in the load panel receives power from the first line, the second line and the neutral, and protects an unbalanced load. The two-pole circuit interrupter is structured to trip open or open responsive to an input. A circuit in the load panel is structured to determine that the neutral is broken or missing and responsively output to the input to cause the two-pole circuit interrupter to trip open or open. |
| US09577420B2 |
Arc fault circuit interrupter
An arc fault circuit interrupter is disclosed. This arc fault circuit interrupter can include any one or more of three different sensors such as a high frequency sensor, and any one of lower frequency sensors such as a current sensor or a differential sensor. The arc fault circuit interrupter can be configured as an in line arc fault circuit interrupter installed in a wall box. In addition, the arc fault circuit interrupter can include a processor configured to determine any one of a series arc fault, or a parallel arc fault. |
| US09577418B2 |
Cable system
A cable system has a cable connecting a base device and a travelling body, functions of the cable at least including transmission of signals, a reel device disposed on the travelling body, the reel device having a reel onto which the cable is to be wound, a motor that drives the reel and a rotation sensor that detects a rotation of the reel, a motor controller that controls the motor of the reel device; and an acceleration sensor that is disposed in the traveling body and detects an acceleration in a vertical direction, the motor controller basically opening a motor drive circuit for driving the motor or bringing a supply current to the motor to zero when it is determined that the reel is rotated in an unreeling direction for unreeling the cable based on sensed information from the rotation sensor. |
| US09577417B2 |
Cable mounting bracket apparatus and system
A bracket and a cable mounting system which includes a bracket with a center panel or channel and with magnetic pads located on the distal ends of the center panel or channel so that the bracket may be attached to a structure by magnetic attraction. The cable mounting system may also consist of two brackets set a distance apart and a support rail placed in between and coupled to the brackets. |
| US09577414B2 |
Vertical cable manager
A cable manager includes one or more cable manager units. Each cable manager unit includes a pair of side cable guides, each comprised of a plurality of finger-like projections extending forwardly from a support column. At least one of the pair of support columns has a socket arranged at a side thereof. Each cable manager unit further includes a separate midsection member capable of insertion into the socket for interconnecting the pair of side cable guides. |
| US09577411B2 |
Plenum assembly
The present invention provides for a plenum assembly coupled to an arc resistant cabinet, the plenum assembly comprising of individual modules coupled in a telescopic manner. Each module encloses a chamber to form a central conduit for exhaust products generated from the electrical equipment. The plenum assembly further comprises of a resilient deflector plates angularly prescribed to horizontal plane M-N which manages the direction of gas flow inside the plenum so that the hot gases are diverted to the outside of the building. |
| US09577408B2 |
Tunable laser with high thermal wavelength tuning efficiency
A monolithically integrated thermal tunable laser comprising a layered substrate comprising an upper surface and a lower surface, and a thermal tuning assembly comprising a heating element positioned on the upper surface, a waveguide layer positioned between the upper surface and the lower surface, and a thermal insulation layer positioned between the waveguide layer and the lower surface, wherein the thermal insulation layer is at least partially etched out of an Indium Phosphide (InP) sacrificial layer, and wherein the thermal insulation layer is positioned between Indium Gallium Arsenide (InGaAs) etch stop layers. |
| US09577406B2 |
Edge-emitting laser diode package comprising heat spreader
Various implementations relating to an illumination package including an edge-emitting laser diode (EELD) are disclosed. In one embodiment, an illumination package includes a heat spreader including a base and a stub that extends from the base, an EELD configured to generate illumination light, the EELD being mounted to a side surface of the stub, and a substrate coupled to the base at a location spaced from the EELD, the substrate being electrically connected to the EELD. |
| US09577404B2 |
Semiconductor laser device, photoelectric converter, and optical information processing unit
A semiconductor laser device that enables flip-chip assembly by having an embedding section around a mesa section, and that has an improved emission lifetime, as well as a photoelectric converter and an optical information processing unit each having such a semiconductor laser device. The semiconductor laser device includes: a mesa section including an active layer, and having a first electrode on a top surface; an embedding section covering the mesa section, and having a first connection aperture that reaches the first electrode; and a first wiring provided on the embedding section overlaying the first connection aperture, the first wiring being electrically connected to the first electrode through the first connection aperture. |
| US09577403B2 |
Multi-wavelength distributed raman amplification set-up
Techniques are presented herein to set power levels for multiple Raman pump wavelengths in a distributed Raman amplification configuration. A first receive power measurement is obtained at a second node with a controlled optical source at a first node turned on and with a plurality of Raman pump lasers at different wavelengths at the second node turned off. A second receive power measurement is obtained at the second node with the controlled optical source at the first node turned on and the plurality of Raman pump lasers turned on to respective reference power levels to inject optical Raman pump power at a corresponding plurality of wavelengths into the optical fiber span. Based on a target Raman gain and a target Raman gain tilt, respective ratios of a total power are obtained, each ratio to be used for a corresponding one of the plurality of Raman pump lasers. |
| US09577402B2 |
Variable-wavelength light source
A variable-wavelength light source is provided with a first laser medium, a first optical resonator constituted of a total reflection mirror and a half-mirror, a second laser medium, a second optical resonator constituted of a total reflection mirror and the half-mirror, a first filter having a pair of first mirrors configured to cause first light and second light to be transmitted and reflected selectively, a second filter having a pair of second mirrors configured to cause the first light and the second light to be transmitted and reflected selectively, a first drive mechanism configured to operate the first mirror and the second mirror in conjunction with each other, and a second drive mechanism configured to operate the second mirror. |
| US09577401B2 |
Systems and methods of achieving high brightness infrared fiber parametric amplifiers and light sources
Fiber optic amplification in a spectrum of infrared electromagnetic radiation is achieved by creating a chalcogenide photonic crystal fiber (PCF) structure having a radially varying pitch. A chalcogenide PCF system can be tuned during fabrication of the chalcogenide PCF structure, by controlling, the size of the core, the size of the cladding, and the hole size to pitch ratio of the chalcogenide PCF structure and tuned during exercising of the chalcogenide PCF system with pump laser and signal waves, by changing the wavelength of either the pump laser wave or the signal wave, maximization of nonlinear conversion of the chalcogenide PCF, efficient parametric conversion with low peak power pulses of continuous wave laser sources, and minimization of power penalties and minimization of the need for amplification and regeneration of pulse transmissions over the length of the fiber, based on a dispersion factor. |
| US09577400B2 |
Frequency shifting optical swept lightsource system and apparatus to which the system is applied
Provided is a frequency shifting optical swept light source system. The system includes a light source that emits light; an amplifier that amplifies the light output from the light source; an optical converter that shifts a frequency of the amplified light and compresses a spectrum of the amplified light; and a controller that controls a current signal applied to the light source such that a repetition rate of the light output from the light source is adjusted, so that an intensity of the amplified light is adjusted, to thereby adjust a position of the compressed spectrum with respect to a predetermined frequency band. |
| US09577399B2 |
Marking apparatus with a plurality of lasers and individually adjustable sets of deflection means
The invention relates to a marking apparatus for marking an object with laser light, comprising a plurality of lasers and a control unit for individually activating each of the lasers to emit a laser beam (90) according to a sign to be marked. A set of deflection means (30) for rearranging the laser beams (90) into a desired array of laser beams (90) is provided, the set of deflection means (30) comprises at least two deflection means (33a-i, 34a-i) per laser beam (90), in particular at least two mapping mirrors (33a-i, 34a-i) or at least one optical waveguide and one lens per laser beam (90a-i), and each deflection means (33a-i, 34a-i) is individually adjustable in its deflection direction and/or individually shiftable. |
| US09577395B2 |
Universal socket device
A universal socket device comprises a plurality of sockets arranged in one interface panel, and transformer circuits disposed inside a body. The interface panel is arranged on top of the body, while a male connector is arranged on the lower side of the body adapted to connect to the output power. The male connector includes a plug with 8-shaped cross sections, arranged along the outside wall of the body in parallel. The base of the plug is disposed on a bulge protruding from the body, and a plane is arranged on the outer surface of the bulge, where a groove extends following the same direction of the plug. Due to the male connector structure disposed on the lower side of the body, the center of gravity of the socket device is stabilized, and the socket device is easy to plug and use. |
| US09577394B2 |
RJ-45 communications plug having a printed circuit board within a housing and a lossy dielectric material inbetween
Patch cords include a communications cable that has a first conductor and a second conductor that form a first differential pair, and a third conductor and a fourth conductor that form a second differential pair and a plug that is attached to the communications cable. The plug includes a housing that receives the communications cable, first through fourth plug contacts that are within the housing, and a printed circuit board. The printed circuit board includes first through fourth conductive paths that connect the respective first through fourth conductors to respective ones of the first through fourth plug contacts. The plug further includes a first conductive shield that extends above a top surface of the printed circuit board that is disposed between the first differential pair and the second differential pair. |
| US09577386B2 |
Pin cadence for high-speed connectors
A connector includes pins having a pinout including a functional designation cadence. The functional designation cadence includes a first ground pin, a first signal pin, a no-connect pin, a second signal pin, and a second ground pin, where the first signal pin is positioned between the first ground pin and the no-connect pin, the no-connect pin is positioned between the first and second signal pins, and the second signal pin is positioned between the no-connect pin and the second ground pin. Alternately, the functional designation cadence includes a first ground pin, a first signal pin, a third ground pin, a second signal pin, and a second ground pin, where the first signal pin is positioned between the first and third ground pins, the third ground pin is positioned between the first and second signal pins, and the second signal pin is positioned between the third and second ground pins. |
| US09577380B1 |
Connector
A connector includes a plug and a receptacle. The plug includes a first main body which includes a groove and two slot walls with a number of first terminals. The receptacle includes a support, a second main body and an insert. The second main body includes a rail matching with the groove of the plug. The rail includes two flanks and each flank includes a number of second terminals corresponding to the first terminals. When the first main body slides into the second main body via the rail and holds the support, each first terminal on the slot wall of the first main body connects to one second terminal on each flank of the rail to make the plug electrically connect to the receptacle. |
| US09577379B2 |
Connector
The Present Disclosure is a connector comprising a connector main body, terminals mounted in the connector main body, and a reinforcing main fitting mounted in the connector main body. The connector main body includes a mating guide portion formed on both longitudinal ends, the mating guide portion mating with an opposing mating guide portion formed on both longitudinal ends of the opposing connector main body of an opposing connector. The reinforcing metal fitting includes a pair of left and right contact arm portions, and a pair of left and right side guide portions disposed in the mating guide portions. The side guide portions guide the opposing mating guide portions, and the contact arm portions establishing contact with the opposing reinforcing metal fitting mounted in the opposing connector main body when the connector main body is mated with the opposing connector main body. |
| US09577378B2 |
Connector having a plurality of first housings mating with a second housing actuated by a lever
The connector of the present disclosure is provided with a lever capable of rotating between an unlocked position in which the lever reclines with respect to the insertion direction of a second housing and a locked position in which the lever is upright with respect to the insertion direction of the second housing. The lever is provided with a protruding portion which comes into contact with the edge of an opening in the adjacent first housing before insertion into the second housing has been completed and which causes the lever to approach the locked position. |
| US09577376B1 |
Christmas tree electric connecting trunk device
A Christmas tree electric connecting trunk device has at least one first tube assembly and at least one second tube assembly. Each first tube assembly has a first connecting tube, a first rotating alignment element, a guiding element and a male connector. The at least one second tube assembly corresponds to and is connected detachably to the at least one first tube assembly. Each of the at least one second tube assembly has a second connecting tube, a second rotating alignment element and a female connector. A resilient pressing portion is formed between the male and female connectors to perform tight engagement therebetween. |
| US09577371B2 |
Connector with retaining portion having reinforcing portion
Provided is a connector having a locking mechanism that can ensure both the joining strength between a housing and a locking portion and the locking strength and that can cope with pitch narrowing and miniaturization. A plug connector comprises a plug-side housing, plug-side contacts provided to the plug-side housing and adapted to be electrically connected to a receptacle connector, and plug-side locking portions provided to the plug-side housing and adapted to maintain a connected state of the plug connector and the receptacle connector. The plug-side locking portions each comprise a locking plate having a flat plate-like shape and provided so that the normal direction of the plane of the flat plate is oriented in a locking direction with the receptacle connector, and retaining portions provided to the locking plate and formed so as to be integrated with the plug-side housing. |
| US09577369B2 |
Connector
A connector (F) includes a first terminal accommodating chamber (11), a rear end part of which defines a seal tower (12) projecting from a rear (10R) of a housing (10). A rubber plug (16) is fit on a first wire (15) and liquid-tightly contacts an inner surface of the first terminal accommodating chamber (11). Second wires (20) are drawn out from second terminal accommodating chambers (17). A one-piece rubber plug (30) covers the rear (10R) of the housing (10) and the second wires (20) and the seal tower (12) penetrate the one-piece rubber plug (30). Lock towers (21) project back from the rear (10R) of the housing (10) and penetrate the one-piece rubber plug (30). A rear holder (40) covers the one-piece rubber plug (30) from behind. Receiving portions (46) are formed in the rear holder (40) and lock to locking portions (23) of the lock towers (21). |
| US09577363B2 |
Electrical plug device for connection of a magnet coil and/or of a sensor element
An electrical plug device is configured for the connection of a magnet coil and/or of a sensor element to a contact partner of a counterpiece cooperating with the electrical plug device. The electrical plug device has at least one first portion, which comprises the magnet coil and/or the sensor element and at least one electrical contact element. The magnet coil and/or the sensor element and the at least one electrical contact element of the first portion are non-detachably interconnected. The electrical plug device also has a second portion, which is produced separately from the first portion and is type-specific in relation to the counterpiece. The second portion is joined to the first portion and surrounds the electrical contact element, at least in part. |
| US09577361B2 |
Pluggable LGA socket for high density interconnects
In some embodiments, an apparatus includes a land grid array connector positioned above an electrical package. The apparatus also includes a channel housing positioned above the land grid array. The apparatus includes an electrical-to-optical transceiver positioned in an opening of a socket of the channel housing, wherein a tapered opening is formed above the electrical-to-optical transceiver in the channel housing after the electrical-to-optical transceiver is positioned in the opening of the socket of the channel housing. A gap of the tapered opening decreases progressively starting from the opening of the socket. A conductive wedge positioned in the gap of the tapered opening. |
| US09577360B2 |
Electrical connector having holding pieces with a notch for holding a circuit board
An electrical connector has a base, a terminal set, a pair of holding pieces, an insulating body and a shell. The base has two holding piece slots respectively formed in two sides of the bottom of base. The pair of holding pieces is assembled into the holding piece slots respectively. Each holding piece is C-shaped and has a notch formed in a rear end of the holding piece and serving to hold a PCB board. A front end of each holding piece is assembled into the base. Given the pair of holding pieces with an assemblable structure, the size of the holding pieces can be tailored to the requirement of customers. The shell is formed by a two-stage of drawing process to enhance overall strength of the shell to facilitate the plating process afterwards. |
| US09577348B2 |
Combination antenna
Disclosed is an antenna apparatus including a radio frequency (RF) antenna, a magnetic induction (MI) antenna disposed within the RF antenna, and electronic circuitry to receive and process audio received from at least one of the RF antenna and MI antenna. |
| US09577343B2 |
Random perturbation-based beamforming method and apparatus for use in mobile communication system
A method and apparatus configures a beamforming coefficient based on the signal strength information without collecting channel information by adjusting the phase of the antennas through random perturbation. An antenna control method of a base station in a wireless communication system using a beamforming technique includes measuring nth received signal strength at nth phase of at least one receive antenna, measuring (n+1)th received signal strength at (n+1)th phase shifted randomly from the nth phase in one of forward and backward directions, and configuring a beamforming coefficient with the phase at which the received signal strength is greatest through comparison of received signal strengths. The random perturbation-based beamforming method and apparatus of the present disclosure is capable of configuring the beamforming coefficient appropriate for the normal cellular environment using a plurality analog array antenna without channel estimation overhead. |
| US09577342B2 |
Planar dielectric waveguide with metal grid for antenna applications
A waveguide includes a dielectric substrate having first and second opposed surfaces defining a longitudinal wave propagation path therebetween; and a conductive grid on the first surface of the substrate and comprising a plurality of substantially parallel metal strips, each defining an axis. The grid renders the first surface of the substrate opaque to a longitudinal electromagnetic wave propagating along the longitudinal wave propagation path and polarized in a direction substantially parallel to the axes of the strips. The grid allows the first surface of the substrate to be transparent to a transverse electromagnetic wave having a transverse propagation path that intersects the first and second surfaces of the substrate and having a polarization in a direction substantially normal to the plurality of metal strips. A diffraction grating on the second surface allows the waveguide to function as an antenna element that may be employed in a beam-steering antenna system. |
| US09577341B2 |
Microcellular communications antenna and associated methods
A radio frequency (RF) communications system includes a local RF communications device and an RF antenna including a conical RF launch structure coupled to the local RF communications device, and an elongate electrical conductor having a proximal end coupled to the conical RF launch structure and a distal end spaced apart from the conical RF launch structure to define an elongate RF coverage pattern. The elongate conductor may be a coaxial cable. At least one remote RF communications device, within the elongate RF coverage pattern, wirelessly communicates with the local RF communications device. |
| US09577340B2 |
Waveguide adapter plate to facilitate accurate alignment of sectioned waveguide channel in microwave antenna assembly
An antenna apparatus includes a waveguide adapter plate for mounting an antenna flange and an RF system-in-package or other IC package. The waveguide adapter plate comprises a first surface and an opposing second surface and a waveguide flange interface. The waveguide flange interface comprises a waveguide channel section extending between the first surface and the second surface and a set of flange mounting holes extending from the first surface to the second surface. The waveguide adapter plate further includes a plurality of substrate alignment pins extending substantially perpendicular from the second surface. |
| US09577338B2 |
Antenna for achieving effects of MIMO antenna
An antenna disposed on a substrate includes a radiating portion, a first coupling and feeding portion, and a second coupling and feeding portion. A length of the radiating portion is substantially equal to a half wavelength of electromagnetic signals radiated by the radiating portion. Each coupling and feeding portion includes a feeding part and a coupling part. The feeding part feeds the electromagnetic signals to the radiating portion via the coupling part so as to achieve effects of a multiple-input multiple-output (MIMO) antenna. A gap is defined between the coupling part and the radiating portion to improve an isolation of the MIMO antenna. |
| US09577337B2 |
Dual-polarized antenna for mobile communication base station
Disclosed is a dual polarization-based small antenna for a mobile communication base station. The dual-polarized antenna includes a substrate, a first feed attached to one surface of the substrate, a second feed spaced apart from the first feed and attached to the one surface of the substrate, a radiator located above the first feed and the second feed, and a spiral resonator located between the first feed and the second feed. The dual-polarized antenna effectively provides a broad bandwidth and a high isolation characteristic while having a reduced size, and the spiral resonator allows the isolation characteristic at a certain narrow band range to be effectively enhanced by adjusting of the position, size, and shape of the spiral resonator without affecting the operating frequency of the dual-polarized antenna. |
| US09577331B2 |
Wireless communication device
A wireless communication device includes a metal frame, a mechanical part on which a ground is formed for providing grounding, and at least one antenna, wherein each one of the at least one antenna includes a radiator, a feed terminal electrically connected to the radiator, disposed adjacent to the metal frame and for feeding a radio-frequency signal, a first ground terminal disposed at a first side of the feed terminal for electrically connecting the metal frame with the ground of the mechanical part, and a second ground terminal disposed at a second side of the feed terminal for electrically connecting the metal frame with the ground of the mechanical part, wherein an area enclosed by the metal frame, the mechanical part and the first and second ground terminals forms a first slot. |
| US09577330B2 |
Modified Vivaldi antenna with dipole excitation mode
Systems and techniques are provided for a modified Vivaldi antenna with dipole excitation mode. An antenna may include a ground plane and a modified Vivaldi antenna. The modified Vivaldi antenna may include a straight arm with a first end and a second end, the first end being attached to the ground plane, a tapered section, and a balun placed partially between the straight arm and the tapered section. The modified Vivaldi antenna may be placed such that there is a gap between the tapered section and the ground plane. A feed element may be placed such that the feed element crosses the gap between the tapered section of the modified Vivaldi antenna and the ground plane. |
| US09577325B2 |
Compact radiating array for wireless handheld or portable devices
A radiating system transmits and receives in first and second frequency regions and includes a radiating structure comprising first and second radiation boosters having maximum sizes smaller than 1/30 times the free-space wavelength of the lowest frequencies of the first and second frequency regions, respectively. The radiating system further includes a radiofrequency system having first and second ports respectively connected to first and second internal ports of the radiating structure, and a third port connected to an external port of the radiating system. The radiofrequency system includes: first and second reactance cancellation element providing impedances having an imaginary part close to zero for respective frequencies in the first and second frequency regions and a delay element interconnecting the first and second reactance cancellation elements to provide a difference in phase therebetween to produce first and second impedance loops in the first and second frequency region, respectively, at the external port. |
| US09577322B2 |
Wireless interconnect for an integrated circuit
A wireless interconnect for an integrated circuit and a method of making the wireless interconnect. The interconnect includes a first antenna and a second antenna arranged over a plurality of electrically conductive interconnects. The interconnect also includes a propagation layer. The first and second antennae are arranged in between the propagation layer and the electrically conductive interconnects. |
| US09577321B2 |
Dualband antenna with isolation enhanced and method thereof
An antenna set includes a first antenna, a second antenna, and a neutralized line. Each of the first antenna and the second antenna has a low frequency resonant path and a high frequency resonant path. The neutralized line is couple to the low frequency resonant path of the first antenna and the low frequency resonant path of the second antenna. The low frequency resonant path of the first antenna and the low frequency resonant path of the second antenna correspond to a first frequency band, the high frequency resonant path of the first antenna and the high frequency resonant path of the second antenna correspond to a second frequency band, and the two low frequency resonant paths do not overlap the two high frequency resonant paths. |
| US09577318B2 |
Electronic device with fingerprint sensor and tunable hybrid antenna
An electronic device may have wireless circuitry and components such as sensors. The electronic device may have a metal housing having first and second planar rear wall portions separated by a gap. Conductive structures may bridge the gap to electrically couple the first and second rear wall portions. The wireless circuitry may include a hybrid slot inverted-F antenna. The antenna may have an inverted-F antenna resonating element formed from peripheral housing structures that are separated from the second rear wall portion by an opening. The opening may form a C-shaped slot antenna resonating element for the antenna. The sensors may include a fingerprint sensor. The fingerprint sensor may be coupled to a button member in a button. The fingerprint sensor and other portions of the button may overlap the second planar rear wall portion to minimize interference with antenna operation. |
| US09577316B2 |
Antenna with a combined bandpass/bandstop filter network
An antenna with a combined bandpass/bandstop filter network is provided. The antenna includes: a first radiating arm connectable to an antenna feed, the first radiating arm configured to resonate at a first frequency; a second radiating arm, the second radiating arm and the first radiating arm, when electrically connected, configured to resonate at a second frequency lower than the first frequency; and, a filter network comprising a bandstop filter and a bandpass filter, the filter network filtering an electrical connection between the first radiating arm and the second radiating arm, the filter network configured to: electrically isolate the first radiating arm from the second radiating arm at the first frequency, and electrically connect the first radiating arm and the second radiating arm at the second frequency. |
| US09577315B2 |
Antennas mounted under dielectric plates
Electronic devices are provided that contain wireless communications circuitry. The wireless communications circuitry may include radio-frequency transceiver circuitry and antenna structures. The antenna structures may include antennas such as inverted-F antennas that contain antenna resonating elements and antenna ground elements. Antenna resonating elements may be formed from patterned conductive traces on substrates such as flex circuit substrates. Antenna ground elements may be formed from conductive device structures such as metal housing walls. Support and biasing structures such as dielectric support members and layer of foam may be used to support and bias antenna resonating elements against planar device structures. The planar device structures against which the antenna resonating elements are biased may be planar dielectric members such as transparent layers of display cover glass or other planar structures. Adhesive may be interposed between the planar structures and the antenna resonating elements. |
| US09577314B2 |
Hybrid on-chip and package antenna
Antenna devices, antenna systems and methods of their fabrication are disclosed. One such antenna device includes a semiconductor chip and a chip package. The semiconductor chip includes at least one antenna that is integrated into a dielectric layer of the semiconductor chip and is configured to transmit electromagnetic waves. In addition, the chip package includes at least one ground plane, where the semiconductor chip is mounted on the chip package such that the ground plane(s) is disposed at a predetermined distance from the antenna to implement a reflection of at least a portion of the electromagnetic waves. |
| US09577310B2 |
Semiconductor package and semiconductor package mounting structure
A semiconductor package mounting structure includes a substrate (200) and a semiconductor package (100). The substrate (200) includes an opening (210) connected to a cavity of a waveguide (310). The semiconductor package (100) is mounted on the substrate (200). The semiconductor package (100) includes a semiconductor device (110) and a probe (152) connected to the semiconductor device (110). The opening (210) includes a part that overlaps the probe (152) and a part that does not overlap the semiconductor package (100). |
| US09577301B2 |
Dielectric phase-shift module and phase-shift unit thereof, feeding network and antenna
A feeding network is realized by dielectric phase shifting module. The module includes a dielectric device into which interlayer space is defined, a first conductor and a second conductor disposed side by side into the interlayer space and a third conductor located outside of the interlayer space and connected, at different locations, to one end, located at a same side, of each of the first and second conductors. Another end of the first conductor is defined as an input end, while another end of the second conductor and any end of the third conductor are all defined as output ends. The dielectric device is configured to slide along a longitudinal direction of the first and second conductors under external force so as to change phase of signals fed in from the input end and fed out from the output ends. Two dielectric phase-shift modules constitute a phase-shift unit thereof. |
| US09577300B2 |
Li-air hybrid battery and method for manufacturing the same
The present invention provides a lithium-air hybrid battery and a method for manufacturing the same, which has a structure in which a liquid electrolyte electrode and a solid electrolyte electrode are stacked on both sides of an ion conductive glass ceramic. That is, disclosed is a lithium-air hybrid battery and a method for manufacturing the same, which has a structure in which a lithium metal negative electrode includes a liquid electrolyte and a porous air positive electrode comprising a carbon, a catalyst, a binder and a solid electrolyte are separately stacked on both sides of an impermeable ion conductive glass ceramic, and the liquid electrolyte is present only in the lithium metal negative electrode. |
| US09577291B2 |
Coordinated control of electric vehicle charging and HVAC
A system and method include receiving a temperature signal from a temperature sensor, controlling operation of an air conditioner condenser, and controlling an electric vehicle charger to operate to charge an electric vehicle battery only when the air conditioner condenser is not running. |
| US09577285B2 |
Solid electrolyte, method for preparing same, and rechargeable lithium battery comprising solid electrolyte and solid electrolyte particles
Disclosed is a solid electrolyte including particles comprising Li(1+x)Ti(2-x)Alx(PO4)3 (0≦x≦1) having a true density of about 2.20 to about 2.50 g/cm3. |
| US09577284B2 |
Fuel cell stack enclosure
A fuel cell device including a fuel cell stack with a flexible enclosure. |
| US09577280B2 |
Biomimetic artificial membrane device
The invention relates to a device comprising a casing and a biomimetic artificial membrane arranged within the casing to form two distinct chambers, wherein each chamber is provided for enclosing a liquid of a given composition, and wherein the biomimetic artificial membrane comprises a semi-permeable membrane for supporting a lipid membrane, the lipid membrane comprising a plurality of lipid molecules arranged in a layer and including at least a transport protein, the transport protein being adapted for transport of ions and/or molecules of the liquids between the two chambers. |
| US09577275B2 |
Power generator with high pressure hydrogen generator
A power generator includes a hydrogen producing fuel in a first high pressure chamber. A fuel cell having a proton exchange membrane is disposed in a second low pressure chamber. A water absorbing material provides water vapor to the hydrogen producing fuel, and a plurality of valves control hydrogen provided to the fuel cell from the first high pressure chamber, and exposure of the water absorbing material to ambient and the high pressure chamber. |
| US09577272B2 |
Fuel cell with impurity filtering
A system has a fuel cell with an anode, a membrane, and a cathode. A source of fuel passes along the anode and a source of an oxygen containing gas passes along the cathode. A downstream line captures fuel downstream of the anode and a separator separates impurities from the fuel on the downstream line, and recirculates fuel downstream of the separator for passage across the anode. A method of mixing air with an oxygen concentrated gas is also disclosed. |
| US09577270B2 |
Plate processing
A method of processing a linked series of metallic plates, in which each plate (9) is connected to an adjacent plate along adjoining edges (8), the method comprising: providing the series of plates as a first fan-folded stack of plates (1); drawing the plates in sequence from the stack; applying a surface treatment to one or more of the plates; and stacking the plates in reverse order to form a second fan-folded stack of plates (5). |
| US09577267B2 |
Electrode structure and method for making same
Electrode structures and methods for making the same are generally described. In certain embodiments, the electrode structures can include a plurality of particles, wherein the particles comprise indentations relative to their convex hulls. As the particles are moved proximate to or in contact with one another, the indentations of the particles can define pores between the particles. In addition, when particles comprising indentations relative to their convex hulls are moved relative to each other, the presence of the indentations can ensure that complete contact does not result between the particles (i.e., that there remains some space between the particles) and that void volume is maintained within the bulk of the assembly. Accordingly, electrodes comprising particles with indentations relative to their convex hulls can be configured to withstand the application of a force to the electrode while substantially maintaining electrode void volume (and, therefore, performance). Particles having indentations relative to their convex hulls also occupy a relatively small volume, compared to spheres or other particles including boundaries that fill substantially all of their convex hulls, allowing one to introduce a desired amount of void volume while reducing the percentage of volume within the electrode occupied by particulate material. |
| US09577259B2 |
Cathode mixture for use in a biocompatible battery
Methods and apparatus to form biocompatible energization elements are described. In some examples, the methods and apparatus to form the biocompatible energization elements involve forming cavities comprising active cathode chemistry. The active elements of the cathode and anode are sealed with a biocompatible material. In some examples, a field of use for the methods and apparatus may include any biocompatible device or product that requires energization elements. |
| US09577256B2 |
Electrode mix, electrode mix paste, electrode, and non-aqueous electrolyte secondary battery
An electrode mixture containing a particulate electrode active material, an electrically conductive material and a binder, wherein the electrode active material comprises a particulate core material and a coating material adhering in the form of particles or a layer to the surface of the core material, the core material is obtained by a method comprising a step of coprecipitating two or more transition metal elements, and the binder comprises a water-soluble macromolecule or a water-dispersible macromolecule or both. An electrode comprising the electrode mixture and an electrode collector. An electrode mixture paste containing the electrode mixture and water. A nonaqueous electrolyte secondary battery comprising a positive electrode, a negative electrode and an electrolyte, wherein the positive electrode is the electrode. |
| US09577252B2 |
Negative active material and negative electrode and lithium battery containing the material, and method of manufacturing the same
In an aspect, a negative active material, a negative electrode and a lithium battery including the negative active material, and a method of manufacturing the negative active material is provided. The negative active material includes a silicon-based active material substrate; a metal oxide nanoparticle disposed on a surface of the silicon-based active material substrate. An initial irreversible capacity of the lithium battery may be decreased and lifespan characteristics may be improved by using the negative active material. |
| US09577251B2 |
Active electrode materials and methods for making the same
In an example of a method for making a silicon-based active electrode material, a silicon active material precursor is introduced into a carrier gas. Another active material precursor is introduced into the carrier gas prior to, simultaneously with or subsequent to the silicon active material precursor. The other active material precursor is selected from a tin active material precursor, an aluminum active material precursor, a graphene active material precursor, and combinations thereof. The carrier gas containing the precursors is exposed to plasma vaporization, and a material is formed. The material includes i) an alloy of phase separated silicon and tin and/or aluminum, or ii) a graphene layer having silicon nanoparticles and tin nanoparticles, aluminum nanoparticles, or combinations of tin and aluminum nanoparticles deposited on a surface thereof, or iii) a graphene layer having an alloy of phase separated silicon and tin, aluminum, or tin and aluminum deposited on a surface thereof. |
| US09577250B2 |
Thick electrodes including nanoparticles having electroactive materials and methods of making same
Electrodes having nanostructure and/or utilizing nanoparticles of active materials and having high mass loadings of the active materials can be made to be physically robust and free of cracks and pinholes. The electrodes include nanoparticles having electroactive material, which nanoparticles are aggregated with carbon into larger secondary particles. The secondary particles can be bound with a binder to form the electrode. |
| US09577248B2 |
Sulfur-carbon composite for lithium-sulfur battery, the method for preparing said composite, and the electrode material and lithium-sulfur battery comprising said composite
The present invention relates to a sulfur-carbon composite, comprising a pyrolysis microporous carbon sphere (PMCS) substrate and sulfur loaded into said pyrolysis microporous carbon sphere (PMCS) substrate; as well as a method for preparing said sulfur-carbon composite, an electrode material and a lithium-sulfur battery comprising said sulfur-carbon composite. |
| US09577245B2 |
Non-aqueous electrolyte secondary cell containing negative active material including scaly graphite particles and graphite particles coated with amorphous carbon particles and amorphous carbon layer and method of manufacturing the same
Disclosed is a non-aqueous electrolyte secondary cell excellent in capacity retention rate and I-V characteristics after repeated cycles. The secondary cell contains a negative electrode active material containing scaly graphite particles and coated graphite particles. The coated graphite particles contain graphite particles and a coating layer coating the surfaces of the graphite particles. The coating layer contains amorphous carbon particles and an amorphous carbon layer. It is preferable that the negative electrode active material contain 1 to 6% by mass of the scaly graphite particles and that the graphite particles, the amorphous carbon particles, and the amorphous carbon layer be in a mass ratio of 100:α:β where 1≦α≦10, 1≦β≦10, and α≦1.34β. |
| US09577244B2 |
Substituted lithium-manganese metal phosphate
A substituted lithium-manganese metal phosphate of formula LiFexMn1-x-yMyPO4 in which M is a bivalent metal from the group Sn, Pb, Zn, Ca, Sr, Ba, Co, Ti and Cd and wherein: x<1, y<0.3 and x+y<1, a process for producing it as well as its use as cathode material in a secondary lithium-ion battery. |
| US09577239B2 |
Secondary battery having an electrode assembly
A secondary battery including an electrode assembly. The electrode assembly includes a first electrode including a plurality of first electrode tabs extending to a side of the first electrode, a second electrode including a plurality of second electrode tabs extending to a side of the second electrode, and a separator between the first electrode and the second electrode and insulating the first electrode and the second electrode from one another. The electrode assembly is in a wound jelly roll shape. The plurality of first electrode tabs are in one of four quadrants formed by a long axis and a short axis of the wound electrode assembly. The plurality of second electrode tabs are in a different one of the four quadrants. |
| US09577238B2 |
Flat-shaped battery
Disclosed is a flat-shaped battery including: a power generation element including a positive electrode, a negative electrode, a separator, and an electrolyte; a cylindrical case formed of a conductor, housing the power generation element, and having a circular bottom and a circular opening; a sealing plate formed of a conductor and closing the opening; an insulating member interposed between the case and the sealing plate; and a plate-shaped current collector disposed between the case and the positive electrode. The current collector is welded to the case and is in contact with the positive electrode. A welding point where the current collector is welded to the bottom is set so as to allow contact between the positive electrode and a center portion of the current collector to be maintained when the case is deformed such that a center portion of the bottom is displaced outward of the case. |
| US09577237B2 |
Inorganic oxide powder, inorganic oxide-containing slurry, lithium ion secondary battery using said slurry, and production method therefor
An object of the present invention is to provide an inorganic oxide powder suitable for forming an inorganic oxide porous membrane, which is superior in lithium ion conductivity and has insulation performance, on at least one surface of a positive electrode, a negative electrode and a separator which constitute a lithium ion secondary battery. The present invention relates to an inorganic oxide powder for use in forming an inorganic oxide porous membrane having insulation performance on at least one surface of a positive electrode, a negative electrode and a separator which constitute a lithium ion secondary battery, wherein the powder has 1) an oxide purity of 90% by weight or higher; 2) an average particle diameter of 1 μm or less; and 3) an average three-dimensional particle unevenness of 3.0 or higher. |
| US09577235B2 |
High temperature melt integrity battery separators via spinning
A method for preparing a high temperature melt integrity separator, the method comprising spinning a polymer by one or more of a mechanical spinning process and an electro-spinning process to produce fine fibers. |
| US09577232B2 |
Power storage device
The power storage device comprises a plural cell, an exhaust passage and a sealing plate. The plural cells is aligned in a first direction, each of the cells includes a gas discharging valve for discharging a gas generated in the cell, each of the gas discharging valves is provided on a first side in a second direction of the cell, and the second direction is orthogonal to the first direction. The exhaust passage is configured to discharge the gas discharged from each of the gas discharging valves, extends in the first direction, and has an opening at a first end in the first direction. The sealing plate is provided at a second end of the exhaust passage in the first direction, includes plural recesses on a surface on the exhaust passage side of the sealing plate, and made of a resin. |
| US09577228B2 |
Battery packs for electric tools
A battery pack includes a battery side terminal electrically connectible with a device side terminal of a device body that may be a tool body of an electric tool or a charger body of a charger. The battery side terminal includes a first contact portion and a second contact portion. The first contact portion configured to form an electric contact through contact with a first side surface of the device side terminal. The second contact portion configured to form an electric contact through contact with a second side surface opposite to the first side surface of the device side terminal. The first contact portion configured to contact the first side surface in a first contact range having a first length. The second contact portion configured to contact the second side surface in a second contact range having a second length that may be different from the first length. |
| US09577224B2 |
Organic light emitting device
Provided are an organic light emitting device (OLED) and lighting. The illustrative OLED may minimize light absorption of a reflective electrode layer and evanescent coupling by surface plasmon, and exhibit excellent emitting efficiency. |
| US09577218B2 |
Light emitting device and method for manufacturing the same
When attaching a substrate with an EL element formed thereon and a transparent sealing substrate, the periphery of a pixel portion is surrounded with a first sealing agent that maintains a gap between the two pieces of substrates, an entire surface of the pixel portion is covered with a second transparent sealing agent so that the two pieces of substrate is fixed with the first sealing agent and the second sealing agent. Consequently, the EL element can be encapsulated by curing the first sealing agent and the second sealing agent without enclosing a drying agent and doing damage to the EL element due to UV irradiation even when a sealing device only having a function of UV irradiation is used. |
| US09577217B2 |
Organic electroluminescent element
The present invention provides an organic electroluminescent element containing: a first gas barrier layer; an intermediate layer; a second gas barrier layer; a third gas barrier layer; a first electrode; an organic functional layer; and a second electrode, in that order, wherein the intermediate layer contains a resin and has a thickness of 10 μm to 250 μm; the second gas barrier layer contains silicon, carbon and oxygen, wherein a composition of silicon, carbon and oxygen contained in the second gas barrier layer is continuously changed in a thickness direction of the second gas barrier layer, and distribution curves of silicon, carbon and oxygen each have an extremum point; and the third gas barrier layer is a polysilazane reforming layer. |
| US09577216B2 |
OLED display device, non-contact IC card and flexible display device
The present disclosure relates to the field of organic electroluminescence and provides an OLED display device, a non-contact IC card and a flexible display device. The OLED display device includes a substrate, an encapsulation structure arranged above the substrate, and an OLED arranged between the substrate and the encapsulation structure. A region where an integrated circuit of the display device is bonded is arranged between the substrate and the OLED. |
| US09577214B2 |
Adhesive film and method of encapsulating organic electronic device
Provided are an adhesive film, an encapsulated product of an organic electronic device using the same, and a method of encapsulating an organic electronic device. Particularly, the adhesive film encapsulating the organic electronic device to cover an entire surface of the organic electronic device includes an adhesive layer including a curable resin and a moisture adsorbent. The adhesive layer has a viscosity in a temperature range of 30 to 130° C. of 101 to 106 Pa·s and a viscosity at room temperature of 106 Pa·s or more in an uncured state, and when the adhesive layer has a multilayered structure, a difference in melting viscosity between layers is less than 30 Pa·s. In addition, the method of encapsulating an organic electronic device using the adhesive film is provided. |
| US09577211B2 |
Organic electronic element and method for manufacturing organic electronic element
Provided are an organic electronic element equipped with a sealing layer having excellent gas barrier properties, transparency and the like, and a method for efficiently manufacturing such an organic electronic element. Disclosed are an organic electronic element including, on a substrate, a first electrode and a second electrode facing each other, with at least one organic functional layer being interposed therebetween, and a method for manufacturing such an organic electronic element, characterized in that a sealing layer is directly provided along the top surface and the lateral surface of the organic electronic element, and the sealing layer is obtained by implanting plasma ions into a coating film containing a silicon compound as a main component. |
| US09577206B2 |
Organic electroluminescence element and lighting device using same
The present disclosure relates to an organic electroluminescence element including: a substrate having a light transmissive property; a light diffusion layer; a light transmissive electrode; a light reflective electrode; and multiple light emitting layers spaced from each other. With regard to the m-th light emitting layer being the m-th closest light emitting layer to the light reflective electrode, relations defined by following expressions (2) and (3) are satisfied. In the following expressions, λm represents the weighted average emission wavelength, Ø(λm) represents the phase shift, nm(λm) represents the average refractive index of a medium filling a space between the light reflective electrode and the m-th light emitting layer, and dm represents the distance from the light reflective electrode to the m-th light emitting layer. l is an integer equal to or more than 0. [ FORMULA 1 ] ϕ ( λ m ) × λ m 4 π + l + 0.1 2 λ m ≤ n m ( λ m ) × d m ≤ ϕ ( λ m ) × λ m 4 π + l + 0.6 2 λ m ( 2 ) n m ( λ m ) × d m ≥ 0.6 λ m ( 3 ) |
| US09577204B1 |
Carbon nanotube field-effect transistor with sidewall-protected metal contacts
A field effect transistor includes a substrate and a gate dielectric formed on the substrate. A channel material is formed on the dielectric layer. The channel material includes carbon nanotubes. A patterned resist layer has openings formed therein. Metal contacts are formed on the channel material in the openings in the patterned resist layer and over portions of the patterned resist layer to protect sidewalls of the metal contacts to prevent degradation of the metal contacts. |
| US09577203B2 |
Organic light-emitting diode display
An organic light-emitting diode display is disclosed. In one aspect, the display includes a substrate including a bending area and a non-bending area and a plurality of thin-film transistors (TFTs) formed in the non-bending area. The display also includes a plurality of first pixel electrodes and a plurality of second pixel electrodes formed over the TFTs and electrically connected to the TFTs, the first pixel electrodes formed in the bending area and the second pixel electrodes formed in the non-bending area. |
| US09577202B2 |
Flexible display substrate mother board and method of manufacturing flexible display substrate
A flexible display substrate mother board and a method of manufacturing a flexible display substrate are provided. The method includes: forming a heating pattern layer on a support substrate, wherein the heating pattern layer includes a plurality of regional blocks spaced apart from each other; forming a flexible substrate on the substrate provided with the heating pattern layer, and forming display elements on the flexible substrate; and heating the flexible substrate by utilization of the heating pattern layer, cutting the flexible substrate, stripping the flexible substrate corresponding to the regional block from the support substrate, and forming flexible display substrates. The method can avoid the damage of the display elements on the flexible substrate when the flexible substrate and the support substrate are separated from each other, and avoid uneven separation. |
| US09577195B2 |
Method of manufacturing substrate of organic light-emitting display device
A method of manufacturing a substrate of an organic light-emitting display device, the method including: forming, on a first surface of a transparent substrate, a photothermal conversion layer configured to covert incident light into thermal energy; forming partition walls on the first surface in a first region of the photothermal conversion layer, the partition walls including a photosensitive compound including a resorcinarene, the resorcinarene including a perfluorocarbon group; forming an organic material layer on the first surface in a second region of the photothermal conversion layer, the second region being defined by the partition walls; removing the partition walls; placing a target substrate over the organic material layer; and applying light to a second surface of the transparent substrate, the second surface being opposite the first surface of the transparent substrate. |
| US09577194B2 |
Hole transport compositions and related devices and methods (I)
A composition comprising: at least one compound comprising a hole transporting core, wherein the core is covalently bonded to a first arylamine group and also covalently bonded to a second arylamine group different from the first, and wherein the compound is covalently bonded to at least one intractability group, wherein the intractability group is covalently bonded to the hole transporting core, the first arylamine group, the second arylamine group, or a combination thereof, and wherein the compound has a molecular weight of about 5,000 g/mole or less. Blended mixtures of arylamine compounds, including fluorene core compounds, can provide good film formation and stability when coated onto hole injection layers. Solution processing of OLEDs is a particularly important application. |
| US09577193B2 |
Method of forming thin film and method of manufacturing organic light-emitting display device
A method of forming a thin film, the method including: disposing a resist portion on a substrate, the resist portion including: a first region including a first upper surface; and a second region including a second upper surface, the first upper surface disposed higher than the second upper surface and forming a step; disposing a first protection layer covering the resist portion; exposing the first upper surface; removing the first region; disposing a first thin film on the substrate; disposing a second protection layer covering the first thin film; exposing the second upper surface; removing the second region; disposing a second thin film on the substrate; and removing the first protection layer and the second protection layer. |
| US09577191B2 |
RRAM cell bottom electrode formation
The present disclosure relates to a method of forming a resistive random access memory (RRAM) cell having a reduced leakage current, and an associated apparatus. In some embodiments, the method is performed by forming a bottom electrode over a lower metal interconnect layer using an atomic layer deposition (ALD) process to form at least a top portion of the bottom electrode. A dielectric data storage layer is formed onto the top portion of the bottom electrode in-situ with forming the top portion of the bottom electrode. A top electrode is formed over the dielectric data storage layer, and an upper metal interconnect layer is formed over the top electrode. By forming the top portion of the bottom electrode using an ALD process that is in-situ with the formation of the overlying dielectric data storage layer, leakage current, leakage current distribution and device yield of the RRAM cell are improved. |
| US09577185B1 |
Fluxgate device with low fluxgate noise
An integrated fluxgate device, which includes a magnetic core, an excitation coil, and a sense coil. The magnetic core has a longitudinal edge and a terminal edge. The excitation coil coils around the longitudinal edge of the magnetic core, and the excitation coil has a first number of excitation coil members within a proximity of the terminal edge. The sense coil coils around the longitudinal edge of the magnetic core, and the sense coil has a second number of sense coil members within the proximity of the terminal edge. For reducing fluxgate noise, the second number of sense coil members may be less than the first number of excitation coil members within the proximity of the terminal edge. |
| US09577182B2 |
Magnetoresistance effect element and magnetic memory
A magnetoresistance effect element and a magnetic memory having thermal stability expressed by a thermal stability factor of 70 or more even with a fine junction size. The magnetoresistance effect element includes a first magnetic layer of an invariable magnetization direction forming a reference layer, a second magnetic layer of a variable magnetization direction forming a recording layer, and a first non-magnetic layer disposed between the first and second magnetic layers in a thickness direction of the first and second magnetic layers. At least one of the first and second magnetic layers has the following relationship between D (nm) and t (nm): D<0.9t+13, where D is a junction size corresponding to the length of a longest straight line on an end surface perpendicular to the thickness direction, and t is a layer thickness. The junction size is 30 nm or less. |
| US09577175B1 |
Efficient polarization independent single photon detector
An apparatus includes a base layer; and a superconducting nanowire disposed on the base layer in a continuous meander pattern and including an amorphous metal-metalloid alloy such that the apparatus is configured to detect single photons, and the continuous meander pattern includes: a plurality of parallel line segments; and a plurality of curved segments, wherein adjacent parallel line segments are joined by a curved segment. A method for making an apparatus for detecting single photons includes forming a base layer; forming a superconducting layer on the base layer; patterning the superconducting layer; and forming a continuous meander pattern from the superconducting layer, the continuous meander pattern includes a plurality of parallel line segments; and a plurality of curved segments, wherein adjacent parallel line segments are joined by a curved segment; and forming a dielectric layer on the continuous meander pattern, the dielectric layer including a dielectric material that is substantially transparent to a predetermined photon wavelength, wherein the apparatus is configured to detect single photons. |
| US09577172B2 |
Light emitting die component formed by multilayer structures
The present invention relates to a light emitting die component formed by multilayer structures. The light emitting die component comprises a semiconductor structure (103) comprising: an n-type layer (104), an active region (106) and a p-type layer (108); a p-contact layer (110) arranged to be in electrical contact with said p-type layer (108); an n-contact layer (116) arranged to be in electrical contact with said n-type layer (104); a first dielectric layer (114) arranged to electrically isolate said p-contact layer (110) from said n-contact layer (116); a thermal spreading layer (120) comprising a first and a second region (120a, 120b) being electrically isolated from each other, wherein said first region (120a) forming an anode electrode of said light emitting die component and said second region (120b) forming a cathode electrode of said light emitting die component; a second dielectric layer (118) arranged to electrically isolate said n-contact layer (116) from said first region (120a) or to electrically isolate said p-contact layer (110) from said second region (120b); a third dielectric layer (122) arranged to electrically isolate said first and second regions (120a, 120b); and an interconnect pad (124) enabling interconnection with a submount (126). |
| US09577171B2 |
Light emitting device package having improved heat dissipation efficiency
Disclosed herein is a light emitting device. The light emitting device is provided to include a light emitting structure, a first electrode pad, a second electrode pad and a heat dissipation pad, and a substrate on which the light emitting diode is mounted. The substrate includes a base; an insulation pattern formed on the base; and a conductive pattern disposed on the insulation pattern. The base includes a post and a groove separating the post from the conductive pattern. An upper surface of the post is placed lower than an upper surface of the conductive pattern, the heat dissipation pad contacts the upper surface of the post, and the first electrode pad and the second electrode pad contact the conductive pattern. With this structure, the light emitting device has excellent properties in terms of electrical stability and heat dissipation efficiency. |
| US09577168B2 |
Solid state lighting device with different illumination parameters at different regions of an emitter array
Solid state lighting (SSL) devices and methods of manufacturing such devices. One embodiment of an SSL device comprises a support and an emitter array having a plurality of SSL emitters carried by the support. The emitter array has a central region and a peripheral region outward from the central region. Individual SSL emitters in both the central and the peripheral regions have a primary emission direction along which an intensity of light from the SSL emitters is highest, and the primary emission direction of the SSL emitters in the central region is at least substantially the same direction as the primary emission direction of the SSL emitters in the peripheral region. Additionally, a first coverage area ratio of the SSL emitters in the central region is different than a second coverage area ratio of the SSL emitters in the peripheral region. |
| US09577165B2 |
Light emitting diode chip
A light emitting diode chip includes a semiconductor layer sequence having an active layer that generates electromagnetic radiation, wherein the light emitting diode chip has a radiation exit area at a front side, the light emitting diode chip has a mirror layer at least in regions at a rear side situated opposite the radiation exit area, said mirror layer containing silver, a protective layer is arranged on the mirror layer, and the protective layer comprises a transparent conductive oxide. |
| US09577159B2 |
Production method for light-emitting device
A fluorescent material-containing sealing resin (20) production method of the present invention includes: a kneading step of kneading a powder mixture (24), which has been obtained by mixing a powder of silicone resins (21) and a powder of fluorescent materials (22) together, while melting the powder mixture (24) by heat, so that a kneaded mixture (25) is obtained; and an extruding step of extruding the kneaded mixture (25) in a form of a cord from an output port (37b) of a twin screw extruder (37). |
| US09577156B2 |
Group III nitride semiconductor light-emitting device and production method therefor
The present invention provides a Group III nitride semiconductor light-emitting device in which the production method is simplified while migration of at least one of Ag atoms and Al atoms is suppressed, and a production method therefor. The production method comprises steps of forming a first electrode, forming a second electrode, and forming a second electrode side barrier metal layer on the second electrode. Moreover, the second electrode has an electrode layer containing at least one of Ag and Al. In forming the first electrode and the second electrode side barrier metal layer, the second electrode side barrier metal layer is formed on the second electrode while the first electrode to be electrically connected to the first semiconductor layer is formed. The first electrode and the second electrode side barrier metal layer are deposited are deposited in the same layered structure. |
| US09577152B2 |
Light emitting element
A light emitting element having; a first and a second conductivity type semiconductor layers, a first and a second electrodes formed on the first and second conductivity type semiconductor layer, the first and the second electrodes being disposed on the same face side of the first conductivity type semiconductor layer and the second conductivity type semiconductor layer, in plan view, the first electrode having a first connecting portion, a first extending portion, and two second extending portions, the second electrode having a second connecting portion and two third extending portions, the first extending portion of the first electrode extending linearly from the first connecting portion toward the second connecting portion, and the two second extending portions extending parallel to the first extending portion on two sides of the first extending portion, the two third extending portions of the second electrode extending parallel to the first extending portion between the first extending portion and the two second extending portions. |
| US09577143B1 |
Backflow reactor liner for protection of growth surfaces and for balancing flow in the growth liner
A backflow liner in an epitaxial growth system is provided in order to control gas flow and protect the surface of substrates throughout an epitaxial growth cycle. The backflow liner provides critical protection during the warming time prior to substrate pre-treatment, while the growth environment reaches steady state condition between the pre-treatment and the growth process, during pauses between the layer depositions in case of multilayer structure growth, and during the cooling process. The direction of the gas flow through the backflow liner is counter to the deposition gas flows directed from the source end of the growth system. The backflow liner is therefore designed to shape the flow of gases to prevent formation of the vortex-type streams in the growth system that may negatively affect the growth process. |
| US09577141B2 |
Selective self-aligned plating of heterojunction solar cells
A method for forming contacts on a photovoltaic device includes forming a heterojunction cell including a substrate, a passivation layer and a doped layer and forming a transparent conductor on the cell. A patterned barrier layer is formed on the transparent conductor and has openings therein wherein the transparent conductor is exposed through the openings in the barrier layer. A conductive contact is grown through the openings in the patterned barrier layer by a selective plating process. |
| US09577139B2 |
Single-step metal bond and contact formation for solar cells
A method for fabricating a solar cell is disclosed. The method can include forming a dielectric region on a surface of a solar cell structure and forming a first metal layer on the dielectric region. The method can also include forming a second metal layer on the first metal layer and locally heating a particular region of the second metal layer, where heating includes forming a metal bond between the first and second metal layer and forming a contact between the first metal layer and the solar cell structure. The method can include forming an adhesive layer on the first metal layer and forming a second metal layer on the adhesive layer, where the adhesive layer mechanically couples the second metal layer to the first metal layer and allows for an electrical connection between the second metal layer to the first metal layer. |
| US09577135B2 |
CMOS compatible ultraviolet sensor device and method of producing a CMOS compatible ultraviolet sensor device
The ultraviolet sensor device comprises a semiconductor substrate, a dielectric layer above the substrate, a surface of the dielectric layer that is provided for the incidence of ultraviolet radiation, a floating gate electrode in the dielectric layer and an electrically conductive control gate electrode near the floating gate electrode. The control gate electrode is insulated from the floating gate electrode. A sensor layer is formed by an electrically conductive further layer that is electrically conductively connected to the floating gate electrode. The control gate electrode is arranged outside a region that is located between the sensor layer and the surface provided for the incidence of ultraviolet radiation. The sensor layer is discharged by incident UV radiation and can be charged or discharged electrically by charging or discharging the floating gate electrode. |
| US09577133B2 |
Flexible connectors of building integrable photovoltaic modules for enclosed jumper attachment
Provided are novel Building Integrable Photovoltaic (BIPV) modules having one or more connectors that are movable between extended and retracted positions. Connector adjustment may be performed in the field, for example, during installation of a module. In certain embodiments, a connector includes a connector body and extension body. The extension body flexibly attaches the connector body to the module and allows the connector body to move with respect to the module edge. In an extended position, the connector body is positioned closer to the edge and is configured to make electrical connections to a joiner connector for interconnecting with an adjacent module. In a retracted positioned, the connector body is positioned further from the edge and is configured to make electrical connections to a jumper for interconnecting the conductive elements of the connector. In certain embodiments, a jumper does not protrude beyond the edge when connected to the connector body. |
| US09577130B2 |
Thin film solar cell backside contact
Embodiments relate to a thin film solar cell backside contact. A planar substrate is provided and an associated backside of the substrate is modified to form one or more pedestals. The modified substrate is layered with multiple layers of material, including a conducting layer, a reflective layer, and a passivation layer. The layered backside substrate is polished to expose portions of the conducting layer at discrete locations on the backside of the substrate. The exposed portions of the conducting layer maintain direct electrical communication between an absorber layer deposited on the layered backside substrate and the conducting layer. |
| US09577129B1 |
Flexible glass support for a solar cell assembly
A method of bonding solar cell component to a support and the solar cell assembly thus obtained. The method of bonding solar cell component to a support comprises: disposing metallized traces on the support; dispensing bonding adhesive on front of the support or on back of the solar cell component; and laying down the solar cell component on the support and soldering the solar cell component to the metallized traces on the support. The support is a glass support with integrated circuits. |
| US09577116B2 |
Zener diode having an adjustable low breakdown voltage
The present disclosure relates to a Zener diode including a cathode region having a first conductivity type, formed on a surface of a semiconductor substrate having a second conductivity type. The Zener diode includes an anode region having the second conductivity type, formed beneath the cathode region. One or more trench isolations isolate the cathode and anode regions from a remainder of the substrate. A first conducting region is configured to, when subjected to an adequate voltage, generate a first electric field perpendicular to an interface between the cathode and anode regions. A second conducting region is configured to, when subjected to an adequate voltage, generate a second electric field parallel to the interface between the cathode and anode regions. |
| US09577115B2 |
Semiconductor devices having air gaps
A semiconductor device has an isolation layer pattern, a plurality of gate structures, and a first insulation layer pattern. The isolation layer pattern is formed on a substrate and has a recess thereon. The gate structures are spaced apart from each other on the substrate and the isolation layer pattern. The first insulation layer pattern is formed on the substrate and covers the gate structures and an inner wall of the recess. The first insulation layer pattern has a first air gap therein. |
| US09577112B2 |
Method for manufacturing semiconductor device
To improve electric characteristics of a semiconductor device including an oxide semiconductor. Alternatively, to improve reliability of a semiconductor device including an oxide semiconductor. In a transistor including a first oxide film, an oxide semiconductor film, a pair of electrodes in contact with the oxide semiconductor film, and a second oxide film in contact with the oxide semiconductor film and the pair of electrodes, oxygen is added to the first oxide film and the second oxide film in contact with the oxide semiconductor film and the pair of electrodes, so that oxygen vacancies are reduced. The oxygen is diffused to the oxide semiconductor film by heat treatment or the like; thus, oxygen vacancies in the oxide semiconductor film are reduced. |
| US09577110B2 |
Semiconductor device including an oxide semiconductor and the display device including the semiconductor device
A novel semiconductor device including an oxide semiconductor is provided. In particular, a planar semiconductor device including an oxide semiconductor is provided. A semiconductor device including an oxide semiconductor and having large on-state current is provided. The semiconductor device includes an oxide insulating film, an oxide semiconductor film over the oxide insulating film, a source electrode and a drain electrode in contact with the oxide semiconductor film, a gate insulating film between the source electrode and the drain electrode, and a gate electrode overlapping the oxide semiconductor film with the gate insulating film. The oxide semiconductor film includes a first region overlapped with the gate electrode and a second region not overlapped with the gate electrode, the source electrode, and the drain electrode. The first region and the second region have different impurity element concentrations. The gate electrode, the source electrode, and the drain electrode contain the same metal element. |
| US09577105B2 |
Thin film transistor and thin film transistor array with semiconductor fragments
A thin film transistor based on carbon nanotubes comprises a source electrode, a drain electrode, a semiconducting layer, an insulating layer and a gate electrode. The drain electrode is spaced apart from the source electrode. The semiconductor layer is electrically connected with the source electrode and the drain electrode. The gate electrode is insulated from the source electrode, the drain electrode, and the semiconductor layer by the insulating layer. The semiconductor layer includes a number of semiconductor fragments, each of the number of semiconductor fragments includes multilayer semiconductor molecular layers, and a quantity of layers of the number of semiconductor molecular layers ranges from about 1 to about 20. |
| US09577102B1 |
Method of forming gate and finFET
A method of forming a gate includes: forming a dummy gate; forming an inter layer dielectric (ILD) laterally adjacent to the dummy gate; doping a dopant into the dummy gate and the ILD, in which a surface dopant concentration of the dummy gate is lower than a surface dopant concentration of the ILD; removing the dummy gate to form a cavity after doping the dopant into the dummy gate and the ILD; and forming the gate in the cavity. |
| US09577100B2 |
FinFET and nanowire semiconductor devices with suspended channel regions and gate structures surrounding the suspended channel regions
A semiconductor device including at least one suspended channel structure of a silicon including material, and a gate structure present on the suspended channel structure. At least one gate dielectric layer is present surrounding the suspended channel structure, and at least one gate conductor is present on the at least one gate dielectric layer. Source and drain structures may be composed of a silicon and germanium including material. The source and drain structures are in contact with the source and drain region ends of the suspended channel structure through a silicon cladding layer. |
| US09577097B2 |
Semiconductor device having stressor and method of forming the same
A semiconductor device having a stressor is provided. A first trench and a second trench spaced apart from each other are formed in a substrate. A channel area is defined between the first trench and the second trench. A gate dielectric layer is formed on the channel area. A gate electrode is formed on the gate dielectric layer. The stressor includes a plurality of semiconductor layers formed in the first trench and the second trench and a plurality of interlayers formed between the semiconductor layers. Sidewalls of the first trench and the second trench are v-shaped (e.g., have a < or > shape). |
| US09577093B2 |
Vertical structure and method of forming semiconductor device
According to an exemplary embodiment, a method of forming a semiconductor device is provided. The method includes: providing a vertical structure over a substrate; forming an etch stop layer over the vertical structure; forming an oxide layer over the etch stop layer; performing chemical mechanical polishing on the oxide layer and stopping on the etch stop layer; etching back the oxide layer and the etch stop layer to expose a sidewall of the vertical structure and to form an isolation layer; oxidizing the sidewall of the vertical structure and doping oxygen into the isolation layer by using a cluster oxygen doping treatment. |
| US09577092B2 |
Apparatuses having a vertical memory cell
Methods, apparatuses, and systems for providing a body connection to a vertical access device. The vertical access device may include a digit line extending along a substrate to a digit line contact pillar, a body connection line extending along the substrate to a body connection line contact pillar, a body region disposed on the body connection line, an electrode disposed on the body region, and a word line extending to form a gate to the body region. A method for operation includes applying a first voltage to the body connection line, and applying a second voltage to the word line to cause a conductive channel to form through the body region. A memory cell array may include a plurality of vertical access devices. |
| US09577090B2 |
Semiconductor device and method of manufacturing the same
To satisfy both suppression of rise in contact resistance and improvement of breakdown voltage near the end part of a trench part. The trench part GT is provided between a source offset region and a drain offset region at least in plan view in a semiconductor layer, and is provided in a source-drain direction from the source offset region toward the drain offset region in plan view. A gate insulating film GI covers the side surface and the bottom surface of the trench part GT. A gate electrode is provided in the trench part at least in plan view, and contacts the gate insulating film GI. A contact GC contacts the gate electrode GE. The contact GC is disposed, shifted in a first direction perpendicular to the source-drain direction relative to the centerline in the trench part GT extending in the source-drain direction in plan view, and is provided in the trench part GT in plan view. |
| US09577087B2 |
Semiconductor apparatus
A semiconductor apparatus that has a first parallel pn-layer formed between an active region and an n+-drain region. A peripheral region is provided with a second parallel pn-layer, which has a repetition pitch narrower than the repetition pitch of the first parallel pn-layer. An n−-surface region is formed between the second parallel pn-layer and a first main surface. On the first main surface side of the n−-surface region, a plurality of p-guard ring regions are formed to be separated from each other. A field plate electrode is connected electrically to the outermost p-guard ring region among the p-guard ring regions. A channel stopper electrode is connected electrically to an outermost peripheral p-region of the peripheral region. |
| US09577086B2 |
Semiconductor device
A device that increases a value of current flowing through a whole chip until a p-n diode in a unit cell close to a termination operates and reduces a size of the chip and a cost of the chip resulting from the reduced size. The device includes a second well region located to sandwich the entirety of a plurality of first well regions therein in plan view, a third separation region located to penetrate the second well region from a surface layer of the second well region in a depth direction, and a second Schottky electrode provided on the third separation region. |
| US09577082B2 |
Semiconductor device
The semiconductor device includes: a plurality of interlayer insulation films, each interlayer insulation film covering a front surface of a corresponding one of the gate electrodes and protruding from the front surface of the semiconductor substrate; the first metal film covering the front surface of the semiconductor substrate and plurality of the interlayer insulation films; and the protective insulation film covering a part of the first metal film. In a cross-section traversing the plurality of trenches, the end of the protective insulation film is above one of the interlayer insulation films, and a width of the one of the interlayer insulation films that is below the end of the protective insulation film is wider than widths of other interlayer insulation films. |
| US09577081B2 |
Semiconductor device and method for manufacturing the same
A semiconductor device includes a semiconductor substrate that includes an IGBT region. A first lifetime control layer extending along a planar direction of the semiconductor substrate is provided in a range in a drift region that is closer to the rear surface than an intermediate portion of the semiconductor substrate in a thickness direction. A crystal defect density in the first lifetime control layer is higher than any of a crystal defect density in a region adjacent to the first lifetime control layer on the rear surface side and a crystal defect density in a region adjacent to the first lifetime control layer on a front surface side. A crystal defect density in a region between the first lifetime control layer and the rear surface is lower than a crystal defect density in a region between the first lifetime control layer and the front surface. |
| US09577079B2 |
Tunnel field effect transistors
Tunnel field effect devices and methods of fabricating tunnel field effect devices are described. In one embodiment, the semiconductor device includes a first drain region of a first conductivity type disposed in a first region of a substrate, a first source region of a second conductivity type disposed in the substrate, the second conductivity type being opposite the first conductivity type, a first channel region electrically coupled between the first source region and the first drain region, the first source region underlying a least a portion of the first channel region, and a first gate stack overlying the first channel region. |
| US09577077B2 |
Well controlled conductive dot size in flash memory
Some embodiments of the present disclosure relate to a method for forming flash memory. In this method, a first tunnel oxide is formed over a semiconductor substrate. A self-assembled monolayer (SAM) is then formed on the first tunnel oxide. The SAM includes spherical or spherical-like crystalline silicon dots having respective diameters which are less than approximately 30 nm. A second tunnel oxide is then formed over the SAM. |
| US09577076B2 |
Methods of manufacturing semiconductor devices
In a method of manufacturing a semiconductor device, a plasma annealing and supplying a threshold voltage control gas onto a portion of a substrate is performed to form a fixed charge region including a fixed charge at a surface of the substrate. A MOS transistor is formed on the substrate including the fixed charge region. By the above processes, the threshold voltage of the MOS transistor may be easily controlled. |
| US09577075B2 |
Method of manufacturing semiconductor device using plasma doping process and semiconductor device manufactured by the method
A method of manufacturing a semiconductor device includes forming a preliminary fin-type active pattern extending in a first direction, forming a device isolation pattern covering a lower portion of the preliminary fin-type active pattern, forming a gate structure extending in a second direction and crossing over the preliminary fin-type active pattern, forming a fin-type active pattern having a first region and a second region, forming a preliminary impurity-doped pattern on the second region by using a selective epitaxial-growth process, and forming an impurity-doped pattern by injecting impurities using a plasma doping process, wherein the upper surface of the first region is at a first level and the upper surface of the second region is at a second level lower than the first level. |
| US09577074B2 |
Method for manufacturing finFET
A method of manufacturing a FinFET device is provided, comprising: a. providing a substrate (100); b. forming a fin (200) on the substrate; c. forming an shallow trench isolation structure (300) on the substrate; d. forming an sacrificial gate stack on the isolation structure, wherein the sacrificial gate stack intersects the fin; e. forming source/drain doping regions by ion implantation into the fin; f. depositing an interlayer dielectric layer (400) on the substrate; g. removing the sacrificial gate stack to form a sacrificial gate vacancy; h. forming an doped region (201) under the sacrificial gate vacancy; i. etching the shallow trench isolation structure (300) under the sacrificial gate vacancy until the top surface of the shallow trench isolation structure (300) levels with the bottom surface of the source/drain doping regions; j. forming a new gate stack in the sacrificial gate vacancy. Some advantages of the current invention may be, harmful effects produced in the source/drain regions by the triangle fin structure are eliminated, the device performance is improved, and the complexity of the process is reduce. |
| US09577069B1 |
Method of fabricating semiconductor MOS device
A method of fabricating a MOS device is disclosed. A substrate having an active area (AA) silicon portion and shallow trench isolation (STI) region surrounding the active area is provided. A hard mask is formed on the substrate. A portion of the hard mask is removed to form an opening on the AA silicon portion. The opening exposes an edge of the STI region. The AA silicon portion is recessed through the opening to a predetermined depth to form a silicon spacer along a sidewall of the STI region in a self-aligned manner. An oxidation process is performed to oxidize the AA silicon portion and the silicon spacer to form a gate oxide layer. |
| US09577061B2 |
Asymmetric high-K dielectric for reducing gate induced drain leakage
An asymmetric high-k dielectric for reduced gate induced drain leakage in high-k MOSFETs and methods of manufacture are disclosed. The method includes performing an implant process on a high-k dielectric sidewall of a gate structure. The method further includes performing an oxygen annealing process to grow an oxide region on a drain side of the gate structure, while inhibiting oxide growth on a source side of the gate structure adjacent to a source region. |
| US09577055B2 |
Semiconductor device having a minimized region of sheild electrode and gate electrode overlap
The present disclosure relates to a semiconductor device. Such a semiconductor device includes a trench metal-oxide-semiconductor (MOS) transistor having two or more electrodes in a trench formed on a substrate of the semiconductor, where a part of a shield electrode positioned at a bottom of the trench is formed to have a large thickness, and a groove is formed in a gate electrode that is stacked on the shield electrode, such that a part of the shield electrode protrudes to a surface of the semiconductor device so as to be connected with a source power.In such a manner, by minimizing a region in which the shield electrode and the gate electrode overlap, a region that decreases problematic effects, such as leakage current of gate/source or gate/drain of a trench MOS transistor, and a region where high difference of a gate electrode is generated, are removed. |
| US09577052B2 |
Method for fabricating semiconductor device having dual work function gate structure
A semiconductor device includes a body including a first junction region; a pillar positioned over the body, and including a vertical channel region and a second junction region over the vertical channel region; a gate trench exposing side surfaces of the pillar; a gate dielectric layer covering the gate trench; and a gate electrode embedded in the gate trench, with the gate dielectric layer interposed therebetween. The gate electrode includes a first work function liner overlapping with the vertical channel region, and including an aluminum-containing metal nitride; a second work function liner overlapping with the second junction region, and including a silicon-containing non-metal material; and an air gap positioned between the second work function liner and the second junction region. |
| US09577051B2 |
Spacer structures of a semiconductor device
A method of fabricating a semiconductor device includes forming a first set of gate electrodes over a substrate, adjacent gate electrodes of the first set of gate electrodes being separated by a first gap width. Each gate electrode of the first set of gate electrodes has a first gate width. The method further includes forming a second set of gate electrodes over the substrate, adjacent gate electrodes of the second set of gate electrodes being separated by a second gap width less than the first gap width. Each gate electrode of the second set of gate electrodes has a second gate width greater than the first gate width. |
| US09577050B2 |
Semiconductor laminate, semiconductor device, and production method thereof
Provided is a method for manufacturing a semiconductor device. Also provided are: a semiconductor device which can be obtained by the method; and a dispersion that can be used in the method. A method for manufacturing a semiconductor device (500a) of the present invention comprises the steps (a)-(c) described below and is characterized in that the crystal orientation of a first dopant implanted layer (52) is the same as the crystal orientation of a semiconductor layer or a base (10) that is formed of a semiconductor element. (a) A dispersion which contains doped particles is applied to a specific part of a layer or a base. (b) An unsintered dopant implanted layer is obtained by drying the applied dispersion. (c) The specific part of the layer or the base is doped with a p-type or n-type dopant by irradiating the unsintered dopant implanted layer with light, and the unsintered dopant implanted layer is sintered, thereby obtaining a dopant implanted layer that is integrated with the layer or the base. |
| US09577048B1 |
Heterostructure field-effect transistor
Heterostructure field-effect transistor (HFET) having a channel layer, a barrier layer disposed on the channel layer, and a gate, source and drain electrodes disposed on the barrier layer, respectively, and corresponding fabrication methods are disclosed. The drain electrode includes a p-type semiconductor patterned structure and a raised drain section, the drain electrode includes a Schottky contact and an ohmic contact, the Schottky contact is formed between a top surface together with a side surface of p-type semiconductor patterned structure and a bottom surface together with a side surface of raised drain section, the ohmic contact is formed between another surface of raised drain section and barrier layer, the raised drain section partially surrounding the p-type semiconductor patterned structure, and a bandgap of the channel layer is less than a bandgap of the barrier layer. |
| US09577047B2 |
Integration of semiconductor epilayers on non-native substrates
An article includes a support substrate bonded to heterostructure epitaxial layers that include one or more electronic devices. The support substrate has a bonding surface and the heterostructure epitaxial layers have a surface with the epitaxial growth direction of the heterostructure epitaxial layers towards the surface. The surface of the heterostructure epitaxial layers is bonded at the bonding surface of the support substrate by ion exchange between the surface of the heterostructure epitaxial layers and the bonding surface of the support substrate. |
| US09577046B1 |
Semiconductor device
A semiconductor device includes a semiconductor layer having a first surface and a second surface, a first electrode on the first surface, a second electrode on the second surface, a first semiconductor region of a first conductivity type in the semiconductor layer, a second semiconductor region of a second conductivity type in an element region of the semiconductor layer between the first semiconductor region and the first electrode, a third semiconductor region of the second conductivity type between the second semiconductor region and the first electrode, and a fourth semiconductor region of the second conductivity type in a termination region of the semiconductor layer inwardly of the first surface. A distance between the fourth semiconductor region and the second surface is greater than a distance between the second semiconductor region and the second surface. |
| US09577045B2 |
Silicon carbide power bipolar devices with deep acceptor doping
In a general aspect, a power semiconductor device can include a collector region disposed on a substrate, the collector region can include n-type silicon carbide (SiC). The power semiconductor device can also include a base region disposed on the collector region. The base region can include p-type SiC doped with gallium. The power semiconductor device can include an emitter region disposed on the base region. The emitter region can include n-type SiC carbide. |
| US09577043B2 |
Semiconductor device and method for fabricating the same
A semiconductor device includes a buffer layer on a semiconductor substrate including first and second regions, a first channel layer on the buffer layer of the first region, a second channel layer on the buffer layer of the second region, and a spacer layer between the second channel layer and the buffer layer. The buffer layer, the first and second channel layers, and the spacer layer are formed of semiconductor materials including germanium. A germanium concentration difference between the first and second channel layers is greater than a germanium concentration difference between the buffer layer and the second channel layer. The spacer layer has a germanium concentration gradient. |
| US09577042B1 |
Semiconductor structure with multilayer III-V heterostructures
The source/drain of a fully III-V semiconductor or Si-based transistor includes a bottom barrier layer that may be lattice matched to the channel, a lower layer of a wide bandgap III-V material and a top layer of a comparatively narrow bandgap III-V material, with a compositionally graded layer between the lower layer and top layer gradually transitioning from the wide bandgap material to the narrow bandgap material. |
| US09577034B2 |
Compensation devices
Methods, apparatuses and devices related to the manufacturing of compensation devices are provided. In some cases, an n/p-codoped layer is deposited for calibration purposes to minimize a net doping concentration. In other cases, alternatingly n- and p-doped layers are then deposited. In other embodiments, an n/p-codoped layer is deposited in a trench where n- and p-dopants have different diffusion behavior. To obtain different doping profiles, a heat treatment may be performed. |
| US09577033B2 |
Trench gate trench field plate vertical MOSFET
A semiconductor device having a vertical drain extended MOS transistor may be formed by forming deep trench structures to define vertical drift regions of the transistor, so that each vertical drift region is bounded on at least two opposite sides by the deep trench structures. The deep trench structures are spaced so as to form RESURF regions for the drift region. Trench gates are formed in trenches in the substrate over the vertical drift regions. The body regions are located in the substrate over the vertical drift regions. |
| US09577028B2 |
Semiconductor device including a capacitor
A capacitor in a semiconductor device may include a lower electrode, a dielectric layer including a metal oxide and disposed on the lower electrode, a first material layer including aluminum oxide (AlxOy) and disposed on the dielectric layer, a second material layer including titanium oxynitride (TixOyNz) and disposed on the first material layer, and an upper electrode disposed on the second material layer, wherein the first material layer is between the dielectric layer and the second material layer, and the dielectric layer is between the lower electrode and the first material layer. |
| US09577024B2 |
Integrated circuit inductor
An inductive device is formed in a circuit structure that includes alternating conductive and insulating layers. The device includes, in a plurality of the conductive layers, traces forming a respective pair of interleaved loops and at least one interconnect segment in each of the plurality of the conductive layers. In each layer among the plurality of the conductive layers, at least one loop in the respective pair is closed by jumpers to an interconnect segment formed in another layer above or below the layer. |
| US09577022B2 |
Inductor
An inductor is provided. The inductor includes first and second bonding pads on a semiconductor substrate, a lead pin on a board trace, a first bonding wire being configured to connect the first bonding pad and the lead pin, and a second bonding wire configured to connect the second bonding pad and the lead pin, the second bonding wire being connected to the first bonding wire in parallel. |
| US09577021B2 |
Pixel circuit and display device, and a method of manufacturing pixel circuit
The display device including a pixel circuit has a first line, a transistor, a light emitting element, and a second line. The transistor is located between the second line and an electrode of the light emitting element. Either the first line or the second line is wired in a region that overlaps a light emitting region of the light emitting element in a lamination direction of layers. The second line intersects the first line outside of the light emitting region and overlaps a non-light emitting region of the light emitting element. |
| US09577017B2 |
Organic light emitting diode display
An organic light emitting diode (“OLED”) display includes: a front display part including a plurality of front pixels disposed on a substrate, where the front pixels display an image on a front surface thereof; and a side display part including a plurality of side pixels disposed on the substrate, where the side pixels display an image on a side surface thereof, where the front display part and the side display part are configured to have different resonance structures from each other. |
| US09577016B2 |
Light emitting device
The present invention provides a TFT that has a channel length particularly longer than that of an existing one, specifically, several tens to several hundreds times longer than that of the existing one, and thereby allowing turning to an on-state at a gate voltage particularly higher than the existing one and driving, and allowing having a low channel conductance gd. According to the present invention, not only the simple dispersion of on-current but also the normalized dispersion thereof can be reduced, and other than the reduction of the dispersion between the individual TFTs, the dispersion of the OLEDs themselves and the dispersion due to the deterioration of the OLED can be reduced. |
| US09577015B2 |
Mother substrate for producing display device
A method for producing a display device includes forming a resin film on a substrate, forming a plurality of light emitting elements above the resin film, forming a plurality of first grooves in a surface of the resin film, the plurality of first grooves enclosing the plurality of light emitting elements individually in a multiple-fold manner, cutting the substrate at a position overlapping any one of the plurality of first grooves other than the first groove closest to one of the plurality of light emitting elements, and peeling off the substrate from the resin layer. |
| US09577014B2 |
Manufacturing method of an organic electroluminescence display device and the organic electroluminescence display device
A manufacturing method of an organic electroluminescence display device including a device substrate provided with a plurality of pixel electrodes which have a gap part therebetween, a common electrode disposed opposite to the plurality of pixel electrodes, a light emitting layer provided over the plurality of pixel electrodes, and a bank layer provided in the gap part of the plurality of pixel electrodes, the method comprising forming a cover layer including a concave region to fit into a convex shaped part of the bank layer at a support substrate, forming a color filter layer facing the pixel electrode to the concave region, disposing a surface of the color filter layer on the device substrate so that the concave region fits into a convex shaped part, and attaching the cover layer and the color filter layer on the device substrate by peeling the cover layer from the support substrate. |
| US09577013B2 |
Organic light-emitting diode (OLED) display capable of controlling light transmittance
An organic light-emitting diode (OLED) display capable of controlling light transmittance is disclosed. In one aspect, the OLED display includes a plurality of pixels, each including a first region configured to emit light and a second region configured to transmit light therethrough and a plurality of first electrodes respectively formed in the first regions of the pixels. The OLED display also includes a plurality of organic layers respectively formed over the first electrodes, a second electrode formed over all of the organic layers, and a plurality of third electrodes each formed in the second regions of the pixels. The OLED display further includes a plurality of solvents respectively placed over the third electrodes, wherein each of the solvents is configured to selectively block light and a fourth electrode formed over the solvents for all of the pixels. |
| US09577010B2 |
Cross-point memory and methods for fabrication of same
The disclosed technology relates generally to integrated circuit devices, and in particular to cross-point memory arrays and methods for fabricating the same. In one aspect, a memory device of the memory array comprises a substrate and a memory cell stack formed between and electrically connected to first and second conductive lines. The memory cell stack comprises a first memory element over the substrate and a second memory element formed over the first element, wherein one of the first and second memory elements comprises a storage element and the other of the first and second memory elements comprises a selector element. The memory cell stack additionally comprises a first pair of sidewalls opposing each other and a second pair of sidewalls opposing each other and intersecting the first pair of sidewalls. The memory device additionally comprises first protective dielectric insulating materials formed on a lower portion of the first pair of sidewalls and an isolation dielectric formed on the first protective dielectric insulating material and further formed on an upper portion of the first pair of sidewalls. |
| US09577005B2 |
Semiconductor device and solid-state imaging device with tantalum oxide layer formed by diffusing a material of an electrode of necessity or a counter electrode
There is provided a semiconductor device including a semiconductor layer that includes an active region, semiconductor elements that are formed using the active region, connection regions that are obtained by metalizing parts of the semiconductor layer in an island shape isolated from the active region, an insulation film that is formed to cover one main surface side of the semiconductor layer, electrodes that are disposed to face the semiconductor elements and the connection regions via the insulation film, and contacts that penetrate through the insulation film to be selectively formed in portions according to necessity among portions that connect the semiconductor elements or the connection regions to the electrodes. |
| US09577002B2 |
Solid-state imaging device, manufacturing method thereof, and electronic apparatus
A solid-state imaging device includes a plurality of photoelectric conversion portions each provided in a semiconductor substrate and receives incident light through a light sensing surface, and a pixel separation portion provided to electrically separate a plurality of pixels. At least a pinning layer and a light shielding layer are provided in an inner portion of a trench provided on a side portion of each of the photoelectric conversion portions in an incident surface side, the trench includes a first trench and a second trench formed to be wider than the first trench in a portion shallower than the first trench, the pinning layer is formed in an inner portion of the first trench to cover an inside surface of the second trench, and the light shielding layer is formed to bury an inner portion of the second trench at least via the pinning layer. |
| US09577001B2 |
Integrated imaging device for infrared radiation and method of production
The integrated imaging device comprises a substrate (1) with an integrated circuit (4), a cover (2), a cavity (6) enclosed between the substrate (1) and the cover (2), and a sensor (5) or an array of sensors (5) arranged in the cavity (6). A surface (11, 12) of the substrate (1) or the cover (2) opposite the cavity (6) has a structure (8) directing incident radiation. The surface structure (8) may be a plate zone or a Fresnel lens focusing infrared radiation and may be etched into the surface of the substrate or cover, respectively. |
| US09577000B2 |
Image sensors including photoelectric conversion portions with increased area
An image sensor can include a photoelectric conversion part of an active region of a substrate and a trench in the substrate. A transfer transistor gate electrode can extend from outside the trench into the trench and terminate in the trench to provide an exposed portion of the trench in the photoelectric conversion part. |
| US09576998B2 |
Solid-state image pickup unit, method of manufacturing solid-state image pickup unit, and electronic apparatus
A back-illuminated type solid-state image pickup unit in which a pad wiring line is provided on a light reception surface and which is capable of improving light reception characteristics in a photoelectric conversion section by having a thinner insulating film in a pixel region. The solid-state image pickup unit includes a sensor substrate having a pixel region in which photoelectric conversion sections are formed in an array, and a drive circuit is provided on a surface opposed to a light reception surface for the photoelectric conversion sections of the sensor substrate. A through hole via reaching the drive circuit from the light reception surface of the sensor substrate is provided in a peripheral region located outside the pixel region. A pad wiring line directly laminated on the through hole via is provided on the light reception surface in the peripheral region. |
| US09576996B2 |
Solid-state imaging device, manufacturing method thereof, and electronic apparatus
A solid-state imaging device includes a plurality of photoelectric conversion portions each provided in a semiconductor substrate and receives incident light through a light sensing surface, and a pixel separation portion provided to electrically separate a plurality of pixels. At least a pinning layer and a light shielding layer are provided in an inner portion of a trench provided on a side portion of each of the photoelectric conversion portions in an incident surface side, the trench includes a first trench and a second trench formed to be wider than the first trench in a portion shallower than the first trench, the pinning layer is formed in an inner portion of the first trench to cover an inside surface of the second trench, and the light shielding layer is formed to bury an inner portion of the second trench at least via the pinning layer. |
| US09576995B2 |
Imaging device and electronic device
An imaging device capable of obtaining high-quality imaging data is provided. The imaging device includes a first circuit, a second circuit and a third circuit. The first circuit includes a photoelectric conversion element, a plurality of transistors including an amplifier transistor, and a plurality of capacitors. The second circuit includes a transistor. The third circuit includes a resistor and a transistor for controlling a current flowing in the resistor. The output signal of the imaging device is determined in accordance with the current flowing in the resistor. Variations in electrical characteristics of the amplifier transistor included in the first circuit can be compensated. |
| US09576993B2 |
Method for manufacturing image capturing device and image capturing device
An offset spacer film (OSS) is formed on a side wall surface of a gate electrode (NLGE, PLGE) to cover a region in which a photo diode (PD) is disposed. Next, an extension region (LNLD, LPLD) is formed using the offset spacer film and the like as an implantation mask. Next, process is provided to remove the offset spacer film covering the region in which the photo diode is disposed. Next, a sidewall insulating film (SWI) is formed on the side wall surface of the gate electrode. Next, a source-drain region (HPDF, LPDF, HNDF, LNDF) is formed using the sidewall insulating film and the like as an implantation mask. |
| US09576992B2 |
Light-sensing apparatuses, methods of driving the light-sensing apparatuses, and optical touch screen apparatuses including the light-sensing apparatuses
Light-sensing apparatuses may include a light sensor transistor and a switching transistor in a light-sensing pixel, the transistors being oxide semiconductor transistors. In the light-sensing apparatus, the light sensor transistor and the switching transistor in the light-sensing pixel may be adjacently formed on one substrate, the switching transistor including a channel material that is relatively less light-sensitive than the light sensor transistor and is stable, and the light sensor transistor includes a channel material that is relatively light-sensitive. The light sensor transistor may include a transparent upper electrode on a surface of a channel, and a negative voltage may be applied to the transparent upper electrode, whereby a threshold voltage shift in a negative voltage direction may be prevented or reduced. |
| US09576991B2 |
Photo sensor module
The present disclosure relates to a photo sensor module. The thickness and size of an IC chip may be reduced by manufacturing a photo sensor based on a semiconductor substrate and improving the structure to place a UV sensor on the upper section of an active device or a passive device. The photo sensor module includes a semiconductor substrate, a field oxide layer, formed on the semiconductor substrate, and a photo sensor comprising a photo diode formed on the field oxide layer. |
| US09576984B1 |
Thin film transistor array panel and conducting structure
A conductive layer for a thin film transistor (TFT) array panel includes a multi-layered portion defining a source electrode and a drain electrode of a TFT device, and includes a first sub-layer, a second sub-layer, a third sub-layer, and at least one additional sub-layer. The third and the first sub-layers include indium and zinc oxide materials. An indium to zinc content ratio in the first sub-layer is greater than that in the third sub-layer. An indium to zinc content ratio in the additional sub-layer is formulated between that in the first and the third sub-layers. The content ratio differentiation between the first and the third sub-layers affects a lateral etch profile associated with a gap generated in the second conductive layer between the source and the drain electrodes, where the associated gap width in the third sub-layer is wider than that that in the first sub-layer. |
| US09576983B2 |
Liquid crystal display device and electronic device including the same
A driver circuit includes a circuit 200, a transistor 101_1, and a transistor 101_2. A signal is selectively input from the circuit 200 to a gate of the transistor 101_1 and the transistor 101_2, so that the transistor 101_1 and the transistor 101_2 are controlled to be on or off. The transistor 101_1 and the transistor 101_2 are turned on or off; thus, the wiring 112 and the wiring 111 become conducting or non-conducting. |
| US09576982B2 |
Liquid crystal display device, EL display device, and manufacturing method thereof
A display device is manufactured with five photolithography steps: a step of forming a gate electrode, a step of forming a protective layer for reducing damage due to an etching step or the like, a step of forming a source electrode and a drain electrode, a step of forming a contact hole, and a step of forming a pixel electrode. The display device includes a groove portion which is formed in the step of forming the contact hole and separates the semiconductor layer. |
| US09576980B1 |
FinFET devices having gate dielectric structures with different thicknesses on same semiconductor structure
FinFET devices are formed on the same semiconductor structure wherein at least one finFET device has a gate dielectric structure that is different in thickness relative to a gate dielectric structure of at least one other finFET device. The finFET devices are formed as part of the same fabrication process. |
| US09576977B2 |
Semiconductor device and method of manufacturing the same
A semiconductor device includes a channel layer including a sidewall having protrusions and depressions alternating with each other in a direction in which the channel layer extends, a tunnel insulating layer surrounding the channel layer, first charge storage patterns surrounding the tunnel insulating layer formed in the depressions, blocking insulation patterns surrounding the first charge patterns formed in the depressions, wherein the blocking insulating patterns include connecting portions coupled to the tunnel insulating layer, and second charge storage patterns surrounding the tunnel insulating layer formed in the protrusions. |
| US09576971B2 |
Three-dimensional memory structure having a back gate electrode
A memory stack structure includes a cavity including a back gate electrode, a back gate dielectric, a semiconductor channel, and at least one charge storage element. In one embodiment, a line trench can be filled with a memory film layer, and a plurality of semiconductor channels can straddle the line trench. The back gate electrode can extend along the lengthwise direction of the line trench. In another embodiment, an isolated memory opening overlying a patterned conductive layer can be filled with a memory film, and the back gate electrode can be formed within a semiconductor channel and on the patterned conductive layer. A dielectric cap portion electrically isolates the back gate electrode from a drain region. The back gate electrode can be employed to bias the semiconductor channel, and to enable sensing of multinary bits corresponding to different amounts of electrical charges stored in a memory cell. |
| US09576965B2 |
Semiconductor device and method for fabricating the same
A semiconductor device includes a bit line disposed over a semiconductor substrate, a supporting film being perpendicular to the bit line, a first storage node contact disposed at a lower part of a region disposed between the bit line and the supporting film, and a second storage node contact having a line shape, disposed over the first storage node contact and the bit line, isolated by the supporting film, and patterned in a diagonal direction across the bit line. |
| US09576963B2 |
Manufacturing method of vertical channel transistor array
A manufacturing method of a vertical channel transistor array is provided. The method includes following steps. A plurality of embedded word lines are formed at bottoms of trenches, and each of the embedded word lines is located at a first side wall of one of the trenches and connected to first sides of the semiconductor pillars in the same row. Each of the embedded word lines is not connected to second sides of the semiconductor pillars in the same row, and the first sides are opposite to the second sides. Only one embedded word line is correspondingly connected to the semiconductor pillars arranged in one row. An isolation structure is formed between a second side wall of each of the trenches and each of the embedded word lines. The first side wall is opposite to the second side wall. |
| US09576961B2 |
Semiconductor devices with sidewall spacers of equal thickness
Semiconductor structures with different devices each having spacers of equal thickness and methods of manufacture are disclosed. The method includes forming a first gate stack and a second gate stack. The method further includes forming sidewall spacers of equal thickness for both the first gate stack and the second gate stack by depositing a liner material over spacer material on sidewalls of the first gate stack and the second gate stack and within a space formed between the spacer material and source and drain regions of the first gate stack. |
| US09576960B2 |
Structure for finFET CMOS
According to an embodiment, the invention provides an nFET/pFET pair of finFETs formed on a gate stack. At least one fin extends into a source drain region of each of the FET pair and a carbon doped silicon (Si:C) layer is formed on each such fin. Another aspect of the invention is a process flow to enable dual in-situ doped epitaxy to fill the nFET and pFET source drain with different epi materials while avoiding a ridge in the hard cap on the gate between the pair of finFETS. The gate spacer in both of the pair can be the same thickness. The extension region of both of the pair of finFETs can be activated by a single anneal. |
| US09576959B1 |
Semiconductor device having first and second gate electrodes and method of manufacturing the same
Provided is a semiconductor device having first and second gate electrodes. The semiconductor device includes a substrate, an active region extending in a first direction on the substrate, a first gate electrode crossing the active region and extending in a second direction, and a second gate electrode extending in the second direction on the first gate electrode, wherein the first gate electrode has a first width in the first direction, and wherein the second gate electrode has a second width in the first direction, the second width being less than the first width. |
| US09576958B1 |
Forming a semiconductor structure for reduced negative bias temperature instability
An approach to forming a semiconductor structure with improved negative bias temperature instability includes forming an interfacial layer on a semiconductor substrate with an nFET and a pFET. The semiconductor structure includes a gate dielectric layer on the interfacial layer and a pFET work function metal layer on a portion of the gate dielectric layer over an area above the pFET. The semiconductor structure includes a nFET work function metal layer on a portion of the gate dielectric layer over an area above the nFET and on the pFET work function metal layer in the area above the pFET. The semiconductor structure includes a gate electrode metal on the nFET work function metal layer where a plurality of fluorine atoms and a plurality of reducing gas atoms are incorporated into at least a portion of the interfacial layer, the gate layer, and a portion of the nFET work function metal. |
| US09576955B2 |
Semiconductor device having strained channel layer and method of manufacturing the same
Semiconductor devices are provided. The semiconductor devices include active fins including a buffer layer disposed on a substrate and a channel layer disposed on the buffer layer and having a first second lattice constant higher than a lattice constant of the buffer layer, a gate structure covering the channel layer and intersecting the active fins, sidewall spacers disposed on both sidewalls of the gate structure, and capping layers disposed to contact lower surfaces of the sidewall spacers and having a width substantially the same as a width of the lower surfaces of the sidewall spacers. |
| US09576953B2 |
Layout design system, semiconductor device fabricated by using the system and method for fabricating the semiconductor device
A layout design system for designing a semiconductor device includes a processor, a storage module storing an intermediate design, and a correction module used by the processor to correct the intermediate design. The intermediate design includes an active region and dummy designs on the active region. Each dummy design includes a dummy structure and dummy spacers disposed at opposite sides of the dummy structure. The correction module is configured to alter widths of regions of at least some of the dummy designs. The corrected design is used to produce a semiconductor device having an active fin, a hard mask layer disposed on the active fin, a gate structure crossing the over the hard mask layer, and a spacer disposed on at least one side of the gate structure. The hard mask layer, and the active fin, are provided with widths that vary due to the dummy designs. |
| US09576947B2 |
Semiconductor integrated circuit device
In a semiconductor integrated circuit device, a plurality of electrode pads for external connection are arranged in a zigzag pattern. Some electrode pads of the electrode pads of the plurality of I/O cells which are closer to a side of the semiconductor chip, each have an end portion closer to the side of the semiconductor chip, the end portion being set at the same position as that of an end portion of the corresponding I/O cell. A power source-side protective circuit and a ground-side protective circuit against discharge of static electricity are provided with the power source-side protective circuit being closer to the scribe region. A distance between a center position of one of the electrode pads and the ground-side protective circuit of the corresponding I/O cell and a distance between a center position of the other one electrode pad and the ground-side protective circuit of the corresponding I/O cell are both short and are substantially equal between each I/O cell. |
| US09576945B2 |
Methods and apparatus for increased holding voltage in silicon controlled rectifiers for ESD protection
Methods and apparatus for increased holding voltage SCRs. A semiconductor device includes a semiconductor substrate of a first conductivity type; a first well of the first conductivity type; a second well of a second conductivity type adjacent to the first well, an intersection of the first well and the second well forming a p-n junction; a first diffused region of the first conductivity type formed at the first well and coupled to a ground terminal; a first diffused region of the second conductivity type formed at the first well; a second diffused region of the first conductivity type formed at the second well and coupled to a pad terminal; a second diffused region of the second conductivity type formed in the second well; and a Schottky junction formed adjacent to the first diffused region of the second conductivity type coupled to a ground terminal. Methods for forming devices are disclosed. |
| US09576942B1 |
Integrated circuit assembly that includes stacked dice
An integrated circuit assembly that includes a substrate; a member formed on the substrate; a first die mounted to the substrate within an opening in the member such that there is space between the first die and the member and the member surrounds the first die, and wherein the first die does not extend above an upper surface of the member; an underfill between the first the die and the substrate, wherein the underfill at least partially fills the space between the die and member; and a second die mounted to the first die and the member, wherein the second die is mounted to the member on all sides of the opening. |
| US09576941B2 |
Light-emitting device and method of manufacturing the same
A light-emitting device includes a plurality of light-emitting elements face-down mounted on a substrate, a plurality of structures each including a transparent plate, a phosphor-containing film provided on a lower surface of the transparent plate and a transparent covering layer provided on the lower surface of the transparent plate so as to cover lower and side surfaces of the phosphor-containing film, the structures being each provided on each of the plurality of light-emitting elements such that a lower surface of the transparent covering layer contacts a top surface of the plurality of light-emitting elements, and a white reflector to cover a side surface of the plurality of light-emitting elements and a side surfaces of the transparent covering layer. At least a portion of a region directly above a gap between the plurality of light-emitting elements is not covered with the phosphor-containing film. |
| US09576938B2 |
3DIC packages with heat dissipation structures
A package includes a first die and a second die underlying the first die and in a same first die stack as the first die. The second die includes a first portion overlapped by the first die, and a second portion not overlapped by the first die. A first Thermal Interface Material (TIM) is over and contacting a top surface of the first die. A heat dissipating lid has a first bottom surface contacting the first TIM. A second TIM is over and contacting the second portion of the second die. A heat dissipating ring is over and contacting the second TIM. |
| US09576931B1 |
Method for fabricating wafer level package
A method for fabricating a wafer level package is disclosed. A carrier is provided. A redistributed layer (RDL) layer is formed on the carrier. Semiconductor dies are mounted on the RDL layer. The semiconductor dies are molded with a molding compound, thereby forming a molded wafer. A grinding process is then performed to remove a central portion of the molding compound, thereby forming a recess and an outer peripheral ring portion surrounding the recess. The carrier is then removed to expose a lower surface of the RDL layer. Solder bumps or solder balls are formed on the lower surface of the RDL layer. |
| US09576924B2 |
Semiconductor device and a method of manufacturing the same
A semiconductor device manufacturing technique which allows reduction of semiconductor chip size. First, a pad and other wires are formed over an insulating film. A surface protective film is formed over the insulating film including the pad and wires, and an opening is made in the surface protective film. The opening lies over the pad and exposes a surface of the pad. A bump electrode is formed over the surface protective film including the opening. Here, the pad is smaller than the bump electrode. Consequently, the wires are arranged just beneath the bump electrode in the same layer as the pad 10. In other words, the wires are arranged in space which becomes available because the pad is small enough. |
| US09576919B2 |
Semiconductor device and method comprising redistribution layers
A method of making a semiconductor package can include forming a plurality of redistribution layer (RDL) traces disposed over active surfaces of a plurality of semiconductor die and electrically connected to contact pads on the plurality of semiconductor die. The method can include disposing an encapsulant material over the active surfaces, contacting at least four side surfaces of each of the plurality of semiconductor die, and disposed over the plurality of RDL traces. The method can also include forming a via through the encapsulant material to expose at least one of the plurality of RDL traces, forming an electrical interconnect disposed within the via and coupled to the at least one RDL trace, and singulating the plurality of semiconductor packages through the encapsulant material to leave an offset of 30-140 μm of the encapsulant material disposed around a periphery of each of the plurality of semiconductor die. |
| US09576916B2 |
High frequency circuit comprising graphene and method of operating the same
A high frequency circuit includes a first electronic device, a second electronic device, and a graphene interconnection unit, where at least one of a trench and a via is defined under the graphene interconnection unit. |
| US09576913B2 |
Semiconductor device and manufacturing method of semiconductor device
A semiconductor device that improves noise performance includes a circuit substrate, an enclosing case, and a metal part. A control circuit is mounted on the front surface of the circuit substrate. The enclosing case is a resin case in which semiconductor elements are installed. The metal part, included inside the enclosing case, includes a first mounting portion, a second mounting portion, and a bus bar. The first mounting portion mounts the circuit substrate on the enclosing case, and is connected to a ground pattern of the circuit substrate when mounting. The second mounting portion mounts an external instrument on the enclosing case, and is grounded when mounting. The bus bar connects the first mounting portion and second mounting portion. |
| US09576912B1 |
Wafer level chip scale package (WLCSP) having edge protection
A wafer level chip scale package (WLCSP) includes a semiconductor substrate, a back end of line (BEOL) layer on the semiconductor substrate and having a peripheral edge recessed inwardly from an adjacent peripheral edge of the semiconductor substrate. A first dielectric layer is over the BEOL layer and wraps around the peripheral edge of the BEOL layer. A redistribution layer is over the first dielectric layer and a second dielectric layer is over the redistribution layer. |
| US09576910B2 |
Semiconductor packaging structure and manufacturing method thereof
A semiconductor structure includes a plurality of devices; a molding surrounding the plurality of devices and including a first surface adjacent to an active component of at least one of the plurality of devices and a second surface opposite to the first surface; and a shielding structure disposed within the molding and between two or more of the plurality of devices, wherein the shielding structure includes a first surface adjacent to the first surface of the molding and a second surface adjacent to the second surface of the molding, and the second surface of the shielding structure includes a recessed portion recessed towards the first surface of the molding. |
| US09576905B2 |
Semiconductor device and manufacturing method thereof
A semiconductor device includes a first wiring comprising a first conductive material on a semiconductor layer, a second wiring comprising the first conductive material on the semiconductor layer, a third wiring comprising a second conductive material different from the first conductive material, and an insulation film on the semiconductor layer between the first wiring and the second wiring and between the second wiring and the third wiring. The second wiring is provided on at least two sides of the third wiring, and a mean free path of free electrons in the first conductive material is shorter than a mean free path of free electrons in the second conductive material, or the first conductive material shows quantized conduction and the second conductive material does not show quantized conduction. The first wiring, the second wiring, the third wiring, and the insulation film are in one wiring layer provided on the semiconductor layer. |
| US09576901B1 |
Contact area structure and method for manufacturing the same
A method for manufacturing a semiconductor device includes forming a contact area opening in a dielectric structure, depositing a contact area metal in the contact area opening, forming a metal cap layer on the contact area metal, forming one or more dielectric layers on the metal cap layer, forming one or more hard mask layers on the one or more dielectric layers, forming a metallization opening through the one or more dielectric and hard mask layers, wherein the metallization opening exposes the metal cap layer, removing the one or more hard mask layers, and forming a metallization layer in the metallization opening on the metal cap layer. |
| US09576898B2 |
Resistance structure, integrated circuit, and method of fabricating resistance structure
A resistance structure including: a conductive layer provided at a surface layer portion of a semiconductor substrate; a first resistance element having long sides and short sides provided over the conductive layer with an insulating film interposed; a second resistance element having long sides and short sides provided over the conductive layer with the insulating film interposed and disposed such that one long side thereof opposes one long side of the first resistance element; first wiring that is connected to one end of the first resistance element; second wiring that is connected to one end of the second resistance element; third wiring that connects the other end of the first resistance element with the other end of the second resistance element; and a connection portion that connects any of the first wiring, the second wiring and the third wiring with the conductive layer. |
| US09576896B2 |
Semiconductor arrangement and formation thereof
A semiconductor arrangement and method of formation are provided. The semiconductor arrangement includes an interconnect which includes an interconnect metal plug surrounded by a second metal layer. The interconnect is adjacent a sidewall of a dielectric, such that an air gap is between the interconnect and the sidewall of the dielectric. A protective barrier is over the interconnect and the air gap, and is over and in direct physical contact with a top surface of the dielectric. The interconnect metal plug surrounded by the second metal layer is less susceptible to damage than an interconnect metal plug that is not surrounded by a second metal layer. The protective barrier in direct physical contact with the dielectric reduces parasitic capacitance, which reduces an RC delay of the semiconductor arrangement, as compared to a semiconductor arrangement that does not have a protective barrier in direct physical contact with a dielectric. |
| US09576895B2 |
Semiconductor device with damascene bit line and method for fabricating the same
A semiconductor device includes a substrate having a plurality of contact surfaces, an interlayer dielectric layer formed over the substrate and having a first open portion which exposes a part of the contact surfaces and a second open portion which exposes the other contact surfaces, a storage node contact (SNC) plug filling the first open portion, and a damascene structure filing the second open portion and including a bit line, a spacer formed on both sidewalls of the bit line, a capping layer formed over the bit line and the spacer, and an air gap formed between the bit line and the spacer. The bit line includes a conductive material of which the volume is contracted by a heat treatment to form the air gap. |
| US09576892B2 |
Semiconductor devices and methods of forming same
Embodiments of the present disclosure include a semiconductor device and methods of forming the same. An embodiment is a method for of forming a semiconductor device, the method including forming a first conductive feature over a substrate, forming a dielectric layer over the conductive feature, and forming an opening through the dielectric layer to the first conductive feature. The method further includes selectively forming a first capping layer over the first conductive feature in the opening, and forming a second conductive feature on the first capping layer. |
| US09576890B2 |
Semiconductor device and method of manufacturing the same
Even when a stiffener is omitted, the semiconductor device which can prevent the generation of twist and distortion of a wiring substrate is obtained.As for a semiconductor device which has a wiring substrate, a semiconductor chip by which the flip chip bond was made to the wiring substrate, and a heat spreader adhered to the back surface of the semiconductor chip, and which omitted the stiffener for reinforcing a wiring substrate and maintaining the surface smoothness of a heat spreader, a wiring substrate has a plurality of insulating substrates in which a through hole whose diameter differs, respectively was formed, and each insulating substrate contains a glass cloth. |
| US09576889B2 |
Three-dimensional electronic packages utilizing unpatterned adhesive layer
An electronic package may be fabricated by forming a first layer of insulating material on a first substrate such that the first layer covers a contact pad; forming an opening through the first layer to expose the contact pad; forming an un-patterned second layer on the first layer, the second layer including an adhesive having a viscosity less than that of the first layer, wherein a region of the second layer obstructs the contact pad; removing the region to re-expose the contact pad; aligning a second substrate with the first substrate such that a via of the second substrate is aligned with the opening; bonding the first substrate and the second substrate together at the second layer; and forming an interconnect in contact with the contact pad by depositing a conductive material through the via and the opening. |
| US09576886B1 |
Flat no-lead packages with electroplated edges
A lead frame sheet of flat no-lead lead frames having a semiconductor die on a die pad, terminals, and plastic encapsulation except on a back side of the sheet to provide an exposed thermal die pad, exposed side walls, and exposed back sides of the terminals. A solder wetable metal or metal alloy plating layer is on the back side and on the exposed the walls of the terminals. The exposed thermal pad and the back side of the terminals each include a contact region which lacks the plating layer. |
| US09576885B2 |
Semiconductor device
A semiconductor device includes a plurality of metal patterns formed on a ceramic substrate, and a semiconductor chip mounted on some of the plurality of metal patterns. Also, a plurality of hollow portions are formed in peripheral portions of the plurality of metal patterns. In addition, the plurality of hollow portions are not formed in a region overlapping the semiconductor chip in the plurality of metal patterns. Furthermore, the plurality of hollow portions are provided in a plurality of metal patterns arranged at a position closest to the peripheral portion of the top surface of the ceramic substrate among the plurality of metal patterns. |
| US09576883B2 |
Semiconductor devices and methods of making the same
In one embodiment, methods for making semiconductor devices are disclosed. |
| US09576882B2 |
Through polymer via (TPV) and method to manufacture such a via
Vias for three dimensional (3D) stacking, packaging and heterogeneous integration of semi-conductor layers and wafers and a process for the manufacture of a via, to a via, to a 3D circuit and to a semiconductor device. Vias are interconnects used to vertically interconnect chips, devices, interconnection layers and wafers, i.e., in an out-of-plane direction. |
| US09576876B2 |
Organic-inorganic hybrid thin film and method for producing the same
The present invention relates to an organic-inorganic hybrid thin film and a method for preparing the same and more specifically to an organic-inorganic hybrid thin film including a stable new functional group and a method for preparing the organic-inorganic hybrid thin film that is formed by the molecular layer deposition method alternately using inorganic precursor and organic precursor. |
| US09576873B2 |
Integrated circuit packaging system with routable trace and method of manufacture thereof
A method of manufacture of an integrated circuit packaging system includes: providing routable traces including a first routable trace with a top plate and a second routable trace; mounting an integrated circuit partially over a second routable trace; forming an encapsulation over and around the first routable trace and the integrated circuit; forming a hole through the encapsulation to the top plate; and forming a protective coat directly on the encapsulation with the first routable trace between and in contact with the protective coat and the encapsulation. |
| US09576871B2 |
Composition for electronic device
The present invention provides a composition of which viscosity does not cause the problem of use at high temperature in the mounting process of electronic device. The present invention relates to a composition for electronic device comprising (a) a (meth)acrylic compound and (c) a particle having a functional group having metal scavenging functionality. |
| US09576864B2 |
Short-circuit unit and array substrate
The present invention provides a short-circuit unit comprising: a plurality of signal lines divided into a plurality of groups, each group comprising multiple signal lines, and the multiple signal lines in a same group are not adjacent to each other; a plurality of short-circuit lines, each group of the signal lines correspond to one short-circuit line, and the short-circuit line electrically connects all of the signal lines in the group corresponding to the short-circuit line, the plurality of short-circuit lines are disposed in different layers and the short-circuit lines in different layers are insulated from each other. The present invention also provides an array substrate. In the short-circuit unit of the present invention, the short-circuit lines are disposed in different layers. Compared to the existing solutions in which the short-circuit lines are provided in a same layer, the width occupied by the short-circuit unit of the present invention is smaller. |
| US09576855B2 |
Device and methods for high-k and metal gate stacks
A method for fabricating a semiconductor device includes providing a semiconductor substrate having regions for an n-type field-effect transistor (nFET) core, an input/output nFET (nFET IO), a p-type field-effect transistor (pFET) core, an input/output pFET (pFET IO), and a high-resistor, forming an oxide layer on the IO regions of the substrate, forming an interfacial layer on the substrate and the oxide layer, depositing a high-k (HK) dielectric layer on the interfacial layer, depositing a first capping layer of a first material on the HK dielectric layer, depositing a second capping layer of a second material on the HK dielectric layer and on the first capping layer, depositing a work function (WF) metal layer on the second capping layer, depositing a polysilicon layer on the WF metal layer, and forming gate stacks on the regions of the substrate. |
| US09576854B2 |
Peeling apparatus, peeling system, and peeling method
Provided is a peeling apparatus configured to suppress damage to a substrate, by forming a peeling start point. The peeling apparatus separates a superimposed substrate made by joining first and second substrates into the first and second substrates, and includes a blade configured to form a notch as a peeling start point between the first and second substrates, and an inspection unit configured to inspect a state of a cutting edge of the blade. The inspection unit includes an imaging unit configured to image the cutting edge of the blade, and an image processing unit configured to process an image of the imaging unit. |
| US09576847B2 |
Method for forming integrated circuit structure with thinned contact
Methods for forming integrated circuit structures are provided. The method includes providing a substrate including a first diffusion region, a second diffusion region, and an isolation structure separating the first diffusion region and the second diffusion region. The method further includes forming a gate structure over the substrate and forming an inter-layer dielectric (ILD) layer over the substrate. The method further includes forming a cutting mask over a portion of the gate structure over the isolation structure, and the cutting mask has an extending portion covering a portion of the ILD layer. The method further includes forming a photoresist layer having an opening, and a portion of the extending portion of the cutting mask is exposed by the opening. The method further includes etching the ILD layer through the opening to form a trench and filling the trench with a conductive material to form a contact. |
| US09576840B2 |
Method of manufacturing semiconductor device using surface treatment and semiconductor device manufactured by the method
A method of manufacturing a semiconductor device includes forming a first plurality of recessed regions in a substrate, the substrate having a protruded active region between the first plurality of recessed regions and the protruded active region having an upper surface and a sidewall, forming a device isolation film in the first plurality of recessed regions, the device isolation film exposing the upper surface and an upper portion of the sidewall of the protruded active region, and performing a first plasma treatment on the exposed surface of the protruded active region, wherein the plasma treatment is performed using a plasma gas containing at least one of an inert gas and a hydrogen gas in a temperature of less than or equal to about 700. |
| US09576834B2 |
Stocker and method for dispatching wafer carrier in stocker
A stocker includes a storage shelf, an output-relay shelf, a first crane, an output shelf, a second crane, and a controller. The storage shelf has a plurality of storage spaces. The output-relay shelf has a plurality of first output-relay spaces. The output shelf has an output space. The controller is configured to drive the first crane to preferentially transfer a first wafer carrier stored in one of the storage spaces to an empty one of the first output-relay spaces according to a delivery command defining a high priority of the first wafer carrier, and configured to drive the second crane to preferentially transfer the first wafer carrier from the first output-relay space storing the first wafer carrier to the output space according to the delivery command if the output space is empty. |
| US09576832B2 |
Article transport vehicle with damper element
An article transport vehicle is provided in which it is difficult for the transported article support portions to interfere with the supported portion of the transported article while reducing transmission of vibrations to the transported article, during a travel of the travel member or during a vertical movement of the vertically movable portion. A support unit which is vertically moved relative to a travel member is provided with a guiding supporting portion for guiding and supporting transported article support portions for supporting a supported portion of a transported article such that the transported article support portions can be moved to support positions and to retracted positions, and a damper element which is located between a vertically movable portion and the guiding supporting portion and receives load from the guiding supporting portion and which is elastically deformable in a vertical direction. |
| US09576830B2 |
Method and apparatus for adjusting wafer warpage
A method for adjusting the warpage of a wafer, includes providing a wafer having a center portion and edge portions and providing a holding table having a holding area thereon for holding the wafer. The wafer is placed onto the holding table with the center portion higher than the edge portions and thereafter pressed onto the holding area such that the wafer is attracted to and held onto the holding table by self-suction force. The wafer is heated at a predetermined temperature and for a predetermined time in accordance with an amount of warpage of the wafer in order to achieve a substantially flat wafer or a predetermined wafer level. |
| US09576828B2 |
Heat reservoir chamber, and method for thermal treatment
The present disclosure provides a thermal treatment chamber. The thermal treatment chamber includes a wafer holder to hold a to-be-processed wafer; a heat reservoir located under the wafer holder, but being separated from the wafer holder, for adjusting a temperature of the wafer holder based on the to-be-processed wafer; and a first driving unit connected to the heat reservoir for adjusting a distance between the wafer holder and the heat reservoir to adjust the temperature of the wafer holder. |
| US09576827B2 |
Apparatus and method for wafer level bonding
A system for and a method of bonding a first wafer to a second wafer are provided. A second wafer chuck has a second surface, a profile of the second surface being adjustable by a profile control layer. The first wafer is placed on a first surface of a first wafer chuck, and the second wafer is placed on the second surface of the second wafer chuck. The first wafer and the second wafer are warped prior to bonding to form a first warped wafer and a second warped wafer, respectively. The first warped wafer is bonded to the second warped wafer. |
| US09576824B2 |
Etching chamber with subchamber
In an apparatus for etching a semiconductor wafer or sample (101), the semiconductor wafer or sample is placed on a sample holder (104) disposed in a first chamber (103). The combination of the semiconductor wafer or sample and the sample holder is enclosed within a second chamber (130) inside the first chamber. Gas is evacuated from the second chamber and an etching gas is introduced into the second chamber, but not into the first chamber, to etch the semiconductor wafer or sample. |
| US09576823B2 |
Methods of forming a microshield on standard QFN package
Shielded electronic packages may have metallic lead frames to connect an electromagnetic shield to ground. In one embodiment, a metallic lead frame of the electronic package and a surface of the metallic lead frame defines a component area for attaching an electronic component. The metallic lead frame includes a metallic structure associated with the component area that may have a grounding element for connecting to ground and one or more signal connection elements, such as signal leads, for transmitting input and output signals. The electromagnetic shield connects to the metallic lead frame to safely connect to ground while maintaining the signal connection elements isolated from the shield. |
| US09576822B2 |
Encapsulated dies with enhanced thermal performance
The present disclosure relates to enhancing the thermal performance of encapsulated flip chip dies. According to an exemplary process, a plurality of flip chip dies are attached on a top surface of a carrier, and a first mold compound is applied over the top surface of the carrier to encapsulate the plurality of flip chip dies. The first mold compound is thinned down to expose a substrate of each flip chip die and the substrate of each flip chip die is then substantially etched away to provide an etched flip chip die that has an exposed surface at the bottom of a cavity. Next, a second mold compound with high thermal conductivity is applied to substantially fill each cavity and the top surface of the second mold compound is planarized. Finally, the encapsulated etched flip chip dies can be marked, singulated, and tested as a module. |
| US09576820B2 |
Semiconductor structure and method of manufacturing the same
A method of manufacturing a chip fan-out structure, said method includes forming a dry film with a predetermined pattern. Providing a chip wherein the distribution of the pad is corresponding to the dry film's predetermined pattern. Contacting the surface of the pad with the dry film. Forming a molding compound to encapsulate the chip, and removing the dry film to expose the pads. |
| US09576819B2 |
Techniques for increased dopant activation in compound semiconductors
A method of doping a compound semiconductor substrate includes: setting a first substrate temperature for the compound semiconductor substrate in a first temperature range; implanting a dopant species into the compound semiconductor substrate at a first ion dose at the first substrate temperature; and annealing the compound semiconductor substrate after the implanting the ions. In conjunction with the annealing, the first ion dose is effective to generate a first dopant activation in the first temperature range higher than a second dopant activation resulting from implantation of the first ion dose at a second substrate temperature below the first temperature range, and is higher than a third dopant activation resulting from implantation of the first ion dose at a third substrate temperature above the first temperature range. |
| US09576817B1 |
Pattern decomposition for directed self assembly patterns templated by sidewall image transfer
After forming spacers over a hard mask layer using a sidewall image transfer process, a neutral material layer is formed on the portions of the hard mask layer that are not covered by the spacers. The spacers and the neutral material layer guide the self-assembly of a block copolymer material. The microphase separation of the block copolymer material provides a lamella structure of alternating domains of the block copolymer material. |
| US09576807B2 |
Wafer polishing apparatus and method
Disclosed is a wafer processing apparatus. The wafer processing apparatus includes a first surface plate on which a plurality of carriers is arranged, a first gear arranged at the central region of the first surface plate and engaged with the plurality of carriers, a second gear arranged around the edge region of the first surface plate and engaged with the plurality of carriers, a motor rotating the first surface plate in a first direction, a fixing hanger arranged opposite the first surface plate, and a second surface plate hung on the fixing hanger such that a clearance between the first surface plate and the second surface plate may be varied. |
| US09576804B2 |
System and method for mitigating oxide growth in a gate dielectric
Oxide growth of a gate dielectric layer that occurs between processes used in the fabrication of a gate dielectric structure can be reduced. The reduction in oxide growth can be achieved by maintaining the gate dielectric layer in an ambient effective to mitigate oxide growth of the gate dielectric layer between at least two sequential process steps used in the fabrication the gate dielectric structure. Maintaining the gate dielectric layer in an ambient effective to mitigate oxide growth also improves the uniformity of nitrogen implanted in the gate dielectric. |
| US09576802B2 |
Semiconductor device and method for manufacturing the same
A method for manufacturing a semiconductor device is disclosed. The method comprises: forming a T-shape dummy gate structure on the substrate; removing the T-shape dummy gate structure and retaining a T-shape gate trench; forming a T-shape metal gate structure by filling a metal layer in the T-shape gate trench. According to the semiconductor device manufacturing method disclosed in the present application, the overhang phenomenon and the formation of voids are avoided in the subsequent metal gate filling process by forming a T-shape dummy gate and a T-shape gate trench, and the device performance is improved. |
| US09576801B2 |
High dielectric constant/metal gate (HK/MG) compatible floating gate (FG)/ferroelectric dipole non-volatile memory
Non-volatile memory devices and logic devices are fabricated using processes compatible with high dielectric constant/metal gate (HK/MG) processes for increased cell density and larger scale integration. A doped oxide layer, such as a silicon-doped hafnium oxide (HfO2) layer, is implemented as a ferroelectric dipole layer in a nonvolatile memory device. |
| US09576799B2 |
Doping of a substrate via a dopant containing polymer film
Disclosed herein is a method for doping a substrate, comprising disposing a coating of a composition comprising a copolymer, a dopant precursor and a solvent on a substrate; where the copolymer is capable of phase segregating and embedding the dopant precursor while in solution; and annealing the substrate at a temperature of 750 to 1300° C. for 0.1 second to 24 hours to diffuse the dopant into the substrate. Disclosed herein too is a semiconductor substrate comprising embedded dopant domains of diameter 3 to 30 nanometers; where the domains comprise Group 13 or Group 15 atoms, wherein the embedded spherical domains are located within 30 nanometers of the substrate surface. |
| US09576798B2 |
Method for fabricating semiconductor layers including transistor channels having different strain states, and related semiconductor layers
Methods of fabricating a semiconductor structure include providing a semiconductor-on-insulator (SOI) substrate including a base substrate, a strained stressor layer above the base substrate, a surface semiconductor layer, and a dielectric layer between the stressor layer and the surface semiconductor layer. Ions are implanted into or through a first region of the stressor layer, and additional semiconductor material is formed on the surface semiconductor layer above the first region of the stressor layer. The strain state in the first region of the surface semiconductor layer above the first region of the stressor layer is altered, and a trench structure is formed at least partially into the base substrate. The strain state is altered in a second region of the surface semiconductor layer above the second region of the stressor layer. Semiconductor structures are fabricated using such methods. |
| US09576797B2 |
Method of fabricating polysilicon layer, thin film transistor, organic light emitting diode display device including the same, and method of fabricating the same
A method of fabricating a polysilicon layer includes forming a buffer layer on a substrate, forming a metal catalyst layer on the buffer layer, diffusing a metal catalyst into the metal catalyst layer to the buffer layer, removing the metal catalyst layer, forming an amorphous silicon layer on the buffer layer, and annealing the substrate to crystallize the amorphous silicon layer into a polysilicon layer. The thin film transistor includes a substrate, a buffer layer disposed on the substrate, a semiconductor layer disposed on the buffer layer, a gate insulating layer disposed above the substrate and on the semiconductor layer, a gate electrode disposed on the gate insulating layer, a source electrode and a drain electrode both electrically connected to the semiconductor layer, and a metal silicide disposed between the buffer layer and the semiconductor layer. |
| US09576795B2 |
Semiconductor device
An object is to manufacture a highly reliable semiconductor device including a thin film transistor with stable electric characteristics. In a method for manufacturing a semiconductor device including a thin film transistor in which an oxide semiconductor film is used for a semiconductor layer including a channel formation region, heat treatment (for dehydration or dehydrogenation) is performed to improve the purity of the oxide semiconductor film and reduce impurities including moisture or the like. After that, slow cooling is performed under an oxygen atmosphere. Besides impurities including moisture or the like exiting in the oxide semiconductor film, heat treatment causes reduction of impurities including moisture or the like exiting in a gate insulating layer and those in interfaces between the oxide semiconductor film and films which are provided over and below the oxide semiconductor and in contact therewith. |
| US09576779B2 |
System and method for quantitation in mass spectrometry
A method of operating a tandem mass spectrometer system is disclosed including accumulating ions in an ion trap, transmitting a plurality of ions out of the ion trap into a timed-ion selector, applying a pulsed DC voltage to the timed-ion selector, the pulsed DC voltage being modulated to match an ejection time for selecting a first portion of ions from the plurality of ions, corresponding to a specific m/z window, transmitting the first portion of selected ions out of the timed-ion selector into a reaction cell, transmitting dissociation product ions and the remaining ions of the first portion of selected ions out of the reaction cell into a mass analyzer, and mass-selectively transmitting at least some of the fragment ions and the remaining ions of the first portion of selected ions out of the mass analyzer into a detector. |
| US09576776B2 |
Apparatus for sensing ionic current
The invention provides a charged particle sensor (10) for detecting and measuring ionic current generated by charged particles resulting from ionization processes, comprising: a housing (16), a detection electrode (14) enclosed within the housing for collecting the charged particles, and an electrometer (12) having an input connected to the detection electrode for receiving a DC input signal therefrom and an output (18) for supplying a DC measurement signal as output. The housing comprises an electrostatic screen (16) for screening the detection electrode from external electric fields, whereby to reduce the sensitivity of the detection electrode to such fields. The electrostatic screen includes an electrically conducting screening sheet (26) provided as a second electrode facing the detection electrode and formed with interstices to allow the entry of radiation into the housing, and the second electrode and the detection electrode are arranged to be maintained in use at a bias voltage with respect to one another so as to effect charge separation amongst charged particles resulting from ionization processes and thereby produce an ionic current impinging on the detection electrode. |
| US09576773B2 |
Method for etching deep, high-aspect ratio features into glass, fused silica, and quartz materials
A method or process is disclosed for etching deep, high-aspect ratio features into silicon dioxide material layers and substrates, including glass, fused silica, quartz, or similar materials, using a plasma etch technology. The method has application in the fabrication and manufacturing of MEMS, microelectronic, micro-mechanical, photonic and nanotechnology devices in which silicon dioxide material layers or substrates are used and must be patterned and etched. Devices that benefit from the method described in this invention include the fabrication of MEMS gyroscopes, resonators, oscillators, microbalances, accelerometers, for example. The etch method or process allows etch depths ranging from below 10 microns to over 1 millimeter and aspect ratios from less than 1 to 1 to over 10 to 1 with etched feature sidewalls having vertical or near vertical angles. Additionally, the disclosed method provides requirements of the etched substrates to reduce or eliminate undesired effects of an etch. |
| US09576770B2 |
LEED for SEM
A low energy electron diffraction (LEED) detection module (100) includes: a first vacuum chamber for receiving diffracted electrons from a specimen (109); a larger second vacuum chamber connected to the first vacuum chamber to receive the diffracted electrons that have been transported through the first vacuum chamber; a two-dimensional electron detector disposed in the second vacuum chamber to detect the diffracted electrons; a potential shield (106) disposed generally along an inner surface of the first vacuum chamber and an inner surface of the second vacuum chamber; a magnetic lens (105) to expand a beam of the diffracted electrons that have been transported through the first vacuum chamber towards the two-dimensional electron detector; and a generally plane-shaped energy filter (103) to repel electrons having an energy lower than the probe beam (203) of electrons that impinges on the specimen (109). |
| US09576767B2 |
Focused ion beam systems and methods of operation
A focused ion beam system is provided. The focused ion beam system includes a plasma generation chamber configured to contain a source gas that is radiated with microwaves to produce plasma. The plasma generation chamber includes a plasma confinement device configured to confine the plasma in radial and axial directions within the plasma generation chamber and to form a plasma meniscus at an extraction end of the plasma generation chamber. The focused ion beam system also includes a beam extraction chamber configured to extract a focused ion beam from the confined plasma and to focus the extracted focused ion beam on a workpiece. |
| US09576766B2 |
Graphite backscattered electron shield for use in an X-ray tube
The present invention is a shielded anode having an anode with a surface facing an electron beam and a shield configured to encompass the anode surface. The shield has at least one aperture and an internal surface facing the anode surface. The shield internal surface and anode surface are separated by a gap in the range of 1 mm to 10 mm. The shield of the present invention is fabricated from a material, such as graphite, that is substantially transmissive to X-ray photons. |
| US09576764B2 |
Field emitter electrode and method of manufacturing the same
Disclosed is a field emitter electrode including a bonding unit formed on a substrate, and a plurality of carbon nanotubes fixed to the substrate by the bonding unit, in which the bonding unit includes a carbide-based first inorganic filler and a second inorganic filler formed of a metal. |
| US09576762B2 |
Electrical switching apparatus and secondary disconnect assembly with error-proofing features therefor
A secondary disconnect assembly is for electrically connecting and disconnecting accessories to an electrical switching apparatus, such as a power circuit breaker. The secondary disconnect assembly includes a terminal block assembly comprising a mounting member, at least one terminal block removably mounted on the mounting member, and at least one accessory plug structured to be removably inserted into the terminal block to be electrically connected to the terminal block. The terminal block and the accessory plug each include a plurality of error-proofing features. The error-proofing features prohibit insertion of the accessory plug into the terminal block unless the accessory plug is correctly disposed in a predetermined orientation. |
| US09576759B2 |
Switching phase offset for contactor optimization
A system and methods providing for minimizing the arc energy delivered to the pads of a plurality of contactors using a single control coil based on monitoring the electrical sine waves of the three alternating current electrical poles and calculating the instant to energize or deenergize a single control coil. The remainder of the contactors will make or break based on an offset in time from the making or breaking of the control contactor. |
| US09576755B2 |
In-molded resistive and shielding elements
An article of manufacture having an in-molded resistive and/or shielding element and method of making the same are shown and described. In one disclosed method, a resistive and/or shielding element is printed on a film. The film is formed to a desired shape and put in an injection mold. A molten plastic material is introduced into the injection mold to form a rigid structure that retains the film. |
| US09576752B2 |
Clutch mechanism for energy storage device and gas insulated circuit breaker thereof
The present application relates to a clutch mechanism for an energy storage device including a load gear, a drive gear, a one-way bearing, a bushing, and a gear shaft including a gear portion and a clutch portion. The gear shaft includes multiple cylinders, and a push rod, a rotary sleeve and an elastic element located in a cavity of the gear shaft. The push rod includes a push rod slide hole and a push rod connecting hole, for connecting to the gear shaft and the rotary sleeve, respectively. A press block is fixed to the drive gear, the press block being capable of pushing the push rod to slide axially, so as to unlock or lock the bushing and the gear shaft. A gas insulated circuit breaker using such a clutch mechanism is also disclosed. |
| US09576749B2 |
Combination capacitor and strip material arrangement
A combination capacitor and strip material arrangement includes a capacitor element, a strip material, and two connecting wires each including an angled rear mounting part fastened to the strip material, a front contact part providing two contact surfaces connected in series at a predetermined angle and attached to one of positive and negative electrodes of the capacitor element and a middle conducting part having angled portion connected to the angled rear mounting part and an inwardly and transversely extended extension portion connected to the front contact part. Thus, the capacitor element is firmly held down by the contact surfaces of the front contact parts of the two connecting wires for packaging, preventing the capacitor element from deviation, displacement or falling, and thus the capacitor yield can be greatly increased. |
| US09576747B2 |
Hybrid energy storage device
A hybrid energy storage device includes a positive pole including a supercapacitor first electrode and a battery positive electrode located in a same plane and contacts with each other, a negative pole including a supercapacitor second electrode and a battery negative electrode located in a same plane and contacts with each other, and a separator located between the positive pole and the negative pole. The supercapacitor second electrode, the battery negative electrode, the supercapacitor first electrode, the battery positive electrode, and the separator are planar structures. The supercapacitor first electrode, the supercapacitor second electrode, the battery positive electrode, the battery negative electrode, the separator and electrolyte are packaged in a shell. |
| US09576746B2 |
Energy storage module including conductive member secured on bus bar and in contact with pad of wiring board
An energy storage module in which a plurality of energy storage cells including electrode terminals are stacked, includes a bus bar that electrically connects a plurality of electrode terminals, a conductive member that is secured on the bus bar, a detection section that detects a voltage of each of the energy storage cells, and a wiring board, a wire that is electrically connected to the detection section, and a pad that is connected to the wire being formed on the wiring board, the conductive member coming in contact with the pad. |
| US09576743B2 |
Solid electrolytic capacitor with integrated fuse assembly
A solid electrolytic capacitor with an integrated fuse assembly is provided. The fuse can be secured in a recess formed in a face of the porous anode body of the capacitor. When the fuse is secured in the recess, the fuse can be substantially flush with the face of the porous anode body in which the recess is formed. Further, the equivalent series resistance (ESR) of the fuse is reduced because the length of the connection between the fuse and the porous anode body is reduced. Further, because the fuse is integrated into the porous anode body, the capacitor can be assembled onto a circuit board via standard pick and place equipment. |
| US09576742B2 |
Solid electrolyte capacitor and manufacturing method for same
A solid electrolyte capacitor includes an anode foil on a surface of which an oxide film is formed, a cathode foil, and a separator. A gap between the anode foil and the cathode foil is filled with a solid electrolyte which contains a conductive fine particles containing a conductive polymer compound and a hydrophilic polymer compound. The hydrophilic polymer compound has a structure expressed by a following chemical formula (I) and a structure expressed by a following chemical formula (II). —(R1—O)— (I) —(R2—O)— (II) In the formula (I) and the formula (II), R1 and R2 are groups selected from the set consisting of a substituted or unsubstituted alkylene, a substituted or unsubstituted alkenylene, and a substituted or unsubstituted phenylene, and represent mutually different groups. |
| US09576740B2 |
Tantalum capacitor
A tantalum capacitor may include two tantalum wires exposed through two surfaces of a capacitor body opposing each other, first and second positive electrode terminals, connected to the tantalum wires, respectively, and disposed on two surfaces of a molded part opposing each other, and a negative electrode terminal disposed between the first and second positive electrode terminals. The negative electrode terminal may be electrically connected to the capacitor body by a via electrode or a pad electrode disposed between the negative electrode terminal and the capacitor body. |
| US09576736B2 |
Method of manufacturing electronic component
A method of manufacturing an electronic component includes the steps of: preparing a first block formed by stacking a plurality of green sheets serving as an element body; cutting the first block in a first direction into a plurality of second blocks such that a portion of an internal conductor connected to an external electrode is exposed at a cut surface; and cutting each of the plurality of second blocks in a second direction crossing the first direction such that the internal conductor exposed at each of both cut surfaces is located in the center of a portion serving as each element body in the first direction in each of the plurality of second blocks. |
| US09576734B2 |
Vertical stack approach in low profile aluminum solid electrolytic capacitors
An improved capacitor and method of making an improved capacitor is set forth. The capacitor has planer anodes with each anode comprising a fusion end and a separated end and the anodes are in parallel arrangement with each anode in direct electrical contact with all adjacent anodes at the fusion end. A dielectric is on the said separated end of each anode wherein the dielectric covers at least an active area of the capacitor. Spacers separate adjacent dielectrics and the interstitial space between the adjacent dielectrics and spacers has a conductive material in therein. |
| US09576732B2 |
Multilayer ceramic capacitor and mounting board therefor
There is provided a multilayer ceramic capacitor including: a ceramic body including dielectric layers and satisfying T/W>1.1 when a width thereof is defined as W and a thickness thereof is defined as T; first internal electrodes each having a first lead part exposed to at least one side surface of the ceramic body; second internal electrodes each having a second lead part exposed to the at least one side surface of the ceramic body; first and second external electrodes electrically connected to the first lead part and the second lead part, respectively, and extended from the side surface of the ceramic body to which the first lead part and the second lead part are exposed to at least one of the first and second main surfaces; and an insulating layer formed to cover the first and second external electrodes formed on the first and second side surfaces. |
| US09576730B2 |
Dielectric ceramic composition, dielectric material, and multilayer ceramic capacitor containing the same
A dielectric ceramic composition contains a base material main ingredient and an accessory ingredient. The base material main ingredient includes a first base material main ingredient containing BaTiO3 and a second base material main ingredient containing (Na1-yKy)NbO3. The base material main ingredient is represented by (1−x)BaTiO3-x(Na1-yKy)NbO3, in which x and y satisfy 0.005≦x≦0.5 and 0.3≦y≦1.0, respectively. |
| US09576729B2 |
Multilayer ceramic electronic component and method of manufacturing the same
There is provided a multilayer ceramic electronic component including: a ceramic body in which internal electrodes and dielectric layers containing a barium titanate-based compound containing calcium (Ca) are alternately stacked; and external electrodes disposed on outer surfaces of the ceramic body and electrically connected to the internal electrodes. The dielectric layer includes interfacial portions adjacent to the internal electrodes and a central portion disposed between the interfacial portions, the interfacial portion having a calcium (Ca) concentration higher than that of the central portion. |
| US09576727B2 |
Capacitor, capacitor mounting structure, and taped electronic component series
In a capacitor main body, a dimension along the thickness direction of a first region where a first inner electrode and a second inner electrode are provided is t1, a dimension along the thickness direction of a second region that is positioned on the side of a first main surface relative to the first region is t2, and a dimension along the thickness direction of a third region that is positioned on the side of a second main surface relative to the first region is t3. A condition of t2/t1> about 0.15 and a condition of t3/t1> about 0.15 are satisfied. |
| US09576725B2 |
Method for reducing interwinding capacitance current in an isolation transformer
Systems and methods are disclosed for reducing an interwinding capacitance current in a transformer. In certain embodiments, the transformer includes a coupling winding and a primary winding that encircles a portion of the coupling winding. Additionally, the transformer includes a secondary winding that encircles a portion of the coupling winding. The transformer includes a shield terminal which is electrically coupled to the coupling winding. The shield terminal directs currents, such as interwinding capacitance currents, in the coupling winding to ground. |
| US09576721B2 |
Electronic component and method for manufacturing electronic component
An electronic component includes a magnetic core member, a winding and a magnetic exterior body. The magnetic core member has a flat base and a core. The flat base has a top surface, a bottom surface, a first side surface and a second side surface opposite to the first side surface. The core is located on the top surface of the flat base. A winding has an edgewise coil and two non-wound flat wires that extend from the edgewise coil. A magnetic exterior body covers at least the core and the edgewise coil. The two non-wound flat wires continuously extend along the top surface, the first side surface, the bottom surface and the second side surface of the flat base in this order. The two non-wound flat wires located on the bottom surface work as electrodes. |
| US09576719B2 |
High temperature electromagnetic coil assemblies including brazed braided lead wires
Embodiments of an electromagnetic coil assembly are provided, as are methods for the manufacture of an electromagnetic coil assembly. In one embodiment, the method for manufacturing an electromagnetic coil assembly includes the steps of providing a braided aluminum lead wire having a first end portion and a second end portion, brazing the first end portion of the braided aluminum lead wire to a first electrically-conductive interconnect member, and winding a magnet wire into an electromagnetic coil. The second end portion of the braided aluminum lead wire is joined to the magnet wire after the step of brazing. |
| US09576715B2 |
Device for magnetizing ring-shaped magnet for BLDC motor
Provided is a device for magnetizing a ring-shaped magnet for a brushless direct current (BLDC) motor, including: a rotor having a ring-shaped magnet installed on an outer peripheral surface of a rotor core; and a plurality of magnetizing yokes disposed so as to be spaced apart from each other by a predetermined interval while facing an outer peripheral surface of the ring-shaped magnet, magnetizing the ring-shaped magnet to form even-numbered unit magnets, and magnetizing the ring-shaped magnet only in regions except for one end and the other end of the unit magnets. |
| US09576714B2 |
Magnetic actuator
A magnetic actuator includes: a movable unit, movable between a first position and a second position, and including an integrally formed eddy-current component and first magnet yoke component; a second magnet yoke component to form a magnetic circuit with the first magnet yoke component; an electromagnetic coil capable of generating an exciting magnetic field when being energized, magnetic lines generated thereby being energized penetrating the magnetic circuit formed by the first and second magnet yoke components; an eddy-current coil to enable an eddy current to be generated in the eddy-current component, to produce an electromagnetic repulsive force to the movable unit; and a permanent magnetic holding component to hold the movable unit in the first position or the second position. The magnetic actuator can simplify the actuator, reduce the number of components and the size thereof, as well as reducing the energy consumption and improving the stability thereof. |
| US09576710B2 |
Magnetic device and method of manufacturing the same
A magnetic device comprises a lead frame, a first core body and a coil. The lead frame has a first portion and a second portion spaced apart from the first portion. A first core body is disposed on the lead frame, wherein the first core body comprises a first through opening and a second through opening. A coil is disposed on the first core body, wherein the coil has a first terminal and a second terminal, wherein the first portion is electrically connected with the first terminal via the first through opening, and the second portion is electrically connected with the second terminal via the second through opening, respectively. |
| US09576709B2 |
Transformer having a stacked core
A transformer is provided having a stacked core with a pair of outer legs extending between a pair of yokes. The core is arranged in a plurality of layers. Each of the layers includes a pair of yoke plates and a pair of outer leg plates. In an inner-most layer, the width of each yoke plate is less than the width of each outer leg plate. In each of the layers, the inner points of the outer leg plates are substantially in contact with the yoke plates. The cross-section of the inner leg and the outer legs may be rectangular or cruciform. |
| US09576704B2 |
Wire harness waterproof structure
A wire harness waterproof structure is provided that allows the water sealant to be visually checked, enables reliably filling of the periphery of a splice portion with the water sealant, and enables water in an unfilled region to easily drain. The wire harness waterproof structure includes electrical lines forming an intermediate splice portion, an exterior member surrounding the entire circumference of the intermediate splice portion and adjacent end portions, and a curing layer made up of a water sealant wherein a gap between the intermediate splice portion and the exterior member is filled. The waterproof sheet material is curved so as to surround the splice portion and the adjacent end portions. The sheet material has seeping holes allowing a portion of the curing layer to seep, and enable moisture to be drained to the outer surface in a region not filled with the water sealant. |
| US09576699B2 |
Wiring member, method of manufacturing the same, method of designing the same, and electronic apparatus
There is provided a wiring member including: a wiring substrate including wirings including a ground line, and a first insulating layer that covers the wirings and has an opening portion exposing at least a portion of the ground line; a conductive sheet sandwiched between a second insulating layer and a conductive bonding layer and disposed on the first insulating layer in a state where the conductive sheet is folded so that the second insulating layers faces to each other, and in which the conductive bonding layer in a portion which is not folded is electrically connected to the ground line through the opening portion; and a shielding member disposed on the wiring substrate and the conductive sheet to be bonded to the conductive bonding layer in a portion of the conductive sheet which is folded, and is electrically connected to the ground line through the folded portion. |
| US09576697B2 |
Multilayer electronic component and conductive paste composition for internal electrode
A multilayer electronic component may include a multilayer body including a plurality of magnetic material layers, and an internal electrode disposed in the multilayer body. The internal electrode may contain a conductive metal and glass, and the glass contains a vanadium (V) oxide.Also, a conductive paste composition for an internal electrode includes a conductive metal and glass, wherein the glass contains a vanadium (V) oxide. |
| US09576696B2 |
Electrode substrate including lead interconnect connected to transparent electrode, and display device and touch panel having the same
A drive substrate, including: an insulating substrate (10); an internal connection terminal (12b) made of ITO or IZO provided on the substrate (10); and a lead interconnect (14) that is connected to the connection terminal (12b) with one end thereof lying on the connection terminal and is led out to an outer edge of the insulating substrate (10) at the other end thereof, wherein a contact portion of the lead interconnect (14) with the internal connection terminal (12b) is formed of a barrier metal layer (15A) made of titanium nitride (TiN) and the nitride concentration thereof is between 35 atoms/cm2 and 65 atoms/cm2 inclusive. |
| US09576693B2 |
Metal material for electronic component and method for manufacturing the same
There are provided a metal material for electronic component which has low insertability/extractability, low whisker formability, and high durability, and a method for manufacturing the metal material. The metal material 10 for electronic components has a base material 11, an A layer 14 constituting a surface layer on the base material 11 and formed of Sn, In or an alloy thereof, and a B layer 13 constituting a middle layer provided between the base material 11 and the A layer 14 and formed of Ag, Au, Pt, Pd, Ru, Rh, Os, Ir or an alloy thereof, wherein the surface layer (A layer) 14 has a thickness of 0.002 to 0.2 μm, and the middle layer (B layer) 13 has a thickness of 0.001 to 0.3 μm. |
| US09576690B2 |
Apparatus and methods for transmutation of elements
Examples of apparatus and methods for transmutation of an element are disclosed. An apparatus can include a neutron emitter configured to emit neutrons with a neutron output, a neutron moderator configured to reduce the average energy of the neutron output to produce a moderated neutron output, a target configured to absorb neutrons when exposed to the moderated neutron output, the absorption of the neutrons by the target producing a transmuted element, and an extractor configured to extract the desired element. A method can include producing a neutron output, reducing the average energy of the neutron output with a neutron moderator to produce a moderated neutron output, absorbing neutrons from the moderated neutron output with the target to generate a transmuted element, and eluting a solution through the target to extract a desired element. In some examples, the target includes molybdenum-98, and the desired element includes technetium-99m. |
| US09576688B2 |
Movement of materials in a nuclear reactor
Illustrative embodiments provide for the operation and simulation of the operation of fission reactors, including the movement of materials within reactors. Illustrative embodiments and aspects include, without limitation, nuclear fission reactors and reactor modules, including modular nuclear fission reactors and reactor modules, nuclear fission deflagration wave reactors and reactor modules, modular nuclear fission deflagration wave reactors and modules, methods of operating nuclear reactors and modules including the aforementioned, methods of simulating operating nuclear reactors and modules including the aforementioned, and the like. |