最新美国发明专利第2017-01-31期 - 专利汇|PatentHub专利检索|专利查询网|发明专利查询分析

Document	Document Title
US09559518B2	System and method of solar module biasing A system and method for biasing one or more arrays of photovoltaic modules. An array of biasing photovoltaic modules is coupled to an array of photovoltaic modules to be biased. The coupling may be via a current regulating device. The array of biasing photovoltaic modules and current regulating device provide a forward bias current to the array of photovoltaic modules to be biased. The array of biasing photovoltaic modules includes more photovoltaic modules than the array of photovoltaic modules to be biased.
US09559517B2	Encapsulation of components and a low energy circuit for hazardous locations Embodiments of the disclosure provide an encapsulated compressor overload, an encapsulated compressor relay start, an encapsulated head pressure control switch and a wiring diagram for a circuit for air conditioning units which prevent gases from being ignited by means of encapsulating sparking components, use of solid-state switching devices, and/or wiring circuits in such a way that open contacts do not contain enough energy to produce a spark capable of igniting the atmosphere.
US09559512B1	Programmable rise time controlled load switch and integrated temperature sensor system with interface bus A fully integrated circuit configuration that can be used to control the slew rate of a PMOS load switch is described. The circuit also integrates a multichannel temperature sensing system which can be coupled to an external set of temperature sensors, preferably non-linear PTC (positive temperature coefficient) sensors to provide both current inrush control as well as thermal overload protection. A communications data bus, such as an I2C bus, is employed to provide temperature feedback for the system controller so that the system can better control the temperature of its own environment.
US09559510B2	Signalling device for a transmission line The invention relates to a signalling device (1) for an aerial transmission line (2) comprising two signalling elements (3, 4) which are configured to be mounted one against the other around a conductor portion (2) of the transmission line, in which at least one of the two signalling elements (3, 4) comprises at least partially an outer signalling coating in the context of air safety, which device is characterized in that the two signalling elements (3, 4) are at least partially electrically conductive and at least one of the two signalling elements (3, 4) comprises a clamping means (5) which is configured to clamp the conductor portion (2) of the transmission line. The invention also relates to a method for assembling such a device on a high-voltage aerial transmission line.
US09559509B2	Power supply control device A power supply control device includes: a control board that is configured to control a voltage of a battery module; and a bus bar module that is configured to electrically connect the control board and the battery module, the control board and the bus bar module are arranged in a stacked manner, and connection terminals of the bus bar module which are connected to the battery module are exposed when viewed from the control board.
US09559495B1	System and method for optical amplification An optical amplifier includes a plurality of photon amplifying regions. Each photon amplifying region includes a bottom electrode, an insulating layer formed over the bottom electrode, and having a through hole to the bottom electrode, a semiconductor layer and a top electrode formed over the semiconductor layer, wherein the top and bottom electrodes electrically contact the semiconductor layer. The semiconductor layer is formed over the insulating layer and in the through hole, and has a semiconductor active region in the through hole. The semiconductor active region has a direct electronic band gap with a conduction band edge, and is embedded within a photonic crystal having an electromagnetic band gap having photon energies overlapping the energy of the conduction band edge of the electronic band gap such that spontaneous emission of photons in the semiconductor active region is suppressed.
US09559493B2	Power monitoring device and transmitter having same A power monitoring device includes: a silicon support layer being attached to a PCB board; a glass layer disposed above the silicon support layer; at least one sensing element disposed on the glass layer; and at least one metal pad disposed on the glass layer. The sensing element is suspended over a laser element that is attached to the PCB board and configured for sensing light directed thereto that is emitted by the laser element. A cavity is defined in the silicon support layer and configured for accommodating the laser element. A transmitter that includes the power monitoring device is also provided.
US09559492B2	Laser system with reduced apparent speckle Laser systems with reduced apparent speckle are provided. The laser systems emit laser light having different mode structures that change within a time period of an integration period of an imaging system used to observe a field of view that is at least in part illuminated by the laser systems.
US09559483B2	High power parallel fiber arrays High power parallel fiber arrays for the amplification of high peak power pulses are described. Fiber arrays based on individual fiber amplifiers as well as fiber arrays based on multi-core fibers can be implemented. The optical phase between the individual fiber amplifier elements of the fiber array is measured and controlled using a variety of phase detection and compensation techniques. High power fiber array amplifiers can be used for EUV and X-ray generation as well as pumping of parametric amplifiers.
US09559481B2	Large aperture uniform-amplification laser module A large aperture uniform-amplification laser module including a longer, larger diameter crystal bar is disclosed. The laser module includes a ring-shaped pump bar structure, a crystal bar, a glass sleeve, and a structural component. The pump bar structure includes pump blocks composed of a bar, a cooling heat sink, and a cooling pipe. The bar is connected with the heat sink, and a cooling water channel is provided inside of the cooling heat sink. Heat sinks are provided with outlet pipes and an inlet pipes to communicate with water channels, which are connected in series through the cooling pipes to form a ring shape. The bar is close to a center axis of the ring-shaped pump bar structure. The crystal bar is provided in the glass sleeve. A plurality of the ring-shaped pump bar structures are sleeved on the glass sleeve along the length of the glass sleeve.
US09559479B2	Angled connector for connecting two devices and having a fastening device Embodiments of the present disclosure include an apparatus and a method for connecting a first device and second device. An apparatus includes an angled connector configured to connect to a first device to a second device, the first device and the second device configured to communicate through signal paths in the connector, the signal paths configured to pass digital data signals, a fastening device configured to secure the angled connector to the first device.
US09559475B1	Plug assemblies A plug assembly includes a plug housing, six connector cavities, and a first and a second electrical connector. The plug housing is configured to be positioned in a receptacle assembly. The six connector cavities are defined in the plug housing and radially disposed around a connecting face in compliance with the Society of Automotive Engineers (“SAE”) J2863 standard. The first electrical connector is disposed and positioned with respect to a first connector cavity of the six connector cavities such that a first contact surface of the first electrical connector is contactable within the first connector cavity. The second electrical connector is disposed and positioned with respect to the first connector cavity such that a second contact surface of the second electrical connector is contactable within the first connector cavity and such that the second electrical connector is displaced relative to the first electrical connector and electrically insulated therefrom.
US09559472B2	Wire arrangement for hand-reachable USB charger related devices A desktop USB-charger related product has space to receive an AC power-wire, USB-charger wire, or another charging related wire(s). The USB-charger related product is arranged to be installed on a desk top at a hand-reachable distance from a user by attachment means so that there is no need for the user to bend body or knee in order to charge a device using the charger. The USB-charger related product has at least one USB-port that can supply a desired output-current in the range of from 1.0 A to 12 A and 3.5VDC to 8.5VDC by converting input AC power ranging from 110VAC to 250VAC. The USB-charger product may also incorporate at least one additional device such as an AC outlets, sensor, motion sensor, remote control, time display, LEDs, other lights, a power fail device, a smell device, an audio device, a video device, or other electric or electronic devices.
US09559471B2	Coaxial cable and connector with capacitive coupling A coaxial cable-connector assembly includes a coaxial cable and a coaxial cable connector. The coaxial cable includes: a central conductor having a connector end; a dielectric layer that overlies the central conductor; and an outer conductor that overlies the dielectric layer having a connector end. The coaxial connector includes: a central conductor extension configured to mate with a mating connector at one end; a first insulative layer interposed between an opposed second end of the central conductor extension and the connector end of the central conductor; an outer conductor extension configured to mate with a mating connector at one end; and a second insulative layer interposed between an opposed second end of the outer conductor extension and the connector end of the outer conductor. This configuration can reduce and/or avoid PIM within the connection of two coaxial connectors.
US09559466B2	Communications plugs and patch cords with mode conversion control circuitry Patch cords include a communications cable that has first through eighth conductors that are arranged as four twisted pairs and a plug attached thereto. The plug includes a housing that receives the cable, first through eighth plug contacts, and a printed circuit board that includes first through eighth conductive paths that connect the first through eighth conductors to the respective first through eighth plug contacts. The plug further includes a first crosstalk injection circuit between the second conductive path and the sixth conductive path and a second crosstalk injection circuit between the first conductive path and the sixth conductive path.
US09559464B2	Positive locking confirmation mechanism for battery contact of electric vehicle The present invention provides a positive locking confirmation mechanism for a battery contact of an electric vehicle. The positive locking confirmation mechanism uses a terminal bolt with an expansive tail section and judges whether the battery contact is in a positive locking state according to a voltage signal measured by a battery management unit. Before the battery contact is possibly not in the positive locking state, the system notifies the user to check and repair the possibly-loosened contact. Consequently, the problem of losing power or generating electric arc in the battery box will be avoided.
US09559463B2	Automated tightener for a wet mateable connection assembly Automated tightener for a wet mateable connection assembly includes a first and a second watertight case, the automated tightener bearing a fixing assembly and including a first and a second sliding portion arranged in a parallel lay, connected together by a push/pull actuator substantially orthogonal thereto, each sliding portion being provided with operable engagers.
US09559462B1	Port connector securement device The present invention is a port connector securement device comprising a resting piece, a planar surface, and at least one projection extending from the bottom of the planar surface where the at least one projection rests within at least one slot of an USB port when the port connector securement device is slideably insertable, along with the USB cable into the USB port to ensure that the USB cable cannot be removed upon the port connector securement device insertion into the USB port.
US09559460B2	Lever-type connector with regulating protrusion on male housing that engages lever on female housing to achieve connection without inclination between male and female housings A lever-type connector has a female housing (F) with a tubular fitting (13) that includes a lever accommodating portion (15) for accommodating a lever (30) and an inner regulating wall (16) on a side opposite to the lever accommodating portion (15). A male housing (M) has a receptacle (43) with an outer regulating wall (44) facing the inner regulating wall (16), and has a supporting wall (45) facing the lever accommodating portion (15). A cam follower (47) and a regulating protrusion (48) are formed on an outer surface of the supporting wall (45) and can contact the lever (30) by being inserted into an opening (23) of the lever accommodating portion (15). Contact of the regulating protrusion (48) and the lever (30) regulates inclination of the housings (F, M) in the process of rotating the lever (30).
US09559459B2	Push-lock electrical connector An inline multi-pin connector includes cylindrical male and female connector members which are electrically connected together by pushing the two members together end-to-end. Either the male or the female connector member has a metal cylinder disposed about its conductive pins or sockets, which are adapted for mutual engagement, while the other connector member is provided with inner threads. The metal cylinder includes plural resilient, spaced arms, or tabs, disposed about its outer periphery and urged radially outward and into engagement with the other member's threads to connect the two connector members. Coaxial seals are disposed between and in contact with the two members as is a compressible O-ring seal. The outer periphery of the inner member's cylindrical insulator is provided with alternating peaks and valleys, while the other member's metal cylinder is provided with inwardly extending resilient arms which are adapted for positioning within a respective facing valley to prevent vibration-induced disconnection.
US09559454B2	USB memory device The present invention is a USB memory device comprising a chip-on-board (COB) package having a flash memory and a flash memory controller embedded within, a COB carrier for storing the COB package comprising a tray having a G-shaped block with a pair of side lock bumps, and a metal housing for inserting the COB carrier having a top surface, a bottom surface, a top rectangular cut out, a bottom rectangular cut out, a pair of ends, a pair of side cut outs, a pair of top rectangular openings and a pair of bottom rectangular openings. The COB package, the COB carrier and the metal housing are used to assemble the device by inserting the COB carrier from either of the pair of ends and sliding the COB carrier within the metal housing until the pair of side lock bumps interlocks with the pair of side cut outs.
US09559453B1	Heavy current mini connector A heavy current mini connector. The connector has a power terminal assembly and a holder. The power terminal assembly includes a set of resilient contacting tabs. The power terminal assembly and a busbar conductive plate are inserted into each other. The power terminal assembly is conductively connected with a PCB and covered on its outer side with the holder made from steel. The set of resilient contacting tabs is located at the front portion of the power terminal assembly and in contact with the busbar conductive plate. The clamping plates, fastened to the base and provided in the front of the holder, are clamped to the two sides of the power terminal assembly. The base is located on the rear of the holder and is clamped onto the outside of the rear part of the power terminal assembly. The ventilation apertures are situated on the middle of the base.
US09559452B1	Housing for electrical contact A housing for an electrical contact that includes a unitary one-piece body that has an internal bore that extends between a front end and an opposite rear end of the unitary one-piece body and is adapted to receive the electrical contact. A front holding member extends into the internal bore from an inner surface of the internal bore, and the front holding member is located at the front end of the one-piece body. A rear holding member extends into the internal bore, and is disposed on the inner surface of the internal bore at the rear end of the one-piece body. A contact retaining member receiving area is defined in the internal bore between the front holding member and the rear holding member for capturing a contact retaining member therebetween.
US09559449B2	Printed wiring board and connector connecting the wiring board A printed wiring board (1) includes: a base substrate (3); a plurality of pads (15a, 17a) for electrical connection that are disposed at one surface side of the base substrate (3) and at a connection end portion (13) to be connected with another electronic component (50); wirings (9, 11) that are connected with the pads (15a, 17a); and engageable parts (28, 29) that are formed at side edge parts of the connection end portion (13) and are to be engaged with engagement parts (58) of the other electronic component (50) in the direction of disconnection. The flexible printed wiring board (1) further includes: reinforcement layers (31, 32) that are disposed at the one surface side of the base substrate (3) and at a frontward side with respect to the engageable parts (28, 29) when viewed in the direction of connection with the other electronic component and that are formed integrally with the pads (15a); and insulating layers (34, 35) that cover the reinforcement layers (31, 32).
US09559448B2	Board edge connector A board edge connector to which a board is inserted along an oblique direction relative to its fixed posture includes a main body, a plurality of contacts arranged in juxtaposition on the main body along a direction perpendicular to an insertion direction of the board, and a cover member covering the main body. The main body includes a base portion on which the multiple contacts are juxtaposed and a pair of arm portions extending from the base portion along opposed lateral edges of the board which assumes a fixed posture. The cover member includes an attaching portion covering the base portion and a pair of arm members covering lateral faces of the pair of arm portions, the pair of arm members being formed integral with the attaching portion.
US09559447B2	Mechanical contact retention within an electrical connector An electrical connector and a method of make the same. The electrical connector includes an insulator housing formed with a plurality of through holes extending from a first surface to a second surface of the insulator housing. A flowable polymeric material is located adjacent at least one retention region in each of the through holes. Contact members are positioned within each of the through holes. Energy and/or pressure is applied to the electrical connector so the flowable polymeric material flows into engagement with retention features on the contact members. The electrical connector is cooled so the flowable polymeric material fuses to the contact members in a retention regions.
US09559444B1	Quick connection battery terminal A battery terminal for terminating to a terminal post of a battery. A lever is rotatably mounted to a lever engaging portion and includes an engagement member with a pair of mounting members extending therefrom. The mounting members are spaced apart by a first distance which is greater than a second distance which is the distance that the lever receiving members are spaced from each other. The mounting members are positioned to the outside of the lever receiving members. Camming members extend from the mounting members. The camming members have engaging portions which extend inward from the mounting members. The camming members and the engaging portions have an elastic spring behavior which allows the camming members and the engaging portions to be elastically deformed when the lever is rotated between an open position and a closed position.
US09559442B2	Sequencer terminal block, sequencer, and sequencer unit To provide a sequencer terminal block having a terminal connection surface on which a plurality of terminal connection portions, to which terminals can be respectively connected, are arrayed. The sequencer terminal block includes a band attachment portion formed to protrude in a first direction parallel to an array direction of the terminal connection portions. The band attachment portion includes two first legs formed to protrude in the first direction, and a first joining portion that joins ends of the first legs to each other. An area surrounded by an attachment-portion forming surface on which the band attachment portion is formed, the first legs, and the first joining portion becomes an insertion hole into which a banding band can be inserted.
US09559435B2	Systems, apparatus, and related methods for weather-proofed wire splicings Disclosed are systems, apparatus and related methods for making weather, fire, or water-proofed wire-to-wire electrical connections.
US09559434B2	Method for closed-loop tuner in a receiver antenna Described herein are architectures, platforms and methods for implementing a closed-loop tuner in a receiver circuitry of a portable device. For example, the closed-loop tuner is based upon a configured or an inherent local oscillator (LO) leakage power in the receiver circuitry of the portable device.
US09559432B2	Antenna control system and multi-frequency shared antenna A multi-frequency shared antenna comprises a low frequency radiation array and a first high frequency radiation array both of which are disposed on a reflection plate and provided with power by different feeding networks. The first high frequency radiation array comprises a number of high frequency radiation units, at least partial high frequency radiation units are arranged on a same axis which overlaps one of two axes of the low frequency radiation array, in all high frequency radiation units arranged on said axis, at least partial high frequency radiation units are nested with the low frequency radiation units arranged on the same axis, and the orthogonal projection area of these nested high frequency radiation units on the reflection plate falls within the orthogonal projection area of the corresponding low frequency radiation units on the same reflection plate.
US09559426B1	Frequency selective surfaces A switchable Frequency Selective Surface (FSS) in which the switchable elements are Plasma-shells. Plasma-shells as described herein allow for control or ‘reconfiguration’ of the FSS electromagnetic (EM) properties.
US09559423B2	Wideband deformed dipole antenna for LTE and GPS bands A deformed dipole is suggested with trace elements configured for wideband LTE and GPS operation. The deformed dipole comprises a first dipole conductor disposed on a first surface and first side of the circuit board and a second dipole conductor disposed on an opposite surface and opposite side of the circuit board.
US09559419B2	Reflector and a multi band antenna The present invention relates to a reflector for an antenna comprising a first reflector assembly and at least one second reflector assembly, the first reflector assembly having a first reflector structure adapted for a first antenna frequency band f1 and at least one second antenna frequency band f2; the at least one second reflector assembly having a second reflector structure adapted for the first antenna frequency band f1 and at least one third antenna frequency band f3; and wherein the first reflector assembly and the at least one second reflector assembly are electrically coupled so that the first reflector assembly and the at least one second reflector assembly together form a common reflector structure adapted for the first f1, at least one second f2 and at least one third f3 antenna frequency bands. Furthermore, the invention also relates to a multi band antenna comprising at least one such reflector.
US09559418B2	Phase shifter having dielectric members inserted into a movable support frame A phase shifter includes dielectric members including facing portions facing a signal line formed on a surface of a substrate and being made of a dielectric material, a supporting member configured to support the dielectric members and receive a moving force for moving the dielectric members in a direction which is parallel to the substrate and crosses the signal line, and a moving mechanism configured to apply the moving force to the supporting member. At least either the dielectric members or the supporting member is provided with a protrusion configured to keep a distance between the facing portions of the dielectric members and the signal line.
US09559416B2	Accessing LP transponders with CP terminals via wavefront multiplexing techniques The invention is about a method and apparatus for grouping multiple satellite transponders with both (LP) polarization formats in different frequencies through Wave-Front (WF) Multiplexing (muxing) techniques for ground terminals with incompatible (CP) polarization formats. As a result of this invention, linear polarized (LP) transponders can be accessed and efficiently utilized by circularly polarized (CP) ground terminals and vice versa. This invention consists of conventional ground terminals, a unique organization of space assets, and a unique polarization alignment processor. The applications of wavefront multiplexing techniques to satellite communications offer many potential advantages, including improved flexibility and utility efficiency of existing space assets. Our proposed “Polarization Utility Waveforms” is an entirely new concept in VSAT and Earth Station Antenna diversity. The implementation enables antennas to switch between different polarization formats at the press of a button, and provides teleport operators with greater flexibility in how they manage their assets.
US09559412B2	Wireless portable electronic device having a conductive body that functions as a radiator An apparatus, such as a wireless portable electronic device, is provided that includes a body formed of a conductive material. The body defines an internal cavity and an opening. The wireless portable electronic device also includes a ground plane disposed within the internal cavity and electromagnetically coupled to the body. The wireless portable electronic device additionally includes an antenna, such as a loop antenna or a monopole, disposed within the internal cavity and electromagnetically coupled to the body such that the body functions as a radiator. The wireless portable electronic device further includes a three-dimensional ground plane extension disposed within the internal cavity so that at least a part of the three-dimensional ground plane extension overlies the antenna. The three-dimensional ground plane extension is galvanically coupled to the ground plane and electromagnetically coupled to the body.
US09559410B2	Breakaway mast A sensor mounting bracket for attachment to a vehicle including a mast configured to support a sensor at a first end, a base pivotably connected to the mast at a second end, a shock absorber attached between the mast and the base, wherein the base is attached to a vehicle and the shock absorber predisposes the mast to either a deployed position or a stowed position.
US09559406B2	Electronic device with dual clutch barrel cavity antennas An electronic device has antennas formed from cavity antenna structures. The electronic device may have a metal housing. The metal housing may have an upper housing in which a component such as a display is mounted and a lower housing in which a component such as a keyboard is mounted. Hinges may be used to mount the upper housing to the lower housing for rotation about a rotational axis. Cavity antennas may be formed in a clutch barrel region located between the hinges and running along the rotational axis. A flexible printed circuit may be formed between the cavity antennas. Each cavity antenna may have a first end that is adjacent to one of the hinges and a second end that is adjacent to the flexible printed circuit. Cavity walls for the cavity antennas may be formed from metal housing structures such as metal portions of the lower housing.
US09559402B2	Combiner including land pattern formed on printed board The combiner includes a printed board, first and second conductor plates, and first and second conductor parts. The printed board includes a hole passing from a first surface to a second surface opposite to the first surface. The first conductor plate is made of a copper plate and mounted on the first surface of the printed board to close the hole. The second conductor plate is made of a copper plate and mounted on the second surface of the printed board to close the hole. The first conductor part is opposed to the first conductor plate with a predetermined space between the first conductor part and the first conductor plate. The second conductor part is opposed to the second conductor plate with a predetermined space between the second conductor part and the second conductor plate.
US09559401B2	Printed board and wiring arrangement method A printed board includes: a transmission line that includes a curved region in which a first signal line and a second signal line are arranged separately from each other and curved, wherein the second signal line is arranged on an inner side of the curved region with respect to the first signal line in the curved region and has a portion extending away from the first signal line on a path arranged to be circuitous and extending partially toward the first signal line in the curved region.
US09559399B2	Dielectric waveguide input/output structure and dielectric waveguide duplexer using the same The present invention provides a dielectric waveguide input/output structure for connecting to a coaxial connector a plurality of dielectric waveguide resonators each comprising an approximately parallelepiped-shaped dielectric block, wherein the plurality of dielectric waveguide resonators include a first dielectric waveguide resonator and a second dielectric waveguide resonator each having an exterior coated with an electrically conductive film, except for a coupling window, wherein each of the coupling window is formed with a probe composed of an electrically conductive film, the probe having one end connected to a feeding point, and the other end connected to the electrically conductive film, and wherein the first dielectric waveguide resonator and the second dielectric waveguide resonator are arranged in such a manner that the one side surfaces thereof are located in opposed relation to each other.
US09559398B2	Multi-mode filter A multi-mode cavity filter comprises: a dielectric resonator; a coupling structure for at least one of coupling input signals to the dielectric resonator and extracting filtered output signals from the dielectric resonator; a covering of conductive material around the dielectric resonator and comprising an aperture; and a printed circuit board structure having at least one ground plane layer arranged over said aperture and electrically coupled to the covering of conductive material.
US09559395B2	Lithium/air battery with variable volume insertion material In accordance with one embodiment, an electrochemical cell includes a negative electrode including a form of lithium, a positive electrode spaced apart from the negative electrode and including an electron conducting matrix and a lithium insertion material which exhibits a volume change when lithium is inserted, a separator positioned between the negative electrode and the positive electrode; and an electrolyte including a salt, wherein Li2O2 or Li2O is formed as a discharge product.
US09559390B2	Battery degradation accumulation methods A vehicle includes a traction battery subject to alternating cycling and storage modes and a controller. The controller is programmed to calculate an accumulated degradation for the traction battery based on a degradation profile for the traction battery. The degradation profile defines degradation accumulated over time and may differ based on the mode and temperature. The initial degradation value includes the accumulated degradation for the present mode and at least a portion of the accumulated degradation for the other mode. Degradation is then accumulated according to the degradation profile starting from the initial degradation value. The amount of accumulated degradation from the other mode that is included may vary based on the mode and the accumulated degradation.
US09559388B2	Electrochemical systems configured to harvest heat energy Electrochemical systems for harvesting heat energy, and associated electrochemical cells and methods, are generally described. The electrochemical cells can be configured, in certain cases, such that at least a portion of the regeneration of the first electrochemically active material is driven by a change in temperature of the electrochemical cell. The electrochemical cells can be configured to include a first electrochemically active material and a second electrochemically active material, and, in some cases, the absolute value of the difference between the first thermogalvanic coefficient of the first electrochemically active material and the second thermogalvanic coefficient of the second electrochemically active material is at least about 0.5 millivolts/Kelvin.
US09559385B2	Nickel iron battery employing an untreated polyolefin separator with a surfactant in the electrolyte Provided is a nickel-iron battery. The battery comprises a positive nickel electrode, an iron negative electrode, an electrolyte comprising a surfactant, and a non-polar separator. In one embodiment, the non-polar separator is comprised of a polyolefin, and the surfactant comprises a zwitterionic surfactant.
US09559383B2	Sealed lithium secondary battery The present invention provides a sealed lithium secondary battery in which redox shuttle reactions of an aromatic compound that is an overcharge inhibitor are inhibited, and the aromatic compound decomposes appropriately, and a desired amount of gas can be generated more stably than in conventional instances, even in high-temperature environments. In the sealed lithium secondary battery (100), an electrode assembly (80) and an electrolyte are accommodated in a battery case (50) that is provided with a current interrupt device (30). The electrolyte comprises a compound that is capable of suppressing drops in viscosity of the electrolyte as a result of a rise in temperature in a temperature region up to 100° C., and an aromatic compound capable of generating hydrogen gas when a predetermined battery voltage is exceeded.
US09559382B2	Nonaqueous electrolyte secondary battery A nonaqueous electrolyte secondary battery includes a flat winding electrode assembly including a positive electrode substrate exposed portion on one end and a negative electrode substrate exposed portion on the other end. The winding numbers of the positive and the negative electrode substrate exposed portions are each 30 or more. The positive and negative electrode substrate exposed portions each have an outermost surface welded and connected with a positive and a negative electrode collectors, respectively. A nonaqueous electrolyte used to fabricate the battery contains a lithium salt having an oxalate complex as an anion. At the welded connection portions, all of the layers of the positive electrode substrate exposed portion are melted to be welded and connected to the positive electrode collector, and all of the layers of the negative electrode substrate exposed portion are melted to be welded and connected to the negative electrode collector.
US09559378B2	Fuel cell stack case with pressure plate A fuel cell that includes a cell stack in which a plurality of unit cells are stacked, a case that houses the cell stack, and a pressure plate that is placed in the case at a position between an end of the cell stack in the stacking direction and the case. The case has a first opening through which a pressing member that presses the pressure plate in the stacking direction from outside the case is brought into contact with the pressure plate, and a fixing portion that fixes the pressure plate in place with the cell stack compressed in the stacking direction.
US09559373B2	Formation of hydrophilic polymer membranes using a bronsted base A method of forming a hydrophilic polymer is disclosed. The method can include: reacting a monomer comprising an acid group with a Bronsted base to form an ionic liquid; polymerizing the ionic liquid with at least one other monomer; and converting the ionic liquid back to the acid group after polymerization. Also disclosed are hydrophilic polymers and membrane electrode assemblies formed using the above method.
US09559372B2	High temperature membrane electrode assembly with high power density and corresponding method of making A membrane electrode assembly (MEA) with enhanced current density or power density is fabricated using high temperature (HT) proton exchange membrane (PEM). The MEA can be utilized in high temperature PEM fuel cell applications. More specifically, the MEA is modified with the addition of one or more of selected materials to its catalyst layer to enhance the rates of the fuel cell reactions and thus attain dramatic increases of the power output of the MEA in the fuel cell. The MEA has application to other electro-chemical devices, including an electrolyzer, a compressor, or a generator, purifier, and concentrator of hydrogen and oxygen using HT PEM MEAs.
US09559371B2	Fuel cell system To provide a fuel cell system that is advantageous for maintaining an S/C value in an appropriate region even when a rotational speed of the water pump is abnormal with respect to a target rotational speed region during a power generation operation of a fuel cell. When the rotational speed of the water pump is abnormal with respect to the target rotational speed region during the power generation operation of the fuel cell, the control unit repeats a short time increase and a short time decrease of the S/C value in a reforming reaction, by alternately repeating an increase in a short time (ΔT increase, within 10 seconds) and a decrease in a short time (ΔT decrease, within 10 seconds) of the rotational speed of the water pump with respect to an abnormal rotational speed, while continuing the power generation operation of the fuel cell, thereby averaging the S/C value.
US09559370B2	Lithium air battery system Provided is a lithium air battery system, and more particularly, a lithium air battery system capable of stably and continuously operating a lithium air battery by recovering an electrolytic solution evaporated in the lithium air battery and injecting the recovered electrolytic solution into the lithium air battery.
US09559369B2	Fuel cell supply system A supply system of the anode circuit of a fuel cell (1) comprising: a primary fuel tank (2) intended to supply the anode circuit during an operating phase of the fuel cell, a secondary fuel tank (4) intended to supply the anode circuit when the fuel cell is shut down, the primary and secondary tanks are installed so that the secondary tank is recharged with fuel from the primary tank during an operating phase of the fuel cell, and the system further comprises a permeable membrane (6) installed between the secondary fuel tank and the anode circuit of a fuel cell. Also disclosed is a fuel cell system comprising a fuel cell and the described supply system.
US09559363B2	Method for preparing catalyst layer by in-situ sol-gel reaction of tetraethoxysilane in Nafion ionomer solution Provided are a method for preparing a catalyst layer by an in-situ sol-gel reaction of tetraethoxysilane, and a fuel cell including the catalyst layer prepared thereby. Addition of silica mitigates specific adsorption of sulfonate groups contained in a Nafion ionomer on a Pt catalyst layer in a high-voltage region where the role of a catalyst predominates, resulting in improvement of ORR performance.
US09559361B2	Modified guaran binder for lithium ion batteries and methods for producing the same The presently disclosed and/or claimed inventive concept(s) relates generally to a composition of a slurry for use in preparation of a lithium ion battery. The slurry comprises a binder composition comprising a modified guaran for use in battery electrodes and methods of preparing such. The presently disclosed and/or claimed inventive concept(s) also relates to compositions and methods of making electrodes, either anodes and/or cathodes, with the binder composition comprising the modified guaran.
US09559359B2	Lithium secondary battery and positive electrode for the battery The lithium secondary battery positive electrode provided by the present invention has a positive electrode collector and a positive active material layer formed on the collector. The positive active material layer is composed of a matrix phase containing at least one particulate positive active material and at least one binder, and an aggregate phase dispersed in the matrix phase, constituted by aggregation of at least one particulate positive active material and containing substantially no binder.
US09559357B2	Method for preparing a titanium and niobium mixed oxide by solvothermal treatment; electrode and lithium accumulator comprising said mixed oxide A method of preparing a titanium and niobium mixed oxide including the steps of: preparing a titanium and niobium mixed oxide in amorphous form by a solvothermal treatment of at least one titanium precursor and of at least one niobium precursor, mechanically crushing the titanium and niobium mixed oxide obtained at the end of the solvothermal treatment and calcinating the mixed oxide obtained after crushing.
US09559356B2	Li4Ti5O12, Li(4-α)ZαTi5O12 or Li4ZβTi(5-β)O12 particles, processes for obtaining same and use as electrochemical generators Synthesis process for new particles of Li4Ti5O12, Li(4-α)ZαTi5O12 or Li4ZβTi(5-β)O12, preferably having a spinel structure, wherein β is greater than 0 and less than or equal to 0.5 (preferably having a spinel structure), α representing a number greater than zero and less than or equal to 0.33, Z representing a source of at least one metal, preferably chosen from the group made up of Mg, Nb, Al, Zr, Ni, Co. These particles coated with a layer of carbon notably exhibit electrochemical properties that are particularly interesting as components of anodes and/or cathodes in electrochemical generators.
US09559355B2	Particulate anode materials and methods for their preparation Method for preparing a particulate material including particles of an element of group IVa, an oxide thereof or an alloy thereof, the method including: (a) dry grinding particles from an ingot of an element of group IVa, an oxide thereof or an alloy thereof to obtain micrometer size particles; and (b) wet grinding the micrometer particles dispersed in a solvent carrier to obtain nanometer size particles having a size between 10 to 100 nanometers, optionally a stabilizing agent is added during or after the wet grinding. Method can include further steps of (c) drying the nanometer size particles, (d) mixing the nanometer size particles with a carbon precursor; and (e) pyrolyzing the mixture, thereby forming a coat of conductive carbon on at least part of the surface of the particles. The particulate material can be used in fabrication of an anode in an electrochemical cell or electrochemical storage energy apparatus.
US09559351B2	Nickel composite hydroxide particles and nonaqueous electrolyte secondary battery A method for producing nickel composite hydroxide particles may include: a first step of producing nuclei including primary particles by controlling the pH of an aqueous solution for nucleation, the aqueous solution for nucleation containing a metal compound having an atomic ratio of metals corresponding to an atomic ratio of metals in the nickel composite hydroxide particles and substantially not containing a metal complex ion-forming agent; and a second step of forming, on an outer surface of each of the nuclei, an outer shell portion including platy primary particles larger than primary particles of the nuclei by controlling the pH of an aqueous solution for particle growth containing the nuclei obtained in the nucleation step.
US09559347B2	Negative electrode terminal for battery and method for producing negative electrode terminal for battery A negative electrode terminal for a battery in which a first metal layer and a second metal layer hardly separate from each other is provided by inhibiting an intermetallic compound from being formed between the first metal layer and the second metal layer. This negative electrode terminal (8) for a battery is composed of a clad material formed by bonding a first metal layer (80), made of Al, including a first region connected with a battery terminal connecting plate and an adjacent second region on the same surface side as the first region and a second metal layer (81), made of Ni, connected with battery negative electrodes, while the second metal layer is arranged to be stacked on the first metal layer in the second region of the first metal layer.
US09559346B2	Traction battery electrical joint An exemplary assembly includes an array plate of a traction battery and an insert held by the array plate. The insert is in electrical communication with a bus bar of the traction battery. Another exemplary assembly includes an array plate of a traction battery and a fastening insert recessed within the array plate. The fastening insert is more electrically conductive than the array plate.
US09559344B2	Lithium battery The present invention relates to a lithium battery and, more particularly, to a lithium battery, in which the structure of a battery module contained in the lithium battery is simplified, thus reducing the size of the entire lithium battery, and which includes a connector by which two or more lithium batteries are mechanically coupled to each other so that in response to a required amount of power, an appropriate number of lithium batteries can be easily connected to each other.
US09559342B2	Battery terminal cover A cap configured to cover a terminal of a battery includes a base and a top having a plug and a cavity. The cavity is configured to receive the terminal and the plug is configured to retain the top on the terminal. A tether has a first end fixed to the base and a second end fixed to the top and connects the top to the base. The base is configured to retain the top to the terminal when the top is both connected to the terminal and separate from the terminal.
US09559340B2	Battery and motor vehicle comprising said battery A battery includes at least one battery module that has several battery cells arranged next to each other on a support plate. The battery module is arranged with the support plate on a base plate of the battery or on a base plate of a lower unit of the battery. The support plate and the base plate are fixed together by at least one fixing system that includes at least two fixing elements engaging in each other. The first fixing element is arranged on the battery module and the second fixing element is arranged on the base plate. A motor vehicle includes the battery.
US09559328B2	Organic light-emitting display apparatus and method of manufacturing the same Provided is an organic light-emitting display apparatus including a substrate; a first electrode formed on the substrate; an emission layer formed on the first electrode; and a second electrode formed on the emission layer, wherein the first electrode includes a first layer including silver (Ag); and a second layer disposed on the first layer and comprising oxide of non-silver metal.
US09559326B2	Light emitting element A light emitting element is disclosed, including a substrate layer, a first metal layer and a second metal layer stacked sequentially on the substrate layer, and an organic material layer disposed between the first metal layer and the second metal layer. The first metal layer includes a first metal portion and a second metal portion that cover a surface of the substrate layer, and an opening portion disposed between the first metal portion and the second metal portion and exposes a portion of the surface. The organic material layer emits light having a wavelength within a first range. A first coupling generated between the first metal portion and the second metal layer shifts the light from the first range to a second range. A second coupling generated between the second metal portion and the second metal layer shifts the light from the first range to a third range.
US09559325B2	Light-emitting device having stacked light-emitting layers Disclosed is a light-emitting element with a microcavity structure which is capable of amplifying a plurality of wavelengths to give emission of a desired color. The light-emitting element includes a pair of electrodes and an EL layer having a light-emitting substance interposed between the pair of electrodes. One of the pair of electrodes gives a reflective surface and the other electrode gives a semi-reflective surface. The light-emitting element is arranged so that the emission of the light-emitting substance covers at least two wavelengths λ and an optical path length L between the reflective surface and the semi-reflective surface satisfies an equation L=nλ/2 where n is an integer greater than or equal to 2.
US09559321B2	Metal complexes for use as dopants and other uses The invention relates to electrochemical devices comprising complexes of cobalt comprising at least one ligand with a 5- or six membered, N-containing heteroring. The complex are useful as p- and n-dopants, as over of electrochemical devices, in particular in organic semiconductors. The complexes are further useful as over-discharge prevention and overvoltage protection agents.
US09559310B2	Compound with electron injection and/or electron transport capabilities and organic light-emitting device including the same A compound represented by Formula 1 below and an organic light-emitting device including the compound are provided: Substituents in Formula 1 are the same as defined in the specification.
US09559308B1	Method for growing carbon nanotubes A method of forming carbon nanotubes (CNTs) is disclosed. The method includes dispersing a plurality of substantially semiconductor pure carbon nanotube (CNT) seeds on a substrate to provide a seeded substrate, ozonating the seeded substrate to remove defects on end faces of the plurality of substantially semiconductor pure CNT seeds, and growing carbon extensions on the end faces of the plurality of substantially semiconductor pure CNTs seeds to form a plurality of substantially pure CNTs.
US09559307B2	Polymer and organic electronic device A composition comprising a polymer and a phosphorescent material wherein the polymer comprises repeat units of formula (I): wherein A is a heteroaryl group containing a nitrogen atom, and A may be unusubstituted or substituted with one or more substituents; R1 in each occurrence is independently a substituent; and n is 0, 1, 2, 3 or 4.
US09559304B2	Forming of optoelectronic devices, particularly of inverted-type OPV cells This forming involves a composition including: poly(3,4-ethylenedioxythiophene) or PEDOT; polystyrene sulfonate or PSS; a compound (A) having formula: with 0
US09559303B2	Conjugated polymers The invention relates to novel polymers containing repeating units based on benzo[1,2-d;4,3-d′]bisthiazole, monomers and methods for their preparation, their use as semiconductors in organic electronic (OE) devices, especially in organic photovoltaic (OPV) devices, and to OE and OPV devices comprising these polymers.
US09559301B2	Methods of forming memory device constructions, methods of forming memory cells, and methods of forming semiconductor constructions Memory device constructions include a first column line extending parallel to a second column line, the first column line being above the second column line; a row line above the second column line and extending perpendicular to the first column line and the second column line; memory material disposed to be selectively and reversibly configured in one of two or more different resistive states; a first diode configured to conduct a first current between the first column line and the row line via the memory material; and a second diode configured to conduct a second current between the second column line and the row line via the memory material. In some embodiments, the first diode is a Schottky diode having a semiconductor anode and a metal cathode and the second diode is a Schottky diode having a metal anode and a semiconductor cathode.
US09559295B2	Nano multilayer film, field effect tube, sensor, random accessory memory and preparation method A nano multilayer film of electrical field modulation type, a field effect transistor of electrical field modulation type, an electrical field sensor of switch type, and a random access memory of electrical field drive type can obtain an electro-resistance effect in an electrical field modulation multilayer film at room temperature. The nano multilayer film includes in succession from bottom to top a bottom layer, a substrate, a bottom layer, a functional layer, a buffer layer, an insulation layer, a conductive layer, and a cap layer. The buffer layer and the insulation layer can be selectively added as required when the conductive layer is made of a magnetic metal. The effect of influencing and changing the conductivity of the metal layer and thus adjusting the change in the resistance of the devices can obtain different resistance states corresponding to different electrical fields and achieving an electro-resistance effect.
US09559289B2	Polymeric piezoelectric material and process for producing the same A polymeric piezoelectric material is provided that includes an aliphatic polyester (A) with a weight-average molecular weight of from 50,000 to 1,000,000 and having optical activity, and a stabilizing agent (B) with a weight-average molecular weight of from 200 to 60,000 having at least one kind of functional group selected from the group consisting of a carbodiimide group, an epoxy group and an isocyanate group, wherein the crystallinity of the material obtained by a DSC method is from 20% to 80%, a content of the stabilizing agent (B) is from 0.01 part by mass to 10 parts by mass with respect to 100 parts by mass of the aliphatic polyester (A), and internal haze with respect to visible light is 50% or less, as well as a process for producing the same.
US09559286B2	Positioning device A positioning device includes a positioning element that is situated movably in a first direction and a second direction, the first and the second directions being opposed to one another, and a first piezoelectric actuator and a second piezoelectric actuator, the first piezoelectric actuator moving the positioning element in the first direction and the second piezoelectric actuator moving the positioning element in the second direction.
US09559284B2	Silicided nanowires for nanobridge weak links Silicided nanowires as nanobridges in Josephson junctions. A superconducting silicided nanowire is used as a weak-link bridge in a Josephson junction, and a fabrication process is employed to produce silicided nanowires that includes patterning two junction banks and a rough nanowire from a silicon substrate, reshaping the nanowire through hydrogen annealing, and siliciding the nanowire by introduction of a metal into the nanowire structure.
US09559282B2	Thermoelectric generator, thermoelectric generation method, electrical signal detecting device, and electrical signal detecting method A thermoelectric generation method using a thermoelectric generator includes: placing a thermoelectric generator in a temperature-changing atmosphere; drawing to outside a current that is generated due to a temperature difference between first and second support members when the temperature of the second support member is higher than that of the first support member, and that flows from a second thermoelectric conversion member to a first thermoelectric conversion member, using first and second output sections as a positive terminal and a negative terminal, respectively; and drawing to outside a current that is generated due to a temperature difference between the first and second support members when the temperature of the first support member is higher than that of the second support member, and that flows from a fourth thermoelectric conversion member to a third thermoelectric conversion member, using third and fourth output sections as a positive terminal and a negative terminal, respectively.
US09559275B2	Light emitting device package and light unit having the same Disclosed is a light emitting device package. The light emitting device is a package body including a first recess which is provided with a bottom face and a plurality of inner walls surrounding the bottom face the plurality of inner walls including a first inner wall and a second inner wall, which are opposing walls; a lead frame exposed at the bottom face of the package body, the lead frame including a bottom frame and a reflector exposed along one of the first inner wall and the second inner wall; a light emitting element provided on the lead frame; and a transparent material provided in the package body to cover the light emitting element. A material of the reflector is a same as a material of the bottom frame of the lead frame.
US09559272B2	Efficient lighting system with wide color range Broadband solid state light sources include remote phosphor LED(s), short-wavelength direct emitting LED(s), and long-wavelength direct emitting LED(s). A diffuse or clear cover member covers these LEDs. Each remote phosphor LED includes an LED, a phosphor layer, and a dichroic reflector. The light sources can provide a broadband output light over a wide color range, and can do so efficiently while energizing a high percentage or proportion of the total number of LEDs in the system. The broadband output may for example exhibit a color difference of at least 0.2 in CIE chromaticity units, and/or a correlated color temperature difference of at least 4000 or 5000 Kelvin, while energizing more than half, or at least 60%, or at least 70%, of the total number of LEDs. Numbers of LEDs can be replaced with effective numbers of LEDs if LEDs of substantially different sizes are included in the light source.
US09559269B2	Outdoor luminaire An outdoor luminaire comprising a blue LED chip having a maximum peak at a wavelength of 420-480 nm and a phosphor layer disposed forward of the LED chip in its emission direction is provided. The phosphor layer comprises a phosphor of the formula: Lu3Al5O12:Ce3+ which is activated with up to 1 mol % of Ce relative to Lu, the phosphor being dispersed in a resin. In scotopic and mesopic vision conditions, the luminaire produces illumination affording brighter lighting, higher visual perception and brightness over a broader area.
US09559266B2	Lighting apparatus including an optoelectronic component The invention relates to an illumination device (1) specifically a packaged LED (2), which is embedded in a casing body leaving the bottom side of the LED (2) exposed; on the bottom side, a contacting element (7) is vacuum deposited onto the LED (2), which contacting element protrudes laterally above the LED (2) and allows on a macroscopic level for an electric contacting of the LED (2), namely by connection of flat surfaces, such as welding.
US09559261B2	Nitride underlayer and fabrication method thereof A nitride layer with embedded hole structure can be used for fabricating GaN-based LED of high external quantum efficiency through epitaxial growth. The approaches can have advantages such as reducing the complexity chip process for forming hole structure, reducing impacts from the chip process on chip reliability, effective reduction of hole structure size and increase of device stability, crush resistance, and reliability. A fabrication method of an underlayer structure with embedded micro-hole structure is also provided.
US09559259B2	Light-emitting device and manufacturing method thereof An LED manufacturing method includes steps of: providing a substrate including a first surface; forming a first portion of a first semiconductor layer on the first surface in a first atmosphere including a first carrier gas; and forming a second portion of the first semiconductor layer on the first portion in a second atmosphere including a second carrier gas; wherein a plurality of first cavities is formed on a surface of the first portion during forming the first portion; and wherein the plurality of first cavities is transformed to a plurality of second cavities during forming the second portion, and one of the second cavities includes a first inclined surface and a second inclined surface above the first inclined surface.
US09559257B2	Light emitting device and lighting system A light emitting device may include a first conductive type semiconductor layer, an active layer including a quantum well and a quantum wall on the first conductive type semiconductor layer, an undoped last barrier layer on the active layer; an AlxInyGa(1-x-y)N (0≦x≦1, 0≦y≦1)-based layer on the undoped last barrier layer; and a second conductive type semiconductor layer on the AlxInyGa(1-x-y)N-based layer. The undoped last barrier layer may be provided between the AlxInyGa(1-x-y)N (0≦x≦1, 0≦y≦1)-based layer and a last quantum well which is closest to the second conductive type semiconductor layer among the quantum well and may include a first Inp1Ga1-p1N (0
US09559252B2	Substrate removal process for high light extraction LEDs A method for fabricating light emitting diode (LEDs) comprises providing a plurality of LEDs on a substrate wafer, each of which has an n-type and p-type layer of Group-III nitride material formed on a SiC substrate with the n-type layer sandwiched between the substrate and p-type layer. A conductive carrier is provided having a lateral surface to hold the LEDs. The LEDs are flip-chip mounted on the lateral surface of the conductive carrier. The SiC substrate is removed from the LEDs such that the n-type layer is the top-most layer. A respective contact is deposited on the n-type layer of each of the LEDs and the carrier is separated into portions such that each of the LEDs is separated from the others, with each of the LEDs mounted to a respective portion of said carrier.
US09559248B2	Laser soldering systems and methods for joining crystalline silicon solar batteries The disclosure includes a laser soldering method of connecting crystalline silicon solar batteries. Methods can include placing conductive soldering strips and crystalline silicon solar batteries on a lower press plate and aligning the conductive soldering strips on metal electrodes of crystalline silicon solar batteries. Methods can also include placing an upper press plate on the conductive soldering strips and the crystalline silicon solar batteries and vacuuming between the upper and lower press plates such that absolute pressure between the upper and lower press plates is less than atmospheric pressure. Methods can also include laser soldering the conductive soldering strips and the crystalline silicon solar batteries.
US09559246B2	Solar cell emitter region fabrication using silicon nano-particles Methods of fabricating solar cell emitter regions using silicon nano-particles and the resulting solar cells are described. In an example, a method of fabricating an emitter region of a solar cell includes forming a region of doped silicon nano-particles above a dielectric layer disposed above a surface of a substrate of the solar cell. A layer of silicon is formed on the region of doped silicon nano-particles. At least a portion of the layer of silicon is mixed with at least a portion of the region of doped silicon nano-particles to form a doped polycrystalline silicon layer disposed on the dielectric layer.
US09559244B2	CMOS image sensors and methods for forming the same A method includes forming a first implantation mask comprising a first opening, implanting a first portion of a semiconductor substrate through the first opening to form a first doped region, forming a second implantation mask comprising a second opening, and implanting a second portion of the semiconductor substrate to form a second doped region. The first portion of the semiconductor substrate is encircled by the second portion of the semiconductor substrate. A surface layer of the semiconductor substrate is implanted to form a third doped region of an opposite conductivity type than the first and the second doped regions. The third doped region forms a diode with the first and the second doped regions.
US09559240B1	Nano-pillar-based biosensing device In one example, a device includes a trench formed in a substrate. The trench includes a first end and a second end that are non-collinear. A first plurality of semiconductor pillars is positioned near the first end of the trench and includes integrated light sources. A second plurality of semiconductor pillars is positioned near the second end of the trench and includes integrated photodetectors.
US09559236B2	Solar cell fabricated by simplified deposition process Methods of fabricating solar cells using simplified deposition processes, and the resulting solar cells, are described. In an example, a method of fabricating a solar cell involves loading a template substrate into a deposition chamber and, without removing the template substrate from the deposition chamber, performing a deposition method. The deposition method involves forming a first silicon layer on the template substrate, the first silicon layer of a first conductivity type. The deposition method also involves forming a second silicon layer on the first silicon layer, the second silicon layer of the first conductivity type. The deposition method also involves forming a third silicon layer above the second silicon layer, the third silicon layer of a second conductivity type. The deposition method also involves forming a solid state doping layer on the third silicon layer, the solid state doping layer of the first conductivity type.
US09559235B2	Photoelectric conversion device The present invention provides a photoelectric conversion device. Specifically, the photoelectric conversion device has a structure in which a substrate including a photoelectric conversion element provided at the bottom and a substrate including a photoelectric conversion element provided at the side are secured in a brace form by a light-dividing device. This structure divides incident light using the light-dividing device into a plurality of wavelength bands, and causes the divided light to fall onto the photoelectric conversion elements provided at the bottom and side, thereby making it possible to provide a photoelectric conversion device which is capable of generating a lame amount of electric power. In addition, the light-dividing device distributes pressures and impacts applied to the substrates at the bottom and side, thus making it possible to provide a photoelectric conversion device which has resistance to pressures and impacts.
US09559227B2	Nanostructure and optical device including the nanostructure Provided are a nanostructure and an optical device including the nanostructure. The nanostructure is formed on a two-dimensional material layer such as graphene and includes nanopatterns having different shapes. The nanopattern may include a first nanopattern and a second nanopattern and may be spherical; cube-shaped; or poly-pyramid-shaped, including a triangular pyramid shape; or polygonal pillar-shaped.
US09559226B2	Solid-state imaging apparatus and electronic apparatus A solid-state imaging apparatus includes a phase difference detection pixel including a photoelectric conversion section that is formed on a semiconductor substrate and configured to photoelectrically convert incident light, a waveguide configured to guide the incident light to the photoelectric conversion section, and a light-shielding section that is formed in vicinity of an opening of the waveguide and configured to shield a part of the incident light that enters the waveguide.
US09559221B2	Solar cell production method, and solar cell produced by same production method This solar cell production method involves productively forming an antireflection film comprising silicon nitride, said antireflection film having an excellent passivation effect. In an embodiment, a remote plasma CVD is used to form a first silicon nitride film on a semiconductor substrate (102) using the plasma flow from a first plasma chamber (111), then to form a second silicon nitride film, which has a different composition than the first silicon nitride film, using the plasma flow from a second plasma chamber (112), into which ammonia gas and silane gas have been introduced at a different flow ratio than that of the first plasma chamber (111). The plasma chambers (111, 112) have excitation parts (111a, 112a) that excite the ammonia gas, and activation reaction parts (111b, 112b) and a flow controller (113).
US09559220B2	Solar cell A solar cell is discussed. The solar cell includes a substrate of a first conductive type, an emitter region which is positioned at a front surface of the substrate and has a second conductive type different from the first conductive type, a front passivation region including a plurality of layers which are sequentially positioned on the emitter region, a back passivation region which is positioned on a back surface opposite the front surface of the substrate and includes three layers, a plurality of front electrodes which pass through the front passivation region and are connected to the emitter region, and at least one back electrode which passes through the back passivation region and is connected to the substrate.
US09559218B2	Semiconductor device and method of manufacturing the same A semiconductor device comprises a semiconductor layer including a mesa structure and a peripheral surface extending around the mesa structure, the mesa structure having a plateau shape with an upper surface and a side surface; a Schottky electrode forming a Schottky junction with the upper surface; an insulating film extending from the peripheral surface, across the side surface, and onto the Schottky electrode, the insulating film having an opening formed on the Schottky electrode; and a wiring electrode electrically connected to the Schottky electrode inside the opening, the wiring electrode extending from inside of the opening, across a portion of the insulating film formed on the side surface, and onto another portion of the insulating film formed on the peripheral surface.
US09559209B2	Field effect transistors and methods of forming same Semiconductor devices and methods of forming the same are provided. A first source/drain layer is formed over a substrate. A channel layer is formed over the first source/drain layer. A second source/drain layer is formed over the channel layer. The first source/drain layer, the channel layer, and the second source/drain layer are patterned to form a fin-shaped structure. A gate stack is formed on a sidewall of the fin-shaped structure. The fin-shaped structure is patterned to expose a top surface of the first source/drain layer.
US09559205B2	Structure and formation method of semiconductor device structure Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes a fin structure over a semiconductor substrate and a gate stack covering a portion of the fin structure. The gate stack includes a work function layer and a gate dielectric layer. The semiconductor device structure also includes an isolation element over the semiconductor substrate and adjacent to the gate stack. The isolation element is in direct contact with the work function layer and the gate dielectric layer, and a lower width of the isolation element is greater than an upper width of the isolation element.
US09559204B2	Strained semiconductor device and method of making the same In a method for forming a semiconductor device, a gate electrode is formed over a semiconductor body (e.g., bulk silicon substrate or SOI layer). The gate electrode is electrically insulated from the semiconductor body. A first sidewall spacer is formed along a sidewall of the gate electrode. A sacrificial sidewall spacer is formed adjacent the first sidewall spacer. The sacrificial sidewall spacer and the first sidewall spacer overlying the semiconductor body. A planarization layer is formed over the semiconductor body such that a portion of the planarization layer is adjacent the sacrificial sidewall spacer. The sacrificial sidewall spacer can then be removed and a recess etched in the semiconductor body. The recess is substantially aligned between the first sidewall spacer and the portion of the planarization layer. A semiconductor material (e.g., SiGe or SiC) can then be formed in the recess.
US09559201B2	Vertical memory devices, memory arrays, and memory devices Vertical memory devices comprise vertical transistors in an array region and digit lines extending in a first direction and comprising a source region or a drain region of at least some of the vertical transistors. The vertical memory devices further include word lines extending in a second direction along sidewalls of the vertical transistors and along sidewalls of columns of an oxide material in a word line end region. The wordlines extend closer to an upper surface of the vertical memory device on the sidewalls of the oxide material than on the sidewalls of the vertical transistors. Memory arrays comprising vertical transistors in an array region, digit line, and word lines are disclosed, as are memory devices comprising transistors in an array region, digit lines, and word lines.
US09559200B2	Method and apparatus for power device with multiple doped regions A semiconductor device is provided. The device includes a substrate having a first conductivity type. The device further includes a drain region, a source region, and a well region disposed in the substrate. The well region is disposed between the drain region and the source region and having a second conductivity type opposite to the first conductivity type. The device further includes a plurality of doped regions disposed within the well region. The doped regions are vertically and horizontally offset from each other. Each of the doped regions includes a lower portion having the first conductivity type, and an upper portion stacked on the lower region and having the second conductivity type.
US09559191B2	Punch through stopper in bulk finFET device A method of forming a semiconductor device that includes forming a fin structure from a bulk semiconductor substrate and forming an isolation region contacting a lower portion of a sidewall of the fin structure, wherein an upper portion of the sidewall of the fin structure is exposed. A sacrificial spacer is formed on the upper portion of the sidewall of the fin structure. The isolation regions are recessed to provide an exposed section of the sidewall of the fin structure. A doped semiconductor material is formed on the exposed section of the lower portion of the sidewall of the fin structure. Dopant is diffused from the doped semiconductor material to a base portion of the fin structure.
US09559188B2	Trench gate type semiconductor device and method of producing the same A method of producing a trench gate type MOSFET is provided in which each intersection trench is formed as a two-stage trench structure. A gate trench is backfilled with a mask material and the mask material is then patterned to form a mask used for forming each intersection trench. The intersection trench intersecting the gate trench is provided so as to be deeper than the gate trench. A Schottky electrode is provided in the bottom of each intersection trench 10p. In this manner, there is provided a trench gate type semiconductor device and a method of producing the same, in which: the cell pitch can be reduced even when a wide band gap semiconductor is used as a main semiconductor substrate; good ohmic contacts can be obtained; and an excessive electric field is prevented from being applied to an insulating film in the bottom of each trench.
US09559186B2	Epitaxially grown stacked contact structure of semiconductor device The embodiments described above provide mechanisms of forming contact structures with low resistance. A strained material stack with multiple sub-layers is used to lower the Schottky barrier height (SBH) of the conductive layers underneath the contact structures. The strained material stack includes a SiGe main layer, a graded SiG layer, a GeB layer, a Ge layer, and a SiGe top layer. The GeB layer moves the Schottky barrier to an interface between GeB and a metal germanide, which greatly reduces the Schottky barrier height (SBH). The lower SBH, the Ge in the SiGe top layer forms metal germanide and high B concentration in the GeB layer help to reduce the resistance of the conductive layers underneath the contact structures.
US09559178B2	Non-volatile memory (NVM) cell and device structure integration A dielectric layer is formed over the substrate in the capacitor region and the memory region and a select gate layer is formed over the dielectric layer. A select gate is formed over the memory region and a plurality of lines of electrodes over the capacitor region from the select gate layer. A charge storage layer is formed over the capacitor region and the memory region including over the select gate and the plurality of lines. A control gate layer is formed over the charge storage layer over the capacitor region and over the memory region. The control gate layer is patterned to form a control gate of a memory cell over the memory region and a first electrode of a capacitor over the capacitor region. The plurality of lines are connected to the capacitor region to form a second electrode of the capacitor.
US09559177B2	Memory devices and method of fabricating same A device comprises a control gate structure over a substrate, a memory gate structure over the substrate, wherein a charge storage layer formed between the control gate structure and the memory gate structure, a first spacer along a sidewall of the memory gate structure, a second spacer along a sidewall of the control gate structure, an oxide layer over a top surface of the memory gate structure, a top spacer over the oxide layer, a first drain/source region formed in the substrate and adjacent to the memory gate structure and a second drain/source region formed in the substrate and adjacent to the control gate structure.
US09559176B2	FinFET conformal junction and abrupt junction with reduced damage method and device A method of forming a source/drain region with abrupt vertical and conformal junction and the resulting device are disclosed. Embodiments include forming a first mask over a fin of a first polarity FET and source/drain regions of the first polarity FET; forming spacers on opposite sides of a fin of a second polarity FET, the second polarity being opposite the first polarity, on each side of a gate electrode; implanting a first dopant into the fin of the second polarity FET; etching a cavity in the fin of the second polarity FET on each side of the gate electrode; removing the first mask; performing rapid thermal anneal (RTA); epitaxially growing a source/drain region of the second polarity FET in each cavity; forming a second mask over the fin of the first polarity FET and source/drain regions of the first polarity FET; and implanting a second dopant in the source/drain regions of the second polarity FET.
US09559175B2	Semiconductor device The parasitic capacitance formed by a gate electrode, a contact, and a side wall is reduced.The gate electrode and the side wall are covered by an insulating layer. The contact passes through the insulating layer and is connected to a diffusion layer. Then, an air gap is located between the side wall and the contact. The air gap faces the contact at the side face on the contact side via the insulating layer.
US09559174B2	Semiconductor film, transistor, semiconductor device, display device, and electronic appliance Favorable electrical characteristics are given to a semiconductor device. Furthermore, a semiconductor device having high reliability is provided. One embodiment of the present invention is an oxide semiconductor film having a plurality of electron diffraction patterns which are observed in such a manner that a surface where the oxide semiconductor film is formed is irradiated with an electron beam having a probe diameter whose half-width is 1 nm. The plurality of electron diffraction patterns include 50 or more electron diffraction patterns which are observed in different areas, the sum of the percentage of first electron diffraction patterns and the percentage of second electron diffraction patterns accounts for 100%, the first electron diffraction patterns account for 90% or more, the first electron diffraction pattern includes observed points which indicates that a c-axis is oriented in a direction substantially perpendicular to the surface where the oxide semiconductor film is formed.
US09559173B2	Nitride semiconductor device using insulating films having different bandgaps to enhance performance The semiconductor device includes: a channel layer, a barrier layer, a first insulating film, and a second insulating film, each of which is formed above a substrate; a trench that penetrates the second insulating film, the first insulating film, and the barrier layer to reach the middle of the channel layer; and a gate electrode arranged in the trench and over the second insulating film via a gate insulating film. The bandgap of the second insulating film is smaller than that of the first insulating film, and the bandgap of the second insulating film is smaller than that of the gate insulating film GI. Accordingly, a charge (electron) can be accumulated in the second (upper) insulating film, thereby allowing the electric field strength at a corner of the trench to be improved. As a result, a channel is fully formed even at a corner of the trench, thereby allowing an ON-resistance to be reduced and an ON-current to be increased.
US09559172B2	Semiconductor device and method of manufacturing the same A semiconductor device of an embodiment includes a p-type SiC impurity region containing a p-type impurity and an n-type impurity. Where the p-type impurity is an element A and the n-type impurity is an element D, the element A and the element D form a combination of Al (aluminum), Ga (gallium), or In (indium) and N (nitrogen), and/or a combination of B (boron) and P (phosphorus). The ratio of the concentration of the element D to the concentration of the element A in the above combination is higher than 0.33 but lower than 0.995, and the concentration of the element A forming part of the above combination is not lower than 1×1018 cm−3 and not higher than 1×1022 cm−3.
US09559171B2	Semiconductor device In order to realize an SJ-MOSFET and an IGBT on a single chip and realize a new arrangement configuration for an SJ-MOSFET section and an IGBT section in a single semiconductor chip, provided is a semiconductor device including a semiconductor substrate; two or more super-junction transistor regions provided on the semiconductor substrate; and one or more IGBT regions that are provided in regions sandwiched by the two or more super-junction transistor regions, in a cross section obtained by cleaving along a pane perpendicular to the semiconductor substrate.
US09559170B2	Electrostatic discharge protection devices A semiconductor device for electrostatic discharge (ESD) protection including a source, a gate, a drain having a drain diffusion, and a diffusion region extending from, or located under, the drain diffusion. The source, the gate, the drain and the diffusion region are located in or on a substrate. The diffusion region is laterally spaced from at least one of the gate or the outer edge of the drain diffusion.
US09559167B2	Semiconductor component with dynamic behavior One embodiment provides a semiconductor component including a semiconductor body having a first side and a second side and a drift zone; a first semiconductor zone doped complementarily to the drift zone and adjacent to the drift zone in a direction of the first side; a second semiconductor zone of the same conduction type as the drift zone adjacent to the drift zone in a direction of the second side; at least two trenches arranged in the semiconductor body and extending into the semiconductor body and arranged at a distance from one another; and a field electrode arranged in the at least two trenches adjacent to the drift zone. The at least two trenches are arranged at a distance from the second semiconductor zone in the vertical direction, a distance between the trenches and the second semiconductor zone is greater than 1.5 times the mutual distance between the trenches, and a doping concentration of the drift zone in a section between the trenches and the second semiconductor zone differs by at most 35% from a minimum doping concentration in a section between the trenches.
US09559164B2	Nanowire transistor device and method for manufacturing nanowire transistor device A nanowire transistor device includes a substrate, a plurality of nanowires formed on the substrate, and a gate surrounding at least a portion of each nanowire. The nanowires respectively include a first semiconductor core and a second semiconductor core surrounding the first semiconductor core. A lattice constant of the second semiconductor core is different from a lattice constant of the first semiconductor core.
US09559158B2	Method and apparatus for an integrated capacitor An integrated capacitor can be fabricated with both electrodes formed by trenches for low resistance. According to one embodiment, the capacitor can comprise a first trench electrode, one or more dielectric layers, and a second trench electrode. The first trench electrode and the second trench electrode can be fabricated in different trenches to improve capacitance density and resistance of the integrated capacitor.
US09559157B2	Display device A display device includes a display panel and a flexible printed circuit (FPC) connected to the display panel. The FPC includes a first region and a second region, the second region having greater flexibility than the first region.
US09559156B2	Organic light emitting diode display An organic light emitting diode display includes a substrate including a display area and a non-display area, a display unit that is formed in the display area and includes a plurality of subpixels arranged in a matrix form, a main ground line that is positioned at a first side of the non-display area and is formed using the same material as source and drain electrodes included in each subpixel, and an auxiliary ground line that is formed to surround the non-display area, overlaps at least a portion of the main ground line at the first side of the non-display area, is electrically connected to the main ground line, and is formed using the same material as a lower electrode included in each subpixel.
US09559154B2	Display device keeping a distance between a light emitting layer and a counter substrate uniformly A display device includes a first substrate, pixel electrodes located in correspondence with pixels above the first substrate, a first partition covering ends of a group of the pixel electrodes, a second partition covering ends of another group of the pixel electrodes, the second partition being lower than the first partition, a solid filler located above the first partition and the second partition, and a second substrate facing the first substrate, the second substrate being away from the first substrate by a distance kept by the first partition, the second partition and the filler.
US09559153B2	Display device A display device includes: an organic layer arranged in plural pixels which are arranged in a display area in a matrix; a first electrode that is formed on a surface of the organic layer opposite to a substrate, and transmits a visible light; a second electrode that holds the organic layer in cooperation with the first electrode, and is lower in the transmittance of the visible light, and higher in the reflectance than the first electrode; an insulating layer that holds the second electrode in cooperation with the organic layer, and higher in the transmittance of the visible light, and lower in the reflectance than the second electrode; and a third electrode that holds the insulating layer in cooperation with the second electrode, is formed across adjacent pixels of the plural pixels, and lower in the transmittance of the visible light, and higher in the reflectance than the second electrode.
US09559150B2	High efficiency LEDs and LED lamps In various embodiments, lighting systems include an electrically insulating carrier having a plurality of conductive elements disposed thereon and a light-emitting array. The light-emitting array is disposed over the carrier and includes a plurality of light-emitting diodes (LEDs) that are interconnected in parallel in a first direction and interconnected in series in a second direction different from the first direction.
US09559148B2	Solid-state imaging device and imaging apparatus A solid-state imaging device includes a plurality of pixel electrodes disposed two-dimensionally, an opposite electrode provided opposite to the pixel electrodes, and an organic layer formed of an organic material and provided between the pixel electrodes and the opposite electrode, in which a protrusion and recess section is formed on a surface of the organic layer on the opposite electrode side, and the protrusion and recess section includes a first protrusion and recess section formed at a position opposite to each pixel electrode and a second protrusion and recess section formed at a position opposite to the space between each pixel electrode.
US09559145B2	Electronic device and method for fabricating the same Provided is an electronic device including a semiconductor memory which includes a first region in which a first variable resistance element for storing data is disposed; and a second region in which a reference resistance element for sensing data stored in the first variable resistance element is disposed, and wherein the reference resistance element comprising: a plurality of second variable resistance elements formed of the same material at the same level as the first variable resistance element; a plurality of contacts coupled to each of the second variable resistance elements; and a first pad coupled to part of the contacts which are coupled to one of two adjacent second variable resistance elements and part of the contacts which are coupled to the other of the two adjacent second variable resistance elements for coupling the two adjacent second variable resistance elements with each other.
US09559143B2	Method and system for providing magnetic junctions including free layers that are cobalt-free A magnetic junction usable in a magnetic device and a method for providing the magnetic junction are described. The magnetic junction includes a free layer, a nonmagnetic spacer layer, and a reference layer. The free layer includes at least one of Fe and at least one Fe alloy. Furthermore, the free layer excludes Co. The nonmagnetic spacer layer adjoins the free layer. The nonmagnetic spacer layer residing between reference layer and the free layer. The magnetic junction is configured such that the free layer is switchable between a plurality of stable magnetic states when a write current is passed through the magnetic junction.
US09559142B2	Active matrix display panel with ground tie lines A display panel and a method of forming a display panel are described. The display panel may include a thin film transistor substrate including a pixel area and a non-pixel area. The pixel area includes an array of bank openings and an array of bottom electrodes within the array of bank openings. A ground line is located in the non-pixel area and an array of ground tie lines run between the bank openings in the pixel area and are electrically connected to the ground line in the non-pixel area.
US09559134B2	Deep trench spacing isolation for complementary metal-oxide-semiconductor (CMOS) image sensors An image sensor employing deep trench spacing isolation is provided. A plurality of pixel sensors is arranged over or within a semiconductor substrate. A trench is arranged in the semiconductor substrate around and between adjacent ones of the plurality of pixel sensors, and the trench has a gap located between sidewalls of the trench. A cap is arranged over or within the trench at a position overlying the gap. The cap seals the gap within the trench. A method of manufacturing the image sensor is also provided.
US09559133B2	Photodetector and image sensor including the same A photodetector may have a structure including conductive patterns and an intermediate layer interposed between the conductive patterns. A length L of at least one side of the second conductive pattern that overlaps the first conductive pattern and the intermediate layer satisfies the equation L=λ/2neff, wherein the neff is an effective refractive index of a surface plasmon waveguide formed of the first conductive pattern, the intermediate layer, and the second conductive pattern during a surface plasmon resonance. Heat generated in the intermediate layer when the electromagnetic wave having the wavelength λ is incident thereon generates a current variation.
US09559129B2	Semiconductor device having antenna and method for manufacturing thereof The present invention provides an antenna in that the adhesive intensity of a conductive body formed on a base film is increased, and a semiconductor device including the antenna. The invention further provides a semiconductor device with high reliability that is formed by attaching an element formation layer and an antenna, wherein the element formation layer is not damaged due to a structure of the antenna. The semiconductor device includes the element formation layer provided over a substrate and the antenna provided over the element formation layer. The element formation layer and the antenna are electrically connected. The antenna has a base film and a conductive body, wherein at least a part of the conductive body is embedded in the base film. As a method for embedding the conductive body in the base film, a depression is formed in the base film and the conductive body is formed therein.
US09559124B2	Display panel A display panel includes a first base substrate that includes an upper surface to which an external light is incident and a lower surface facing the upper surface and includes a plurality of pixel areas and a peripheral area adjacent to the pixel areas when viewed in a plan view, a plurality of pixels disposed on the lower surface of the first base substrate to respectively correspond to the pixel areas, and a black matrix layer disposed between the pixels and the lower surface of the first base substrate to overlap the peripheral area. The black matrix layer includes a low reflection layer disposed on the lower surface of the first base substrate and a light blocking layer disposed on the low reflection layer.
US09559120B2	Porous silicon relaxation medium for dislocation free CMOS devices A method for forming CMOS devices includes masking a first portion of a tensile-strained silicon layer of a SOI substrate, doping a second portion of the layer outside the first portion and growing an undoped silicon layer on the doped portion and the first portion. The undoped silicon layer becomes tensile-strained. Strain in the undoped silicon layer over the doped portion is relaxed by converting the doped portion to a porous silicon to form a relaxed silicon layer. The porous silicon is converted to an oxide. A SiGe layer is grown and oxidized to convert the relaxed silicon layer to a compressed SiGe layer. Fins are etched in the first portion from the tensile-strained silicon layer and the undoped silicon layer and in the second portion from the compressed SiGe layer.
US09559116B2	Semiconductor device A semiconductor device may include an insulating layer provided in one body on a substrate, a first gate electrode and a second gate electrode disposed on the insulating layer, the first and second gate electrodes extending in a first direction parallel to a top surface of the substrate, a first channel structure penetrating the first gate electrode and the insulating layer so as to be connected to the substrate, a second channel structure penetrating the second gate electrode and the insulating layer so as to be connected to the substrate, and a contact penetrating the insulating layer between the first gate electrode and the second gate electrode. The contact may be connected to a common source region formed in the substrate, and the common source region may have a first conductivity type. Further, the first gate electrode and the second gate electrode may be spaced apart from each other in a second direction at the same level from the substrate, wherein the second direction intersects the first direction and is parallel to the top surface of the substrate.
US09559114B2	Manufacturing method of three-dimensional non-volatile memory device including a selection gate having an L shape A 3-dimensional (3-D) non-volatile memory device includes a first channel protruding from a substrate, a selection gate formed on sidewalls of the first channel and in an L shape, and a gate insulating layer interposed between the first channel and the selection gate and surrounding the first channel. A method of manufacturing a 3-D non-volatile memory device includes forming first channels protruding from a substrate, forming a first gate insulating layer surrounding the first channels, and forming first selection gates having an L shape on sidewalls of the first channels on which the first gate insulating layers are formed.
US09559113B2	SSL/GSL gate oxide in 3D vertical channel NAND A memory device includes an array of strings of memory cells. The device includes a plurality of stacks of conductive strips separated by insulating material, including at least a bottom plane of conductive strips, a plurality of intermediate planes of conductive strips, and a top plane of conductive strips. A plurality of vertical active strips is formed between the plurality of stacks. Charge storage structures are formed in interface regions at cross-points between side surfaces of the conductive strips in the plurality of intermediate planes and the vertical active strips in the plurality of vertical active strips. Gate dielectric, having a different composition than the charge storage structures, is formed in interface regions at cross-points between the vertical active strips and side surfaces of the conductive strips in at least one of the top plane of conductive strips and the bottom plane of conductive strips.
US09559112B2	Semiconductor devices and methods of fabricating the same A method of fabricating a semiconductor memory device includes forming a mold stack on a substrate and the mold stack including first sacrificial layers and second sacrificial layers alternately stacked on the substrate. The method also includes forming a plurality of vertical channels that penetrate the mold stack and that contact the substrate, patterning the mold stack to form word line cuts between the vertical channels, the word line cuts exposing the substrate, removing one of the first and second sacrificial layers to form recessed regions in the mold stack, forming a data storage layer, at least a portion of the data storage layer being formed between the vertical channels and the gates, forming gates in the recessed regions, forming air gaps between the gates by removing the other of the first and second sacrificial layers, and forming an insulation layer pattern in the word line cuts.
US09559111B2	Three-dimensional semiconductor memory device A three-dimensional (3D) semiconductor memory device and a method for fabricating the same, the device including insulating layers stacked on a substrate; horizontal structures between the insulating layers, the horizontal structures including gate electrodes, respectively; vertical structures penetrating the insulating layers and the horizontal structures, the vertical structures including semiconductor pillars, respectively; and epitaxial patterns, each of the epitaxial patterns being between the substrate and each of the vertical structures, wherein a minimum width of the epitaxial pattern is less than a width of a corresponding one of the vertical structures.
US09559110B2	Dense arrays and charge storage devices There is provided a monolithic three dimensional array of charge storage devices which includes a plurality of device levels, wherein at least one surface between two successive levels is planarized by chemical mechanical polishing.
US09559108B2	Chip and an electronic device A method for processing a carrier accordance with various embodiments may include: forming a structure over the carrier, the structure including at least two adjacent structure elements arranged at a first distance between the same; depositing a spacer layer over the structure, wherein the spacer layer may be deposited having a thickness greater than half of the first distance, wherein the spacer layer may include electrically conductive spacer material; removing a portion of the spacer layer, wherein spacer material of the spacer layer may remain in a region between the at least two adjacent structure elements; and electrically contacting the remaining spacer material.
US09559106B2	Memory cell that prevents charge loss A memory cell including a substrate, a first dielectric layer, a floating gate, a second dielectric layer, and a control gate. The substrate includes a channel region situated between a drain region and a source region. The first dielectric layer is situated over the channel region and the floating gate is capacitively coupled to the channel region through the first dielectric layer. The second dielectric layer is situated over the floating gate and the control gate is capacitively coupled to the floating gate through the second dielectric layer. A dielectric nitride layer is situated between the floating gate and the second dielectric layer to prevent charge loss from the floating gate to the second dielectric layer.
US09559092B2	Electronic device including a diode An electronic device can include a substrate, lower and upper semiconductor layers over the substrate, and a doped region at the interface between the lower and upper semiconductor layers. The doped region can have a conductivity type opposite that of a dopant within the lower semiconductor layer. Within the lower semiconductor layer, the dopant can have a dopant concentration profile that has a relatively steeper portion adjacent to the substrate, another relatively steeper portion adjacent to an interface between the first and second semiconductor layers, and a relatively flatter portion between the relative steeper portions. A diode lies at a pn junction where a second dopant concentration profile of the first doped region intersects the relatively flatter portion of the first dopant concentration profile. The electronic device can be formed using different processes described herein.
US09559091B2	Method of manufacturing fin diode structure A method of manufacturing a fin diode structure includes providing a substrate, forming a doped well in said substrate, forming at least one doped region of first conductivity type or at least one doped region of second doped type in said doped well, performing an etching process to said doped region of first conductivity type or said doped region of second conductivity type to form a plurality of fins on said doped region of first conductivity type or on said doped region of second conductivity type, forming shallow trench isolations between said fins, and performing a doping process to said fins to form fins of first conductivity type and fins of second conductivity type.
US09559090B2	Silicon wafer with a plurality of chip patterns A silicon wafer includes a plurality of chip patterns arranged parallel to a first direction and a second direction intersecting the first direction, wherein the plurality of chip patterns include one or more patterns arranged in the first direction and the second direction in a straight line, the plurality of chip patterns include a first chip pattern and a second chip pattern adjacent to the first chip pattern, and the second chip pattern is arranged by rotating the first chip pattern at 90 degrees, the plurality of chip patterns are arranged so that an axis in which a cleavage plane of the silicon wafer and a surface arranged with the pattern on the silicon wafer intersect, and the first direction are different, and an angle between the axis and the first direction of the second chip pattern is 90 degrees.
US09559089B2	Semiconductor arrangement with active drift zone A semiconductor device arrangement includes a semiconductor layer and at least one series circuit with a first semiconductor device and a plurality of n second semiconductor devices, with n>1. The first semiconductor device has a load path and active device regions integrated in the semiconductor layer. Each second semiconductor device has active device regions integrated in the semiconductor layer and a load path between a first and second load terminal and a control terminal. The second semiconductor devices have their load paths connected in series and connected in series to the load path of the first semiconductor device. Each second semiconductor device has its control terminal connected to the load terminal of one of the other second semiconductor devices. One of the second semiconductor devices has its control terminal connected to one of the load terminals of the first semiconductor device. The arrangement further includes an edge termination structure.
US09559088B2	Multi-chip package having a substrate with a plurality of vertically embedded die and a process of forming the same An apparatus includes a substrate having a land side having a plurality of contact pads and a die side opposite the land side. The apparatus includes a first die and a second die wherein the first die and second die are embedded within the substrate such that the second die is located between the first die and the land side of the substrate.
US09559087B2	Techniques for packaging multiple device components Techniques for fabricating multiple device components. Specifically, techniques for fabricating a stacked package comprising at least one I/C module and a multi-chip package. The multi-chip package includes a plurality of integrated circuit dice coupled to a carrier. The dice are encapsulated such that conductive elements are exposed through the encapsulant. The conductive elements are electrically coupled to the chips. The I/C module comprises an interposer having a plurality of integrated circuit dice disposed thereon. The dice of the I/C module are electrically coupled to the interposer via bondwires. The interposer is configured such that vias are aligned with the conductive elements on the multi-chip package. The multi-chip package and I/C module may be fabricated separately and subsequently coupled together to form a stacked package.
US09559085B2	Method for producing an optoelectronic device and optoelectronic device A method for producing an optoelectronic device is specified. A housing base body is formed with a self-healing polymer material. A recess is found in the housing base body. The recess is confined by a bottom surface and at least one side wall which are formed at least in places by the plastic material of the base body. An optoelectronic semiconductor chip has a first main surface, a second main surface facing away from the first main surface and at least one side surface connecting the first main surface and the second main surface with each other. The optoelectronic semiconductor chip is placed in the recess, so that the first main surface is brought in contact with the bottom surface and the at least one side surface is brought in contact with the at least one side wall.
US09559078B2	Electronic component An electronic component includes an electrically conductive carrier. The electrically conductive carrier includes a carrier surface and a semiconductor chip includes a chip surface. One or both of the carrier surface and the chip surface include a non-planar structure. The chip is attached to the carrier with the chip surface facing towards the carrier surface so that a gap is provided between the chip surface and the carrier surface due to the non-planar structure of one or both of the carrier surface and the first chip surface. The electronic component further includes a first galvanically deposited metallic layer situated in the gap.
US09559077B2	Die attachment for packaged semiconductor device A method for forming a packaged semiconductor device includes attaching a first major surface of a semiconductor die to a plurality of protrusions extending from a package substrate. A top surface of each protrusion has a die attach material, and the plurality of protrusions define an open region between the first major surface of the semiconductor die and the package substrate. Interconnects are formed between a second major surface of the semiconductor die and the package substrate in which the second major surface opposite the first major surface. An encapsulant material is formed over the semiconductor die and the interconnects.
US09559070B2	Post-passivation interconnect structure and method of forming same A semiconductor device including a dielectric layer formed on the surface of a post-passivation interconnect (PPI) structures. A polymer layer is formed on the dielectric layer and patterned with an opening to expose a portion of the dielectric layer. The exposed portion of the dielectric layer is then removed to expose a portion of the PPI structure. A solder bump is then formed over and electrically connected to the first portion of the PPI structure.
US09559060B2	Method of forming stacked trench contacts and structures formed thereby Methods and associated structures of forming a microelectronic device are described. Those methods may include forming a structure comprising a first contact metal disposed on a source/drain contact of a substrate, and a second contact metal disposed on a top surface of the first contact metal, wherein the second contact metal is disposed within an ILD disposed on a top surface of a metal gate disposed on the substrate.
US09559058B2	Semiconductor device and method for manufacturing the same A semiconductor device includes a semiconductor substrate, an oxygen-containing insulating film disposed above the above-described semiconductor substrate, a concave portion disposed in the above-described insulating film, a copper-containing first film disposed on an inner wall of the above-described concave portion, a copper-containing second film disposed above the above-described first film and filled in the above-described concave portion, and a manganese-containing oxide layer disposed between the above-described first film and the above-described second film. Furthermore, a copper interconnection is formed on the above-described structure by an electroplating method and, subsequently, a short-time heat treatment is conducted at a temperature of 80° C. to 120° C.
US09559055B2	Semiconductor device A semiconductor device includes a fuse element that can be cut and removed by laser irradiation. The fuse element has a large width portion having a large sectional area to be irradiated with a laser spot, and two small width portions having a small sectional area connected to opposite sides of the large width portion. Penetration of moisture is suppressed even after cutting of the fuse element since the large width portion is removed by the laser irradiation and only the small width portions having the small sectional area remain as exposed cut surfaces.
US09559053B2	Compact vertical inductors extending in vertical planes A device includes a substrate, and a vertical inductor over the substrate. The vertical inductor includes a plurality of parts formed of metal, wherein each of the parts extends in one of a plurality of planes perpendicular to a major surface of the substrate. Metal lines interconnect neighboring ones of the plurality of parts of the vertical inductor.
US09559051B1	Method for manufacturing in a semiconductor device a low resistance via without a bottom liner A method for depositing a conductor in the via opening electronic structure removes the via bottom liner so that the conductor deposited in the via opening directly contacts the underlying conductive layer. The method includes depositing amorphous silicon over the dielectric layer and the liner layer on the via opening sidewalls and bottom. The amorphous silicon extends substantially over the entire via opening while leaving below a void within the via opening. The amorphous silicon over the via opening and on the via opening bottom and the liner layer on the via opening bottom are anisotropically etched to leave a layer of amorphous silicon over the dielectric layer and the via opening side walls. The amorphous silicon is then removed to form a via opening having a substantially open-bottom liner. The conductor is then deposited in the via opening and contacts the underlying conductive layer.
US09559050B2	Semiconductor device and manufacturing method thereof A method for manufacturing a semiconductor device includes forming a first conductor pattern and a second conductor pattern running side by side with each other, including forming a first portion of the first conductor pattern and a second portion of the second conductor pattern by patterning using a first mask, and forming a second portion of the first conductor pattern and a first portion of the second conductor pattern by patterning using a second mask. A first inter-conductor capacity is formed by the first portion of the first conductor pattern and the first portion of the second conductor pattern. A second inter-conductor capacity is formed by the second portion of the first conductor pattern and the second portion of the second conductor pattern.
US09559042B2	Semiconductor device A semiconductor device includes an insulating substrate having an insulating plate formed of ceramic and a circuit plate fixed on a main face of the insulating plate; a semiconductor element fixed on the circuit plate; a printed circuit board disposed to face the main face of the insulating plate; a ceramic plate disposed to face the main face of the insulating plate, and arranged at a position away from the main face of the insulating plate further than the printed circuit board; a supporting member fixed to the main face of the insulating plate or to the circuit plate, to fix a position of the ceramic plate; and a resin covering the circuit plate, the semiconductor element, the printed circuit board, and the ceramic plate.
US09559040B2	Double-sided segmented line architecture in 3D integration Embodiments of the present invention relate generally to electronic components such as semiconductor wafers and more particularly, to a double-sided three-dimensional (3D) hierarchal architecture scheme for multiple semiconductor wafers using an arrangement of through silicon vias (TSVs) and backside wiring. In an embodiment a first word line architecture may be formed on a front side of an IC chip and connected to a second word line architecture formed on a back side of the IC chip through intra-wafer, TSVs, thereby relocating required wiring to the back side of the IC chip.
US09559027B2	Semiconductor device and semiconductor module A semiconductor device includes a housing with a fragile portion. The fragile unit or portion has a resistance to a pressure or a melting point temperature that is lower than other portions of the housing. The semiconductor device further includes a plurality of semiconductor elements disposed inside the housing. Each semiconductor element includes a semiconductor element region having a first surface and a second surface opposite to the first surface. A first electrode is provided on the first surface and a second electrode is provided on the second surface.
US09559026B2	Semiconductor package having a multi-layered base A semiconductor package for mounting to a printed circuit board (PCB) includes a semiconductor die in a ceramic case, a conductive base coupled to the semiconductor die at a top surface of the conductive base, where the conductive base includes a first layer having a first coefficient of thermal expansion (CTE), and a second layer having at least one mounting tab and a second CTE. The conductive base is configured to reduce thermal stress in the ceramic case, where the first CTE is equal to or slightly different than a CTE of the ceramic case, the second CTE is greater than the first CTE, and a CTE of the PCB is greater than or equal to the second CTE. The conductive base is configured to electrically couple a power electrode of the semiconductor die to the PCB.
US09559018B2	Dual channel finFET with relaxed pFET region Fabricating a semiconductor device includes providing a strained semiconductor material (SSM) layer disposed on a dielectric layer, forming a first plurality of fins on the SSOI structure, at least one fin of the first plurality of fins is in a nFET region and at least one fin is in a pFET region, etching portions of the dielectric layer under portions of the SSM layer of the at least one fin in the pFET region, filling areas cleared by the etching, forming a second plurality of fins from the at least one fin in the nFET region such that each fin comprises a portion of the SSM layer disposed on the dielectric layer, and forming a third plurality of fins from the at least one fin in the pFET region such that each fin comprises a portion of the SSM layer disposed on a flowable oxide.
US09559017B2	Method of forming shallow trench isolations for a semiconductor device A method for forming a semiconductor structure is provided. The method includes providing a substrate having a first region and a second region; and forming at least one first trench in the first region of the substrate, and at least one second trench in second region of the substrate. The method also includes forming a first liner layer on side and bottom surfaces of the first trench, and the side and bottom surfaces of the second trench; and performing a rapid thermal oxy-nitridation process on the first liner layer to release a tensile stress between the first liner layer and the substrate. Further, the method includes removing a portion of the first liner layer in the first region to expose the first trench; and forming a second liner layer on the side and bottom surface of the first trench.
US09559015B2	Method of forming a conductive line pattern in FinFET semiconductor devices The present invention provides a formation method of forming, on a substrate, a fin pattern in which a plurality of linear fins are arrayed, the method comprising forming a resist pattern having a line-and-space shape on the substrate, wherein the substrate includes a first active region and a second active region adjacent to each other, and in the forming the resist pattern, the resist pattern is formed on the substrate such that an interval between a first fin and a second fin becomes wider than a pitch of the fins, the first fin being closest to a boundary of the first active region and the second active region out of the fins formed in the first active region, and the second fin being closest to the boundary out of the fins formed in the second active region.
US09559014B1	Self-aligned punch through stopper liner for bulk FinFET A technique relates to forming a self-aligning field effect transistor. A starting punch through stopper comprising a substrate having a plurality of fins patterned thereon, an n-type field effect transistor (NFET) region, a p-type field effect transistor (PFET) region, and a center region having a boundary defect at the interface of the NFET region and the PFET region is first provided. The field effect transistor is then masked to mask the NFET region and the PFET region such that the center region is exposed. A center boundary region is then formed by etching the center region to remove the boundary defect.
US09559013B1	Stacked nanowire semiconductor device A semiconductor device a first epitaxially grown source/drain region comprising a first material arranged on a first fin, a second epitaxially grown source/drain region comprising the first material arranged on the second fin, the second epitaxially grown source/drain region arranged above the first epitaxially grown source/drain region, a third epitaxially grown source/drain region comprising the first material arranged on a second fin, a fourth epitaxially grown source/drain region comprising a second material arranged on the second fin, the fourth epitaxially grown source/drain region arranged above the third epitaxially grown source/drain region, and a gate stack arranged over a channel region of the first fin and a channel region of the second fin.
US09559012B1	Gallium nitride complementary transistors A semiconductor device includes a substrate, a III-nitride buffer layer on the substrate, an N-channel transistor including a III-nitride N-channel layer on one portion of the buffer layer, and a III-nitride N-barrier layer for providing electrons on top of the N-channel layer, wherein the N-barrier layer has a wider bandgap than the N-channel layer, a P-channel transistor including a III-nitride P-barrier layer on another portion of the buffer layer for assisting accumulation of holes, a III-nitride P-channel layer on top of the P-barrier layer, wherein the P-barrier layer has a wider bandgap than the P-channel layer, and a III-nitride cap layer doped with P-type dopants on top of the P-channel layer.
US09559011B2	Mechanisms for forming FinFETs with different fin heights Methods for forming a semiconductor device are provided. The method includes forming a first fin and a second fin over a substrate and forming a first isolation structures and a second isolation structure adjacent to the substrate. The first fin is partially surrounded by the first isolation structure and a second fin is partially surrounded by the second isolation structure, and the first isolation structure has a dopant concentration higher than that of the second isolation structure.
US09559008B2	FinFET-based ESD devices and methods for forming the same A device includes a plurality of STI regions, a plurality of semiconductor strips between the STI regions and parallel to each other, and a plurality of semiconductor fins over the semiconductor strips. A gate stack is disposed over and crossing the plurality of semiconductor fins. A drain epitaxy semiconductor region is disposed on a side of the gate stack and connected to the plurality of semiconductor fins. The drain epitaxy semiconductor region includes a first portion adjoining the semiconductor fins, wherein the first portion forms a continuous region over and aligned to the plurality of semiconductor strips. The drain epitaxy semiconductor region further includes second portions farther away from the gate stack than the first portion. Each of the second portions is over and aligned to one of the semiconductor strips. The second portions are parallel to each other, and are separated from each other by a dielectric material.
US09559007B1	Plasma etch singulated semiconductor packages and related methods A method of forming a plurality of semiconductor packages includes providing an array of unsingulated semiconductor packages that are at least partially encapsulated in an encapsulant. The array of unsingulated semiconductor packages may be coupled with a lead frame or a substrate. A first plurality of singulation lines are simultaneously etched in the encapsulant through slits in an etch mask using a plasma etching process and a fixture coupled with the array. A second plurality of parallel singulation lines may also be etched. The first and second pluralities of singulation lines may include substantially straight or arcuate lines. The second plurality of parallel singulation lines may be substantially perpendicular to the first plurality of parallel singulation lines and be formed using the plasma etching process, the fixture, and an etch mask. The formation of singulation lines in the array singulates the array into a plurality of singulated semiconductor packages.
US09558999B2	Ultra-thin metal wires formed through selective deposition The embodiments of the present invention relate generally to the fabrication of integrated circuits, and more particularly to a structure and method for fabricating a pair of ultra-thin metal wires in an opening using a selective deposition process.
US09558994B2	Semiconductor devices and methods of fabricating the same A semiconductor device includes a substrate including a first region and a second region, first conductive patterns disposed on the first region and spaced apart from each other by a first distance, second conductive patterns disposed on the second region and spaced apart from each other by a second distance greater than the first distance, and an interlayer insulating layer disposed between the second conductive patterns and including at least one recess region having a width corresponding to the first distance.
US09558992B2	Metal wiring of semiconductor device and method for manufacturing the same A metal wiring for applying a voltage to a semiconductor component of a semiconductor device, the semiconductor device comprising a low voltage applying region adjacent to a high voltage applying region, is provide. The metal wiring includes: an isolator region, a first lower metal layer electrically connected to the semiconductor component, a first upper metal layer configured to be electrically connected to an external power supply, and a plurality of inter-metal dielectric layers deposited between the first lower metal layer and the first upper metal layer, each of the plurality of inter-metal dielectric layers comprising at least one contact plug for providing an electrical connection between the first lower metal layer and the first upper metal layer.
US09558988B2	Method for filling the trenches of shallow trench isolation (STI) regions A method for manufacturing a shallow trench isolation (STI) region with a high aspect ratio is provided. A semiconductor substrate is provided with a trench. A first dielectric layer is formed lining the trench. A second dielectric layer is formed filling the trench over the first dielectric layer. In some embodiments, before forming the second dielectric layer, ions are implanted into an implant region of the first dielectric layer that extends along and is limited to a lower region of the trench. In alternative embodiments, after forming the second dielectric layer, an ultraviolet curing process is performed to the second dielectric layer. With the second dielectric layer formed and, in some embodiments, the ultraviolet curing process completed, an annealing process is performed to the second dielectric layer. A semiconductor structure for a STI region is also provided.
US09558985B2	Vacuum chuck A vacuum chuck is disclosed for holding and positioning wafers more stably and securely. The vacuum chuck includes a supporting assembly having a receiving groove and at least one first vacuum aperture defined in the receiving groove. A seal unit includes a seal ring bulging to form a vacuum trough. The seal ring is fixed in the receiving groove of the supporting assembly and has at least one second vacuum aperture communicating with the first vacuum aperture. A chuck connector fastened with the supporting assembly has at least one vacuum port and at least one vacuum orifice communicating with the vacuum port. At least one vacuum hose connects the first vacuum aperture, the second vacuum aperture with the vacuum orifice and the vacuum port of the chuck connector for evacuating the air of the vacuum trough to hold and position the wafer on the seal ring and the supporting assembly.
US09558980B2	Vapor compression refrigeration chuck for ion implanters Aspects of the present invention relate to ion implantation systems that make use of a vapor compression cooling system. In one embodiment, a thermal controller in the vapor compression system sends refrigeration fluid though a compressor and a condenser according to an ideal vapor compression cycle to help limit or prevent undesired heating of a workpiece during implantation, or to actively cool the workpiece.
US09558963B2	Plasma reactor with conductive member in reaction chamber for shielding substrate from undesirable irradiation Placing a conductive member between a plasma chamber in a remote plasma reactor and a substrate to shield the substrate from irradiation of undesirable electromagnetic radiation, ions or electrons. The conductive member blocks the electromagnetic radiation, neutralizes ions and absorbs the electrons. Radicals generated in the plasma chambers flows to the substrate despite the placement of the conductive member. In this way, the substrate is exposed to the radicals whereas damages to the substrate due to electromagnetic radiations, ions or electrons are reduced or removed.
US09558962B2	Substrate processing method A method for passivating a surface of a semiconductor substrate with fluorine-based layer to protect the surface against oxidation and allow longer queue times. According to one embodiment, the method includes providing a substrate having an oxidized layer formed thereon, replacing the oxidized layer with a fluorine-based layer, exposing the fluorine-based layer to an oxidizing atmosphere, where the fluorine-based layer protects the substrate against oxidation by the oxidizing atmosphere, and removing the fluorine-based layer from the substrate using a plasma process. According to another embodiment, the method includes providing a passivated substrate in a vacuum processing tool, the passivated substrate having a fluorine-based layer thereon that is effective for protecting the passivated substrate against oxidation by an oxidizing atmosphere, removing the fluorine-based layer from the passivated substrate using a microwave plasma process in the vacuum processing tool, thereby forming a clean substrate, and processing the clean substrate under vacuum conditions.
US09558961B2	Manufacturing method of semiconductor device In accordance with an embodiment, a manufacturing method of a semiconductor device includes: respectively forming a first layer and a second layer at the top of a protruding portion and at the bottom of a depressed portion of a treatment target having protrusions/depressions in such a manner that sidewalls of the protruding portion is exposed, supplying a treatment liquid to the treatment target having the first layer and the second layer, bringing a catalyst into contact with or closer to the first layer and thereby increasing the dissolution rate of the first layer in dissolving into the treatment liquid and dissolving the first layer into the treatment liquid, and sequentially dissolving the protruding portion and the second layer into the treatment liquid after the dissolution of the first layer.
US09558960B2	Substrate processing method, non-transitory storage medium and heating apparatus A substrate processing method includes a coating step that applies a coating liquid to a substrate having a front surface on which a pattern is formed, thereby forming a coating film on the substrate, a film removing step that heats the substrate to gasify components of the coating film thereby to reduce a thickness of the film, and a film curing step that is performed after or simultaneously with the film removing step and that heats the substrate to cure the coating film through crosslinking reaction. The film removing step is performed under conditions ensuring that an average thickness of the cured coating film is not greater than 80% of an average thickness of the coating film before being subjected to the film removing step.
US09558958B2	Semiconductor device and method of forming sacrificial protective layer to protect semiconductor die edge during singulation A semiconductor wafer contains a plurality of semiconductor die separated by a saw street. An insulating layer is formed over the semiconductor wafer. A protective layer is formed over the insulating layer including an edge of the semiconductor die along the saw street. The protective layer covers an entire surface of the semiconductor wafer. Alternatively, an opening is formed in the protective layer over the saw street. The insulating layer has a non-planar surface and the protective layer has a planar surface. The semiconductor wafer is singulated through the protective layer and saw street to separate the semiconductor die while protecting the edge of the semiconductor die. Leading with the protective layer, the semiconductor die is mounted to a carrier. An encapsulant is deposited over the semiconductor die and carrier. The carrier and protective layer are removed. A build-up interconnect structure is formed over the semiconductor die and encapsulant.
US09558955B2	Formation method of semiconductor device that includes performing hydrogen-containing plasma treatment on metal gate stack A method for forming a semiconductor device structure is provided. The method includes forming a metal gate stack over a semiconductor substrate. The method also includes performing a hydrogen-containing plasma treatment on the metal gate stack to modify a surface of the metal gate stack. The hydrogen-containing plasma treatment includes exciting a gas mixture including a first hydrogen-containing gas and a second hydrogen-containing gas to generate a hydrogen-containing plasma.
US09558952B2	Alkaline pickling process A process for edge isolation or texture smoothing of a substrate, in which a process medium which allows control treatment of limited regions of the substrate is used. The process is therefore particularly suitable for one-sided treatment of substrates. The viscosity of the process medium plays a central role here. Furthermore, an apparatus designed for the process is presented.
US09558951B2	Trap rich layer with through-silicon-vias in semiconductor devices An integrated circuit chip is formed with a circuit layer, a trap rich layer and through-semiconductor-vias. The trap rich layer is formed above the circuit layer. The through-semiconductor-vias are also formed above the circuit layer. In some embodiments, the circuit layer is included in a wafer, and the trap rich layer and through-semiconductor-vias are included in another wafer. The two wafers are bonded together after formation of the trap rich layer and through-semiconductor-vias. Additionally, in some embodiments, yet another wafer may also be bonded to the wafer that includes the trap rich layer and through-semiconductor-vias. Furthermore, in some embodiments, another circuit layer may be formed in the wafer that includes the trap rich layer and through-semiconductor-vias.
US09558949B2	Vertical bit line non-volatile memory systems and methods of fabrication Three-dimensional (3D) non-volatile memory arrays having a vertically-oriented thin film transistor (TFT) select device and methods of fabricating such a memory are described. The vertically-oriented TFT may be used as a vertical bit line selection device to couple a global bit line to a vertical bit line. A select device pillar includes a body and upper and lower source/drain regions. At least one gate is separated horizontally from the select device pillar by a gate dielectric. The gates overlie the global bit lines with one or more insulating layers therebetween to provide adequate isolation between the gates and the global bit lines. Processes for fabricating the vertical TFT select devices utilize a gate dielectric and optional dielectric bases to provide isolation between the gates and bit lines.
US09558948B1	Laser thermal annealing of deep doped region using structured antireflective coating A semiconductor body having a first surface is provided. A deep doped region of the semiconductor body is formed using masked ion implantation to implant dopant atoms into a discrete region within the semiconductor body. A structured anti-reflective coating region is formed on a portion of the first surface that is aligned with the deep doped region in a lateral direction of the semiconductor body, the lateral direction being parallel to the first surface. A laser thermal anneal of the deep doped region of the semiconductor body is performed through the anti-reflective coating region thereby activating the implanted dopant atoms in the deep doped region.
US09558945B2	Semiconductor memory device with electrode connecting to circuit chip through memory array chip According to one embodiment, the array chip includes a three-dimensionally disposed plurality of memory cells and a memory-side interconnection layer connected to the memory cells. The circuit chip includes a substrate, a control circuit provided on the substrate, and a circuit-side interconnection layer provided on the control circuit and connected to the control circuit. The circuit chip is stuck to the array chip with the circuit-side interconnection layer facing to the memory-side interconnection layer. The bonding metal is provided between the memory-side interconnection layer and the circuit-side interconnection layer. The bonding metal is bonded to the memory-side interconnection layer and the circuit-side interconnection layer.
US09558941B2	Method of forming oxide thin film and method of fabricating oxide thin film transistor using hydrogen peroxide Provided are a method of forming an oxide thin film using hydrogen peroxide, and a method of fabricating an oxide thin film transistor using hydrogen peroxide. Embodiments of the present disclosure provide methods of forming an oxide film, including: mixing hydrogen peroxide with a precursor solution in which a precursor material is dissolved in a solvent; applying the precursor solution mixed with the hydrogen peroxide to a substrate; heat treating the substrate.
US09558940B2	Method and apparatus for forming silicon film A method of forming a silicon film in grooves formed on a surface of an object to be processed, the method including forming a first silicon film containing impurities so as to embed the first silicon film in the grooves of the object to be processed; doping the impurities in the vicinity of the surface of the first silicon film; expanding opening portions of the grooves by etching the first silicon film thereby forming expanded openings having grooves; and forming a second silicon film so as to embed the second silicon film in the grooves of the expanded openings is provided.
US09558937B2	Method of manufacturing semiconductor device, substrate processing apparatus, and non-transitory computer-readable recording medium A method of manufacturing a semiconductor device includes: (a) forming a first film containing a metal element on a substrate by performing a cycle a predetermined number of times, the cycle including: (a-1) supplying a first precursor gas being a fluorine-free inorganic gas containing the metal element to the substrate; and (a-2) supplying a first reactant gas having reducibility to the substrate; (b) forming a second film containing the metal element on the first film by performing a cycle a predetermined number of times, the cycle including: (b-1) supplying a second precursor gas containing the metal element and fluorine to the substrate; and (b-2) supplying a second reactant gas having reducibility to the substrate; and (c) forming a film containing the metal element and obtained by the first film and the second film being laminated on the substrate by performing the (a) and (b).
US09558920B2	System and method for direct fiber-end surface structuring A fiber-end surface structuring chamber or system having a main body with multiple ports including a fiber-holder port, a process port that is either a stamp/shim holder port or a plasma etching enabler port, an evacuation port, a gas delivery port, and one or more observation ports, where the fiber-end surface structuring system forms structures directly into the end of the fiber to enhance transmission of light over a wide range of wavelengths and increase the laser damage threshold.
US09558917B2	Adjustable non-dissipative voltage boosting snubber network for achieving large boost voltages This disclosure describes a non-dissipative snubber circuit configured to boost a voltage applied to a load after the load's impedance rises rapidly. The voltage boost can thereby cause more rapid current ramping after a decrease in power delivery to the load which results from the load impedance rise. In particular, the snubber can comprise a combination of a unidirectional switch, a voltage multiplier, and a current limiter. In some cases, these components can be a diode, voltage doubler, and an inductor, respectively.
US09558914B2	Bipolar wafer charge monitor system and ion implantation system comprising same A charge monitor having a Langmuir probe is provided, wherein a positive and negative charge rectifier are operably coupled to the probe and configured to pass only a positive and negative charges therethrough, respectively. A positive current integrator is operably coupled to the positive charge rectifier, wherein the positive current integrator is biased via a positive threshold voltage, and wherein the positive current integrator is configured to output a positive dosage based, at least in part, on the positive threshold voltage. A negative current integrator is operably coupled to the negative charge rectifier, wherein the negative current integrator is biased via a negative threshold voltage, and wherein the negative current integrator is configured to output a negative dosage based, at least in part, on the negative threshold voltage. A positive charge counter and a negative charge counter are configured to respectively receive the output from the positive current integrator and negative current integrator in order to provide a respective cumulative positive charge value and cumulative negative charge value associated with the respective positive charge and negative charge.
US09558912B2	Ion milling device The present invention aims at providing an ion milling apparatus for emitting an ion beam to a sample to process the sample and capable of controlling the temperature of the sample with high accuracy regardless of deformation or the like of the sample being irradiated with the ion beam, and proposes an ion milling apparatus including at least one of a shield holding member for supporting a shield for shielding the sample from the ion beam while exposing a part of the sample to the ion beam; a shifting mechanism for shifting a surface of the sample stand in contact with the sample following deformation of the sample during irradiation with the ion beam, the shifting mechanism having a temperature control mechanism for controlling temperature of at least one of the shield holding member and the sample stand; and a sample holding member disposed between the shield and the sample, the sample holding member deforming following deformation of the sample during irradiation with the ion beam, for example.
US09558906B2	Electrical switch An electrical switch is disclosed, especially an electrical circuit breaker, including an overcurrent tripping device which, in the event of an overcurrent situation, switches off the flow of current through the switch; and a thermal tripping device which, in the event of a thermal overload, switches off the flow of current through the switch. In at least one embodiment, the overcurrent tripping device includes a first shaft which is disposed such that, in the event of an overcurrent situation, it is rotated from a first position into a second position and thereby indicates the overcurrent situation; and the thermal tripping device includes a second shaft which is disposed such that, it is rotated in the event of a thermal overload and is also rotated as well in the event of a rotation of the first shaft and when rotated initiates a switching-off of the switch.
US09558904B2	Fuse A fuse comprises two electric contacts with a contact width, a fuse element disposed between two opposed fuse ends and comprising a first fuse having a minimum-section part with a first width and a first section. The fuse element further comprises at least one second fuse disposed between the first fuse and one of said two fuse ends. The second fuse comprises a narrowed part with a second width smaller than the first width and the contact width and with a second section ranging from 20% to 50% of the first section.
US09558901B2	Method of manufacturing bus bar A bus bar forming die (1) includes an upstream-side die block (25) configured to shape an upstream-side fuse-element portion (9) of a bus bar (23), a downstream-side die block (27) configured to shape a downstream-side fuse-element portion (15) of the bus bar (23), and a fixation portion die block (29) configured to shape fixation portions (21) of the bus bar (23). The upstream-side die block (25), the downstream-side die block (27), and the fixation portion die block (29) are configured to shape the bus bar (23) while placed in respective predetermined positions. Each of the upstream-side die block (25), the downstream-side die block (27), and the fixation portion die block (29) is replaceable in accordance with an intended shape of the bus bar (23).
US09558899B2	Direct-current contactor with additional switching capability for AC loads and a polarity against the preferential current direction Disclosed is a DC contactor comprising a double break with two contact points, each having a fixed and a movable contact, the movable contacts arranged on a contact bridge. The contactor includes an arc extinguishing device and a blowing device configured to blow a switch arc, which forms at the first contact point when the contact points are being opened, into the arc extinguishing device, when switching takes place in the preferential current direction. A commutating plate is arranged adjacent the movable contact of the first contact point, the contact bridge and the commutating plate being electrically insulated from one another and the commutating plate being potentially connected to the fixed contact of the second contact point, so that, when switching takes place in the preferential current direction, the switch arc forming at the first contact point jumps from the contact bridge to the commutating plate by the blowing device.
US09558898B2	Magnetic control switch A contactless control switch that is resistant to influence from external magnetic fields is disclosed. The switch includes a switch housing, a button moveably mounted to the housing that has at least one protrusion formed on an underside thereof, a circuit board mounted to the housing and including at least one magnet sensor, and a magnet holder positioned adjacent each respective magnet sensor, the magnet holder housing a positive field magnet and a negative field magnet therein and being rotatably mounted to the housing. A respective protrusion interacts with the magnet holder responsive to an actuation of the button by a user, so as to position one of the positive field magnet and the negative field magnet proximate to its respective sensor and the other of the positive field magnet and the negative field magnet distal to its respective sensor.
US09558895B2	Method for preparing carbon nanofiber composite and carbon nanofiber composite prepared thereby The present invention relates to a method for preparing a carbon nanofiber composite, and a carbon nanofiber composite prepared thereby. The method for preparing a carbon nanofiber composite provided by the present invention has reduced costs and is economical and efficient compared with a convention method for preparing a carbon nanofiber composite. In addition, the carbon nanofiber composite of the present invention can provide remarkable decomposition performance of organic pollutants, and a carbon nanofiber composite prepared by the preparation method of the present invention can be used in an electrode for an electric double-layer supercapacitor, a fuel cell electrode, a filter, a hydrogen storage material, and the like.
US09558893B2	Power storage device A power storage device that includes an electrolyte retaining layer between a first internal electrode and a second internal electrode. The electrolyte retaining layer retains an electrolyte. The first internal electrode has a first current collector and a first active material layer. The first active material layer is on a surface of the first current collector, which is closer to the second internal electrode. The second internal electrode has a second current collector and a second active material layer. The second active material layer is on a surface of the second current collector, which is closer to the first internal electrode. At least one of the electrolyte retaining layer, first active material layer, and second active material layer is exposed at the first and second end surfaces of the power storage device.
US09558892B1	Thin-film electro devices based on derivatized poly (benzo-isimidazobenzophenanthroline) ladder polymers A method for making electronic devices based on derivatized ladder polymer poly(benzo-isimidazobenzophenanthroline) (BBL) including photovoltaic modules and simple thin film transistors in planar and mechanically flexible and stretchable constructs.
US09558880B2	Microtechnical component for a magnetic sensor device or a magnetic actuator and production method for a microtechnical component for a magnetic sensor device or a magnetic actuator A microtechnical component for a magnetic sensor device or a magnetic actuator includes: a magnetic core oriented along an axis; a first drive coil having windings arranged in a first direction of rotation about the magnetic core; a contact, via which a first current flow is created in a first current direction through the first drive coil; and a second drive coil having windings arranged in a second direction of rotation about the magnetic core, the first and second directions of rotation differing from one another. Simultaneously with the first current flow, a second current flow is created via the contact in a second current direction opposite the first current direction through the second drive coil.
US09558879B2	Teardrop-shaped magnetic core and coil device using same The present invention provides a teardrop-shaped magnetic core having excellent manufacturing efficiency, a large initial inductance, and stable DC superposition characteristics and a coil device using this teardrop-shaped magnetic core. A teardrop-shaped magnetic core according to the present invention is a magnetic core that is made from a magnetic material and is to be used in a coil device 20, the magnetic core including a first rectilinear portion 11 and a second rectilinear portion 15 that have a straight-line shape and are connected to each other at one end via a bent portion 16 that is bent at a right angle, and a circular arc portion 17 that has a circular arc shape and connects the first rectilinear portion and the second rectilinear portion to each other at the other end. A coil device according to the present invention is configured by winding a wire around the teardrop-shaped magnetic core 10.
US09558878B1	Multi-stage permanent magnet structure and integrated power inductors Apparatuses and methods directed to multi-stage permanent magnet and implementations of a permanent magnet on-chip power inductor. Various circuit models, design considerations and simulation results are described. The multi-stage permanent magnet includes layers with uniform or non-uniform magnets used to control the flux distribution. The permanent magnet on-chip power converter for DC-DC switching power converters that may include a top ferrite layer, a spiral winding layer, a permanent magnet layer, a bottom ferrite layer, and a substrate layer. The permanent magnet layer may comprise a multi-stage structure wherein each stage has a decreasing area as compared to an immediate lower stage. A method of manufacturing a Permanent On-Chip Power Inductor (PMOI) is also disclosed.
US09558877B2	Ferrite ceramic composition, ceramic electronic component, and method for producing ceramic electronic component A coil conductor and a via electrode placed away from the coil conductor are embedded in a magnetic layer. The magnetic layer is sandwiched between a pair of non-magnetic layers. The coil conductor and the via electrode are formed from a conductive material containing Cu as its main constituent, and the magnetic layer is formed from Ni—Mn—Zn ferrite where the CuO molar content is 5 mol % or less, and (x, y) falls within the range of A (25, 1), B (47, 1), C (47, 7.5), D (45, 7.5), E (45, 10), F (35, 10), G (35, 7.5), and H (25, 7.5) when the molar content x of Fe2O3 and the molar content y of Mn2O3 are represented by (x, y). Thus, insulation properties can be ensured, favorable electrical characteristics can be achieved, and a ceramic electronic component is achieved which is able to be reduced in size.
US09558876B2	Halbach array of electromagnets with substantially contiguous vertical and horizontal cores Electromagnetic Halbach array device with substantially contiguous vertical and horizontal cores. The device is equipped with horizontal cores having protrusions which establish substantial contiguity between horizontal and vertical cores.
US09558868B2	Use of hydrophobic epoxide resin system for encapsulation of a instrument transformer Disclosed is the use of a curable composition for padding-free encapsulation of instrument transformers comprising (a) a cycloaliphatic epoxy resin, (b) a polyoxyalkylene diglycidylether (c) an OH-terminated polysiloxane, (d) a cyclic polysiloxane and (e) a non-ionic, fluoroaliphatic surface-active reagent, (f) a filler, (g) a hardener selected from anhydrides, (h) a curing accelerator selected from accelerators for anhydride curing of epoxy resins.
US09558865B2	Cable with resin molded body and method of manufacturing the same A method of manufacturing a cable with resin molded body, wherein the cable with resin molded body includes a cable and a resin molded body formed by resin molding, wherein the resin molded body includes a main body to cover the tip portion of the cable and a flange integrally molded with the main body, and wherein the flange includes a bolt hole through which a bolt is inserted so as to fix the flange to the attachment object. The method includes molding the resin molded body by injecting a resin into a mold, the mold including a main body-molding portion for molding the main body, a flange-molding portion for molding the flange and a first resin inlet formed behind the flange-molding portion in relation to the main body-molding portion, and injecting the resin through the first resin inlet into the mold during the molding of the resin molded body.
US09558862B2	Conductive polymer composition, coated article having antistatic film formed from the composition, and patterning process using the composition The present invention is a conductive polymer composition containing a π-conjugated conductive polymer, a polyanion, and a gemini surfactant. There can be provided a conductive polymer composition that has excellent antistatic performance and excellent application properties, does not adversely affect a resist, and can be suitably used in lithography using electron beam or the like.
US09558861B2	Block copolymers that disperse nanofillers in water The invention relates to novel block copolymers that enable a good dispersion of nanofillers in water and also to a dispersion of nanofillers obtained owing to these block copolymers. This dispersion may be used as a transparent electrode in organic solar cells or other photoemitter or photoreceptor devices.
US09558859B2	Multilayer substrate and method for manufacturing the same The invention provides a slip layer substrate which can reduce the thermal residual stresses between components induced by their mismatch of thermal expansion, thus greatly improve the reliability of electronic packages. The slip layer substrate comprises: a base material; a first metallization layer formed on the base material; a first diffusion barrier layer formed on the first metallization layer; a slip layer formed on the first diffusion barrier layer; a second diffusion barrier layer formed on the slip layer; and a second metallization layer formed on the second diffusion barrier layer.
US09558858B2	System and method for imaging a sample with a laser sustained plasma illumination output The inspection of a sample with VUV light from a laser sustained plasma includes generating pumping illumination including a first selected wavelength, or range of wavelength, containing a volume of gas suitable for plasma generation, generating broadband radiation including a second selected wavelength, or range of wavelengths, by forming a plasma within the volume of gas by focusing the pumping illumination into the volume of gas, illuminating a surface of a sample with the broadband radiation emitted from the plasma via an illumination pathway, collecting illumination from a surface of the sample, focusing the collected illumination onto a detector via a collection pathway to form an image of at least a portion of the surface of the sample and purging the illumination pathway and/or the collection pathway with a selected purge gas.
US09558851B2	Soft post package repair of memory devices Apparatus and methods for soft post package repair are disclosed. One such apparatus can include memory cells in a package, volatile memory configured to store defective address data responsive to entering a soft post-package repair mode, a match logic circuit and a decoder. The match logic circuit can generate a match signal indicating whether address data corresponding to an address to be accessed matches the detective address data stored in the volatile memory. The decoder can select a first group of the memory cells to be accessed instead of a second group of the memory cells responsive to the match signal indicating that the address data corresponding to the address to be accessed matches the defective address data stored in the volatile memory. The second group of the memory cells can correspond to a replacement address associated with other defective address data stored in non-volatile memory of the apparatus.
US09558848B2	Testing storage device power circuitry The present invention extends to methods, systems, and computer program products for testing storage device power circuitry. A storage device controller includes an embedded test program. The storage device controller executes the test program in response to receiving a test command. In one aspect, the test program issues a plurality of different command patterns to test shared power circuitry of storage device components (e.g., shared by an array of NAND flash memory devices). The test program identifies a command pattern that causes a greatest total current draw. In another aspect, the test program issues a specified command pattern (possibly repeatedly) to shared power circuitry to determine if the shared power circuitry fails.
US09558844B2	Identifying stacked dice Various embodiments comprise apparatuses to assign unique device identifier values to addressable devices in a stacked package. In one embodiment, an apparatus is disclosed including a stacked package with at least two addressable devices. Each of the addressable devices includes data input and switch path circuitry, a shift register coupled to the data input and switch path circuitry, and a single through-substrate via (TSV) through which the unique device identifier values can be assigned. The single TSV is coupled to the data input and switch path circuitry and between adjacent ones of the at least two addressable devices. Additional apparatuses, systems, and methods are described.
US09558842B2	Discrete three-dimensional one-time-programmable memory The present invention discloses a discrete three-dimensional one-time-programmable memory (3D-OTP). It comprises at least a 3D-array die and at least a peripheral-circuit die. At least a peripheral-circuit component of the 3D-OTP arrays is located on the peripheral-circuit die instead of the 3D-array die. The 3D-array die and the peripheral-circuit die have substantially different back-end-of-line (BEOL) structures.
US09558835B2	Semiconductor device and operating method thereof Disclosed are a semiconductor device and an operating method thereof. The semiconductor device includes a plurality of memory blocks including cell strings coupled between bit lines and a source line, a peripheral circuit configured to perform an erase operation on a selected memory block among the plurality of memory blocks; and a control circuit configured to control the peripheral circuit, so that when an erase command is received, local word lines coupled to a non-selected memory block among the plurality of memory blocks are pulled to ground, the local word lines coupled to the non-selected memory block float after a pre-erase voltage lower than an erase voltage is applied to the source line, and the erase operation of the selected memory block is performed by applying the erase voltage to the source line.
US09558834B2	Nonvolatile memory device and an erasing method thereof An erase method of a nonvolatile memory device includes applying an erase voltage to a substrate; sensing a temperature of a memory cell array; setting a delay time based on the temperature of the memory cell array, wherein the delay time starts in response to the erase voltage being applied to the substrate; applying a ground voltage to a ground selection line connected to a ground selection transistor during the delay time; and increasing a voltage of the ground selection line after the delay time.
US09558833B2	Write controlling method for memory A three dimensional stacked nonvolatile semiconductor memory according to an example of the present invention includes a memory cell array comprised of first and second blocks. The first block has a first cell unit which includes a memory cell to be programmed and a second cell unit which does not include a memory cell to be programmed, and programming is executed by applying a program potential or a transfer potential to word lines in the first block after the initial potential of channels of the memory cells in the first and second cell units is set to a plus potential. In the programming, the program potential and the transfer potential are not applied to word lines in the second block.
US09558832B2	Semiconductor device including boosted voltage supply circuit for supplying boosted voltage to memory array To maintain constant an output voltage of a boosted voltage circuit even when a program current of a nonvolatile memory increases; in a boosted voltage circuit provided in a semiconductor device, an output voltage of a charge pump is detected by a voltage dividing circuit, and on-off control is performed on an oscillation circuit for driving the charge pump so that the detected output voltage becomes constant. Further, an output current of the charge pump is detected, and a control current according to a magnitude of the detected output current is generated. The control current is fed into or drawn from a coupling node between a plurality of series-coupled resistance elements configuring the voltage dividing circuit.
US09558831B2	Non-volatile memory programming Some embodiments include a memory device and a method of programming memory cells of the memory device. One such method includes applying voltages to data lines associated with different groups of memory cells during a programming operation. Such a method applies the voltages to the data lines associated with a last group of memory cells being programmed in a different fashion from the other groups of memory cells after the other groups of memory cells have been programmed. Other embodiments including additional memory devices and methods are described.
US09558827B2	Semiconductor memory device having memory strings including drain-side and source-side memory cells connected to pipe transistor and peripheral circuit suitable for applying pipe gate voltage to pipe transistor during read operation A semiconductor memory device is provided. The semiconductor memory device includes memory strings including drain-side memory cells connected between a bit line and a pipe transistor, and source-side memory cells connected between the pipe transistor and a source line, and a peripheral circuit suitable for applying a pipe gate voltage to a pipe gate of the pipe transistor before applying pass voltages to turn on non-selected memory cells among the drain-side memory cells and the source-side memory cells during a read operation.
US09558825B1	System and method to discover and encode indirect associations in associative memory Described is a system for detecting and encoding indirect associations in associative memory. The system receives a data storage input in a content-addressable memory (CAM), the data storage input comprising an association between a first data pattern A and a second data pattern B. At least one indirect association related to the data storage input is identified with an inductive logic unit (ILU) interfaced with the CAM, and the indirect association is stored for later recall. A query is generated from the ILU to the CAM to determine whether either of the first data pattern A or the second data pattern B is stored as part of an existing association in the CAM. If either the first data pattern A or the second data pattern B are known, then a new indirect association for the known data pattern is stored.
US09558821B2	Resistive memory device and method of operating the same Provided are a resistive memory device and a method of the resistive memory device. The method of operating the resistive memory device includes performing a pre-read operation on memory cells in response to a write command; performing an erase operation on one or more first memory cells on which a reset write operation is to be performed, determined based on a result of comparing pre-read data from the pre-read operation with write data; and performing set-direction programming on at least some memory cells from among the erased one or more first memory cells and on one or more second memory cells on which a set write operation is to be performed.
US09558819B1	Method, system and device for non-volatile memory device operation Disclosed are methods, systems and devices for operation of non-volatile memory devices. In one aspect, a non-volatile memory device may be placed in any one of multiple memory states in a write operation by controlling a current and a voltage applied to terminals of the non-volatile memory device. For example, a write operation may apply a programming signal across terminals of non-volatile memory device having a particular current and a particular voltage for placing the non-volatile memory device in a particular memory state.
US09558818B2	Memory and memory managing method A method for managing memory includes setting a state of a first memory cell to a first state representing a first data and setting a state of a second memory cell to a second state representing the first data. If the state of the second memory cell has changed to a third state representing a second data different from the first data, the method also includes changing the state of the second memory cell back to the second state.
US09558815B2	Semiconductor storage device A semiconductor storage device according to an embodiment includes a memory cell array including a plurality of memory cells. A plurality of word lines are connected to the memory cells. A plurality of bit lines are connected to one end of current paths of the memory cells. A sense amplifier part repeats a detection operation plural times when detecting data of memory cells connected to a word line WLn (n is an integer) among the word lines. A controller selects one of a plurality of detection results obtained by the detection operations, based on data of memory cells connected to a word line WLn−1 and data of memory cells connected to a word line WLn+1.
US09558810B2	Semiconductor device A semiconductor device capable of reconfiguration, including a plurality of logic units which are connected to each other by an address line or a data line, wherein each of the logic units includes: a plurality of address lines; a plurality of data lines; a clock signal line to receive a system clock signal; a first and a second memory cell units which operate synchronously with the clock signal; a first address decoder which decodes an address signal and outputs a decode signal to the first memory cell unit; a second address decoder which decodes an address signal and outputs a decode signal to the second memory cell unit; and an address transition detection unit which generates an internal clock signal and outputs the internal clock signal to the first memory cell unit, when a transition of the address signal input from the plurality of address lines is detected, wherein the first memory cell unit operates synchronously with the internal clock signal, and the second memory cell unit operates synchronously with the system clock signal.
US09558804B2	Charge storage ferroelectric memory hybrid and erase scheme A technique for erasing a ferroelectric field effect transistor (FeFET) memory circuit comprising a plurality memory cells comprising FeFETs is described. Each FeFET comprises a gate stack, a source, a drain, a channel and a bulk substrate region, where the gate stack comprises a gate and a ferroelectric layer disposed between the gate and the channel. A positive or a negative voltage is applied to the source and drain regions of at least one FeFET memory cell depending on the channel type. The gate and bulk substrate regions are held at a ground state during said applying of the positive voltage to the source and drain regions of the FeFET memory cell to cause erasure of the at least one FeFET memory cell. In addition, a FeFET is described with a charge storage layer disposed adjacently to the ferroelectric layer within the gate stack.
US09558799B2	Timing violation handling in a synchronous interface memory A memory device includes an operation having a phase to provide an upper row address from a row address buffer, a phase to combine the upper row address with a lower row address to select data for a row data buffer, and a phase to output the data from the row data buffer, wherein an activate command starts and following activate commands are ignored until a preset time has elapsed.
US09558796B2	Systems and methods for maintaining memory access coherency in embedded memory blocks Enhanced memory circuits are described that maintain coherency between concurrent memory reads and writes in a pipelined memory architecture. The described memory circuits can maintain data coherency regardless of the amount of pipelining applied to the memory inputs and/or outputs. Moreover, these memory circuits may be implemented as dedicated hard circuits in a field programmable gate array (FPGA) or other programmable logic device (PLD), and can be supplemented with user-configurable logic to achieve coherency in a variety of applications.
US09558790B1	Hermetic sealing with high-speed transmission for hard disk drive Embodiments disclosed herein generally relate to hermetic electrical connectors used in hard disk drives. The hermetic electrical connector includes a barrier structure having a first plurality of connecting pads disposed on a first surface of the barrier structure and a second plurality of connecting pads disposed on a second surface of the barrier structure opposite the first surface. A plurality of conductors is disposed within the barrier structure, and each conductor is coupled to a connecting pad of the first plurality of connecting pads and a corresponding connecting pad of the second plurality of connecting pads. The barrier structure further includes a dielectric material between the first and second surfaces, and one or more layers embedded in the dielectric material. The addition of the layers helps choke the helium gas flow, thus improving sealing of the electrical connector while maintaining high-speed electrical transmission.
US09558789B1	Storage device sled and assembly method thereof An improved storage device sled is provided. The storage device sled includes first and second portions, each of which includes a threaded fastener, a longitudinal member, and a bezel member. The longitudinal members are configured to couple to mounting holes of a storage device. Each of the bezel members is orthogonal to a longitudinal member. One of the bezel members includes a latching clip and cutouts to receive one or more alignment projections. The other bezel member includes a latching clip receiver, configured to receive and capture the latching clip, and the one or more alignment projections. Each of the longitudinal members includes a hole for the threaded fastener, which retains the longitudinal member to a mounting hole on a side of the storage device. The longitudinal members also include a tapered post, which captures a mounting hole on a side of the storage device.
US09558788B2	Systems and methods of providing user interface features for a media service In an exemplary method, a computer-implemented media service system provides a graphical user interface view associated with a first functional area of the media service for display on a display screen, detects a peek request input while the graphical user interface view is displayed, and provides, in response to the peek request input and for display with the graphical user interface view, an activity indicator indicating a tracked activity associated with the second functional area of the media service. Corresponding systems and methods are also described.
US09558786B2	Systems, methods, and computer program products for multiple aspect ratio automated simulcast production A system, method, and computer program product for producing a show. In an embodiment, the invention is directed to a production system having a first production path, a second production path, and a control system that causes the first production path to generate a show in a first aspect ratio (4:3), and that causes the second production path to generate the same show in a second aspect ratio (16:9). In another embodiment, the invention is directed to producing a show from live material and from archived material. This aspect of the invention operates by producing a first show comprising a plurality of stories, segmenting the first show, and storing the show segments in an archive. Then, the invention produces a second show using live portions as well as show segments retrieved from the archive. The invention is also directed to a media manager that interacts with a server. In some cases, the server is integrated with the production system. The media manager automatically assigns channels/ports of the server when accessing material stored in the server.
US09558782B2	Partial reverse concatenation for data storage devices using composite codes In one embodiment, a data storage system includes a write channel for writing data to a storage medium, the write channel configured to utilize a partial reverse concatenated modulation code. The write channel includes logic adapted for encoding data sets using a C2 encoding scheme, logic adapted for adding a header to each subunit of the data sets, logic adapted for encoding the headers of the data sets with a first modulation encoding scheme, logic adapted for encoding data portions of the data sets with a second modulation encoding scheme, logic adapted for encoding portions of the one or more C2-encoded data sets using a C1 encoding scheme, logic adapted for combining the C1-encoded portions with the modulation-encoded headers of the C2-encoded data sets using a multiplexer, and logic adapted for writing the one or more combined C1 - and C2-encoded data sets to data tracks.
US09558780B2	Library device and accessor device A library device includes: a housing having a substantially rectangular parallelepiped shape, the housing having a first surface and a second surface differing from each other; a first track that is provided within the housing, the first track extending along the first surface; a second track that is provided within the housing, the second track extending along the second surface, the second track being parallel with the first track; and an accessor device that includes a first portion engaging with the first track, and a second portion engaging with the second track.
US09558776B1	Durable coating for magnetic tape recording media A product such as a magnetic recording tape, according to one embodiment, includes a flexible magnetic media having a substrate, a magnetic recording layer having cobalt therein, and an at least partially polycrystalline coating above the magnetic recording layer. A product according to another embodiment includes a flexible magnetic media having a substrate, a magnetic recording layer having cobalt therein, and coating above the magnetic recording layer. The coating includes a ceramic material.
US09558765B2	CoFe/Ni multilayer film with perpendicular anisotropy for microwave assisted magnetic recording A spin transfer oscillator (STO) with a seed/FGL/spacer/SIL/capping configuration is disclosed with a composite seed layer made of Ta and a metal layer having a fcc(111) or hcp(001) texture to enhance perpendicular magnetic anisotropy (PMA) in an overlying (A1/A2)YFeCo laminated field generation layer (FGL). The spin injection layer (SIL) may be laminated with a (A1/A2)XFeCo configuration. The FeCo layer in the SIL is exchanged coupled with the (A1/A2)X laminate (x is 5 to 50) to improve robustness. The (A1/A2)Y laminate (y=5 to 30) in the FGL may be exchange coupled with a high Bs layer to enable easier oscillations. A1 may be one of Co, CoFe, or CoFeR where R is a metal, and A2 is one of Ni, NiCo, or NiFe. The STO is typically formed between a main pole and trailing shield in a write head.
US09558763B1	Magnetic recording write apparatus having a pole including an assist portion extending in the cross-track direction A magnetic write apparatus has a media-facing surface (MFS), a pole, side shield(s), a side gap and coil(s) for energizing the pole. The pole includes main and assist portions. The main portion is ferromagnetic, includes a pole tip and includes side surface(s) having a flare angle from the MFS. The pole tip occupies a portion of the MFS. The flare angle is nonzero and acute. The assist portion adjoins the main portion, extends from the main portion in a direction having a component in a cross-track direction, and has a depth of not more than three hundred nanometers. The side shield(s) occupy another portion of the MFS, have a back surface, and are between the assist portion and the MFS. The assist portion is conformal with the back surface of the side shield(s). The side gap is between the main portion of the pole and the side shield(s).
US09558760B2	Real-time remodeling of user voice in an immersive visualization system A visualization system with audio capability includes one or more display devices, one or more microphones, one or more speakers, and audio processing circuitry. While a display device displays a holographic image to a user, a microphone inputs an utterance of the user, or a sound from the user's environment, and provides it to the audio processing circuitry. The audio processing circuitry processes the utterance (or other sound) in real-time to add an audio effect associated with the image to increase realism, and outputs the processed utterance (or other sound) to the user via the speaker in real-time, with very low latency.
US09558755B1	Noise suppression assisted automatic speech recognition Noise suppression information is used to optimize or improve automatic speech recognition performed for a signal. Noise suppression can be performed on a noisy speech signal using a gain value. The gain to apply to the noisy speech signal is selected to optimize speech recognition analysis of the resulting signal. The gain may be selected based on one or more features for a current sub band and time frame, as well as one or more features for other sub bands and/or time frames. Noise suppression information can be provided to a speech recognition module to improve the robustness of the speech recognition analysis. Noise suppression information can also be used to encode and identify speech.
US09558754B2	Audio encoder and decoder with pitch prediction In one embodiment, an audio decoder for decoding an encoded audio bitstream is disclosed. The audio decoder is capable of being operated in at least three different decoding modes. The audio decoder includes a demultiplexer for obtaining audio data and control information from the encoded audio bitstream. The audio decoder also includes a first audio decoder configured to operate in a first decoding mode using a first decoding technique and a second audio decoder configured to operate in a second decoding mode using a second decoding technique. The audio decoder also includes a pitch predictor integrated into the second audio decoder. The pitch predictor includes a long-term prediction filter and a short-term prediction filter. The audio decoder further includes a selector for selecting one of the at least three different decoding modes based on at least some of the control information.
US09558753B2	Pitch filter for audio signals In some embodiments, a pitch filter for filtering a preliminary audio signal generated from an audio bitstream is disclosed. The pitch filter has an operating mode selected from one of either: (i) an active mode where the preliminary audio signal is filtered using filtering information to obtain a filtered audio signal, and (ii) an inactive mode where the pitch filter is disabled. The preliminary audio signal is generated in an audio encoder or audio decoder having a coding mode selected from at least two distinct coding modes, and the pitch filter is capable of being selectively operated in either the active mode or the inactive mode while operating in the coding mode based on control information.
US09558752B2	Encoding device and encoding method This encoding device (100) is provided with: a CELP encoding unit (102) that decodes CELP encoded data resulting from CELP encoding an input signal, generating a CELP decoded signal; a transform encoding unit (106) that generates a decoded signal spectrum by decoding transform encoded data resulting from using the spectrum of the input signal and the suppression spectrum of suppressing using a first suppression factor to transform encode the amplitude of the spectrum of the CELP decoded signal, and that outputs an index of the transform encoded frequency component; a pulse index recording unit (107) that forms and records an array using the index; and a CELP component suppression unit (109) that uses a second suppression factor and the array to suppress the amplitude of the spectrum resulting from adding the decoded signal spectrum and the suppression spectrum.
US09558749B1	Automatic speaker identification using speech recognition features Features are disclosed for automatically identifying a speaker. Artifacts of automatic speech recognition (“ASR”) and/or other automatically determined information may be processed against individual user profiles or models. Scores may be determined reflecting the likelihood that individual users made an utterance. The scores can be based on, e.g., individual components of Gaussian mixture models (“GMMs”) that score best for frames of audio data of an utterance. A user associated with the highest likelihood score for a particular utterance can be identified as the speaker of the utterance. Information regarding the identified user can be provided to components of a spoken language processing system, separate applications, etc.
US09558748B2	Methods for hybrid GPU/CPU data processing The present invention describes methods for performing large-scale graph traversal calculations on parallel processor platforms. The invention describes methods for on-the-fly hypothesis rescoring that utilizes graphic processing units (GPUs) in combination with utilizing central processing units (CPUs) of computing devices. The invention is described in one embodiment as applied to the task of large vocabulary continuous speech recognition.
US09558745B2	Service oriented speech recognition for in-vehicle automated interaction and in-vehicle user interfaces requiring minimal cognitive driver processing for same A system and method for implementing a server-based speech recognition system for multimodal automated interaction in a vehicle includes receiving, by a vehicle driver, audio prompts by an on-board human-to-machine interface and a response with speech to complete tasks such as creating and sending text messages, web browsing, navigation, etc. This service-oriented architecture is utilized to call upon specialized speech recognizers in an adaptive fashion. The human-to-machine interface enables completion of a text input task while driving a vehicle in a way that minimizes the frequency of the driver's visual and mechanical interactions with the interface, thereby eliminating unsafe distractions during driving conditions. After the initial prompting, the typing task is followed by a computerized verbalization of the text. Subsequent interface steps can be visual in nature, or involve only sound.
US09558741B2	Systems and methods for speech recognition Systems and methods are provided for speech recognition. For example, audio characteristics are extracted from acquired voice signals; a syllable confusion network is identified based on at least information associated with the audio characteristics; a word lattice is generated based on at least information associated with the syllable confusion network and a predetermined phonetic dictionary; and an optimal character sequence is calculated in the word lattice as a speech recognition result.
US09558740B1	Disambiguation in speech recognition Automatic speech recognition (ASR) processing including a feedback configuration to allow for improved disambiguation between ASR hypotheses. After ASR processing of an incoming utterance where the ASR outputs an N-best list including multiple hypotheses, the multiple hypotheses are passed downstream for further processing. The downstream further processing may include natural language understanding (NLU) or other processing to determine a command result for each hypothesis. The command results are compared to determine if any hypotheses of the N-best list would yield similar command results. If so, the hypothesis(es) with similar results are removed from the N-best list so that only one hypothesis of the similar results remains in the N-best list. The remaining non-similar hypotheses are sent for disambiguation, or, if only one hypothesis remains, it is sent for execution.
US09558739B2	Methods and systems for adapting a speech system based on user competance Methods and systems are provided for adapting a speech system. In one example a method includes: logging speech data from the speech system; processing the speech data for a pattern of a user competence associated with at least one of task requests and interaction behavior; and selectively updating at least one of a system prompt and an interaction sequence based on the user competence.
US09558732B2	Active noise control system An active noise control system includes a first microphone, a controller operably coupled to the first microphone, and a speaker operably coupled to the controller. The first microphone senses a sound input in an audible spectrum, wherein the sound input includes a disturbance noise portion. The controller includes a selection unit and an output unit. The selection unit determines the disturbance noise portion of the sound input based on a highest frequency level of the sound input. The output unit removes the disturbance noise portion from the sound input to generate a filtered sound input. The speaker generates a speaker output based on the filtered sound input.
US09558729B2	Digital circuit arrangements for ambient noise-reduction A digital circuit arrangement for an ambient noise-reduction system affording a higher degree of noise reduction than has hitherto been possible. The arrangement converts the analog signals into N-bit digital signals at sample rate f0, and then subjects the converted signals to digital filtering. The value of N in some embodiments is 1 but, in any event, is no greater than 8, and f0 may be 64 times the Nyquist sampling rate but, in any event, is substantially greater than the Nyquist sampling rate. This permits digital processing to be used without incurring group delay problems that rule out the use of conventional digital processing in this context. Furthermore, adjustment of the group delay can readily be achieved, in units of a fraction of a micro-second, providing the ability to fine tune the group delay for feed forward applications.
US09558725B2	Disk, wind instrument, counter piece, and method of producing the disk A disk for stabilizing a pad assembly in a key cup for closure of a wind instrument tone hole includes an integral body made of a material which is in a solid state at a room temperature and in a malleable state at a predetermined temperature higher than the room temperature.
US09558721B2	Content-based adaptive refresh schemes for low-power displays A content-based adaptive refresh technique is implemented in an active matrix display system for reducing power consumption. The active matrix display system includes a display panel having multiple rows of display elements arranged as a display matrix. The display panel is coupled to a scan driver and a data driver. The scan driver selects one row at a time to receive data signals, and the data driver provides the data signals. The active matrix display system also includes a timing controller operable to signal the scan driver to cause a first row of the display panel to be not refreshed in a current data frame and a second row of the display panel to be refreshed in the current data frame.
US09558720B2	Variable resolution seamless tileable display A tileable display panel includes an illumination layer, a display layer, and a screen layer. The display layer is disposed between the screen layer and the lamp layer and includes pixelets. Each of the pixelets is positioned to be illuminated by lamp light from the illumination layer and to project a magnified image sub-portion onto the screen layer such that the magnified image sub-portions collectively blend together to form a unified image on the screen layer. Each of the pixelets includes core pixels and peripheral pixels surrounding the core pixels on one or more sides which provide a higher image resolution in overlap regions on the screen layer when the magnified image sub-portions overlap on the screen layer.
US09558719B2	Information processing apparatus An information processing apparatus comprising first and second display units for respectively displaying first and a second composite images for the two eyes of a user, comprising: a moving unit configured to move positions of the first and second display units; a detecting unit configured to detect moving amounts of the first and second display units; first and second image capturing units configured to respectively obtain first and second captured images; an extracting unit configured to generate first and second extracted images by respectively extracting portions of the first and second captured images in extraction ranges associated with the moving amounts; and a composite image generating unit configured to generate the first and second composite images by respectively compositing first and second CG images with the first and second extracted images.
US09558713B2	Dynamic transparency adjustment of user interface element A user device dynamically adjusts one or more portions of a user interface (UI) element. The user device detects content color data describing the color of content that is overlaid by a UI element on a display of a user device, the UI element including one or more components and a UI element background. The user device determines component color data describing the color of the one or more components of the UI element, and dynamically determines transparency data for the UI element background using the content color data and the component color data. The user device displays the UI element in accordance with the transparency data and the component color data.
US09558710B2	Transitioning operation between device display screens and interface therefor A method and system for transitioning operation between display screens of a computing device, with a user interface. The device further includes primary and secondary touch screen displays, an ambient lighting brightness sensor, a memory storing instructions and an e-book having content displayable according to a series of digitally constructed pages. The method comprises receiving, at a screen transition interface presented on one of the primary display screen and the secondary display screen, selections of an upper and a lower brightness threshold limits of ambient lighting, sensing a brightness level of ambient lighting, activating the secondary display screen for operation only if one of: (i) the ambient lighting brightness level exceeds the upper threshold limit and (ii) the ambient lighting brightness level is less than the lower threshold limit, and transitioning operation of the computing device to the secondary display screen by rendering the pages of e-book content thereon.
US09558705B2	Flat panel display device controlling initialization of data lines supplied to a pixel unit A flat panel display device includes a pixel unit having scan-lines, data-lines, and first through third pixels that are coupled to the scan-lines and the data-lines, a scan driver that applies a scan signal to the pixel unit, a data driver that selectively applies a first data signal, a second data signal, a third data signal, and an initialization signal to the pixel unit, a demultiplexing unit having at least one demultiplexer that applies the first data signal, the second data signal, and the third data signal to the first pixels, the second pixels, and the third pixels, respectively, and that simultaneously applies the initialization signal to the first through third pixels, and a timing control unit that controls the scan driver, the data driver, and the demultiplexing unit.
US09558703B2	Liquid crystal display and driving method thereof Among data voltages applied to a plurality of pixels on a display panel, a first data voltage is shifted from a first original data voltage by a first value, a second data voltage is shifted from a second original data voltage by a second value, and a third data voltage is shifted from a third original data voltage by a third value to compensate for AC and DC afterimages. A common voltage generator provides an optimal common voltage for the third data voltage when the temperature of the liquid crystal panel assembly is lower than a reference temperature and provides an optimal common voltage for the first data voltage or the second data voltage when the temperature of the liquid crystal panel assembly is higher than or equal to the reference temperature. The first, second, and third values correspond to respective kickback voltages of the respective gray level data voltages.
US09558701B2	Shift register, integrated gate line driving circuit, array substrate and display A shift register an integrated gate line driving circuit, an array substrate and a display are disclosed. Two electronic switching modules are added to the existing shift register, wherein one of the two electronic switching modules is arranged among a puling-down node, a low level signal terminal and a pulling-up node, and the other is arranged among the pulling-down node, the low level signal terminal and a signal output terminal; during the non-operating time of the shift register and when the pulling-down node is at a low level, the two electronic switching modules are turned on, and discharge the pulling-up node and the signal output terminal respectively to pull down the noise voltage, thereby effectively reducing the noise interference of the shift register during the non-operating time.
US09558698B2	Data driver and display device driving method A driving method for driving a display apparatus including a plurality of pixels, a plurality of data lines and a data driver. The data driver includes a first latch outputting a first sample data signal to a second latch, the second latch, a first charge sharing line and a second charge sharing line. The method includes performing a first charge sharing when a polarity of one of the pixels changes so as to output a first calibrated data signal to the data line electrically coupled to the pixel, and executing a second charge sharing when the most significant bit of the first sample data signal is different from the most significant bit of the second sample data signal so as to output a second adjusted data signal to the data line.
US09558697B2	Display device driving sub-pixels of a plurality of colors According to one embodiment, a display element includes a plurality of scanning lines and a plurality of signal lines. Into the plurality of signal lines, signals of different polarities are alternately input, respectively. In the respective regions surrounded by the scanning lines and the signal lines, a first pixel and a second pixel are arrayed. Along the scanning line, two each of the first pixels and the second pixels are provided, and the two first pixels or the two second pixels are arrayed so as to be juxtaposed to each other. Along the signal line, the first pixel and the second pixel are arrayed alternately.
US09558696B2	Electrophoretic display device This specification relates to an electrophoretic display device, and particularly, to an electrophoretic display device capable of reducing power consumption by blocking a leakage current generated from a Power On Reset (POR) circuit which resets each driver Integrated Circuit (IC) at an initial period, whereby a transistor as an active element connected to a POR circuit may be turned on by applying a positive voltage, other than a power supply voltage, to a gate thereof at an image update period to drive a bias block, and thereafter turned off at an image static period, thereby blocking a leakage current and accordingly reducing power consumption.
US09558694B2	Organic light emitting display device An organic light emitting display device, including pixels positioned at crossing regions of scan lines and data lines and a bias voltage supply configured to supply bias voltages to the pixels. Each of the pixels includes an organic light emitting diode (OLED), a first transistor coupled between a first power supply and the OLED and driven in a saturation region by a corresponding one of the bias voltages to supply a set current to the OLED, a second transistor coupled between the first power supply and the OLED and driven in a linear region by a data signal supplied from a corresponding one of the data lines to turn on or off, and a second capacitor coupled between a gate electrode of the first transistor and the first power supply.
US09558693B2	Display devices and electronic devices having the same A display device includes a display panel driver and a DC-DC converter. The display panel driver divides one frame into a plurality of periods and outputs a control signal to generate an analog supply voltage, a first power voltage, and a second power voltage for driving pixels. The DC-DC converter receives the control signal from the display panel driver through a single wire. The DC-DC converter includes an analog supply voltage generator, a first power voltage generator, and a second power voltage generator. The analog supply voltage generator generates the analog supply voltage during a first pulse period. The first power voltage generator generates the first power voltage during a second pulse period. The second power voltage generator generates the second power voltage during the third pulse period.
US09558689B2	Pixel structure and display panel A pixel structure includes a plurality of red sub-pixels, white sub-pixels, blue sub-pixels and green sub-pixels, which are arranged to form a plurality of first sub-pixel cells and second sub-pixel cells. The first and second sub-pixel cells may be arranged to form a plurality of pixel cells. The pixel cells may be arranged in the vertical direction repeatedly to form a plurality of pixel array cells. The pixel array cells may be arranged in the horizontal direction repeatedly to form a plurality of pixel arrays. The pixel structure further includes a supplement pixel array disposed in the pixel arrays according to a preset mode and configured to supplement polarity inversion in the pixel structure. The sub-pixels with a same color in a same row in a same signal frame may not have a same polarity, thereby reducing flicker and horizontal crosstalk of images and improving the image display quality.
US09558687B2	Display device and method for driving the same In order to display 3D images by a parallax barrier method, a display screen and the eyes of a viewer need to have a specific positional relation. An object is to provide a display device with an extended area where the viewer can perceive 3D images with the naked eye. Attention is focused on the position of the viewer with respect to pixels provided in a display device and a mode of a parallax barrier provided between the viewer and the pixels. This leads to a structure in which the position of the viewer with respect to pixels is specified by using an ultrasonic wave to change a mode of a parallax barrier in accordance with the position of the viewer, thereby achieving the above object.
US09558686B2	Combination mounting and storing device for a vehicle safety flag Disclosed is a combination mounting and storing device for a vehicle safety flag that is used to mark an oversized load. The device includes a hollow cylindrical housing having an interior volume and a bobbin disposed therein. The bobbin includes a reel that is adapted to retract and extend an elongated cord that is attached to the vehicle safety flag. The device further includes a magnet that allows a user to removably mount the device onto the inside of a truck bed or trunk. When the device is in use, the cord is extended outward so as to allow a user to secure the safety flag onto the extreme rear of the projecting load. The device can be mounted to the rear of the vehicle when transporting an oversized load and can be easily stored in a glove compartment when it is not in use.
US09558684B2	Cable marker A cable marker includes a housing which has an accommodating opening to accommodate a label to mark a cable, a cover to close the accommodating opening in a closed position of the cable marker, and a film hinge integrally connecting the housing to the cover such that in an open position, in which the cover does not close the accommodating opening, the cover can be pivoted in relation to the housing along a pivoting plane. The film hinge has a first base portion connecting the film hinge to the housing, a second base portion connecting the film hinge to the cover, and a connecting portion arranged between the first base portion and the second base portion. The connecting portion has a width that is reduced in comparison with at least one of the base portions as viewed in a direction perpendicular to the pivoting plane.
US09558683B2	Identification tag adapted to be clipped to a shaft The identification tag is provided in a general horseshoe shape with resilient prongs engageable to a shaft such as a shaft of a pulley-mounted hook at a beginning of a processing line. The identification tag can be used to track a product throughout the processing line.
US09558677B2	Mock attack cybersecurity training system and methods A training system senses a user action that may expose the user to a threat, such as a cybersecurity threat. The user action may be in response to a mock attack delivered via a messaging service, a wireless communication service, a fake malware application or another device, service, system or mechanism. The system selects a training action from a collection of available training actions and causes the training action to be delivered to the user.
US09558670B1	Method and system for air traffic rerouting for airspace constraint resolution A dynamic constraint avoidance route system automatically analyzes routes of aircraft flying, or to be flown, in or near constraint regions and attempts to find more time and fuel efficient reroutes around current and predicted constraints. The dynamic constraint avoidance route system continuously analyzes all flight routes and provides reroute advisories that are dynamically updated in real time. The dynamic constraint avoidance route system includes a graphical user interface that allows users to visualize, evaluate, modify if necessary, and implement proposed reroutes.
US09558668B2	Systems and methods for improving an in-trail procedures request Systems and methods for improving the reception and delivery of an In-Trail Procedures (ITP) altitude change request. An example system located on board a host aircraft includes a communication component, a display device and a processor unit that is in signal communication with the communication component and the display device. The processor unit presents a user interface on the display device. The user interface includes a plurality of fields for receiving In-Trail Procedures (ITP) altitude change request information. The processor sends the ITP altitude change request information received within the plurality of fields to an Air Traffic Control (ATC) facility via the communication component. An ITP unit having a display receives an altitude selection and presents ITP altitude change request information if the received altitude selection is determined to be valid.
US09558667B2	Systems and methods for cooperative collision detection A vehicle collision detection system may be configured to coordinate with collision detection systems of other vehicles. The coordination may comprise sharing sensor data with other vehicles, receiving sensor information from other vehicles, using sensor information to generate a collision detection model, sharing the collision detection model with other vehicles, receiving a collision detection model from other vehicles, and the like. In some embodiments, vehicles may coordinate sensor operation to form a bistatic and/or multistatic sensor configuration, in which a detection signal generated at a first land vehicle is detected at a sensing system at a second land vehicle.
US09558664B1	Method and apparatus for providing parking availability detection based on vehicle trajectory information An approach is provided for parking availability detection based on vehicle trajectory information. A trajectory processing platform processes and/or facilitates a processing of trajectory data associated with at least one journey of at least one vehicle to determine at least one portion of the at least one journey that is associated at least one parking search by the at least one vehicle. The trajectory processing platform also determines one or more street segments associated with the at least one portion of the at least one journey. The trajectory processing platform further causes, at least in part, a classification of the one or more street segments as associated with the at least one parking search. The trajectory processing platform further determines parking availability information for the one or more street segments based, at least in part, on the trajectory data.
US09558663B2	Animal detecting and notification method and system Driving condition monitoring system and method includes animal detecting components that detect presence of an animal, each located in a stationary mounting structure in a vicinity of the travel surface and apart from the travel surface, and a vehicle detecting sensor coupled to each animal detecting component and that is activated to detect the presence of a vehicle within a set distance therefrom only when the animal detecting component coupled to the vehicle detecting sensor detects the presence of an animal in the vicinity of the animal detecting component. A communication system is coupled to each animal detecting component and communicates directly to the vehicle or occupant thereof, the detected presence of an animal in the vicinity of the animal detecting component when the vehicle detecting sensor coupled to the animal detecting component detects the presence of a vehicle within the set distance from the vehicle detecting sensor.
US09558660B1	Method and apparatus for providing state classification for a travel segment with multi-modal speed profiles An approach is provided for state classification for a travel segment with multi-modal speed profiles. A traffic processing platform processes and/or facilitates a processing of probe data associated with at least one travel segment to determine that probe data indicates a plurality of speed profiles. The plurality of speed profiles represent one or more observed clusters of speed states. The traffic processing platform also determine that the at least one travel segment exhibits a multi-modality with respect to travel speed based, at least in part, on the plurality of speed profiles. The traffic processing platform then determines at least one likely sequence of speed states for traversing the at least one travel segment based, at least in part, on the one or more observed clusters of speed states and state transition probability information, wherein the state transition probability information represents one or more probabilities for transitioning among the plurality of speed states and causes, at least in part, a classification of at least one hidden state of the at least one travel segment based, at least in part, on the at least one likely sequence of speed states.
US09558659B1	Determining the stationary state of detected vehicles Aspects of the disclosure relate to an autonomous vehicle that may detect other nearby vehicles and designate stationary vehicles as being in one of a short-term stationary state or a long-term stationary state. This determination may be made based on various indicia, including visible indicia displayed by the detected vehicle and traffic control factors relating to the detected vehicle. For example, the autonomous vehicle may identify a detected vehicle as being in a long-term stationary state based on detection of hazard lights being displayed by the detected vehicle, as well as the absence of brake lights being displayed by the detected vehicle. The autonomous vehicle may then base its control strategy on the stationary state of the detected vehicle.
US09558655B2	Utility monitoring device, system and method A monitoring device, system and method are provided for in-home/on-premises monitoring of usage of utilities, such as electricity and other services. The monitoring device receives information from a smart meter, and displays usage through a display, illuminating an area using a colour indicative of the current cost of consumption, and varying the illuminated area at a rate indicative of a rate of consumption or other metric, the varying of the illuminated area simulating movement in the display. The display provides a consumer with “at a glance” visual information on current usage. Optionally a digital display screen provides detailed alphanumeric and graphical information, through a number of selectable display modes. One or more devices may be networked, and interface directly or indirectly with a transceiver of a smart metering system, or a retrofit transceiver for a conventional meter. Monitoring of other utilities and services may alternatively or additionally be provided.
US09558652B2	Motion based service provision In one example embodiment, an apparatus includes a reader configured to read motion information, received from an end device, regarding a motion that was enacted by a user relative to the end device; a request generator configured to generate a service request that includes an identifier of the apparatus and the read motion information; a transmitter configured to transmit, to a service provider, the service request; and a receiver configured to receive, from the service provider, an expression of a service that is associated with the identifier of the apparatus and the read motion information.
US09558651B2	Convertible wireless remote controls Convertible wireless remote controls for controlling a variety of media devices are described. The convertible wireless remote controls function in a non-PC mode and a PC mode. The convertible wireless remote controls transition between modes offering control of a variety of devices in the different modes and are shaped with usability and power consumption in mind.
US09558645B2	Released offender geospatial location information trend analysis Methods of trend analysis for information related to released criminal offenders, the methods include accessing geospatial location information including date and time information for released criminal offenders and identifying repeated visits by one of the released criminal offenders within a defined proximity of a particular geospatial location, identifying a movement pattern of one of the released criminal offenders, correlating the movements of one the released criminal offenders to the movements of a subscriber, correlating the proximity of one of the released criminal offenders to a location where criminal activity has occurred, or comparing the geospatial location with previous activity of the released offender to predict potential future criminal activity.
US09558640B2	Camera hidden in ID card holder A surveillance system comprising an electronic identity card holder 100 and corresponding identity card 170. The card holder 100 comprises a slot 150 for receiving an identity card 170. The slot 150 has a first side 150a and an opposing second side 150b. The first side 150a of the slot 150b comprising a viewing window 140 positioned to allow viewing of the second side 150b of slot 150. The card holder 100 also has a camera housed within the holder 100, and the camera has a camera aperture 196 provided on the second side 150b of the slot 150. The corresponding identity card 170 comprises an optically transparent region 175 that is configured to overlie the camera aperture 196 when the identity card 170 is received in the slot 150 of the holder 100.
US09558636B1	Automatic teller machine inventory and distribution system A bank server allows a user of one ATM to reserve cash at another, nearby ATM when the first ATM has an inadequate cash inventory to serve the user's requested transaction. The user attempts to withdraw cash from the first ATM, but the first ATM has insufficient cash to perform the withdrawal transaction. Through the first ATM, the bank server offers the user a cash reservation at the other ATM. The bank server causes the other ATM to reserve a requested amount of cash for the user, possibly refusing to dispense cash to other users if doing so would leave the other ATM with insufficient cash to dispense the reserved cash. The user travels a short distance to the other ATM and withdraws the reserved cash. In effect, the other ATM can now perform the withdrawal transaction requested of the first ATM when the first ATM couldn't.
US09558635B2	Gaming machine having hybrid art glass A gaming terminal for conducting a wagering game includes a gaming cabinet, a video display, and an art panel. The video display is positioned within the gaming cabinet and is configured to display content associated with the wagering game. The art panel is positioned within the gaming cabinet and overlays the video display such that a first region of the art panel is illuminated by the video display.
US09558632B2	Electronic gaming device with card tournament functionality Examples disclosed herein relate to systems and methods, which may receive wagers on one or more paylines. The systems and methods may utilize one or more tournament game structures. The systems and methods may utilize one or more power-up cards in the one or more tournament game structures.
US09558628B2	Method and apparatus for providing a bonus to a player based on a credit balance An apparatus and method allow a value of a credit balance on a gaming device to be determined. If the value is not less than a predetermined threshold, a benefit is provided to the player of the gaming device. In various embodiments, the benefit may be, e.g., an increase in the player's credit balance.
US09558626B2	Gaming system and method providing a group game having multiple stages Various embodiments of the present disclosure provide a gaming system and method providing a group game having a same average expected total payback percentage regardless of the number of players participating in the group game. In various embodiments, the gaming system determines or sets one or more characteristics, features, or parameters of the group game based on the number of players participating in the group game such that the average expected total payback percentage of the group game is the same or substantially the same for each play of the group game regardless of the number of players participating in that play of the group game.
US09558624B2	Multi-mode multi-jurisdiction skill wagering interleaved system Systems are provided including: a player's device constructed to: communicate device information; receive an authorization message; communicate an authorization to commence a SWig session; communicate updated device information; and receive an authorization revocation; a geographical location server constructed to: receive the device information; determine a geographical location of the player's device; and communicate the geographical location; and the SWig server connected to the player's device and the geographical location server by a network, and constructed to: receive the device information; receive the geographical location of the player's device; when the geographical location of the player's device is within a real credit wagering jurisdiction, communicate the authorization message; receive the authorization to commence the SWig session; initiate the SWig session; receive the updated device information; determine if the player's device has changed location; and when the player's device has changed location, revoke authorization of real credit wagering.
US09558622B2	Logistics methods for processing lottery and contest tickets with generic hardware A lottery data transfer method for processing lottery ticket data piggybacks on a merchant's existing debit or credit card interchange system. A BIN is assigned to lottery tickets that is unique in the merchant's credit or debit card interchange, the BIN associated with a lottery data blob also provided on the lottery ticket. The lottery BIN and data blob are into the merchant's existing credit or debit card activation barcode protocol to initiate transfer of the lottery data to a central lottery site via the interchange. At a processor within the interchange, the unique lottery BIN is flagged to initiate special routing to and further processing of the lottery data blob at the lottery central site, wherein the lottery data blob is processed outside of the interchange's debit or credit card data transfer and processing procedures.
US09558621B2	Gaming system A method of operating a gaming system including a plurality of gaming machines and at least one server system. The method includes providing at least a first gaming service to each gaming machine by way of one or more first software processes and providing at least one second service common to a subset of the plurality of gaming machines, the second service implemented by one or more second software processes. The method also includes enabling inter-process interaction between at least one software process of the first service and at least one software process of the second service to enable interaction between the services. A server system, gaming machine and gaming system is also disclosed.
US09558617B2	Electronic poker system An electronic poker system is a system for reducing slowdowns and errors during play while delivering an authentic poker experience for players. The system includes a table where players are able to sit at a plurality of player stations while a live dealer sits at a dealer station. Each player's cards are shown on at least one flexible display while community cards and other game information is shown on at least one game display that is visible to all players. Each of the at least one flexible display is secured to a playing surface of the table through a tether device. A gameplay control unit automates many functions such as dealing player cards, dealing community cards, fixing dealer mistakes, and folding player hands. The live dealer is able to initiate these functions through at least one dealer input device.
US09558613B2	Social network interaction via games Techniques for enabling members to learn about and interact with their social network via games are described. According to various embodiments, it is determined that a content item or entity associated with an online social network service is relevant to a member of the online social network service. An online game including a game question and a correct game answer is generated based on the content item or entity. The game question is then displayed to the member, and a member response to the displayed game question is received. Thereafter, a game result is displayed, and the member is enabled to interact with the content item or entity.
US09558608B2	Electronic locker right acquisition via an external system A locker rental system includes electronic lockers centrally managed by a locker manager. The locker manager is in communication with a separate external system, which handles admissions and sales for a venue. Users are provided with a unique external identification (ID) code for purposes such as admission to the venue. Determinative sequences of the external ID codes are provided to the locker manager as validation codes. When the external ID code is scanned, the locker manager validates the external ID code using the validation codes. A valid external ID code may be used to rent and access lockers in the locker system. In some implementations, locker rights may be sold through the external system and details of the transaction provided to the locker manager. If the external ID code is valid, the locker manager generates a rental plan.
US09558606B2	System and method for integrating and adapting security control systems A system for controlling access to one or more enclosed areas comprises at least one access card reader and controller powered via a Power-over-Ethernet (PoE) interface, each access card reader and controller being capable of controlling access through a particular entrance to a particular enclosed area and an access control server in communication with the at least one access card reader and controller, the access control server being capable of controlling the operation of the at least one access card reader and controller, and a signal converter disposed between the access card reader and the access control server. In a network mode of operation, the access control server is configured to perform authentication of a card identifier (ID) received from the at least one access card reader and controller and to signal the at least one access card reader and controller to unlock a door at the particular entrance to the particular enclosed area when the access control server has successfully authenticated the received card ID. In a standalone mode of operation, the at least one access card reader and controller is configured to perform local authentication of a received card ID independently of the access control server and to unlock a door at the particular entrance to the particular enclosed area when the at least one access card reader and controller has successfully authenticated the received card ID.
US09558603B2	Smartcard receiving device for providing a remote communication with switching means The invention relates to a smartcard receiving device, comprising a contact interface (11) for communicating with the received smartcard (2); a remote communication interface (13) for communicating with a first remote device (3); a protocol bridge (12) designed to establish a transaction with the received smartcard (2) through the contact interface (11). The smartcard receiving device further comprises a communicating device detector (14, 15) adapted to detect a second remote device (5) communicating according to a remote communication protocol different from the communication protocol used by said remote communication interface (13). The protocol bridge (12) interrupts the transaction with the received smartcard (2) when the second remote device (5) communicating according to said different remote communication protocol is detected.
US09558600B2	Duty cycle recording system and method for estimation of damage and remaining life of drivetrain components A duty cycle recording system and method is disclosed for a vehicle with a drivetrain having a plurality of components and sensors. The duty cycle recording system may include a control unit and communication link. The control unit may receive sensor readings, compute damage estimates for drivetrain components based on the readings, and compute estimated remaining life (ERL) estimates based on the damage estimates. The communication link may transmit the computed damage and ERL estimates. The control unit may sample transmission torque and speed sensor readings, and for each sample may populate a three-dimensional histogram of transmission torque and speed the vehicle has experienced.
US09558598B2	Providing communications between a vehicle control device and a user device via a head unit A vehicle head unit may receive a request, from a user device and by the head unit, to establish communication with a control device of a vehicle. The control device may be in communication with the head unit via a vehicle communication network associated with the vehicle. The head unit may establish communication between the user device and the control device based on the received request. The head unit may forward a message between the user device and the control device based on the established communication. The message may be forwarded between the user device and the control device via the head unit.
US09558586B2	Method for estimating the opacity level in a scene and corresponding device A method and device for estimating the opacity at a point of a scene lit by an area light source and comprising an object defined by a mesh and occluding some of the emitted light. In order to optimize the calculations for live estimation of the opacity, the method comprises sampling said area light source in a plurality of samples, for at least one sample of the plurality of samples and for at least one first mesh element of the occluding object visible from the at least one sample, generating one shadow plane per edge of the at least one first mesh element, estimating a opacity level depending on coefficients of projection in a function base from values representative of the opacity for a set of intersection points between at least one ray having for origin a viewpoint of the scene and shadow planes crossed by said at least one ray, depending on an angle formed by the normal associated with each shadow plane crossed and by said at least one ray.
US09558585B2	Hidden surface removal in graphics processing systems A graphics processing pipeline 1 includes a rasteriser 3 that tests patches representing respective different regions of a render output against the edges of primitives 2 to determine if the primitive at least partially covers the patch and an early depth test stage 4 that performs early depth tests for primitives in respect of patches of the render output that the primitive has been found by the rasteriser at least partially to cover, by using depth test information 5 associated with a patch indicating the number and distribution of different depth value regions associated with the patch to determine the depth value region or regions associated with the patch that the primitive should be depth tested against, and then performing a depth test or tests for the primitive in respect of the respective determined depth value region or regions associated with the patch.
US09558582B2	Image processing method and image processing apparatus An image processing method and an image processing apparatus which remove the effects of cosmic rays, noise and defective pixels without losing data in a specified time and which can correct image data efficiently and with high accuracy are provided. An image processing method of performing correction processing on an abnormal value of X-ray image data is provided which includes the steps of: (S3) determining whether or not there exists a target element with intensity significantly different from intensity of peripheral elements, in a three dimensional space formed with a space axis and a time axis defined by a series of captured image frames; and (S9) replacing the intensity of the target element with a replacement value calculated from the intensity of peripheral elements.
US09558581B2	Method for representing virtual information in a real environment A method for representing virtual information in a view of a real environment is provided that includes the following steps: providing a system setup comprising at least one display device, determining a position of a viewing point relative to at least one component of the real environment, providing a geometry model of the real environment, providing at least one item of virtual information and its position, determining a visualization mode of blending in the at least one item of virtual information on the display device according to the position of the viewing point and the geometry model, calculating a ray between the viewing point and the item of virtual information, and determining a number of boundary intersections by the ray, wherein if the number of boundary intersections is less than 2, the item of virtual information is blended in a non-occlusion mode, otherwise in an occlusion mode.
US09558580B2	Image processing apparatus and method therefor A first surface, a second surface, and a third surface are set in order in a direction of a scene, and the first surface has a plurality of cells and a plurality of sub-cells divided from each of the plurality of cells, the second surface has a plurality of segments, and the plurality of cells and the plurality of segments are associated respectively. A trace direction of a ray passing through each sub-cell is determined based on a segment associated with a cell including the sub-cell. Ray tracing on the determined trace direction is performed for each sub-cell so as to generate light-field data of the scene between the second and third surfaces.
US09558577B2	Rhythmic mosaic generation methods, apparatuses and media A request to generate templates for a template set may be received. A template set member from the template set may be selected and the template set member's dimensions may be determined based on an initial cut. A desired number of image tiles for the template set member may be identified, and templates having the desired number of image tiles may be generated for the template set member based on logical rules.
US09558572B2	Visualization of data clusters The disclosure generally describes computer-implemented methods, software, and systems, including a method for presenting information. A first graph is presented that represents plural groups, each representing an aggregated set of data points grouped based on a first set of common attributes. User input selecting a particular group is received. The aggregated set of data points is analyzed to determine whether the number of aggregated set of data points exceeds a threshold. In response to determining that the number exceeds the threshold, the aggregated set of data points is re-grouped. A second set of common attributes associated with the re-grouped set of data points is identified. The data points are aggregated based on the second set of common attributes. A second graph is provided for presentation, the updated graph representing plural groups, each group representing an aggregated subset of data points from the aggregated set of data points.
US09558571B2	Contour gradients using three-dimensional models A method and systems of applying a contour gradient to a two-dimensional path are provided. A three-dimensional polygonal shell may be constructed from the two-dimensional path. Then the three-dimensional polygonal shell may be projected into two dimensions, resulting in a two-dimensional projected model, while saving values for a third dimension for each point in the two-dimensional projected model. Then a range of all values for the third dimension in the two-dimensional projected model is determined from the saved values. The range can then be mapped to a visual attribute. The two-dimensional projected model may be displayed using the mapped visual attribute.
US09558567B2	Palette prediction in palette-based video coding In palette-based coding, a video coder may form a so-called “palette” as a table of colors representing the video data of a given block. The video coder may code index values for one or more pixels values of a current block of video data, where the index values indicate entries in the palette that represent the pixel values of the current block. According to the techniques, a video coder determines one or more palette entries in a predictive palette that are copied to the current palette, and a number of new palette entries not in the predictive palette that are included in the current palette. The video coder calculates a size of the current palette equal to the sum of the number of the copied palette entries and the number of the new palette entries, and generates the current palette including the copied palette entries and the new palette entries.
US09558563B1	Determining time-of-fight measurement parameters In a system that monitors the positions and movements of objects within an environment, a depth camera may be configured to produce depth images based on configurable measurement parameters such as illumination intensity and sensing duration. A supervisory component may be configured to roughly identify objects within an environment and to specify observation goals with respect to the objects. The measurement parameters of the depth camera may then be configured in accordance with the goals, and subsequent analyses of the environment may be based on depth images obtained using the measurement parameters.
US09558556B2	Three-dimensional object detection device A three-dimensional object detection device includes an image capturing unit, a detection area setting unit, an image conversion unit, a three-dimensional object detection unit, and a relative movement speed calculation unit. The detection area setting unit sets a detection area in a lateral direction rearward of the host vehicle. The image conversion unit converts a viewpoint of the images obtained by the image capturing unit to create bird's-eye view images. The three-dimensional object detection unit detects a presence of a three-dimensional object within the detection area by vehicle width direction detection processing. The detection area setting unit widens the detection area rearward with respect to a direction of vehicle progress when the three-dimensional object is detected in the detection area and the relative movement speed of the three-dimensional object, as calculated by relative movement speed calculation unit, is at a predetermined value or greater.
US09558554B1	Defining basis function requirements for image reconstruction A system, method and computer program product for determining an accuracy of a reconstructed image relative to a reference image. The method includes decomposing a reference image into a plurality of basis functions; reconstructing the image using the plurality of basis functions; determining differences between the reference image and reconstructed image; using statistical parametric mapping (SPM) to quantify existence of statistically significant regions of excursion in the determined differences; determining, based on the quantified regions of excursion, a minimum number of basis functions to reconstruct the image; and storing the determined number. The difference image is used as input to a univariate statistical test at every pixel to calculate an image of the test statistic which is then modeled as a multiGaussian random field. Quantities are calculated from the test statistic image for comparison to expected values to determine if the reconstructed image is an accurate representation of the reference image, or whether the number of basis functions used in the reconstruction is to be increased.
US09558550B2	Method and system for the automatic analysis of an image of a biological sample Method for the automatic analysis of an image of a biological sample with respect to a pathological relevance, wherein a)local features of the image are aggregated to a global feature of the image using a bag of visual word approach, b) step a) is repeated at least two times using different methods resulting in at least two bag of word feature datasets, c) computation of at least two similarity measures using the bag of word features obtained from a training image dataset and bag of word features from the image, d) the image training dataset comprising a set of visual words, classifier parameters, including kernel weights and bag of word features from the training images, e) the computation of the at least two similarity measures is subject to an adaptive computation of kernel normalization parameters and/or kernel width parameters, f) for each image one score is computed depending on the classifier parameters and kernel weights and the at least two similarity measures, the at least one score being a measure of the certainty of one pathological category compared to the image training dataset, g) for each pixel of the image a pixel-wise score is computed using the classifier parameters, the kernel weights, the at least two similarity measures, the bag of word features of the image, all the local features used in the computation of the bag of word features of the image and the pixels used in the computations of the local features, h) the pixel-wise score is stored as a heatmap dataset linking the pixels of the image to the pixel-wise scores.
US09558548B2	Method, system, and computer program product for detection of defects based on multiple references A system includes a memory and a processor device operatively coupled to the memory to obtain an inspected noise-indicative value representative of an analyzed pixel of an inspected image of an inspected object, and a reference noise-indicative value representative for each of multiple reference pixels of the inspected image. The processor device computes a representative noise-indicative value based on the inspected noise-indicative value and multiple reference noise-indicative values, calculates a defect-indicative value based on an inspected value representative of the analyzed pixel and determines a presence of a defect in the analyzed pixel based on the representative noise-indicative value and the defect-indicative value.
US09558546B2	Three-dimensional object detection device, and three-dimensional object detection method A three-dimensional object detection device has an image capturing unit, an object detection unit, a nighttime assessment unit, a luminance detection unit, a luminance peak detection unit and a controller. The image capturing unit captures images rearward of a vehicle. The object detection unit detects a presence of an object from the captured images. The nighttime assessment unit assesses if nighttime has fallen. The luminance detection unit detects a luminance of image areas from the captured image. The luminance peak detection unit detects a peak in the luminance having a luminance gradient that is greater than or equal to a predetermined reference value from among the detected peaks in the luminance as a target luminance peak. The controller controls detection of the object in an image area in which the target luminance peak is detected when an assessment has been made that nighttime has fallen by the nighttime assessment unit.
US09558540B2	Display instrument and image display method A head-mounted display device including an image display apparatus configured to display a captured image of a portion of an environment viewable through the head-mounted display device; and a dimmer configured to, while the captured image is displayed, allow a portion of ambient light from the environment to pass through the dimmer. Also, a method of displaying information on a head-mounted display device. The method may include displaying a captured image of a portion of an environment viewable through the display device; and dimming ambient light received through the head-mounted display device from the environment while displaying the captured image.
US09558538B2	Dynamic range converter with frame by frame adaptation and methods for use therewith In various embodiments, a dynamic range converter includes a first color space converter to convert a source color space of a source video having a source dynamic range to nonlinear color space signals. A linearizer configured converts the nonlinear color space signals to linearized color space signals having a mastering dynamic range via a piecewise linear interpolation of a transfer function. A color volume transformer applies dynamic color transform metadata associated with the source video on a frame by frame basis to generate master adjusted color space signals from the linearized color space signals. A delinearizer converts the master adjusted color space signals to nonlinearized color space signals via a piecewise linear interpolation of an inverse transfer function in accordance with a display dynamic range. A second color space converter converts the nonlinearized color space signals to display domain signals. Other embodiments are disclosed.
US09558531B2	Graphics processing method for three-dimensional images applied to first buffer for storing right-view contents and second buffer for storing left-view contents and related graphics processing apparatus thereof A graphics processing method for three-dimensional images, applied to a first buffer for storing right-view contents and a second buffer for storing left-view contents, includes the following steps: when a current Vsync status indicates that a display engine is not operating within a right Vsync period of a right-view frame, the drawing engine drawing the right-view contents stored in first buffer; when current Vsync status indicates that the display engine is not operating within a left Vsync period of a left-view frame, the drawing engine drawing the left-view contents stored in second buffer; during the right Vsync period of the right-view frame, the display engine displaying right-view contents stored in first buffer; and during the left Vsync period of the left-view frame, the display engine displaying left-view contents stored in second buffer.
US09558527B2	Systems and methods for orchestrating external graphics Systems and methods that may be implemented to orchestrate external graphics, for example to support and extend switchable graphics capability beyond internal system components of a host information handling system so as to include an external discrete graphics processing unit (xGPU) that is not integrated or embedded within the chassis enclosure of the host information handling system, and that is coupled to the host information handling system from outside the host system chassis enclosure.
US09558526B2	Signal continuity assessment using embedded watermarks Methods, apparatus, and systems for signal continuity assessment using embedded watermarks are provided. The embedded watermarks are recovered from the content and one or more attributes associated with the recovered watermarks are identified. A continuity of the content can then be assessed in accordance with the one or more attributes. The continuity assessment may be based on a variety of factors, including but not limited to a determined heartbeat of the recovered watermarks, a density, separation, location, or extent, of the recovered watermarks, as well as information associated with the watermarks, such as a stego key, channel bits, packet numbers, a fingerprint, or the like.
US09558524B2	Risk assessment using social networking data Tools, strategies, and techniques are provided for evaluating the identities of different entities to protect individual consumers, business enterprises, and other organizations from identity theft and fraud. Risks associated with various entities can be analyzed and assessed based on analysis of social network data, professional network data, or other networking connections, among other data sources. In various embodiments, the risk assessment may include calculating an authenticity score based on the collected network data.
US09558523B1	Secure nonscheduled video visitation system Described are methods and systems in which the censorship and supervision tasks normally performed by secured facility personnel are augmented or automated entirely by a Secure Nonscheduled Video Visitation System. In embodiments, the Secure Nonscheduled Video Visitation System performs voice biometrics, speech recognition, non-verbal audio classification, fingerprint and other biometric authentication, image object classification, facial recognition, body joint location determination analysis, and/or optical character recognition on the video visitation data. The Secure Nonscheduled Video Visitation utilizes these various analysis techniques in concert to determine if all rules and regulations enforced by the jurisdiction operation the secured facility are being followed by the parties to the video visitation session.
US09558522B2	Centralized licensing system A request to activate a license file is received by a licensing system. The license file comprises a number of licenses. A license may be any type of license. The license file is assigned a license file identifier. A license extension is assigned to the license file identifier. A request to acquire a portion (or all) of the number of licenses of the license file is received from an entity. The portion (or all) of the number of licenses of the license file is assigned to the entity based on the license extension. The entity can then use the licenses as necessary.
US09558519B1	Exposing reporting cycle information A computing device is configured to acquire or access credit or reporting data associated with a consumer. The computing device then is configured to analyze the credit or reporting data to determine reporting cycles for accounts associated with the consumer. For example, the computing device may determine that credit information for a particular account may be updated at a regular interval (e.g., once a month on the 3rd) or some other more complex cycle. The computing device can subsequently used the determined reporting cycles to predict the next reporting dates for respective accounts and provide the information, for instance, to the consumer.
US09558516B2	Social mobile shopping system Methods and system are provided for enhancing consumer shopping. The methods and systems allow consumers to more readily purchase products of interest to them. The consumers' ability to shop effectively and efficiently is enhanced while a payment provider, such as PayPal, Inc., and/or an online seller, such as eBay, is given a mechanism for recruiting new users. For example, a user's online searches and/or stored shopping list can be used to determine which products the user is interested in purchasing and the availability of at least some of these products can be provided to the user, along with directions to the nearest POS brick-and-mortar stores where the products can be purchased.
US09558509B2	Social networking system data exchange An online publisher provides content items such as advertisements to users. To enable publishers to provide content items to users who meet targeting criteria of the content items, an exchange server aggregates data about the users. The exchange server receives user data from two or more sources, including a social networking system and one or more other service providers. To protect the user's privacy, the social networking system and the service providers may provide the user data to the exchange server without identifying the user. The exchange server tracks each unique user of the social networking system and the service providers using a common identifier, enabling the exchange server to aggregate the users' data. The exchange server then applies the aggregated user data to select content items for the users, either directly or via a publisher.
US09558507B2	Reminding users of offers Provided is a computer implemented process for reminding users of offers that were discovered by the user at one location when, at a later time, the user is at another location, the process including: displaying, with a mobile device, an offer and a reminder interface to indicate that the user requests themselves or another reminder recipient to be reminded of the offer when near another computing device of the reminder recipient; receiving an interaction with the reminder interface by the user and, in response, storing a reminder request in memory, the reminder request identifying the offer; obtaining data identifying the other computing device, a geographic area of the other computing device, or a wireless environment of the other computing device; detecting, with a processor of the mobile device, that the reminder recipient has interacted with the other computing device, entered the geographic area, or entered the wireless environment; and in response to the detection, presenting a notification reminding the reminder recipient of the offer.
US09558506B2	System and method for exploring new sponsored search listings of uncertain quality According to some example embodiments, a method includes calculating learning values associated with a plurality of listings, at least one of said learning values associated with one of said listings representing a value based, at least in part, on a probability distribution of selections of said listing. The method further includes applying said learning values to ranking scores associated with said listings to provide an updated ranking, and electronically auctioning advertising inventory to purchasers associated with said listings based, at least in part, on said updated ranking.
US09558505B2	System and method for prepaid rewards A system and method provide rewards or loyalty incentives to card member customers. The system includes an enrolled card member customer database, an enrolled merchant database, a participating merchant offer database and a registered card processor. The enrolled card member customer database includes transaction accounts of card member customers enrolled in a loyalty incentive program. The enrolled merchant database includes a list of merchants participating in the loyalty incentive program. The participating merchant offer database includes loyalty incentive offers from participating merchants. The registered card processor receives a record for charge for a purchase made with an enrolled merchant by an enrolled card member customer and uses the record of charge to determine whether the purchase qualifies for a rebate credit in accordance with a discount offer from the enrolled merchant. If the purchase qualifies for a rebate credit, the registered card processor provides the rebate credit to an account of the enrolled card member customer. The registered card processor also provides for electronic notification of rewards offers or credit to prepaid cards, in response to purchases conforming to a specific set of merchant criteria. The system provides a coupon-less way for merchants to provide incentive discounts and/or credits to enrolled customers, along with notifying customers of other available incentive offers.
US09558501B2	Content recommendation system, content recommendation method, content recommendation apparatus, program, and information storage medium A content recommendation system including a step which selects some from a plenty of music compositions in accordance with attribute conditions successively generated, a step which further selects a part or all of the selected music compositions in accordance with the similarity degree between the feature vector of each of the selected music compositions and the user preference vector, and a step which presents the selected music composition to the user.
US09558500B2	Method and apparatus for providing internet advertising service A method and apparatus for providing advertising service in a computer network is provided. This method and apparatus further comprises receiving a request from a user via this computer network to view a Web page, providing conditions to the user for viewing this Web page, delivering this Web page to the user, determining if the user has met the conditions required for viewing this Web page, and terminating access of the user to this Web page if these conditions are not met.
US09558498B2	System and method for advertisement management The present invention relates to systems and methods for optimizing and managing advertising campaigns. The method of the present invention comprises storing one or more advertisement data structures associated with an ad group data structure in the ad group data structure. One or more ad group data structures associated with a campaign data structure are stored in an ad campaign data structure. Additionally, one or more ad campaign data structures associated with an advertised property are stored in an account data structure.
US09558497B2	System and method for internet domain name fraud risk assessment Internet Domain Name Fraud Risk Assessment using a system of data element collection and computation. Data elements associated with the Internet Domain Name are acquired from internal and external data sources, captured, evaluated, and then assigned a value. Data acquisition may include use of domain information, databases, corporate and social media services, and search engine services. Using the assigned values, an Internet Domain Name category type and a Fraud Risk Score are computed and then displayed to a user along with additional information, explanations and recommendations.
US09558493B2	Secure authorizations using independent communications and different one-time-use encryption keys for each party to a transaction A registered provider device encrypts provider input related to a transaction between the provider device and one of many registered user devices to create an encrypted one-time-use provider code (the encryption is performed using an encryption key produced, in part, using a uniquely sequenced number generated by a sequencer maintained by the provider device). Similarly, a provider institution app encrypts user input to create an encrypted one-time-use user code using an encryption key produced, in part, using a uniquely sequenced number generated by a user sequencer maintained by the user device. The provider and provider institution app independently transmit their different encrypted one-time-use codes to an intermediate entity, which decrypts the encrypted codes using one-time-use encryption keys produced using sequencers maintained by the intermediate entity. This decryption generates an authorization request. The intermediate entity obtains an authorization decision regarding the authorization request from the authorization entity.
US09558492B2	Secure authorizations using independent communications and different one-time-use encryption keys for each party to a transaction A registered provider device encrypts provider input related to a transaction between the provider device and one of many registered user devices to create an encrypted one-time-use provider code (the encryption is performed using an encryption key produced, in part, using a uniquely sequenced number generated by a sequencer maintained by the provider device). Similarly, the user device encrypts user input to create an encrypted one-time-use user code using an encryption key produced, in part, using a uniquely sequenced number generated by a user sequencer maintained by the user device. The provider and user devices independently transmit their different encrypted one-time-use codes to an intermediate entity, which decrypts the encrypted codes. This decryption is performed using one-time-use encryption keys produced using sequencers maintained by the intermediate entity, and this decryption generates an authorization request. The intermediate entity obtains an authorization decision regarding the authorization request from the authorization entity.
US09558487B2	Public transit system fare processor for multi-balance funding An implementation of a system and method for processing transfer rides associated with at least one public transit network is provided. The system and method preprocess transactions to consolidate or eliminate unnecessary transactions with a financial institution clearing and settlement network.
US09558485B2	Two step near field communication transactions A two step method for transferring money from a sender to a recipient includes entering information relating to the transfer into a near field communication (NFC) enabled device of the sender. The device is then placed in contact with or close proximity to a recipient's device a first time, causing the sender's device to establish an NFC link between the two devices and to gather information relating to the recipient via the NFC link. The sender's device is then placed in contact with or close proximity to the recipient's device a second time, causing it to transmit the information relating to the transfer and the recipient to a third party service provider via another network, e.g., the Internet, thereby causing the service provider to transfer the money from an account of the sender to an account of the recipient.
US09558483B2	Systems and methods for transferring value to payment accounts Systems and methods are provided for transferring value from to a payment account associated with a virtual wallet of a consumer. The value can be transferred using voucher-based transactions or cash-based transactions. One exemplary method includes receiving, at a computing device, a load request to transfer value to a payment account associated with a consumer. The load request includes the value to be transferred and a directory number for a mobile device associated with the consumer. The method also includes determining an account number for the consumer's payment account, at the computing device, based on the directory number for the consumer's mobile device and generating, by the computing device, a request indicating the value to transfer to the payment account and the account number for the consumer's payment account.
US09558478B2	Multi-platform in-application payment system Systems and methods for providing multi-platform, in-application payments include transferring funds, by a payment service provider device, from a funding source to a payment account in response to receiving a first fund transfer instruction from one of a first user device and a second user device over a network. The payment service provider device then associates the payment account with a first platform application in response to receiving a first association instruction from the first user device over the network, and associates the payment account with a second platform application in response to receiving a second association instruction along with the user account information from a second user device over the network. The payment service provider device will pay for each of a first in-application purchase associated with the first platform application and a second in-application purchase associated with the second platform application using the payment account.
US09558476B2	Method and device for editing workspace data objects Disclosed herein are methods and devices for associating a first workspace data object with a first workspace service and for determining characteristics of the association of the first workspace data object with the first workspace service. The methods and devices described herein relate to receiving touch-screen based input in a plurality of display areas of a display to make the associations.
US09558470B2	System and method for managing inventory of consumable articles Restocking cards with machine readable tags are placed on article packaging in a supply room. When an employee wishes to order an article, the employee removes the restocking card from the article packaging and presents the restocking card to a container equipped with a machine readable tag reader. The machine readable tag of the restocking card enables the container to generate an order for a predefined quantity of the identified article. The order is sent to a central stock server which processes the order and sends it to the appropriate fulfillment server.
US09558464B2	System and method to determine defect risks in software solutions A method is implemented in a computer infrastructure having computer executable code tangibly embodied on a computer readable storage medium having programming instructions. The programming instructions are operable to receive one or more risk factors, receive one or more contexts, identify one or more context relationships and associate the one or more contexts with the one or more risk factors. Additionally, the programming instructions are operable to map the one or more risk factors for an associated context to a software defect related risk consequence to determine a risk model and execute a risk-based testing based on the risk model to determine a defect related risk evaluation for a software development project.
US09558456B2	Entity analysis system A method for building a factual database of concepts and entities that are related to the concepts through a learning process. Training content (e.g., news articles, books) and a set of entities (e.g., Bill Clinton and Barack Obama) that are related to a concept (e.g., Presidents) is received. Groups of words that co-occur frequently in the textual content in conjunction with the entities are identified as templates. Templates may also be identified by analyzing parts-of-speech patterns of the templates. Entities that co-occur frequently in the textual content in conjunction with the templates are identified as additional related entities (e.g., Ronald Reagan and Richard Nixon). To eliminate erroneous results, the identified entities may be presented to a user who removes any false positives. The entities are then stored in association with the concept.
US09558455B2	Touch classification A method for touch classification includes obtaining frame data representative of a plurality of frames captured by a touch-sensitive device, analyzing the frame data to define a respective blob in each frame of the plurality of frames, the blobs being indicative of a touch event, computing a plurality of feature sets for the touch event, each feature set specifying properties of the respective blob in each frame of the plurality of frames, and determining a type of the touch event via machine learning classification configured to provide multiple non-bimodal classification scores based on the plurality of feature sets for the plurality of frames, each non-bimodal classification score being indicative of an ambiguity level in the machine learning classification.
US09558453B1	Forecasting leaks in pipeline network Technical solutions are described for forecasting leaks in a pipeline network. An example method includes identifying a subsystem in the pipeline network that includes a first station. The method also includes accessing historical temporal sensor measurements of the stations. The method also includes generating a prediction model for the first station that predicts a pressure measurement at the first station based on the historical temporal sensor measurements at each station in the subsystem. The method also includes predicting a series of pressure measurements at the first station based on the historical temporal sensor measurements. The method also includes determining a series of deviations between the series of pressure measurements and historical pressure measurements of the first station and identifying a threshold value from the series of deviations, where a pressure measurement at the first station above or below the threshold value is indicative of a leak in the subsystem.
US09558443B2	Dual deterministic and stochastic neurosynaptic core circuit One embodiment provides a system comprising a memory device for maintaining deterministic neural data relating to a digital neuron and a logic circuit for deterministic neural computation and stochastic neural computation. Deterministic neural computation comprises processing a neuronal state of the neuron based on the deterministic neural data maintained. Stochastic neural computation comprises generating stochastic neural data relating to the neuron and processing the neuronal state of the neuron based on the stochastic neural data generated.
US09558441B2	Legacy application migration to real time, parallel performance cloud A system and method 10 that provides legacy software applications 12 to be incorporated into a massively parallel and distribution processing model in the Cloud, with a high performance parallel and distributed computing (cloud) “wrapper” 14 around legacy and current systems to enable, without legacy product code change or invasive addition/editing, the legacy product to access and fully utilize the power and ability of distributed computing within the cloud through a Pneuron “cortex” platform virtual server 10. The system and method also provides the ability to distribute multiple, concurrent instances of the legacy applications, dynamically manage the load volumes, and automatically create and remove new virtual machines based upon demand requirements.
US09558437B2	Systems for and methods of communicating barcode information to point-of-sale terminal A method of communicating barcode information using audio signaling is disclosed. A mobile device being brought into physical proximity to a communication bridge device is detected. Two-way audio communication is commenced between the mobile device and the bridge device upon detection of the mobile device by the bridge device. Barcode information is communicated from the mobile device to the bridge device. The barcode information is converted into a pulsed signal to simulate scanning of a static image of a barcode. A human perceptible signal is provided that indicates the barcode information has been received into the bridge device. The barcode information is transmitted as light pulses emitted from the bridge device for reception by a barcode scanner.
US09558436B2	Coded light pattern having hermitian symmetry A method includes identifying one or more codewords of a bit sequence that fail to satisfy at least one codeword constraint. The method also includes removing the one or more codewords from the bit sequence to generate a punctured bit sequence. The method further includes determining whether the punctured bit sequence is symmetric. The method includes, in response to determining that the punctured bit sequence is symmetric, generating a hermitian symmetric codebook primitive based at least in part on the punctured bit sequence, where the hermitian symmetric codebook primitive is useable to form a diffractive optical element (DOE) of a structured light depth sensing system.
US09558433B2	Image processing apparatus generating partially erased image data and supplementary data supplementing partially erased image data An image processing apparatus acquires target image data generated by optically reading a sheet. The sheet includes an original image and an added image. The added image is added on the sheet. The apparatus specifies, from the target image, an added region surrounded by a surrounding line. The apparatus specifies a written target in the added region. The apparatus generates partially-erased image data and supplementary data by using the target image data and a result of the specifying of the written target. The partially-erased image data represents a partially-erased image that is based on the target image with an image inside the added region being erased. The supplementary data concerns the added image. The apparatus generates an image file including the partially-erased image data and the supplementary data so that the partially-erased image and supplementary information can be reproduced in selective one of a simultaneous manner and an independent manner.
US09558430B2	Image forming apparatus using filters to correct potential distribution on photoreceptor due to spot shape of emitted light The image forming apparatus includes an exposure head. The exposure head includes an organic EL element array and a rod lens array, and forms an image on a photosensitive drum by irradiating light emitted from each organic EL element on the photoreceptor via each rod lens. In the exposure head, light emitting from the organic EL element is controlled by a controller. The controller generates a filter coefficient for correcting a spot shape based on the difference between the spot shape of the light spot on the photosensitive drum and the target spot shape on the photosensitive drum. It is noted that the difference is generated by the deviation between the distance from the organic EL element to the photosensitive drum, and the correct focus position.
US09558427B2	Shape similarity measure for body tissue A shape similarity metric can be provided that indicates how similar two or more shapes are. A difference between a union of the shapes and an intersection of the shapes can be used to determine the similarity metric. The shape similarity metric can provide an average distance between the shapes. Different processes for determining shapes can be evaluated for accuracy based on the shape similarity metric. New or alternative shape-determining processes can be compared for accuracy against other shape-determining processes including reference shape-determining processes. Shape similarity metrics can be determined for two-dimensional shapes and three-dimensional shapes.
US09558422B2	Methods and systems for differentiating synthetic and non-synthetic images The techniques introduced here include a system and method for transcoding multimedia content based on the results of content analysis. The determination of specific transcoding parameters, used for transcoding multimedia content, can be performed by utilizing the results of content analysis of the multimedia content. One of the results of the content analysis is the determination of image type of any images included in the multimedia content. The content analysis uses one or more of several techniques, including analyzing content metadata, examining colors of contiguous pixels in the content, using histogram analysis, using compression distortion analysis, analyzing image edges, or examining user provided inputs. Transcoding the multimedia content can include adapting the content to the constraints in delivery and display, processing and storage of user computing devices.
US09558416B2	Method and system for replaying a voice message and displaying a signed digital photograph contemporaneously Disclosed are methods and systems for generating digital fantasy sports memorabilia including: providing a digital fantasy sports memorabilia signor with a digital fantasy sports photograph, a digital fantasy sports jersey, or a combination thereof; receiving at least one of an electronic signature or an electronic written message from the fantasy sports digital memorabilia signor to be embedded in the digital fantasy sports photograph, the digital fantasy sports jersey, or the combination thereof; embedding the at least one of an electronic signature or an electronic written message from the digital fantasy sports memorabilia signor into the digital fantasy sports photograph, the digital fantasy sports jersey, or a combination thereof to form the generated digital fantasy sports memorabilia; sending the generated digital fantasy sports memorabilia including the electronic signature and the electronic written message to a verification service to verify authenticity of the electronic signature and electronic written message in the generated digital fantasy sports memorabilia; and delivering the generated fantasy sports memorabilia to a digital fantasy sports receiver.
US09558415B2	Biometric authentication technology Biometric authentication technology, in which biometric data is maintained for a group of people. The biometric data includes sorted similarity scores, where each of the sorted similarity scores is computed to represent similarity between a corresponding biometric image and a reference image. A biometric verification system accesses a biometric image of at least a portion of a person, accesses the reference image, and computes a similarity score that represents similarity between the accessed biometric image and the reference image. The biometric verification system searches the sorted similarity scores included in the biometric data using the computed similarity score and outputs a result based on the searching.
US09558410B2	Road environment recognizing apparatus A road environment recognizing apparatus includes an edge image generator, a first area extractor, and an object recognizer. The edge image generating unit generates an edge image by extracting edge points from an image of a road captured by a camera. The edge points have amounts of change in luminance from surroundings, which are higher than or equal to a predetermined value. The first area extractor extracts a first area from the edge image. The first area is partitioned by the edge points and has a luminance higher than the luminances of the surroundings. If a second area having a luminance lower than the luminances of the surroundings exists around the first area in the edge image, the object recognizer recognizes a projection on the road on the basis of a third area resulting from joining of the first area and the second area.
US09558409B2	Vehicle vision system with trailer angle detection A vehicular vision system includes at least one camera and an image processor. The camera is disposed at a vehicle and has an exterior field of view rearward of the vehicle. The camera is operable to capture image data. The image processor is operable to process captured image data. The vision system, responsive at least in part to image processing of captured image data, is operable to determine a trailer angle of a trailer that is towed by the vehicle. The vision system is operable to determine a path of the trailer responsive to a steering angle of the vehicle and the vision system is operable to display information for viewing by the driver to assist the driver in driving the vehicle with the trailer.
US09558406B2	Image processing apparatus including an object setting section, image processing method, and program using the same An image processing apparatus includes: an object setting section that sets an object image indicating an object which is placed in an image generated by an image capturing section; a detection section that detects the object included in a synthetic image in which the object image and the image generated by the image capturing section are synthesized; and an output section that outputs output information for setting a detection parameter used in a detection process performed by the detection section, that is, output information in which the synthetic image and a detection result of the detection process are associated.
US09558404B2	Method and device for filtering electrical consumption curves and allocating consumption to classes of appliances The invention relates to a method for analyzing the electrical consumption of a plurality of electrical appliances operating on a consumption site, by filtering a demand curve representing the electrical consumption of said appliances according to time. Said method is characterized in that it comprises the following steps: before the filtering per se of the demand curve, the demand curve is recorded and digitalized in such a way as to obtain a demand curve digitalized by periods of time; a set of categories of appliances is defined, each category being defined by similar cycles of power variation according to the time; an algorithm is defined for each category of appliances, for filtering the demand curve for said category of appliances, said algorithm being able to extract the power variation cycles from the digitalized demand curve and to allocate the electrical consumption to said category of appliances; then during the filtering per se of the digitalized demand curve, the filtering algorithms for each category of appliance are used successively to identify and regroup the power variation cycles consumed by said electrical appliances, from the digitalized demand curve.
US09558403B2	Chemical structure recognition tool A method of extracting and then reusing/remodeling chemical data from a hand written or digital input image without manual inputs using Chemical Structure Recognition Tool (CSRT) is disclosed herein. It comprises loading said input image, converting said input image into a grayscale image i.e. stretching of loaded input image, converting said grayscale image into a binary image i.e. binarization, smoothing to reduce noise within said binary image, recognizing circle bond to identify presence of a circle inside a ring, predicting OCR region to find zones containing text, image thinning to identify specific shapes within said binary image, edge detection to detect image contrast, detecting double and triple bond, and obtaining output files.
US09558401B2	Scanbox Embodiments are provided for content item classification. In some embodiments, an image for classification is received, a compact representation for the image having values indicative of pixel values within the received image is generated, a plurality of angle measurements for possible edges of at least one potential document within the received image are determined, and the image is classified using said compact representation and said plurality of angle measurements.
US09558400B2	Search by stroke An electronic writing solution server includes a query engine and a user interface engine. The query engine receives a search query from a user, the search query specifying a field in at least one form and including a first stroke or text, retrieves clusters from a database, retrieves example strokes from the clusters at vary levels of similarity to the first stroke, receives user selections for strokes of interest from the example strokes, and retrieves information associated with the strokes of interest from the database. The user interface engine generates graphical data for presenting the retrieved information to the user.
US09558391B2	Identification recognition device and method of operating an identification recognition device An identification recognition device includes a light emission module, a light sensing module, a pulse scanning unit, a fingerprint scanning unit and a controller. The light sensing module is used to generate first light currents and second light currents according to first reflecting light and second reflecting light. The pulse scanning unit is used to generate data of current variance of the object and the fingerprint scanning unit is used to generate features of fingerprint of the object. The controller is used to control the light emission module to emit the first incident light and to emit the second incident light when the object has a pulse according to the data of current variance of the object, and determine if the object passes the identification recognition test according to the features of fingerprint of the object.
US09558390B2	High-resolution electric field sensor in cover glass A fingerprint sensor is described that includes a thin protective cover layer on a sensor glass layer with receive circuitry between the thin protective cover layer and the sensor glass layer. In an implementation, a fingerprint sensor assembly includes a controller; a metal layer configured to be electrically coupled to the controller; a transmit layer electrically connected to the metal layer and the controller; a sensor glass layer including at least one through-glass via, where the transmit layer is disposed on a first side of the sensor glass layer, and where the transmit layer is electrically coupled to the at least one through-glass via; a receive layer disposed on a second side of the sensor glass layer, where the receive layer is electrically coupled to the at least one through-glass via; and a protective cover layer disposed on the receive layer.
US09558385B2	System and method for providing secure identification solutions The present invention provides a method and system for verifying and tracking identification information. In an embodiment of the invention, a system for delivering security solutions is provided that includes at least one of the following: a radio frequency (RF) identification device, an identification mechanism (e.g., a card, sticker), and an RF reader.
US09558367B2	Virtualization input component One or more systems and/or methods for storing personal information within a first device and/or for providing personal information from the first device to the second device are provided. The first device (e.g., a smartphone) may identify a user interface (e.g., a movie streaming website) populated with user specified data (e.g., a password). The user specified data may be evaluated to identify personal information of the user (e.g., a movie streaming website password). The personal information may be stored within the first device. Responsive to determining that a second device (e.g., a smart television) displays a personal information input field (e.g., a movie streaming website password input field), an input event comprising the personal information may be provided from the first device to the second device. The input event may invoke the second device to input the movie streaming website password into the movie streaming website password input field.
US09558366B2	Computer system for storing and retrieval of encrypted data items, client computer, computer program product and computer-implemented method A computer system is disclosed herein for storage and retrieval of encrypted data items, such as for storing encrypted data items in the cloud, as well as a respective client computer, client computer system, computer program product and computer-implemented method. Embodiments of the disclosed computer system allow for searching for encrypted data items stored in a database based on functional values associated with the data items. The retrieval of the data items from the database can be performed without knowledge of a respective cryptographic key by the database.
US09558365B1	Systems and methods for creating and sharing protected content Systems and methods for creating and sharing protected content between individuals is disclosed. In one embodiment, a method for creating and sharing protected content between individuals may include (1) receiving foundation content; (2) receiving a selection of cover content; (3) receiving a selection of one or more unlock actions; (4) receiving a selection of one or more recipients for the protected content; (5) at least one computer processor creating a layered data file comprising the foundation content fully obscured by the cover content; (6) providing the one or more recipients access to the layered data file; (7) receiving an unlock action by the one or more recipients; (8) verifying, by the at least one computer processor, the unlock action; and (9) displaying to the one or more recipients the foundation content from the layered data file.
US09558364B2	Computing machine, access management method, and access management program When an access occurs to an I/O device from an OS 231a, an I/O allocation unit refers to an I/O allocation table, and determines whether the I/O device is allocated to other OS 231b. When the I/O device is allocated to another OS 231b, a control unit notifies the OS 231a of an error. When the I/O device is not allocated to either of the OSs 231a-b, the I/O allocation unit updates the I/O allocation table in order to allocate the I/O device to the OS 231a, and an I/O emulation unit emulates the access to the I/O device.
US09558363B2	Systems and methods of context based data access control of encrypted files In some implementations, encrypted data (e.g., application data, keychain data, stored passwords, etc.) stored on a mobile device can be accessed (e.g., decrypted, made available) based on the context of the mobile device. The context can include the current device state (e.g., locked, unlocked, after first unlock, etc.). The context can include the current device settings (e.g., passcode enabled/disabled). The context can include data that has been received by the mobile device (e.g., fingerprint scan, passcode entered, location information, encryption key received, time information).
US09558361B2	Flexible role based authorization model Systems and methods described herein relate to role-based authorization systems which allow customization of role templates as well as the ability, using roles, for one user to act on behalf of another user.
US09558359B1	Information theoretically secure protocol for mobile proactive secret sharing with near-optimal resilience Described, is system for mobile proactive secret sharing. The system initializes a RobustShare protocol to distribute a block of secret data among a set of servers comprising n servers. The block of secret data comprises a plurality of shares of data, wherein each server in the set of servers holds one share of data encoding the block of secret data. At least one Block-Redistribute protocol is initialized to protect against at least one adversary that attempts to corrupt the set of servers. During a Block-Redistribute protocol, the set of servers periodically refreshes its plurality of shares of data such that each server holds a new share of data that is independent of the previous share of data. Finally, a Reco protocol is initialized to reveal the block of secret data.
US09558358B2	Random number generator in a virtualized environment Techniques are described for generating high quality entropy in a software only or a hardware assisted software environment, such as a virtualized environment. Embodiments of the invention describe creating an entropy pool within the virtualized environment using multiple sources of entropy. The entropy pool may be used in creating dynamically customizable and high entropy RNG and PUF. The sources of entropy may include trusted sources, untrusted sources and entropy sources with a varied scale of trust and entropy quality associated with them.
US09558356B2	Data driven system for responding to security vulnerability A data-driven system for fast response to security vulnerability, in one example embodiment, comprises a request detector, a content type evaluator, and a presentation module. A request detector may be configured to detect a request to display content. A content type evaluator may be configured to determine a type of the requested content. A presentation module may be configured to selectively display the requested content based on the determined type of the requested content. The content type evaluator and the presentation module may utilize a data file that stores information related to potential vulnerabilities associated with a content viewing application. Example data file may be an XML file.
US09558355B2	Security scan based on dynamic taint Example embodiments disclosed herein relate to generating a scanning strategy based on a dynamic taint module. A dynamic taint module associated with an application is caused to be initiated for a crawling phase of a security test. A report is received from the dynamic taint module. The dynamic taint module is restricted. The scanning strategy is based on the report.
US09558354B2	Method for generating and executing encrypted BIOS firmware and system therefor A firmware image is received at an information handling system. A symmetric key is generated and stored at a trusted platform module (TPM). The firmware image is encrypted using the symmetric key. The encrypted firmware image is stored in a non-volatile memory.
US09558351B2	Processing structured and unstructured data using offload processors A structured data processing system is disclosed that can include a plurality of XIMM modules connected to a memory bus in a first server, with the XIMM modules each respectively having a DMA slave module connected to the memory bus and an arbiter for scheduling tasks, with the XIMM modules providing an in-memory database; and a central processing unit (CPU) in the first server connected to the XIMM modules by the memory bus, with the CPU arranged to process and direct structured queries to the plurality of XIMM modules.
US09558350B2	Using power fingerprinting (PFP) to monitor the integrity and enhance security of computer based systems Procedures are described for enhancing target system execution integrity determined by power fingerprinting (PFP): by integrating PFP into the detection phase of comprehensive defense-in-depth security; by deploying a network of PFP enabled nodes executing untrusted devices with predefined inputs forcing a specific state sequence and specific software execution; by embedding module identification information into synchronization signaling; by combining signals from different board elements; by using malware signatures to enhance PFP performance; by automatic characterization and signature extraction; by providing secure signature updates; by protecting against side-channel attacks; performing real-time integrity assessment in embedded platform by monitoring their dynamic power consumption and comparing it against signatures from trusted code, including pre-characterizing power consumption of the platform by concentrating on trace sections carrying the most information about the internal execution status; by using PFP from sequence of bit transitions to detect deviations from authorized execution of software in a digital processor.
US09558348B1	Ranking software applications by combining reputation and code similarity Disclosed are systems and methods to combine a reputation score for a software application publisher or vendor and code analysis techniques to provide a method of ranking software applications. A user downloading a software application may be confident that the software application is reliable and does not contain malicious content based on the ranking applied to the particular software application. Code analysis techniques allow for an application ranking even when there may not be enough historical information about the publisher/vendor to create a solid reputation score. A software application rank may be used internally to a software application store prior to making the software application available to the public.
US09558345B2	Storage medium recording display control program for function setting, method for operating display control program, and electronic device including the same An electronic device includes an authentication section that authenticates a user of the electronic device, an operation section that includes a display section and operates the electronic device, a storage section that stores programs that each cause the electronic device to perform a job in accordance with a preliminarily set content, and a program processing section that generates a program associated with the user authenticated in the authentication section. Using the operation section, a first user specifies a program to be shared and a second user permitted to use the shared program. As such, the first user who permits to share the program shares the program with the second user.
US09558344B2	Proximity based authentication for striped data An approach for authentication is provided. The approach performs identifying, by one or more computer processors, an account attempting to access striped data. The approach performs identifying, by one or more computer processors, one or more computing devices that are associated with the account. The approach performs determining, by one or more computer processors, a distance from a first computing device of the identified one or more computing devices to a second computing device of the identified one or more computing devices. The approach performs determining, by one or more computer processors, whether the distance from the first computing device to the second computing device is within a threshold proximity. The approach further grants or denies access to striped data based on threshold proximity being met or exceeded.
US09558340B2	System and method for implementing a robot proof web site The invention prevents robots from browsing a Web site beyond a welcome page. When an initial request from an undefined originator is received, the Web site responds to it with a welcome page including a challenge. Then, on receiving a further request from the undefined originator, the Web site can check whether the challenge is fulfilled or not. If fulfilled, the undefined originator is assumed to be a human being and authorized to go on. If the challenge is not fulfilled, the undefined originator is assumed to be a robot, in which case site access is further denied.The invention prevents Web site contents from being investigated by robots while not requiring users to have to log on.
US09558338B2	Method and apparatus for performing security control by using captured image A method for performing security control includes selectively controlling at least one camera module of an electronic device to capture at least one image and outputting the at least one image, for security of the electronic device. For example, the method includes: activating a screen lock function that is associated with a password; and when it is detected that a string that differs from the password is entered, controlling the module to capture the image and outputting the image. In another example, the method includes: activating a remote control function, allowing the electronic device to be remotely controlled, through at least one of a telecommunication network and a wireless local area network, by an application that runs on a processor of another electronic device; and based upon remote control of the application, controlling the camera module to capture the image and outputting the image. An associated apparatus is also provided.
US09558337B2	Methods of creating a corpus of spoken CAPTCHA challenges Methods of creating a corpus of spoken CAPTCHA challenges are disclosed. The methods involve training a computing system with samples of human voices and computer synthesized voices articulating a set of reference challenge items, scoring the reference challenge items based on differences in articulation between human and machine articulation of each challenge item, and selecting suitable challenge items from among the reference challenge items based on the score.
US09558333B2	Systems and methods for facilitating the sharing of digital bundles of services between users Systems and methods are disclosed for allowing a primary user to share a digital service, in a bundle of services implemented by a plurality of different service providers, with a secondary user. In accordance with one implementation, a method includes receiving a request from the primary user to share a first service in the bundle of services with the secondary user. The method also includes generating, using at least one processor, a first token that associates the secondary user with the first service. The method further includes sending the first token to one of the plurality of different service providers for the first service. Additionally, the method includes modifying a status of the primary user to restrict access to the first service by the primary user while the first service is being shared with the secondary user.
US09558330B2	Technologies for digital rights managment of 3D printable models Technologies for 3D printing digital rights management (DRM) include a 3D printing device communicatively coupled with a 3D model storage server and a rights management server over a network. The 3D printing device may establish a model unlock engine in a first trusted execution environment and a key release engine in a second trusted execution environment. The model unlock engine may extract a content access policy and a content key from an encrypted 3D model and generate a content key request to the key release engine. The key release engine may validate the content key request and decrypt the content key in response to the content access policy being satisfied. The model unlock engine may further decrypt 3D model content included in the 3D model using the decrypted content key to facilitate the printing of the 3D model.
US09558329B2	License management using a basic input/output system (BIOS) Methods and systems for license management using a basic input/output system (BIOS) may involve performing license activation, monitoring, and enforcement. The BIOS may store license information to manage licenses for hardware and/or software components of an information handling system. License management by the BIOS may include monitoring a system clock of the information handling system for changes to avoid tampering with license durations.
US09558326B2	Information processing apparatus, program introduction assistance system and computer readable information recording medium An information processing apparatus that is connected with one or plural apparatuses via a predetermined data transmission path, includes a control part that controls a program introduction process that is carried out in plurality of work stages of work of introducing a program to the one or plural apparatuses; a generation part that generates display screen pages corresponding to the work stages, based on a carrying out request of a user and/or carrying out results of one or more of the program introduction processes that have been carried out by the control part in response to the carrying out request; and a renewing part that renews the display screen page currently displayed on a display device of the information processing apparatus with the currently generated display screen page according to a renewing request of the generation part.
US09558324B2	Artificial general intelligence system/medical reasoning system (MRS) for determining a disease state using graphs A medical general intelligence computer system and computer-implemented methods analyze morpho-physiological numbers for determining a risk of an emergent disease state, determining an emergent disease state, predicting a pre-emergent disease state, determining a pre-emergent disease state, and/or predicting a risk of a pre-emergent disease state.
US09558323B2	Systems and methods for workflow modification through metric analysis An example system to manage a radiologist workflow includes a first interface to monitor a distribution status of at least one medical exam. The medical exam is to be at least one of automatically allocated or assigned to an examiner work queue based on one or more rules. The example system includes a second interface to view at least one metric associated with distribution of the at least one medical exam and an assignment tool to be displayed via the first interface. The assignment tool is to facilitate assignment of the medical exam to an examiner work queue. The example system includes a rules viewer to be displayed via a third interface. The rules viewer is to facilitate configuration of the one or more rules based on the distribution status, the at least one metric, or the assignment. The rules viewer is to automatically update the one or more rules.
US09558316B2	System and method for vending vendible media products A system and method for vending digital video discs is provided. A request is received from a user to complete a rental transaction for a first digital video disc. A database is queried to determine whether a quantity of a set of second digital video discs in a vending inventory exceeds a predetermined threshold. A discount offer notification is presented to the user to rent one of the set of second digital video discs, upon determining that the quantity of the set of second digital video discs exceeds the predetermined threshold. A second request from the user to rent one of the second set of digital video discs is received, and one of the set of second digital video discs is vended to the user.
US09558314B2	Method of designing circuit layout and system for implementing the same A method of designing a circuit layout includes calculating a typical value representing performance characteristics for the circuit layout based on a graphic database system (GDS) file. The method further includes calculating an adjustment value based on the GDS file and at least one of a CAP corner vector or a RES corner vector, wherein the CAP corner vector is based on an eigenvector of a parasitic capacitance of the circuit layout, and the RES corner vector is based on an eigenvector of a parasitic resistance of the circuit layout. The method further includes calculating a corner value based on the typical value and the adjustment value. The method further includes modifying the GDS file if performance characteristics of the corner value fail to satisfy performance requirements of the circuit layout.
US09558313B1	Method and system for providing a game theory based global routing A system and method for global routing that includes receiving nets that need to be routed and capacity constraints, ordering, using processing circuitry, the nets, routing, using the processing circuitry, the nets based on a maze routing with framing method, determining, using the processing circuitry, whether the routing is congestion free, selecting, using the processing circuitry, a subset of the nets based on a game theory method when the routing is not congestion free, applying a rip-up and re-route process on the subset of the nets, and repeating the selecting and applying steps until the routing is congestion free.
US09558312B2	Electromigration resistant standard cell device A standard cell semiconductor integrated circuit device design provides a standard cell semiconductor device that includes first standard cells and user-defined target standard cells which consume more power or include other operational characteristics that differ from the operational characteristics of the first standard cells. The standard cells are routed to ground and power wires using one power rail and the target cells are routed to the ground and power lines using the first power rail and a second power rail to alleviate electromigration in either of the power rails. The two power rails include an upper power rail and a lower power rail. An intermediate conductive layer may be disposed between the upper and lower power rails to provide for signal routing by lateral interconnection between cells.
US09558309B2	Timing violation resilient asynchronous template An asynchronous circuit may include a single-rail logic datapath; one or more error-detecting latches; a controller that controls the error-detecting latches; and delay lines. The controller and the delay lines may cooperate to communicate with one or more other controllers that the output of the controlled error-detecting latches may be valid prior to when the error-detecting latches indicate whether or not an error occurred.
US09558308B2	Compiler for closed-loop 1×N VLSI design Embodiments that design integrated circuits using a 1×N compiler in a closed-loop 1×N methodology are disclosed. Some embodiments create a physical design representation based on a behavioral representation of a design for an integrated circuit. The behavioral representation may comprise RTL HDL with one or more 1×N building blocks. The embodiments may alter elements of the 1×N building block by using logic design tools, synthesis tools, physical design tools, and timing analysis tools. Further embodiments comprise an apparatus having a first generator to generate a behavioral representation of a design for an integrated circuit, a second generator to generate a logical representation of the design, and a third generator to generate a physical design representation of the design, wherein the representation generators may create updated versions of the representations which reflect alterations made to 1×N building block elements.
US09558307B1	System and method for providing a scalable server-implemented regression query environment for remote testing and analysis of a chip-design model A system and method for providing a scalable server-implemented regression query environment for remote testing and analysis of a chip-design model receives chip-design information, including the chip-design model to be tested and one or more attributes for testing the chip design model; receives a first regression simulation test request from the client-side integration client; initiates a proxy instance for a first regression simulation test to be executed by an application programming interface (API), based on the first regression simulation test request; selects, by the API, the attributes for testing the chip-design model; executes, by the API, the first regression simulation test on the chip-design model using the selected attributes; monitors, by a server-side database manager, the first regression simulation test during execution of the first regression simulation test; and stores, by the server-side database manager, one or more results of the first regression simulation test in a database.
US09558305B1	Automatic modeling, mapping, and code generation for homogeneous and heterogeneous platforms In an embodiment, a system may receive information regarding a group of physical devices; receive information regarding a set of functional blocks associated with a functional model; and receive mapping information that indicates a mapping between the set of functional blocks and one or more physical devices of the group of physical devices. The system may further generate at least one functional effect associated with the functional model. The generating may be based on: the set of functional blocks, the mapping information, and the information regarding the one or more physical devices. The system may also store or output the at least one functional effect.
US09558304B2	Substrate processing apparatus, simulation apparatus, storage medium and simulation method A substrate processing apparatus includes a substrate processing apparatus, including: a substrate processing chamber configured to accommodate a substrate and process the substrate; a piping coupled to the substrate processing chamber to allow a gas for processing the substrate to be introduced therethrough; and a simulation apparatus configured to simulate a path in which the gas for processing the substrate flows through the piping. The simulation apparatus includes: an information acquisition unit configured to acquire gas flow information defined by an operation mode in which the substrate is processed; a path determination unit configured to determine a gas path based on the gas flow information acquired by the information acquisition unit; and a simulation unit configured to simulate a flow of the gas by putting a color defined according to the type of gas on the gas path determined by the path determination unit.
US09558303B2	Tool gravity center position estimation device and machine tool A value of shape data is calculated from moment of inertia and weight data of a tool, a relational expression between shape data and tool moment of inertia in a predetermined tool shape model, and a relational expression between the shape data and tool weight in the tool shape model to estimate a shape of the tool, and a gravity center position of the tool is calculated based on the estimated tool shape.
US09558302B2	Designing a circular staggered pattern of objects The invention is directed to computer-implemented method for designing a staggered pattern of objects in a computer-aided design system. The method comprises providing a rotation axis that is the origin of two or more concentric circles, providing a reference object to be multi-instantiated, defining the number of objects to be instantiated from the reference object on each concentric circle, defining an angular shift, instantiating the number of objects from the reference object on each concentric circle, the instantiated objects being spaced according to an angular deviation between two consecutive instantiated objects on a given concentric circle, in one of every two concentric circle, shifting the instantiated objects in accordance with the angular shift.
US09558298B2	Method for the approximate matching of regular expressions, in particular for generating intervention workflows in a telecommunication network A list of elements in a set of elements is matched by means of regular expressions that define respective groups of elements in the set by approximately matching by means of the regular expressions the list of elements by locating recurrences of the regular expressions in the list of elements with a maximum number of matching errors. The matching errors correspond to insertions deriving from the superposition of groups of elements related to different regular expressions. Each time the recurrence of one regular expression is located in the list, the group of elements defined by the regular expression thus located is removed from the list, while leaving in the list those elements corresponding to errors. The approximate matching can be performed by representing each regular expression in terms of Glushkov automata. The method is applicable, e.g., for generating workflows related to interventions on equipment such as equipment included in a telecommunication network or to attacks attempted against such equipment.
US09558297B1	Memory management techniques Techniques for memory management are described. A memory management data structure may include a tree structure of nodes each representing a free memory portion of a size used as a key value. The tree may be a modified AVL tree with nodes sorted based on key values corresponding to free memory portion sizes. The data structure may include a first list representing a memory map corresponding to different memory portions where each entry of the first list represents a memory portion with an associated memory address range that is not contiguous with respect to any other memory address range of any other memory portion represented by an entry on the first list. Each entry of the first list representing a free memory portion may be associated with a node of the tree structure.
US09558293B2	Systems, computer program products, and methods for generating custom web pages for mobile devices A system generating a web page portal customized for a particular requesting mobile device is disclosed. The system includes an information store having multiple groups, each associated with device qualifications, web-design characteristics, and device identifications. The system also includes a custom web page development database (CWDD) including a plurality of web page component modules storing forms of web page components, and a custom web page development server (CWDS). The CWDS (i) receives an incoming request for a web page from the particular requesting mobile device, (ii) identifies a device type, and (iii) determines an applicable group. The CWDS also (iv) obtains web-design characteristics from the applicable group, (v) accesses the CWDD and obtains applicable web page components based on the web-design characteristics obtained from the applicable group of the information store, and (vi) generates the custom web page portal using the applicable web page components obtained from the CWDD.
US09558289B2	Securely rendering online ads in a host page One or more techniques and/or systems are disclosed for rendering online ads on a webpage. A first inter-frame communication channel is created, which comprises a first communication channel between a first cross-domain frame and a host page, such as the webpage. The first cross-domain frame comprises content from a domain that is different than that of the host page domain. A second inter-frame communication channel is created comprising a second communication channel between the first cross-domain frame and a second cross-domain frame in the host page.
US09558288B1	Webpage creation system for accelerated webpage development for at least one mobile computing device A webpage creation system for developing mobile device specific webpages for at least one mobile computing device having a hypertext generator and a domain free interface traverser to simultaneously collect predefined data from different third party servers, store the collected data and maintain consistency throughout. The webpage creation system can have a replication feature, a plurality of common stylistic rules, a document processor, auto auditor, and domain free central indexer to merge predefined data into a mobile device specific webpage document template creating the mobile device specific webpage and storing the mobile device specific webpage. A plurality of self-generating data entry screens can develop the mobile device specific webpage and a plurality of computer instructions can convert the mobile device specific webpage to a mobile version, transmit the mobile version for display and maintain the mobile version for use on the mobile computing device.
US09558283B2	Service personalization with familiarity sensitivity Personalized services often utilize individual profiles, such as social network profiles, product purchase histories, or browsing histories. However, personalization may exhibit or imply a familiarity level between the service and the individual that is beyond the individual's comfort level. Presented herein are techniques for adapting personalized services to request supplemental individual information only within a current familiarity stage that has been established by the individual with the service, and only to provide a requested usage of a service. Such solicitation may inform the individual of the intended usage of the requested information. Usages that may involve more sensitive information may be predicated upon requesting and receiving individual consent from the individual to advance to a higher familiarity stage. The user may be permitted to provide individual consent to advancing to a higher familiarity stage only for a particular service, and/or only temporarily for a particular usage of the service.
US09558282B2	Playlists for real-time or near real-time streaming Methods and apparatuses for real-time or near real-time streaming of content using transfer protocols such as an HTTP compliant protocol. In one embodiment, a method includes dividing a stream of data, representing the contiguous time based content of a program (e.g. a live video broadcast), into a plurality of distinct media files, and generating a playlist file having a plurality of tags and Universal Resource Indicators (URIs) indicating an order of presentation of the plurality of distinct media files. The plurality of media files and the playlist file can be made available for transmission to a client device which can retrieve the media files using the playlist file.
US09558276B2	Systems and methods for facilitating participation Described are computer-based methods and apparatuses, including computer program products, comprising the steps of, or structure for, storing a plurality of expert profiles in a database, each of the plurality of expert profiles comprising information associated with a person having knowledge in a particular category, subject or topic; receiving search criteria over a network from a query source; selecting at least one of the plurality of expert profiles comprising information that satisfy the search criteria; and transmitting expert profile data for each of the selected expert profiles to the remote search engine, the expert profile data comprising data that defines a displayable representation of a corresponding expert profile, the expert profile data further comprising data that facilitates a client-initiated, real-time communication session over the network with a person associated with the corresponding expert profile.
US09558275B2	Action broker Among other things, one or more techniques and/or systems are provided for building an action catalogue, generating an action frame for an action within the action catalogue, and/or executing an action. In an example, an action may be included within the action catalogue based upon descriptive text associated with an application indicating that the application is capable of performing the action (e.g., a movie app may be capable of performing an order movie tickets action). A parameter (e.g., a movie name) and/or an execution endpoint (e.g., a uniform resource identifier used to access movie ticket ordering functionality) may be used to generate an action frame for the action. In this way, user intent to perform an action may be identified from user input (e.g., a spoken command), and the action may be performed (e.g., on behalf of the user with minimal additional user input) by using the action frame.
US09558273B2	System and method for generating influencer scores Methods and systems for generating influence scores are disclosed. A plurality of opinions of a selected topic are retrieved from a database. Influencers each associated with at least one opinion from the plurality of opinions are determined using the processor. A score is automatically generated for each influencer using the processor, the score related to the selected topic.
US09558270B2	Search result organizing based upon tagging One or more techniques and/or systems are provided for tagging search results, organizing tagged search results for later access from various devices, public sharing of tagged search results, and/or providing targeted content based upon search results tagged by a user. That is, a user may tag a search result (e.g., a website, an image, a social network profile, etc.), such as through a one-click user input, with a tag to create a tagged search result. The tagged search result may be organized into a public tag collection for sharing and/or exploration of tagged search results by other users. The tagged search result may be organized into a personal tag collection for later access by the user from any device. Because the tagged search result may be indicative of an interest of the user, targeted content associated with the tagged search result may be provided to the user.
US09558266B1	System and method for discovering groups whose members have a given attribute A method for discovering a group defined by a common characteristic is disclosed. The method includes building representation of a portion of a social network based on a starting person with the given characteristic, the person also providing the person's gender and school affiliation. The social network representation is then searched to discover clusters therein meeting certain size and connectivity requirements with respect to the network. After the clusters in the network are discovered, clusters having a high degree of similarity are merged together. The resulting clusters, both merged and non-merged, are then scored to determine the cluster that best fits the original group. The winning cluster is then returned to the starting person who confirms the correctness of the cluster. The set of the persons in a confirmed cluster are then displayed to the starting person.
US09558259B2	Computer-implemented system and method for generating clusters for placement into a display A computer-implemented system and method for generating clusters for placement into a display is provided. A set of clusters is generated from a document set. A single cluster of related documents from the document set is obtained and at least one new cluster is added. One such document in the set is compared to the cluster. A difference in distance between the document and a common origin and the cluster and the common origin is determined. The document is designated as the new cluster when the difference fails to satisfy a predetermined threshold. One or more cluster spines each having two or more clusters placed along a vector are placed into a display. The clusters along each spine are identified as similar and the clusters of one such spine are also similar to further clusters located along a further spine having a small cosine rotation from that cluster spine.
US09558258B2	Hybrid database table stored as both row and column store A hybrid database table is stored as both a row and a column store. One or more techniques may be employed alone or in combination to enhance performance of the hybrid table by regulating access to, and/or the size of, the processing-intensive column store data. For example during an insert operation, the column store data may be searched for a uniqueness violation only after certain filtering and/or boundary conditions have been considered. In another technique, a hybrid table manager may control movement of data to the column store based upon considerations such as frequency of access, or underlying business logic. In still another technique, querying of the hybrid table may result in a search of the column store data only after an initial search of row store data fails to return a result.
US09558255B2	Managing replication configuration availability A computer-implemented method, carried out by one or more processors, for managing replication configurations. In an embodiment, the method comprises receiving, by one or more processors, a replication configuration for replicating data, wherein the replication configuration defines at least a target table in a target database based on a source table in a source database; initializing, by one or more processors, a federated view, wherein the federated view is based on at least the source table in the source database as defined in the replication configuration; utilizing, by one or more processors, the federated view to satisfy requesting applications, where requesting applications obtain data from the federated view; responsive to determining the replication of data is in spec, utilizing, by one or more processors, the target table in the target database to satisfy requesting applications.
US09558253B2	Providing access to message headers Method and system are provided for providing access to string-based message headers in network protocol messages. The method includes: converting header names into canonical form, wherein a canonical key represents at least one equivalent header name, and wherein a canonical key has a string and an integer value; providing a mapping between the header names and the canonical keys; and searching for a header name using the canonical key by sequential search using integer comparison.
US09558252B2	Information processing system, data management method, information processing apparatus, and control method and control program therefor Provided is an information processing apparatus including a file input unit that inputs a data model file representing a data model in a first language for data model description; a first generation unit that generates a database configuration file described in a second language for database description from the data model file; and a second generation unit that generates an application interface described in a third language for application interface description from the data model file.
US09558249B2	Mobile wireless communications device to perform local and remote search and associated methods A mobile wireless communications device is to communicate with a server storing a plurality of file folders, and includes a display, a wireless transceiver, and a processor all carried by a housing. The processor is configured to wirelessly download an initial portion of a selected file folder from the server, with the server still having a remainder portion of the selected file folder available for downloading. The processor also generates search results by performing a local search of the initial portion of the file folder, and performs a remote search of the reminder portion of the selected file folder. The processor further presents the search results on the display.
US09558238B2	Distinction entities for segmentation In accordance with aspects of the disclosure, systems and methods are provided for generating a reduced segment of a population set for a course of activities based on one or more distinction entities. The systems and methods may be configured to determine the population set for the course of activities. The population set may include a first number of members identified by a first distinction entity. The systems and methods may be configured to select a second distinction entity related to the first number of members of the population set. The systems and methods may be configured to generate the reduced segment of the population set for the course of activities by selecting a second number of members from the first number of members identified by the second distinction entity based on predetermined criteria.
US09558236B1	Master key identification and feedback system A key model identification and feedback system includes a key identification housing, a master key receiving aperture, a master key identifier, a processor in communication with the master key identifier, and a feedback module. The processor is configured to access a database defining a plurality of known key models, compare the physical characteristics of the master key with physical characteristics of the known key models in the database to identify a model of the master key, and communicate the model of the master key to the feedback module coupled to the key identification housing. The feedback module, responsive to the communication from the processor, outputs an indication of the model of the master key and directions to a location remote from the key identification housing where a key blank having the same model of the master key is available for duplicating the master key.
US09558233B1	Determining a quality measure for a resource Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for determining a measure of quality for a resource. In one aspect, a method includes determining a seed score for each seed resource in a set. The seed score for a seed resource can be based on a number of resources that include a link to the seed resource and a number of selections of the links A set of source resources is identified. A source score is determined for each source resource. The source score for a source resource is based on the seed score for each seed resource linked to by the source resource. Source-referenced resources are identified. A resource score is determined for each source-referenced resource. The resource score for a source-referenced resource can be based on the source score for each source resource that includes a link to the source-referenced resource.
US09558228B2	Client computer for querying a database stored on a server via a network The invention relates to a client computer for querying a database stored on a server via a network, the server being coupled to the client computer via the network, wherein the database comprises a first relation, wherein the first relation comprises first data items, wherein the first data items are encrypted with a first cryptographic key in the first relation, wherein the first data items form a partially ordered set in the first relation, the partial order being formed with respect to the first data items in non-encrypted form, wherein the client computer has installed thereon an application program, the application program being operational to perform the steps of receiving a search request specifying a search interval and determining the first data item forming an interval boundary of the search interval.
US09558226B2	Storage quota management A method of and system for managing storage of an object for an object store is disclosed. The method and system may establish the object store. The object store may be configured to be used for a user for a workload-type for a set of objects. The method and system may provide, for the user for the workload-type, an object store quota. The method and system may provide, for the user for the workload-type, a meta-data quota. The method and system may process, consistent with both the object store quota and the meta-data quota, the set of objects.
US09558223B2	Extending cluster allocations in an extensible file system An extensible file system format for portable storage media is provided. The extensible file system format includes the specification of primary and secondary directory entry types that may be custom defined. The primary and secondary directory entry types can be further classified as critical and benign directory entries. The directory entry types can define whether a cluster chain corresponding to a file can be contiguously allocated.
US09558220B2	Big data in process control systems A big data network or system for a process control system or plant includes a big data apparatus including a data storage area configured to store, using a common data schema, multiple types of process data and/or plant data (such as configuration and real-time data) that is used in, generated by or received by the process control system, and one or more data receiver computing devices to receive the data from multiple nodes or devices. The data may be cached and time-stamped at the nodes and streamed to the big data apparatus for storage. The process control system big data system provides services and/or data analyzes to automatically or manually discover prescriptive and/or predictive knowledge, and to determine, based on the discovered knowledge, changes and/or additions to the process control system and to the set of services and/or analyzes to optimize the process control system or plant.
US09558215B2	Governing information A method and system for governing information is provided. The method includes receiving, by a processor, data defining a scope and context of an information governance project and information requirements data associated with the data. The processor classifies the information requirements data into concepts in accordance with a meta-model profile. The processor generates conceptual models and realization models in accordance with the meta-model profile. Governance roles are defined and assigned to informational assets within the conceptual models The processor selects a final architecture option and generates policy models in accordance with the governance roles, the informational assets, the meta-model profile and user input. A final architecture option is deployed and monitored, and governance events triggered and reports generated in response to changes in this deployed architecture option.
US09558206B2	Asymmetric distributed data storage system Asymmetric distributed replicated data storage systems and methods are described herein. The storage system includes zones that are independent, and autonomous. The zones include nodes that are independent and autonomous. The nodes include storage devices. When a data item is stored, it is partitioned into a plurality of data objects and a plurality of parity objects using erasure coding. The data objects and parity objects are spread across all nodes and zones in the storage system asymmetrically such that a first zone includes all of the data objects and no parity objects while the remaining zones include subsets of the data objects and all of the parity objects. The systems and methods provide for data resiliency while keeping the amount of storage space required relatively low.
US09558198B2	File map compression using run length encoding for active blocks Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for compressing file maps. In one aspect, a method includes accessing a file maintained by a file system that manages access to a block device. The file includes a plurality of active blocks associated with a respective logical block number and a respective block index. The method also includes assigning a file index to the file, analyzing the file to determine a maximum block index and a minimum block index, and identifying runs of blocks in the plurality of active blocks. Each run of blocks includes a respective start block. For each of the runs of blocks, the method includes identifying a respective length. For each start block, the method includes generating a file map entry for each start block. The method also includes storing the file map entries in a file map.
US09558197B2	Assigning backup device path based on file coloring A cooperative data file coloring backup system includes a file color agent (FCA) and a file color storage cloud controller (FCSCC). The FCA assigns a color to a data file. The assigned color is associated with a highest projected data reduction factor achieved when backing up the data file from a host to one of various storage devices comprised within a data backup storage area network. The FCSCC maintains a list of file types and associated data reduction factors that are achieved during a backup of the file types and provides to the FCA a storage path from the host to a particular storage device within the storage area network associated with the highest data reduction factor and file type. The FCA may implement the storage path based upon the assigned color for each backup request received by the host.
US09558192B2	Centralized parallel burst engine for high performance computing Data storage systems and methods for storing data are described herein. An intermediate storage system is coupled with a High Performance Computing (HPC) system. A plurality of burst engines of the intermediate storage system are directly connected to compute nodes of the HPC. The burst engines are operative to receive file level data from the compute nodes at data transfer rates that at least match to the burst mode output rate of the compute node. The burst engines store the data to high bandwidth storage devices of the intermediate storage system at a data rate that at least matches the burst output rate of the compute node. During a compute phase of the compute node, data is replayed from the intermediate storage devices to a primary storage system at a lower data transfer rate.
US09558191B2	Automatic identification of photo books system and method An automatic identification of one or more content books system and method are provided in which the one or more content books are identified based on holidays or events selected by the user.
US09558188B2	Dynamic filtering of a navigation path to a set of minimums Embodiments of the present invention address deficiencies of the art in respect to filtering technical documentation and provide a method, system and computer program product for rapid filtering technical documentation. In one embodiment, a data processing system for dynamically filtering technical documentation can include a rapid filter coupled to a viewer configured for rendering technical documentation in a window. The rapid filter can include program code enabled to concurrently render a summarized form of the technical documentation in a separate window.
US09558187B2	Enhanced document input parsing An approach is provided for an information handling system that includes a processor and a memory to analyze documents. In the approach, an electronic document is received with the document including content, such as text, and revision metadata that is associated with the content. The revision metadata is analyzed and the approach identifies a confidence level based on the analysis. The confidence level is associated with the electronic document content. The confidence level can then be utilized by a Question and Answer (QA) system.
US09558179B1	Training a probabilistic spelling checker from structured data A spelling system derives a language model for a particular domain of structured data, the language model enabling determinations of alternative spellings of queries or other strings of text from that domain. More specifically, the spelling system calculates (a) probabilities that the various query entity types—such as STREET, CITY, or STATE for queries in the geographical domain—are arranged in each of the various possible orders, and (b) probabilities that an arbitrary query references given particular ones of the entities, such as the street “El Camino Real.” Based on the calculated probabilities, the spelling system generates a language model that has associated scores (e.g., probabilities) for each of a set of probable entity name orderings, where the total number of entity name orderings is substantially less than the number of all possible orderings. The language model can be applied to determine probabilities of arbitrary queries, and thus to suggest alternative queries more likely to represent what a user intended.
US09558176B2	Discriminating between natural language and keyword language items This disclosure pertains to a classification model, and to functionality for producing and applying the classification model. The classification model is configured to discriminate whether an input linguistic item (such as a query) corresponding to either a natural language (NL) linguistic item or a keyword language (KL) linguistic item. An NL linguistic item expresses an intent using a natural language, while a KL linguistic item expresses the intent using one or more keywords. In a training phase, the functionality produces the classification model based on query click log data or the like. In an application phase, the functionality may, among other uses, use the classification model to filter a subset of NL linguistic items from a larger set of items, and then use the subset of NL linguistic items to train a natural language interpretation model, such as a spoken language understanding model.
US09558174B2	Application module for managing jobs asynchronously A method to synchronize data between a spreadsheet application and a marketplace application is disclosed. The method includes receiving a request to synchronize data items between the spreadsheet application and the marketplace application, the data items relating to a type of listing of items associated with the marketplace application. Additionally, the method includes executing a process to synchronize the data items between the spreadsheet application and the marketplace application, the process to include at least one of downloading one of the data items from the spreadsheet application and uploading one of the plurality of data items to the marketplace application, the executing of the process to occur independently of the executing of the spreadsheet application. Furthermore, the method includes displaying a status of the executing of the process in a native user interface element of the spreadsheet application.
US09558173B2	Method for creating a document model from discontinuous selections of an existing document Systems and methods of pasting a discontinuous selection from a first document are provided, comprising receiving, at a processor, the discontinuous selection modeling the selection as a data structure, and pasting each of the plurality of portions including contextual formatting for each portion. The discontinuous selection includes a plurality of portions of the first document and the portions are discontinuous. The portions may include one or more cells from a table, and pasting the one or more cells includes pasting at least borders of the cell, a background color of the cell, and text contained in the cell.
US09558172B2	Linking visual properties of charts to cells within tables Tools and techniques are described for linking visual properties of charts to cells within tables. Methods provided by these tools enable users to select visual properties that are associated with graphical displays of chart data, and to link these visual properties to respective cells within the tables. User interfaces provided by these tools may provide representations of visual properties associated with the graphical displays of chart data, with these representations of the visual properties being responsive to user input to link the cells in the tables to the visual properties. These user interfaces may also include representations of the cells that are associated with the representations of the visual properties.
US09558164B1	Methods and system for converting WSDL documents into XML schema A method and system for use of XML Schema in conjunction with XML Schema aware applications on a SOAP message including a request with a method defined by a WSDL document. A WSDL document is converted offline to XML Schema. A SOAP message containing a request is received. An XML Schema aware operation is performed on the SOAP message based on previously determined XML Schema derived from the WSDL document.
US09558161B2	Providing a recovery placeholder within an application Embodiments described herein provide recovery placeholders within an application. Specifically, one approach includes providing an application operating on a client device, and generating a recovery placeholder that defines a current state of the application by analyzing a queue containing a set of messages, and identifying one or more selected events corresponding to the application from the queue. In one approach, the current state defines, at the time the recovery placeholder is generated, at least one of: a position within a window of the application, a current activity of the application, a position of the window within a display of a display device, and a placement order of the window of the application in relation to a stack of other cascaded windows. At a later point in time, the application may then be restored to the current state by accessing the recovery placeholder to replay the one or more selected events.
US09558160B2	Embedded content suitability scoring Embedded content suitability scoring is provided. A plurality of containers of a document is identified. Each container includes a portion of content of the document. A source for a container of the plurality of containers of the document is identified by matching the content of the container to the content of the source. A suitability score for the container is determined based, at least in part, on the content of the container and the content of the source. A suitability category for the container is determined based, at least in part, on the suitability score. The document is presented along with markup of the container that is based, at least in part, on the suitability category.
US09558152B2	Synchronization method, multi-core processor system, and synchronization system A synchronization method is executed by a multi-core processor system. The synchronization method includes registering based on a synchronous command issued from a first CPU, CPUs to be synchronized and a count of the CPUs into a specific table; counting by each of the CPUs and based on a synchronous signal from the first CPU, an arrival count for a synchronous point, and creating by each of the CPUs, a second shared memory area that is a duplication of a first shared memory area accessed by processes executed by the CPUs; and comparing the first shared memory area and the second shared memory area when the arrival count becomes equal to the count of the CPUs, and based on a result of the comparison, judging the processes executed by the CPUs.
US09558149B2	Dual system A dual system according to the present invention includes: a memory copying unit configured to, when an arithmetic device of a first computer module is installed into the dual system, execute a memory copy process of copying data in a memory region of a second computer module into a memory region of the first computer module; a substitute processing unit configured to execute a service substitute process that is executed by a different arithmetic device from an arithmetic device executing the memory copy process and that is part of processes involved in the information processing service by the dual system; and a shared memory that stores data of the service substitute process by the substitute processing unit. The shared memory is excluded from the target of the memory copy process.
US09558147B2	Fine-grained stream-policing mechanism for automotive ethernet switches A system and method for monitoring a plurality of data streams is disclosed. At a first processing stage, a first memory area is associated to an element of a plurality of data streams. Upon arrival of a frame associated with one of the plurality of data streams, a second memory area is associated to the arrived frame based on the element. In the second memory area, a data indicating an arrival of the arrived frame is recorded and on a successful recording, the frame is forwarded to a second processing stage. An independent process executes at a preselected time interval to erase contents of the first memory area.
US09558143B2	Interconnect systems and methods using hybrid memory cube links to send packetized data over different endpoints of a data handling device System on a Chip (SoC) devices include two packetized memory buses for conveying local memory packets and system interconnect packets. In an in-situ configuration of a data processing system two or more SoCs are coupled with one or more hybrid memory cubes (HMCs). The memory packets enable communication with local HMCs in a given SoC's memory domain. The system interconnect packets enable communication between SoCs and communication between memory domains. In a dedicated routing configuration each SoC in a system has its own memory domain to address local HMCs and a separate system interconnect domain to address HMC hubs, HMC memory devices, or other SoC devices connected in the system interconnect domain.
US09558132B2	Socket management with reduced latency packet processing Generally, this disclosure provides systems, methods and computer readable media for management of sockets and device queues for reduced latency packet processing. The method may include maintaining a unique-list comprising entries identifying device queues and an associated unique socket for each of the device queues, the unique socket selected from a plurality of sockets configured to receive packets; busy-polling the device queues on the unique-list; receiving a packet from one of the plurality of sockets; and updating the unique-list in response to detecting that the received packet was provided by an interrupt processing module. The updating may include identifying a device queue associated with the received packet; identifying a socket associated with the received packet; and if the identified device queue is not on one of the entries on the unique-list, creating a new entry on the unique-list, the new entry comprising the identified device queue and the identified socket.
US09558130B1	Interconnection of peripheral devices on different electronic devices A method and apparatus of performing a data transmission from an electronic device or a peripheral device of an electronic device to a peripheral device of a remote electronic device is disclosed. One example method of performing the data transmission may include transmitting data designated for the remote peripheral device to a local virtual device object. The data that is received by the local virtual device object is transmitted via at least one communication interface or peripheral device of the electronic device to at least one remote communication interface or peripheral device of the remote electronic device. The data arriving at the least one remote communication interface or peripheral device of the remote electronic device is received by a remote virtual device object and transmitted to the designated remote peripheral device.
US09558126B2	Workload selection and cache capacity planning for a virtual storage area network Exemplary methods, apparatuses, and systems receive a first input/output (I/O) trace from a first workload and run the first I/O trace through a cache simulation to determine a first miss ratio curve (MRC) for the first workload. A second I/O trace from the first workload is received and run through the cache simulation to determine a second MRC for the first workload. First and second cache sizes corresponding to a target miss rate for the first workload are determined using the first and second MRCs. A fingerprint of each of the first and I/O traces is generated. The first cache size, the second cache size, or a combination of the first and second cache sizes is selected as a cache size for the first workload based upon a comparison of the first and second fingerprints. A recommended cache size is generated based upon the selected cache size.
US09558120B2	Method, apparatus and system to cache sets of tags of an off-die cache memory Techniques and mechanism to provide a cache of cache tags in determining an access to cached data. In an embodiment, a tag storage stores a first set including tags associated with respective data locations of a cache memory. A cache of cache tags store a subset of tags stored by the tag storage. In response to any determination that a tag of the first set is to be stored to the cache of cache tags, all tags of the first set are stored to the first portion. Any storage of tags of the first set to the cache of cache tags includes storage of the tags of the first set to only a first portion of the cache of cache tags. In another embodiment, a replacement table is maintained for use in determining, based on an indicated level of activity for a set of the cache of cache tags, whether the set is to be selected for eviction and replacement of cached tags.
US09558113B2	Secure garbage collection on a mobile device Methods and systems for performing garbage collection involving sensitive information on a mobile device are described herein. Secure information is received at a mobile device over a wireless network. The sensitive information is extracted from the secure information. A software program operating on the mobile device uses an object to access the sensitive information. Secure garbage collection is performed upon the object after the object becomes unreachable.
US09558109B2	Method and apparatus for flash memory arithmetic encoding and decoding A method for reducing an amount of time needed for a single iteration of arithmetic encoding and arithmetic decoding is provided. Rescaling and range are calculated in parallel, range being a High parameter bound of a symbol-interval—a Low parameter bound of the symbol-interval+1. A new iHigh (iH) parameter and a new iLow (iL) parameter or a given/decoded symbol is found according to a cumulative frequency for an ith symbol. iH parameter and iL parameter rescaling is performed by shifting an amount of most significant bits of iH, iL in accordance with values of iH and iL. iRange is shifted to the left in accordance with a number of digits needed to represent iRange and a total number of bits reserved for iRange. A shifted iRange is divided by CF[N] and saved to Step_tmp while awaiting a result of H,L rescaling.
US09558105B2	Transactional boundaries for virtual model generation Data is identified that represents a path of a transaction that includes a plurality of transaction fragments associated with a plurality of software components. The plurality of software components includes a first software component to communicate in the transaction with a second software component over an interface. A transaction boundary is determined between the first and second software components based at least in part on the data. A virtual model is generated to simulate at least a particular one of the plurality of software components based on the identified transaction boundary.
US09558103B2	System and method to indicate code block execution In one implementation, computer executable instructions are provided to identify a group of instructions corresponding to a code block for an executable module. The instructions increment a counter associated with the code block to indicate the code block has been tested.
US09558101B2	Preprocessor directive symbol analyzer devices and methods Generally discussed herein are systems, apparatuses, or methods for preprocessor directive symbol definition and preprocessor directive symbol usage analysis. In one or more embodiments a method can include applying a heuristic to a first preprocessor directive symbol from a build file or sub-build file of one or more build files or source code files and a second preprocessor directive symbol from a source code file. The method can include determining a likelihood that the first preprocessor directive symbol is presented erroneously in the source code file as the second preprocessor directive symbol based on a result of applying the heuristic.
US09558100B2	Monitoring activities of a software application Disclosed are a method and a system for monitoring one or more activities offered by a software application in a computer network. The method comprises monitoring a response time for one or more activities. The one or more activities are performed by a software application. The method further comprises comparing the response time of the one or more activities with a corresponding pre-defined threshold time. The method also comprises detecting a faulty activity of the one or more activities based on the comparison. The method further comprises highlighting a code snippet corresponding to the faulty activity in a source code of the software application.
US09558095B2	Monitoring system noises in parallel computer systems Various embodiments monitor system noise in a parallel computing system. In one embodiment, at least one set of system noise data is stored in a shared buffer during a first computation interval. The set of system noise data is detected during the first computation interval and is associated with at least one parallel thread in a plurality of parallel threads. Each thread in the plurality of parallel threads is a thread of a program. The set of system noise data is filtered during a second computation interval based on at least one filtering condition creating a filtered set of system noise data. The filtered set of system noise data is then stored.
US09558092B2	Runtime-agnostic management of applications An application may be modeled as a collection of resource usage. The model allows the application to be elastic so that additional resource usage can be added when needed. Items may be added to and/or removed from applications at any time without regard to the state of the application. Existing items in the application may also be altered at any time regardless of the application state. A set of interfaces are used to manage the resources. The interface allow for the provisioning, configuration, deployment, monitoring and diagnostics of resources in a consistent way.
US09558091B2	Information processing device, fault avoidance method, and program storage medium An information processing device includes a detection unit and an avoidance unit. The detection unit monitors one or both of a utilization rate of memory capacity allocated to a process, and a processing time to take to process a request. The detection unit detects a state where a fault is likely to occur in the information processing device, based on the monitoring result. The avoidance unit executes fault avoidance processing when the state where the fault is likely to occur is detected. The fault avoidance processing is processing that lowers an upper limit number of threads from a standard value to a limit value that is less than the standard value, and extends a waiting time of a thread from a standard time to an extended time that is longer than the standard time.
US09558089B2	Testing insecure computing environments using random data sets generated from characterizations of real data sets The disclosed embodiments provide a system that facilitates testing of an insecure computing environment. During operation, the system obtains a real data set comprising a set of data strings. Next, the system determines a set of frequency distributions associated with the set of data strings. The system then generates a test data set from the real data set, wherein the test data set comprises a set of random data strings that conforms to the set of frequency distributions. Finally, the system tests the insecure computing environment using the test data set.
US09558088B2	Using environmental signatures for test scheduling Method and system are provided for using environmental signatures for test scheduling. The method includes: generating an environmental signature for a test including the usage of power and temperature of one or more hardware components being tested; determining an outcome score of the test; and scheduling one or more tests on hardware components based on the environmental signature and outcome score of candidate tests. Generating an environmental signature for a test may include: monitoring the usage of power by hardware components during the course of the test; monitoring the temperature of hardware components during the course of the test; generating a signature representing the power usage and temperature during the test. Determining an outcome score of the test may include determining the number of defects exposed by a test and basing the outcome score on the number of defects exposed.
US09558087B2	Test virtual volumes for test environments For test virtual volume operation testing, an identification module determines if an input/output (I/O) operation for a test virtual volume is directed to volume contents data. A disposition module executes the I/O operation in response to the I/O operation being directed to the volume contents data and declines the I/O operation in response to the I/O operation not being directed to the volume contents data.
US09558085B2	Creating and reverting to a snapshot of a virtual disk An administrator provisions a virtual disk in a remote storage platform and defines policies for that virtual disk. A virtual machine writes to and reads from the storage platform using any storage protocol. Virtual disk data within a failed storage pool is migrated to different storage pools while still respecting the policies of each virtual disk. Snapshot and revert commands are given for a virtual disk at a particular point in time and overhead is minimal. A virtual disk is cloned utilizing snapshot information and no data need be copied. Any number of Zookeeper clusters are executing in a coordinated fashion within the storage platform, thus increasing overall throughput. A timestamp is generated that guarantees a monotonically increasing counter, even upon a crash of a virtual machine. Any virtual disk has a “hybrid cloud aware” policy in which one replica of the virtual disk is stored in a public cloud.
US09558079B2	Flash copy for disaster recovery (DR) testing In one embodiment, a system includes a processor and logic integrated with and/or executable by the processor. The logic is configured to cause the processor to determine which cluster within a disaster recovery (DR) family to access, via a DR host, a snapshot of data from based on a consistency of the snapshot in relation to data on one or more production clusters at a time-zero, cause the processor to allow access, via a first DR cluster, to snapshots on any of one or more DR clusters within a DR family, access the snapshot stored on the one or more DR clusters within the DR family only when the snapshot was made consistent with respect to data on the one or more production clusters within the DR family before a time-zero, and perform DR testing using the snapshot.
US09558077B1	Relational database recovery A database recovery method involves: a) accessing image copies; b) accessing updates to be re-applied to reconstruct the database; c) reading into objects, from the image copies, data pages to be recovered; d) concurrently with “c)” retrieving and sorting log records from the updates; e) as the data pages are read into the objects in “c)”, applying the sorted log records, in timestamp order; f) as “e)” completes for individual pages, and concurrently with “e)” with respect to pages for which applying is not complete, extracting and sorting index keys, from pages for which the applying is complete, until all index keys have been extracted and sorted; g) concurrently with “f)”, writing recovered pages into the database; h) initiating a rebuild of database indexes using the extracted and sorted index keys; and i) when the database indexes have been rebuilt, writing them to storage without regard to whether “g)” completed.
US09558075B2	Synthetic full backup generation System and method for generating a synthetic full backup. A request to perform an incremental backup may be received at a target computer. The incremental backup may be performed on the target computer in response to the request. The target computer may maintain information identifying files that are encountered in the incremental backup. The information may be configured to be used to construct a synthetic full backup. A request to perform a synthetic full backup may be received. The information may be requested. The synthetic full backup may be constructed using the information from the target computer. A synthetic full backup index may be constructed for the synthetic full backup using records from old indexes for each file in the synthetic full backup. The synthetic full backup may be transferred to a backup image. The synthetic full backup index may be stored.
US09558068B1	Recovering from metadata inconsistencies in storage systems A method is used in recovering from metadata inconsistencies in storage systems. A metadata inconsistency is detected in a portion of a file system. The file system is managed by upper-layer component. The portion of the file system is recovered. Lower-layer component recovers the portion of the file system. The portion of the file system is validated. The upper-layer component validates the portion of the file system.
US09558067B2	Mapping storage of data in a dispersed storage network A method begins by a dispersed storage (DS) processing module receiving data for storage in a dispersed storage network (DSN) memory and ascertaining dispersed storage error encoding parameters for encoding the data. The method continues with the DS processing module ascertaining storage units of the DSN memory for the storing an encoded version of the data and ascertaining a storage mapping that maps encoded data slices to storage units for storing the encoded version of the data. The method continues with the DS processing module encoding the data in accordance with the dispersed storage error encoding parameters to produce sets of encoded data slices. The method continues with the DS processing module generating a plurality of write requests for storing, in accordance with the storage mapping, encoded data slices of the sets of encoded data slices in a pattern across the storage units.
US09558066B2	Exchanging ECC metadata between memory and host system Providing access to an external memory controller to internal error correction bits from a memory device for use as metadata bits by the memory controller. In a first mode the memory device applies internal error correction bits for internal error correction at the memory device. In a second mode the memory device provides access to the internal error correction bits to the memory controller to allow the memory controller to use the data.
US09558058B2	Technology for stall detection Detecting stalling of a software process in a computer system includes receiving identification of a work process thread group, including a work process thread, for a task. The task is marked as running responsive to detecting whether there is a state change for the work process thread and is marked as stalled responsive to detecting an absence of the state change for a first predefined amount of time. The work process is marked as stalled responsive to detecting an absence of a predetermined signal from the work process for a second predefined amount of time. An API gets stack traces for the work process thread via calls. Instances of a hash are calculated for each of the stack traces. Respective instances of the hash calculated at least the first amount of time apart are compared for detecting whether there is a state change for the work process thread.
US09558057B2	Network performance diagnostics system In one embodiment, a network device is configured to generate a control protocol packet containing a source address of the network device and a destination address. The network device is configured to translate the source address to a interface device address of a first communication interface device included in the network device. The control protocol packet can be transmitted over the network by a second communication interface device included in the network device for receipt by a device based on the destination address.
US09558054B2	Apparatus and method for detecting errors on a transmission path An apparatus detects an error from data transmitted on a transmission path, and measures a first value indicating the number of times the number of errors detected within a first time interval becomes equal to or greater than a first threshold. The apparatus reports that a failure has been detected on the transmission path of the data, when the first value measured within a second time interval longer than the first time interval becomes equal to or greater than a second threshold.
US09558051B1	Inter-process communication router within a virtualized environment Routing messages in a virtualized environment. A communication that was issued from an application executing on an operating system is intercepted. The communication is intended to be sent to an intended recipient that is executing on, or is a kernel of, the operating system. A determination is made, based upon a policy, whether to forward the communication to the intended recipient or to route the communication to a virtual machine executing upon the same physical device as the application. The policy allows a user to specify what types of information and device resources are available to each application.
US09558049B1	Shuffle optimization in map-reduce processing Shuffle optimization in map-reduce processing. The method includes: obtaining intermediate results from a plurality of mappers for an application on a computing device; combining the intermediate results from the plurality of mappers; and partitioning the combined intermediate results into intermediate results for respective reducers for the application based on respective keys of the combined intermediate results.
US09558044B2	Managing resources of a shared pool of configurable computing resources Disclosed aspects include managing resources of a shared pool of configurable computing resources having a particular shared pool resource. An application program is run for processing on the shared pool of configurable computing resources. A set of resource data for the application program is collected by the application program. An offer of the particular shared pool resource for use by the application program is detected by the application program. The set of resource data associated with the particular shared pool resource is analyzed by the application program. Based on the set of resource data and in response to analyzing the set of resource data associated with the particular shared pool resource, the application program determines to refuse the offer. In response to determining to refuse the offer, the application program selects to refuse the offer.
US09558042B2	System and method providing object messages in a compute environment The present invention provides a system, method and computer-readable media for creating object messages within a compute environment such as a cluster or grid. The method comprises upon an event affecting the availability or performance of an object within a cluster environment, retrieving messages related to the event from messages logs in different layers of a cluster environment. Next, the method comprises aggregating the retrieved messages into a single location, associating the aggregated messages with the object and, if a user submits a job and the performance of the job within the cluster environment is affected by the event, notifying the user of the event using the associated messages. Administrators may also create messages and associate the messages with objects such as nodes or reservations.
US09558036B1	Evolving parallel system to automatically improve the performance of multiple concurrent tasks on large datasets We describe a high-level computational framework especially well suited to parallel operations on large datasets. In a system in accordance with this framework, there is at least one, and generally several, instances of an architecture deployment as further described. We use the term “architecture deployment” herein to mean a cooperating group of processes together with the hardware on which the processes are executed. This is not to imply a one-to-one association of any process to particular hardware. To the contrary, as detailed below, an architecture deployment may dynamically spawn another deployment as appropriate, including provisioning needed hardware. The active architecture deployments together form a system that dynamically processes jobs requested by a user-customer, in accordance with customer's monetary budget and other criteria, in a robust and automatically scalable environment.
US09558034B2	Entitlement vector for managing resource allocation An embodiment or embodiments of an information handling apparatus can use an entitlement vector to simultaneously manage and activate entitlement of objects and processes to various resources independently from one another. An information handling apparatus can comprise an entitlement vector operable to specify resources used by at least one object of a plurality of object. The information handling apparatus can further comprise a scheduler operable to schedule a plurality of threads based at least partly on entitlement as specified by the entitlement vector.
US09558030B2	Method, apparatus, and system to handle transactions received after a configuration change request Methods, apparatuses, and systems for handling transactions received after a configuration request, the method, for example, comprising: receiving a configuration change request by a transaction-handling logic block; performing a configuration change by the transaction-handling logic block in response to the configuration change request, wherein the logic block is to handle transactions received prior to receipt of the configuration change request differently than transactions received after receipt of the configuration change request; receiving, by the transaction-handling logic block, a first transaction before receiving the configuration change request; receiving, by the transaction-handling logic block, a second transaction after receiving the configuration change request and before the configuration change is complete; differentiating the first transaction from the second transaction based on the order in which the first and second transactions were received relative to receipt of the configuration change request; and handling the first and second transactions.
US09558029B2	Logical processing for containers Some embodiments provide a method for a first managed forwarding element (MFE). The method receives a data message that includes a logical context tag that identifies a logical port of a particular logical forwarding element. Based on the logical context tag, the method adds a local tag to the data message. The local tag is associated with the particular logical forwarding element, which is one of several logical forwarding elements to which one or more containers operating on a container virtual machine (VM) belong. The container VM connects to the first MFE. The method delivers the data message to the container VM without any logical context. A second MFE operating on the container VM uses the local tag to forward the data message to a correct container of several containers operating on the container VM.
US09558028B2	Systems and methods for migration of virtual machines across virtual storage resources In accordance with these and other embodiments of the present disclosure, a system may include a processor and a program of executable instructions embodied in non-transitory computer-readable media accessible to the processor. The program of executable instructions may be configured to, when read and executed by the processor, monitor for a failure of a storage resource in a pool of storage resources configured as a plurality of optimally-redundant virtual storage resources, determine if a virtual storage resource comprising the storage resource is able to rebuild the virtual storage resource, and, in response to determining that the virtual storage resource comprising the storage resource is unable to rebuild the virtual storage resource, migrate each of one or more virtual machines mapped to the virtual storage resource to another virtual storage resource in an optimal redundancy state.
US09558027B2	Network control system for configuring middleboxes Some embodiments provide a method for configuring a logical middlebox in a hosting system that includes a set of nodes. The logical middlebox is part of a logical network that includes a set of logical forwarding elements that connect a set of end machines. The method receives a set of configuration data for the logical middlebox. The method uses a stored set of tables describing physical locations of the end machines to identify a set of nodes at which to implement the logical middlebox. The method provides the logical middlebox configuration for distribution to the identified nodes.
US09558025B2	Inter-board virtualization management for managing hardware resources corresponding to interrupts A virtualization management method and related apparatuses for managing hardware resources of a communication device are disclosed. The method includes: acquiring a first virtual machine context that is issued by a first service board deployed in a communication device and that corresponds to a first interrupt, and issuing the first virtual machine context, or a second virtual machine context that is obtained based on the first virtual machine context and that corresponds to the first interrupt, so that a second service board deployed in the communication device, after acquiring the issued first virtual machine context or second virtual machine context, transfers the acquired first virtual machine context or second virtual machine context to a first virtual machine running on the intra-board Hypervisor in the second service board for processing, where the first virtual machine is the employer of the first hardware resource.
US09558022B2	Automatic virtual machine termination in a cloud Managing a cloud computing environment including a plurality of resources adapted to host at least one virtual machine includes, in a virtual machine, determining a period of inactivity of the operating system for a user of the virtual machine and comparing, using a processor, the period with a defined threshold. From the virtual machine, a virtual machine termination request is sent to the cloud computing environment responsive to the period exceeding the defined threshold.
US09558018B2	Methods and apparatus for simulating a distributed business process Methods and apparatus for simulating a distributed business process are disclosed. The methods and apparatus simulate an interdependent business process, such as a financial transaction system, in a secure distributed manner. Each business entity that is part of the interdependent business process models itself on a local client device at any chosen level of detail. A simulation server connects the separate client based simulations into one large simulation. Details of each local simulation may be hidden from other simulation participants. However, interruptions in business flow caused by simulated disruptions introduced at the simulation server and/or a client device are propagated to all of the effected simulation participants via the simulation server. In addition, if a client based model is not available, the server supplies a software agent to replace the inputs and outputs normally associated with that portion of the overall simulation.
US09558016B2	Platform system, method for changing support hardware configuration of universal extensible firmware interface basic input output system and computer program product A method for changing a support hardware configuration of a universal extensible firmware interface basic input output system (UEFI BIOS) is provided, and the change method is performed by a platform system. The method includes the following steps: in a boot stage, copying binary data of a setup menu in the UEFI BIOS to a memory or a storage medium, where a program of the setup menu to be displayed on a user interface is written in a visual forms representation (VFR) format, and a compiler compiles the program of the setup menu into the binary data of the setup menu in an internal forms representation (IFR) format; and writing a piece of address data to the UEFI BIOS, where the address data is used to query a location at which the binary data of the setup menu stored in the memory or the storage medium is located.
US09558015B2	Methods and apparatus for activating applications A computer-implemented method of application control includes receiving a list of applications available on a wireless device in communication with a vehicle computing system (VCS). The method also includes storing a list of applications, including triggers associated with one or more of the applications, in a local memory. The method further includes monitoring, via the VCS, one or more vehicle sensors or other input mechanisms for a state which corresponds to a trigger. This method also includes comparing, via the VCS, the trigger to the triggers associated with one or more of the applications upon detection of a state which corresponds to a trigger. Finally, the method includes recommending at least one application having an associated trigger that is the same as the trigger to which the state corresponds for activation, via the VCS.
US09558014B2	System, method and apparatus for transparently enabling software applications with adaptive user interfaces A method includes receiving, by a library instrumented into an application executable by a computing device, a message indicating modification(s) that should be performed to user interface component(s) able to be rendered by the application on a display of the computing device. The user interface component(s) are modified to create modified user interface component(s). The modified user interface component(s) are caused to be rendered on the display. Another method includes accessing a description of user interface component(s) for an application executable on a computing device, wherein the user interface component(s) are able to be rendered by the application on a display of the computing device. A developer is allowed to modify information concerning the user interface component(s). Message(s) are formed to allow modification(s) and corresponding user interface component(s) to be determined and the message(s) are sent to computing device(s) having the application. Apparatus, software, and computer program products are disclosed.
US09558013B2	Responsive scroller controls in server-hosted applications Environments are disclosed in which a server executes an application on behalf of a client device and, in particular, to providing responsive scrolling in server-hosted applications. In one example, a remote computing device may be a mobile (or stationary) computing device with (or without) a touch screen input surface. Some or all of the client-server communication between a client-side scrollable UI control module of the remote computing device and a server-side scrollable UI control module of the server device may occur in an asynchronous manner.
US09558011B2	Fast hot boot of a computer system Methods, apparatus and computer program products implement embodiments of the present invention that enable a computer that is executing a first operating system kernel to load a second operating system kernel and one or more software components to a region in a memory. Using functions incorporated in the kernel, the region in the memory is tagged, and the computer initiates a boot of a second operating system kernel while preserving in the tagged region contents stored therein. Following the boot of the second operating system kernel, the computer executes the one or more software components from the tagged region that was preserved during the boot.
US09558008B2	Systems, methods, and apparatus for controlling the power-on or boot sequence of an integrated circuit based on power harvesting conditions In some embodiments, an apparatus includes an integrated circuit such as a system on chip that operates in part from harvested power and that uses information about power harvesting conditions to alter a power-on sequence or boot sequence based on that information. In some embodiments, a method uses information about power harvesting and energy harvesting conditions to alter a power-on sequence or boot sequence.
US09558007B2	Out-of band configuration of BIOS setting data In certain aspects, a system for out-of-band configuring BIOS setting data (BIOSSD) includes a host computer and a service processor (SP). The SP stores a BIOSSD collection and a human interface data (HID) collection. The HID collection includes questions for data of the BIOSSD collection and corresponding options for each question. When a remote management computer sends to the SP an information request, the SP retrieves the HID collection and transmits the questions and the corresponding options to the remote management computer. In response to a command indicating a selected corresponding option, the SP changes corresponding data of the BIOSSD collection according to the command. When the BIOS executed at the host computer issues a BIOSSD update request to the SP, the SP transmits a copy of the BIOSSD collection to the BIOS chip of the host computer to replace the BIOSSD collection stored in the BIOS chip.
US09558005B2	Reliable and deterministic live migration of virtual machines Technologies for live virtual machine migration include a plurality of compute nodes and a datacenter manager. The datacenter manager issues a request to migrate a virtual machine to a source compute node. The request includes a service level requirement such as a maximum migration time or downtime. The source compute node determines platform resources required to perform migration within the service level requirement and reserves the platform resources for a predicted migration time. The source compute node transfers virtual machine state to a destination compute node and releases the platform resources after the transfer is complete. The source compute node may use a hardware resource monitor or reservation manager to determine available platform resources and reserve the platform resources for exclusive use. If sufficient platform resources are not available, the source compute node may negotiate reduced service level requirements with the datacenter manager. Other embodiments are described and claimed.
US09558002B2	Variable length execution pipeline In an aspect, a pipelined execution resource can produce an intermediate result for use in an iterative approximation algorithm in an odd number of clock cycles. The pipelined execution resource executes SIMD requests by staggering commencement of execution of the requests from a SIMD instruction. When executing one or more operations for a SIMD iterative approximation algorithm, and an operation for another SIMD iterative approximation algorithm is ready to begin execution, control logic causes intermediate results completed by the pipelined execution resource to pass through a wait state, before being used in a subsequent computation. This wait state presents two open scheduling cycles in which both parts of the next SIMD instruction can begin execution. Although the wait state increases latency to complete an in-progress algorithm, a total throughput of execution on the pipeline increases.
US09558000B2	Multithreading using an ordered list of hardware contexts A processing device identifies a set of software threads having instructions waiting to issue. For each software thread in the set of the software threads, the processing device binds the software thread to an available hardware context in a set of hardware contexts and stores an identifier of the available hardware context bound to the software thread to a next available entry in an ordered list. The processing device reads an identifier stored in an entry of the ordered list. Responsive to an instruction associated with the identifier having no dependencies with any other instructions among the instructions waiting to issue, the processing device issues the instruction waiting to issue to the hardware context associated with the identifier.
US09557994B2	Data processing apparatus and method for performing N-way interleaving and de-interleaving operations where N is an odd plural number A data processing apparatus and method are provided for performing rearrangement operations. The data processing apparatus has a register data store with a plurality of registers, each register storing a plurality of data elements. Processing circuitry is responsive to control signals to perform processing operations on the data elements. An instruction decoder is responsive to at least one but no more than N rearrangement instructions, where N is an odd plural number, to generate control signals to control the processing circuitry to perform a rearrangement process at least equivalent to: obtaining as source data elements the data elements stored in N registers of said register data store as identified by the at least one re-arrangement instruction; performing a rearrangement operation to rearrange the source data elements between a regular N-way interleaved order and a de-interleaved order in order to produce a sequence of result data elements; and outputting the sequence of result data elements for storing in the register data store. This provides a particularly efficient technique for performing N-way interleave and de-interleave operations, where N is an odd number, resulting in high performance, low energy consumption, and reduced register use when compared with known prior art techniques.
US09557985B2	Method and apparatus for maintaining user settings for over-the-air upgrades A method and apparatus for performing a software upgrade are disclosed. The method determines a plurality of mobile endpoint devices affected by a wireless network access software upgrade, and schedules a deployment of the wireless network access software upgrade. The method transmits a notification to the plurality of mobile endpoint devices, wherein the notification is configured to cause each of the plurality of mobile endpoint devices to store user settings in a memory of each of the plurality of mobile endpoint devices. The method downloads the wireless network access software upgrade wirelessly to the plurality of mobile endpoint devices, wherein the wireless network access software upgrade is configured to cause each of the plurality of mobile endpoint devices to install the wireless network access software upgrade and to restore the user settings from the memory of each of the plurality of mobile endpoint devices.

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