Document Document Title
US08594013B2 System, method and apparatus for implementing multimedia call continuity
A system, method, and apparatus for implementing multimedia call continuity solve the problem that when a domain transfer happens, part of a media flow in a multimedia session cannot be transfer between bearers of different access modes. Besides a remote UE, the system further includes a multi-mode terminal MTF UE that supports media flow transfer between multiple modes and carries media flow transfer context information in an initiated media stream transfer request, and a media transfer function (MTF) that acts as an agent to initiate and perform a media renegotiation with the remote UE, according to the media flow transfer context information carried in the request. After the media renegotiation, the MTF UE or the MTF is adapted to release the media flow that needs to be transferred before the media renegotiation. Therefore, when a domain transfer happens, the media stream can be transferred between the bearers of different access modes that the MTF UE supports.
US08594012B2 Uplink power control method and user equipment supporting both common and separate TPC commands
A transmit power control (TPC) method and a user equipment (UE) of a telecommunications network utilizing the TPC method. The UE receives TPC commands intended for traffic and control channels. The TPC commands are separately identified by logical or physical resources associated with the channels. When the traffic and control channel TPCs occupy the same resources, the UE applies common power control commands to the traffic and control channels. When the traffic and control channel TPCs occupy different resources, the UE applies separate power control commands to the traffic and control channels.
US08594010B2 Apparatus and method for physical control format indicator channel (PCFICH) information sharing over relay backhaul link
An apparatus and method for communicating information in a relay downlink backhaul between a base station and at least one relay node comprising: determining a first starting symbol index of at least one control channel in the relay downlink backhaul; determining a second starting symbol index of at least one data channel in the relay downlink backhaul; and communicating information using the at least one control channel based on the first starting symbol index and the at least one data channel based on the second starting symbol index in the relay downlink backhaul. In one example, the apparatus and method comprise receiving information using a control channel based on a first starting symbol index and a data channel based on a second starting symbol index in the relay downlink backhaul.
US08594008B2 Relay communications methods and apparatus
Methods and apparatus relating to interference mitigation in a wireless communications system including multi-sector base stations and relay stations are described. Different types of transmission slots are used, e.g., base station-relay station slots, relay station-access terminal slots, and base station-access terminal slots. Relay station to access terminal slots of a first schedule are non-overlapping with relay station to access terminal slots of a second schedule. A deployment pattern associates each particular base station sector and its associated relay station with one particular schedule. At least some different sectors of the same base station intentionally use different schedules. An access terminal determines and uses the schedule corresponding to the base station sector or relay station from which it intends to receive downlink signals. By utilizing multiple slot type allocation schedules and a particular schedule deployment pattern in the system, interference experienced by access terminals in boundary regions can be mitigated.
US08594006B2 Setting up a multicast group communication session within a wireless communications system
In an embodiment, a multicast communication session is setup at an access network within a wireless communications system, whereby the access network transmits an announce message announcing a current multicast communication session to a given group of access terminals within an initial cluster of sectors. The access network receives a registration request for the current multicast communication session from an access terminal, and selectively loads a stored cluster of sectors that supported a previous multicast communication session to the given group. The access network then turns on a multicast flow for the current multicast communication session within each sector of the stored cluster. In another embodiment, a multicast communication session is terminated whereby the access network stories a formation of the engaged cluster at or near the termination of the current multicast communication session, which can then be used during setup of a subsequent multicast communication session.
US08594005B2 Method and apparatus for discontinuous transmission-reception operation for reducing power consumption in cellular system
Provided is a method and apparatus for discontinuously transmitting/receiving packets for low-power consumption of a terminal in a cellular system for packet transmission. The present research provides a method and apparatus that can perform a low-power consuming operation when a terminal is in active state in a cellular system. The method for discontinuously transmitting/receiving packet data to reduce power consumption of a terminal in a cellular system, including a) establishing discontinuous reception/transmission (DRX/DTX) parameters including discontinuous DRX/DTX cycle information for terminals operating in a transmission suspension mode, which is a sub-state of an active state; and b) performing DRX/DTX based on the DRX/DTX parameters in the terminals operating in the transmission suspension mode.
US08594003B2 Method of estimating location of mobile device in transportation using WiFi
A method for estimating a location of a mobile device located in means of transportation is provided. The method includes: developing a first database by linking ID information of the means of transportation with ID information of an access point (AP) installed in the means of transportation, the AP being a mobile AP allowing access to a wireless WAN through WiFi; developing a second database by linking ID information of the means of transportation with service information of the means of transportation, the service information including route and timetable information; acquiring WiFi reception information generated by the mobile device equipped with a WiFi module, the WiFi reception information including ID information of an AP transmitting a WiFi signal; extracting the ID information of the means of transportation in which the mobile device is located using the acquired WiFi reception information and the first database; and estimating a location of the mobile device using the extracted ID information of the means of transportation and the second database.
US08594001B2 Packet communication system and its communication method, base station, and mobile station
A packet communication system for packet communication between a base station and plural mobile stations is provided. The system includes: a base station including a reception quality obtaining unit which obtains reception quality of uplink signals or reception quality of downlink signals, location information obtaining unit which obtains location information of a mobile station, a location information data base in which certainty is registered as weighting coefficient, where the certainty of reception quality is obtained from combination of the prescribed location within moving range of a mobile station and propagation environment for the location, and a mobile station selection unit which selects a mobile station intended to transmit or receive signals based on a result of multiplying reception quality obtained by reception quality obtaining unit, by weighting coefficient corresponding to location information of a mobile station which is obtained from the location information data base.
US08593999B2 Bandwidth management and codec negotiation based on WAN topology
A system for bandwidth management and codec negotiation, according to one embodiment of the present invention comprises: a configuration storage module having supported codecs storage, codec lists and preferred site settings storage, and a call manager having an extension module, a trunk module, a location service engine, a codec manager, a bandwidth manager, and a media manager. The codec manager and the bandwidth manager used for negotiating a codec for a call between two endpoints. The present invention also includes a number of methods including a method for negotiating a codec for a call, a method for managing bandwidth for a call, a method for adding a description of a new codec supported by an endpoint, a method for adding an identifier of a supported codec to a codec list and a method for editing code site codec settings.
US08593996B2 Method and an apparatus for session routing in home network system
Relating to a home network system, methods for configuring sessions in a home network system and setting up optimized paths of the configured sessions and apparatuses for supporting the same. According to an embodiment, the method for computing a routing path includes the steps of transmitting a Link Status Request message data requesting Link information from a first device to a second device, receiving a Link Notify message including Link information on the second device from the second device, updating a Link Status table based upon the Link information on the second device, computing Routing Path information from a source device to a sink device based upon the Link Status table, and computing information on a transmission port being used in the routing path based upon the Routing Path information.
US08593993B2 Method and apparatus for self-learning of call routing information
The present invention is directed to a method and apparatus for learning call routing information in a communication system. A switching architecture is presented. The switch may be implemented in a centralized architecture or a distributed architecture. In addition, the switch may be implemented in a variety of networks such as a circuit-switched network or a packet-switched network. The switch includes a policy server and a self-learning application server. The policy server includes routing information for routing calls across the switch. The routes for incoming and outgoing calls are analyzed as they pass through the switch. The self-learning application server uses artificial intelligence techniques and caching algorithms to learn new more-efficient routing paths or initial routing paths based on the incoming and outgoing calls. The self-learning application server then updates the policy server with the new learned routes.
US08593987B2 System and method for providing network route redundancy across layer 2 devices
Systems and methods are described for providing network route redundancy through Layer 2 devices, such as a loop free Layer 2 network having a plurality of switching devices. A virtual switch is coupled to the loop free Layer 2 network, the virtual switch having two or more switches configured to transition between master and backup modes to provide redundant support for the loop free Layer 2 network, the switches communicating their status through use of a plurality of redundancy control packets. The system also includes means for allowing the redundancy control packets to be flooded through the Layer 2 network. The means may include time-to-live data attached to the redundancy control packet which is decremented only when the packets are transferred through devices which are configured to recognize the protocol used in redundancy control packets.
US08593986B2 Lightweight storing mode for constrained computer networks
In one embodiment, a management device, such as a root node, monitors Internet Protocol (IP) overhead (e.g., IP header sizes during source-routing or route table sizes) within a directed acyclic graph (DAG) in a computer network. If it is determined that the IP overhead is above a configured threshold, then in response, a trigger is initiated to have devices within the DAG label-switch downward traffic directed away from the root node within the DAG. In another embodiment, a device communicating within a DAG stores IP routes corresponding to upward traffic from the device directed toward a root of the DAG, and IP-routes upward traffic based on the IP routes. Conversely, the device also stores labels corresponding to downward traffic from the device directed away from the root of the DAG, and label-switches downward traffic based on the labels, accordingly.
US08593983B2 Method and apparatus for use of silent symbols in a communications network
A method for characterizing a communication channel on a communication network includes receiving within a network node at least one silent symbol transmitted together with a packet, and determining within the network node the amount of energy received by the network node during the silent symbol. Determining the amount of energy may include comparing the amount of energy received during a first silent symbol with the amount of energy received during subsequent silent symbols. The packet transmitted with the silent symbol may include a preamble and the silent symbol may be transmitted before the preamble. The packet may include data symbols and the silent symbol may be transmitted for a duration that is shorter than the duration of one data symbol transmitted in the packet.
US08593982B1 Method and system for optimizing a performance indicator log mask
A method and system to generate a communication system performance indicator log mask is disclosed. The method includes receiving, by a processing unit, a request for a performance indicator log mask associated with a performance indicator of a communication system, retrieving, by the processing unit, a plurality of log mask values associated with the performance indicator from a storage unit, and combining, by the processing unit, the plurality of log mask values to generate the performance indicator log mask.
US08593981B2 Apparatus and method for receiving packet data on a subset of carrier frequencies in a wireless communication system
A remote station for a wireless communication system including a base station is disclosed. The remote station includes a front end structure configured to receive packet data in parallel on a subset of carrier frequencies. Each packet data is preceded by a header field for identifying the remote station as the recipient of the packet data and the subset of carrier frequencies is based on a set of a corresponding number of multiple carrier frequencies.
US08593977B2 Method and apparatus for transmitting data and method and apparatus for performing data tasks
A method and apparatus for transmitting data and a method and apparatus for performing a task for process migration are provided. The method of transmitting data includes: determining a data transmission priority using at least one of information relating to data needed to continuously perform a task, that is currently performing, in an external device and information relating to data transmission means; determining transmission methods for each data based on the data transmission priority; and transmitting data to the external device according to the determined transmission methods.
US08593971B1 ATM network response diagnostic snapshot
Methods and apparatus according to the invention are directed towards providing apparatus for targeting network problems. Such apparatus may include a database configured to store a workload. The apparatus may also include a transmitter configured to transmit the workload to a CPU included in an ATM via a telecommunications network. The workload may include instructions to (1) execute a script, (2) record an output generated from the execution of the script, and (3) transmit the recorded output via the telecommunications network to a receiver. The apparatus may further include the receiver being configured to receive the transmitted recorded output via the telecommunications network.
US08593970B2 Methods and apparatus for defining a flow control signal related to a transmit queue
In one embodiment, a processor-readable medium can store code representing instructions that when executed by a processor cause the processor to receive a value representing a congestion level of a receive queue and a value representing a state of a transmit queue. At least a portion of the transmit queue can be defined by a plurality of packets addressed to the receive queue. A rate value for the transmit queue can be defined based on the value representing the congestion level of the receive queue and the value representing the state of the transmit queue. The processor-readable medium can store code representing instructions that when executed by the processor cause the processor to define a suspension time value for the transmit queue based on the value representing the congestion level of the receive queue and the value representing the state of the transmit queue.
US08593966B2 Method for dropping lower priority packets that are slated for wireless transmission
A method for dropping lower priority packets for transmission over a wireless communication medium is provided. A central device receives one or more packets to be transferred to one or more data providers, each packet having a priority. Then, based on the priority, a media access controller stores each of the packets in one or more priority queues in a fixed shared memory space in such a way as to maintain the order in which the packets were received in each of the priority queues. The media access controller monitors the number of packets in each of the priority queues and signals an interrupt when a packet threshold is exceeded in one or more of the priority queues. The media access controller then drops lower priority packets in the fixed shared memory space based on the order received to guarantee that there is enough memory to store higher priority packets in the fixed shared memory space.
US08593964B1 Method and system for traffic management
One embodiment of the present invention provides a system that facilitates traffic management in a network. During operation, the system detects a bottleneck in a network based on network-state information received from one or more switches. The system further identifies a data flow that contributes to the bottleneck and generates a signal to reduce the data flow from the data flow's source device.
US08593954B2 Method and apparatus for controlling congestion of wireless multi-hop network
A method and an apparatus for controlling congestion of a wireless multi-hop network are disclosed herein. Through this method and apparatus, data packets are transmitted from a fixed host to a mobile base station and from the mobile base station to a mobile host via a wireless path. A local retransmission by the mobile base station is performed according to the wireless path state information after packet(s) is not correctly received by the mobile host, and the retransmission is notified to the fixed host, thus avoiding futile retransmission of the lost packet by the fixed host. The state of the wireless path is marked as available or unavailable or congested or error according to the path information. If the state of the wireless path is not marked as unavailable, the local retransmission is performed at a high priority in response to a first Dup Ack packet received from the mobile host.
US08593949B2 Method for managing an interconnection between telecommunication networks and device implementing this method
This invention concerns a method of managing a telecommunication network (232), referred to as the provider network (232), used to transmit data between at least two telecommunication client networks (204, 222) in order to create a virtual private network (200) between the client networks (204, 222), each of these client networks (204, 222) using an internal communication protocol, referred to as the internal client protocol, and each of the client networks (204, 222) having at least one client interconnection device (206, 220, 221) communicating with at least one provider interconnection device (208, 215) of the provider network (232).According to this invention, the provider network (232) uses a communication protocol, referred to as the provider protocol, comprising extensions for the storage of information relating to the points of passage of the data in the client networks (204, 222).
US08593948B1 Network device and method of controlling network device
A first network device 71 and a second network device 72 transmits a test frame and its response frame therebetween. The first network device 71 acquires a test frame transmission start time, a response frame reception completion time, a test frame reception completion time, and a response frame transmission start time, and calculates, based on the times thus acquired, a PAUSE frame action delayed period that indicates a time period required for a PAUSE frame transmitted from the first network device 71 to actually act on the second network device 72, and sends from the first network device 71 to the second network device 72 a PAUSE frame in which a time period calculated based on the PAUSE frame action delayed period is set as a PAUSE period in order to prevent shortage of a receive buffer 244 in the first network device 71 from causing a loss of frames transmitted from the second network device 72.
US08593947B2 Congestion detection method, congestion detection apparatus, and recording medium storing congestion detection program recorded thereon
According to an aspect of the embodiments, a congestion detection method causes a computer to function as a congestion detection apparatus connectable to a network. Packets on the network are obtained and a packet loss is detected. A packet group made up of a series of packets based on the obtained packets is extracted. A packet loss in the packet group is detected and a position in the packet group where the packet loss occurred is detected. Whether congestion is occurring is judged based on the position of the packet loss in the packet group.
US08593945B2 Connectivity fault management traffic indication extension
A method for detecting a mismatch between a first port and a second port includes determining whether a destination address associated with the second port and a virtual local access network identifier (VID) for a service instance monitored by a first maintenance end point are included in a table of the first port. The method further includes setting a traffic field in a first continuity check message. The method additionally includes receiving, at the first maintenance end point, a second continuity check message that includes a traffic field. The method also includes detecting a mismatch when the value of the traffic field in the second continuity check message does not match the value of the traffic field in the first continuity check message.
US08593943B2 N—port ID virtualization node redundancy
In one embodiment, a method includes establishing a link between two N_Port Identifier Virtualization (NPIV) switches, the link having a high cost assigned thereto. The NPIV switches are in communication with a plurality of hosts through an N_Port Virtualization (NPV) device. The method further includes receiving at a first of the NPIV switches, an indication of a failure at a second of the NPIV switches, receiving data at the first NPIV switch, the data destined for one of the hosts associated with a domain of the second NPIV switch, and forwarding the data to the NPV device for delivery to the host, wherein a Fibre Channel Identifier (FCID) of the host is the same before and after the failure at the second NPIV switch. An apparatus is also disclosed.
US08593941B2 Method for implementing permanent ring network protection in an MESH network
A method for implementing permanent ring network protection in an MESH network, the method includes the following steps: a node in a ring network protection group informing, when detecting a certain span fails, other nodes in the ring network protection group of the failure information (11); each node in the ring network protection group switching a service that is affected by the failure to a protection path thereof for transmission (12); searching for a substitute path for the failed span in idle resources of the MESH network (13); establishing a new ring network protection group by using the substitute path and sections that are not affected by the failure in the ring network protection group (14); and switching the service that is affected by the failure from being transmitted via the protection path to being transmitted via the substitute path (15). The present invention is capable of providing the permanent ring network protection function for all the services on the ring network.
US08593940B2 Method for numbering working services on channel protection ring
A method for numbering working services on a channel protection ring. The process of numbering working services includes: after detecting that the node has an added or dropped working service in the downstream segment in the specified direction, the node on the ring sends a notification message which includes the identifier corresponding to the node to the downstream node in the specified direction; after receiving the notification message and detecting that the node has an added or dropped working service in the downstream segment in the reverse direction of the specified direction, the node on the ring assigns a serial number to the working service according to the identifier in the notification message. The present invention enables automatic numbering of services and dynamic adjustment of the service numbers on the ODUk protection ring, and fulfills the requirements of ODUk protection switching.
US08593936B2 Carrier aggregation in wireless communication systems
Provided is a data transmission system using a carrier aggregation. The data transmission system may assign a radio resource based on a correspondence relationship between a downlink and an uplink, and may transmit data using the assigned radio resource.
US08593934B2 Communication device and method for packet-based OFDM communications with differing length cyclic prefixes
A network communication device is receive packet-based orthogonal frequency division multiplexed (OFDM) transmissions from one or more other devices in a network over a communication channel. The network communication device may determine a delay spread of the communication channel based on receipt of a probe signal from a transmitting device, configure a channel filter to effectively shorten the channel based on the delay spread, and instruct the transmitting device to shorten a length of a cyclic prefix for subsequent packet-based OFDM transmissions to be received from the transmitting device over the channel.
US08593933B2 Modified spatial diversity schemes for coverage enhancement
In one aspect, a method to enhance coverage in a heterogeneous wireless network wireless communication is disclosed. The method includes generating a reference signal indicating a plurality of transmit antenna ports and generating modulation symbols. Modulation symbols are assigned to each of the plurality of transmit antenna ports, in accordance with a spatial diversity coding scheme for the plurality of transmit antenna ports. At least one of the modulation symbols assigned to at least one of the plurality of transmit antenna ports is muted prior to transmission in accordance with the spatial diversity coding scheme. The non-muted modulation symbols and the reference signal are transmitted on the other of the plurality of transmit antenna ports.
US08593932B2 Efficient signal transmission methods and apparatus using a shared transmission resource
A device includes a zero symbol rate (ZSR) coding/modulation module and a second type coding/modulation module. Both modules generate modulation symbols to be conveyed using the same air link resources but with the non-zero ZSR symbols having a higher power level. The ZSR module generates a mixture of zero and non-zero modulation symbols. A ZSR modulation scheme communicates information using both the position of the non-zero modulation symbols and the phase and/or amplitude of the non-zero modulation symbols. Different ZSR schemes, implementing different ratios relating the number of zero symbols to the total number of symbols, can be associated with different low data rates while second module modulation schemes can be associated with different high data rates. Modulation symbols from two modules are in some embodiments, superimposed. In some embodiments, non-zero ZSR modulation symbols punch out second module modulation symbols which occupy the same air link resource.
US08593928B2 Optical head and optical drive device
The present invention provides a unit and method for implementing an optical head and optical drive device whose configuration is simple, and which allows the generation of a track error signal in which no offset is caused to occur. The optical drive device includes a light source for emitting light beams, an objective lens for converging the light beams onto an optical disc, an optical-signal generation element for dividing the light beams into at least four regions by using a division line extending in the radial direction of the optical disc, and a division line extending in the track direction of the optical disc, the light beams being reflected by the optical disc, and an optical detector for receiving the light beams divided by the optical-signal generation element, wherein the up and down or right and left areas of the four regions are made different from each other.
US08593925B2 Intelligent digital audiovisual reproduction system
Payment-based audiovisual playback system characterized by comprising a microprocessor unit, primarily including storage means for storing inter alia in digital form the visual and sound information to be used, and associated, through a number of interfaces, with display means for sound playback which provide a multimedia environment. The unit is controlled by a multitask operating system including a library of integrated tools and services in the storage means. The system is also associated, through an interface, with a telecommunications modem and is connectable to an audiovisual information distribution network by a telecommunications modem and telecommunications links, the telecommunications functions also being managed by the multitask operating system.
US08593918B1 Maintaining tape emulation consistency
Maintaining tape emulation consistency includes writing additional tape data to a first local storage device at a local site, writing tape emulation data to a second local storage device at the local site, where the second local storage device is different from the first local storage device, and maintaining consistency of the first and second local storage devices in connection with transferring data to a remote site. Maintaining consistency of the first and second local storage devices may include initiating a cycle switch that causes a concurrent cycle change from a first cycle to a second cycle for the first and second local storage devices. Additional tape data and tape emulation data written before a first time is associated with a first cycle. Additional tape data and tape emulation data written after the first time and before a second time is associated with a second cycle.
US08593916B2 Thermally-assisted magnetic recording head having heat conducting unit and heat absorbing unit and magnetic recording and reproducing device having the same
According to one embodiment, there is provided a magnetic recording head which records information on a magnetic recording medium, including an ABS surface, a near-field light generating unit, a heat conducting unit, and a heat absorbing unit. The ABS surface is opposed to the magnetic recording medium. The near-field light generating unit is disposed on the ABS surface. The heat conducting unit is formed by a heat conductor disposed in contact with the near-field light generating unit. The heat absorbing unit is disposed in contact with the heat conducting unit adjacently to the near-field light generating unit in a direction along the ABS surface.
US08593907B2 Technique and system to cancel noise from measurements obtained from a multi-component streamer
A technique includes receiving a pressure measurement and a particle motion measurement from at least towed seismic sensor. The pressure measurement contains signal and noise. The technique includes estimating the signal in the pressure measurement and based at least on the estimated signal in the pressure measurement, estimating a noise in the pressure measurement. Noise in the particle motion measurement is predicted based on at least the estimated noise in the pressure measurement, and the particle motion measurement is processed to remove noise based on at least the predicted noise.
US08593906B2 Seismic sensor holder and method
An apparatus includes a streamer having one or more sensor holders for retaining seismic sensors therein. The sensor holders have a reduced cross-sectional area to increase gel continuity and coupling through the streamer.
US08593903B2 Calibrating a multibeam sonar apparatus
A method of obtaining an acoustic echo signal by a sonar apparatus (receiver array 100, 101). The method comprises measuring phases and magnitudes of at least one predetermined acoustic calibration signal received from a plurality of respective directions 109 by the sonar apparatus; determining a complex directional response from the measured phases and magnitudes; receiving an acoustic echo signal; compensating the received acoustic echo signal for the determined complex directional response.
US08593902B2 Controller and access method for DDR PSRAM and operating method thereof
A controller for a DDR PSRAM is provided. The controller includes a single rate processing unit, a double rate processing unit and a selector. The signal rate processing unit obtains a single data rate data according to a first data and a first clock. The double rate processing unit obtains a double data rate data according to a second data and a second clock that is two times the frequency of the first clock. The selector selectively provides any of the single data rate data and the double data rate data to the DDR PSRAM via a common bus according to a control signal.
US08593899B2 Semiconductor device, information processing system including same, and controller for controlling semiconductor device
To improve the access efficiency of a semiconductor memory that includes a plurality of memory chips. Based on a layer address, a bank address, and a row address received in synchronization with a row command, and a layer address, a bank address, and a column address received in synchronization with a column command, a memory cell selected by the row address and column address in a bank selected by the bank address included in a core chip selected by the chip address is accessed. This can increase the number of banks recognizable to a controller, thereby improving the memory access efficiency of the semiconductor device which includes the plurality of memory chips.
US08593898B2 Electronic device and memory device of current compensation
An electronic device includes a functional unit and a current compensation unit. The functional unit operates based on a power supplied by an external host through power supply lines and generates a control signal based on an amount of power consumption of the functional unit. The current compensation unit compensates a change in a power supply current based on the control signal, where the power supply current is a current flowing through the power supply lines.
US08593891B2 Semiconductor device and test method thereof
A semiconductor device includes a plurality of core chips to which chip identification information different from each other is allocated and an interface chip are layered, the plurality of core chips are commonly connected to the interface chip through a first current path including at least a through silicon via, the interface chip serially supplies an enable signal to the plurality of core chips through the first current path, and the plurality of core chips are activated based on a logic level of a bit corresponding to the chip identification information among a plurality of bits configuring the enable signal. The present invention can reduce the number of through silicon vias required to supply an enable signal.
US08593889B2 Asynchronous/synchronous interface
The present disclosure includes methods, and circuits, for operating a memory device. One method embodiment for operating a memory device includes controlling data transfer through a memory interface in an asynchronous mode by writing data to the memory device at least partially in response to a write enable signal on a first interface contact, and reading data from the memory device at least partially in response to a read enable signal on a second interface contact. The method further includes controlling data transfer in a synchronous mode by transferring data at least partially in response to a clock signal on the first interface contact, and providing a bidirectional data strobe signal on an interface contact not utilized in the asynchronous mode.
US08593888B2 Semiconductor memory device
In a semiconductor memory device, the output of a regulator is coupled to the inputs of first and second switches, the output of the first switch is coupled to a path for supplying the drain voltage of a memory cell in the first mode, and the output of the second switch is coupled to a path for supplying the gate voltage of the memory cell in the second mode. A fourth switch is placed in parallel with the second switch: the output of the fourth switch is coupled to the output of the second switch, to supply the gate voltage of the memory cell in the first mode. Thus, one regulator is used as both the regulator for the drain voltage of the memory cell and the regulator for the gate voltage of the memory cell.
US08593887B2 Semiconductor device having reference voltage generating unit
To prevent the influence of variations in reference voltage until a power source is activated in a semiconductor device including a reference voltage generating circuit that can be adjusted by trimming data.In a semiconductor device, a reference voltage generating unit generates a first reference voltage adjusted in accordance with trimming data and a second reference voltage that does not depend on the trimming data based on an external power source voltage. A nonvolatile memory operates in accordance with a voltage based on the first reference voltage and stores the trimming data. A power-on reset circuit switches logic levels of a reset signal when the external power source voltage reaches a constant multiple of the second reference voltage at the time of activation of power source. A control circuit causes the reference voltage generating unit to read the trimming data stored in the nonvolatile memory in response to the switching of the logic levels of the reset signal.
US08593885B2 Staggered mode transitions in a segmented interface
A memory integrated circuit comprises first and second memory arrays and first and second interfaces. The first interface receives a signal for accessing a memory location in one of the first and the second memory arrays during a first time interval. The second interface receives a signal for accessing a memory location in one of the first and the second memory arrays during the first time interval. The first interface receives signals for accessing memory locations in the first and the second memory arrays, and the second interface is disabled from accessing the first and the second memory arrays during the second time interval. A signaling rate of a signal received by the second interface, a supply voltage of the second interface, an on-chip termination impedance of the second interface, or a voltage amplitude of a signal received by the second interface is adjusted during the second time interval.
US08593879B2 Nonvolatile semiconductor memory device
A nonvolatile semiconductor memory device according to an embodiment includes a control circuit controlling a read operation of applying a read voltage to a selected memory cell to read data, and a write verify operation of applying a verify voltage to the selected memory cell. In a first case, the control circuit sets a voltage to a first write verify voltage and a first read voltage. In a second case in which the memory cells deteriorate more than in the first case, the control circuit sets a voltage to a second write verify voltage and a second read voltage. The control circuit sets a difference between a maximum value of the first write verify voltage and a maximum value of the first read voltage to be more than a difference between a maximum value of the second write verify voltage and a maximum value of the second read voltage.
US08593875B2 Device and method for enabling multi-value digital computation
A row driver is configured to activate a row line responsive to a signal having one of multiple possible values. A column driver is configured to activate a column line responsive to a signal having one of multiple possible values. The row and column drivers comprise sets of sense amps and decoders. One of a plurality of lines is operably connected to and input/output line responsive to the active row line and column line. The use of sense amps in the row and column drivers enables this flow control circuit to operate with low power consumption and allows the flow control circuit to act as a register.
US08593871B2 Apparatus for reducing the impact of program disturb
The unintentional programming of an unselected (or inhibited) non-volatile storage element during a program operation that intends to program another non-volatile storage element is referred to as “program disturb.” A system is proposed for programming and/or reading non-volatile storage that reduces the effect of program disturb. In one embodiment, different verify levels are used for a particular word line (or other grouping of storage elements) during a programming process. In another embodiment, different compare levels are used for a particular word (or other grouping of storage elements) during a read process.
US08593870B2 Increased NAND flash memory read throughput
A method of reading sequential pages of flash memory from alternating memory blocks comprises loading data from a first page into a first primary data cache and a second page into a second primary data cache simultaneously, the first and second pages loaded from different blocks of flash memory. Data from the first primary data cache is stored in a first secondary data cache, and data from the second primary data cache is stored in a second secondary data cache. Data is sequentially provided from the first and second secondary data caches by a multiplexer coupled to the first and second data caches.
US08593863B2 Magnetic resistance memory apparatus having multi levels and method of driving the same
A magnetic resistance memory apparatus capable of implementing various levels and a method of driving the same are provided. The magnetic resistance memory apparatus includes a first magnetic device that includes a fixed layer having a fixed magnetization direction, a tunnel layer disposed on the fixed layer, and a first free layer disposed on the tunnel layer having a variable magnetization direction, and a second magnetic device disposed on the first magnetic device including a plurality of free layers insulated with a spacer layer interposed.
US08593861B2 Asymmetric memory cells
An asymmetric memory cell is disclosed. The memory cell includes a refresh control line, a pass gate transistor, and a refresh transistor. The refresh transistor is coupled to the refresh control line, and provides a feedback between the pass gate transistor and a plurality of inverters, when the refresh control line is in a default state.
US08593851B2 Verification system
A verification system of the present invention is provided to perform unidirectional or bidirectional verification between a master apparatus and a slave apparatus comprising the master apparatus having a master memory capable of storing verification key code in a non-volatile manner and the slave apparatus having a slave memory capable of storing verification key code in the non-volatile manner, wherein at least the slave memory is one of the group consisting of non-volatile logic circuit and ferroelectric an memory, both of which use hysteresis characteristics of ferroelectric components.
US08593847B2 Stacked semiconductor devices including a master device
A stack that includes non-volatile memory devices is disclosed. One of the non-volatile memory devices in the stack is a master device, and the remaining memory device or devices is a slave device(s).
US08593846B2 Analog floating gate charge loss compensation circuitry and method
An analog floating gate circuit (10-3, 10-4) includes a first sense transistor (21, 3), a first storage capacitor (20, 5), and first (24, 4) and second (31A, 42) tunneling regions. Various portions of a first floating gate conductor (12, 2) form a floating gate of the first sense transistor, a floating first plate of the first storage capacitor (20, 5), a floating first plate of the first tunneling region, and a floating first plate of the second tunneling region, respectively. A second plate of the first storage capacitor is coupled to a first reference voltage (VREF, GND), and a second plate of the second tunneling region is coupled to a second reference voltage (VPROG/GND). Compensation circuitry (44-1, 44-2) is coupled to the first floating gate conductor, for compensating loss of trapped charge from the first floating gate conductor.
US08593832B2 Apparatus and method for sensing of isolated output
A power converter includes a current controller coupled to an energy transfer element to selectively enable a first, second or third current in the current controller. The first current is substantially zero, the second current is greater than the third current, and the third current is greater than the first current. The third current only partially discharges a capacitance coupled to the energy transfer element and the current controller. A control circuit is to be coupled to the current controller to selectively enable the first, second or third current in the current controller. A first feedback circuit is coupled to generate a first feedback signal while the first current is enabled by the current controller after a full discharge pulse. A second feedback circuit is coupled to generate a second feedback signal while the first current is enabled in the controller after a partial discharge pulse.
US08593830B2 Reverse current limit protection for active clamp converters
DC-to-DC converters are protected from damage by, among other things, monitoring and controlling forward and reverse currents in their transformer primary windings. The currents are discontinued if their values fall outside a predetermined range or if they flow during a portion of the switching cycle in a manner that would result in cross-conduction. Power switches in these converters are also protected from damage by adjusting the maximum duty cycles of these converters to vary with their input voltages. In this way, the maximum voltage across the power switches is kept within a relatively narrow range. These protective features can be combined in any number of ways to fit the application at hand.
US08593829B2 Cable management apparatus
A cable management apparatus includes a securing board and a cable management tray. The securing board includes three clipping pieces located along a straight line. A clasping portion extends from the securing board and includes a connecting flange and a clasping flange. The connecting flange is substantially perpendicular to the clasping flange and the securing board. The cable management tray defines a first receiving space for receiving a first cable and a second receiving space for receiving a second cable. The cable management tray includes two handles and three securing tabs. The two handles are elastic and engaged with the clasping flange, for preventing the cable management tray from moving along a direction substantially parallel to the securing board. The three securing tabs are engaged with the three clipping pieces, for preventing the cable management tray from moving along a direction substantially perpendicular to the securing board.
US08593827B1 Compressible engagement assembly
A compressible engagement assembly includes a latching assembly configured to releasably engage a rack assembly. A compressible member is configured to be compressed by the latching assembly when the latching assembly is releasably engaged with the rack assembly. The compressible member is further configured to engage a rackmount component removably positioned within the rack assembly.
US08593820B2 Flexible printed wiring board and electronic apparatus
According to one embodiment, the flexible printed wiring board of the one embodiment has a base, corrugated portion, and block. The base has therein a conductor that electrically connects a first end and a second end. The corrugated portion is formed in a middle part of the base and has a ridge and legs. The ridge is roundly bent. The legs continuously hang from opposite sides of the ridge. The block is located off the ridge within a gap where the legs face each other and is mounted on one of the legs.
US08593819B2 Ceramic antenna module and methods of manufacture thereof
Circuit modules and methods of construction thereof that contain composite meta-material dielectric bodies that have high effective values of real permittivity but which minimize reflective losses, through the use of host dielectric (organic or ceramic), materials having relative permittivities substantially less than ceramic dielectric inclusions embedded therein. The composite meta-material bodies permit reductions in physical lengths of electrically conducting elements such as antenna element(s) without adversely impacting radiation efficiency. The meta-material structure may additionally provide frequency band filtering functions that would normally be provided by other components typically found in an RF front-end.
US08593817B2 Power semiconductor module and method for operating a power semiconductor module
A power semiconductor module is provided in which power semiconductor chips with an aluminum-based chip metallization and power semiconductor chips with a copper-based chip metallization are included in the same module, and operated at different barrier-layer temperatures during use.
US08593810B2 Cooling device
A cooling device of the present invention includes: a substrate having a first surface which supports an electronic component and a second surface on an opposite side to the first surface; a container which can form a space between itself and the second surface of the substrate; and an evaporation section which is thermally connected to the electronic component supported on the substrate, which is arranged in the space so that at least a portion thereof is in contact with a liquid within the space, and which changes a phase of at least a portion of the liquid to gas on a basis of heat generated by the electronic component.
US08593809B2 Active cooling fan
Aspects of the disclosure relate generally to active cooling or removing heat generated by a processor in a computing device. More specifically, heat generated by the processor may be expelled from the computing device using a fan. The fan may include an air intake over an impeller or blades which move air through an impeller portion and an air duct and out of a housing of the fan. The components of the fan may be configured in the housing to increase the area of an air intake which is not obstructed by features such as keyboards or displays in the computing device.
US08593804B2 System, method and apparatus for holding multiple devices
A consumer electronic system for concurrently holding and providing power to several consumer electronic devices has several cradles in a staggered configuration. At least one of the cradles is positioned behind at least one other of the cradles. Thereby the cradle positioned behind the at least one other cradles is capable of supporting a larger consumer electronic device without blocking the at least one other cradle. The support walls of the at least one other cradles provides a surface that supports the larger consumer electronic device, keeping the larger consumer electronic device from sliding forward.
US08593798B2 Portable electronic apparatus
A portable electronic apparatus including a main body having a front portion and a rear portion, a display unit disposed on the front portion, and a support module disposed on the rear portion, the support module operable to support the main body at an incline relative to a surface, the support module including a support unit, a free end of the support unit being disposed on the rear portion in a first configuration and the free end of the support unit being disposed apart from the rear portion in a second configuration, a guide unit, the guide unit being disposed between the main body and the support unit to guide the rotation of the support unit, and an elastic unit, the elastic unit being connected to the support unit and the rear portion so as to apply an elastic force to the support unit in the direction of rotation of the support unit.
US08593796B2 Display apparatus and support stand
A display apparatus includes: a display case including a display screen exposed on one side of the display case; a support member supporting the display case; and a fixing member provided opposite to the one side and fixed to the support member at first and second positions. The fixing member includes a connector connected to an external installation face when the fixing member is fixed at the first position. The support member includes a first bottom portion and a second bottom portion located this is closer to the display case. The fixing member projects from the second bottom portion to the side opposite to the display case with respect to the one side when the fixing member is located at the first position. The fixing member is hidden behind the support member with respect to the one side when the fixing member is located at the second position.
US08593795B1 Weight distribution for wearable computing device
The present application discloses a wearable computing device having a plurality of components, with the weight of the components being evenly distributed on the wearable computing device. One embodiment may include a frame having a front portion and at least one side-arm extending therefrom. The at least one side-arm has a first end and a second end. The wearable computing device further includes a lens connected to the front portion of the frame and at least one display element mounted to the lens and to the first end of the at least one side-arm of the frame by a tensile member. An electronic device is mounted to the second end of the at least one side-arm of the frame to counterbalance the mass located at the front portion of the frame. The electronic device may include batteries, circuitry, processors, computers, and other electronic components.
US08593793B2 Multi-portion housing of a portable terminal having a central portion
A multi-portion housing for a portable terminal having a proximal end, a distal end, a bottom surface, and a top surface, the top surface configured for mounting a user interface between the proximal and distal ends. The multi-portion housing comprises a central housing portion providing a rigid body extending between the proximal and distal ends for facilitating rigidity of the multi-portion housing to inhibit deformation of the multi-portion housing, the central housing portion having an upper surface and an opposing lower surface. A second housing portion is secured to the central housing portion and has a first resilient seal positioned between a first mating surface of the second housing portion and a corresponding mating surface of the central housing portion, the corresponding mating surface of the central housing portion extending only partway between the proximal and distal ends and being positioned on either the upper or the lower surface. A third housing portion (e.g. an endcap) is secured to the second housing portion and has a second resilient seal positioned between a second mating surface of the second housing portion and a corresponding mating surface of the third housing portion. The first resilient seal and the second resilient seal are configured for inhibiting penetration of foreign contaminants into an interior of the multi-portion housing.
US08593791B2 Sealed circuit breaker
A sealed electrical enclosure used in hazardous locations for enclosing circuit breakers having a bottom housing and a removable top housing with a labyrinth joint or serrated joint formed therebetween, the bottom housing adapted to receive one or more circuit breakers, a first metal bus extending from a point internal to the bottom housing through a first end wall to a point external thereto, and a second metal bus extending from a point internal to the bottom housing through a second end wall to a point external to thereto, where the first and second metal buses are adapted to contact first and second electrical terminals of a circuit breaker when placed within the bottom housing, and a first lug retaining bracket secured to the bottom housing and extending to a position beneath the first metal such that a bottom portion of a connector assembly may fit within the space between the end of the lug retaining bracket and the bottom of the first metal bus.
US08593790B2 Multiple discharge device cascading switch and fuse design
A device and method of use of a multiple discharge panel for a multiple-discharge, high energy electric device. The device generally uses a panel for a multiple-discharge, high energy electric device that includes a plurality of fuse assemblies constructed in a cascading arrangement in a common panel. Each fuse assembly provides protection from a single high energy discharge pulse and includes a structure defining a cavity. The fuse assembly further contains a resistor made of components that explode when subjected to a large pulse of power to temporarily interrupt and dissipate the large pulse of power. The structure defining the cavity is shaped to deform in response to explosion of the resistor such that a new connection to a remaining one of the plurality of fuse assemblies is established.
US08593787B2 Electrochemical capacitor having lithium containing electrolyte
A device having a first electrode, a second electrode, a separator positioned between the first electrode and the second electrode, and an electrolyte incorporated throughout the first electrode, the second electrode, and the separator. The electrolyte includes one or more lithium salts and one or more solvents. The first electrode and second electrodes comprise a majority of activated carbon having a microporous pore size distribution.
US08593783B2 Graphene mounted on aerogel
An apparatus having reduced phononic coupling between a graphene monolayer and a substrate is provided. The apparatus includes an aerogel substrate and a monolayer of graphene coupled to the aerogel substrate.
US08593780B2 Substrate removing method and storage medium
A substrate processing apparatus includes an electrostatic chuck enclosing an electrostatic electrode plate and a chamber having a ground potential and housing the electrostatic chuck. When the absolute value of the potential generated at a wafer after DC discharge is generated between the wafer and the chamber is 0.5 kV, the potential of the electrostatic electrode plate is changed from 2.5 kV to 1.5 kV to generate DC discharge so that the absolute value of the potential of a placing surface of the wafer of the electrostatic chuck becomes 0.5 kV after the plasma etching process, the polarities of the potential of the placing surface after the change and the wafer become the same, and the absolute value of the potential difference between the wafer and the chamber becomes 0.5 kV or more. The wafer is then removed from the electrostatic chuck.
US08593779B2 Hybrid electrostatic chuck
An electrostatic chuck (230) for holding a device (200) includes a chuck body (244), a Coulomb electrode assembly (246), a Johnsen-Rahbek (J-R) electrode assembly (248), and a control system (224). The chuck body (244) includes a chucking surface (250) that engages the device (200), and the chuck body (244) is made of a dielectric having a relatively high resistance. The J-R electrode assembly (248) is positioned spaced apart from the chucking surface (250). The Coulomb electrode assembly (246) is also positioned spaced apart from the chucking surface (250). The control system (224) selectively directs a first voltage to the J-R electrode assembly (248) to generate a J-R type force that attracts the device (200) towards the chucking surface (250), and selectively directs a second voltage to the Coulomb electrode assembly (246) to generate a Coulomb type force that also attracts the device (200) towards the chucking surface (250). With this design, both the J-R type force and the Coulomb type force are used to concurrently attract the device (200) against the chucking surface (2500. As a result thereof, the electrostatic chuck (230) is better able to reduce non-flatness of the device (200), and/or crush any particles positioned between the device (200) and the chucking surface (250).
US08593773B2 Half-bridge circuit protected against short circuits and having semiconductor switches
A circuit arrangement with two semiconductor switches connected in series between a first potential connection and a second potential connection is provided. The circuit arrangement may include an inductive element connected in series between the two potential connections and by elements of an action chain of such a nature that, under predefined conditions, a voltage drop across the inductive element effects the switching off of at least one of the semiconductor switches.
US08593771B2 Power modules with reverse polarity protection
Power handling circuits that may be packaged as power modules, and methods of operating semiconductor devices in such circuits and modules. An exemplary circuit comprises power terminals to receive electrical power, a first semiconductor device, a first drive circuitry, and a second drive circuitry. The first drive circuitry provides a drive signal to the first semiconductor device in accordance with a desired circuit function when the electrical power received at the power terminals has the positive polarity, and ceases providing the drive circuit when the electrical power received at the power terminals has the negative polarity. During the negative polarity condition, the second drive circuitry provides a drive signals to the first semiconductor device which causes its primary current conduction path to conduct, thereby reducing the power dissipation in the device's parasitic path, and optionally causing a fuse in the circuit providing power to the circuit to blow.
US08593769B2 Secure arc flash detection
An intelligent electronic device (IED) may be configured to detect arc flash events within a power system using stimulus measurements acquired by detection devices communicatively coupled to the power system. An arc flash event may be detected using a time-intensity comparison metric, such as an inverse time-over-stimulus metric, a cumulative stimulus metric, or the like. The stimulus may include electro-optical (EO) radiation produced in the vicinity of the power system, current measurements, or the like. The IED may detect an arc flash event if one or more of the stimulus types are indicative of an arc flash event. Responsive to detecting an arc flash event, the IED, or other protective element, may take one or more protective actions, such as issuing trip commands, or the like.
US08593766B2 Magneto-resistive effect element having spacer layer including main spacer layer containing gallium oxide and metal intermediate layer
A magneto-resistive effect (MR) element includes first and second magnetic layers in which a relative angle formed by magnetization directions changes responsive to an external magnetic field, and a spacer layer positioned between the first and second magnetic layers. The first magnetic layer is positioned closer to a substrate above which the MR element is formed than the second magnetic layer. The spacer layer includes copper and metal intermediate layers and a main spacer layer composed primarily of gallium oxide. The copper and metal intermediate layers are positioned between the main spacer and first magnetic layers. The metal intermediate layer is positioned between the copper and main spacer layers. The metal intermediate layer is composed primarily of at least one from a group of one of magnesium and at least partially oxidized magnesium, and one of aluminum and at least partially oxidized aluminum.
US08593763B2 Preventing oil migration to slider fluid bearing surface
An apparatus and associated method employing a slider having a leading edge opposing a trailing edge. A fluid bearing surface extends between the leading edge and the trailing edge. The fluid bearing surface contactingly engages a fluid stream operably imparted to the fluid bearing surface by a moving member adjacent thereto. A trailing edge pad extends from the fluid bearing surface adjacent the trailing edge. A capillary lubrication trench (CLT) is disposed entirely between a portion of the trailing edge pad and the trailing edge along a direction that is parallel to a longitudinal axis from the leading edge to the trailing edge.
US08593759B1 Spindle motor and disk drive apparatus
A spindle motor includes a base member, an armature positioned above the base member, and a circuit substrate electrically connected to coils of the armature. The base member includes an annular bottom portion positioned below the armature and a lower slant surface extending radially outward and upward from an outer peripheral portion of a lower surface of the bottom portion. The circuit substrate includes a first substrate piece and a second substrate piece arranged in a circumferentially spaced-apart relationship with the first substrate piece. Each of the first substrate piece and the second substrate piece includes at least one land portion arranged on a lower surface thereof.
US08593758B2 Disk drive spindle motor with adhesive fixing seal cap to shaft and upper thrust plate
A spindle motor includes a stationary portion and a rotating portion including a seal defining portion. The stationary portion includes a shaft portion, an annular member fixed to an upper portion of the shaft portion in, for example, a tight-fitting condition, and a cap member. A radially inner end portion of the cap member is fixed to each of the shaft portion and the annular member preferably through, for example, an adhesive. An upper seal portion, in which a surface of a lubricating oil is arranged, is defined in an upper seal gap defined between an outer circumferential surface of the annular member and an inner circumferential surface of the seal defining portion. The cap member is arranged to cover an upper side of the upper seal portion.
US08593755B1 Flying height measurement
Some of the embodiments of the present disclosure provide a disk drive system comprising a disk drive system comprising a disk having a track upon a surface of the disk, the track including a first data-storing sector and a second data storing sector, and a servo sector located between the first data-storing sector and the second data-storing sector, the servo sector including a first flying height (FH) field having a predetermined pattern. Other embodiments are also described and claimed.
US08593752B2 Pulse power during a shut down in a hard disk drive
A HDD including write components configured to operate within an operating voltage range, charging circuitry comprising a charging capacitor. The charging capacitor includes a higher voltage when charged than the operating voltage range. The HDD also includes pulse circuitry configured to pulse power from the charging circuitry to the write components within the operating voltage range during a controlled shut down of the write components such that remaining data-sector bits are written during the controlled shut down.
US08593749B2 Hard-disk drive including fly-height-adjustment heating element and position-adjustment heating element and method of controlling fly height
A hard-disk drive. The hard-disk drive includes a head-slider configured to fly in proximity with a recording surface of a magnetic-recording disk, and a fly-height variation compensator configured to generate a signal for compensating variation in fly height of a write element of the head-slider. The head-slider further includes the write element configured to write data to the magnetic-recording disk, a fly-height-adjustment heating element configured to displace the write element towards the magnetic-recording disk, and a position-adjustment heating element configured to displace the write element in at least a direction perpendicular to a flying direction. The fly-height variation compensator is further configured to add the signal for compensating variation in fly height to a control signal for output to the fly-height-adjustment heating element.
US08593747B1 Hybrid defect detection for recording channels
An apparatus includes: a signal module to process data signals corresponding to data on a storage medium to generate signal samples; a defect detector to receive the signal samples, apply a set of parameters to the signal samples, and generate an output based on a count of signal samples that are associated with abnormal signal quality, the signal samples that are associated with abnormal signal quality being included in a portion of the signal samples determined in accordance with the set of parameters; and circuitry to receive the output from the defect detector and identify one or more media defects based on the output.
US08593743B2 Magnetic structure for compact imaging device
The subject matter disclosed herein relates to electromagnetic force generation for an imaging device having a small form factor.
US08593740B2 Retrofocus-type wide angle lens and camera including the lens
A retrofocus-type wide angle lens includes a first lens group having negative refractive power as a whole, a second lens group having positive refractive power as a whole, a stop, and a third lens group having positive refractive power as a whole, which are arranged in this order from the object side of the retrofocus-type wide angle lens. Further, the first lens group includes two negative meniscus lenses, each having a convex surface facing the object side. Further, each of the second lens group and the third lens group includes a three-element cemented lens.
US08593739B2 Image pickup lens for solid-state image pickup element
Disclosed is a low-cost, compact image pickup lens for a solid-state image pickup element. The image pickup lens includes, in the order from an object side, a first lens L1, which has a convex surface facing the object side on an optical axis and has a positive refractive power; a second lens L2, which has a concave surface facing an image side on the optical axis and has a negative refractive power; a third lens L3, which has a positive refractive power and has aspheric surfaces on the object side and the image side; a fourth lens L4, which has a convex surface facing the image side on the optical axis, has a positive refractive power, and has a meniscus shape; and a fifth lens L5, which has a concave surface facing the image side on the optical axis, has a negative refractive power, and has a meniscus shape.
US08593733B2 Diffractive optical elements and applications thereof
A fanout diffractive optical element having a discrete periodic surface relief structure having a 2-dimensional (x,y) shape is described. The surface relief structure can include a first lobe and a second lobe separated by a waist region having a width less than the first lobe and the second lobe. The 2-dimensional (x,y) shape of surface relief structure can have an inversion center and can lack symmetry about any plane that is normal to the surface relief structure. Also described are apparatuses having a fanout diffractive optical element and methods of producing a plurality of light diffracting orders using a fanout diffractive optical element.
US08593729B2 Multi-field of view annular folded optics
An all-reflective afocal lens is comprised of eight-reflective mirrors which can fold the light path into a very compact and thin configuration while maintaining diffraction limited performance. Such an afocal arrangement is usable with a traditional optical imager of an appropriate aperture dimension and FOV range, or with an annular aperture optical system with the appropriately scaled aperture and acceptable FOV angles. When combined the resulting FOV is scaled by the magnification produced by the afocal. The afocal arrangement can be used in either a magnification mode or a demagnification mode. Such an afocal arrangement can be used as either a focal length extender or as a FOV switch enabling a very short length two FOV multi-spectral system with a length that can be an order of magnitude shorter than a known optical system.
US08593727B2 Single-shot laser ablation of a metal film on a polymer membrane
A method comprises spatially selectively irradiating in a predetermined pattern with an output beam of a laser system an interface between a polymer substrate and a metal film on the polymer substrate. The polymer substrate is substantially transparent to the output beam of the laser system; the metal film absorbs a substantial fraction of the output beam. Laser system output comprises a sequence of pulses. Beam size at the polymer/metal interface, pulse energy, and pulse duration are selected so that each pulse from the laser system that irradiates an area of the polymer/metal interface substantially completely removes by ablation the metal film from at least a portion of the irradiated area without substantially altering the surfaces or bulk of the polymer substrate and without leaving on the polymer substrate or on remaining areas of the metal film substantial residue of metal that resolidified after being melted by the laser irradiation.
US08593721B2 Multi-color electrophoretic displays and materials for making the same
Novel addressing schemes for controlling electronically addressable displays include a scheme for rear-addressing displays, which allows for in-plane switching of the display material. Other schemes include a rear-addressing scheme which uses a retroreflecting surface to enable greater viewing angle and contrast. Another scheme includes an electrode structure that facilitates manufacture and control of a color display. Another electrode structure facilitates addressing a display using an electrostatic stylus. Methods of using the disclosed electrode structures are also disclosed. Another scheme includes devices combining display materials with silicon transistor addressing structures.
US08593718B2 Electro-osmotic displays and materials for making the same
Disclosed herein are novel electrophoretic displays and materials useful in fabricating such displays. In particular, novel encapsulated displays are disclosed. Particles encapsulated therein are dispersed within a suspending, or electrophoretic, fluid. This fluid may be a mixture of two or more fluids or may be a single fluid. The displays may further comprise particles dispersed in a suspending fluid, wherein the particles contain a liquid. In either case, the suspending fluid may have a density or refractive index substantially matched to that of the particles dispersed therein. Finally, also disclosed herein are electro-osmotic displays. These displays comprise at least one capsule containing either a cellulosic or gel-like internal phase and a liquid phase, or containing two or more immiscible fluids. Application of electric fields to any of the electrophoretic displays described herein affects an optical property of the display.
US08593716B1 Methods and apparatus for photonic arbitrary waveform generation over wide-bandwidth and extended time apertures
A method and apparatus for producing an arbitrary broadband waveform includes generating a first narrowband waveform and generating a frequency-shifted replica by frequency shifting the first narrowband waveform by a frequency shift. A second narrowband waveform is also generated. A broadband waveform is generated by combining the frequency-shifted replica and the second narrowband waveform.
US08593713B2 Ink composition used in electrowetting display device and electrowetting display device employing the same
Disclosed is an ink composition used in an electrowetting display device and an electrowetting display device employing the same. The ink composition used in the electrowetting display device includes a non-polar solvent and a modified hydrophobic pigment, wherein the modified hydrophobic pigment has a structure represented by Formula (I), of P-Gn wherein P is a pigment moiety, n is 1-4 and G is wherein R1 is a straight chain or a branched C4-20 alkyl group, or C5-20 cycloalkyl group.
US08593706B2 Illuminating light source, scanner module employing the same, and image scanning apparatus employing the scanner module
An illuminating light source, and a scanner module and an image scanning apparatus including the same. The illuminating light source includes: a vacuum tube have a cylindrical shape, is filled with a discharging gas, and has a light emitting portion disposed in a lengthwise direction thereof; a discharging electrode disposed upon the vacuum tube, and having a width that increases from a center portion to end portions thereof; and a fluorescent body disposed within the vacuum tube, to absorb first light beams emitted by the discharging gas and to emit second light beams having a longer wavelength than the first light beams, with the second light beams being illuminated through the light emitting portion.
US08593700B2 Erecting equal-magnification lens array plate, optical scanning unit, and image reading device
An erecting equal-magnification lens array plate includes a stack of a first lens array plate provided with a plurality of first lenses arranged on a first surface and a plurality of second lenses arranged on a second surface, and a second lens array plate provided with a plurality of third lenses arranged on a third surface and a plurality of fourth lenses arranged on a fourth surface. The erecting equal-magnification lens array plate is provided with a first light shielding wall provided upright to surround the first lens, and a second light shielding wall provided upright to surround the fourth lens. An area on the first surface of the first lens array plate outside the effective region of the first lenses is roughened.
US08593699B2 Image sensor module and image sensor
According to one embodiment, an image sensor module including a plurality of image sensors and a common signal line. The common signal line is commonly electrically connected to the plurality of image sensors. To the common signal line, image signals are output sequentially from the plurality of image sensors. The image sensor module feeds back a feedback signal from a first image sensor to a predetermined image sensor. The first image sensor is an image sensor which lastly outputs the image signal among the plurality of image sensors. The predetermined image sensor is an image sensor which outputs an offset signal to the common signal among the plurality of image sensors. The feedback signal indicates a completion of an output of image signal to the common signal line. The predetermined image sensor outputs the offset signal to the common signal line in response to the feedback signal.
US08593693B2 Outputting gray color values in color-managed CMYK to CMYK color conversions based on input gray color values
Methods and systems herein provide for CMYK color conversion of input image data while preserving K color values during the conversion process. A color management module is operable to convert input image data from one color space to a CMYK color space. For example, the color management module may convert the image data of one device operating in a CMYK color space to a CMYK color space of another device. In doing so, the color management module preserves or maintains the K color values of the input image data during the CMYK to CMYK color conversion. The color management module may implement such by modifying input and output ICC profiles and interpolating the perceptual lightness values of the input ICC profile within the output lookup table.
US08593692B2 Systems and methods for building a color lookup table for a printer
Color separation systems and methods improve color constancy and smoothness of a color lookup table (LUT) for a printer. A plurality of nodes of the LUT may be defined in colorimetric space, and the nodes out of the printer gamut may be mapped to the printer gamut surface. All possible colorant combinations are then determined that produce each node in the LUT in a device independent color space based on an inversion of the spectral based printer model. Next, a specific image quality metric combination based on a color inconstancy index (CII) and a gray component replacement (CGR) strategy is defined. And a colorant combination is determined for each and every node in the LUT based on this metric. A smoothing filter may be used to smooth the lookup table.
US08593686B2 Image scanning apparatus, computer readable medium, and image storing method add scanned image data into an image file storing an existing image data associated with an attribute value of the existing image data
There is provided an image scanning apparatus including a setting section which sets an image generation condition based on the attribute value of the existing image data stored in the image file; a generator section which scans the manuscript to generate the scanned image data based on the image generation condition set by the setting section; and a storing section which adds the scanned image data generated by the generator section into the image file to store the added image file.
US08593684B2 Inverse mask generating printer and printer module
An inverse mask image generating printer and printer module are provided. In one aspect, an inverse mask image generating module has an input adapted to receive the image data for an image to be printed said image data having color data for a first set of colors used in a first color model; an inverse mask image processor generating an inverse mask image using color data for one of the first set of colors; and an output providing the inverse mask image for use by a print engine. The inverse mask image is generated based upon the color data for a selected one of the first set of colors so that the inverse mask image can be generated without first determining color separation toner images that define amounts of color toner to be applied to form the elements of the image.
US08593683B2 Image processing apparatus, image processing apparatus control method and storage medium capable of reading an image of a document to be conveyed and making skew feed correction
An apparatus includes a conveyance unit configured to convey a document, a first detection unit configured to detect a first deviation amount of the conveyed document by a leading edge of the document, a first correction unit configured to correct deviation of the conveyed document if the first deviation amount is larger than a predetermined value, an input unit configured to read the document the corrected deviation and to input image data, a second detection unit configured to detect a second deviation amount of the conveyed document by a trailing edge of the document, and a second correction unit configured to correct deviation of the document included in the input image data if the second deviation amount is larger than a predetermined value.
US08593680B2 Natural language color selector and navigator for selecting colors from a color set
Embodiments herein include a method, service, apparatus, etc., that receives initial user input comprising natural language commands that identify the initial color selection. The method displays the initial color samples or patches corresponding to the initial color selection in a two-dimensional grid and receives additional user input comprising additional natural language commands and a refined axis selection. The embodiments herein revise the initial color selection to a revised color selection based on a color change magnitude, a color change direction, and a color change property. Then, this method matches the revised color selection to the computer program colors to produce refined matching colors. These refined matching colors are displayed as refined color samples or patches in the two-dimensional grid. The axes of the two-dimensional grid can correspond to the refined axis selection and the assigned names can also be displayed on the graphic user interface.
US08593676B2 Method and system for managing print device information using a cloud administration system
A cloud administration system may include a processing module in communication with a plurality of print devices. The processing module may be located remotely from each of the plurality of print devices. The cloud administration system may include a storage module in communication with the processing module. The processing module may be configured to receive print device information from at least one of the plurality of print devices, store the print device information in the storage module, and enable an application computing device to access the print device information from the storage module. The application computing device may be located remotely from the processing module. The cloud administration system may operate as a shared resource for each of the plurality of print devices and the application computing device.
US08593671B2 System and method for controlling usage of printer resources
A system and method control usage of resources associated with a printing device by transmitting a print-ready document from a client device, over a network, to a printing device; intercepting the transmitted print-ready document before the transmitted print-ready document is received by the printing device; electronically extracting, using a processor, page, document, or user information from the intercepted print-ready document; electronically, using a processor, comparing the extracted page, document or user information with resource policies associated with the printing device; modifying the page, document, or user information within the intercepted print-ready document when the extracted page, document, or user information is in conflict with resource policies associated with the printing device to ensure that printing of the print-ready document is in compliance with the resource policies associated with the printing device; and submitting the modified print-ready document to the printing device for printing.
US08593670B2 Automatic generation of device-centric distribution lists
A method and system for managing distribution lists rely on the collection of job log data from shared devices, such as networked printers. For each printer, a usage community comprising users of the shared device, can be determined, based at least in part on the job log data. At least one distribution list of users is generated, based on the usage community. The distribution list can be linked with a mailer program, whereby users in the usage community are grouped together under a common contact address. Updating the distribution list at intervals to reflect changes in the usage community allows a static email address to be used for a varying group of users.
US08593667B2 Printing apparatus having a confidential file storage for storing files attached to blind carbon copy mail received by the printing apparatus
The present invention provides a printing apparatus that enables sender to know which file is printable, and which file is unprintable when plural files are attached in a receiving mail and two kinds of printable and unprintable files intermingle in the plural files. The printing apparatus which can print the file attached in a receiving mail, comprises a judging section which judges whether or not the attached file in the receiving mail is printable; and a transferring section that, if the attached file is unprintable on the basis of a judgment result of the judging section, generates a transfer mail which contains information to specify the unprintable file and transfers the transfer mail to a predetermined transfer destination.
US08593664B2 Image processing apparatus, image processing system, and program for specifying destinations for image data transmission
An MFP makes an inquiry about a subfolder of a destination folder by referring to the destination folder of image data registered in an address book of the MFP. A PC transmits a subfolder list to the MFP. The MFP determines whether or not the transmitted subfolder is already registered in the address book, and the MFP automatically registers an unregistered subfolder as the destination folder in the address book.
US08593663B2 Image forming apparatus for storing and processing electronic documents and image data, data processing method, and storage medium thereof
An image forming apparatus executes functional processing according to specific functional processing information stored in a storage unit. The image forming apparatus determines whether any data remains in the storage unit when new functional processing information is set. The image forming apparatus prevents the specific functional processing information stored in the storage unit from being updated based on the new functional processing information if any data remains in the storage unit, and replaces the specific functional processing information stored in the storage unit with the new functional processing information if no data remains in the storage unit.
US08593662B2 Compound image-forming method and compound image-forming apparatus
A compound image-forming method and compound image-forming apparatus capable of handling image formation without prolonging processing time even if the compression system is not able to carry out partial decoding of a compressed image. The present invention reads a document, partitions a one-page image into an arbitrary number of units at the same time while the document is being read, and compresses the partitioned image, thereby making it possible to use a common image, and, in a copying operation, enabling printing without waiting for an entire page to be read, thus making it possible to enhance printing performance capabilities for fast printing and others. Further, in a facsimile transmission, transmission can be carried out without waiting for an entire page to be read, thereby enabling communication time to be reduced.
US08593654B2 Setting a partition size for a print job
A method for print job partitioning in a printing environment having a plurality of RIP (raster image processing) engines includes setting a partition size for a selected print job as a function of one or more of a time sensitive nature of the selected print job and an activity duration measured for the printing environment. A different one of the plurality of RIP (raster image processing) engines is assigned to rasterize each job partition of the set size for the selected print job. The partitions of the selected print job rasterized by the plurality of RIP engines are aggregated into an output file for printing.
US08593652B2 Image reading device
An image reader includes a path switching part, located at a branch point that switches between a double-sided path and a single-sided path. The double-sided path defines a conveyance route that passes through a reading position from the branch point to enter a conveyance path that causes a document to make a U-turn, and then again passes through the reading position to be discharged to a paper discharge tray. The single-sided path defines a conveyance route that, without passing through the reading position, merges into the conveyance path from the branch point. Along the double-sided path, document detecting sensors provide detection results so that a collision determination part determines a possibility of a collision between documents, and if such a possibility is determined, the path switching part switches the double-sided path to the single-sided path to prevent the documents from colliding head-on with each other in the vicinity of the reading position.
US08593646B2 Measuring method, measuring apparatus, lithographic apparatus and device manufacturing method
An apparatus (AS) measures positions of marks (202) on a lithographic substrate (W). A measurement optical system comprises illumination subsystem (504) for illuminating the mark with a spot of radiation (206) and as detecting subsystem (580) for detecting radiation diffracted by the mark. The substrate and measurement optical system move relative to one another at a first velocity (vW) so as to scan the mark while synchronously moving the spot of radiation relative to the reference frame (RF) of the measurement optical system at a second velocity (vSPOT). The spot scans the mark at a third velocity (vEFF) which is lower than the first velocity to allow more time for accurate position measurements to be acquired. In one embodiment, an objective lens (524) remains fixed in relation to the reference frame while a moving optical element (562) imparts the movement of the radiation spot relative to the reference frame.
US08593635B2 Camera web support
Web supports (30, 32, 34, 36, 38, 330, 332, 334, 336, 338, 340) form a first web path (46, 48, 346, 348) in which a web is presented opposite to a camera (26, 326) and an alternative second web path (46, 48, 346, 348) in which the web (230) is overturned prior to being presented opposite to the camera (26, 326).
US08593634B1 Custom cosmetic blending machine
A spectrophotometer 300, webcam 302 or other instrument measures the color composition and texture of a person's face 400 or other body part. A computer system 301 includes a processor 501 and a non-transitory, non-signal computer readable medium 500 containing machine readable instructions that accept data from a spectrophotometer 300 or like instrument and uses a main executable program 502 and a subroutine 504 for color analysis to derive a mix of color to create a cosmetic product matching or enhancing the color composition and/or texture of the person's face or other body part. The computer system 301 and subroutine for color analysis create machine readable instructions 505 for the firmware of a cosmetic blending and dispensing machine 508. In order to properly mix and dispense high viscosity and air bubble riddled cosmetic material, a medical grade peristaltic pump 354 is used with triangle needle nozzles 374.
US08593633B2 Cure degree evaluation method, cure degree evaluation sheet, and cure degree evaluation system for evaluating cure degree of active energy ray-curable resin composition
A cure degree evaluation method for evaluating a cure degree of an active energy ray-curable resin composition is a method for evaluating the cure degree of the active energy ray-curable resin composition includes the steps of: irradiating the active energy ray-curable resin composition with an active energy ray; and evaluating the cure degree of the active energy ray-curable resin composition in accordance with a color of the active energy ray-curable resin composition. The active energy ray-curable resin composition contains at least a radical polymerization compound, a leuco dye, and a radical polymerization initiator.
US08593631B2 Spectral image acquiring apparatus
A spectral image acquiring apparatus includes an optical filter on which light is incident; an image sensor including a two-dimensionally disposed pixel array for detecting the light via the optical filter; and a signal processing unit generating a difference-value image based on a detection signal from the image sensor. The optical filter includes a diffraction grating having a lattice pattern corresponding to one or more pixels on the image sensor. The signal processing unit calculates a difference value in an amount of received light between two adjacent pixels based on the detection signal from the image sensor, and generates the difference-value image based on the difference value. The difference value between the two adjacent pixels is varied depending on a difference in an interference point on the image sensor corresponding to a diffraction angle of the light that has passed through the diffraction grating.
US08593624B2 Refractive index measuring apparatus
By using two probe optical systems for measurement by disposing the probe optical systems with a test object sandwiched therebetween, an optical path length of light transmitted through the test object which is identified locally is calculated using an interference signal thereof. In addition, a geometrical thickness of the same part is calculated by measuring positions of the probe optical systems, whereby two calculated values are obtained. Based on the values and a calculated value for a reference object, a refractive index distribution of the test object is obtained.
US08593617B2 Lithographic apparatus, plasma source, and reflecting method
A lithographic apparatus includes a plasma source that includes a vessel configured to enclose a plasma formation site, an optical device configured to transfer optical radiation to or from the vessel, and a reflector arranged in an optical path between the optical device and the plasma formation site source. The reflector is configured to reflect the optical radiation between the optical device and the plasma formation site. The reflector is formed, in operation, as a molten metal mirror.
US08593616B2 Actuator, stage device, and exposure apparatus
An actuator according to example embodiments may be relatively compact and may be driven with 2 degrees of freedom with less spatial constraints. The actuator may include a base member, a ball screw member including a ball screw coupled to the base member and a ball nut screwed onto the ball screw, a driving member coupled to the ball nut so as to move in conjunction with the ball nut, a first directional displacement member configured to move in a first direction in response to a first movement of the driving member, a wedge member coupled to the driving member so as to be moved in a second direction in response to a second movement of the driving member, a second directional displacement member configured to move in a second direction in conjunction with the wedge member, and a binding member configured to bind the first directional displacement member to at least one of the driving member, the wedge member, and the base member.
US08593612B2 Liquid crystal display panel cutting system and method and liquid crystal display device fabricating method using the same
A liquid crystal display panel cutting system for cutting a substrate by varying a driving condition of a cutting wheel according to characteristics the glass substrate. The system comprising a table on which the substrate is loaded, a cutting wheel for forming scribing lines at a surface of the substrate, and a controller for driving the cutting wheel by controlling a driving condition of the cutting wheel based upon the characteristics of the substrate.
US08593611B2 Liquid crystal display panel having conductive sealent
A LCD panel including an active device array substrate, an opposite substrate, a liquid crystal layer, a conductive sealant and restraining elements is provided. The active device array substrate includes common lines, transfer pads and a dielectric layer. The dielectric layer has openings exposing the transfer pads. The opposite substrate has a common electrode. The liquid crystal layer and the conductive sealant are disposed between the active device array substrate and the opposite substrate. The conductive sealant surrounds the liquid crystal layer. The openings are corresponding to corners of the conductive sealant. The conductive sealant fills the openings and the common electrode is electrically connected to the transfer pads through the conductive sealant. Further, the restraining elements are between the active device array substrate and the opposite substrate and are distributed around the corners of the conductive sealant such that the conductive sealant is forced to fill into the openings.
US08593604B2 Electrode structure which supports self alignment of liquid deposition of materials
An improved two layer electrode structure is fabricated on a surface. According to one aspect of the invention, the first layer of the electrode structure is designed to provide electrical contact to a fluid electronic material and the second layer of the electrode structure is formed so as to constrain the fluid electronic material in a precise pattern. Alternatively, the second layer of the two-layer electrode structure includes a low surface energy material to further assist in constraining the fluid electronic material to the desired pattern. In another alternative, the first layer of the electrode structure includes a transparent electrode material, that is coupled to an electro-optical device. The second layer of this electrode structure includes a high conductivity material that is coupled to the first layer of the electrode structure in an area not directly over the electro-optical device to improve the conductivity of the transparent electrode structure.
US08593598B2 Controlling reflection in LCD devices
Systems and methods are provided for controlling the light reflected from a display panel. In one embodiment, a prism mirror and a diffuse reflector are positioned between the bottom polarizer and the liquid crystal layer of a pixel to control the polarization of reflected light transmitted through the display panel. The diffuse reflector diffuses light towards the prism mirror, and the prism mirror affects the polarization of the light. When the pixel is on, the liquid crystals of the liquid crystal layer may shift the polarization of the reflected light such that it can be transmitted through the top polarizer. When the pixel is off, the liquid crystals may not substantially shift the polarization of the reflected light, and the reflected light may be polarized to be absorbed by the top polarizer. Accordingly, reflected light is substantially transmitted through the pixel when the pixel is on, and substantially absorbed by the top polarizer when the pixel is off.
US08593597B2 Active matrix substrate and display device having the same
The active matrix substrate includes: a plurality of switching elements provided on an insulating substrate; a plurality of lines provided on the insulating substrate and connected to the switching elements; an interlayer insulating film covering the switching elements and the lines; a plurality of pixel electrodes formed on the interlayer insulating film; and a plurality of terminals connected to the lines and placed with a predetermined spacing. At least part of each of the terminals is not covered with the interlayer insulating film. A reflection layer configured to reflect light is provided in a region that is at least part of each gap between the adjacent terminals and includes an edge of the interlayer insulating film, as viewed from the normal to the surface of the insulating substrate.
US08593592B2 Polarizer and liquid crystal display device having the same
A polarizer includes a polarizer main body, a first barrier layer disposed above the polarizer main body and/or a second barrier layer disposed below the polarizer main body. The first barrier layer and the second barrier layer include silicon nitride (SiNx).
US08593591B2 Liquid crystal display device
[Problem]In the present invention, it is an object to improve display quality by improving response speed of a liquid crystal element in a liquid crystal display device, in particular, response speed in the case of falling.[Means for Solving the Problems]In the present invention, it is characterized that a liquid crystal layer is divided into plural regions (domains) substantially by mixing a chemical compound including a liquid crystal skeleton in a liquid crystal layer exisiting liquid crystal molecules as a technique to improve response speed of a liquid crystal element in a liquid crystal display device for solving the above problem.
US08593589B2 LED back light module and liquid crystal display device
The present invention discloses a LED back light module and a LCD device, wherein the LED back light module comprises a lamp source fixing device for fixing the LED light bar, and said lamp source fixing device is provided with multiple fins. Because the fins are arranged on the lamp source fixing device for fixing the LED light bar of the present invention, the heat dissipation area is increased, and the LED heat dissipation is improved.
US08593588B2 Liquid crystal display device with uniform luminance
Disclosed is a liquid crystal display device, including: a liquid crystal panel, a light guide plate disposed in a rear direction of the liquid crystal panel, a lamp disposed along at least one side edge of the light guide plate, a lamp housing covering a portion of a circumference of the lamp, and a reflecting plate disposed at a rear surface of the light guide plate, wherein a protrusion portion is disposed at an inner surface of the lamp housing adjacent to the reflecting plate, and an end portion of the reflecting plate is curved to extend toward the protrusion portion, thus to provide a liquid crystal display panel which can obtain uniform luminance and minimized light leakage.
US08593587B2 Multi-level light guide plate and liquid crystal display module
The present invention discloses a multi-level light guide plate (LGP) and a liquid crystal display (LCD) module. The LGP is divided into multiple sections sequentially connected with each other in a direction, and at least one light bar is disposed at an outward side of each section of said multiple sections. The LCD module has the multi-level LGP, which is located between a liquid crystal panel and a back plate. The multi-level LGP provided by the present invention can achieve local dimming for multiple sections and ensure that light rays of the respective sections will not influence each other.
US08593584B2 Liquid-crystal display device including floating electrode
The present invention provides a liquid-crystal display device in which a pixel defect does not occur even when an electrode becomes disconnected. The liquid-crystal display device according to the present invention comprises a liquid crystal layer and a pair of substrates between which the liquid crystal layer is interposed. At least one of the pair of substrates includes an electrode that applies a voltage to the liquid crystal layer. The electrode that applies the voltage to the liquid crystal layer includes two or more linear portions. The substrate comprising the electrode that applies the voltage to the liquid crystal layer, from among the pair of substrates, includes a floating electrode that overlaps at least two of the two or more linear portions via an insulating film.
US08593582B2 Active matrix substrate and display device
An active matrix substrate has a structure that prevents a drain extraction line from breaking without a plurality of active elements such as thin film transistor elements, metal-insulator-metal elements, MOS transistor elements, diodes, and varistors being disposed, and is suited for use in a large-size liquid crystal television or a like liquid crystal display device equipped with a large-size liquid crystal display panel. The active matrix substrate includes an active element connected, via a drain extraction line, to a storage capacitor upper electrode, wherein the drain extraction line has at least two routes.
US08593579B2 Projection display
The present invention provides a projection display capable of realizing high contrast in a display image plane. The projection display includes a light source; a first light modulator modulating light from the light source on the basis of an input image signal, and generating a first image light; a second light modulator modulating the first image light on the basis of the image signal, and generating a second image light; and a projection lens projecting the second image light generated with the second light modulator.
US08593575B2 Video display apparatus for shortened-delay processing of a video signal and video processing method
According to one embodiment, a video display apparatus includes a video processing module and a controller. The video processing module is configured to perform signal processing on a video signal to generate a display video signal, and to output the display video signal to a display module. The controller is configured to turn on or off short delay processing mode, and to control the video processing module so that a delay time of the display video signal from the video signal becomes approximately 12 to 17 ms at a minimum when the short delay processing mode is on.
US08593573B2 System, method and apparatus for detecting docking of headphones
An application for a television with a headphone dock. The headphone dock provides status to the television as to when a set of headphones are docked (idle) or undocked (in use). The television changes routing of audio signals based upon the status of the headphones.
US08593570B2 Video recording camera headset
A wireless video recording camera headset providing hands-free video recording and a two-way audio relay to a wireless handset. A recorded video stream is saved to a non-volatile buffer in the headset and may be viewed, edited and manipulated via the wireless handset.
US08593569B2 Digital camera
A digital camera of the present invention has: an optical housing having a bending optical system for reflecting photographic object light entering along a first optical axis to a second optical axis direction perpendicular to the first optical axis to form an image on an image pickup device; a camera main body having a containing portion for containing the optical housing slidably only in the second optical axis direction and having support portions for supporting the optical housing provided on each of both sides surfaces of the containing portion across the second optical axis of the bending optical system; and a shock absorbing unit provided between an inner surface of the containing portion of the camera main body in which the support portions are not provided and an outer surface of the optical housing facing thereto.
US08593566B2 Method and apparatus for controlling light emission of flash and digital photographing apparatus using the method and apparatus
Provided is a method and apparatus for controlling light emission of a flash. The method includes: during a pre-emission flash, exposing an image sensor by opening a global shutter; measuring light reflected from a subject by using the image sensor, and calculating a flash emission time of the flash based on the measured light; and controlling the flash to fire a main-emission flash for the calculated flash emission time. Accordingly, a partial exposure during a pre-emission flash, even in an image sensor that operates by using a rolling shutter, can be prevented.
US08593556B2 Digital image signal processing apparatus for displaying angle of view information, method of controlling the apparatus, and medium for recording the method
A digital image signal processing apparatus having an angle of view preview function, a method of controlling the digital image signal processing apparatus, and a recording medium having embodied thereon a computer program for executing the method. Accordingly, a display image displaying at least one piece of angle of view information that is different from angle of view information of a currently mounted interchangeable lens is generated by performing image signal processing, and the display image is displayed. Accordingly, a photographer is informed about angle of view information needed to capture a desired image, and the photographer may easily select an interchangeable lens having desired angle of view information.
US08593555B1 Digital device and method for controlling the same
The disclosure relates to a digital device and a method for controlling the same, and more particularly, to a digital device for simultaneously capturing a landscape-oriented picture and a portrait-oriented picture and displaying the landscape-oriented picture or the portrait-oriented picture according to the mode of the digital device (landscape mode or portrait mode), and a method for controlling the same.
US08593554B2 Solid-state imaging apparatus, camera, and method of manufacturing solid-state imaging apparatus
A solid-state imaging apparatus includes a plurality of photoelectric conversion units configured to generate signal charge from light received at light-receiving surfaces thereof, the plurality of photoelectric conversion units being provided in the image-sensing area of a substrate; a charge reading unit configured to read signal charge generated by the photoelectric conversion units, a charge readout channel area thereof being provided in the image-sensing area of the substrate; a transfer register unit configured to transfer signal charge read from the plurality of photoelectric conversion units by the charge reading unit, a charge transfer channel area thereof being provided in the image-sensing area of the substrate; and a light-shielding unit that is provided in the image-sensing area of the substrate and that has an opening through which light is transmitted formed in an area corresponding to a light-receiving surface of a respective photoelectric conversion unit.
US08593553B2 Solid-state imaging device and electronic apparatus
A solid-state imaging device including a photoelectric conversion portion; a floating diffusion region; a transfer gate electrode made of an n-type semiconductor; a sidewall made of an n-type semiconductor formed on the photoelectric conversion portion side of the transfer gate electrode with an insulating film therebetween; and a sidewall made of an insulating layer formed on the floating diffusion region side of the transfer gate electrode.
US08593550B2 Method of driving an image sensor with blooming current
For driving an image sensor having a pixel with a transfer gate formed between a photo-detector and a floating diffusion region, a noise-reducing voltage is applied on the transfer gate during a first period of an integration mode. A blooming current voltage is applied on the transfer gate during a second period of the integration mode. A read voltage is applied on the transfer gate during a read mode after the integration mode. The read voltage has a higher magnitude than the blooming current voltage. With application of the noise-reducing voltage, noise is reduced and a dynamic range is extended for the image sensor.
US08593548B2 Apparataus and method of automatic color shading removal in CMOS image sensors
A method of processing an image includes the steps of separating an image into multiple color channels, and dividing the image into multiple zones, in which each zone includes a sub-array of pixels. The method then calculates a color shading profile for each zone. The color shading profile is calculated as a linear function, typically a straight line. If a linear function cannot be determined for that zone, the method interprets a function for that zone using the nearest zone neighbors. The method corrects the color shading using the functions calculated for the respective zones.
US08593546B2 Image processing apparatus, image processing method, and camera module for detecting and correcting defective pixels based on contrast and illuminance
According to one embodiment, an image processing apparatus includes a defect correction unit, a noise reduction processing unit, and an output selection unit. The defect correction unit includes a contrast determination unit and an illuminance determination unit. The output selection unit selects the output from the defect correction unit when a target pixel is determined to be a defect. The defect correction unit enables a correction value to be output as a signal value which is applied to the target pixel in accordance with the contrast determination and the illuminance determination.
US08593544B2 Imaging apparatus, imaging method, and computer-readable recording medium
An imaging apparatus including an imaging unit that captures images of a photographic subject and continuously generates electronic image data; a display unit that displays, at a predetermined display frame rate, images corresponding to the image data generated by the imaging unit; an image processing unit that either performs a first-type special effect operation that can be displayed at the predetermined display frame rate or performs a second-type special effect operation that can be displayed at a faster display frame rate than the predetermined display frame rate; an operation input unit that receives input of a change instruction signal that provides an instruction for changing a combination of image processing operations during a special effect operation performed by the image processing unit; and a control unit that instructs the image processing unit to switch the special effect operation from the first-type special effect operation to the second-type special effect operation.
US08593543B2 Imaging apparatus
An imaging apparatus includes: an image sensor that converts an optical image to electronic image information; an image processor that carries out image processing on the electronic image information obtained via the image sensor to obtain image data; a tilt angle detector that detects a tilt angle of the imaging apparatus; an image display that displays the image data; and a blurred area setter that sets a blurred area and a non-blurred area to the image data in cooperation with the image processor and the image display, wherein a blurred area automatic changer that automatically changes the blurred area and the non-blurred area on the image display in accordance with the tilt angle of the imaging apparatus obtained by the tilt angle detector is provided in the image processor.
US08593541B2 Image processing under flickering lighting conditions using estimated illumination parameters
Methods for estimating illumination parameters under flickering lighting conditions are disclosed. Illumination parameters, such as phase and contrast, of a intensity-varying light source may be estimated by capturing a sequence of video images, either prior to or after a desired still image to be processed. The relative average light intensities of the adjacently-captured images are calculated and used to estimate the illumination parameters applicable to the desired still image. The estimated illumination parameters may be used to calculate the point spread function of a still image for image de-blurring processing. The estimated illumination parameters may also be used to synchronize the exposure timing of a still image to the time when there is the most light, as well as for use in motion estimation during view/video modes.
US08593540B2 Active imaging device and method for speckle noise reduction including frequency selection
An active imaging device for imaging a scene includes a scene illuminator that illuminates the scene, a radiation detector that detects radiation received from the scene, a feature identifier that analyses the detection data and identifies different features in the scene, a frequency selector that separately selects for the identified features one or more selected illumination frequencies resulting in the minimum speckle noise in an image of the respective feature constructed from the detection data.
US08593537B2 Image sensing apparatus, control method thereof, and program for suppressing image deterioration caused by foreign substance
An image sensing apparatus includes an image sensing unit having an image sensor, an optical member which is arranged in front of the image sensor, a foreign substance detection unit which detects, from a foreign substance detection image including the image of a foreign substance adhered to the surface of the optical member, a recording unit which, when shooting a moving image, records moving image data generated based on image signals successively output from the image sensing unit, and records foreign substance information and lens information in addition to the moving image data, and a lens information obtaining unit which, when the lens information is updated by operating the imaging lens by a user during moving image shooting, obtains the updated lens information. When the lens information obtaining unit obtains the updated lens information, the recording unit records the updated lens information in addition to the moving image data.
US08593532B2 Optical image stabilizer employing a scratch drive actuator
The present invention provides an optical image stabilizer including: a substrate; a table which faces the substrate and has an image sensor mounted on its upper surface to be horizontally actuated on the substrate; supporting members for supporting the table on the substrate; and a scratch drive actuator for actuating the table, and a method for manufacturing thereof.
US08593530B2 Image stabilization device, image stabilization method, and program
Provided is an image stabilization device including an image capturing unit for capturing an image of a face of a user, a motion detection unit for detecting motion of the face whose image has been captured by the image capturing unit, a motion prediction unit for predicting motion of the face to be detected at a next time point, based on the motion of the face detected in time-series by the motion detection unit, an image data display unit for displaying image data, and a motion correction unit for performing control on the image data display unit to move the image data in a direction of cancelling the motion of the face predicted by the motion prediction unit.
US08593529B2 Vibration correction control circuit for correcting displacement of an optical axis due to vibration including camera shake and image pickup apparatus equipped therewith
An integration circuit integrates an angular velocity signal outputted from a vibration detection element and generates a shift amount signal indicating the shift amount of an imaging device. A control unit samples a plurality of amplitude values of an acceleration signal during a predetermined unit period in the panning state or the tilting state. When an average value of the sampling values exists nearer to zero than a predetermined basic threshold value, it is judged that the panning state or the tilting state is terminated.
US08593526B1 Apparatus for measuring noise in an analog signal
Techniques are disclosed relating to video signal-to-noise ratio (VSNR) measurement. In one embodiment, an analog television signal receiver includes a measurement circuit configured to measure noise in a video signal over one or more intervals that correspond to a horizontal control signal of the video signal and a control unit configured to determine a VSNR based on the measurement. In another embodiment, a first noise calculation circuit is configured to determine first noise information from a video signal and a second noise calculation circuit is configured to determine second noise information from a video signal in a manner different from the first noise calculation circuit. A control unit may be configured to generate a VSNR based on one or both of the first noise information and the second noise information.
US08593525B2 Phasor-based pulse detection
A phasor-based pulse detection system includes a first multiplier stage configured to apply a first delayed conjugate multiplication operation to an input signal. The system can also include a second multiplier stage coupled to the first multiplier stage and configured to apply a second delayed conjugate multiplication operation to an output of the first multiplier stage, and an absolute value unit coupled to the second multiplier stage and configured to perform an absolute value operation on an output of the second multiplier stage. The system can further include video filter stage coupled to the absolute value unit and configured to perform a video filtering operation on an output of the absolute value unit. The system can also include a hysteresis detector coupled to the video filter stage, the hysteresis detector configured for detecting a signal in a filtered video signal received from the video filter stage.
US08593524B2 Calibrating a camera system
A method of calibrating a camera system which is capable of recording at least two images simultaneously is described. The method comprises the step of processing a first pair of images, wherein the processing step comprises transforming at least one of a first and a second image of the first pair through a projective map on a plane, the map depending on one or more parameter values, so as to align an epipolar line in the first image with a corresponding epipolar line in the second image of the first pair, resulting in a second pair of images. The method further comprises estimating respective values for a disparity, which values associate respective first pixels along a first epipolar line in a first image of the second pair with respective second pixels along a corresponding second epipolar line in a second image of the second pair, and displacing respective pixels of the first epipolar line in the first image of the second image pair in accordance with a respective value of the disparity for the respective pixels. The method further comprises determining a measure of error between the first and the second image of the second image pair, dependent on the one or more parameters, determining an update for the one or more parameter values for reducing a value of the measure of error, and updating the one or more parameter values, using the update.
US08593522B2 Digital camera, image processing apparatus, and image processing method
An image processing apparatus includes a storage unit storing a first transform parameter corresponding to a first picture and information about an initial region; a transform parameter calculation unit calculating a second transform parameter according to an image-capture environment for a second picture; and a first picture transform unit transforming at least one of the first and second pictures using the first and second transform parameters. Additionally, a tracking processing unit tracks the images of the target by searching for a region having an amount of characteristics that is close to an amount of characteristics of the initial region; a second picture transform unit transforms the second picture using a third transform parameter having less variation between pictures successively captured than the second transform parameter; and an output unit outputs a search result and a picture obtained through the transformation by the second picture transform unit.
US08593516B2 Method for determining the distance between two external stores on an aircraft or aerial vehicle during the separation of one of the external stores
Method for determining a distance between two external stores on an aircraft or aerial vehicle and aircraft with at least two external stores. The method includes separating one of the two stores from the aircraft or aerial vehicle in flight, and determining a chronological course of a distance during the separation operation with at least one magnetic field sensor.
US08593515B2 Method for quality control of plastic containers
A method for quality control of a stretch-blow-molded plastic container by inspecting its base, which method is easy to execute and is not highly susceptible to faults. Such inspection of the container bases includes determining quality features such as the surface area of an unstretched and/or only slightly stretched region of the base of the plastic container.
US08593513B2 Image capturing apparatus having first and second light reception sections, image capturing method, and computer-readable medium
An image capturing apparatus includes: a light irradiation section that irradiates a subject with a plurality of irradiation light rays resulting from combining light rays having respectively different spectrum forms in respectively different combinations, at respectively different timings; and an image capturing section that captures a plurality of images of the subject irradiated with the plurality of irradiation light rays, at respectively different timings.
US08593512B2 Device and method for scanning an object on a working surface
A device and method for scanning an object on a working surface, the device comprising: a body located adjacent to the working surface; two or more cameras mounted on the body at a location elevated adjacently above the working surface for capturing images of the object on the working surface, the two or more cameras being angled such that their range of image captures overlap and the common overlapping region of the range of image captures of the two or more cameras corresponds with the size of the working surface, the two or more cameras being spaced apart such that each of the two or more cameras captures a different angle of the common overlapping region; and a processing unit capable of correcting skewed images of the working surface captured by the two or more cameras and capable of converting the images captured by the two or more cameras into a three dimensional image.
US08593510B2 Image display apparatus and operating method thereof
An image display apparatus and an operating method thereof are provided. The image display apparatus may determine the location of a user, and may display a 3D object in consideration of the location of the user. If the user moves his or her eyes or hands, the location of the 3D object may change accordingly.
US08593509B2 Three-dimensional imaging device and viewpoint image restoration method
A three-dimensional imaging device (10) according to an aspect of the present invention, which outputs first and second viewpoint images due to a pupil division on a light flux from a single imaging optical system (12, 14), includes a defocus map calculation unit (61) calculating a defocus map representing a defocus amount at each position in the first and second viewpoint images; a restoration filter storage (62) storing restoration filters corresponding to the defocus amount and an image height at each position in the viewpoint images, the restoration filters being deconvolution filters based on a point image intensity distribution representing an imaging performance of the imaging optical system; and a restoration unit (63) selecting a restoration filter, which corresponds to the defocus amount and the image height at each position in the viewpoint images, for each position in the first and second viewpoint images, and restoring the first and second viewpoint images by performing a deconvolution for each position in the first and second viewpoint images based on the selected restoration filter.
US08593505B2 Videcoconferencing method and system for connecting a host with a plurality of participants
A system that incorporates the subject disclosure may include, for example, a method for selecting, by a first party device, a second party device from a queue of devices, transmitting, by the first party device, video of a first party device to the second party device, receiving, by the first party device, video of the second party device while the first party device does not receive video from a plurality of devices other than the second party device, and transmitting, by the first party device, combined video of the first and second devices to the plurality of devices other than the second party device. Other embodiments are disclosed.
US08593503B2 Videoconferencing terminal and method of operation thereof to maintain eye contact
A videoconferencing terminal, a method of videoconferencing and a videoconferencing infrastructure. In one embodiment, the terminal includes: (1) a flat panel display and (2) a camera associated with the flat panel display and configured to receive light from an object through the flat panel display and acquire an image of the object.
US08593500B2 Video conference device and method for using the same
A video conference (VC) device for communicating with VC terminals includes a VC box and a set-top box (STB). The VC box includes a VC controller module, a media stream receiver module, and a decoder module. When a session is established between one of the VC terminals and the VC box, the VC controller detects if the decoder module is available. When the decoder module is available, the media stream receiver module receives a media stream sent from the VC terminal and transmits the media stream to the decoder module, and the decoder module processes the media stream to generate corresponding video and audio signals for the session. When the decoder module is unavailable, the media stream receiver module transmits the media stream to the STB, and the STB processes the media stream to generate corresponding video and audio signals for the session.
US08593499B2 Apparatus and method for improving video telephony quality using metadata based on radio signal strength
A method and apparatus for Video Telephony (VT) based on the radio signal strength in a radio terminal are provided. The method includes performing a signaling process for the VT, determining audio/video codecs to be used in the VT by considering the radio signal strength during the signaling process, performing the VT, and reconfiguring the audio/video codecs to be used in a VT process by considering the radio signal strength during the VT.
US08593498B2 Medium processing device, and control method for a medium processing device
A hybrid processing device having printheads that records on a check conveyed through a medium conveyance path includes a first sensor that detects insertion of a check from the recording medium entrance of the medium conveyance path, a second sensor that detects discharge of the check from the recording medium exit of the medium conveyance path, and a third sensor that detects presence of a check between the first and second sensors. It is determined that the recording medium has been removed from the conveyance path, when the recording medium detectors change from a first state, in which at least one of the recording medium detectors detects that the recording medium is present, to a second state, in which none of the recording medium detectors detect that the recording medium is present.
US08593490B2 Voltage regulation method
A voltage regulation method is provided and includes the following steps. A plurality of fixed voltages is provided to a gray-level resistor string, and a plurality of gray-level voltages and the fixed voltages are divided into a first voltage group and a second voltage group according to signal-to-noise ratios of the gray-level values. It is to determine whether the regulated fixed voltage is used to regulate a gray-level voltage corresponding to low gray-level value according to different voltage group. When the regulated fixed voltage is used to regulate the gray-level voltage corresponding to low gray-level value, it is determined whether the fixed voltage is regulated again by measuring a luminance value of a gray-level voltage having higher signal-to-noise ratio.
US08593488B1 Shape distortion
A method for distorting drawing objects using a graphics editing application is provided. The method includes receiving a vector drawing object on a drawing area of the graphics editing application. The method also includes selecting a distortion feature of the graphics editing application. Furthermore, the method includes applying the distortion feature to the vector drawing object on the drawing area of the graphics editing application.
US08593474B2 Method and system for symmetric allocation for a shared L2 mapping cache
A method, apparatus, system and medium for reading data from a tiled memory. In some embodiments a method may, include for one tiled-X cache read request, requesting two cache lines from the tiled memory without fragmenting the tiled-X cache read request, and returning data associated with the two requested cache lines.
US08593467B2 Multi-context graphics processing
A method of managing multiple contexts for a single mode display includes receiving a plurality of tasks from one or more applications and determining respective contexts for each task, each context having a range of memory addresses. The method also includes selecting one context for output to the single mode display and loading the selected context into a graphics processor for the display.
US08593465B2 Handling of extra contexts for shader constants
The present invention provides a system for handling extra contexts for shader constants, and applications thereof. In an embodiment there is provided a computer-based method for executing a series of compute packets in an execution pipeline. The execution pipeline includes a first plurality of registers configured to store state-updates of a first type and a second plurality of registers configured to store state-updates of a second type. A first number of state-updates of the first type and a second number of state-updates of the second type are respectively identified and stored in the first and second plurality of registers. A compute packet is sent to the execution pipeline responsive to the first number and the second number. Then, the compute packet is executed by the execution pipeline.
US08593454B2 Image generation device and operation support system
An image generation device generates an output image based on a plurality of input images image-taken by a plurality of image-taking parts mounted to a body to be operated. A coordinates correspondence part causes coordinates on a columnar space model, which is arranged to surround the body to be operated and having a center axis and a side surface, to correspond to coordinates on a plurality of input image planes on which the input images are positioned, respectively. An output image generation part generates the output image by causing values of the coordinates on the input image planes to correspond to values of the coordinates on an output image plane on which the output image is positioned through coordinates on the space model. A distance between the center axis and the side surface of the columnar space model is determined in accordance with installation positions of the image-taking parts.
US08593453B2 Monitoring user attention in a computer-simulated environment
Provided are methods, data processing systems and computer program product for monitoring user activity and monitoring the effectiveness of objects within a virtual environment such as an immersive, computer-simulated 3D environment. An embodiment of the invention monitors the attention given to a virtual object by one or more avatars, by associating a viewing region with each object that requires attention monitoring, and detecting when an avatar is within the viewing region of the object simultaneously with the object being within an attention region (typically a clipped field of view) of the avatar. The viewing region is a 3D volume within which a surface of the virtual object is deemed to be effectively viewable.
US08593452B2 Face feature vector construction
Systems, methods, and computer readable media for determining and applying face recognition parameter sets are described. In general, techniques are disclosed for identifying and constructing a unique combination of facial recognition discriminators into a “face feature vector” that has been found to be more robust (e.g., stable to image noise, a person's pose, and scene illumination) and accurate (e.g., provide high recognition rates) than prior art techniques. More particularly, a face feature vector may be generated by the combination of shape descriptors (e.g., as generated by two-dimensional and three-dimensional shape models) and texture descriptors (e.g., as generated by global and local texture models).
US08593451B2 Apparatus and method for generating octree based 3D map
A method of generating a 3D complex octree map. A plurality of points each having 3D location information are detected from a range image. A space having the detected plurality of points is represented using grids. If points in a grid forms a plane, the grid is not subdivided and planar information about the plane is stored. A space not forming a plane is subdivided, thereby enhancing the storage efficiency.
US08593447B2 Voltage adjustment circuit and display device driving circuit
A voltage adjustment circuit for adjusting a voltage to be supplied to scanning lines of a display device includes a slope adjustment circuit configured to adjust a slope of a decrease in the voltage based on data that is externally input, and a clamp voltage adjustment circuit configured to adjust a voltage value at which the voltage is clamped based on the data.
US08593435B2 Optical touch apparatus with high resolution and method of operating the same
An optical touch apparatus includes an inputting interface, an optical module, a light receiving module, and a processing module. The inputting interface includes a surface and a light transmitting unit under the surface. The optical module and the light receiving module are set on a first side and a second side of the inputting interface. The optical module receives an incident beam and generates a plurality of parallel sensing lights according to the incident beam. When the plurality of parallel sensing lights pass the light transmitting unit to the light receiving module, the light receiving module generates a sensing result according to the condition the light receiving module receives the plurality of sensing lights. The processing module determines a touch point position formed on the surface according to the sensing result.
US08593433B2 Touch detection for a digitizer
A detector for providing position detection of objects over a sensor with a first and second set of conductor lines forming a grid with a plurality of junctions there between at which the conductor lines do not contact, includes a signal generator providing a signal to at least one conductor line of the first set of conductor lines, and circuitry detecting output arising from one or both of an electromagnetic stylus and one or more fingers when present. The output arising from each of the one or more fingers is detected from at least one conductor line of the second set of conductor lines in response to the signal provided to the at least one conductor line of the first set of conductor lines. The circuitry detects positions of one or both the electromagnetic stylus and each of the one or more fingers when present responsive to the output detected.
US08593432B2 Sample and hold analog front end for a capacitive touchpad
A massively parallel capacitive touchpad architecture that enables the taking of simultaneous measurements that can be used to mathematically divide out and cancel the effect of the noise in one axis by isolating the noise to only the electrodes under or near the fingers being detected by using a sample and hold circuit that provides advantages over existing measurement circuits.
US08593430B2 Method, device and terminal apparatus for processing capacitance of respective layers of multi-touch panel
A device and a terminal apparatus for processing capacitance of respective layers of a multi-touch panel in the field of multi-touch panels. The method includes scanning to capture capacitance values detected by respective sensors of each layer of the multi-touch panel when the multi-touch panel is touched at multiple positions, and processing the captured capacitance values; converting the processed capacitance values into respective digital capacitance parameters; processing the respective digital capacitance parameters. The invention has the advantageous effect that the capacitance of each layer of the multi-touch panel could be detected and controlled such that the capacitance of each layer falls within a consolidated and controllable range, thereby ensuring an accurate and reliable positioning of multiple simultaneous finger touch on the panel.
US08593426B2 Identifying contacts on a touch surface
Apparatus and methods are disclosed for simultaneously tracking multiple finger and palm contacts as hands approach, touch, and slide across a proximity-sensing, multi-touch surface. Identification and classification of intuitive hand configurations and motions enables unprecedented integration of typing, resting, pointing, scrolling, 3D manipulation, and handwriting into a versatile, ergonomic computer input device.
US08593425B2 Touch sensor panel design
A touch sensor panel including a plurality of drive lines crossing a plurality of sense lines, forming an array. The plurality of drive lines and the plurality of sense lines are formed by interconnecting sections of at least one conductive material having a truncated diamond shape or formed of interconnected conductive lines. At least one conductive dummy region may be disposed in an area of the touch sensor panel around the truncated diamond shape sections or interconnected conductive lines of the plurality of drive lines and the plurality of sense lines. One or more lines may be formed overlapping the interconnected sections of each of the plurality of drive lines and the plurality of sense lines.
US08593417B2 Operation apparatus for in-vehicle electronic device and method for controlling the same
An operation surface detects a touch point specified by an operator. An imaging area obtains a hand image of the operator. A fingertip detection unit detects a fingertip of the hand image. A display device includes a display screen having coordinates uniquely corresponding to the operation surface and the imaging area. The display device indicates the fingertip and an operation panel specific to an in-vehicle electronic device to be operated. An interface engine having a prescribed interface relationship between an input, which is specified by at least one of the touch point and the fingertip, and an output to be outputted to the in-vehicle electronic device according to a combination of the input and the interface relationship. An alteration unit alters the interface relationship according to a detected traveling state of the vehicle.
US08593416B2 Touch device for increasing control efficiency and driving method of touch panel thereof
A touch device includes a touch panel, a sensing unit, and an operation unit is provided. The sensing unit is coupled to the touch panel, for scanning a scan area of the touch panel to output a touch signal. The operation unit is coupled to the sensing unit, for determining the scan area according to the touch signal. When the touch signal corresponds to a first close path, the operation unit defines a close area formed by the first close path as the first sub touch area. When the first sub touch area is undefined, the operation unit chooses a whole touch area of the touch panel as the scan area. When the first sub touch area is defined, the operation chooses the first sub touch area as the scan area.
US08593413B2 Sensory structure of capacitive touch panel and capacitive touch panel having the same
A two-dimensional sensory structure for the capacitive touch panel is provided. The provided two-dimensional sensory structure includes a substrate having plural first metal structures and second metal structures on a first surface thereof, a dot-like insulating layer located on the substrate and composed of plural insulating dots, and an electrode layer located on the dot-like insulating layer and composed of plural conductive traces. The insulating dots are each corresponding to the first metal structures respectively, and thereby a first part of the conductive traces arranged along a first direction are electrically connected to each other, and the conductive traces that are arranged along a second direction are electrically insulated therefrom. The thickness of the touch panel according to the invention is effectively reduced.
US08593403B2 Pointing stick device
The present invention provides a pointing stick device circuit which is using fewer components. The circuit is using current sources instead of voltage sources. This will be more convenient to integrate the circuit and largely reduce the cost. Also, using this circuit and the relative process, the requirement of high quality and low tolerance of some critical components is reduced. The performance of the device is improved.
US08593402B2 Spatial-input-based cursor projection systems and methods
Exemplary spatial-input-based cursor projection systems and methods are disclosed herein. An exemplary method includes a cursor projection system detecting spatial input provided by a user within a physical user space associated with a display screen, determining that the spatial input is associated with a request for cursor projection, and mapping the spatial input to at least one cursor position on the display screen based on at least one of a plane projection heuristic and a vector projection heuristic. Corresponding systems and methods are also disclosed.
US08593401B1 Mobile terminal including a double-sided display unit and controlling method thereof
A mobile terminal including a first display unit and a second display unit using an e-paper display panel, and a sensor unit configured to detect an input signal and transmit the detected input signal to a processor. The processor is further configured to detect a trigger signal to switch the mobile terminal to a standby state, display a standby state preview interface in the first display unit displaying a content currently displayed in the second display unit, and if an input signal for the standby state preview interface is not detected within a predetermined time, switch the mobile terminal to the standby state without changing the content displayed in the second display unit.
US08593395B1 Display response enhancement
Display enhancement improves performance of constrained display devices such as electrophoretic displays (EPDs). With display enhancement, a display controller rapidly writes area updates to the display, while a union of the area updates is maintained. Area updates which the display controller cannot present are discarded, while the union provides a representation of what area on the screen has been affected. A repair operation takes place which generates an area update encompassing the areas which may have been affected.
US08593393B2 Backlight unit and display apparatus having the same
A display apparatus includes a display panel which is divided into a plurality of display areas; a plurality of light guide plates which transmit light to the display areas of the display panel; a plurality of light source modules alternately arranged with and interposed between the light guide plates, each light source module being disposed along a lateral side of an adjacent light guide plate and including a plurality of light sources for emitting light to the lateral side of the adjacent light guide plate, and a module substrate on which the light sources are mounted; and a plurality of reflective plates which reflect the light emitted by the light sources and transmitted by the light guide plates, wherein each of the reflective plates is interposed between a rear surface of a corresponding light guide plate and at least one module substrate.
US08593391B2 Liquid crystal display device control circuit and liquid crystal display system, which adjust brightness of display image by using height distribution of gradations of input image
A liquid crystal display control circuit includes a current reduction rate setting circuit analyzes original gradations of pixels in an input image signal and sets a current reduction rate; a light emitting element control circuit adjusts a drive current of the light emitting element in response to the current reduction rate; a gradation changing circuit generates a display image signal in which the original gradations are changed to the display gradations; and a liquid crystal panel control circuit sets a transmittance of the liquid crystal panel in response to the display gradations of pixels included in the image display signal.
US08593388B2 Liquid crystal display device and driving method of the same
A liquid crystal display device includes a liquid crystal panel, gate and data drivers providing the liquid crystal panel with gate and data signals, and a timing controller receiving input signals that include an image signal, a sync signal, a data enable signal and a clock signal, wherein the timing controller includes a gate control signal generator controlling the gate driver, a data control signal generator controlling the data driver, a data processor supplying the image signal to the data driver, and a vertical enable signal generator generating a vertical enable signal according to the data enable signal and controlling the gate control signal generator and the data control signal generator.
US08593384B2 System for displaying images
A system for displaying images includes a transflective display panel and a light source module oppositely disposed thereto. The light source module includes a light guide plate, a plurality of first light-emitting diodes (LEDs), a plurality of second LEDs, and a lighting control unit electrically connected to the pluralities of first and second LEDs. The light guide plate includes a first portion and a second portion corresponding to a first display region and a second display region of the transflective display panel, respectively. Each first LED is a white light-emitting diode and transmits an emitted light therefrom to the first display region by the first portion of the light guide plate. The plurality of second LEDs includes red, green, and blue LEDs and transmits an emitted light therefrom to the second display region by the second portion of the light guide plate.
US08593383B2 Liquid crystal display with precharge circuit
A liquid crystal display has a substrate, data lines, scan lines, pixel units and a pre-charge circuit. The data lines are disposed on the substrate in a first direction. The scan lines are disposed on the substrate in a second direction substantially perpendicular to the first direction. The pixel units are respectively disposed at the intersections of the data lines and the scan lines. The pre-charge circuit includes a pre-charge potential, a pre-charge capacitor and a pre-charge switch. The pre-charge capacitor has a first electrode coupled to the pre-charge potential. The pre-charge switch has a first terminal for receiving a pre-charge signal, a second terminal coupled to one of the data lines, and a third terminal coupled to a second electrode of the pre-charge capacitor.
US08593382B2 Liquid crystal display device
It is to make the sizes of “blur” in a moving image uniform in a liquid crystal display unit of a hold-type display device by suppressing deformations and discolorations of the moving image caused due to ununiformity in the response speed of the liquid crystal panel. The display device includes a frame memory and a correction frame signal generating device as correction frame signal generating devices which compare pixel gradation levels defined by one frame and a frame one before among the image signals inputted from the outside, and generate an image signal of a correction frame for reducing a delay in the response time of the pixel. At the same time, the liquid crystal display device displays the correction frame on the liquid crystal panel between that one frame and the frame one before.
US08593378B2 Organic light emitting display
An organic light emitting display device capable of displaying an image of uniform brightness. A scan driver drives scan lines and light emitting control lines that are formed parallel to each other. A data driver drives data lines formed at a direction intersecting the scan lines and the light emitting control lines, and pixels are disposed to be coupled with the scan lines, the light emitting control lines, and the data lines. An auxiliary line is formed parallel to the data lines. One side of the auxiliary line is coupled with a reference power supply and another side of the auxiliary line is coupled with a current source. Connectors are disposed at crossing areas of the auxiliary line and the scan lines. A voltage transfer unit is coupled with the connectors and transfers a voltage supplied to the connectors to the data driver.
US08593377B2 Signal line driving circuit and light emitting device
The invention relates to a signal line driving circuit having a first and a second current source circuits, a shift register, and a constant current source for video signal, in which the first current source circuit is disposed in a first latch and the second current source circuit is disposed in a second latch. The first current source circuit includes capacitive means for converting the current supplied from the constant current source for video signal into a voltage, according to a sampling pulse supplied from the shift register, and supplying means for supplying the current corresponding to the converted voltage.
US08593376B2 Active matrix electroluminescent display devices
An active matrix electroluminescent display device has an array of current—driven electroluminescent display elements (20), for example comprising organic electroluminescent material, whose operations are each controlled by an associated switching means (10) to which a drive signal for determining a desired light output is supplied in a respective address period and which is arranged to drive the display element according to the drive signal following the address period. Each switching means comprises a current mirror circuit (24, 25, 30, 32) which samples and stores the drive signal with one transistor (24) of the circuit controlling the drive current through the display element (20) and having its gate connected to a storage capacitance (30) on which a voltage determined by the drive signal is stored. Through the use of current mirror circuits improved uniformity of light outputs from the display elements in the array is obtained.
US08593375B2 Eye gaze user interface and method
A software controlled user interface and method for an eye gaze controlled device, designed to accommodate angular accuracy versus time averaging tradeoffs for eye gaze direction sensors. The method can scale between displaying a small to large number of different eye gaze target symbols at any given time, yet still transmit a large array of different symbols to outside devices with minimal user training. At least part of the method may be implemented by way of a virtual window onto the surface of a virtual cylinder, with eye gaze sensitive symbols that can be rotated by eye gaze thus bringing various groups of symbols into view, and then selected by continual gazing. Specific examples of use of this interface and method on an eyeglasses-like head-mountable, vision-controlled, device are disclosed, along with various operation examples including sending and receiving text messages, control of robotic devices and control of remote vehicles.
US08593374B2 Output device and wearable display
A headphone includes a pad which is brought into contact with a human head, an enclosure which outputs an audio, and a dome as means for adjusting quality of the audio output by resonating or absorbing the sound wave emitted from the enclosure. The dome has no parts other than those used for absorbing and reflecting audio and is almost hollow. In the dome is arranged a circuit substrate by using a circuit support part having a shape not blocking the air flowing in the dome. Such a circuit substrate is also built in the other headphone. The circuit substrates arranged in the dome of the headphone are connected by a cable arranged inside a head band or an FPC for transmission of a signal and power supply. Thus, it is possible to provide an output device which can solve the problem of the dimensions for containing operation processing devices and the problem of heat dissipation.
US08593372B2 Foldable display device
A foldable display device includes a first display panel which displays a portion of an image; a second display panel which displays a second portion different from the first portion of the image; a first protecting window on the first display panel; a second protecting window on the second display panel; and a flexible material layer between the first and second protecting windows. Side surfaces of the first and second protecting windows which contact the flexible material layer, respectively, are inclined with respect to a surface of each of the first and second protecting windows.
US08593358B2 Active antennas for multiple bands in wireless portable devices
Wireless devices, and particularly mobile devices such as cellphones, PDAs, computers, navigation devices, etc., as well as other devices which transmit or receive data or other signals at multiple frequency bands utilize at least one antenna to transmit and receive and a plurality of different bands (e.g., GSM cellular communication band; Bluetooth short range communication band; ultrawideband (UWB) communications, etc.). These wireless devices can simultaneously transmit or receive at a plurality of different bands, or simultaneously transmit and receive at different bands. The wireless devices have the ability to use a single physical structure (e.g., an antenna) for transmission and reception of many different bands. The antenna can be either actively tuned or passively tuned using one or more elements.
US08593357B2 Tyre having a member with an offset antenna
A motor-vehicle tire includes a sidewall and a member with an electronic device, a generally and substantially linear-shaped rectilinear wire antenna, and means of electrical connection between the wire antenna and the electronic device. The member is embedded in the sidewall in an arrangement such that the antenna is oriented circumferentially with respect to the tire and the connection means is oriented in a radial direction of the tire. The wire antenna is integrally offset radially on one side of the electronic device.
US08593356B2 Apparatus for mounting a satellite antenna in a trunk of a vehicle
A vehicle includes a vehicle body having a trunk. The vehicle body has a deck lid covering the trunk. A satellite antenna is mounted within the trunk and is coupled to the deck lid. The deck lid includes a panel for transmitting a satellite signal therethrough and forms an entire exterior surface of the deck lid.
US08593354B2 Multi-band antenna
A multi-band antenna (1), comprising a grounding element (10) extending horizontally along a longitudinal direction, comprising a side edge (101) with a connecting point (102) and a grounding point (103) distanced from the connecting point by a length; a radiating element (11) disposed at an upper level parallel to the grounding element and defining a first end and a second end, and operating in a first frequency band; a connecting element (12) located between the radiating element and the grounding element, comprising a first portion (121) connecting to the first end of the radiating element and a second portion (122) linking to said connecting point of the grounding element; a parasitic element (13) extending from the second portion of the connecting element towards the second end of the radiating element along the longitudinal direction, and operating in a second frequency band; a feeding point (141) disposed on the second portion of the connecting element and under the parasitic element; and a feeding line (15) comprising an inner conductor connected to the feeding point and an outer conductor connected to the grounding point; wherein said connecting element, the grounding element, the feeding point and the grounding point together forming a slot (16) operating in a third frequency band.
US08593348B2 Distributed coupling antenna
An antenna including a ground plane region, a feed element having associated with it a first reactance and a coupling element having associated with it a second reactance, the second reactance being of opposite sign to the first reactance, the coupling element being coupled to the feed element and to the ground plane region and being located in close proximity to the ground plane region, wherein an impedance and hence a resonant frequency of the antenna depend on the first and second reactances.
US08593347B2 GNSS navigation aided by static data
A GNSS receiver includes a RF front end for receiving GNSS ranging signals, a navigation processor for calculating location from the ranging signals, and a repository of static data. The navigation processor includes the static data in the location calculation. Examples of static data include a digital elevation map, coordinates of tunnel entrances for use when the receiver resumes reception of the signals upon exiting a tunnel, and descriptions of structures in sufficient detail to enable multipath mitigation.
US08593345B2 Signal processing system for satellite positioning signals
A signal processing system for processing satellite positioning signals is described. The system comprises at least one processor and a signal processor operating under a number of operational modes. The signal processor includes at least one of a signal processing subsystem, a fast Fourier transform (FFT) subsystem, and a memory subsystem that are each dynamically and independently configurable in response to the operational modes. Further, the system includes a controller that couples to control transfer of data among the signal processing subsystem and the FFT subsystem via the memory subsystem. Configurability of the memory subsystem includes configuring the memory subsystem into regions according to the operational modes where each region is accessible in one of a number of manners according to the operational modes.
US08593342B2 Utilizing SBAS signals to improve GNSS receiver performance
The present invention provides methods of performing GNSS receivers' satellite signal acquisition and TTFF while taking advantage of SBAS signals. Due to a SBAS satellite's geostationary position and typically strong signal, the SBAS satellite signal can be acquired more quickly than a GPS satellite signal. Once a SBAS satellite signal is acquired the Doppler frequency search uncertainty may be reduced for remaining GNSS satellites which are to be acquired. Furthermore, a satellite search list may be optimized to search for satellites close to the line of sight (LOS) of the SBAS satellite for which a signal has been acquired, in receiver “warm” and “hot” start modes. Moreover, since a SBAS signal sub-frame is only one second long, which is shorter than six seconds for a GPS signal sub-frame, synchronization of the SBAS signal sub-frame may be achieved faster than for GPS signals. With aided time information, a receiver may compute the absolute time of week (TOW) from a sub-frame synchronized SBAS signal. Therefore, TTFF can be achieved without necessarily waiting for TOW to be decoded from a GPS signal.
US08593333B2 Radar sensor with frontal and lateral emission
A radar sensor includes a housing of radar-transmissive material, a circuit board in the housing, first and second antennas of several patch elements on the same or opposite surfaces of the circuit board, and a metal or metallized support supporting a rear surface of the circuit board. The first antenna has a beam axis that extends out through a front of the housing at an angle in a range from 45° to 90° relative to the circuit board plane. The sensor further includes a beam deflection structure arranged within the housing to deflect a beam axis of the second antenna out through the housing at an angle in a range from 0° to 45° relative to the circuit board plane.
US08593332B2 Device for detecting objects, notably dangerous objects
The present invention relates to a device for detecting objects. The device comprises at least one microwave-frequency transmitter and one microwave-frequency receiver. The receiver makes a relative rotary movement about the transmitter, a signal being transmitted toward an individual for several positions of the receiver on the circle of relative rotation, the signals reflected by points of an object and received by the receiver at the positions being supplied to processing means in order to form a radar image. The receiver and the transmitter can be installed on a disk with a very low moment of inertia. The invention applies notably for the detection of weapons or explosives carried by persons.
US08593327B2 A/D conversion circuit to prevent an error of a count value and imaging device using the same
In an A/D conversion circuit and an imaging device, an upper counter acquires a first upper count value by performing counting using one output signal, which constitutes a first lower phase signal output from a delay circuit, as a count clock. After values of bits constituting the first upper count value are inverted, the upper counter acquires a second upper count value by performing counting using one output signal, which constitutes a second lower phase signal output from the delay circuit, as a count clock, and further performing counting based on an upper count clock output from a lower counter. A modification unit modifies a logic state of a count clock to a predetermined state when the count clock of the upper counter is switched.
US08593325B2 Successive approximation analog-to-digital conversion
Examples of systems and methods are provided for converting an analog input signal to a digital output signal. A system may include a current mode (CM) digital-to-analog converter (DAC) circuit to provide a DAC current. A comparator circuit may be configured to generate a comparator signal in response to an error signal determined based on the DAC current and the analog input signal. A successive approximation register circuit may be configured to generate at least one of a DAC-code signal or the digital output signal, in response to the comparator signal. The DAC-code signal may be used by the CM DAC circuit to control the DAC current.
US08593322B2 Microcomputer, semiconductor device, and microcomputer applied equipment
In plural analog circuits that can operate in parallel and are coupled to a common analog power supply terminal, one analog circuit is controlled in the analog operation start according to timing control data that specifies an interval for suppressing the analog operation start of the one analog circuit in the analog operation cycle of the other analog circuit that has already started the analog operation. The control is conducted so that when the operation of one analog circuit starts, timing when the operation of the one analog circuit is influenced by the analog operation start of the other analog circuits in the operation cycle of the one analog circuit is retained as timing control data in advance, and the analog operation start of the other analog circuits is delayed or temporarily suppressed in synchronization with the operation start of the one analog circuit according to the timing control data.
US08593320B2 Analog conversion of pulse width modulated signals
A method of converting a periodic pulse width modulated input signal into a voltage output signal wherein the input signal is in an active state for a first portion of each of successive time periods and in an inactive state for a second portion of each time period. A first and second input is supplied to an integrator circuit and a first capacitor is coupled between a first output of the integrator circuit and the first input and a second capacitor is coupled between a second output and the second input of the integrator circuit during a first time period of the pulse width modulated signal. A third capacitor is coupled between a first output of the integrator circuit and the first input and a fourth capacitor is coupled between a second output of the integrator circuit and the second input during a successive second time period of the pulse width modulated signal. Said coupled capacitors are charged during the active state of the first and second time periods and discharged during the inactive state of the first and second time periods.
US08593318B2 Continuous time ΔΣ analog-to-digital converter with a mitigation bit shifting multiplex array
A continuous time ΔΣ analog-to-digital converter with mitigation bit shifting multiplex array including a loop filter, a VCO responsive to analog signal configured to adjust the output frequency based on the magnitude of the analog signal and produce a digital output, a multi-stage phase quantizer responsive to the digital output configured to determine the phase of the VCO by comparing the phase of the VCO for a particular sample to a reference phase at said particular sample and generate a quantized phase difference value, and a multiplexer array coupled to the multi-stage phase quantizer configured to shift selected misaligned bits of the quantized phase difference value by a predetermined amount of bits to mitigate bit shifting of the multi-stage phase quantizer.
US08593314B2 A/D conversion circuit, integrated circuit device, electronic apparatus
An A/D conversion circuit in which a control circuit that has a successive approximation register storing data updated by a successive approximation operation generates correction data for correcting non-linearity between an input analog signal and an output digital signal, and a comparison unit corrects the non-linearity based on the correction data. An A/D conversion circuit includes a comparison unit which performs comparison operation in successive approximation and a control circuit having a successive approximation register storing successive approximation data updated by the successive approximation. The control circuit outputs correction data for correcting non-linearity between an input signal and output data of the A/D conversion circuit to the comparison unit based on one or plural bits of the successive approximation data. The comparison unit corrects the non-linearity of the A/D conversion circuit based on the correction data.
US08593312B2 Method and apparatus for compressing and decompressing block unit data
An apparatus for compressing and decompressing data is disclosed. The apparatus for compressing data includes a block setting unit that divides data of at least one original file into two or more blocks, a compression unit that generates block compression data by applying a compression algorithm to data corresponding to at least one block among blocks divided by the block setting unit, and a compression file generation unit that generates a block header and the block body of the block for each block divided by the block setting unit, in which the block body includes the block compression data if the block is compressed by the compression unit or includes the original data of the block if the block is not compressed the by compression unit.
US08593310B1 Data-driven variable length encoding of fixed-length data
A data-driven encoder receives fixed-length bit fields and generates variable length bit fields that are, on average, smaller than the fixed-length bit fields. The data-driven encoder removes leading zeros from a fixed-length bit field and appends a prefix code to the remaining bits that identifies the number of remaining bits. In an embodiment, the data-driven encoder may further append leading zeros before the prefix code to produce variable length bit fields having sizes that are integer multiples of bytes. The decoder identifies the original fixed-length bit fields from the variable length encoded bit fields.
US08593307B2 Methods of compressing data in storage device
At least one example embodiment discloses a method of compressing data in a storage device. The method includes determining a codeword length of a symbol using a first table indicating a relationship between a number of occurrences of the symbol in received data and the codeword length, determining a codeword having the codeword length for the symbol, and generating compressed data of the received data, the generating including converting the symbol into the codeword.
US08593301B2 Method and system for transmitting a warning message to a driver of a vehicle
A method and system for transmitting a warning message to a driver of a vehicle is provided. Authorization for uploading message data is provided followed by the provision of message data indicative of a plurality of pre-recorded warning messages. The message data are then stored in memory of the transmitter. A responder of the emergency vehicle selects one of the plurality of pre-recorded warning messages. The message data associated with the selected warning message are then encoded and encrypted. The encrypted message data are then processed to generate a RF signal in dependence thereupon which is then transmitted to the vehicle. Upon receipt of the RF signal at the vehicle message data are generated in dependence thereupon which are then decrypted and decoded. The decoded message data are then provided to the entertainment system of the vehicle and the operation of the entertainment system is controlled such that the warning message is broadcast when the entertainment system is turned off and such that provision of other audio signals is interrupted for broadcasting the warning message when the entertainment system is turned on.
US08593300B2 Vehicle approach warning system, portable warning terminal and in-vehicle communication apparatus
A vehicle approach warning system is disclosed. The vehicle approach warning system includes: an in-vehicle communication apparatus to be mounted to a vehicle, the in-vehicle communication apparatus being configured to wirelessly transmit vehicle travel data to surroundings of the vehicle; and a portable warning terminal to be carried by a pedestrian, the portable warning terminal being configured to give, in response to receiving the vehicle travel data wirelessly transmitted from the in-vehicle communication apparatus, a warning about approach of the vehicle to the pedestrian in a way other than auditory stimulation if electric field strength at a time of receiving the vehicle travel data is larger than a threshold.
US08593296B2 System and method for turbine bucket tip shroud deflection measurement
A measurement system measures a gap between a plurality of rotating bucket tips and a stationary shroud surface. The system includes a sensor secured to the shroud surface, where the sensor senses a distance between each of the rotating bucket tips and the shroud surface, and a key phasor indexing each of the plurality of rotating bucket tips. A processor receives data from the sensor and the key phasor and calculates a shift against each of the plurality of buckets. The processor determines a time to bucket replacement based on current service hours of the plurality of rotating buckets tips.
US08593291B2 Component RFID tag with non-volatile display of component use including the use of energy harvesting
A system includes a component, an electronic circuit, and a display. The electronic circuit and the display are on the component. The electronic circuit is connected to receive data related to use of the component. The electronic circuit is connected to the display for providing a time parameter related to at least one from the group consisting of remaining life of the component and life expended by the component. The time parameter is for displaying on the display.
US08593290B2 Overfill detection system for tank trucks
An overfill probe is utilized in each compartment of a multi-compartment transport tanker and has a depending sensing tube for detecting liquid overfill conditions. An overfill detector is within the bottom end of the probe tube and is thus protected from damage. Internal damage to the probe and malfunction of the system also precluded by connecting the exposed cap of the probe to the detector by a longitudinally extensible, stretchable cable extending through the tube to the detector, or a circuit board may be retained within the depending tube. Additionally, a thermistor socket and an optic socket are provided which are part of the overfill protection system, each having contact connections that may be readily replaced when worn without removing or replacing the wiring within the socket assembly.
US08593289B1 System and method for the detection of severe weather conditions
A system and method for the detection of severe weather conditions in which radio frequency (RF) signals are received by an AM radio operating in the 525 kHz AM frequency band and the signals are filtered to remove unwanted frequencies. The energy level of the signal is then measured and if the energy level of the signal is above a threshold value, an evaluation period for the signal is initiated. During the evaluation period, the percentage of time the energy level of the signal is above the threshold value is calculated. If the percentage of time that the energy level of the signal is between about 50% and 99%, then a severe thunderstorm warning may be generated. If the percentage of time that the energy level of the signal is above 99%, then a tornado warning may be generated.
US08593288B2 Method and device for driver state detection
A method and a device for detecting the state of a driver are described. In the process, the curve of a signal which characterizes the state of the driver is evaluated, and a signal indicating the state of the driver is generated in response to a typical curve.
US08593281B2 Passage alert system and method using RFID
A passage alert system and method using a Radio Frequency IDentification (RFID) technology are provided. The method and system are capable of alerting when a mobile terminal having an RFID tag passes the entrance at which an RFID reader is installed, whereby the owner is therefore aware of the mobile terminal. In the passage alert method of the present invention, when the first communication terminal passes an entrance at which the second communication terminal is installed, one of the first and second communication terminals resets the passage mode of the first communication terminal with an output of an alert message corresponding to the changed passage mode such that the owner may be aware of the first communication terminal, thereby reducing the possibility of losing the first mobile communication terminal.
US08593280B2 Security seal
A security electronic seal is described. The electronic seal uses a first shaft to lock an asset, and a second inexpensive consumable shaft to lock the first shaft. These shafts provide an electronic means of monitoring the security of the seal. The seal can detect tampering of the asset secured by the device, and in some implementations provides a wireless notification.
US08593278B2 Medication storage device usage status notifications
A usage status notification method and corresponding medication storage device (e.g., mobile medication dispensing cart, medication cabinet, nurse server, etc.) are provided. To generate the usage status notification, the status of one or more components of the medication storage device may be monitored. An in-use notification signal may be generated if it is determined that the medication storage device is in use at a certain point in time (e.g., when a user is logged into the medication storage device). An available notification signal may be generated if it is determined that the medication storage device is available for use at a certain point in time (e.g., when a user is logged out of the medication storage device). Other types of usage status signals may also be provided.
US08593271B2 Method for the avoidance or mitigation of a collision, control apparatus for a driver assistance system and vehicle
A method is provided for the avoidance or at least mitigation of a collision between a first vehicle driving in a first lane and a second vehicle driving in a second lane when the second vehicle changes lane from the second lane o to the first lane. The method includes, but is not limited to the following steps. An impending lane change of the second vehicle from the second lane to the first lane is determined, a first distance of the second vehicle from the first vehicle and a first position of the second vehicle are determined. Furthermore, the determined first distance d1 of the second vehicle from the first vehicle is then compared with a first predetermined threshold value. The first predetermined threshold value is direction-dependent and the determined first distance of the second vehicle from the first vehicle is compared with the first predetermined threshold value in the direction of the determined first position of the second vehicle. Further, a first warning message to the second vehicle is automatically output by means of at least one signal device of the first vehicle if d1≦d0,1.
US08593260B2 System and method for varying response amplitude of radio transponders
A system and method are provided for modifying the effective reading range of an radio frequency identification tag. The tag, a chip-based tag, includes an antenna and a chip in communication with the antenna. The chip includes circuitry including field effect transistors that can modify the effective reading range of the tag by modifying characteristics of the tag including the modulation depth of the backscatter signal, the impedance characteristics of the tag front end electronics, the power consumption characteristics and the threshold power-on voltage of the tag. These characteristics are change either temporarily or permanently in response to commands communicated to the tag from a radio frequency identification reader.
US08593259B2 Method of authenticating a radio tag by a radio reader
The invention relates to a method of authenticating a radio tag by a radio reader, the tag possessing an identifier accessible to the reader via a database of tag identifiers, comprising: dispatching an authentication request by the reader to the tag, dispatching by the tag, a response, calculated by applying a first function to at least the identifier, a calculation by the tag and by the reader of a new identifier, by applying a second function to the identifier, comprising: if the response dispatched by the tag corresponds to a result obtained by applying said first function to an identifier of the base, a dispatching by the reader a first value, calculated by applying a third function to said identifier of the base.
US08593258B2 High-tensile belt-type tag and wireless radio frequency identification system employing the same
A high-tensile belt-type tag including a belt, a high-tensile transmission line, an antenna and a radio frequency identification (RFID) chip is provided, wherein the belt includes a belt body and a retaining ring. The belt body is suitable to slip into an opening of the retaining ring and preventing the belt body from slipping out of the opening. The high-tensile transmission line, the antenna and the RFID chip are disposed in the belt, and the high-tensile transmission line encircles the whole belt in accordance with a shape of the belt. Moreover, the RFID chip is coupled to the antenna through the high-tensile transmission line, wherein when the high-tensile transmission line is split as the belt is cut off, the RFID chip cannot delivers an identification code through the antenna due to split of the high-tensile transmission line.
US08593257B1 RFID-based loss-prevention system
In RFID systems employed for loss prevention, an item supplier or an ingress reader writes an ownership code associated with an organization or facility into a tag, indicating that an item to which the tag is attached is associated with the facility and not foreign. At checkout or point-of-sale an authorization reader writes a digital signature into the tag indicating that the tagged item is allowed to leave the facility. At point-of-exit an exit reader determines if the tagged item is allowed to leave the facility by verifying the ownership code and the digital signature. The loss-prevention system may issue an alert or sound an alarm if a facility-associated item is leaving the facility without a proper digital signature indicating that the item is approved to leave.
US08593255B2 Method and apparatus for providing user interaction via transponders
An approach is provided for user interaction via transponders (e.g., near field communication (NFC) tag, radio frequency identification (RFID) tag, or contactless card) disposed on a dynamically reconfigurable display. Each transponder corresponds to an area of the display that is associated with one or more actions. The actions are dynamically updated based at least in part on the content presented on the respective area of the display. A user equipment containing a transponder reader detects a signal from one of the transponders to trigger the corresponding action.
US08593251B2 Systems for detecting a febrile condition and reducing risks of spreading infection
The technology provides an external device for estimating a core body temperature of a human subject, and a system for use in a local area, such as a school, hospital, workplace, and the like. The wrist monitor device includes a casing sized and shaped to fit onto a wrist of a human subject. The casing has a first face and a second face. In addition there is a cavity in the casing that houses a heat trap. The heat trap has an opening oriented to receive incoming thermal energy and a shell of a thermal-insulation material that has an inner thermal energy-reflective surface. Detected temperature data is compiled in a database and used to estimate whether an identified individual has a core body temperature indicative of a fever. There is also provided a system for identifying persons and screening the persons for a febrile condition. The system may include the steps of: identifying a person using data input by the individual or detected from indicia of the person and previously stored data about the person; detecting a temperature condition of the person; determining whether the person has a febrile condition using the detected temperature condition and previously stored temperature data of the person; and taking action to restrict ingress, deny ingress or allow ingress, based on the determined febrile condition of the person requiring ingress.
US08593243B2 Pulsed magnet using amorphous metal modules and pulsed magnet assembly
A pulsed magnet includes a cylindrical coil part having a hollow opening, and amorphous metal modules disposed along an outer circumference of the coil part and extending in a normal direction, which results in facilitation of cooling and minimization of generation of an eddy current.
US08593240B2 Short-circuit release having an optimized coil connection
A short-circuit release is disclosed, in particular for a power circuit-breaker, including an armature and a pole, that are located inside of a coil element; and a yoke plate and a terminal connection, which are arranged around the coil element. In at least one embodiment, a coil is wound on the coil element, the two ends of which are weldable on corresponding coil terminals from the same side.
US08593239B2 MEMS structure with a flexible membrane and improved electric actuation means
The MEMS structure comprises: a flexible membrane (6), which has a main longitudinal axis (6a) defining a longitudinal direction (X), at least one pillar (3, 3′) under the flexible membrane (6), electric lowering actuation means (7) that are adapted to bend down the flexible membrane (6) into a down forced state electric raising actuation means (8) that are adapted to bend up the flexible membrane (6) into an up forced state. The electric lowering actuation means (7) or the electric raising actuation means (8) comprise an actuation area (7c or 8c), that extends under a part of the membrane (6) and that is adapted to exert pulling forces on the membrane (6) simultaneously on both sides of the said at least one pillar (3) in the longitudinal direction (X).
US08593235B2 Cavity filter thermal dissipation
A cavity filter has a resonator. The resonator is engaged by a rod having a mounting portion and a thermal dissipation portion. The mounting portion of the rod extends through the floor of the cavity filter to engage an internal surface of the resonator. The thermal dissipation portion dissipates heat from the resonator to the outside of the cavity filter.
US08593233B1 Coaxial cable multiplexor
A multiplexor includes an output having a characteristic impedance; a first input having a characteristic impedance equal to the output characteristic impedance; a second input; a first switch path including a first switch operable to connect/disconnect the first input center conductor and the output center conductor; a first input conductive path adjacent to the first switch path and being operable to provide the output characteristic impedance; a second switch path including a second switch operable to connect/disconnect the second input first signal conductor and the output center conductor; and a third switch path including a third switch operable to connect/disconnect the second input second signal conductor and the output intermediate conductor, the third switch path being operable to guard the second switch path when the third switch path is provided with a guard voltage.
US08593231B2 System and method for amplitude contorl of a crystal oscillator
In accordance with some embodiments of the present disclosure, an oscillator may include a crystal resonator and a squaring circuit coupled to the crystal resonator and configured to convert a sinusoidal signal produced by the crystal resonator to a square-wave signal, the squaring circuit comprising a bias circuit configured to transmit a selected bias voltage for the squaring circuit, the selected bias voltage selected from a plurality of potential bias voltages. In accordance with this and other embodiments of the present disclosure, an oscillator may include a crystal resonator, an inverter coupled in parallel with the crystal resonator, and a programmable voltage regulator coupled to the inverter. The programmable voltage regulator may be configured to supply a first supply voltage to the inverter during a startup duration of the oscillator, and supply a second supply voltage to the inverter after the startup duration, wherein the second supply voltage is lesser than the first supply voltage.
US08593229B2 Atomic oscillator
An atomic oscillator includes: a gas cell in which a gaseous metal atom is sealed; first and second heaters heating the gas cell; an exciting light source exciting the metal atom; a light detector detecting the exciting light; a substrate including a temperature controlling circuit for the heaters; a first wiring coupling the first heater and the substrate; a second wiring coupling the second heater and the substrate; and a third wiring coupling the first heater and the second heater. In the atomic oscillator, the gas cell includes a cylinder and windows sealing both ends of the cylinder and constituting an incident surface and an emitting surface on an optical path of the exciting light. The first and second heaters are respectively formed on the windows at an incident surface side and an emitting surface side and are made of transparent heating materials.
US08593228B2 Spread spectrum clock generators and electronic devices including the same
Spread spectrum clock generators and electronic devices including the same are provided. An electronic device may include a memory and a first circuit block configured to output a first spread spectrum clock signal and a first address for accessing the memory. The electronic device may include a second circuit block configured to operate in response to a second spread spectrum clock signal, and configured to output a second address for accessing the memory. The electronic device may include a spread spectrum clock signal generator configured to receive the first spread spectrum clock signal to generate the second spread spectrum clock signal. The memory may be configured to compare the first and second addresses to each other to output a clock generator control signal corresponding to a difference between the first and second addresses.
US08593227B2 System and method of controlling gain of an oscillator
A circuit includes a controllable oscillator and a controller coupled to the controllable oscillator. The controller is configured to provide a current control and a gain control to the controllable oscillator. The gain control is configured to change a gain of the controllable oscillator during a calibration process.
US08593226B2 Transimpedance amplifier
A circuit includes a transimpedance amplifier portion having a first input node and a second input node, and a feedback circuit portion comprising a first transistor having a drain terminal connected to the first input node, a source terminal, and a gate terminal, a second transistor having a drain terminal connected to the second input node, a source terminal, and a gate terminal, and a third transistor having a drain terminal connected to the source terminal of the first transistor and the source terminal of the second terminal.
US08593217B1 Finite input response filter in a voltage-mode driver
A FIR filter component for a voltage mode driver includes a first node, a second node, and a first switching component comprising a first transistor having a first drain/source, a gate, and a second drain/source, and also a second transistor having a first drain/source, a gate, and a second drain/source. The FIR filter component also includes a first tunable resistor coupled between the first node and a first potential, and a second tunable resistor coupled between the second node and a second potential, wherein the FIR filter component is configured to generate a first output signal at the first output node.
US08593216B2 Loop filter with noise cancellation
A loop filter with noise cancellation includes first and second signal paths, an operational amplifier (op-amp), and a noise cancellation path. The first signal path provides a first transfer function (e.g., a lowpass response) for a first signal. The second signal path provides a second transfer function (e.g., an integration response) for a second signal. The second signal is a scaled version of, and smaller than, the first signal by a factor of alpha, where alpha is greater than one. A capacitor in the second signal path may be scaled smaller by a factor of alpha. The op-amp couples to the first and second signal paths and facilitates summing of signals from the first and second signal paths to generate a control signal having op-amp noise. The noise cancellation path couples to the op-amp and provides a noise cancellation signal used to cancel the op-amp noise in the control signal.
US08593215B2 Power gating for in-rush current mitigation
The invention discloses a power gating for in-rush current mitigation. Firstly the circuit uses small power switch cells at first stage, such that those power switch cells run in saturation region. Secondly a delay unit delays a switch signal to control the dwell time of current to reduce the peak value of the current. Thirdly large power switch cells are used at the rest, such that those power switch cells operate in linear region.
US08593213B2 High efficiency regulated charge pump
Described herein are systems and methods for creating high efficiency regulated charge pumps. In an exemplary embodiment, a Dickson charge pump is combined with a low voltage amplifier to create an effective class G amplifier with high voltage outputs that achieves very high power efficiency. The charge pump capacitors are alternately driven by either the charge pump circuit or a low voltage amplifier which uses negative feedback from one or more high voltage outputs to give closed loop regulation.
US08593204B2 Amplitude conversion circuit
In an amplitude conversion circuit that converts an input signal having a small amplitude into an output signal having a large amplitude, the input signal is supplied to a gate of a transistor that discharges an output terminal through a capacitance element. A charging/discharging circuit causes a gate voltage of the transistor to be substantially equal to a threshold voltage during an inactive period of the input signal.
US08593202B2 Ringing suppression circuit
An inter-line switching element formed of a MOSFET is provided between a pair of signal lines. When the level of a differential signal changes from high to low, a control circuit turns on the FET for a fixed period thereby to suppress ringing by decreasing the impedance between the signal lines when the level of the differential signal transitions, and causing the energy of the distortion of the differential signal waveform to be absorbed by the on-resistance of the FET.
US08593200B2 Clock generator intermittently generating synchronous clock
A clock generator includes a counter unit receiving a reference clock signal to generate a timing signal, a selector receiving the timing signal to output a clock enable based on bit string data stored in a storage unit and a clock gate cell receiving the reference clock signal based on the clock, thinning some pulses out from the reference clock signal based on the clock enable so that a clock signal is maskable, and outputting an inter intermittent clock signal.
US08593198B2 Signal generator and signal strength detecting circuit having the signal generator installed therein
A signal generator includes: an adjusting circuit arranged to adjust a first amplitude of an oscillating signal to generate an adjusted oscillating signal; and a resistor ladder circuit arranged to receive the adjusted oscillating signal to generate a plurality of candidate output oscillating signals having a plurality of different amplitudes respectively and output an output oscillating signal selected from the candidate output oscillating signals.
US08593195B1 High performance memory interface circuit architecture
A programmable memory interface circuit includes a programmable DLL delay chain, a phase offset control circuit and a programmable DQS delay chain. The DLL delay chain uses a set of serially connected delay cells, a programmable switch, a phase detector and a digital counter to generate a coarse phase shift control setting. The coarse phase shift control setting is then used to pre-compute a static residual phase shift control setting or generate a dynamic residual phase shift control setting, one of which is chosen by the phase offset control circuit to be added to or subtracted from the coarse phase shift control setting to generate a fine phase shift control setting. The coarse and fine phase shift control settings work in concert to generate a phase-delayed DQS signal that is center-aligned to its associated DQ signals.
US08593190B2 Frequency generator for radiofrequency equipment and method for generating an output signal
A frequency generator generating an output signal having a predetermined output frequency, including: a local oscillator generating a reference signal having a reference frequency, and a phase-locked loop, the phase-locked loop provided with a controlled oscillator generating the output signal having the output frequency as a function of the signal at its input, and a comparator providing a signal to the controlled oscillator as a function of a phase and/or frequency comparison of a first comparison signal based on an input signal applied to a first input of the phase-locked loop with a second comparison signal based on the output signal, the frequency generator further including at least one harmonic generator generating, from the reference signal, a harmonic signal including a predetermined harmonic of the reference signal, the frequency generator applying the harmonic signal of one of the harmonic generators to the first input of the phase-locked loop.
US08593184B2 Buffer circuit with regulating function and regulating circuit thereof
A regulating circuit is used with a buffer circuit. The buffer circuit at least includes a metal-oxide-semiconductor transistor and a voltage output terminal. The voltage output terminal is connected to a drain terminal of the metal-oxide-semiconductor transistor of the buffer circuit. The regulating circuit includes a first metal-oxide-semiconductor transistor and a second metal-oxide-semiconductor transistor. The first metal-oxide-semiconductor transistor has a source terminal and a drain terminal connected to a voltage source and a connecting node, respectively. The connecting node is electrically connected to a substrate of the metal-oxide-semiconductor transistor of the buffer circuit. The second metal-oxide-semiconductor transistor has a drain terminal and a source terminal connected to the connecting node and the voltage output terminal, respectively. A substrate of the second metal-oxide-semiconductor transistor is electrically connected to the connecting node.
US08593182B2 Frequency synthesizer and associated method
A frequency synthesizer includes an oscillator for providing an RF clock, a phase shifter coupled to said oscillator for providing a shifted RF clock by changing phase of said RF clock, and a time-to-digital converter (TDC) coupled to said phase shifter for quantizing a time difference between a frequency reference clock and said shifted RF clock, wherein a range of said TDC covers significantly less than a full range of said RF clock period. An associated method is also provided.
US08593181B2 Input switches in sampling circuits
A switch may include a MOS transistor alternatively operating in an ON phase and an OFF phase, a first voltage level shifter, and a second voltage level shifter. The MOS transistor may include a source for receiving an input signal, a drain for connecting to a load, and a gate. The first voltage level shifter may be selectively coupled between the source and the gate during the ON phase, and the second voltage level shifter may be selectively coupled between the gate and the source during the OFF phase.
US08593180B2 Circuit including a negative differential resistance (NDR) device having a graphene channel, and method of operating the circuit
A circuit includes a negative differential resistance (NDR) device which includes a gate and a graphene channel, and a gate voltage source which modulates a gate voltage on the gate such that an electric current through the graphene channel exhibits negative differential resistance.
US08593177B2 Integrated circuit with timing aware clock-tree and method for designing such an integrated circuit
An integrated circuit includes a clock-tree with a plurality of clock buffers, a plurality of clocked storage elements, and a plurality of logic circuits. Each clocked storage element has a clock input terminal connected to one of the plurality of clock buffers and a weight. Each of the logic circuits is associated with two of the plurality of clocked storage elements and is characterized as having a logic depth. The weight of each clocked storage element is equal to a sum of an inverse of a logic depth of each of the plurality of logic circuits associated therewith. A first clocked storage element which has a highest weight and is adjacent to and interacts with a second clocked storage element via one of the plurality of logic circuits. A first clock buffer provides a common clock signal to the first and second clocked storage elements.
US08593176B2 One phase logic
Circuits comprising asynchronous linear pipelines and one-phase pipelines, and methods of forming asynchronous linear pipeline circuits and converting them to one-phase pipeline circuits are provided. Additional circuits, systems and methods are disclosed.
US08593175B2 Boolean logic in a state machine lattice
Disclosed are methods and devices, among which is a device that includes a finite state machine lattice. The lattice may includes a programmable Boolean logic cell that may be programmed to perform various logic functions on a data stream. The programmability includes an inversion of a first input to the Boolean logic cell, an inversion of a last output of the Boolean logic cell, and a selection of an AND gate or an OR gate as a final output of the Boolean logic cell. The Boolean logic cell also includes end of data circuitry configured to cause the Boolean logic cell to only output after an end of data signifying the end of a data stream is received at the Boolean logic cell.
US08593172B1 Secure reconfiguration of programmable logic
An integrated circuit having secure configuration includes configuration memory, programmable logic resources coupled to the configuration memory, programmable interconnection resources coupled to the configuration memory and programmable logic resources, and a configuration controller circuit coupled to the configuration memory. The configuration controller circuit is configured to read values from a configuration memory address of a portion of the configuration memory in response to a configuration memory address contained in input configuration data, and to decrypt the input configuration data using the values as a decryption key. The configuration controller is further configured to program the configuration memory of the integrated circuit with the decrypted input configuration data.
US08593171B2 Power supply monitor
Power supply variations and jitter are measured by monitoring the performance of a ring oscillator on a cycle-by-cycle basis. Performance is measured by counting the number of stages of the ring oscillator that are traversed during the clock cycle and mapping the number of stages traversed to a particular voltage level. Counters are used to count the number of ring oscillator revolutions and latches are used to latch the state of the ring oscillator at the end of the cycle. Based on the counters and latches, a monitor output is generated that may also incorporate an adjustment for a reset delay associated with initializing the ring oscillator and counters to a known state.
US08593170B2 Method and device for testing TSVS in a 3D chip stack
A method and device for testing through-substrate vias (TSVs) in a 3D chip stack are disclosed. In one aspect, the 3D chip stack includes at least a first die having a first electrical circuit and a second die having a second electrical circuit. The first die further includes at least one first TSV for providing electrical connection between the first electrical circuit and the second electrical circuit. The first die further includes test circuitry and at least one second TSV electrically connected between the first TSV and the test circuitry. The electrical connection between the first TSV and the second TSV is made outside the second die. In one aspect, this allows testing the first TSV in the first die even if the second die is not provided with dedicated test circuitry.
US08593168B2 Semiconductor device
A first power-cutoff switch is disposed between a power line and an internal power line dedicated for a circuit block, and has a current supply capacity having the level at which ON-current can protect an external examination environment. A second power-cutoff switch is disposed between a power line and an internal power line, and has a current supply capacity having the level at which ON-current can supply consumed current of the circuit block. A detecting circuit detects that a voltage of the internal power line matches a reference voltage. The first power-cutoff switch is ON/OFF by an operation state of the circuit block. The second power-cutoff switch is ON by detecting the matching of the volumes with the detecting circuit and is OFF by the ON/OFF operation of the first power-cutoff switch.
US08593166B2 Semiconductor wafer, semiconductor circuit, substrate for testing and test system
A test system includes a test substrate that transmits/receives signals to/from a semiconductor wafer, and a control apparatus to control the test substrate. The semiconductor wafer includes an external terminal coupled to an external measurement circuit, a plurality of selecting wiring lines provided to receive/transmit signals to/from the corresponding the measuring points, and a selecting section that selects one of the selecting wiring lines and that allows signal transmission between the corresponding measuring point and the external terminal through the selected selecting wiring line. The test substrate includes a measurement circuit that is coupled to the external terminal of the semiconductor wafer and that measures an electrical characteristic of a signal transmitted through the selecting wiring line selected by the selecting section, and a control section that controls which one of the measurement wiring lines is to be selected by the selecting section in the semiconductor wafer.
US08593162B2 Fuel-aspect sensor
An object of the invention is to provide a fuel-aspect sensor having higher detection accuracy. A first electrode is inserted into a hole formed in a first housing member. A cylindrical second electrode is inserted into and firmly fixed to the first electrode by a cylindrical insulating member. A first elastic member, for example, made of rubber, is arranged between the first electrode and a second housing member. The first electrode has a large-diameter portion, which is biased by the first elastic member toward a sealing surface formed on an inner wall of the hole, so as to fluid-tightly seal a space between the first electrode and the second housing member.
US08593157B2 Electromagnetic scanning imager
In one aspect, the present invention provides an imager, preferably portable, that includes a source of electromagnetic radiation capable of generating radiation with one or more frequencies in a range of about 1 GHz to about 2000 GHz. An optical system that is optically coupled to the source focuses radiation received therefrom onto an object plane, and directs at least a portion of the focused radiation propagating back from the object plane onto an image plane. The imager further includes a scan mechanism coupled to the optical system for controlling thereof so as to move the focused radiation over the object plane. A detector optically coupled to the lens at the image plane detects at least a portion of the radiation propagating back from a plurality of scanned locations in the object plane, thereby generating a detection signal. A processor that is in communication with the detector generates an image of at least a portion of the object plane based on the detection signal.
US08593156B2 Sensor assembly and microwave emitter for use in a sensor assembly
A microwave emitter for use in a microwave sensor assembly that includes an emitter body includes a first arm that extends radially outward from the emitter body. The first arm is at least partially non-linear and includes at least one peak and at least one trough. The microwave emitter also includes a second arm that extends radially outward from the emitter body. The second arm includes at least one peak and at least one trough. The first arm and the second arm generate an electromagnetic field when at least one microwave signal is received.
US08593154B2 System and method for artifact suppression in soft-field tomography
A system and method for artifact suppression in soft-field tomography are provided. One method includes obtaining an excitation pattern and applying the excitation pattern to an object, wherein the excitation pattern includes a plurality of frequency components. The method also includes measuring a response at one or more of a plurality of transducers coupled to the object and separating the responses among the plurality of frequency components to suppress one or more artifacts.
US08593153B2 Method of fault detection and rerouting
A system and method for detecting damage in an electrical wire, including delivering at least one test electrical signal to an outer electrically conductive material in a continuous or non-continuous layer covering an electrically insulative material layer that covers an electrically conductive wire core. Detecting the test electrical signals in the outer conductive material layer to obtain data that is processed to identify damage in the outer electrically conductive material layer.
US08593147B2 Resistivity logging with reduced dip artifacts
Systems and methods are disclosed for reducing boundary-related artifacts in logs taken from resistivity logging tools. Such tools often exhibit “horns” at boundaries between formation beds having different resistivities. A boundary indicator signal serves to identify the location of these boundaries. When derived from an azimuthally-sensitive resistivity tool, the bed boundary indicator may have a magnitude and shape that serves to nearly eliminate the horns even in high-dip angle environments. Logs that are processed to eliminate these artifacts are expected to be more accurate and thus easier to interpret.
US08593141B1 Magnetic resonance system and method employing a digital squid
A magnetic resonance system, comprising at least one SQUID, configured to receive a radio frequency electromagnetic signal, in a circuit configured to produce a pulsatile output having a minimum pulse frequency of at least 1 GHz which is analyzed in a processor with respect to a timebase, to generate a digital signal representing magnetic resonance information. The processor may comprise at least one rapid single flux quantum circuit. The magnetic resonance information may be image information. A plurality of SQUIDs may be provided, fed by a plurality of antennas in a spatial array, to provide parallel data acquisition. A broadband excitation may be provided to address a range of voxels per excitation cycle. The processor may digitally compensate for magnetic field inhomogeneities.
US08593136B2 Measuring apparatus for the detection of a relative movement
A measuring apparatus for detecting a relative movement between at least one magnetic field sensor array integrated into a semiconductor chip and a transmitter for the sensor array is provided. The transmitter and the sensor array are exposed to the magnetic flux of a magnet. The transmitter has teeth that can be moved past the sensor array during the relative movement, or the transmitter has magnet poles that can be moved past the sensor array during the relative movement. The magnetic field sensor includes a differential magnetic field sensor which comprises a first measuring plate and a second measuring plate that are offset in relation to one another in a direction of the relative movement. The magnetic field sensor also includes a sensor element which is designed to measure the absolute magnetic field and comprises a third measuring plate that is arranged between the first measuring plate and the second measuring plate in the direction of the relative movement.
US08593135B2 Low-cost power measurement circuit
In embodiments of the present invention, a method and system is provided for designing improved intelligent, LED-based lighting systems. The LED based lighting systems may include fixtures with one or more of rotatable LED light bars, integrated sensors, onboard intelligence to receive signals from the LED light bars and control the LED light bars, and a mesh network connectivity to other fixtures.
US08593131B2 Signal generation circuit, frequency measurement device including the signal generation circuit, and signal generation method
A signal generation circuit includes: a first signal source that generates a first signal; and a variable rate frequency divider section that generates a variable rate frequency-divided signal in which a first frequency-divided signal obtained by frequency-dividing the first signal by a first frequency dividing ratio and a second frequency-divided signal obtained by frequency-dividing the first signal by a second frequency dividing ratio temporally alternately appear in a specified mixing ratio.
US08593129B2 Dimming control for a switching power supply
A switching power supply includes a switch and a controller for dimming control of the switching power supply. The controller includes a phase angle measurement block and a drive logic block. The phase angle measurement block is coupled to receive an input sense signal. The phase angle measurement block generates a phase angle signal representative of a phase angle of an input voltage of the power supply in response to the input sense signal. The drive logic block is coupled to control switching of the switch. The drive logic block controls the switch in a closed loop dimming control when the phase angle is less than or equal to a phase threshold and in a open loop dimming control when the phase angle is greater than the phase threshold.
US08593125B1 Buck DC-DC converter with dual feedback control
A buck switching regulator includes a feedback control circuit including a first gain circuit configured to generate a first feedback signal indicative of the regulated output voltage; a ripple generation circuit configured to generate a ripple signal using the switching output voltage and to inject the ripple signal to the first feedback signal; a second gain circuit configured to generate a second feedback signal indicative of the regulated output voltage; an operational transconductance amplifier (OTA) configured to generate an output signal having a magnitude indicative the difference between the second feedback signal and the first reference signal; and a comparator configured to generate a comparator output signal having an output level indicative of the difference between the output signal of the OTA and the first feedback signal. As thus configured, the buck switching regulator generates an output voltage with increased accuracy and fast transient response.
US08593124B2 Switching power source apparatus
A switching power source apparatus includes a high-side MOSFET 11, a ramp generator 18 to generate a ramp signal, an amplitude signal generator (second feedback controller 2) to generate an amplitude signal Comp corresponding to an amplitude of the ramp signal, and a first feedback controller 1 to control the ON timing of the high-side MOSFET 11 according to the ramp signal, a feedback signal FB, and a first reference voltage REF and control the ON width of the high-side MOSFET 11 according to the amplitude signal Comp. The ramp generator 18 controls the inclination of the ramp signal so that the ramp signal maintains a predetermined amplitude. The first feedback controller 1 controls the ON width of the high-side MOSFET 11 so that the ON width does not become narrower than a predetermined limit value.
US08593123B2 Switching voltage regulators with hysteretic control for enhanced mode-transition speed and stability
Switching voltage regulator embodiments are provided with hysteretic control to thereby switch between pulse-width modulation and pulse-frequency modulation operational modes. The switching is in response to different levels of an error voltage Verr in the feedback loop of voltage regulators. The hysteretic control is configured to provide a dc hysteretic response to changes in the error voltage Verr and also an ac hysteretic response to these changes. These two responses can be independently set to thereby enhance operational speed of the voltage regulators and also enhance immunity to transient noise signals that are generated by the mode switching. The voltage regulator embodiments facilitate instant return from the pulse-frequency modulation operational mode to the pulse-width modulation operational mode so that the stability of the feedback control of the regulator is enhanced. This feature is especially useful when the feedback loop is configured to include current-mode control as it minimizes the time duration in which the feedback loop operates in a voltage-mode control. The instant return insures that the feedback loop is immediately returned to the greater stability of the current-mode control.
US08593117B2 Delay compensation systems and methods for DC to DC converters
A control system for a DC to DC converter includes a predicted state generator module, a voltage estimation module, an error module, and a pulse width modulation (PWM) module. During a prior sampling period, the predicted state generator module generates a predicted capacitor voltage and a predicted capacitor current for a current sampling period. The voltage estimation module generates an estimated value of an output voltage of the DC to DC converter during the current sampling period based on the predicted capacitor current, the predicted capacitor voltage, a delay value, and a duty cycle value for the prior sampling period. The error module generates a voltage error value based on difference between a measured value of the output voltage and the estimated value. The PWM module controls the duty cycle of the DC to DC converter based on the voltage error value.
US08593111B2 Assembled battery system
In an assembled battery system, parallel battery blocks are connected in series. Each of the battery blocks includes battery unit modules connected in parallel, and each of the modules includes a battery unit and a fuse connected in series. The battery block is provided with a common connection line connected to a fuse monitoring module, and MOS-FETs each having a gate, source and drain, wherein the fuse is connected between the gate and source, and the drain is connected to the connection line. The FET is turned on and a voltage is applied to the connection line through the FET from the battery unit, when the fuse is blown out. Thus, the fuse monitoring module can detects the blowout of the fuse, and a control module can turn off a control switch to stop charging/discharging of the assembled battery in accordance with the control signal from the fuse monitoring module.
US08593110B2 Device and method of battery discharge
A battery pack includes a plurality of cells. A discharge circuit is electrically connected to the plurality of cells. A computer processor is electrically connected to the discharge circuit and to an input device. The computer processor operates the discharge circuit to selectively connect a first and a second discharge load of the discharge circuit to the plurality of cells. A method of discharging a battery for safe disposal includes connecting a first discharge load in parallel to a first cell. A first voltage across the first cell is monitored. A second discharge load is connected in parallel to a second cell. A second voltage is monitored across the second cell. A processor compares the first voltage and the second voltage to a predetermined cell voltage threshold. The first discharge load and the second discharge load are disconnected from the first cell and the second cell when the first and second voltages fall below the predetermined cell voltage threshold.
US08593109B2 Method and system for powering an electronic device
Methods and apparatus for providing a power supply to a device, including an inductive rechargeable power supply for a data monitoring and management system in which a high frequency magnetic field is generated to provide power supply to a rechargeable power source such as a battery of a transmitter unit in the data monitoring and management system are provided.
US08593101B2 Power converting device with reduced switching loss
A power converting device is disclosed that can reduce switching loss occurring in a voltage source inverter that drives an AC motor. It is possible to supply DC power to the voltage source inverter from both a voltage source rectifier, which converts AC power from an AC generator into DC power, and a battery. A first switching circuit is inserted between the voltage source rectifier and the AC generator, and the battery is connected to the output side of the voltage source rectifier. A second switching circuit is inserted between the battery and the voltage source inverter. A third switching circuit and a reactor are inserted in series between the input side of the voltage source inverter and the input side of the voltage source rectifier. At least one of an upper arm and a lower arm of the voltage source rectifier can be chopper controlled.
US08593099B2 Electric compressor
Provided is an electric compressor whose manufacturing cost is reduced and in which a motor driving circuit can be positively protected. A temperature sensor is provided in the vicinity of a power semiconductor element whose temperature becomes highest among a plurality of power semiconductor elements and control of the number of revolutions of a motor is performed on the basis of temperatures detected by the temperature sensor, whereby it is possible to change the number of revolutions of the motor by using a temperature in the vicinity of a power semiconductor element in a position under the worst temperature conditions as a reference, and it becomes possible to positively protect an inverter circuit without the need for a plurality of temperature sensors.
US08593096B1 Voice coil motor control system and method
Analog control of the pulse width used to control the speed of a voice coil motor may be implemented using a “constant-current-charging-capacitor” configuration where the time needed to charge the capacitor is directly related to how far the actual motor speed is from the target speed. The BEMF voltage, indicative of motor speed, is sampled, and then stored in a storage capacitor, which is allowed to charge/discharge to a target voltage level. The time required to charge/discharge the capacitor to the target voltage is directly proportional to the difference between the BEMF voltage and the target voltage, and may be used directly as the pulse width (i.e., the charging time) in the PWM velocity control system. To avoid larger capacitors, a pulse multiplier circuit can be added, allowing charging/discharging the sampled voltage to the target voltage to be repeated by a number, N, of times.
US08593091B2 DQ vector control system providing stable, high efficiency operation of electric motor
A control system for a multiphase electric motor includes inputs for a desired torque output of the motor, a measured torque output of the motor, a signal representative of optimal motor efficiency; a signal representative of a measured efficiency of the motor. The output is a two-dimensional DQ control voltage. A torque feedback control loop minimizes error between the desired and measured torque outputs by controlling an angle of the DQ control voltage, and a motor efficiency feedback control loop minimizes error between the optimal and measured motor efficiencies by controlling a magnitude of the DQ control voltage.
US08593090B2 Motor controller having integrated communications configurations
A motor drive is provided that includes a control circuit or board and a one or more functional circuits or option boards coupled to the control board, and a profile that includes a configuration for the option board. A method of operating a motor drive that includes loading a profile for a option board coupled to a control board of the controller, wherein the profile comprises a configuration for the option board. A tangible machine-readable medium implementing the method is also provided.
US08593087B2 Magnetic pole position estimation method for AC synchronous motor
If there is static friction, the magnetic pole position estimation is completed at the time when error torque used for magnetic pole position estimation becomes less than the friction, so that there remains magnetic pole error. A problem has been that when the error torque becomes less than a forward static friction, there remains a positive magnetic pole deviation and when the error torque becomes less than a backward static friction, there remains a negative magnetic pole deviation. By shifting in the negative direction and the positive direction initial values for estimating a magnetic pole error in operation sets, a true pole-error estimation value is estimated in the use of a pole-error estimation value having a positive magnetic pole error obtained by the positive shift operation and a negative one obtained by the negative shift operation, which can reduce estimation error due to the static friction.
US08593081B2 Power supply device and method for a lighting system with light-emitting diodes and lighting assembly comprising one such device
A power supply device and method for selection of a supply voltage or current to be applied to a lighting system having light-emitting diodes. A processing circuit performs automatic detection of the direction of connection of the lighting system by injecting at least one polarity test current pulse. Monitoring of the supply voltage and current during the polarity test current pulse, and reversal of the direction of the current or voltage for monitoring the direction of current flow for attribution of the direction of the supply voltage or current, are also performed. The device and method also include detection of the type of lighting system to be supplied with regulated voltage or regulated current according to the dynamic resistance of said system.
US08593079B2 LED dimming driver
Various embodiments of an LED dimming driver are disclosed herein. In some embodiments, an apparatus for dimmably driving at least one load includes a power supply having a voltage output, a controller having at least one current setpoint output, and at least one driver channel circuit connected to the voltage output of the power supply and to at least one of the at least one current setpoint outputs, the at least one driver channel circuit having a load output.
US08593074B2 Systems and methods for controlling an output of a light fixture
Systems and methods for controlling an output of a light fixture. A light fixture of one construction includes four or more light sources and is configured to produce an output that mimics the color temperature changes of an ideal black-body radiator based on one or more input parameters. The input parameters correspond to, for example, a desired target color and an intensity for the desired target color. A white point setting is determined based on the one or more input parameters and a relationship between the one or more input parameters and the color temperature of an ideal black-body radiator. A color temperature transform is selected based on the white point color temperature setting, and is used to determine a color coordinate corresponding to a modified target color. A set of light source output values corresponding to the modified target color are identified, and the light sources are driven to the identified output values.
US08593071B2 Discharge lamp lighting device, projector, and discharge lamp lighting method
A discharge lamp lighting device includes a voltage pulse applying section adapted to apply a voltage pulse for causing dielectric breakdown between first and second electrodes of a discharge lamp, an alternating-current voltage applying section adapted to apply an alternating-current voltage to the discharge lamp, the alternating-current voltage including a first polarity period in which the first electrode acts as an anode and a second polarity period in which the second electrode acts as the anode, and a control section. The control section controls the voltage pulse applying section to cause the dielectric breakdown, and thereafter controls the alternating-current voltage applying section to apply the alternating-current voltage having the first polarity period longer than the second polarity period to the discharge lamp, and thereafter to apply the alternating-current voltage having the second polarity period longer than the first polarity period to the discharge lamp.
US08593069B2 Power converter with compensation circuit for adjusting output current provided to a constant load
A method for use in a power converter includes generating a peak input voltage signal that is representative of a peak value of the input voltage for phase angles less than a phase angle threshold and is representative of a value that is less than the peak value of the input voltage for phase angles greater than the phase angle threshold. The method also includes controlling a switching of a switch to regulate an output current of the power converter in response to the peak input voltage signal and the feedback signal. A compensation current is then added to the peak input voltage signal when the phase angle is greater than the phase angle threshold to allow for natural dimming at an output of the power converter.
US08593066B2 Light emitting device, driving method for same and electronic apparatus
It is a problem to provide a light-emitting device capable of obtaining a constant brightness without being affected by deterioration in an organic light-emitting layer or temperature change, and of making desired color display. The lowering in OLED brightness due to deterioration is reduced by causing the OLED to emit light while keeping constant the current flowing through the OLED instead of causing the OLED to emit light while keeping constant the OLED drive voltage. Namely, OLED brightness is controlled not by voltage but by current thereby preventing against the change in OLED brightness due to deterioration of OLED. Specifically, the drain current Id of a transistor for supplying a current to the OLED is controlled in a signal line drive circuit thereby keeping constant the drain current Id without relying upon the value of a load resistance.
US08593064B2 Plasma source improved with an RF coupling system
A plasma source comprising an RF coupling system, magnets or coils that generate magnetic fields, a gas injection system, and a vacuum tight, RF transparent gas containment tube, wherein the RF coupling system comprises an RF coupler and the plasma source further comprises a choke point wherein the ratio of the field strength at said choke point to the field strength at said RF coupler is greater than two.
US08593063B2 White light emitting device
A white light emitting device includes a structure for emitting white light having at least four wavelengths by using two or less LEDs, where the LEDs include a blue/green LED emitting blue and green wavelengths of light. The device also includes means for emitting red wavelength of light.
US08593059B2 Lighting device
The lighting device includes a layer containing a light-emitting organic compound which is provided over a substrate; a first barrier layer covering the layer containing a light-emitting organic compound; a second barrier layer provided over the first barrier layer; a sealant provided between the first barrier layer and the second barrier layer; a resin layer including a desiccant which is surrounded by the first barrier layer, the second barrier layer, and the sealant; and a resin substrate which is provided over the second barrier layer and has a first uneven structure on a surface in contact with the second barrier layer and a second uneven structure on a surface in contact with the air, and the second uneven structure has a larger height difference than the first uneven structure.
US08593057B2 Organic electroluminescent display device
An organic electroluminescent display device including first to fourth pixel regions each including red, green and blue sub-pixel regions, each of the first to fourth pixel regions being divided into first and second column, and the first column being divided into first and second rows, wherein a red sub-pixel region and a green sub-pixel region are respectively arranged in the first and second rows, and a blue sub-pixel region is arranged in the second column; a red emitting layer formed in the red sub-pixel region; a green emitting layer formed in the green sub-pixel region; and a blue emitting layer formed in the blue sub-pixel region.
US08593046B2 Spark plug having a novel nickel coating for the metal shell
A spark plug includes a tubular metal shell extending in an axial direction, wherein the metal shell includes: an externally threaded portion formed on a tip end side of an outer periphery of the metal shell; a seat portion formed on a rear end side of the externally threaded portion in the axial direction and protruding radially outward; and a nickel layer provided on an outer surface of the metal shell, wherein the nickel layer contains phosphorus, and a phosphorus concentration in a portion in which a nickel concentration is 50 at % in a thickness direction of the nickel layer itself is 6 at % or more and 20 at % or less.
US08593043B2 LED lighting apparatus
An LED lighting apparatus includes a support unit including a support surface facing an illumination side, a plurality of LED chips supported on the support surface, and a cover that covers the support surface and transmits light from the LED chips. The cover includes a periphery which, as viewed in plan, includes four first sides that are spaced apart from each other and four second sides each connecting ends of adjacent ones of the first sides. The first sides consisting of two pairs of parallel sides, and each of the first sides constituting one of the two pairs and each of the first sides constituting the other one of the two pairs form a right angle. Each of the first sides and each of the adjacent second sides form an obtuse angle.
US08593041B1 Backlight module and heatsink apparatus
The present invention discloses a heatsink apparatus for use with a backlight module. The heatsink apparatus is used to dissipate heat buildup from a light source, and includes a heatsink and a backframe. The heatsink is thermally in contact with the light source. The backframe and the heatsink jointly define a ventilation shaft on a surface of the backframe. The present invention further includes a backlight module incorporated with the heatsink. With the provision of the ventilation shaft of the heatsink, the performance of the heat dissipation is increased, and the service life of the light source is therefore prolonged.
US08593039B2 Resonator element having a notched base
A resonator element capable of improving impact resistance is provided. A quartz crystal resonator element is a resonator element formed by etching a Z plate which is cut at predetermined angles with respect to the crystal axes of a quartz crystal. The quartz crystal resonator element includes a base, a pair of resonating arms extending from the base in the Y-axis direction, and a positive X-axis notch and a negative X-axis notch formed by notching the base in the X-axis direction. The positive X-axis notch is formed by notching the base from the negative side of the X axis towards the positive side so that the width of the positive X-axis notch increases as it approaches the outer circumference.
US08593038B2 Dielectric composition and ceramic electronic component including the same
There is provided a dielectric composition, including: a basic powder including BamTiO3(0.995≦m≦1.010); a first subcomponent including 0.1 to 0.6 mole of zirconium (Zr) oxide or carbide, based on 100 moles of the basic powder; a second subcomponent including 0.8 to 6.0 moles of oxide or carbide including at least one of magnesium (Mg), strontium (Sr), and barium (Ba); a third subcomponent including 0.2 to 1.8 moles of oxide including at least one rare earth element; a fourth subcomponent including 0.05 to 0.30 mole of oxide including at least one transition metal; a fifth subcomponent including 0.05 to 0.35 mole of oxide including at least one of vanadium (V), niobium (Nb), and tantalum (Ta); and a sixth subcomponent including 0.5 to 4.0 moles of oxide including at least one of silicon (Si) and aluminum (Al).
US08593033B2 Multi-element, stick-slip piezo motor
A stick-slip piezo motor. A piezo housing holds at least two piezo elements. The piezo elements are both rigidly connected to the piezo housing. At the end of each of the piezo elements is a piezo friction element. Each of the piezo friction elements is in friction contact with a moving friction element. While oscillating between a stick phase and a slip phase, both of the friction elements operate in conjunction to move the moving friction element in a desired travel direction. The piezo elements oscillate out of phase such that when one of the oscillating piezo elements is operating in the slip phase and moving in a direction opposite to the desired travel direction, the other oscillation piezo element is operating in the stick phase and is moving in the travel direction in order to counteract and overcome unwanted dragging of the moving piezo element.
US08593031B2 Stator and electric motor
A stator includes an iron core 3 in which a plurality of teeth 2 are connected into an integral body, and coil wires 5 each of which is wound in series around each set of a predetermined number of teeth included in the plurality of teeth. Each of the coil wires 5 is routed in a slanting direction between opposed faces of two adjacent teeth 2 in each set of the predetermined number of teeth 2, so that each of the coil wires makes a transition from a wire wound around one of them 2 to a wire wound around the other tooth 2.
US08593026B2 Variable gear ratio magnetic gearbox
A magnetic gear arrangement is provided comprising a first gear member for generating a first magnetic field and a second gear member for generating a second magnetic field. A coupling element is disposed between the first and second gear members and provides arrangements of interpoles which couple the first and second magnetic fields. The coupling element comprises a plurality of magnetisable lamellae, each interpole in an arrangement of interpoles being formed from a group of neighboring lamellae. Selected lamellae are deactivatable to provide boundaries between adjacent interpoles. This allows different numbers and arrangements of interpoles to be formed, so as to provide different gear ratios between the first and second gear members.
US08593024B2 Implementation of a non-metallic barrier in an electric motor
A motor for use in a volatile environment includes a rotor exposed to the volatile environment, electronics for rotating the rotor, an impervious ceramic barrier separating the electronics and the rotor, and a flexible seal for preventing the volatile environment from contacting the electronics and for minimizing vibratory and twisting loads upon the barrier to minimize damage to the barrier.
US08593023B2 Stator coil assembly
There is provided a compact stator coil assembly that has heat radiation increased and a cooling performance improved. A stator coil assembly includes a first coil piece, a second coil piece, and an insulating member provided with a retaining portion that catches the first coil piece and the second coil piece so that those coil pieces form a predetermined coil pattern. A coil loop is formed by the first coil piece and the second coil piece. The stator coil assembly further includes a heat-transfer member having a heat-transfer portion insulated from the first coil piece and the second coil piece and embedded in the insulating member, and a slit formed in the heat-transfer member so as to cut off the pathway of an induced current that is to flow through the heat-transfer member.
US08593022B2 Electric motor with heat dissipation structure
An electric motor has a stator and a rotor rotatably mounted in the stator. The rotor has a shaft and a fan mounted on the shaft. A air guide structure with an axial extension portion is arranged at one end of the stator adjacent the fan. The gap between the axial extension portion and the fan in the axial and/or radial direction of the motor is narrow in order to reduce air swirl generated by air flowing from the outlet of the fan to the inlet of the fan through the gap. Preferably, the width of the gap is larger than 0.05 mm and smaller than 2.0 mm. The cooling efficiency of the fan is increased and the performance of the motor is improved.
US08593021B2 Coolant drainage system and method for electric machines
Embodiments of the invention provide a coolant drainage system including a module housing and a drain pan coupled to the module housing. The module housing at least partially defines a machine cavity and includes an inner wall and at least one end cap at least partially enclosing an electric machine within the machine cavity. The coolant drainage system also includes a plurality of drain holes through the module housing and adjacent to the drain pan. The plurality of drain holes provide fluid pathways from the machine cavity to the drain pan.
US08593014B2 Method of operation and device for controlling an energy installation with photovoltaic modules
Method of operating and device for controlling an energy installation comprising photovoltaic modules (401) and inverters (402), in which a selection and control unit (404) selects combinations of connections of the photovoltaic modules and controls a switching unit so as to establish combinations.
US08593011B2 Rotary push-button ignition switch
A vehicle system includes a switch that is movable between first and second positions in a linear direction and moveable between third and fourth positions in a rotational direction. The system also comprises a control module that responds to the switch when the switch is in both the second position and the fourth position. The control module does not respond to the switch being moved from the third position to the fourth position unless the switch is also moved from the first position to the second position.
US08593008B2 Variable vane vertical axis wind turbine
An embodiment of a vertical axis wind turbine (VAWT) with a turbine shaft for transmitting mechanical power. Coupled to the turbine shaft is a support structure with a vane rotatably coupled to the support structure at a vane shaft. The vane rotates the vane shaft, support structure and the turbine shaft around the center of the turbine shaft when the vane is acted upon by the wind. A centrifugal compensation rod is connected to the vane. The centrifugal compensation rod counteracts the centrifugal forces acting upon the vane as the vane rotates about the center of the turbine shaft. Embodiments of the vertical axis wind turbine increase the efficiency of the wind turbine by reducing wind resistance. Some embodiments develop power when the vanes move into the wind instead of simply reducing drag on the side of the turbine that moves into the wind.
US08593005B2 Water wheel for generating power
It is provided to embody as a modularly constructed system, a water wheel for power generation via generators with transversely extending water blades as hinged or folding blades. In this regard it is provided to arrange the water blades over a truss framework. The truss framework for each water blade is formed by a transversely extending prism-like arrangement of plural connected struts as transverse supports, whereby these are connected at node points by longitudinal rods, and at least one strut of the transverse supports is connected with the wheel rim. In that regard, a longitudinal rod located at the top and arranged over the transverse supports is embodied for the rotatable support of a pivotably received water blade via a mounting receiver and a longitudinal rod is allocated as a counter support for the water blade in its working position. Simultaneously this longitudinal rod serves for limiting a pivoting motion of the neighboring water blade in the turbulent region.
US08593003B2 Outdoor power generating apparatus
An outdoor power generating apparatus includes a housing placed at an outside and including a power generation chamber, a power generation source accommodated in the power generation chamber and formed by either one of an engine and a fuel cell, an intake portion provided within the housing and positioned at an upper side of the power generation source, the intake portion including an outside air inlet portion that opens to a side wall of the housing to bring an outside air, the intake portion including a meander passage that connects the outside air inlet portion to the power generation chamber while bringing the outside air to meander from the outside air inlet portion towards the power generation chamber, and a drain port provided at the meander passage and discharging a water in a liquid state that remains at the meander passage to an outside of the meander passage.
US08593002B2 Portable integrated power supply and HVAC unit
An integrated portable power unit including a power pack and a generator mounted within a first compartment and including a second isolated air handling compartment. The air handling compartment may include a fan for moving air through ductwork, a radiator for receiving heated cooling water from the power pack and a heat exchanger connected to a compressor for generating cooled water, the compressor and the fan connected to the power pack.
US08592997B2 Molded underfill flip chip package preventing warpage and void
A molded underfill flip chip package may include a printed circuit board, a semiconductor chip mounted on the printed circuit board, and a sealant. The printed circuit board has at least one resin passage hole passing through the printed circuit board and at least one resin channel on a bottom surface of the printed circuit board, the at least one resin channel extending from the at least one resin passage hole passing through the printed circuit board. The sealant seals a top surface of the printed circuit board, the semiconductor chip, the at least one resin passage hole, and the at least one resin channel.
US08592992B2 Semiconductor device and method of forming vertical interconnect structure with conductive micro via array for 3-D Fo-WLCSP
A semiconductor device has a semiconductor die. An encapsulant is formed over the semiconductor die. A conductive micro via array is formed over the encapsulant outside a footprint of the semiconductor die. A first through-mold-hole having a step-through-hole structure is formed through the encapsulant to expose the conductive micro via array. In one embodiment, forming the conductive micro via array further includes forming an insulating layer over the encapsulant and the semiconductor die, forming a micro via array through the insulating layer outside the footprint of the semiconductor die, and forming a conductive layer over the insulating layer. In another embodiment, forming the conductive micro via array further includes forming a conductive ring. In another embodiment, an insulating layer is formed over the semiconductor die for structural support, a build-up interconnect structure is formed over the semiconductor die, and a conductive interconnect structure is formed within the first through-mold-hole.
US08592987B2 Semiconductor element comprising a supporting structure and production method
One or more embodiments are related to a semiconductor component comprising a supporting structure arranged in a first layer sequence, a second layer arranged above the first layer sequence, and a bonding pad. The layer sequence may comprise a plurality of layers of a dielectric and the bonding pad is arranged above the second layer. The supporting structure may comprise a plurality of supporting substructures and is formed under partial regions of the bonding pad.
US08592983B2 Method of integrating a plurality of benzocyclobutene layers with a substrate and an associated device
A method of integrating benzocyclobutene (BCB) layers with a substrate is provided along with a corresponding device. A method includes forming a first BCB layer on the substrate and depositing a first metal layer on the first BCB layer and within vias defined by the first metal layer. The method also forms a second BCB layer on the first metal layer and deposits a second metal layer on the second BCB layer and within vias defined by the second metal layer. The second metal layer extends through the vias defined by the second metal layer to establish an operable connection with the first metal layer. The first and second metal layers are independent of an electrical connection to any circuit element carried by the substrate, but the first and second metal layers secure the second BCB layer to the underlying structure and reduce the likelihood of delamination.
US08592982B2 Semiconductor package having proximity communication signal input terminals and manufacturing methods thereof
A semiconductor package includes a semiconductor structure. The semiconductor structure includes a plurality of dielectric layers and a plurality of conductive interconnects embedded in the semiconductor structure. The semiconductor structure also includes a plurality of proximity communication signal input terminals. At least one of the plurality of proximity communication signal input terminals includes a first electrode and a second electrode. The first electrode and the second electrode are spaced apart so as to be configured to provide proximity communication through capacitive coupling. The first electrode is exposed proximate to a surface of the semiconductor structure.
US08592978B2 Method of fabricating semiconductor device and the semiconductor device
A semiconductor device includes a semiconductor substrate, an insulating film formed above the semiconductor substrate, and a plurality of first buried wirings and a plurality of second buried wirings located in the insulating film at predetermined intervals alternately in a direction parallel to a surface of the semiconductor substrate. Each second buried wiring is formed so that a width between both side surfaces thereof is increased from a lower end toward an upper portion and at an upper surface the width is larger than a width at an upper surface of each first buried wiring.
US08592974B2 Package configurations for low EMI circuits
An electronic component includes a high voltage switching transistor encased in a package. The high voltage switching transistor comprises a source electrode, a gate electrode, and a drain electrode all on a first side of the high voltage switching transistor. The source electrode is electrically connected to a conducting structural portion of the package. Assemblies using the abovementioned transistor with another transistor can be formed, where the source of one transistor can be electrically connected to a conducting structural portion of a package containing the transistor and a drain of the second transistor is electrically connected to the second conductive structural portion of a package that houses the second transistor. Alternatively, the source of the second transistor is electrically isolated from its conductive structural portion, and the drain of the second transistor is electrically isolated from its conductive structural portion.
US08592973B2 Integrated circuit packaging system with package-on-package stacking and method of manufacture thereof
A method of manufacture of an integrated circuit packaging system including: forming a top package including: providing a through silicon via interposer having a through silicon via; coupling a stacked integrated circuit die to the through silicon via, and testing a top package; forming a base package including: providing a substrate, coupling a base integrated circuit die to the substrate, and testing a base package; and coupling a stacked interconnect between the top package and the base package.
US08592972B2 Thermally conductive device with a thermal interface material
Methods are disclosed to process a thermal interface material to achieve easy pick and placement of the thermal interface material without lowering thermal performance of a completed semiconductor package. One method involves applying a non-adhesive layer on one or more surfaces of the thermal interface material, interfacing the thermal interface material with one or more components to interface the non-adhesive layer therebetween, and applying heat to alter the non-adhesive layer to increase thermal contact between the thermal interface material and the interfacing component(s).
US08592970B2 Multichip electronic packages and methods of manufacture
A multi-chip electronic package and methods of manufacture are provided. The method comprises adjusting a piston position of one or more pistons with respect to one or more chips on a chip carrier. The adjusting comprises placing a chip shim on the chips and placing a seal shim between a lid and the chip carrier. The seal shim is thicker than the chip shim. The adjusting further comprise lowering the lid until the pistons contact the chip shim. The method further comprises separating the lid and the chip carrier and removing the chip shim and the seal shim. The method further comprises dispensing thermal interface material on the chips and lowering the lid until a gap filled with the thermal interface material is about a particle size of the thermal interface material. The method further comprises sealing the lid to the chip carrier with sealant.
US08592968B2 Semiconductor device, semiconductor package, interposer, semiconductor device manufacturing method and interposer manufacturing method
A semiconductor device includes an interposer having a base member including a first surface and a second surface opposite to the first surface, a first interconnect formed on the first surface of the base member, a first insulating film formed on the first surface of the base member, a first external terminal and a second external terminal neighboring the first external terminal formed on the second surface of the base member, a second interconnect formed on the second surface of the base member and passing between the first external terminal and the second external terminal, and a second insulating film formed on the second surface of the base member, a semiconductor chip mounted on the first insulating film, a sealing resin formed on the first insulating film and sealing the semiconductor chip. The second insulating film has an opening so that the second interconnect is exposed in an area.
US08592967B2 Semiconductor apparatus and power supply circuit
A semiconductor apparatus comprising an integrated semiconductor circuit device having pluralities of electrode pads, pluralities of first external terminals connected to the electrode pads of the integrated semiconductor circuit device, an inductor disposed in a region surrounded by the first external terminals, and a resin portion sealing them, the integrated semiconductor circuit device being arranged on an upper surface of the inductor, and the inductor being exposed from a lower surface of the resin portion together with the first external terminals.
US08592966B2 RF transistor packages with internal stability network including intra-capacitor resistors and methods of forming RF transistor packages with internal stability networks including intra-capacitor resistors
A packaged RF transistor device includes an RF transistor die including a plurality of RF transistor cells. Each of the plurality of RF transistor cells includes a control terminal and an output terminal. The RF transistor device further includes an RF input lead, and an input matching network coupled between the RF input lead and the RF transistor die. The input matching network includes a plurality of capacitors having respective input terminals. The input terminals of the capacitors are coupled to the control terminals of respective ones of the RF transistor cells. The input matching network further includes a plurality of resistors coupled respectively between adjacent input terminals of the capacitors.
US08592965B1 On-die bond wires system and method for enhancing routability of a redistribution layer
An integrated circuit includes a first die and a second die positioned in a package. The first die has a redistribution layer formed on the die and including a plurality of relocated bond pads. The relocated bond pads are positioned near an inner edge of the first die that is adjacent to an inner edge of the second die. Each relocated bond pad is coupled to a corresponding bond pad on the second die through a respective bonding wire. The first die further includes a plurality of original bond pads. The redistribution layer further includes at least one intermediate bond pad electrically interconnected through a respective conductive trace to a corresponding original bond pad. Each intermediate bond pad is electrically connected to a corresponding relocated bond pad through a respective bond wire.
US08592962B2 Semiconductor device packages with protective layer and related methods
A Quad Flat No Leads (QFN) package includes a lead frame, a chip, an encapsulant, and a protective layer. The lead frame includes a plurality of leads. Each of the leads has a lower surface that is divided into a contact area and a non-contact area. The chip is configured on and electrically connected to the lead frame. The encapsulant encapsulates the chip and the leads and fills spaces between the leads. The contact areas and the non-contact areas of the leads are exposed by the encapsulant. The protective layer covers the non-contact areas of the leads.
US08592959B2 Semiconductor device mounted on a wiring board having a cap
A semiconductor device includes a semiconductor element, a wiring board including a conductor portion formed on a first surface thereof on which the semiconductor element is mounted, the conductor portion being electrically connected to the semiconductor element, and a concave cap provided to seal the first surface of the wiring board, the concave cap being mounted through an adhesive on the first surface of the wiring boardIn the semiconductor device, a sidewall portion of the concave cap includes an inside surface facing toward the conductor portion of the wiring board, an outside surface positioned on an opposite side to the inside surface, and a bottom surface adhered onto the first surface of the wiring board. The sidewall portion of the concave cap is provided so that a thickness thereof becomes thinner at a portion extending from the outside surface to the bottom surface. Moreover, a dam-shaped member is provided between the conductor portion of the wiring board and the inside surface of the sidewall portion.
US08592958B2 Chip package and manufacturing method thereof
A chip package including a shielding layer having a plurality of conductive connectors for better electromagnetic interferences shielding is provided. The conductive connectors can be flexibly arranged within the molding compound for better shielding performance. The shielding layer having the conductive connectors functions as the EMI shield and the shielding layer is electrically grounded within the package structure.
US08592956B2 Resist underlayer film composition and patterning process using the same
There is disclosed a resist underlayer film composition, wherein the composition contains a polymer obtained by condensation of, at least, one or more compounds represented by the following general formula (1-1) and/or general formula (1-2), and one or more kinds of compounds and/or equivalent bodies thereof represented by the following general formula (2). There can be provided an underlayer film composition, especially for a trilayer resist process, that can form an underlayer film having reduced reflectance, (namely, an underlayer film having optimum n-value and k-value), excellent filling-up properties, high pattern-antibending properties, and not causing line fall or wiggling after etching especially in a high aspect line that is thinner than 60 nm, and a patterning process using the same.
US08592955B2 Accurate deposition of nano-objects on a surface
The invention notably concerns a method for depositing nano-objects on a surface. The method includes: providing a substrate with surface patterns on one face thereof; providing a transfer layer on said face of the substrate; functionalizing areas on a surface of the transfer layer parallel to said face of the substrate, at locations defined with respect to said surface patterns, such as to exhibit enhanced binding interactions with nano-objects; depositing nano-objects and letting them get captured at the functionalized areas; and thinning down the transfer layer by energetic stimulation to decompose the polymer into evaporating units, until the nano-objects reach the surface of the substrate. The invention also provides a semiconductor device which includes a substrate and nano-objects accurately disposed on the substrate.
US08592951B2 Semiconductor wafer having W-shaped dummy metal filling section within monitor region
A method of manufacturing a semiconductor device forms the semiconductor device in a device region of a semiconductor substrate simultaneously with forming a monitor semiconductor device that includes a gate electrode made of silicon containing material arranged on a gate insulating film in a monitor region of the semiconductor substrate, a source electrode and a drain electrode formed on the semiconductor substrate on corresponding sides of the gate electrode. The gate electrode is removed without removing a gate insulating film by applying pyrolysis hydrogen generated by pyrolysis on the monitor semiconductor device in the monitor region, and the gate insulating film is removed by a wet process. Impurities distribution of a silicon active region appearing after the gate electrode is removed is measured and fed back to a semiconductor manufacturing process.
US08592942B2 Non-volatile semiconductor memory device
A non-volatile semiconductor memory device having a memory cell in which operating potentials are few and the scale of the peripheral circuitry is reduced includes a select transistor having a source/drain on both sides of a channel of a semiconductor substrate and having a gate electrode disposed on the channel via a thick gate insulating film; an element isolation region formed on the semiconductor substrate in an area adjacent to the select transistor; an antifuse adjacent to the element isolation region, having a lower electrode formed on the semiconductor substrate and having an upper electrode disposed on the semiconductor substrate in an area between the element isolation region and lower electrode via a thin gate insulating film; and a connection contact electrically connecting the source and upper electrode and contacting the source and the upper electrode.
US08592939B2 Semiconductor device and manufacturing method thereof
In accordance with an embodiment, a semiconductor device includes a functional film, first and second trenches, and first and second insulating films. The functional film comprises first and second areas. The first trench is provided in the first area of the functional film and has a first width. The second trench is provided in the second area of the functional film and has a second width larger than the first width. The first insulating film is formed from a polymeric material as a precursor to fill the first trench. The second insulating film has a diameter larger than the first width and is formed from particulates and the polymeric material as precursors. The particulates fill the second trench. The polymeric material fills spaces between the particulates in the second trench and also fills gaps between the particulates and the second trench.
US08592934B2 Semiconductor photo-detection device and radiation detection apparatus
On the front side of an n-type semiconductor substrate 5, p-type regions 7 are two-dimensionally arranged in an array. A high-concentration n-type region 9 and a p-type region 11 are disposed between the p-type regions 7 adjacent each other. The high-concentration n-type region 9 is formed by diffusing an n-type impurity from the front side of the substrate 5 so as to surround the p-type region 7 as seen from the front side. The p-type region 11 is formed by diffusing a p-type impurity from the front side of the substrate 5 so as to surround the p-type region 7 and high-concentration n-type region 9 as seen from the front side. Formed on the front side of the n-type semiconductor substrate 5 are an electrode 15 electrically connected to the p-type region 7 and an electrode 19 electrically connected to the high-concentration n-type region 9 and the p-type region 11. This realizes a semiconductor photodetector and radiation detecting apparatus which can favorably suppress the occurrence of crosstalk, and restrain carriers from flowing into adjacent photodiodes even when a photodiode falls into an electrically floating state because of a breakage of a connecting point due to an initial connection error, a temperature cycle, etc.
US08592932B2 Apparatus and methods for constructing semiconductor chip packages with silicon space transformer carriers
Apparatus and methods are provided for high density packaging of semiconductor chips using silicon space transformer chip level package structures, which allow high density chip interconnection and/or integration of multiple chips or chip stacks high I/O interconnection and heterogeneous chip or function integration.
US08592929B2 Symmetrically switchable spin-transfer-torque magnetoresistive device
A spin transfer torque magnetic random access memory (STT-MRAM) device includes magnetic tunnel junctions (MTJs) with reduced switching current asymmetry. At least one switching asymmetry balance layer (SABL) near the free layer of the MTJ reduces a first switching current Ic(p-ap) causing the value of the first switching current to be nearly equal to the value of a second switching current Ic(ap-p) without increasing the average switching current of the device. The SABL may be a non-magnetic switching asymmetry balance layer (NM-SABL) and/or a magnetic switching asymmetry balance layer (M-SABL).
US08592925B2 Functional device with functional structure of a microelectromechanical system disposed in a cavity of a substrate, and manufacturing method thereof
A functional device includes: a substrate; a functional structure formed on the substrate; a cavity in which the functional structure is disposed; and a cover which covers the cavity, wherein the cover includes a bumpy structure including rib shaped portions, or groove shaped portions, which cross a covering range covering at least the cavity.
US08592921B2 Deep trench embedded gate transistor
A semiconductor device includes a source extending into a surface of a substrate, a drain extending into the surface of the substrate, and an embedded gate in the substrate extending from the source to the drain.
US08592920B2 Semiconductor device and manufacturing method of the same
In a power MISFET having a trench gate structure with a dummy gate electrode, a technique is provided for improving the performance of the power MISFET, while preventing electrostatic breakdown of a gate insulating film therein. A power MISFET having a trench gate structure with a dummy gate electrode, and a protective diode are formed on the same semiconductor substrate. The protective diode is provided between a source electrode and a gate interconnection. In a manufacturing method of such a semiconductor device, a polycrystalline silicon film for the dummy gate electrode and a polycrystalline silicon film for the protective diode are formed simultaneously. A source region of the power MISFET and an n+-type semiconductor region of the protective diode are formed in the same step.
US08592910B2 Semiconductor body with a protective structure and method for manufacturing the same
A semiconductor body includes a protective structure. The protective structure (10) includes a first and a second region (11, 12) which have a first conductivity type and a third region (13) that has a second conductivity type. The second conductivity type is opposite the first conductivity type. The first and the second region (11, 12) are arranged spaced apart in the third region (13), so that a current flow from the first region (11) to the second region (12) is made possible for the limiting of a voltage difference between the first and the second region (11, 12). The protective structure includes an insulator (14) that is arranged on the semiconductor body (9) and an electrode (16) that is constructed with floating potential and is arranged on the insulator (14).
US08592908B2 Semiconductor substrate and manufacturing method of semiconductor device
To provide a semiconductor substrate including a crystalline semiconductor layer which is suitable for practical use, even if a material different from that of the semiconductor layer is used for a supporting substrate, and a semiconductor device using the semiconductor substrate. The semiconductor substrate includes a bonding layer which forms a bonding plane, a barrier layer formed of an insulating material containing nitrogen, a relief layer which is formed of an insulating material that includes nitrogen at less than 20 at. % and hydrogen at 1 at. % to 20 at. %, and an insulating layer containing a halogen, between a supporting substrate and a single-crystal semiconductor layer. The semiconductor device includes the above-described structure at least partially, and a gate insulating layer formed by a microwave plasma CVD method using SiH4 and N2O as source gases is in contact with the single-crystal semiconductor layer.
US08592906B2 High-voltage semiconductor device with lateral series capacitive structure
A semiconductor device includes a semiconductor substrate, a source region extending along a top surface of the semiconductor substrate, a drain region extending along the top surface of the semiconductor substrate, and a field shaping region disposed within the semiconductor substrate between the source region and the drain region. A cross-section of the semiconductor substrate extending from the source region to the drain region through the field shaping region includes an insulating region. The semiconductor device also includes an active region disposed within the semiconductor substrate between the source region and the drain region. The active region is disposed adjacent to the field shaping region in a direction perpendicular to the cross-section of the semiconductor substrate extending from the source region to the drain region through the field shaping region.
US08592904B2 Semiconductor device including Schottky barrier diode
In a non-insulated DC-DC converter having a circuit in which a power MOS•FET high-side switch and a power MOS•FET low-side switch are connected in series, the power MOS•FET low-side switch and a Schottky barrier diode to be connected in parallel with the power MOS•FET low-side switch are formed within one semiconductor chip. The formation region SDR of the Schottky barrier diode is disposed in the center in the shorter direction of the semiconductor chip, and on both sides thereof, the formation regions of the power MOS•FET low-side switch are disposed. From the gate finger in the vicinity of both long sides on the main surface of the semiconductor chip toward the formation region SDR of the Schottky barrier diode, a plurality of gate fingers are disposed so as to interpose the formation region SDR between them.
US08592902B1 Semiconductor structure that reduces the effects of gate cross diffusion and method of forming the structure
Gate cross diffusion in a semiconductor structure is substantially reduced or eliminated by forming multiple n-type gate regions with different dopant concentrations and multiple p-type gate regions with different dopant concentrations so that the n-type gate region with the lowest dopant concentration touches the p-type gate region with the lowest dopant concentration.
US08592898B2 Vertical gated access transistor
A method of forming an apparatus includes forming a plurality of deep trenches and a plurality of shallow trenches in a first region of a substrate. At least one of the shallow trenches is positioned between two deep trenches. The shallow trenches and the deep trenches are parallel to each other. A layer of conductive material is deposited over the first region and a second region of the substrate. The layer of conductive material is etched to define lines separated by gaps over the first region of the substrate, and active device elements over the second region of the substrate. The second region of the substrate is masked and the lines are removed from the first region of the substrate. Elongate trenches are etched where the lines were removed while the second region of the substrate is masked.
US08592897B2 Semiconductor device comprising transistor structures and methods for forming same
A method for forming an opening within a semiconductor material comprises forming a neck portion, a rounded portion below the neck portion and, in some embodiments, a protruding portion below the rounded portion. This opening may be filled with a conductor, a dielectric, or both. Embodiments to form a transistor gate, shallow trench isolation, and an isolation material separating a transistor source and drain are disclosed. Device structures formed by the method are also described.
US08592896B2 Semiconductor device and method for manufacturing the same
A semiconductor device includes a semiconductor layer of a second conductive type, a first diffused region of a first conductive type formed in the semiconductor layer, a second diffused region of the second conductive type selectively formed in the first diffused region, a trench formed in the semiconductor layer, a gate electrode housed in the trench with a gate insulator intervening, a top surface of the gate electrode being lower than a top surface of the second diffused region, a first oxide film housed in the trench and formed over the gate electrode, a second oxide film housed in the trench and formed over the first oxide film, a third oxide film housed in the trench and formed over the second oxide film, and a source electrode formed over the third oxide film and electrically connecting to the first and second diffused regions.
US08592894B2 Method of forming a power semiconductor device and power semiconductor device
A method of forming a power semiconductor device comprises forming a first semiconductor layer of a first conductivity type extending across the power semiconductor device; forming an epitaxial layer of the first conductivity type over the first semiconductor layer, the epitaxial layer having a doping concentration that increases from a first surface of the epitaxial layer towards the first semiconductor layer; forming a body region of a second conductivity type in the epitaxial layer extending from the first surface of the epitaxial layer into the epitaxial layer, wherein a junction between the body region and the epitaxial layer is at or substantially adjacent to a region of the epitaxial layer having a maximum doping concentration; and forming a gate region such that the gate region is adjacent at least a portion of the body region. In operation of the semiconductor device, the portion of the body region adjacent the gate region functions as a channel region of the semiconductor device.
US08592893B2 Power semiconductor device
According to one embodiment, a power semiconductor device includes a first semiconductor layer of a first conductivity type, a second semiconductor layer of the first conductivity type and a third semiconductor layer of a second conductivity type, a fourth semiconductor layer, a fifth semiconductor layer, a first and second main electrode, a first and second insulating film and a control electrode. The second and third layers are provided periodically on the first layer. The fourth layer is provided on the third layer. The fifth layer is selectively provided on the fourth layer. The first film is provided on sidewalls of a trench that reaches from a surface of the fifth layer to the second layer. The second film is provided closer to a bottom side of the trench than the first film and has a higher permittivity than the first film. The control electrode is embedded in the trench.
US08592891B1 Methods for fabricating semiconductor memory with process induced strain
A semiconductor device and method of fabricating the same are provided. In one embodiment, the semiconductor device includes a memory transistor with an oxide-nitride-nitride-oxide (ONNO) stack disposed above a channel region. The ONNO stack comprises a tunnel dielectric layer disposed above the channel region, a multi-layer charge-trapping region disposed above the tunnel dielectric layer, and a blocking dielectric layer disposed above the multi-layer charge-trapping region. The multi-layer charge-trapping region includes a substantially trap-free layer comprising an oxygen-rich nitride and a trap-dense layer disposed above the trap-free layer. The semiconductor device further includes a strain inducing structure including a strain inducing layer disposed proximal to the ONNO stack to increase charge retention of the multi-layer charge-trapping region. Other embodiments are also disclosed.
US08592890B2 Semiconductor memory device and method for manufacturing same
According to one embodiment, a semiconductor memory device includes a stacked body, a contact, a semiconductor member, a charge storage layer, and a penetration member. The stacked body includes an electrode film stacked alternately with an insulating film. A configuration of an end portion of the stacked body is a stairstep configuration having a step provided every electrode film. The contact is connected to the electrode film from above the end portion. The semiconductor member is provided in a portion of the stacked body other than the end portion to pierce the stacked body in a stacking direction. The charge storage layer is provided between the electrode film and the semiconductor member. The penetration member pierces the end portion in the stacking direction. The penetration member does not include the same kind of material as the charge storage layer.
US08592889B1 Memory structure
A memory structure includes a substrate, a source region, a drain region, a gate insulating layer, a floating gate and a control gate. The substrate has a surface and a well extended from the surface to the interior of the substrate. The source region and the drain region are formed in the well and a channel region is formed between the source region and the drain region. The gate insulating layer is formed on the surface of the substrate between the source region and the drain region and covers the channel region. The floating gate disposed on the gate insulating layer to store a bit data. The control gate is disposed near lateral sides of the floating gate.
US08592885B2 Nonvolatile semiconductor memory device and method for manufacturing the same
According to one embodiment, a nonvolatile semiconductor memory device includes a substrate, a tunneling insulating film, a floating gate, a leak suppression unit, an inter-gate insulating film, and a control gate. The substrate includes silicon. The tunneling insulating film is provided on the substrate. The floating gate is provided on the tunneling insulating film. The leak suppression unit is provided on the floating gate. The inter-gate insulating film is provided on the leak suppression unit. The control gate is provided on the inter-gate insulating film. The dielectric constant of the leak suppression unit is higher than a dielectric constant of the inter-gate insulating film.
US08592878B2 Semiconductor devices with low leakage Schottky contacts
Embodiments include semiconductor devices with low leakage Schottky contacts. An embodiment is formed by providing a partially completed semiconductor device including a substrate, a semiconductor on the substrate, and a passivation layer on the semiconductor, and using a first mask, locally etching the passivation layer to expose a portion of the semiconductor. Without removing the first mask, a Schottky contact is formed of a first material on the exposed portion of the semiconductor, and the first mask is removed. Using a further mask, a step-gate conductor of a second material electrically coupled to the Schottky contact is formed overlying parts of the passivation layer adjacent to the Schottky contact. By minimizing the process steps between opening the Schottky contact window in the passivation layer and forming the Schottky contact material in this window, the gate leakage of a resulting field effect device having a Schottky gate may be substantially reduced.
US08592877B2 Embedded MEMS sensors and related methods
Embodiments of embedded MEMS sensors and related methods are described herein. Other embodiments and related methods are also disclosed herein.
US08592876B2 Micro-electro-mechanical system (MEMS) capacitive OHMIC switch and design structures
A micro-electro-mechanical system (MEMS), methods of forming the MEMS and design structures are provided. The method comprises forming a coplanar waveguide (CPW) comprising a signal electrode and a pair of electrodes on a substrate. The method comprises forming a first sacrificial material over the CPW, and a wiring layer over the first sacrificial material and above the CPW. The method comprises forming a second sacrificial material layer over the wiring layer, and forming insulator material about the first sacrificial material and the second sacrificial material. The method comprises forming at least one vent hole in the insulator material to expose portions of the second sacrificial material, and removing the first and second sacrificial material through the vent hole to form a cavity structure about the wiring layer and which exposes the signal line and pair of electrodes below the wiring layer. The vent hole is sealed with sealing material.
US08592874B2 Solid state imaging device
In each of pixels 10 arranged in an array pattern, an insulating isolation part 22 electrically isolates adjacent photoelectric conversion elements 11, and the photoelectric conversion element 11 and an amplifier transistor 14. The insulating isolation part 22 constitutes a first region A between the photoelectric conversion elements 11 where the amplifier transistor 14 is not arranged, and a second region B between the photoelectric conversion elements 11 where the amplifier transistor 14 is arranged. A low concentration first isolation diffusion layer 23 is formed below the insulating isolation part 22 constituting the first region A, and a high concentration second isolation diffusion layer 24 and a low concentration first isolation diffusion layer 23 are formed below the insulating isolation part 22 constituting the second region B. A source/drain region of the amplifier transistor 14 in the second region B is formed in a well region 25 formed simultaneously with the second isolation diffusion layer 24.
US08592870B2 Pseudo buried layer and manufacturing method of the same, deep hole contact and bipolar transistor
The present invention discloses a pseudo buried layer, a deep hole contact and a bipolar transistor, and also discloses a manufacturing method of a pseudo buried layer, including: etching a silicon substrate to form an active region and shallow trenches; sequentially implanting phosphorous ion and arsenic ion into the bottom of the shallow trenches to form phosphorus impurity regions and arsenic impurity regions; conducting thermal annealing to the phosphorus impurity regions and arsenic impurity regions. The implantation of the pseudo buried layer, adopting phosphorous with rapid thermal diffusion and arsenic with slow thermal diffusion, can improve the impurity concentration on the surface of the pseudo buried layers, reduce the sheet resistance of the pseudo buried layer, form a good ohmic contact between the pseudo buried layer and a deep hole and reduce the contact resistance, and improve the frequency characteristic and current output of triode devices.
US08592869B2 Nitride-based heterojunction semiconductor device and method for the same
Disclosed is a semiconductor device. More specifically, disclosed are a nitride-based heterojunction semiconductor device and a method for producing the same. The nitride-based heterojunction semiconductor device includes a nitride semiconductor buffer layer, a barrier layer disposed on the buffer layer, a cap layer discontinuously disposed on the barrier layer, a source electrode and a drain electrode that contact at least one of the barrier layer and the cap layer, and a gate electrode that Schottky-contacts at least one of the barrier layer and the cap layer and is disposed between the source electrode and the drain electrode.
US08592867B2 Wide bandgap HEMTS with source connected field plates
A HEMT comprising a plurality of active semiconductor layers formed on a substrate. Source electrode, drain electrode, and gate are formed in electrical contact with the plurality of active layers. A spacer layer is formed on at least a portion of a surface of said plurality of active layers and covering the gate. A field plate is formed on the spacer layer and electrically connected to the source electrode, wherein the field plate reduces the peak operating electric field in the HEMT.
US08592863B2 Photodetector with internal gain and detector comprising an array of such photodetectors
A photodetector with internal gain comprising a semiconductor structure in which impact ionization events are produced mostly by minority charge carriers; a first biasing contact and a second biasing contact located in the semiconductor structure; a means of defining, in the semiconductor structure, a photon collection region close to first biasing contact; a P-N type junction formed in the semiconductor structure between the two biasing contacts and close to the second biasing contact; and a collector contact which is located in the P-N junction and used to collect current in the P-N junction.
US08592862B2 Gallium nitride semiconductor structures with compositionally-graded transition layer
The invention provides semiconductor materials including a gallium nitride material layer formed on a silicon substrate and methods to form the semiconductor materials. The semiconductor materials include a transition layer formed between the silicon substrate and the gallium nitride material layer. The transition layer is compositionally-graded to lower stresses in the gallium nitride material layer which can result from differences in thermal expansion rates between the gallium nitride material and the substrate. The lowering of stresses in the gallium nitride material layer reduces the tendency of cracks to form. Thus, the invention enables the production of semiconductor materials including gallium nitride material layers having few or no cracks. The semiconductor materials may be used in a number of microelectronic and optical applications.
US08592857B2 LED package
An exemplary encapsulation structure for encapsulating an LED chip includes a first encapsulation, a second encapsulation and a transparent resin layer with phosphorous compounds doped therein. The first encapsulation defines a receiving room for receiving the LED chip therein. The second encapsulation defines a receiving space for receiving the first encapsulation therein. The second encapsulation is separated from the first encapsulation to define a clearance between the first encapsulation and the second encapsulation. The transparent resin layer is filled in the clearance. The transparent resin layer has a uniform thickness.
US08592853B2 Semiconductor light emitting element
A semiconductor light emitting element includes: a semiconductor layer; first electrodes arranged in a staggered array on an upper surface of the semiconductor layer; and a second electrode on a lower surface of the semiconductor layer. Each first electrode includes an external connection, a first elongated portion which extends from the external connection toward a central region of the upper surface of the semiconductor layer, and a second elongated portion which extends from the external connection to a near-edge region of the semiconductor layer. In addition, the first electrodes are arrayed so that a near-tip part of the first elongated portion of each first electrode is opposed to a near-tip part of the first elongated portion of each of an adjacent one or ones of the first electrodes in a direction in which the first electrodes arranged, on the central region of the semiconductor layer.
US08592840B2 Optoelectronic semiconductor chip and use of an intermediate layer based on AlGaN
An optoelectronic semiconductor chip includes an epitaxially grown semiconductor layer sequence based on GaN, InGaN, AlGaN and/or InAlGaN, a p-doped layer sequence, an n-doped layer sequence, an active zone that generates an electromagnetic radiation and is situated between the p-doped layer sequence and the n-doped layer sequence, and at least one AlxGa1-xN-based intermediate layer where 0
US08592836B2 Light emitting device and illumination apparatus using same
A light emitting device includes a solid light-emitting element; a mounting substrate mounting the solid light-emitting element thereon; an encapsulating member encapsulating the solid light-emitting element; and a lead frame electrically connected to the solid light-emitting element through a wire. The lead frame is arranged on a rear surface of the mounting substrate, and the mounting substrate includes a front mounting surface on which the solid light-emitting element is mounted. The front mounting surface having a smooth surface region covered with the encapsulating member. The mounting substrate further includes a wire hole through which the wire extends from the front mounting surface of the mounting substrate to the rear surface thereof.
US08592832B2 Organic light emission diode display device and method of fabricating the same
An organic light emission diode (OLED) display device and a method of fabricating the same, wherein the OLED display device includes a substrate including a pixel region and a non-pixel region, a buffer layer disposed on the substrate, a semiconductor layer disposed on the buffer layer, and including a channel region and source/drain regions, a gate electrode disposed to correspond to the channel region of the semiconductor layer, a gate insulating layer insulating the semiconductor layer from the gate electrode, source/drain electrodes electrically connected to the source/drain regions of the semiconductor layer, and an interlayer insulating layer insulating the gate electrode from the source/drain electrodes, wherein areas of the buffer layer, the gate insulating layer and the interlayer insulating layer that are on the non-pixel region, respectively, are removed, and the partially removed area is 8% to 40% of a panel area.
US08592831B2 Integrated circuit device
An integrally packaged optronic integrated circuit device including an integrated circuit die containing at least one of a radiation emitter and radiation receiver and having a transparent packaging layer overlying a surface of the die, the transparent packaging layer having an opaque coating adjacent to edges of the layer.
US08592830B2 LED unit
The LED unit 100 comprises a plurality of the LED module 1 and the heat radiation plate. Each the LED module 1 comprises the LED chip and the package for incorporating the LED chip therein; the package has the electrical insulation property. Each the package comprises the sub-mount member which is located between the LED chip and the heat radiation plate and which has heat conductivity; these are integrally formed. The LED modules are arranged on the first surface of the heat radiation plate. This configuration makes it possible for the LED unit to efficiently disperse the heat in the LED chip 10 to the heat radiation plate.
US08592828B2 Organic light emitting device and method for manufacturing the same
An organic light emitting device and a method for manufacturing that same are discussed, which can reduce thickness and weight of the device as well as the manufacturing cost. The organic light emitting device includes according to an embodiment an organic light emitting diode (OLED) formed on a glass substrate; an adhesive layer formed to cover the OLED; and a metal foil formed on the adhesive layer to seal the OLED and bonded to the glass substrate, wherein the metal foil is formed of an alloy having the same or substantially the same thermal expansion coefficient as that of the glass substrate.
US08592826B2 Silicon carbide and related wide-bandgap transistors on semi insulating epitaxy
A method of making a semi-insulating epitaxial layer includes implanting a substrate or a first epitaxial layer formed on the substrate with boron ions to form a boron implanted region on a surface of the substrate or on a surface of the first epitaxial layer, and growing a second epitaxial layer on the boron implanted region of the substrate or on the boron implanted region of the first epitaxial layer to form a semi-insulating epitaxial layer.
US08592824B2 High efficiency indirect transition semiconductor ultraviolet light emitting device
Provided is a light emitting device formed of an indirect transition semiconductor configured from a semiconductor material having high exciton binding energy, wherein an active layer of the indirect transition semiconductor or an active region by a pn junction is formed, the light emitting device has an electrode for injecting current into the active layer or the active region, and the internal quantum efficiency is 10% or more.
US08592817B2 Self-aligned metal oxide TFT with reduced number of masks
A method of fabricating MOTFTs on transparent substrates by positioning opaque gate metal on the substrate front surface and depositing gate dielectric material overlying the gate metal and a surrounding area and metal oxide semiconductor material on the dielectric material. Depositing selectively removable etch stop material on the semiconductor material and photoresist on the etch stop material to define an isolation area in the semiconductor material. Removing uncovered portions of the etch stop. Exposing the photoresist from the substrate rear surface using the gate metal as a mask and removing exposed portions leaving the etch stop material overlying the gate metal covered. Etching the semiconductor material to isolate the TFT. Selectively etching the etch stop layer to leave a portion overlying the gate metal defining a channel area. Depositing and patterning conductive material to form source and drain areas on opposed sides of the channel area.
US08592815B2 Light emitting display apparatus
There is provided a light emitting display apparatus including at least a light emitting element and a thin film transistor (TFT) for driving the light emitting element, characterized in that a mechanism is provided in which a semiconductor constituting the TFT is irradiated with at least a part of light whose wavelength is longer than a predetermined wavelength among the light emitted by the light emitting element.
US08592814B2 Device with oxide semiconductor thin film transistor
Disclosed is a semiconductor device which consumes low power and has high reliability and tolerance for electrostatic discharge. The semiconductor device includes, over a first substrate, a pixel portion and a driver circuit portion both of which have a thin film transistor having an oxide semiconductor layer. The semiconductor device further possesses a second substrate to which a first counter electrode layer and a second counter electrode layer are provided, and a liquid crystal layer is interposed between the first and second substrates. The first and second counter electrode layers are provided over the pixel portion and the driver circuit portion, respectively, and the second counter electrode layer has the same potential as the first counter electrode layer.
US08592813B2 Semiconductor device and stacked semiconductor apparatus
A semiconductor device includes: a through-electrode formed in a perpendicular direction so as to extend therethrough; a series circuit section formed from a plurality of test-ready switches successively connected in series and driven by a driving voltage transmitted to the through-electrode through a predetermined different layer through-electrode of a different semiconductor device stacked on an upper layer side or a lower layer side; and a pair of test terminals connected to end portions of the series circuit section and adapted to be used for measurement of conduction of the series circuit section.
US08592811B2 Active matrix substrate and display panel
An active matrix substrate (20a) includes a plurality of pixel electrodes (18a) arranged in a matrix, and a plurality of TFTs (5) each connected to a corresponding one of the pixel electrodes (18a), and each including a gate electrode (11a) provided on an insulating substrate (10a), a gate insulating film (12a) covering the gate electrode (11a), a semiconductor layer (16a) provided on the gate insulating film (12a) and having a channel region (C) overlapping the gate electrode (11a), and a source electrode (15aa) and a drain electrode (15b) of copper or copper alloy provided on the gate insulating film (12a) and separated from each other by the channel region (C) of the semiconductor layer (16a). The semiconductor layer (16a) is formed of an oxide semiconductor and covers the source electrode (15aa) and the drain electrode (15b).
US08592807B2 Photoelectric element
Disclosed is a photoelectric element having an excellent conversion efficiency and provided with a hole transporting layer that is endowed with excellent hole transporting properties and a sufficiently large reaction interface.The photoelectric element of the invention has a pair of electrodes, an electron transporting layer and a hole transporting layer which are disposed between the electrodes, and an electrolyte solution. The hole transporting layer includes a first organic compound having a redox moiety capable of repeated oxidation and reduction. The electrolyte solution stabilizes a reduced state of the redox moiety. The organic compound and the electrolyte solution together form a first gel layer.
US08592806B2 Quinone compounds as dopants in organic electronics
The invention relates to novel quinone compounds and to the use thereof as dopants in organic electronics.
US08592805B2 Compound for organic thin-film transistor and organic thin-film transistor using the compound
A compound for an organic thin film transistor having a structure shown by the following formula (1): X1-L-Ar-L-X2  (1) wherein L is —C≡C—, or —CH═CH— in a trans configuration, X1 and X2 are independently a substituted or unsubstituted aromatic heterocyclic group having 5 to 60 ring atoms, and their bonding positions to L are in heterocycles, Ar is a substituted or unsubstituted aromatic hydrocarbon group having 6 to 60 ring carbon atoms, or a substituted or unsubstituted aromatic heterocyclic group having 5 to 60 ring atoms, and at least one of X1, X2 and Ar is a bi- or higher-fused ring.
US08592802B2 (Al, In, Ga, B)N device structures on a patterned substrate
A nitride light emitting diode, on a patterned substrate, comprising a nitride interlayer having at least two periods of alternating layers of InxGa1-xN and InyGa1-yN where 0
US08592798B2 Non-volatile storage device and method for manufacturing the same
A variable resistance non-volatile storage device includes: a first line which includes a barrier metal layer and a main layer, and fills an inside of a line trench formed in a first interlayer insulating layer; a first electrode covering a top surface of the first line and comprising a precious metal; memory cell holes formed in a second interlayer insulating layer; a variable resistance layer formed in the memory cell holes and connected to the first electrode; and second lines covering the variable resistance layer and the memory cell holes, wherein in an area near the memory cell holes, the main layer is covered with the barrier metal layer and the first electrode in an arbitrary widthwise cross section of the first line.
US08592797B2 Variable resistance memory device having reduced bottom contact area and method of forming the same
A variable resistance memory element and method of forming the same. The memory element includes a substrate supporting a bottom electrode having a small bottom contact area. A variable resistance material is formed over the bottom electrodes such that the variable resistance material has a surface that is in electrical communication with the bottom electrode and a top electrode is formed over the variable resistance material. The small bottom electrode contact area reduces the reset current requirement which in turn reduces the write transistor size for each bit.
US08592795B2 Multilevel mixed valence oxide (MVO) memory
Various embodiments include a memory device and methods of forming the same. The memory device can include an electrode coupled to one or more memory elements, to store information. The electrode may comprise a number of metals, where a first one of the metals has a Gibbs free energy for oxide formation lower than the Gibbs free energy of oxidation of a second one of the metals.
US08592794B2 Resistance random access memory element and method for making the same
A resistance random access memory element includes a first electrode, an insulating layer, a diffusing metal layer, and a second electrode superimposed in sequence. The insulating layer includes a plurality of pointed electrodes. A method for making a resistance random access memory element includes growing and forming an insulating layer on a surface of a first electrode. A diffusing metal layer is formed on a surface of the insulating layer. A second electrode is mounted on a surface of the diffusing metal layer. A negative pole and a positive pole of a driving voltage are connected with the first and second electrodes, respectively. The diffusing metal in the diffusing metal layer is oxidized into metal ions by the driving voltage. The metal ions are driven into the insulating layer and form a plurality of pointed electrodes after reduction.
US08592793B2 Electrode diffusions in two-terminal non-volatile memory devices
A non-volatile memory device includes a plurality of pillars, where each of the plurality of pillars contains a non-volatile memory cell containing a steering element and a storage element and at least one of a top corner or a bottom corner of each of the plurality of pillars is rounded. A method of making non-volatile memory device includes forming a stack of device layers, and patterning the stack to form a plurality of pillars, where each of the plurality of pillars contains a non-volatile memory cell that contains a steering element and a storage element, and where at least one of top corner or bottom corner of each of the plurality of pillars is rounded.
US08592792B2 Heterojunction device comprising a semiconductor oxide and a resistivity-switching oxide or nitride
A monolithic three dimensional memory array is provided that includes a first memory level formed above a substrate, and a second memory level monolithically formed above the first memory level. The first memory level includes a first plurality of substantially parallel, substantially coplanar conductors extending in a first direction, a second plurality of substantially parallel, substantially coplanar conductors extending in a second direction, the second direction different from the first direction, the second conductors above the first conductors, and a first plurality of devices. Each of the first plurality of devices is disposed between one of the first conductors and one of the second conductors, and includes a resistivity-switching binary metal oxide or nitride compound and a silicon, germanium, or silicon-germanium alloy resistor of a single conductivity type. Numerous other aspects are provided.
US08592781B2 Method and apparatus for quantitative evaluation of wall zeta-potential, and method and apparatus for quantitative visualization of surface modification pattern
A first and a second fluorescent dye are mixed into a solution, the first dye being positively ionized in the solution and the second dye being negatively ionized in the solution and having different fluorescence wavelengths from the first dye. The solution is flown onto a measured surface, and the surface is excited with an evanescent wave to produce a fluorescence intensity distribution of two colors. A fluorescence intensity of the surface is measured using a two-dimensional imaging element, the element providing a fluorescence intensity of each color separated from the other colors, thereby calculating a ratio of the fluorescence intensities of the colors. Using an equation expressing a relationship between the ratio of fluorescence intensities and a wall zeta potential, the ratio is converted to a two-dimensional distribution of wall zeta potentials. This achieves visualizing in real time and quantitatively evaluating the two-dimensional distribution of wall zeta potentials, and surface modifications.
US08592776B2 Charged particle beam apparatus
With a multi-beam type charged particle beam apparatus, and a projection charged particle beam apparatus, in the case of off-axial aberration corrector, there is the need for preparing a multitude of multipoles, and power supply sources in numbers corresponding to the number of the multipoles need be prepared. In order to solve this problem as described, a charged particle beam apparatus is provided with at least one aberration corrector wherein the number of the multipoles required in the past is decreased by about a half by disposing an electrostatic mirror in an electron optical system.
US08592775B2 Radiation detector having a ribbed scintillator
A system for efficient neutron detection is described. The system includes a neutron scintillator formed with a number of protruding parallel ribs each side of the scintillator, forming a first set of ribs and a second set of ribs. The ribs have a protrusion height that provides a selected neutron absorption efficiency. The system includes a set of wavelength shifting fibers positioned between each adjacent pair of ribs on both the first side and the second side. Each set of wavelength shifting fibers are in optical proximity to the adjacent pair of the ribs that set of fibers are positioned between.
US08592764B2 X-ray detector for electron microscope
Multiple detectors arranged in a ring within a specimen chamber provide a large solid angle of collection. The detectors preferably include a shutter and a cold shield that reduce ice formation on the detector. By providing detectors surrounding the sample, a large solid angle is provided for improved detection and x-rays are detected regardless of the direction of sample tilt.
US08592763B2 Ion beam sample preparation apparatus and methods
Disclosed are embodiments of an ion beam sample preparation apparatus and methods for using the embodiments. The apparatus comprises a tilting ion beam irradiating means in a vacuum chamber that may direct ions toward a sample, a shield blocking a portion of the ions directed toward the sample, and a shield retention stage with shield retention means that replaceably and removably holds the shield in a position. The shield has datum features which abut complementary datum features on the shield retention stage when the shield is held in the shield retention stage. The tilting ion beam irradiating means may direct ions at the sample from more than one tilt angle. A rotating shield retention stage is also disclosed which works in concert with the tilting ion beam irradiating means.
US08592759B2 Sample preparation for ionization with matrix-assisted laser desorption
A simplified sample preparation on a sample support for ionization with laser desorption (MALDI or LDCI, for example) includes depositing an analyte material onto a deposition site, providing a sample site which is intended as the substrate for a matrix crystal layer at a distance from the deposition site, and establishing a liquid communication between the deposition site and the sample site. A device for the preparation of samples for ionization with matrix-assisted laser desorption, and a sample support for use with the inventive method are also disclosed.
US08592758B1 Vapor sampling adapter for direct analysis in real time mass spectrometry
A vapor sampling adapter for direct analysis in real time mass spectrometer (DART-MS) applications comprises a vapor transport line and a manifold. In the preferred embodiment the vapor transport line is heated and approximately 20 feet in length. This provides a means to utilize the highly accurate and reliable DART-MS device to detect chemical agents at sample location points up to 20 feet away from the device with the ability to easily move the sampling point to any desired point within the sampling range, thus allowing the operator to systematically scan a site in a fashion similar to that used with a handheld detector. Sample vapor flows through the vapor transport line to the manifold where it comes in proximity to the ion generator of the DART mass spectrometer before entering into the mass spectrometer for analysis. The present invention may be used to raster a surface to determine the precise location of chemical agent contamination. Additionally, the invention may be used to tune or calibrate a DART-MS.
US08592754B2 High sensitivity mass spectrometry systems
A high sensitivity desorption electrospray ionization mass spectrometry system that employs a heated platform, along with means for directing a liquid stream containing an analyte of interest onto a target location on the heated platform to heat the stream, an electrospray emitter for generating an electrospray and directing the electrospray at the target location on the heated platform to produce an ionized, desorbed analyte, and a mass spectrometer for receiving and detecting the ionized, desorbed analyte.
US08592752B2 Techniques for performing retention-time matching of precursor and product ions and for constructing precursor and product ion spectra
Techniques are described for matching a precursor ion with one or more related product ions. Input data sets are obtained from a plurality of injections. Each of the input data sets includes a same precursor ion and one or more product ions. The input data sets are normalized in accordance with a single retention time for the precursor ion. For each input data set, it is determined which product ions are within a predetermined retention time window with respect to the single retention time for the precursor ion. If a product ion is within the predetermined retention time window in at least one of the input data sets, it is determined that the product ion is related to the precursor ion. An apparatus for analyzing a sample includes a chromatography module, a mass-spectrometry module, and a control unit.
US08592751B2 Methods and apparatus for enhanced ion based sample detection using selective pre-separation and amplification
The invention relates generally to ion mobility based systems, methods and devices for analyzing samples and, more particularly, to sample pre-separation and amplification.
US08592745B2 Method and system for optoelectronic receivers utilizing waveguide heterojunction phototransistors integrated in a CMOS SOI wafer
A method and system for optoelectronic receivers utilizing waveguide heterojunction phototransistors (HPTs) integrated in a CMOS SOI wafer are disclosed and may include receiving optical signals via optical fibers operably coupled to a top surface of the chip. Electrical signals may be generated utilizing HPTs that detect the optical signals. The electrical signals may be amplified via voltage amplifiers, or transimpedance amplifiers, the outputs of which may be utilized to bias the HPTs by a feedback network. The optical signals may be coupled into opposite ends of the HPTs. A collector of the HPTs may comprise a silicon layer and a germanium layer, a base may comprise a silicon germanium alloy with germanium composition ranging from 70% to 100%, and an emitter including crystalline or poly Si or SiGe. The optical signals may be demodulated by communicating a mixer signal to a base terminal of the HPTs.
US08592741B2 Image sensor cell for night vision
An image sensor cell (100) is presented for use in an imaging device, for example of a night vision type. The image sensor cell (100) comprises an electrodes' assembly and a control unit (118). The electrodes' assembly is configured and operable to receive an input light signal and produce a corresponding electrical signal. The electrodes' assembly comprises a photocathode (112) having an active region capable of emitting electrons in response to incident light; and at least one electrode (114, 116) in a path of electrons emitted from the photocathode (112). The control unit (118) is configured and operable for controlling an electric field profile in said path so as to selectively cause the electrons' capture on said at least one electrode (114,116) resulting in accumulation of charge on said at least one electrode (114,116) corresponding to the input electromagnetic signal indicative of an acquired image, thereby enabling direct reading of the accumulated charge. The image sensor cell (100) thus provides for direct conversion of a light signal into an electric signal indicative thereof.
US08592735B2 Induction heating apparatus
An induction heating apparatus for controlling the temperature distribution for heating a metal plate irrespective if it has a small thickness, is magnetic or nonmagnetic, and capable of coping with a change in the width of the plate, or meandering of the plate. The apparatus heats a metal plate 1 by induction heating, which passes through the inside of induction coils 2, wherein in a vertical projected image of the conductors on the metal plate 1, the conductors 2a and 2b, parts of the induction coil, placed on the front surface side and the back surface side of the metal plate 1, the conductors 2a and 2b on the front surface side and the back surface side are arranged so as to be deviated from each other in the lengthwise direction of the metal plate 1, the edge portion of at least either the conductor 2a on the front surface side of the metal plate 1 or the conductor 2b on the back surface side thereof is arranged aslant or arcuately, and magnetic cores 10 are arranged at the outer sides of the induction coils 2.
US08592730B2 Heater assembly for suture welder
Disclosed is a heater device for thermally welding suture strands, including: a substrate extending from a first end to a second end along a substrate axis, and having a substantially planar heater support surface; a joinder layer disposed on the heater support surface; a heater element extending from a first end to a second end along a heater axis thereof and disposed on the joinder layer, the heater element being a layer and being coupled to the support surface by the joinder layer; an electrical interface including a first electrically conductive element coupled to the first end of the heater element, and a second electrically conductive element coupled to the second end of the heater element. In some embodiments, the heater element is elongated along the heater axis.
US08592728B2 Food cooking device and cooking utensil adapted to facilitate the heating of food
A food-cooking device including at least one heating member arranged to heat food placed inside a cooking utensil. At least one sensor arrangement is arranged to sense the temperature of the cooking utensil. The food-cooking device is adapted to control the heating member based on the temperature sensed by the sensor arrangement. A cooking utensil is adapted to facilitate the heating of food with a food-cooking device. The cooking utensil includes a body designed with a hollow adapted to contain the food.
US08592726B2 Image heating apparatus and heater used in the apparatus
An image heating apparatus includes: an endless belt; a heater, contacted to a surface of the endless belt, provided so that a longitudinal direction thereof is parallel to a generating line direction of the endless belt; and a pressing member for forming a nip together with the endless belt. The heater includes: an elongated substrate; a first heat generating line, provided on the substrate along a longitudinal direction of the substrate, including first heat generating resistors having a negative temperature coefficient of resistance and being electrically connected in series; and a second heat generating line, provided on the substrate along the longitudinal direction of the substrate, electrically connected to the first heat generating line in parallel. The second heat generating line includes a plurality of second heat generating resistors having the negative temperature coefficient of resistance and being electrically connected in series.
US08592725B1 Taped sealed heating system for low voltage heated garments
A taped sealed heating system for low voltage heated garments includes at least one heating pad connected by a bus to a power supply. The heating pad and bus are laminates comprised of a tape with a thermoplastic hot melt adhesive that encapsulates heating wires and adhere to textiles. A reticulate pattern of resistance wire is attached to a substrate disposed between the core shell and an outer layer of the heating element. By heat-pressing the sealing tape on the wire pattern stitched onto a substrate, the adhesive layer melts, covers the wires and substrate, cools to become solid, and firmly encases the wires. The heating pad and bus are affixed to the garment using sealing tape with a hot melt adhesive along the periphery of the pad and bus.
US08592721B2 Systems and methods for diagnosing secondary weld errors
A controller for a welding system adapted to determine a value of a weld secondary parameter across a weld secondary component based on a sensed parameter is provided. The controller may also be adapted to compare the determined value to a reference value range and to alert a user to a presence and location of a weld secondary error when the determined value is outside the referenced value range.
US08592720B2 Polarity switching method in consumable electrode AC pulse arc welding
A polarity switching control method is provided for consumable electrode AC pulse arc welding. By the method, a peak current and a base current are applied during an electrode-positive polarity period, while an electrode-negative current is applied during an electrode-negative polarity period. For performing the welding, polarity switching is performed to alternate the electrode-positive polarity period and the electrode-negative polarity period. When a consumable electrode and a base metal are in short circuit with each other, the polarity switching is performed after the short circuit is broken and an arc is generated.
US08592719B2 System and method for identifying welding consumable wear
A system and method for determining a wear condition of a welding consumable includes a welding torch having a consumable component and a wire delivery system configured to deliver wire to the welding torch during a welding process. The welding system also includes a power source configured to deliver power to the welding torch to perform the welding process. A controller is included that is configured to monitor at least one operational characteristic of the delivery of wire to the welding torch over a selected period, determine a wear condition of the consumable component from the at least one operational characteristic, and generate a signal indicating detection of the wear condition.
US08592718B2 Apparatus for forming pattern using laser
An apparatus for forming a pattern using a laser is provided. The apparatus includes a pattern storing unit, a controller, a laser oscillating unit, an X-Y driver, a header unit, and a stage. The pattern storing unit stores data on light guide patterns of a discontinuous straight line shape. The controller transmits position signal of the light guide patterns to the X-Y driver and simultaneously, transmits a switching signal to the laser oscillating unit. The laser oscillating unit outputs a laser beam synchronized with a movement of the header unit. The X-Y driver moves the header unit and the stage. The header unit moves along a first guide rail. The stage moves along a fixed second guide rail in the front and rear direction of the light guide panel.
US08592704B2 Electronic device with switches to selectively control safe access
An exemplary electronic device includes a casing, a first switch, a second switch and a switch control unit. The second switch is connected in parallel with the first switch. The casing includes a side plate and a top plate detachably connected with a top end of the side plate. The first switch is turned on when the top plate mounted to the side plate and turned off when the top plate detached from the side plate. The switch control unit includes a sliding member mounted at the second switch. The sliding member includes a pressing plate and is moveable relative to the side plate between a first position in which the pressing plate aligned with and pressing the second switch to turn on the second switch and a second position in which the pressing plate is staggered with the second switch to turn off the second switch.
US08592702B2 Illuminant keyboard device
A illuminant keyboard device includes a bottom frame having a plurality of latch parts, a plurality of keying units disposed on the bottom frame, a membrane switch interposed between the bottom frame and the keying units, a light guide plate interposed between the membrane switch and the bottom frame, a least a light source disposed on predetermined position of the light guide plate, a plate interposed between the membrane switch and the light guide plate and a light-shielding plate interposed between the membrane switch and the keying units. The light guide plate has a plurality of first holes and the plate has a plurality of second holes, the diameter of each of the first holes is larger than the diameter of each of the second holes.
US08592701B2 Switch of clutch pedal for vehicle
A clutch pedal switch for a vehicle may include a switch body on which a first fixed contact point and a second fixed contact point are formed with a predetermined distance therebetween, a first elastic member disposed around the first fixed contact point to apply elastic force to the first fixed contact point, and a first operation contact point is formed to selectively contact the first fixed contact point, a second elastic member disposed around the second fixed contact point to apply elastic force in the second fixed contact point direction, and a second operation contact point is formed to selectively contact the second fixed contact point, a rotating member disposed between the first fixed contact point and the second fixed contact point and is rotated by rotation of a pedal to apply force to the first elastic member and the second elastic member such that the first and second fixed contact points selectively contact the first and second operation contact points, and a terminal connected to the first elastic member and the second elastic member to transfer a contact signal of the first and second fixed contact points with the first and second operation contact points.
US08592698B2 Capacitive touch system and data transmission method in a capacitive touch system
A capacitive touch system uses at least two first integrated circuits to simultaneously scan a touch panel, each of the first integrated circuits only for scanning a portion of the touch panel to retrieve the sensed data from its responsible traces. Therefore, the capacitive touch system can maintain a good frame rate, even the touch panel is a large scale touch panel. A data transmission method transmits only the non-zero sensed values to a second integrated circuit where a calculation with the non-zero sensed values is executed, and thereby reduces the data transmission time.
US08592696B2 Game carcass hanger and releasable weighing apparatus
Carcass support frame 12 is supported by hanger support pin 38 of hanger 14. When a carcass has been mounted to the mounting hooks 32 and 33 of the carcass support frame, the hunter can move the scale connector lever 18 downwardly so that the scale tends to lift the carcass support frame 12 upwardly off the hanger support pin 38, causing the scale to bear the full weight and indicate the weight of the carcass.
US08592693B2 Electronic device housing
An electronic device housing includes a first housing, a second housing, a plurality of frames, and a plurality of fixing members. The first housing includes a bottom plate and a side plate extending from an edge of the bottom plate. The side plate is welded to the second housing. The frames are welded to the first housing. The fixing members fix the second housing to the frames.
US08592690B2 Circuit board having circumferential shielding layer
A circuit board (100) includes a first shielding layer (20) extending horizontally, an accessorial shielding layer, a signal circuit layer (3) positioned between the first shielding layer and the accessorial shielding layer, and a circumferential shielding layer (6) surrounding the circuit board and electrically connecting with the first shielding layer and the accessorial shielding layer to improve shielding effect.
US08592687B2 Signal line and circuit substrate
A signal line is a linear conductor provided within a laminated body. A first ground conductor is provided on a positive direction side in a z axis direction within the laminated body, compared with the signal line, and overlaps with the signal line in a planar view seen from the z axis direction. A second ground conductor is provided on a negative direction side in the z axis direction within the laminated body, compared with the signal line, and overlaps with the signal line in the planar view seen from the z axis direction. Via hole conductors connect the ground conductors to each other. In the first ground conductor, a plurality of opening portions are arranged along the signal line in the planar view seen from the z axis direction. The via hole conductors are provided between the opening portions adjacent to one another, in an x axis direction.
US08592684B2 Electrical insulating cap formation
An electrical insulating cap formation is disclosed. The electrical insulating cap formation includes a strip of material and one or more electrical insulating caps each comprising a tubular section and a closed end section, in which the one or more electrical insulating caps are carried on the strip of material by their end sections. The strip of material includes a wing portion which extends over at least a part of the tubular sections of the one or more electrical insulating caps. The strip of material is formed such that an outer edge of the wing portion is spaced apart from the tubular sections of the one or more electrical insulating caps.
US08592678B2 Photoelectric conversion device and manufacturing method thereof
A photoelectric conversion device including a first substrate; a second substrate located generally opposite to the first substrate; a first grid pattern located on the first substrate, wherein the first grid pattern includes a first finger electrode; a first collector electrode spaced from the first finger electrode and extending in a direction that intersects the first finger electrode; and a first connecting electrode connecting the first finger electrode and the first collector electrode; and a second grid pattern located on the second substrate, wherein the second grid pattern includes a second finger electrode; a second collector electrode spaced from the second finger electrode and extending in a direction that intersects the second finger electrode; and a second connecting electrode connecting the second finger electrode and the second collector electrode, wherein the first connecting electrode and the second connecting electrode are arranged alternately and do not overlap each other.
US08592676B2 Solar cell and method for manufacturing the same
A solar cell in which an n-type fine silicon particle film is formed in a lamination layer on the surface of a transparent substrate via a transparent electrode, and the n-type fine silicon particle film is covalently bound to the transparent electrode via the first organic coating formed on the surface of the transparent electrode and the second organic coating formed on the surface of the n-type fine silicon particle film and the n-type fine silicon particle film is covalently bound to the p-type fine silicon particle film via the second organic coating formed on the surface of the n-type fine silicon particle film and the third organic coating formed on the surface of the p-type fine silicon particle film.
US08592670B2 Polyphonic note detection
Processor-implemented methods and systems for polyphonic note detection are disclosed. The method includes converting a portion of a polyphonic audio signal from a time domain to a frequency domain. The method includes detecting a fundamental frequency peak in the frequency domain. The method then detects a defined number of integer-interval harmonic partials. If a defined number of integer-interval harmonic partials relative to the fundamental frequency peak are detected the fundamental frequency is recorded as a detected note. This process is repeated for each fundamental frequency until each note in the polyphonic audio signal has been detected. For example, this method allows detection of each note in a strummed guitar chord to provide feedback on the tuning of each string in a strummed chord or allows detection and feedback of the timing and pitch errors for guitar chords played along with a reference track.
US08592667B1 Maize inbred PH18FC
A novel maize variety designated PH18FC and seed, plants and plant parts thereof. Methods for producing a maize plant that comprise crossing maize variety PH18FC with another maize plant. Methods for producing a maize plant containing in its genetic material one or more traits introgressed into PH18FC through backcross conversion and/or transformation, and to the maize seed, plant and plant part produced thereby. Hybrid maize seed, plant or plant part produced by crossing the variety PH18FC or a locus conversion of PH18FC with another maize variety.
US08592666B1 Maize inbred PH1MD0
A novel maize variety designated PH1MD0 and seed, plants and plant parts thereof. Methods for producing a maize plant that comprise crossing maize variety PH1MD0 with another maize plant. Methods for producing a maize plant containing in its genetic material one or more traits introgressed into PH1MD0 through backcross conversion and/or transformation, and to the maize seed, plant and plant part produced thereby. Hybrid maize seed, plant or plant part produced by crossing the variety PH1MD0 or a locus conversion of PH1MD0 with another maize variety.
US08592661B1 Citrus cultivar CALLOR1
A citrus cultivar designated CALLOR1 is disclosed. The invention relates to the seeds of citrus cultivar CALLOR1, to the plants of citrus cultivar CALLOR1, to the plant parts of citrus cultivar CALLOR1, and to methods for producing progeny of citrus cultivar CALLOR1. The invention also relates to methods for producing a citrus plant CALLOR1 containing in its genetic material one or more transgenes and to the transgenic citrus plants and plant parts produced by those methods. The invention also relates to citrus cultivars or breeding cultivars, and plant parts derived from citrus cultivar CALLOR1. The invention also relates to methods for producing other citrus cultivars, lines, or plant parts derived from citrus cultivar CALLOR1, and to citrus plants, varieties, and their parts derived from use of those methods. The invention further relates to hybrid citrus seeds, plants, and plant parts produced by crossing cultivar CALLOR1 with another citrus cultivar.
US08592658B2 Soybean cultivar S100323
A soybean cultivar designated S100323 is disclosed. The invention relates to the seeds of soybean cultivar S100323, to the plants of soybean cultivar S100323, to the plant parts of soybean cultivar S100323, and to methods for producing progeny of soybean cultivar S100323. The invention also relates to methods for producing a soybean plant containing in its genetic material one or more transgenes and to the transgenic soybean plants and plant parts produced by those methods. The invention also relates to soybean cultivars or breeding cultivars, and plant parts derived from soybean cultivar S100323. The invention also relates to methods for producing other soybean cultivars, lines, or plant parts derived from soybean cultivar S100323, and to the soybean plants, varieties, and their parts derived from use of those methods. The invention further relates to hybrid soybean seeds, plants, and plant parts produced by crossing cultivar S100323 with another soybean cultivar.
US08592651B2 Antimicrobial peptides and uses thereof
The subject invention pertains to methods and materials for enhancing microbial resistance in plants. Specifically exemplified herein are grapevines transformed with polynucleotides that express a peptide which confers antimicrobial activity.
US08592650B2 Elite event EE-GM3 and methods and kits for identifying such event in biological samples
The invention provides specific transgenic soybean plants, plant material and seeds, characterized in that these products harbor a specific herbicide tolerance transformation event at a specific location in the soybean genome (elite event EE-GM3). The invention also provides for methods of producing soybean plants and seeds having elite event EE-GM3.
US08592647B2 Manipulation of ammonium transporters (AMTs) to improve NUE in higher plants
The present invention provides polynucleotides and related polypeptides of the protein AMT. The invention provides genomic sequence for the AMT gene. AMT is responsible for controlling nitrogen utilization efficiency in plants.
US08592646B2 Promoter, promoter control elements, and combinations, and uses thereof
The present document is directed to promoter sequences and promoter control elements, polynucleotide constructs comprising the promoters and control elements, and methods of identifying the promoters, control elements, or fragments thereof. The document further relates to the use of such promoters or promoter control elements to modulate transcript levels in plants, and plants containing such promoters or promoter control elements.
US08592645B2 Engineered zinc finger proteins targeting plant genes involved in fatty acid biosynthesis
The present disclosure relates to engineered zinc finger proteins that target genes in plants involved in fatty acid biosynthesis. Methods of using such zinc finger proteins in modulating gene expression, gene inactivation, and targeted gene modification are also provided.
US08592643B2 Methods for introducing a human gene into a marmoset embryo for making a transgenic marmoset
An object of the present invention is to provide a method for introducing a gene into an embryo for production of a human disease model primate animal using a non-human primate animal such as a marmoset. The present invention relates to a method for introducing a foreign gene into an early embryo of a non-human primate animal, which comprises placing early embryos of a non-human primate in a 0.2 M to 0.3 M sucrose solution, so as to increase the volume of the perivitelline spaces, and then injecting a viral vector containing a human foreign gene operably linked to a promoter into the perivitelline spaces of the early embryos.
US08592641B2 Water-sensitive biodegradable film
A film that is biodegradable and water-sensitive (e.g., water-soluble, water-dispersible, etc.) in that it loses its integrity over time in the presence of water is provided. More specifically, the film contains a combination of a biodegradable polyester and a water-sensitive thermoplastic starch. The desired water-sensitive attributes of film may be achieved in the present invention by selectively controlling a variety of aspects of the film construction, such as the nature of the components employed, the relative amount of each component, the manner in which the film is formed, and so forth.
US08592638B2 Process for the preparation of light fuels
In the process of the invention, an aliphatic C2-C14 hydrocarbon product is prepared from natural fats or derivatives thereof. The process comprises the steps of: (i) providing a natural fat or derivative thereof, (ii) deoxygenating a natural fat or derivative thereof originating from step (i) to yield an aliphatic C9-C28 hydrocarbon, (iii) hydrocracking an aliphatic C9-C28 hydrocarbon originating from step (ii) to yield a product comprising an aliphatic C2-C14 hydrocarbon, (iv) isomerising an aliphatic C2-C14 hydrocarbon originating from step (iii) into an isomerised aliphatic C2-C14 hydrocarbon, and optionally (v) recovering an isomerised C2-C14 hydrocarbon originating from step (iv) as said C2-C14 hydrocarbon product. Pure and high quality light fuel is easily obtained in sufficient amounts.
US08592635B2 Integrated ethanol production by extracting halides from acetic acid
This invention relates to a process for producing ethanol and recovering methyl iodide, the process comprising the steps of carbonylating methanol in a carbonylation system in the presence of a carbonylation catalyst under conditions effective to form acetic acid; hydrogenating the acetic acid in a hydrogenation system in the presence of a hydrogenation catalyst to form a crude ethanol product comprising ethanol and water; and separating the crude ethanol product to form an ethanol stream and a water stream.
US08592624B2 Production of ethylenically unsaturated acids or esters thereof
A production process for the manufacture of ethylenically unsaturated acids or esters thereof is described. The process includes the steps of reaction of an alkanoic acid, or ester of an alkanoic acid, of the formula R3—CH2—COOR4 where R3 and R4 are each independently hydrogen or an alkyl group, in the presence of a catalyst system to produce an ethylenically unsaturated acid or ester product. The process is characterised in that the acid or ester product is subsequently contacted with a dienophile to thereby remove discolouration therefrom. An ethylenically unsaturated acid or ester crude product purification process is also described.
US08592622B2 Polymerizable fluorine-containing compound
A polymerizable fluorine-containing compound represented by formula (1), wherein R1 represents a polymerizable double-bond containing group, R2 represents an acid-labile protecting group, R3 represents a fluorine atom or fluorine-containing alkyl group, and W represents a bivalent linking group. This compound can provide a fluorine-containing polymer compound that has a weight-average molecular weight of 1,000-1,000,000 and contains a repeating unit represented by formula (2), wherein R2, R3 and W are defined as above, each of R4, R5 and R6 independently represents a hydrogen atom, fluorine atom or monovalent organic group, at least two of R4, R5 and R6 may be combined to form a ring. This polymer compound can provide a resist composition capable of forming a pattern that is transparent to exposure light and superior in rectangularity.
US08592612B1 Water soluble carbon nanotubes
Embodiments of the present disclosure present systems and methods for the synthesis of carbon nanotubes (CNTs) functionalized with mono-terminated, protected polyethylene glycol (PEG). As compared with bi-functional PEG, mono-terminated PEG the PEG-THFF oligomer has only one reaction site. The use of mono-terminated PEG may enhance the solubility of CNTs functionalized with mono-terminated PEG by inhibiting cross-linking between nanotubes and leads to a dramatic increase in aqueous solubility. In an example, single-walled carbon nanotubes functionalized with PEG having a tetrahydrofurfuryl (THFF) terminal group (SWNT-PEG-THFF) is found to disperse in water by ultrasonication and forms stable viscous dispersions at concentrations as high as about 9 g/L. This result exceeds the solubility of a previously reported SWNT-PEG graft copolymer, approximately 6 g/L, by more than 30%.
US08592611B2 Trioxane dimer sulfur compounds
The disclosure provides novel trioxane sulfur dimers having Formula I: methods for their preparation, pharmaceutical compositions containing these compounds, and methods for treating cancer, proliferative disorders, and/or malaria using these compounds and/or compositions.
US08592609B2 Method for obtaining lactide
Processes for producing lactide from lactic acid oligomers are described herein. The processes generally include heating a lactic acid oligomer in the presence of a catalyst at a temperature of between 150° C. and 300° C. under a pressure of less than 0.01 MPa to form a lactide; distilling the lactide; and condensing and recovering the lactide, wherein the catalyst is a metal salt of the phosphite anion PO33− in which the metal is selected from the group consisting of tin, aluminum, zinc, titanium and zirconium.
US08592606B2 Liquid precursor for depositing group 4 metal containing films
The present invention is related to a family of liquid group 4 precursors represented by the formula: (pyr*)M(OR1)(OR2)(OR3) wherein pyr* is an alkyl substituted pyrrolyl, wherein M is group 4 metals include Ti, Zr, and Hf; wherein R1-3 can be same or different and selected from group consisting of linear or branched C1-6 alkyls; preferably C1-3 alkyls; R4 is selected from the group consisting of C1-6 alkyls, preferably branched C3-5 alkyls substituted at 2, 5 positions to prevent the pyrrolyl coordinated to the metal center in η1 fashion; n=2, 3, 4. Most preferably the invention is directed to (2,5-di-tert-butylpyrrolyl)(tris(ethoxy)titanium, (2,5-di-tert-amylpyrrolyl)(tris(ethoxy)titanium, and (2,5-di-tert-amylpyrrolyl)(tris(iso-propoxy)titanium. The invention is also directed to (cyclopentadienyl)(2,5-di-methylpyrrolyl)(bis(ethoxy))titanium. Deposition methods using these compounds are also contemplated.
US08592604B2 Thiazolothiazole compound and thiazolothiazole polymer
The invention provides a thiazolothiazole compound represented by the following Formula (I). In Formula (I), Ar1 represents a substituted or unsubstituted aromatic group; R1 represents a hydrogen atom, an alkyl group, a substituted or unsubstituted aryl group, or a substituted or unsubstituted aralkyl group; and n represents an integer of 0 or 1. The invention further provides a thiazolothiazole polymer having the thiazolothiazole compound as a polymerization unit thereof.
US08592602B2 Processes for producing cycloalkylcarboxamido-pyridine benzoic acids
The present invention relates to a process of providing the 3-(6-(1-(2,2-difluorobenzo[d][1,3]dioxol-5-yl)cyclopropanecarboxamido)-3-methylpyridin-2-yl)benzoic acid in substantially free form (Compound 1).
US08592599B2 Solid state forms of racemic ilaprazole
The invention relates to crystalline forms of racemic ilaprazole, 2[[(4-methoxy-3-methyl-2-pyridinyl)-methyl]sulfinyl]-5-(1H-pyrrol-1-yl)1H-Benzimidazole. The invention also relates to a pharmaceutical composition for inhibiting gastric acid secretion comprising a crystalline Form of ilaprazole according to the invention in an amount effective to inhibit gastric acid secretion and a pharmaceutically acceptable carrier. The invention also provides methods of treatment for various acid-related gastrointestinal (GI) disorders.
US08592594B2 Tetrahydro-quinoline derivatives
A compound of formula (I) or a pharmaceutically acceptable salt or ester thereof, wherein A1 to A3 and R1 to R10 have the significance given in claim 1, can be used as a medicament. These compounds are useful in the treatment or prophylaxis of diseases that are related to AMPK regulation, such as obesity, dyslipidemia, hyperglycemia, type 1 or type 2 diabetes and cancers.
US08592591B2 Fused bicyclic imidazoles
Compounds of formula (I) a tautomer or stereoisomer thereof, or a salt thereof, wherein ring B and the imidazole to which it is fused, R4, R6 and R7 have the meanings as given in the description and the claims, are effective inhibitors of the Pi3K/Akt pathway.
US08592589B2 Methods of treating cancer with a thieno[3,2-C]pyridine
N-(4-{4-amino-7-[1-(2-hydroxyethyl)-1H-pyrazol-4-yl]thieno[3,2-c]pyridin-3-yl}phenyl)-N′-(3-fluorophenyl)urea free base and crystallines form thereof are suitable pharmaceutical ingredients for pharmaceutical compositions useful in the treatment of disease, for example, cancer.
US08592587B2 Transannular rearrangement of activated lactams
The disclosure relates to a method for the synthesis of a compound of the following formula (I) in which: R1 and R2 are independently an N-protective group; R3 is a hydrogen atom, a C1-C6 alkyl group, a C1-C6 arylalkyl group, a C2-C6 alkenyl group, or a alkoxycarbonylalkyl group; Y is a —C(HR4)- group in which R4 is a hydrogen atom, a C1-C6 alkyl group, an aryl group, a C1-C6 arylalkyl group, or a C2-C6 alkenyl group; or an orthophenylene group.
US08592586B2 Transition metal complexes and use thereof in organic light-emitting diodes V
Metal complexes comprising at least one polycyclic aromatic ligand and bearing at least one deuterium atom, an organic light-emitting diode comprising at least one inventive metal complex, a light-emitting layer comprising at least one inventive metal complex, an organic light-emitting diode comprising at least one inventive light-emitting layer, the use of the at least one inventive metal complex in organic light-emitting diodes, and a device selected from the group consisting of stationary visual display units such as visual display units of computers, televisions, visual display units in printers, kitchen appliances and advertising panels, illuminations, information panels and mobile visual display units such as visual display units in cellphones, laptops, digital cameras, vehicles, and destination displays on buses and trains, comprising at least one inventive organic light-emitting diode.
US08592584B2 Compositions and methods including cell death inducers and procaspase activation
Compositions and methods are disclosed in embodiments relating to induction of cell death such as in cancer cells. Compounds and related methods for synthesis and use thereof, including the use of compounds in therapy for the treatment of cancer and selective induction of apoptosis in cells are disclosed. Compounds are disclosed in connection with modification of procaspases such as procaspase-3. In embodiments, compositions are capable of activation of procaspase-3.
US08592582B2 Method for producing pyrimidinylpyrazole compounds
The present invention provides a method for producing a pyrimidinylpyrazole compound (1), wherein aminoguanidine (2) or its salt is reacted with a β-diketone compound (3) to produce the pyrimidinylpyrazole compound: wherein R1 and R3 are each independently an alkyl group having 1 to 4 carbon atoms, and R2 is a hydrogen atom or an alkyl group having 1 to 4 carbon atoms. The method is excellent in the environmental compatibility and economic efficiency.
US08592570B2 Compositions and methods for inhibiting expression of an RNA from West Nile virus
This invention relates to double-stranded ribonucleic acid (dsRNA), and its use in mediating RNA interference to inhibit the expression of an RNA from the West Nile virus (WNV), and the use of the dsRNA to treat pathological processes mediated by WNV infection, such as viral encephalitis.
US08592568B2 Nucleic acid probes and methods for detecting plasmodium parasites
This invention relates to novel nucleic acid probes and methods for detecting Plasmodium parasites as well as detecting different Plasmodium parasites selectively from one another.
US08592566B2 Immunostimulatory oligonucleotides and use thereof in pharmaceuticals
A novel immunostimulatory oligonucleotide by which an IFN-inducing activity is enhanced and an inflammatory cytokine-inducing activity is reduced, and a pharmaceutical containing the same, and an application thereof are provided. That is, the present invention provides the immunostimulatory oligonucleotide composed of a base sequence represented by a formula: 5′-(G)MPXCGYQ(G)N-3′ (SEQ ID NO: 118) (X and Y are mutually independent and represent an arbitrary sequence which has a length of 0 to 10 nucleotides and does not contain 4 or more consecutive G residues, and a length of X+Y is 6 to 20 nucleotides; XCGY contains a palindrome sequence having a length of at least 8 nucleotides and has a length of 8 to 22 nucleotides; P and Q are mutually independent and represent one nucleotide other than G; M represents an integer of 6 to 10 and N represents an integer of 0 to 3) wherein a full length thereof is 16 to 37 nucleotides (except for an oligonucleotide composed of a base sequence represented by SEQ ID NO:5), the pharmaceutical application thereof.
US08592565B2 Preparation of azide-modified carbon surfaces for coupling to various species
The invention relates to carbon surfaces modified with one or more azide groups. The invention also relates to methods of modifying carbon surfaces with one or more azide groups.
US08592563B2 Antibodies specific to pro-angiogenic isoforms of vascular endothelial growth factor (VEGF)
The present invention provides antibodies, as well as molecules having at least the antigen-binding portion of an antibody, against agonist pro-angiogenic, pro-permeability, vasodilatory isoforms of VEGF. Disclosed antibodies and antibody fragments are characterized by being capable of binding to and neutralizing pro-angiogenic forms of VEGF while not effecting isoforms of VEGF which are anti angiogenic. Methods of production and use in therapy and diagnosis, of such antibodies and antibody fragments are also provided.
US08592559B2 Antibody having activity of inhibiting hepatitis C virus (HCV) infection and use thereof
An object of the present invention is to provide an antibody inhibiting infection with hepatitis C virus (HCV). The present invention provides an anti-hepatitis C virus antibody that recognizes a whole or a part of the conformation of a hepatitis C virus particle as an epitope and binds thereto, so as to be able to inhibit the binding of hepatitis C virus to the surface of a host cell and to inhibit HCV infection, a humanized antibody thereof, and an inhibitory agent for infection with hepatitis C virus.
US08592558B2 H5 proteins, nucleic acid molecules and vectors encoding for those, and their medicinal use
The present invention relates to novel hemagglutinin H5 proteins, nucleic acids and vectors encoding for those as well as vaccines comprising any of such H5 proteins, nucleic acids or vectors encoding for those H5 proteins. Moreover, the present invention also relates to the medicinal use of any of such compositions in humans and animals.
US08592555B2 Immunoglobulin-binding proteins with improved specificity
The present invention relates to modified immunoglobulin-binding proteins, e.g., Staphylococcus protein A, having improved binding specificity for immunoglobulins and methods of making and using the same.
US08592554B2 Immunotoxins for the treatment of diseases related to CMV infection
The present invention relates to the field of cytomegalovirus (CMV) infection. In particular the present invention relates to highly specific immunotoxins useful in treating diseases related to CMV infection. CMV encodes chemokine receptors that undergo constitutive internalization. Thus CMV infected cells can be targeted specifically with immunotoxins with high affinity to CMV encoded constitutively internalizing receptors. This will ensure efficient uptake of the immunotoxin by the CMV infected cell, and thereby ensure the death of the infected cell with a minimum of unwanted toxicity and side effects. Furthermore, the invention relates to a way of inhibiting CMV replication and/or growth by using immunotoxins by targeting constitutively internalizing CMV encoded receptors.
US08592552B2 Antiviral peptides from african swine fever virus which prevent the binding of the virus to DLC8
New antiviral peptides interfering the binding of the virus to DLC8 are provided. A high number of pathogenic agents of viral origin use the dynein based intracellular transport machinery at some point of their infective cycle. The present invention consists of a new antiviral therapy consisting in the inhibition of viral infections produced by those virus that use the dynein system by mechanisms of interference mainly by preventing the interaction between the viral protein and the cellular DLC8 protein. The present invention discloses for the first time the blocking of the function of this interaction by peptides whose sequence comprises or consists of the totality or a partial sequence of the viral protein corresponding to the binding domain with DLC8.
US08592550B2 Process for the preparation of polycarbonates
Characterized in that the polymerization is carried out in a single step in the presence of a chain transfer agent. Preferred chain transfer agents are polyols. The invention also relates to branched polycarbonates that have functional hydroxyl end-groups.
US08592549B1 Polyamide composition, method, and article
A method of forming a polyamide composition includes melt blending specific amounts of a poly(phenylene ether) masterbatch, a first polyamide, glass fibers, and a flame retardant that includes a metal dialkylphosphinate. The poly(phenylene ether) masterbatch is prepared by melt blending specific amounts of a poly(phenylene ether) and a second polyamide. The method provides a polyamide composition with a desirable balance of flame retardancy, melt flow, heat resistance, and mechanical properties, while reducing the amount of metal dialkylphosphinate required by corresponding compositions without the poly(phenylene ether) masterbatch. A corresponding polyamide composition is described, as are the poly(phenylene ether) masterbatch, and a method of reducing the metal dialkylphosphinate content of a flame retardant polyamide composition.
US08592548B2 Method to prepare bis(haloimides)
Bis(halophthalimides) are prepared in mixture in an organic liquid such as ortho-dichlorobenzene or anisole, by a reaction at a temperature of at least 150° C. between at least one diamine compound and at least one halophthalic anhydride in the presence of imidization catalyst. The reaction mixture is maintained at about 15% by weight solids content and rich in the halophthalic anhydride by constantly monitoring the reaction mixture using analytical methods such as high performance liquid chromatography. The product mixture may be directly employed in the direct preparation of polyetherimides, and similar slurries may be employed to prepare other polyether polymers.
US08592543B2 Polyfarnesenes
Provided herein are polyfarnesenes derived from a farnesene and at least two different vinyl monomers. Also provided herein are polyfarnesenes derived from a farnesene; at least two different vinyl monomers, such as (meth)acrylic acid, (meth)acrylic esters, styrene, and substituted styrenes; and at least one functional comonomer such as maleic anhydride.
US08592541B2 Gypsum wallboard
Gypsum wallboard can be made lighter and less dense, without sacrificing strength, by adding to the gypsum slurry used in making the board a styrene butadiene polymer latex substantially stable against divalent ions in which the styrene butadiene polymer includes at least 0.25 wt. % of an ionic monomer.
US08592539B2 Preparation of cobaltocenium-containing monomers and their polymers
Methods of forming a cobaltocenium-containing polymer are provided through polymerizing a plurality of cobaltocenium-containing monomers via controlled radical polymerization or controlled ring-opening polymerization. Each cobaltocenium-containing monomer comprises a cobaltocenium moiety covalently connected to a polymerizable group. Cobaltocenium-containing monomers are also provided that include a cobaltocenium moiety covalently connected to a polymerizable group. Cobaltocenium-containing polymers are also generally provided, such as the polymers formed according to any of the methods or from any of the monomers discussed herein. Methods are also generally provided for exchanging an anion associated with a cobaltocenium side group of a cobaltocenium-containing polymer with a new anion.
US08592534B2 Poly(ferrocenyl)silane based polymer, method of preparing the same, and film including the poly(ferrocenyl)silane based polymer
Provided are poly(ferrocenyl)silane based network polymers, methods of preparing the same, and films including the poly(ferrocenyl)silane based network polymers. The network polymers have a steric network structure and are prepared by using a simplified process.
US08592532B2 Method for producing organopolysiloxane compound
The present invention relates to a method for producing an organopolysiloxane compound having a structure in which a poly(N-acylalkylene imine) segment containing a repeating unit represented by the following general formula (1) is bonded to a terminal end and/or a side chain of an organopolysiloxane segment, the method including the steps of (a) subjecting a cyclic iminoether compound represented by the following general formula (I) to ring opening polymerization in a solvent to prepare a solution of a terminal-reactive poly(N-acylalkylene imine); (b) mixing a modified organopolysiloxane containing an amino group bonded to a terminal end and/or a side chain of a molecular chain thereof with a solvent to prepare a solution of the modified organopolysiloxane; (c) mixing the terminal-reactive poly(N-acylalkylene imine) solution prepared in the step (a) with the modified organopolysiloxane solution prepared in the step (b) to react the amino group contained in the modified organopolysiloxane with the terminal-reactive poly(N-acylalkylene imine); (d) adding a basic substance to a reaction product obtained in the step (c); and (e) removing the solvents from a mixture obtained after the addition in the step (d) at a temperature of from 100 to 200° C.: wherein R1 is a hydrogen atom, an alkyl group having 1 to 22 carbon atoms, an aralkyl group or an aryl group; and n is a number of 2 or 3.
US08592527B2 Vinyl ether end-functionalized polyolefins
Provided herein are vinyl ether end-functionalized polyolefins and methods for producing the same.
US08592526B2 Golf ball
An object of the present invention is to provide an environmentally safe golf ball having excellent resilience. The present invention provides a golf ball having constituting members, wherein at least a part of the constituting members is formed from a rubber composition containing (a) a base rubber, (b) a co-crosslinking agent, (c) a crosslinking initiator, and (d) an organic sulfur compound, wherein the organic sulfur compound includes a disubstituted compound of thiophenol, disulfide and/or thiophenol metal salt with Br, F or CF3 only at ortho positions.
US08592516B2 Method for the production of water absorbing polymers
A process for producing a water-absorbing polymer by polymerizing a monomer solution and drying the resulting hydrogel by means of a heated gas stream comprises effecting the drying in two or more temperature zones, and/or the gas stream is flowed against the hydrogel upwardly in the upstream sector of the belt dryer and downwardly in the downstream sector of the belt dryer, the direction of flow being reversed at a water content of 15% to 45% by weight for the hydrogel, and/or the hydrogel layer is flowed against in a belt dryer upwardly to some extent at least, the gas velocity being 5% to 30% of the gas velocity required to lift the hydrogel off the belt, also apparatus for carrying out the process and use of the water-absorbing polymers produced by the process to produce hygiene articles.
US08592510B2 Rubber composition for studless tire and studless tire using thereof
A rubber composition controlling the increase of aging hardness of a studless tire and keeping good performance on snow and ice for long period is provided. A rubber composition for a studless tire including at most 0.5 part by weight of sulfur and 1 to 30 parts by weight of an organic vulcanizing agent satisfying the general formula (1): —(R—Sx)n—  (1) (wherein R is (CH2—CH2—O)m—CH2—CH2, x is an integer of 3 to 6, n is an integer of 10 to 400 and m represents an integer of 2 to 5) based on 100 parts by weight of a rubber component, wherein the content of a natural rubber and/or a polybutadiene rubber is at least 80% by weight in the rubber component, and tan δ peak temperature Tg is at most −50° C. and rubber hardness at 0° C. is at most 64.
US08592509B2 Rubber composition having improved crack resistance
A method includes: (a) mixing in a first step a first polymer and a filler, (b) mixing in a second step a second polymer and a polyhydroxy compound, and (c) mixing in a third mixing step the mixtures resulting from steps (a) and (b) and optionally additional filler, wherein said first polymer and second polymer may be the same polymer or different polymers, and wherein steps (a) and (b) can occur simultaneously or consecutively.
US08592506B2 Tire compositions and components containing blocked mercaptosilane coupling agent
Sulfur silane coupling agents for use in tire compositions used to formulate tires or tire components which contain multiple blocked mercapto groups which are in a state of reduced activity until activated. The coupling agents are advantageously used in rubber formulations, including tire compositions, for example, for fabricating tires with low rolling resistance.
US08592501B2 Floor covering composition containing renewable polymer
A composition is described that includes at least one polyolefin, at least one thermoplastic bio-resin derived from starch or soy or both, and at least one compatibilizer having at least one polyolefin and at least one polar group. Surface coverings and floor coverings, such as laminated floor coverings, having the composition, are also described.
US08592498B2 Method for producing organic compound and organic compound obtained by the method
Disclosed herein are a reaction method and a production method of an organic compound which are capable of achieving high reaction selectivity according to the purpose and a high production rate of a target substance. The methods include at least two fluids, wherein at least one kind of the fluids is a fluid containing at least one organic compound and at least one kind of the fluids other than the above fluid is a fluid containing at least one reactant in the form of a liquid or solution, and the respective fluids join together in a thin film fluid foamed between processing surfaces arranged to be opposite to each other so as to be able to approach to and separate from each other, at least one of which rotates relative to the other, whereby an organic reaction is performed in the thin film fluid.
US08592497B2 Process for preparing polyurethanes
The invention relates to a process for the preparation of polyurethanes by reacting polyisocyanates a) with compounds having at least two hydrogen atoms reactive with isocyanate groups b), wherein a polyisocyanate a) used is at least one polyisocyanate ai) having an average functionality of greater than 2, a content of diisocyanates of not more than 2% by weight and a content of uretonimines of not more than 4% by weight, based in each case on the weight of the polyisocyanate ai).
US08592495B2 Thermoplastic resin composite bead production method, expandable thermoplastic resin composite bead, expanded thermoplastic resin composite bead, and foamed molded article formed from expanded thermoplastic resin composite beads
A seed beads dispersing disperse system is obtained by dispersing olefin resin seed beads 1 with a specific tubular shape in an aqueous medium. Then, the olefin resin seed beads 1 are impregnated with styrene monomers and the styrene monomers are polymerized in the presence of a polymerization initiator by heating at a temperature in a specified range, to thereby obtain tubular thermoplastic resin composite beads. Expandable thermoplastic resin composite beads obtained by impregnating the thermoplastic resin composite beads with a blowing agent, expanded thermoplastic resin composite beads obtained by foaming and expanding the expandable thermoplastic resin composite beads, and a foamed molded article formed from the expanded thermoplastic resin composite beads by molding are also obtained.
US08592489B2 Storage-stable compositions of glycerol monoalkyl ethers
Compositions having a combination a) of one or more glycerol monoalkyl ether(s) of the general formula R—O—CH2—CHOH—CH2OH in which R is a branched or unbranched C3-C18-alkyl group, where the alkyl group can be substituted by one or more hydroxyl and/or C1-C4-alkoxy group(s) and/or the alkyl chain can be interrupted by up to four oxygen atoms, with b) an antioxidant or two or more antioxidants as stabilizer(s), the simultaneous presence of phosphocholines and phosphocholine derivatives being excluded.
US08592488B2 Diarylalkanes as potent inhibitors of binuclear enzymes
Diarylalkanes having the following structure: wherein Ar1, Ar2, R6, R7 and n are as defined herein are provided. The disclosed compounds find utility as inhibitors of binuclear enzymes. Methods for inhibiting binuclear enzymes as well as methods and compositions for preventing and treating diseases and conditions associated with binuclear enzymes are also provided.
US08592486B2 Compounds for inflammation and immune-related uses
The invention relates to compounds of structural formulas (I), (VII) and (XI): or a pharmaceutically acceptable salt, solvate, clathrate, or prodrug thereof, wherein X1, X2, X3, Y, Z, L, R1, R2, R3, R18 and n are defined herein. These compounds are useful as immunosuppressive agents and for treating and preventing inflammatory conditions, allergic disorders, and immune disorders.
US08592480B2 Liquid compositions of calcium acetate
The invention relates to an aqueous liquid composition of calcium acetate, sweetener, and taste masking agent. Also provided is a method for binding phosphorus within the gastrointestinal tract of an individual by administering to the individual an aqueous solution of at least calcium acetate.
US08592479B2 Antioxidant-containing food composition for use in enhancing antiviral immunity in companion animals
The invention encompasses compositions for enhancing the ability of a companion animal to resist and/or overcome viral infections. The compositions of the invention include an amount of lipoic acid that is effective in enhancing the antiviral immunity of a companion animal.
US08592478B2 Antioxidant-containing food composition
A food composition comprises an antioxidant component comprising at least one of alpha-lipoic acid and L-carnitine, said composition meeting ordinary nutritional requirements for an adult canine or feline.
US08592469B2 Diazonamide analogs
Diazonamide analogs having anti-mitotic activity, useful for the treatment of cancer and other proliferative disorders, and related pharmaceutical compositions are provided.