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Holding circuit of analog signal

阅读:795发布:2021-07-15

专利汇可以提供Holding circuit of analog signal专利检索,专利查询,专利分析的服务。并且PURPOSE:To prevent an output voltage level at the time of a holding requesting time from the change due to the variation of peripheral conditions such as temperature and humidity by constituting a holding circuit of the combination of an up/down counter and a D/A converter to hold an analog signal. CONSTITUTION:When a holding request is not applied to a holding request terminal 2, i.e, when the terminal 2 is in high level, a comparator 8 compares an analog output value from the D/A converter 9 with an analog input value SA inputted from an input terminal 1 and a counter 10 executes its counting operation so that the D/A converter 9 follows the input voltage level of the analog signal SA from the input terminal 1. When a low level signal SB is outputted from the terminal 2, both NAND circuits 12, 13 input the low level signal SB from the terminal 2 and always output high level signals. Therefore, the up/ down counter 10 does not count up or down and holds the output value immediatedly before the holding request, so that the output value of the D/A converter 9 is held.,下面是Holding circuit of analog signal专利的具体信息内容。

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