BACKGROUND OF THE INVENTION

This invention relates to a method of generating gate signals of a pulse width modulation (PWM) inverter adapted for variable speed drive of an AC motor and a PWM inverter system using the method.

Of methods for generation of gate signals of a PWM inverter, such a method as disclosed in JP-A-59-25592 and CO-pending U.S. Patent application serial No. 380,039 entitled "PWM Inverter Apparatus" is known wherein two voltage vectors and a zero vector are used to determine gate signals by which the voltage vectors are caused to move along a magnetic flux circle. In the known method, duration times of the two voltage vectors are reserved within a control period (sampling period) and the remaining time is allotted to a duration time of the zero vector. Thus, the switching frequency of the PWM inverter is determined in the know method, depending on the number of combinations of the voltage vectors and zero vector within the sampling period. Specifically, the greater the number of combinations of the voltage vectors and zero vector within the sampling period, the more the switching trequency of the PWM inverter increases.

In the prior art, however, when the angular speed of the magnetic flux changes, the duration time of any of the voltage vectors and zero vector is rendered zero within the sampling period and as a result, the switching frequency of the PWM inverter is decreased. This raises problems that distortion of voltage waveform is increased to entail an increase in noise in the motor.

SUMMARY OF THE INVENTION

An object of this invention is to provide a method of fixing the switching frequency of the PWM inverter in PWM control of spatial vector type.

Another object of this invention is to provide a control method capable of improving the voltage utilization efficiency and reducing the voltage waveform distortion even in the region where the decrease in the switching frequency of the PWM inverter is inevitable conventionally.

Still another object of this invention is to provide a PWM inverter system capable of reducing the motor noise by using the aforementioned control method.

In order to attain the above objects, a difference vector ẽ (n) between a magnetic flux vector φ̃(n-1) obtained at time (n-1) and a magnetic flux vector φ̃ (n) obtained at time n is determined by synthesizing a plurality of unit voltage vectors in such a manner that a resultant vector representative of the difference vector always includes as component a zero vector or a voltage vector having a predetermined duration time, and the resultant vector is used to generate gate signals of switching elements of the PWM inverter.

When a resultant voltage vector (having a constant magnitude) of voltage vectors and a zero vector moves along a magnetic flux circle having a constant magnitude, the duration times of the voltage vectors and the zero vector change depending upon the phase of rotation of the magnetic flux. At certain rotation phases, the duration time of the voltage vector or the zero vector is rendered zero. More specifically, as the angular speed of the magnetic flux increases, the duration time of the voltage vector has to be increased in order to permit the resultant voltage vector to move along the magnetic flux circle having the constant magnitude. Therefore, the more the angular speed of the magnetic flux increases, the more the occupation ratio of the zero vector in the resultant voltage vector decreases to increase the occupation ratio of the voltage vector correspondingly. Accordingly, in the region where the inverter frequency is high, the duration time of the zero vector is frequently rendered zero. When the duration time of the zero vector is rendered zero and the sampling period Ts coincides with the duration time of the resultant voltage vector, the sampling period Ts is totally occupied by the voltage vector and consequently the switching frequency of the PWM inverter is decreased.

On the other hand, as the angular speed of the magnetic flux decreases, a reverse phenomenon occurs wherein the duration time of the voltage vector is frequently rendered zero and the sampling period Ts is totally occupied by the zero vector to again decrease the switching frequency of the PWM inverter.

In accordance with the present invention, the resultant voltage vector is so determined that the duration times of the voltage vectors and the zero vector can always be maintained, amounting to a predetermined time AT by which a minimum pulse width is expected to be maintained. This ensures that even when any of the voltage vectors and zero vector is rendered zero as the angular speed of the magnetic flux changes, a resultant voltage vector can persist which includes as component the voltage vector or the zero vector having the predetermined minimum time ΔT. As a result, even when the phase or angular speed of the magnetic flux changes, the switching frequency of the PWM inverter is fixed to a frequency determined by the resultant voltage vector.

BRIEF DESCRIPTION OF THE DRAWINGS

• Fig. 1 is a schematic diagram showing the overall construction of a PWM inverter system according to an embodiment of the invention.
• Fig. 2 is a vector diagram illustrating unit voltage vectors.
• Fig. 3 is a table showing a set of unit voltage vectors to be selected in each of the phase regions of a magnetic flux vector.
• Fig. 4 is a diagram showing the relation between magnetic flux vector and voltage vector.
• Fig. 5 is a table showing the relation between unit voltage vector and phase angle a.
• Fig. 6A is a graph showing the relation between the magnitude of difference vector and the phase angle a in the conventional method.
• Fig. 6B is a graph showing the relation between the duration time of zero vector and the phase angle α in the conventional method.
• Figs. 7A and 7B are graphs, similar to those of Figs. 6A and 6B, in the method according to the invention.
• Fig. 8 is a flow chart for execution of controlling of the invention.
• Figs. 9 and 10 are diagrams showing the relation between three-phase switching pattern and output signals of counters.
• Fig. 11 is a timing chart showing the procedure through which the PWM signals are produced from the counter output signals.

DESCRIPTION OF THE PREFERRED EMBODIMENT

Referring now to Fig. 1, an embodiment of the invention will be described. Fig. 1 shows the overall construction of a PWM inverter system according to the invention. A three-phase AC power supply 10 is connected to a converter 20 and the output terminal of the converter 20 is connected to the imput terminal of a PWM inverter 40, comprised of a plurality of switching elements, by way of a smoothing capacitor 30. The converter 20 and PWM inverter 40 may be constructed of known circuits and will not be detailed herein.

Respective output terminals U, V and W of the PWM inverter 40 are connected to respective terminals U, V and W of an AC motor 50.

The construction of a control circuit for controlling the gates of the PWM inverter 40 will now be described.

An inverter angular frequency command ωR and a magnetic flux command ϕµ are set by potentiometers 60 and 61, respectively. The output terminals of the potentiometers 60 and 61 are connected to the input terminals of an A/D converter (not shown) of a one-chip microcomputer 70. In addition to the A/D converter, the one-chip microcomputer 70 incorporates memories such as RAM'S and EPROM'S and a timer which are not illustrated, either. A data bus 71 of the one-chip microcomputer 70 is coupled to data bus lines of timer modules 80 and 81, each having a plurality of timers, and an I/O port G of the microcomputer 70 is connected to gate terminals Go to G₂ of the timer module 80 and gate terminals G₃ to Gs of the timer module 81. In addition, the provision of an address bus is needed to enable the one-chip microcomputer 70 to write data in the timer modules 80 and 81 but the address bus is omitted in Fig. 1 to show only the fundamental construction.

Each of the timer modules 80 and 81 incorporates three timers and these timers have output terminals C_o and C, connected to input terminals of an exclusive OR circuit 90, output terminals C₂ and C₃ connected to input terminals of an exclusive OR circuit 91 and output terminals C₄ and C_s connected to input terminals of an exclusive OR circuit 92. Output terminals of the exclusive OR circuits 90, 91 and 92 are connected to imput terminals of a gate driver circuit 100. In a later description,'the timers and their output terminals will be referred to as counters Co to C_s.

Output terminals of the gate driver circuit 100 are respectively connected to gates of six switching elements constituting phase arms of the PWM inverter.

A method of controlling PWM signals and the operation of the circuit shown in Fig. 1 based on the control method will now be described. Since the PWM inverter 40 is a three-phase inverter, the respective phases are ignited in accordance with 2³ combinations of gate signals. The combination of gate signals provides a switching pattern and is represented by (U, V, W) wherein "ON" state of switching elements of the respective phases is indicated by "1" and "OFF" state is indicated by "0". For example, (1, 0, 0) therefore represents a state where a switching element of U-phase positive arm is "ON", a switching element of V-phase positive arm is "OFF" and a switching element of W-phase positive arm is "OFF". Switching elements of negative arms of the respective phases operate complementarily to the switching elements of positive arms. In other words, while a switchihg element of a positive arm is "ON", a switching element of the corresponding negative arm is rendered "OFF".

When the switching pattern is defined as above, the output vectors produced by the inverter at its states represented by the switching patterns (1, 0, 0), (1, 1, 0), (0, 1, 0), (0, 1, 1), (0, 0, 1), (1, 0, 1) have directions, respectively, as shown in Fig. 2. Here, the vectors having the above directions and unit magnitude are called as unit voltage vectors. The inverter outputs corresponding to the remaining states of the switching elements represented by the switching patterns (0, 0, 0) and (1, 1, 1) have zero magnitude. The vectors of these outputs are called as unit zero vectors and indicated by V₀ and V₇, respectively.The unit voltage vectors are respectively indicated by V₁, V₂, V₃, V₄, V₅ and V₆ as shown in Fig. 2.

The relation between a magnetic flux vector φ̃ (t) and a voltage vector V (t) induced in the motor is given by equation (1):

• d φ̃ (t)/dt = V (t) (1). When the magnetic flux vector is given by φ̃ (t) = φ̃₀e^jωt the magnetic flux vector φ̃ (t) traces a circular locus of a radius ϕ and the voltage vector V (t) acts in the tangential direction of the circular locus. Equation (1) can be reduced to a difference form which is given by equation

• (2):T_s: sampling period.

In equation (2), the left side indicates a difference vector between a magnetic flux vector φ̃ (n) at time n and a magnetic flux vector φ̃ (n-1) at time (n-1), and this difference vector is represented by e (n). Then, the difference vector e(n) can be obtained by synthesizing selectively the unit voltage vectors V , to Ṽ₆ and unit zero vectors V and V7 as will be described below.

In order to synthesize the difference vector, which is generally different in vector direction from any of the unit voltage vectors, selection is made to use two of the unit voltage vectors, as shown in Fig. 3, having a phase difference of 60° therebetween and determined depending on which of the regions I to VI shown in Fig. 2 the phase of the difference vector belongs to.

Fig. 4 shows diagrammatically the manner of synthesizing unit voltage vectors ṽ i and ṽ j and a unit zero vector ṽ₀ ( ṽ ₇) to provide a difference vector ẽ (n). Equation (2) prescribes that the duration time of the difference vector ẽ (n) should coincide with the sampling period Ts. More specifically, the magnitudes of voltage vectors Ṽ i and Ṽ j determined by using ṽ i and ṽ j are equal to the product of unit voltage vector ṽ i and its duration time T̃ i and the product of unit voltage vector ṽ j and its duration time T j, the magnitude of zero vector vo equals the product of unit zero vector ṽ₀ or ṽ₇ and its duration time T0, and the following equations must stand:where the duration times Ti and Tj are given by equations (5) and (6), respectively:

In equations (5) and (6), ℓ represents the magnitude of the difference vector, that is the distance which the difference vector moves from A to B Fig. 4 during one sampling period Ts. The value of is determined by the following equations:Represented by At is a time conversion coefficient for converting the magnitude ℓ of the difference vector into a value represented by a unit of time and by a is phase angle. In equation (8), ω1 represents angular speed of rotation of the magnetic flux vector φ̃ (n) and it coincides with the inverter angular frequency command ωR shown in Fig. 1. Equation (7) is determined on the assumption that φ0 remains unchanged during the sampling period Ts.

The phase angle a in equations (5) and (6) is given depending on unit voltage vectors used, as shown in Fig. 5. Also indicated in Fig. 5 is an instantaneous rotation phase θR* of magnetic flux vector (n) which is given by equation (9):

As described previously, the magnetic flux vector φ̃ (n) rotates at the angular speed ω1 and the system is activated at each predetermined sampling period Ts. The duration times Ti and Tj of the voltage vectors Ṽ i and Ṽ j are given by equations (5) and (6), and a duration time Ti + Tj of a resultant vector of Ṽ i and Ṽ j is maximized at a phase angle a of 30°. As the angular speed ω1 increases, the distance ℓ over which the difference vector moves within Ts increases and therefore, in some cases, the magnitude of (Ti + Tj) goes beyond the sampling period Ts. Such a state occurs initially in synchronism with the phase angle a being 30 and as the angular speed ω1 increases, it gradually spreads about the 30 ° phase angle.

Figs. 6A and 6B are conducive to explain that state. Fig. 6B particularly demonstrates that for the phase angle a falling within an interval ranging from C to D, the duration time To of the zero vector V is rendered zero. Thus, within that interval, the zero vector Ṽ _o in the difference vector ẽ (n) is excluded to disappear and the difference vector ẽ (n) equals the sum of voltage vectors Ṽ i and Ṽ j. It follows therefore that within that interval, the switching pattern for making zero the output voltage of the PWM inverter disappears and the switching frequency decreases. To overcome this problem, the decrease in switching frequency may be suppressed in a manner to be described below. Given that the minimum duration time necessary for insuring the generation of switching pulse is AT, the upper limit of the distance ℓ over which the difference vector e(n) moves is set in order for the duration time of the resultant voltage vector of the voltage vectors Ṽ i and Ṽ j not to exceed (Ts-AT). The value of the upper limit is controlled pursuant to the following equation:Accordingly, the duration time ℓΔt of difference vector which is used in equations (5) and (6) is always determined so as not to exceed (ℓ_max·Δt) given by equation (10).

When the above control method is applied to the case where Ti + Tj would otherwise go beyond Ts, the duration time of the zero vector ṽ₀ is related to the phase angle a as shown in Fig. 7B and the magnitude (duration time) of the difference vector ẽ (n) changes with the phase angle a as shown in Fig. 7A. Since the zero vector V can always be maintained during AT, the disappearance of the zero vector ṽ ₀ can be suppressed through this method to thereby suppress the decrease in switching frequency.

As the angular speed ω1 of the magnetic flux vector φ̃ (n) decreases, the magnitude of the difference vectro ẽ (n) decreases in accordance with equations (7) and (8). The duration time of the difference vector ẽ (n) is made zero when the duration time required for producing the difference vector falls below At which is a minimum time determined for the system, for example, a machine cycle of the microcomputer. In such an event, the voltage vectors Ṽ and Ṽ j disappear and the resultant voltage vector contains the zero vector V alone. Therefore, under this condition, the switching frequency of the PWM inverter also decreases. To cope with this problem, the duration time ℓΔt of the difference vector ẽ (n) is set so as not to fall below a lower limit ℓ_min At. More specifically, the duration time ℓΔt is so set as to satisfy equation (11):in order to prevent the duration times of the voltage vectors v i and v j from falling below a lower limit T_min.

As is clear from the above, even when the angular speed ω1 of the magnetic flux vector φ̃ (n) changes, the disappearance of the zero vector Ṽ₀ or voltage vectors Ṽ i and Ṽ j that is, the nullification of the duration time of each vector can be prevented by controlling the duration time ℓΔt of the difference vector ẽ (n) such that it satisfies equation (12):

Alternatively, the relation equivalent to equation (12) can be obtained by applying upper and lower limiters to the magnitude of duration times Ti and Tj of the voltage vectors such that the duration times Ti and Tj of the voltage vectors determined pursuant to equations (5) and (6) do not exceed the lower limit T_min and the upper limit (Ts - ΔT). In this case, however, it is necessary to check whether the magnitude of each of the duration times Ti and Tj of the voltage vectors falls within the range of from T_min to (Ts - ΔT) and therefore the processing time of the one-chip microcomputer 70 is increased.

By using the previously-described principle, gate signals for the PWM inverter can be obtained through operation to be described hereunder. Firstly, the calculation procedure for setting data in the counters C_o, C₁, C₂, C₃, C₄ and C₅ under the control of the one-chip microcomputer 70 will be described with reference to a flow chart of Fig. 8. The procedure shown in Fig. 8 is an interruption processing routine.

(i) Processing 200A

When an interruption occurs, processing 200A is first executed. In processing 200A, T + Ts (T: a value of a timer at the present time) is set in the timer built in the one-chip microcomputer 70. The timer generates an interruption signal at the expiration of time Ts. Since this processing is carried out in order for each interruption signal to occur, the interruption signals are generated reiteratively at a period of Ts.

(ii) Processing 200B

An inverter angular frequency command ωR, that is, an angular speed ω1 of the magnetic flux vector (n) is fetched through the A/D converter and the angular speed ω1 is multiplied by the sampling period Ts to determine a difference angle Δθ(n) through which the magnetic flux vector φ̃ (n) moves within the sampling period Ts.

(iii) Processing 200C

Difference angles Δθ(n) obtained in the processing 200B are sequentially added together to determine an instantaneous phase θR* of the magnetic flux vector φ̃ (n). In this processing, comparison is also carried out between a value of the instantaneous phase θR* and a value θ0* thereof which measures 2₁r to correspond to one period, so that when θR* exceeds θ0*, the value of the instantaneous phase θR* is reset to thereby permit the instantaneous phase θR* to recur at a period of 2π.

(iv) Processing 200D

It is decided on the basis of the instantaneaus phase θR* of the magnetic flux vector which region shown in Fig. 3 the instantaneous phase θR* lies in, in order to determine a set of unit voltage vectors ṽ i and ṽ j to be used. Subsequently, a phase angle a complying with those vi and vj is calculated pursuant to formulae shown in Fig. 5.

(v) Processing 200E

A magnetic flux command φ_R is fetched through the A/D converter included in the one-chip microcomputer 70. This command is multiplied by the difference angle Δθ(n) obtained in the processing 200B and the product is multiplied by the time conversion coefficient At to determine a duration time ℓΔt of the difference vector ẽ (n). Further, the duration time ℓΔt is processed through limiter processing so as to satisfy equation (12).

(vi) Processing 200F

By using the phase angle a and the duration time ℓΔt of the difference vector, duration times Ti and Tj of the voltage vectors Ṽ i and Ṽ j are calculated pursuant to equations (5) and (6). Duration time To of the zero vector Ṽ₀ is determined pursuant to T_s-(T_i + T_j). Thus, a resultant voltage vector T̃_i v_i +T_jv_j + T₀ v₀ representative of the difference vector ẽ (n) can be obtained. In accordance with teachings of the embodiment, the voltage vectors v i and Ṽ j and zero vector v₀ and each divided into portions in order to improve the switching frequency. For example, division into two portions may be employed as shown in Figs. 9 and 10. In this case, the difference vector ẽ (n) is expressed as follows:where T_i = T_i' +T_i", T_j = T_j' +T_j" and To = To +T₀" stand. The zero vector Ṽ₀ is inserted so that a change in switching mode of only one phase is caused by the zero vector. For example, within the region I, the unit zero vector and unit voltage vector change such that (1, 1, 1) - (1, 1, 0) - (0, 1, 0) - (0, 0, 0) - - (0, 1, 0) - (1, 1, 0). Thus, although the unit voltage vectors ṽ i and ṽ j have sets of elements which are different for the respective regions, the zero vector Ṽ₀ and the voltage vectors Ṽi and Ṽ j are synthesized in regular sequence complying with equation (13).

(vii) Processing 200G

In processing 200G, data is set in the counters Co to Cs to ensure that the zero vector V o and voltage vectors Ṽi and Ṽ j can be synthesized in regular sequence complying with equation (13). For example, within the region 1, (To +T_i') is set in the counter Co and (To +T_i' +T_j') is set in the counter Ci. As soon as the counter C_o is set with the data (T_o+T_j'), the output of the counter Co rises from "Low" level to "High" level and at the expiration of time (T_o +T_i'), the output of the counter C₀ falls from "High" level to "Low" level. Conversely, as soon as the data (To +T_i'+T_j') is set in the counter C₁, the output of the counter C₁ falls from "High" level to "Low" level and at the expiration of time (To +T_i' +T_j'), it rises from "Low" level to "High" level.

Similar operations are carried out in a set of counters C₂ and C₃ and in a set of counters C₄ and Cs.

As the procedure proceeds from processing 200A to processing 200G each time an interruption signal occurs, output signals of the timer modules 80 and 81 change as shown in a time chart of Fig. 11. Since the exclusive OR circuits 90, 91 and 92 are connected to the output terminals of the timer modules 80 and 81, exclusive OR operations Co output ⊕ C₁ output, C₂ output ⊕ C₃ output and C₄ output ⊕ Cs output are effected to provide three-phase PWM signals E_u, E_v and E_w as shown in Fig. 11.

By receiving the signals E_u, E_v and E_w, the gate driver circuit 100 produces gate signals Up to W_N applied to the gates constituting the respective phase arms. The gate signals may be generated in a manner known in the art and will not be detailed herein.

According to the invention, even when the angular frequency of the inverter changes, the decrease in switching frequency can be suppressed and consequently current ripple can be reduced and at the same time noise in the motor can be reduced.

Further, since the switching frequency is suppressed by minimizing the duration time of the zero vector, voltage utilization efficiency can be improved in the high speed region and high level torque can be produced.