This application is a continuation-in-part of co-pending application Ser. No. 09/557,133 filed on Apr. 25, 2000 and claims priority of that application.

BACKGROUND OF THE INVENTION

1. Field of the Invention

This invention relates generally to photodetectors and more particularly to room temperature sensors for imaging ultraviolet radiation using III-V compound semiconductor photodetectors.

2. Description of the Related Art

Ultraviolet sensors transform incident light in the ultraviolet region of the spectrum (wavelengths from approximately 0.01 to 0.40 microns) into electrical signals that are used for data collection, processing, and storage. Such sensors can capture images for video or still-frame imaging. Conventional solid-state video sensors usually employ silicon photodetectors because they are inexpensive, exhibit adequate signal bandwidth, are sensitive to visible and near-infrared radiation, and exhibit a high degree of pixel-to-pixel uniformity when used in an imaging array.

Silicon photodetectors exhibit significant deficiencies when applied at room temperature for ultraviolet wavelength detection, however. At or near room temperature, these detectors have a characteristic “dark current” which is very large compared to the signal and causes prominent noise characteristics. The dark current is a fundamental consequence of the detector physics: common silicon photodetectors exhibit an energy bandgap of 1.12 eV, which is well below the threshold for ultraviolet wavelength absorption. This low bandgap gives rise to a large dark current (at normal room temperatures). Silicon photodetectors that are compatible with low to moderate cost production also have near unity gain: i.e. each incident photon generates at most a single electron. The combination of low gain and large dark currents limits the practical application of Silicon photodiode detectors to conditions having relatively bright irradiance, unless active cooling is used. At low light levels and at room temperature such detectors generate inadequate signal-to-noise ratios (SNR).

Although the practical short wavelength limit for silicon is approximately 250 nm, it can be used at wavelengths as short as 190 nm. UV radiation, however, readily damages silicon detectors. Degradation in responsivity occurs after only a few hours of ultraviolet exposure and makes the devices unusable for precision measurements.

In low-light-level conditions like those encountered in detecting ultraviolet radiation, the conventional silicon photodiode detector is often replaced with a silicon avalanche detector to facilitate gain within the detector so that conventional detector interface amplifiers and ancillary interface circuits can be used to read out the data at video frame rates with a high SNR. Such applications of avalanche photodiodes are disclosed by U.S. Pat. Nos. 5,146,296 to Huth and 5,818,052 to Elabd, for example. Unfortunately, the fabrication of avalanche photodiodes is much more difficult and expensive than standard photodiodes, and supplemental amplification is also often required. Currently available avalanche photodiodes exhibit relatively poor uniformity and have limited sensitivity due to their low quantum efficiency. They are also inherently non-linear in their response to light, which is undesirable in many applications.

Alternative ultraviolet imaging systems are known which use an array of avalanche detectors, various phosphors, or intensifiers such as microchannel plates to amplify the available electrons for subsequent detection in enhanced charge coupled devices (CCDs) . All such CCDs and other metal-insulator-semiconductor (MIS) devices have surface states at the semiconductor/insulator interface that cause spontaneous generation of dark current. Furthermore, the soft x-rays associated with electron bombardment damage intensified CCDs. This damage manifests as even higher dark current that reduces dynamic range, both by consuming charge-handling capacity and by adding noise. CCD Manufacturers employ various schemes to suppress dark current, such as that described by Saks, “A Technique for suppressing Dark Current Generated by Interface States in Buried Channel CCD Imagers,” IEEE Electron Device Letters, Vol. EDL-1, No. 7, Jul. 1980, pp. 131-133. Nevertheless, mid-gap states are always present that result in unacceptable dark current for room temperature operation of silicon-based low-light-level image sensors.

A further problem with prior detectors arises from their spectral response characteristics. The large mismatch between the photoresponse required for detecting ultraviolet radiation and the actual spectral response of silicon photodetectors results in higher dark current because the bandgap is much lower than necessary. In semiconductor detectors the semiconductor bandgap determines the long wavelength detection limit. At wavelengths longer than the bandgap the material becomes transparent. The depletion layer must be made very thin to absorb radiation at very short wavelengths.

In summary, conventional ultraviolet photodetectors are subject to a variety of practical limitations: CCDs, both conventional and intensified, have inadequate sensitivity in the ultraviolet part of the electromagnetic spectrum because their dark current is too high at room temperature and their design is not optimized for detecting ultraviolet radiation. Pyroelectric detectors, which respond only to pulsed radiation, and thermal detectors have inadequate time constants for broad use. Photomultiplier tubes are fragile. Optical downconversion techniques are susceptible to physical damage in the sensitive crystal probe used to produce visible fluorescence for subsequent detection in a CCD sensor.

SUMMARY OF THE INVENTION

In view of the above problems, the present invention is a high-sensitivity photodetector for detecting radiation in the ultraviolet region of the electromagnetic spectrum, suitable for operation at room temperature. The photodetector includes (a) a compound semiconductor photodiode which generates a detector current in response to incident photons, the photodiode biased below its avalanche breakdown threshold, comprising III-V elemental components and having a bandgap with transition energy higher than the energy of visible photons; and (b) MOS detector interface circuit at each pixel, arranged to receive a signal from the photodiode junction and to amplify said signal.

Preferably, the photodetector has its photodiode junction integrated in a first microstructure on a first substrate, and its interface circuit in a second microstructure on a second substrate. The first and second microstructures are then joined in a laminar, sandwich-like structure. The first and second microstructures communicate via electrically conducting contacts.

In one embodiment, the photodetectors are integrated in an imaging array for use at room temperature to detect individual photons and generate video at TV-compatible and higher frame rates. Such an imaging array is made up of a plurality of addressable photodetecting cells. Each cell includes a compound semiconductor photodiode which linearly generates a detector current in response to incident photons, the photodiode biased below its avalanche breakdown threshold, comprising III-V elemental components and having a bandgap with transition energy higher than the energy of visible photons. Each cell also includes a MOS detector interface circuit at each pixel, arranged to receive a signal from the photodiode junction and amplify the signal.

In some embodiments, the interface circuits of at least some cells have independently variable gain. The gain at each pixel can thus be set to compensate for non-uniform photodiode response across the array.

The photodetector and array of the invention provide single-photon sensitivities, with higher signal-to-noise ratios at video frame rates and room temperature than previously possible, for detecting and imaging radiation in the ultraviolet region of the spectrum.

These and other features and advantages of the invention will be apparent to those skilled in the art from the following detailed description of preferred embodiments, taken together with the accompanying drawings, in which:

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1

is a perspective view of an array of photodetector devices in accordance with the invention;

FIG. 2

is a magnified cross-sectional view of a representative portion (pixel) of the array of

FIG. 1

;

FIG. 3

is a graph of bandgap energy vs. lattice constant for various known compound semiconductors, with points representing binary compounds and lines representing achievable bandgap-lattice relationships for ternary and quaternary compounds;

FIG. 4

is a cross-section of an alternate embodiment of a photodetector in accordance with the invention, suitable for multi-spectral detection and discrimination;

FIG. 5

is a schematic diagram of a circuit suitable for use as the interface circuit in

FIGS. 2

or

4

;

FIG. 6

is a schematic diagram of an alternate interface circuit using a capacitively coupled, CMOS transimpedance amplifier;

FIG. 7

is another alternate interface circuit which uses an FET source follower amplifier to buffer and amplify the photodiode signal; and

FIG. 8

is a graph of dark current (on a logarithmic scale) as a function of temperature in K (on a linear scale), for typical photodetector devices in accordance with the invention, and for typical conventional devices for comparison.

DETAILED DESCRIPTION OF THE INVENTION

The invention includes a photodetector device and amplifying interface circuit that can render high performance in low-light conditions (in photon flux levels on the order or single photon per sampling period) in the ultraviolet region of the electromagnetic spectrum. This invention can effectively detect incident photons that impinge either on discrete photodetectors or on specific pixels in an imaging array. In one embodiment, suitable for video or still frame imaging in low light conditions, a plurality of such photodetector devices and interface circuits are preferably fabricated in a matrix to provide an imaging sensor of multiple pixels.

An example of an imaging matrix of devices in accordance with the invention is shown in FIG.

1

. Photons

20

(with energy h&ngr;, where &ngr; is the frequency and h is Plancks constant) impinge upon a photodetector layer

22

, which includes multiple detector pixels. The photodetector layer

22

is preferably grown using molecular beam epitaxy or organo-metallic chemical vapor deposition (MOCVD), for example, on a transparent detector substrate, to define a plurality of independent photodiode detectors. The detector layer

22

is partially cut away in the illustration to better show multiple interlayer interconnection bumps

24

(typically made from indium or another eutectic conducting material). Underlying the bumps

24

, and communicating with layer

22

by means of the bumps

24

, is an interface layer

26

in which a plurality of independent interface circuits are fabricated, preferably by using high-quality EPI or neutron transmutation doped wafers with a thin oxide to provide adequate threshold voltage V

T

uniformity. The photodetection layer

22

is preferably “flip-chip” mounted to the interface layer

26

, using the interconnecting bumps

24

to connect photodiodes-to respective interface circuits. For a more detailed description of a technique that can suitably be used to mount the layers, see U.S. Pat. No. 5,627,112 to Tennant et al. (1997). A portion

28

of the interface layer is also used for readout and addressing electronics.

The cross-sectional view of

FIG. 2

shows a small region of the imaging matrix of FIG.

1

. The photodetection layer

22

includes a detector substrate layer

30

and a detector layer

32

, of optimum bandgap for detecting the specific ultraviolet radiation, which communicates with the interface circuit layer

26

via the metal (typically indium or solder) bumps

24

. It should be understood that in this context, a “layer” refers in general to a semiconductor wafer having multiple sublayers according to the various fabrication steps applied, rather than a single homogeneous layer. Accordingly, detector layer

32

includes suitably a “p doped” region

34

and an “n+doped” region

36

, together forming a photodiode. Although this arrangement is convenient for fabrication, the p and n regions could equivalently be reversed, to form a photodiode with opposite junction polarity, as will be easily recognized.

The interface layer

26

preferably underlies the detector layer

22

, to which it is bonded and communicates via the conductive “bumps”

24

(only one of many is shown, for clarity), so that the layers lie one upon the other in a laminar fashion, much like a sandwich. It is advantageous to arrange the detector layer as shown in, the figure, nearest the incident radiation, in order to maximize optical fill factor and avoid any limitation of the aperture (active surface) which otherwise might be masked by metallization layers.

The detector layer

26

includes multiple metallization layers such as

50

and

52

, which are fabricated with suitable circuit paths, according to conventional photolithographic or similar techniques, to connect the various active and passive components of the interface circuitry (further described below in connection with FIGS.

5

through

7

). Conventional oxide layers

54

and planarization material layers

56

are also present to define and separate conventional integrated circuit paths and components. An overglass layer

58

preferably is added to protect the circuitry during the flip chip bonding process.

Any number of layers of conventional metallization or other fabrication layers may be included in the layer

26

, as required to fabricate the desired interface circuit. For clarity, details are omitted, but it should be understood that the cutaway region

60

may comprise multiple and complex fabrication layers. Typically 5 or six layers would be adequate to service the interface circuitry.

The lowest layers should typically include the MOS active components

64

on a (typically silicon) substrate

66

. Shallow trench isolation and deep sub-micron CMOS processes should preferably be used to limit the size and inherent capacitance of the active devices, and thereby increase the operating speed while reducing pixel size of the detector cells. In accordance with conventional fabrication technique, the MOS component layer

66

is preferably separated from the overlying metallization layer by polycrystalline silicon (“polysilicon”) layers

68

a

and

68

b.

Optionally, the uppermost surface of the photodetector layer (nearest to the incident light) can be coated with a suitable optical coating

70

, to reduce reflection due to refractive index mismatch, or to correct or customize spectral response. Microlenses can also (optionally) be formed on the uppermost surface of the photodetector layer to maximize the collection of light impinging on each pixel while facilitating minimization of detector capacitance and/or the number of defective pixels by minimizing the captive cross-section of various defects.

In accordance with the invention, the bandgap in the photoreceptive region of the photodiode

38

should be tuned to a level high enough to select for visible or shorter wavelengths. The most desirable bandgap will depend upon the exact intended environment and application of the device, which can be somewhat customized. For detection of ultraviolet light to 400 nm, the photodiode

38

should preferably be fabricated with a bandgap of at least 3.1 eV. This will produce dark currents at room temperature that are at least several orders of magnitude lower than conventional silicon photodiodes (with 1.1 eV bandgap).

Table 1 gives examples of suitable detector and substrate materials for ultraviolet applications. These materials are recommended, but equivalent materials could be substituted without departing from the invention. Materials chosen from columns III and V of the periodic table are preferred because they are known to allow engineering of bandgaps in the desired regions, as exemplified in Table 1. Specifically for the InGaN alloy, the energy bandgap of the In

x

Ga

1−x

N over 0≦×≦1 can be expressed at room temperature as:

E

g

(x)=(1−x)E

g

(InN)+xE

g

(GaN)−bx(1−x)

where E

g

(GaN)=3.40 eV, E

g(InN)=

1.9 eV, and the best-fit experimental value for b is currently 3.2 eV. The actual value for b for a specific detector architecture depends on various complicating growth factors including the piezoelectric effect and non-uniform strain; the impact of the former is often mitigated by growing thick films. The impact of the latter is also sometimes helped by growing thick films but this is difficult because the relaxation value of the lattice constant must be accurately known to set tune the bandgap vs. composition dependence.

TABLE 1

Cutoff

Wavelength

Bandgap

Detector

Detector

(nm)

(eV)

Layer

Substrate

450

2.76

In

0.15

Ga

0.85

N

InP

365

3.40

GaN

InP

203

6.10

AlGaN

InP

Such III-V semiconductors have several advantages for application as photodetectors for visible imaging systems. It is very desirable for detectors to have a direct band gap semiconductor, so that the photons are efficiently and quickly absorbed. The band gap should be of only slightly lower energy than the energy of the desired photon, so that thermal generation of carriers across the-band gap, which is undesirable, is minimized. By suitable choice of the III-V alloy constituents and composition, direct band gap semiconductors with gap energies covering the near infrared, visible and near ultraviolet can be realized.

Another requirement for good detectors is low defect density. For minimum defect density, growth on a lattice-matched substrate is desirable. Both GaAs and InP substrates are commercially available, and are of high quality. A range of materials can be grown that are exactly lattice-matched to InP substrates. InGaN can support upper cutoff wavelengths from <0.4 to about 0.5 microns. GaN naturally supports a near-ideal cutoff of 0.36 &mgr;m.

Another advantage of these III-V alloys is that wider band gap material can usually be placed on the illuminated side of the photo-diode, so that the incident photons are absorbed in the desired depletion region of the photo-diode, rather than in the doped contact region. These wider gap windows improve the quantum efficiency of the detectors.

For those applications where the desired wavelength is of higher energy than the band gap of the substrate and the radiation is incident from the back-side, there are a variety of techniques for removing the substrate used to grow the photo-detectors. This substrate removal can be done at the wafer-level, in which case the epitaxial layers would need to be attached to another substrate for mechanical reasons, or it can be done after hybridization, in which case there is no need for further mechanical support.

The dark current, I

gr

, produced by a photodiode in accordance with the invention will be dominated by generation-recombination mechanisms and thus vary as a function of temperature, bias voltage, and bandgap, approximately according to the equation:

I

gr

≈

qn

i

⁢

AW

τ

eff

where q is the electronic charge, &tgr;

eff

is the effective carrier lifetime, n

i

is the intrinsic carrier concentration, A is the surface cross-sectional area of the depletion region boundary and W is the depletion width for an abrupt one-sided junction. The variation of I

gr

is expected to be mostly dominated by the intrinsic carrier concentration. The concentration is governed by:

n

i

∝

e

-

E

g

2

⁢

⁢

kT

where E

g

is the bandgap and the quality of the material is represented in the term &tgr;

eff.

To produce a practical low-level detector at a given temperature, therefore, the bandgap should be engineered to produce dark currents at a desired operating temperature that is lower than the photodetector's single photon current output. For example, for temperatures in the region 280-300 K, which roughly corresponds to common ambient temperatures, GaN detector on a sapphire substrate produces a 1.40 eV bandgap, which would produce less than 10

−20

A dark current for a 400 micron

2

detector area. Such devices are capable of supporting detection of single quanta of ultraviolet light by being distinguishable over the dark current noise.

FIG. 3

shows energy bandgap vs. lattice constant for a variety of III-V semiconductor compounds, including those listed in table 1. Several lattice-matched systems can be identified from the diagram. Binary compounds are shown as points, such as the InN point shown at

80

and the GaN point at

82

. Ternary and quaternary compounds can be formed with properties intermediate between the binaries: for example, the line

84

between InN and GaN approximately represents achievable bandgap and lattice constants for InGaN compounds with mixtures intermediate between the InN and GaN extremes (also referred to in table 1, above) Similarly, The line

86

represents a continuum of bandgap-lattice constant relations achievable with AlGaN materials. Other compound materials can be formulated, as will be evident from the diagram and from known technology.

FIG. 4

shows a cross section of an alternate embodiment of the invention, capable of multi-color (or more generally, multi-wavelength) discrimination, suitable for use in a spectral-discriminating imaging matrix. The photodetector layer

90

in this embodiment includes a plurality of distinct photodiode junctions such as

92

and

94

, preferably disposed one above the other, layered in a laminar fashion. In the example shown, the photodiode

92

, which includes p layer

96

and n+layer

98

, are disposed on top of a second photodiode

94

made up of second p layer

100

and second n+ layer

102

. Preferably, the second (underlying) photodiode

94

should be engineered from materials to produce a lower bandgap than the first (overlying) photodiode. Thus, wavelengths that are too long to be absorbed by the upper photodiode will penetrate the upper photodiode and be absorbed by the lower photodiode. As in the embodiment of

FIG. 2

, the photodiode signals are passed to the interface circuitry by conductive (typically indium) bumps

24

. The photodiode outputs are isolated from one another: this is accomplished suitably by providing a top layer interface circuit and a bottom layer interface circuit

110

, with the output of the one of the photodiodes

92

or

94

passing by via

114

to the lower interface circuit

110

. Both interface circuits are preferably fabricated in CMOS, employing shallow trench isolation in deep sub-micron silicon.

Although only two photodiodes

92

and

94

are shown, to maintain clarity, three or more photodiodes can be used, as appropriate to a particular application.

To realize sufficient signal with low incident light, the photodetector described above will typically require amplification by a high gain, circuit or low, which, is preferably fabricated using integrated complementary metal-oxide semiconductor (CMOS) technology (although nMOS or pMOS could also be used). Preferably, one interface circuit per pixel is provided. As previously discussed, fabrication of the CMOS interface layer(s)

28

can be performed separately from the fabrication of the photodetection layer

22

, then the layers connected via bump bonding, as described in U.S. Pat. No. 5,627,112 or by equivalent methods.

FIG. 5

shows one example of a suitable interface circuit (or “readout circuit”), which can be fabricated in CMOS technology in layer

28

and which provides sufficient gain to read out single photon events at video frame rates. The low impedance circuit is similar to that disclosed in U.S. Pat. No. 5,929,434 to Kozlowski et al.

A high-gain amplifier A

1

is connected in a negative feedback configuration from the source to gate of load FET Q

1

to minimize the input impedance. In particular, the amplifier's input

120

is connected to the source of Q

1

, and its output

122

is connected to the gate of Q

1

. The amplifier A

1

can suitably be a single-ended inverting amplifier or a differential amplifier, as further discussed in U.S. Pat. No. 5,929,434. The voltage V

bias1

at node

124

is preferably set to a voltage that ensures that the FET Q

1

operates in its subthreshold region. In this region, the FET's transconductance is very small, which is necessary to achieve high current gain via the ratio of the transconductances of Q

2

to Q

1

.

The photodiode PD

1

is a compound semiconductor photodiode, bandgap-engineered to provide the proper bandgap as described above in connection with FIG.

3

and Table 1. The photodiode PD

1

is preferably reverse-biased in the region below the avalanche breakdown threshold (sometimes called the “linear region” although linearity is not absolutely required by the invention). When a photon

20

(with energy h&ngr;) falls on the photodiode PD

1

, charge is injected into node

120

, connected to the source of Q

1

, resulting in a small signal. The amplifier A

1

, which is connected in a negative feedback configuration from the source to the gate of Q

1

, amplifies the small signal and causes the voltage at the gate of Q

1

to follow the small signal at node

120

, so that the gate-to-source voltage remains substantially constant across Q

1

and the small signal at

120

appears also at node

122

. See U.S. Pat. No. 5,929,434 for a discussion of the merits of the A

1

-Q

1

buffering circuit, which include insensitivity to 1/f FET noise.

The signal at node

122

is further amplified by the FET Q

2

, causing the much larger source-drain current I

1

to discharge capacitor C

1

. The voltage across C

1

therefore approximates an integral of the (amplified) small signal output of the photodetector, where the integration is over time. FET Q

3

is used to reset the voltage across capacitor C

1

during an initialization period or between samples, but remains off (approximating an open switch) during sampling integrations. V

sample

, the voltage applied to the gate of Q

3

, controls the sampling period. FET Q

4

also acts as a switch, and is held in its high impedance (“open”) state during integration, then switched to its low impedance (“Closed”) state periodically by V

read

, to read out the integrated voltage (preferably once per sampling period, at the end of the period). Gain of the circuit can be varied by adjusting the transdonductance ration of Q

2

to Q

1

, or by adjusting the time window during which the circuit integrates photonic signal.

Alternate interface circuits are known which are similar to that of

FIG. 5

but which provide a more predictable current gain that is independent of scene illumination.. For example, one such circuit is disclosed in U.S. Pat. No. 5,929,434 (discussed in Col. 5, line 49 through Col. 6, line 23 and shown in

FIG. 3

of that patent).

FIG. 6

shows an alternate interface circuit with low input impedance which provides very low noise and high gain by using a capacitively coupled, CMOS transimpedance amplifier that is optimized for low-light-level imaging. In this circuit, FETs Q

10

and Q

11

, which are connected in a cascode configuration, amplify photodetector signal from, PD

2

. The cascode inverter amplifier configuration, which comprises FETs Q

10

, Q

11

and load FET Q

13

, maximizes the compact amplifier's voltage gain and minimizes the Miller capacitance used for signal integration. During an initialization period, the CMOS reset switch consisting of complementary FETs Q

12

and Q

14

is switched on by complementary reset clock signals &phgr;

r

and {overscore (&phgr;

r

)}, thereby discharging any integrated signal stored on C

int

. The CMOS reset switch minimizes dc offsets generated by feedthrough of the reset clock to the detector node. C

int

represents the gate-to-source overlap capacitance of Q

11

, which is 300-400 aF per micron of FET width for 0.25 &mgr;m CMOS technology.

Further mitigation of switching feedthrough is achieved by shaping the reset clocks and the pixel readout clocks (&phgr;

read

and {overscore (&phgr;

read

)}) . The shaping optimizes the slew rate to perform the necessary clocking at minimum feedthrough. Increasing the amplifier bias during readout to briefly reduce its output impedance mitigates the degradation of readout speed resulting from the shaping of (&phgr;

read

and {overscore (&phgr;

read

)}).

Since the voltage gain of such a CMOS amplifier is significantly greater than 1000 and the III-V photodiode has capacitance less than 15 fF for the configuration of the preferred embodiment, C

int

of approximately 0.5 fF is thereby facilitated. The resulting photo-gain for the amplifier can thus be greater than 300 &mgr;V/e−, which is twenty to sixty times larger than achieved with CCDs.

Similarly, a CMOS transmission gate consisting of complementary FETs Q

15

and Q

16

enables the amplified signal to charge C

L

, which serves to band-limit the signal and thereby suppress the wide-band noise of the transimpedance amplifier. Since this configuration enables much larger C

L

than otherwise achievable within the pixel by exploiting the parasitic bus capacitance in conjunction with any additional band-limiting capacitance shared among all the pixels on the bus, the high frequency noise boost of this amplifier configuration is mitigated and <1 e− noise is facilitated.

The noise transfer function for the transimpedance amplifier of

FIG. 6

is:

v

o

i

n

=

C

det

+

C

int

G

·

C

int

·

1

1

+

s

⁢

⁢

τ

;

⁢

τ

≈

-

C

L

⁢

(

C

det

+

C

int

)

GC

int

where C

det

is the total detector and input capacitance, and G is the amplifier gain. The amplifier's noise equivalent charge is:

N

eq

=

⁢

⟨

v

o

2

⟩

⁢

C

int

q

;

⁢

where

⟨

v

o

2

⟩

1

/

2

=

⁢

∫

0

∞

⁢

4

⁢

⁢

kT

⁢

&LeftBracketingBar;

G

&RightBracketingBar;

⁢

&LeftBracketingBar;

H

n

⁡

(

s

)

&RightBracketingBar;

2

⁢

ⅆ

f

=

⁢

4

⁢

⁢

kT

⁢

&LeftBracketingBar;

G

&RightBracketingBar;

⁢

(

C

det

+

C

int

G

·

C

int

)

2

⁢

∫

0

∞

⁢

&LeftBracketingBar;

1

1

+

s

⁢

⁢

τ

&RightBracketingBar;

2

⁢

ⅆ

f

The integral under the radical is equivalent to ¼&tgr; where

1

4

⁢

⁢

τ

=

kT

C

int

·

(

C

det

+

C

int

)

2

C

L

⁡

(

C

det

+

C

int

)

+

C

int

·

C

det

Substituting, the output-referred amplifier noise voltage is:

⟨

v

o

2

⟩

1

/

2

=

kT

C

int

·

C

det

+

C

int

C

L

+

C

int

·

C

det

C

det

+

C

int

Alternatively expressing the output-referred noise in terms of electrons, the amplifier's wideband thermal noise, or channel noise, is:

∴

N

channel

=

1

q

⁢

&AutoLeftMatch;

kTC

&AutoRightMatch;

int

·

C

det

+

C

int

C

L

+

C

int

·

C

det

C

det

+

C

int

where q is the electron charge, k is Boltzmann's constant and T is the operating temperature. Channel noise of about 1 e− can be achieved with C

det

of 15 fF and C

int

of 0.5 fF at 295 K for C

L

of ˜1.23 pF. Since this is comparable to the bus capacitance for a typical video-format imager, no additional capacitance is needed. The preceding analysis does not include the amplifier 1/f noise, which increases inversely with the amplifier gate area. The amplifier configuration must therefore be long and narrow to minimize both 1/f noise and overlap capacitance.

The preceding analysis also does not consider the reset noise associated with resetting C

det

and C

int

. Such noise is suppressed by the inverse square root of the amplifier's gain. The amplifier gain must therefore be greater than 2500 to reduce this noise source to one electron at room temperature for the specified capacitances. Such amplification is readily achieved in CMOS via the cascode configuration and thereby obviates the otherwise compelling need for correlated double sampling. This alternative therefore provides an extremely compact amplifier.

The band-limited output voltage from the compact amplifier is read from each pixel by applying the complementary clocks &phgr;

read

and {overscore (&phgr;

read

)} and thereby connecting the pixel's signal to a readout Bus. This allows the outputs of multiple such interface circuits to be multiplexed to a common bus, as for example in reading out an array or matrix of photodetectors.

FIG. 7

shows an alternate interface circuit with high input impedance. The circuit uses a source follower amplifier to readout from the photodetector diode PD

4

. When &PHgr;

rst

is high, Q

27

provides bias to the photodetector diode PD

4

. The signal developed during the integration time across PD

4

's capacitance at node

130

is amplified and buffered by source follower FET Q

28

, which is current biased by Q

29

. The voltage V

bias

(at the gate of Q

29

) is preferably set to bias Q

29

in the subthreshold region to minimize its self-luminescence, which would otherwise increase noise and compromise the available dynamic range. The output of the source follower FET Q

28

is capacitively coupled by series capacitor C

clamp

initially, under control of a reset signal &PHgr;

clamp

applied to the gate of Q

31

.

The clamping and sampling facilitated in this manner effects correlated double sampling of the photogenerated signal that is subsequently read through the second stage source follower and offset by the voltage stored across C

clamp

. The correlated noise generated by resetting the detector capacitance is thereby eliminated. By minimizing the capacitances of PD

4

and the gate of FET Q

28

, the transimpedance is maximized for reading noise levels below about 10 e− at typical video rates. Since the maximum total capacitance of the III-V detector and the gate of FET Q

28

is preferably ≦5 fF, a photoconversion gain of 32&mgr;V/e−, the noise level for a background signal of one electron is about 32 &mgr;V rms. This is manageable since the noise bandwidth of the pixel amplifier can be limited to about ten times the maximum line rate, which is on the order of 100 kHz. The requisite white noise at this bandwidth, is a manageable 0.1&mgr;V/Hz. The output of the pixel amplifier is read from the pixel by enabling &PHgr;

access

to supply the signal to the bus. The signal is appropriately band-limited to about 100 kHz via the parasitic bus capacitance C

L

(not explicitly symbolized) and (optional) additional capacitance external to the pixel, if such is necessary to reduce the amplifier's wide-band thermal noise, depending on the MOS process. The circuit of

FIG. 7

is thus also capable of detecting quanta.

In one particularly attractive embodiment, a plurality of photodetectors according to the invention as previously described are integrated in a pixellated array or matrix. Independent interface circuits are most preferably provided for each pixel. By using a suitable variable gain interface circuit, for example as described above in connection with

FIGS. 5

,

6

and

7

, independently variable gain can be provided for each pixel. The interface-matrix can thus be fabricated with pixel gains varying from pixel to pixel in a manner complementary to any pixel-to-pixel variation (expected or measured) in photodetector sensitivity. Such photodetector variation might arise, for example, from processing inhomogeneities or irregularities.

One,of the primary benefits of the invention is that it uses conventional photodiodes or photoconductors that have unity gain, rather than avalanche photodetectors. Such photodiodes of photoconductors are cheaper, more uniform, easier to fabricate, more reliable, less susceptible to noise and can be fabricated in alternative materials at a variety of cutoff wavelengths to specifically tailor the photoresponse to each application. A second. benefit is the near absence of dark current at room temperature. At typical ambient temperatures, the dark current will be less than one quantum for the detector's pixel area (per sample time at video rates). A third benefit is the extremely small detector capacitance that can be achieved via the vertically integrated hybrid. This translates to lower read noise using easily produced photodetectors.

FIG. 8

demonstrates the dark current reduction achieved by the invention. A III-V detector consisting of GaN and capable of responding to ultraviolet radiation for wavelengths from 200 nm to 360 nm, shown as the dark current vs. temperature line

180

, has several orders of magnitude lower dark current than the best silicon CCDs.

The GaN dark current density on the order of 10

−18

A/cm

2

at room temperature enables detection of single photons. This reduction in dark current relative to silicon and other detectors of visible radiation completely eliminates any need for imager cooling in the temperature range spanned by the data shown (up to at least 320 degrees K, and by extrapolation probably much higher) Included in the figure are representative data for conventional silicon photodetectors including various configurations available in standard CMOS-based imagers. Curve

184

shows the dark current density for a MPP CCD (multi-pinned phase charge coupled device, available for example from Sony Corp.), and curve

186

similarly shows dark current density for a CMOS N+ in P substrate CCD device. It is apparent from the figure that the dark currents obtained by the invention are several orders of magnitude lower than silicon CCDs in the relevant temperature range.

While several illustrative embodiments of the invention have been shown and described, numerous variations and alternate embodiments will occur to those skilled in the art. In an application where speed is a priority, the photodetector of the invention could be used at rates far exceeding typical video frame rates (given sufficient illumination). On the other hand, in applications requiring extreme sensitivity, sampling can be done at lower than video frame rates, providing much greater photonic sensitivity, at the expense of speed. Cooling could optionally be, applied to obtain ultra-low dark current, low noise operation for extremely low light applications (for example, in astronomy). Such variations and alternate embodiments are contemplated, and can be made without departing from the spirit and scope of the invention as defined in the appended claims.