The present invention relates to electronic apparatus for controlling the presentation of a changeable visual display.

Electronic apparatus for controlling the presentation of a changeable display have been proposed for use with liquid crystal display digital time-pieces as disclosed UK Patent No. 1569022 and UK Patent application 2026736 and also for use with a method for drawing graphic symbols as disclosed in UK Patent application 2028067. However such apparatus is limited to producing only a temporal alphanumeric display or graphic symbols. This type of apparatus requires external controls to operate the display. In addition this type of apparatus cannot be used to produce a temporal visual display which imitates animated motion, such as showing cartoon characters.

UK Patent application No. 2037048 discloses an LCD game drawn under the control of a microprocessor.. Images are produced on the LCD which is composed of a matrix of LCD elements. With this type of display a 'staircase' is formed by the elements whenever a diagonal or a curved line is required. This is a poor visual representation compared with other 2-dimensional representations such as television, photographs and the like. In addition, this device requires a microprocess6r- to operate and also external controls to operate the device and change the display.

The present invention is intended to provide a remedy. It solves the problem of producing a changeable visual display without the requirement of external controls by using a programmable semiconductor device and a changeable liquid crystal display, the display being changeable from one visual presentation to another in accordance with instructions from the programmable semiconductor device.

Advantages offered by the invention are that the display is realistic and imitative of an animated display; the display apparatus may be made small such as in an article of jewellery and worn on the person; no external controls are required to operate the apparatus, and the apparatus may be reprogrammed for use with a different display giving flexibility of choice.

In a preferred form of the invention, the semiconductor device and the LCD are combined with a power source in an article of jewellery.

Embodiments of the invention will now be described by way of example with reference to the accompanying drawings in which:-

• Fig. 1 is a block diagram of a circuit for carrying out the present invention;
• Fig. 2 is a block diagram of an alternative circuit for carrying out the present invention;
• Fig. 3 is a block diagram similar to Fig. 1 including a programmable semiconductor device for generating audio signals.
• Fig, 4 is a block diagram similar to Fig. 3 with the programmable semiconductor device for generating audio signals being mounted on a separate chip.
• Fig. 5 is a block diagram similar to Fig. 2 including a programmable semiconductor device for generating audio signals.
• Figs 6a,6b,6c and 6d are schematic diagrams of a sequence of liquid crystal displays, produced by the apparatus in accordance with the present invention.

Referring now to Fig. 1 a semiconductor device in the form of a 'chip' 1 has a electrical circuitry located thereon fabricated by a low voltage complementary metal- oxide-semiconductor (CMOS) process or similar process.

An N-bit binary counter 2 is connected to a decoder 6 which decodes the said counter's output state to select an address of a preprogrammed read-only-memory (PROM) 3 to which it is connected. One of the decoder outputs 4 is preprogrammed to reset the binary counter 2 in order that the programme sequence may be recycled after a specified number of steps. The PROM 3 has M parallel outputs 5 which are connected to liquid crystal display drivers 8, and the drivers 8 also have M parallel outputs 9 which are connected to the front plane electrodes (not shown in the interest of clarity) of a liquid crystal display (Figs 6a-6d).

A first oscillator 10 is connected to the N-bit binary counter 2, and a second oscillator 11 is connected to the liquid crystal display (LCD) drivers 8 and to the back plane electrode (not shown) of the liquid crystal display.

The frequencies of the first and second oscillators are set by the value of resistive and capacitive components (not shown) which are located external to the semiconductor chip 1.

Power is supplied to the chip via terminals 12 and 13 which are at a potential of typically 41 volts and zero volts respectively.

The data which has been 'read' from the PROM 3 is transferred in M parallel rows by the PROM outputs 5 to the liquid crystal display drivers 8 in accordance with the frequency of the oscillator 10.

The visual display data is caused to oscillate according to the frequency of oscillator 11 such that the data is either in-phase or in antiphase with the signal to the back plane electrode. Signals in antiphase cause the electrode elements to change state and reflect light giving the appearance of darkening while those in pahse cause the appearance of the visual display to transmit light and so to remain unchanged.

The visual display data is then transferred from the drivers 8 to M crystal display electrodes in accordance with the frequency of oscillator 11, the frequency of which is typically 100 Hz to prevent deterioration of the liquid crystal display. Thus, data signals are presented to the front plane electrodes in phase, or in antiphase, with signals from the oscillator 11 to the back plane electrode of the liquid crystal display.

The visual display thus presented at a given time is representative of the particular row of data read from the preprogrammed read-only-memory 3 for example Fig. 6a. The visual display presented is continuously changedin accordance with the program in the PROM 3 from the display shown in Fig 6a through displays in Figs 6b,6c to Fig. 6d and to Fig. 6a. This gives the effect of an animated display. The frequency of change is controlled by the oscillator 10, which is typically 0.1 hZ to 2 Hz.

The number of electrodes of the liquid crystal display (M) and the number of steps in the display sequency (2^N) should be as large as possible to provide maximum display versatility. Maximum values of N and M are typically 5 and 30 respectively.

Referring now to Fig. 2, an N-bit shift register 14 and NOR gate 15 are connected to the PROM 3 in place of the binary counter 2 and decoder 6, and a latch buffer 7 is inserted between the M parallel outputs 5 and the LCD drivers 8. The outputs 7a of the latch buffer 7 are connected to the LCD drivers 8, and the oscillator 10 is also connected to the latch buffers 7, otherwise the circuit is.the same as for Fig. 1

In use, the shift register 14 is clocked by the oscillator 10 which then sends an electrical signal corresponding to a logic "1" to the PROM 3 enabling data corresponding to a particular visual display to be read. The NOR gate 15 ensures that there is only one logic "1" in the shift register at any one time. The data which has been read is transfered in M parallel rows by the PROM outputs 5 to the latch buffers 7. The data is then transferred from the latch buffers 7 to the LCD drivers 8 in accordcance with the frequency of the oscillator 10. The control of the display by the oscillator 11, is the same as for the first circuit shown in Fig. 1.

The external resistor of the oscillator 10 is variable so that the frequency of the change of the visual display can be adjusted manually, which is an advantage of the apparatus according to the present invention.

The circuit shown in Fig. 3 is the same as the circuit of Fig. 1 except for the addition of a second 2^NxL PROM 17 located in the integrated circuit on the chip 1. The inputs 16 to the chip are the same 2^N outputs from the decoder 6. The L outputs 18 from the PROM 17 are fed to a speech or tone generator (not shown) so that the changeable visual display is complemented by a synchronised varying speech or tone signal. The circuit shown in Fig. 4 is the same as Fig. 3 except that the second 2^Nx L PROM 17 is located externally of the chip 1. The PROM 17 may be a commercially available chip and its inputs 16 are taken from the outputs of the binary counter 2. This is because the address commands are decoded on a decoder located on the PROM 17. The outputs of 18 of the PROM 17 are fed to a speech or tone generator.

The circuit shown in Fig. 5 includes a second N x L PROM 17 located in the integrated circuit of the chip 1. The N inputs 16 of the PROM 17 are taken from the outputs of the shift register 14. The L outputs 18 from the PROM 17 are fed to a latch 19 and the outputs 20 from the latch are fed to a tone or speech generator (not shown in the interest of clarity). The circuit configuration shown in Fig 2 is not suitable for interfacing with a commercial PROM.

On processing mask will be unique to a particular liquid crystal design. The mask will contain data by which memory transistors in the read-only-memory are enabled or disenabled to provide the required output bit pattern. A typical display sequence is shown in Figs 6a-6d.

A further advantage is that the CMOS-based operation requires very low power consumption, resulting in continuous operation, over a period of a year or more, being achieved without battry renewal.

Although it is envisaged that the present invention described in this embodiment will have application in electronic jewellery it should be also realised that the present invention will have application in many other fields such as advertising and learning methods without departing from the scope of the invention. Thus the visual display combined with the audio output synchronised to the display provides a useful learning aid.