Interface apparatus for receiving and monitoring pilot signals which control a timing signal generator专利检索-定时信号发生器电子零件及设备专利检索查询-专利查询网

Interface apparatus for receiving and monitoring pilot signals which control a timing signal generator

阅读：680发布：2022-03-13

专利汇可以提供Interface apparatus for receiving and monitoring pilot signals which control a timing signal generator专利检索，专利查询，专利分析的服务。并且A master oscillator is phase locked to a wave derived from the countdown of a pilot signal received over either a principal or a standby pilot line. An interface unit for each pilot line compares the running count of the downcounter at the beginning of a cycle of the master oscillator wave with a stored count obtained in a prior cycle. If there is a substantial comparison match, the running count is overwritten into the store to compensate for slow drift between the frequenices of the pilot and oscillator. If a substantial mismatch is encountered, a pilot malfunction is presumed and the oscillator switches to the standby pilot or free runs if the standby pilot status is bad. The initial mismatch is presumed to be a momentary malfunction, such as a noise hit, and the stored count is ''''stuffed'''' into the downcounter at the beginning of the oscillator wave cycle to restore the prior phase relation between the downcounter operating cycle and the oscillator wave. Repeated mismatches are presumed to indicate a prolonged malfunction of the pilot and the downcounter is phase aligned with the downcounter of the other unit if the other pilot status is good or phase aligned with the oscillator wave if the other pilot status is bad.，下面是Interface apparatus for receiving and monitoring pilot signals which control a timing signal generator专利的具体信息内容。

权利要求

1. A circuit for comparing the phase of timing signals with the phase of clock signals comprising, means for producing the timing signals, said producing means also including means for producing running indications defining phases of each cycle of the timing signals; means for storing a phase-defining indication; means for reading the running indication produced by the producing means when the clock signal is at a selected phase; and means for comparing the read running indication and the stored indication; CHARACTERIZED BY means responsive to a substantial comparison match for writing the read indication into the storing means to replace the stored indication.

2. A circuit, in accordance with claim 1, wherein the producing means comprises a downcounter which down counts a pilot wave to produce the timing signals and the running indications comprise counts in each downcount cycle and the storing means comprises means for storing a count.

3. A circuit, in accordance with claim 2, wherein there is also included means responsive to a comparison mismatch for modifying the cyclic operation of the producing means to produce a count corresponding to the stored count when the clock signal is at the selected phase.

4. A circuit for comparing the phase of timing signals with the phase of clock signals from a clock circuit comprising, means for producing counts defining phases of each cycle of the timing signals; a storage circuit; means responsive to the clock signals for writing into the storage circuit the count produced when the clock signal is at a selected phase during one of its cycles; means for comparing the count in the storage circuit to the count produced when the clock signal is at the selected phase during a succeeding one of the cycles; and means responsive to a comparison mismatch for modifying the cyclic operation of the producing means to produce the count stored in the storage circuit when the clock signal is at the selected phase.

5. A circuit, in accordance with claim 4, wherein the timing signals are applied to the clock circuit and the clock circuit is controlled by the timing signals.

6. A circuit in accordance with claim 5, and including means responsive to the comparison mismatch for precluding the application of the timing signals to the clock circuit.

7. A circuit in accordance with claim 6, wherein the producing means is responsive to a pilot signal, the producing means being further arranged to down count the pilot signal to thereby also produce the timing wave.

8. A circuit for supplying a timing wave to a wave-controlled clock pulse generator comprising, means for counting down a pilot signal to produce a down counted pilot signal and to produce counts defining phases of each cycle of the counting down means; means for comparing a count of the counting down means produced when the clock pulse is at a selected phase with a stored count; means responsive to a substantial Comparison match for overwriting the stored count with the produced count; and other means responsive to a comparison mismatch for modifying the cycling of the counting down means to produce a count defining a predetermined phase when the clock pulse is at the predetermined phase.

9. A circuit, in accordance with claim 8, wherein there is included other means responsive to a comparison mismatch for precluding the application of the down counted pilot signal to the clock pulse generator.

10. A circuit, in accordance with claim 8, wherein there is included further means responsive to an initial comparison mismatch for modifying the cycling of the counting down means to produce a count defining the selected phase when the clock pulse is at the selected phase and means responsive to the further modifying means for enabling the other modifying means to respond to a subsequent comparison mismatch.

11. A circuit for supplying a timing wave to a wave-controlled clock pulse generator comprising, at least two interface units, each unit including means for counting down a pilot signal to produce a down counted pilot signal and to produce counts defining phases of each cycle of the counting down means; and means responsive to the down counted pilot signals produced by the two interface units for supplying the timing wave to the generator; each unit further including, means for comparing a count produced when the clock pulse is at a selected phase with a stored count; means responsive to a substantial comparison match for replacing the stored count with the count compared therewith; means responsive to a comparison mismatch for changing the count of the counting down means to modify the phase of the cyclic operation; further means responsive to a substantial comparison match for applying the down counted pilot signal produced by the counting down means of the unit to the generator; and further means responsive to a comparison mismatch for precluding the application of the down counted pilot signal produced by the counting down means of the unit and for applying to the generator the down counted pilot signal produced by the counting down means of the other unit.

12. A circuit, in accordance with claim 11, wherein the changing means is responsive to the comparison mismatch for modifying the cyclic operation of the counting dowm means to produce a count corresponding to the stored count when the clock pulse is at the selected phase.

13. A circuit, in accordance with claim 11, wherein the changing means is jointly responsive to the comparison mismatch and to a comparison match found by the comparing means of the other unit for modifying the cyclic operation of the counting down means to produce a count concurrently with the counting down means of the other unit producing a corresponding count.

14. A circuit, in accordance with claim 11, wherein the changing means is jointly responsive to the comparison mismatch and to a comparison mismatch found by the comparing means of the other unit for modifying the cyclic operation of the counting down means to produce a count defining a predetermined phase concurrently with the clock pulse signal passing through the predetermined phase.

说明书全文

标题	发布/更新时间	阅读量
用于电极阻抗测量的方法和设备	2020-05-11	256
图像传感器、包括其的电子系统及其操作方法	2020-05-14	303
单斜比较装置和包括该单斜比较装置的CMOS图像传感器	2020-05-14	859
一种人机协同模拟演练系统及其方法	2020-05-13	839
一种储罐底部油品泄漏的监测装置及监测方法	2020-05-14	203
具有改进的上行链路调平的分布式天线系统	2020-05-14	151
在分解的密集波分复用系统的一致性检查的方法和装置	2020-05-14	218
一种磁刺激穴位的中医诊疗装置	2020-05-08	707
一种基于OCC系统的二维星座辅助CSK传输系统	2020-05-12	368
一种板卡工作状态的控制设备和板卡测试系统	2020-05-12	318

Interface apparatus for receiving and monitoring pilot signals which control a timing signal generator

该功能需要专业版企业版VIP权限，您可以：