CROSS-REFERENCE TO RELATED APPLICATION

This application claims the benefit under 35 U.S.C. §119(e) and 37 C.F.R. §1.78 of U.S. Provisional Application No. 61/493,104, filed Jun. 3, 2011, and entitled “Peak Current Compensation for Better Line Regulation,” which is incorporated by reference in its entirety.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates in general to the field of electronics, and more specifically to a method and system for exercising primary-side control of a switching power converter with feed-forward delay compensation.

2. Description of the Related Art

Many electronic systems utilize switching power converters to efficiently convert power from one source into power useable by a device (referred to herein as a “load”). For example, power companies often provide alternating current (AC) power at specific voltages within a specific frequency range. However, many loads utilize power at a different voltage and/or frequency than the supplied power. For example, some loads, such as light emitting diode (LED) based lamps operate from a direct current (DC). “DC current” is also referred to as “constant current”. “Constant” current does not mean that the current cannot change over time. The DC value of the constant current can change to another DC value. Additionally, a constant current may have noise or other minor fluctuations that cause the DC value of the current to fluctuate. “Constant current devices” have a steady state output that depends upon the DC value of the current supplied to the devices.

LEDs are becoming particularly attractive as main stream light sources in part because of energy savings through high efficiency light output, long life, and environmental incentives such as the reduction of mercury. LEDs are semiconductor devices and are best driven by direct current. The brightness of the LED varies in direct proportion to the DC current supplied to the LED. Thus, increasing current supplied to an LED increases the brightness of the LED and decreasing current supplied to the LED dims the LED.

FIG. 1 depicts an electronic system 100 that converts power from voltage source 102 into power usable by load 104. Load 104 is a constant current load that includes, for example, one or more LEDs. A controller 106 controls the power conversion process. Voltage source 102 can be any type of voltage source such as a public utility supplying a 60 Hz/110 V input voltage V_IN or a 50 Hz/220 V input voltage V_IN in Europe or the People's Republic of China, or a DC voltage source supplied by a battery or another switching power converter.

The controller 106 provides a pulse width modulated (PWM) control signal CS₀ to current control switch 108 in a flyback-type, switching power converter 110 to control the conversion of input voltage V_IN into a primary-side voltage V_P and secondary voltage V_S. The switch 108 is, for example, a field effect transistor (FET). When control signal CS₀ causes switch 108 to conduct, a primary-side current i_PRIMARY flows into a primary coil 114 of transformer 116 to energize the primary coil 114. When control signal CS₀ opens switch 112, primary coil 114 deenergizes. Energizing and deenergizing the primary coil 114 induces a secondary voltage V_S across a secondary coil 118 of transformer 116. Primary voltage V_P is N times the secondary voltage V_S, i.e. V_P=N·V_S, and “N” is a ratio of coil turns in the primary coil 114 to the coil turns in the secondary coil 118. The secondary-side current i_SECONDARY is a direct function of the secondary voltage V_S and the impedance of diode 120, capacitor 122, and load 104. Diode 120 allows the secondary-side current i_SECONDARY to flow in one direction. The secondary-side current i_SECONDARY charges capacitor 120, and capacitor 120 maintains an approximately DC voltage V_LOAD across load 104. Thus, secondary-side current i_SECONDARY is a DC current.

The load 104 has a certain power demand, and the controller 106 generates the switch signal CS₀ in an attempt to cause the switching power converter 110 to meet the power demand of the load 104. Ideally, the power P_PRIMARY provided by the primary-side of the switching power converter 110 equals the power P_LOAD that is provided to the load 104. However, power losses due to non-idealities in the electronic system 100 result in the power P_PRIMARY provided by the primary-side being greater than the power P_LOAD delivered to the load 104, i.e. P_PRIMARY>P_LOAD. To meet the power demand of the load 104, controller 106 utilizes feedback to determine the amount of power actually delivered to the load 104. The controller 106 attempts to generate the control signal CS₀ to control the primary-side current i_PRIMARY so that the power P_PRIMARY meets the power demand of the load 104.

Controller 106 utilizes a feedback control loop to control the power P_LOAD delivered to the load 104. To control the power P_LOAD, the controller 106 controls the control signal CS₀ and thereby controls the primary-side current i_PRIMARY. Controlling the primary-side current i_PRIMARY controls the primary-side power P_PRIMARY provided by the primary-side of the switching power converter 110. The controller 106 adjusts the primary-side current i_PRIMARY so that the primary-side power P_PRIMARY is sufficient to transfer enough power P_LOAD to the load 104 to meet the power demand of the load 104.

To generate the primary-side power P_PRIMARY, controller 106 utilizes either secondary-side, feedback-based control via a secondary-side feedback path 124 or primary-side control via sense resistor 126. The secondary-side, feedback path 124 is shown with a ‘dashed’ line to indicate use in the alternative to primary-side feedback. For secondary-side, feedback-based control, the controller 106 senses the secondary current i_SECONDARY via the signal i_{S_SENSE}. The secondary-side feedback path 124 generally includes components, such as an opto-isolator or optocoupler, that provide electrical isolation between the controller 106 and the secondary-side of the transformer 110. Since the controller 106 knows the primary-side voltage V_P and the turns ratio N, the controller 106 also knows the secondary side voltage V_S and knows the secondary-side current i_SECONDARY from the feedback signal i_{S_SENSE}. Thus, the controller 106 can directly determine the power P_LOAD delivered to the load 104. The controller 106 generates the control signal CS₀ to generate the primary-side current i_PRIMARY to meet the power demand of the load 104 so that the power demand of the load equals the power provided to the load 104.

The actual peak value of the primary-side current i_PRIMARY is directly proportional to the amount of power delivered to the load 104. Thus, for primary-side only control, determination of the actual peak value i_PK of the primary-side current i_PRIMARY dominates the accuracy of the determination of the amount of power delivered to the load 104. The foregoing statement is especially the case during low power applications since the range of the primary-side current i_PRIMARY is reduced. The switch 108 does not turn OFF instantaneously upon detection of a target peak value i_PK of the primary-side current i_PRIMARY by the controller 106. Once the controller 106 senses that the primary-side peak current i_{PK_SENSE} equals a target peak value i_PK and turns switch 108 OFF, the actual primary-side current i_PRIMARY has already overshot the sensed peak current i_{PK_SENSE}.

To compensate for the delay in turning switch 108 OFF, the electronic system 100 introduces a feed forward, scaled voltage compensation factor

V

IN

R

SENSE

×

R

130

R

128

+

R

130

to boost the current conducted by the sense resistor 126. R_SENSE is the resistance value of the sense resistor 126, R₁₂₈ is the resistance value of the resistor 128, R₁₃₀ is the resistance value of the resistor 130. Boosting the current across the sense resistor 126 prior to the controller 106 sensing the primary-side current causes the controller 106 to determine a higher peak current i_{PK_SENSE} that can compensate for the delay in turning off the switch 108. Equation [1] represents the value of the estimated peak current i_{PK_EST} using the fixed, feed forward compensation factor:

i

PK

⁢

⁢

_

⁢

⁢

EST

=

i

PK

⁢

⁢

_

⁢

⁢

SENSE

+

V

IN

R

SENSE

×

R

130

R

128

+

R

130

=

i

PK

+

V

IN

L

×

t

DELAY

;

⁢

⁢

and

[

1

]

t

DELAY

=

L

R

SENSE

×

R

130

R

128

+

R

130

.

[

2

]

i_{PK_EST} is the estimated peak value of the primary current i_PRIMARY, and i_{PK_SENSE} is the sensed peak value of the primary-side current. As previously stated, R_SENSE is the resistance value of the sense resistor 126, R₁₂₈ is the resistance value of the resistor 128, R₁₃₀ is the resistance value of the resistor 130, L is the inductance value of the primary-side coil 114, and t_DELAY, as defined by Equation [2], is the delay due to the switch 108 OFF. Since the compensation factor

V

IN

R

SENSE

×

R

130

R

128

+

R

130

tracks well with the input voltage V_IN, for a given inductance value L of the primary-side coil 114, the compensation factor

V

IN

R

SENSE

×

R

130

R

128

+

R

130

effectively cancels out delays in turning the switch 108 OFF.

However, secondary-side sensing requires additional, potentially relatively expensive components. Using primary-side sensing and applying the compensation factor

V

IN

R

SENSE

×

R

130

R

128

+

R

130

,

which equals

V

IN

L

×

t

DELAY

,

works for a particular inductance value L of the primary-side coil 114. However, the inductance value L of the primary-side coil 114 can vary from transformer to transformer by, for example, at least +/−10%. Thus, if the inductance value L used by the controller 106 differs from the actual inductance value L for the primary-side coil 114, then the estimation of the peak value of the primary-side current i_PRIMARY can result in errors providing power to the load 104. Additionally, altering the primary-side current value across the sense resistor R_SENSE prior to sensing a representative value of the primary-side current i_PRIMARY utilizes external components, which increase the cost of the electronic system 100.

SUMMARY OF THE INVENTION

In one embodiment of the present invention, a method includes sensing a value of a current in a switching power converter during a switching cycle of the switching power converter. The method also includes detecting a target peak value of the current value and adjusting the detected target peak value of the current value with a post-detection delay compensation factor to generate a delay compensated current value. The method further includes determining an amount of current provided to a load coupled to the switching power converter based on the delay compensated current value and generating a switch control signal to control the value of the current in the switching power converter to provide energy to the load in accordance with the delay compensated current value.

In another embodiment of the present invention, an apparatus includes a controller a controller having an input to sense a value of a current in a switching power converter during a switching cycle of the switching power converter. The controller is capable to detect a target peak value of the current value and adjust the detected target peak value of the current value with a post-detection delay compensation factor to generate a delay compensated current value. The controller is further capable to determine an amount of current provided to a load coupled to the switching power converter based on the delay compensated current value and generate a switch control signal to control the value of the current in the switching power converter to provide energy to the load in accordance with the delay compensated current value.

In a further embodiment of the present invention, an apparatus includes a switching power converter, wherein the switching power converter includes a transformer having a primary-side and a secondary-side. The apparatus also includes a controller having an input to sense a value of a current in a switching power converter during a switching cycle of the switching power converter. The controller is capable to detect a target peak value of the current value and adjust the detected target peak value of the current value with a post-detection delay compensation factor to generate a delay compensated current value. The controller is further capable to determine an amount of current provided to a load coupled to the switching power converter based on the delay compensated current value and generate a switch control signal to control the value of the current in the switching power converter to provide energy to the load in accordance with the delay compensated current value. The apparatus further includes a load coupled to the secondary-side of the transformer of the switching power converter.

BRIEF DESCRIPTION OF THE DRAWINGS

The present invention may be better understood, and its numerous objects, features and advantages made apparent to those skilled in the art by referencing the accompanying drawings. The use of the same reference number throughout the several figures designates a like or similar element.

FIG. 1 (labeled prior art) depicts an electronic system.

FIG. 2 depicts an electronic system that utilizes a delay compensated current value to control a switching power converter.

FIG. 3 depicts an exemplary control process for controlling the switching power converter of FIG. 2.

FIG. 4 depicts an electronic system representing one embodiment of the electronic system of FIG. 2.

FIG. 5 depicts exemplary waveforms associated with the operation of the electronic system of FIG. 4.

FIG. 6 depicts an exemplary primary-side current and delay effects graph.

FIG. 7 depicts an exemplary comparison between delay compensated and uncompensated ratios of actual to target peak primary-side currents.

FIG. 8 depicts an alternative embodiment of obtaining a current sense signal using a primary-side auxiliary winding.

DETAILED DESCRIPTION

An electronic system includes a controller to control a switching power converter to provide power to a load. To control the amount of power provided to the load, in at least one embodiment, the controller senses a current value representing a current in the switching power converter and detects when the current value reaches a target peak value. However, due to delays in the controller and/or the switching power converter, the detected target peak value will not be the actual current peak value generated by the switching power converter. In at least one embodiment, the controller adjusts the detected target peak value with a post-detection delay compensation factor to generate a delay compensated current value that more accurately represents an actual peak current value associated with the current in the switching power converter. In at least one embodiment, the controller utilizes the delay compensated current value to determine an amount of current provided to the load and to determine a subsequent target peak current value.

one embodiment, the post-detection delay compensation factor models an extrapolation of the value of the current that changes as a result of delays in the controller and/or the switching power converter. Exemplary delays occur between detecting the approximate peak value of the current value by the controller and discontinuing the current by the switching power converter. In at least one embodiment, the current value increases linearly as delay increases and, thus, is modeled using a linear extrapolation. However, the particular model is a matter of design choice and depends on the characteristic effects of delays on the current value. In at least one embodiment, the post-detection delay compensation factor represents a dynamically determined, approximate delay between the detected peak value of the current and an actual peak value of the current.

FIG. 2 depicts an electronic system 200 that includes a controller 202 to control switching power converter 204 using peak current control and a delay compensation factor. Voltage supply 206 supplies an input voltage V_IN to the switching power converter 204. The voltage supply 206 can be any type of voltage supply and is, for example, the same as voltage supply 102 (FIG. 1). The controller 202 generates a switch control signal CS₁ that controls the conductivity of switch 208 and the flow of input current i_IN. Switch 208 can be any type of switch, such as a field effect transistor (FET). When the switch 208 conducts, the input current i_IN flows into components 210 and through switch 208. The input current i_IN may equal to a current entering the switching power converter 204 or may be less than the current entering the switching power converter 204. The switching power converter 204 uses the input current i_IN and the input voltage V_IN to generate a secondary-side voltage V_S and an output current i_OUT for the load 212. In at least one embodiment, the controller 202 regulates the output current i_OUT. The load 212 can be any type of load, such as one or more lamps, each having one or more light emitting diodes (LEDs).

In at least one embodiment, the controller 202 targets a particular output current i_{OUT_TARGET} to provide to the load 212. The target output current i_{OUT_TARGET} represents the amount of charge provided to the load 212 during a period of time. In at least one embodiment, the target output current i_{OUT_TARGET} is a target amount of charge provided to the load 212 over a cyclic period, (for example, “TT” in FIG. 5) of the switch control signal CS₁. The manner in which the controller 202 determines the amount of output current i_{OUT_TARGET} to target is a matter of design choice. In at least one embodiment, the targeted output current i_{OUT_TARGET} is entered as data into an optional memory 214. In at least one embodiment, the targeted output current i_{OUT_TARGET} indicates a single amount of current or a single amount of charge to be delivered within a period of time. In at least one embodiment, the targeted output current i_{OUT_TARGET} is entered as one time programmable data. In at least one embodiment, the targeted output current i_{OUT_TARGET} indicates multiple levels of current or multiple amounts of charge to be delivered within a period of time. In at least one embodiment, the multiple values correspond to multiple output settings for the load 212 such as different dimming level settings indicated by the DIM signal. In at least one embodiment, the controller 202 receives the DIM signal from a dimmer (not shown) or from another input source (not shown).

FIG. 3 depicts an exemplary control process 300 for controlling the switching power converter using a delay compensation factor. Referring to FIGS. 2 and 3, the controller 202 includes a sensor 217 that receives the current value CV in operation 302. The current value CV represents a value of the input current i_IN flowing through the switch 208. The current value CV can represent the input current i_IN in any manner, such as a scaled or unscaled current or voltage. In operation 304, the sensor 217 compares the received current value CV with a then-current target peak current value i_{PK_TARGET}(n) for the input current i_IN to detect when the current value CV equals the target peak current value i_{PK_TARGET}(n). “(n)” is an index reference. If the current value CV does not equal the target peak current value i_{PK_TARGET}(n), operations 302 and then 304 repeat. When the current value CV equals the target peak current value i_{PK_TARGET}(n), the sensor 217 sends a “peak reached signal” PKR to the switch control signal generator 218 indicating that the switch control signal generator 218 should turn the switch 208 OFF. In operation 306, the switch control signal generator 218 responds by generating the control signal CS₁ to turn the switch 208 OFF. In at least one embodiment, the control signal CS₁ is a pulse width modulated signal.

Delays occur between the time the sensor 217 detects that the current value equals the target peak current value i_{PK_TARGET} and when the switch 208 turns OFF. The delays can arise from any number of sources such as:

• • Delay in operation 304 determining whether the current value CV equals the i_PTARGET(n);
  • Delay in propagating the control signal CS₁ to the switch 208; and
  • Delay in the response of switch 208 to the control signal CS₁ to turn the switch 208 OFF.

During the delays, the input current i_IN continues to increase. Thus, the delays result in the switching power converter 204 providing an additional amount of current i_OUT to the load 212 after the sensor 217 detects that the current value CV has reached the target peak current value i_{PK_TARGET}(n). The sensor 217 also provides the peak reached signal PKR to the delay compensator 216. To compensate for the delays, in operation 308, the delay compensator 216 receives the peak reached signal PKR and adjusts the detected target peak current value i_{PK_TARGET}(n) with a delay compensation factor DELAY_COMP to generate an estimated peak current i_{PK_EST}. In at least one embodiment, the adjustment of the target peak current value i_{PK_TARGET}(n) by the delay compensation factor DELAY_COMP models the increase in the input current i_IN that occurs due to the delays. The particular model depends on the characteristics of the input current i_IN and a desired degree of accuracy in estimating the actual peak value of the input current i_IN. In at least one embodiment, the input current i_IN increases linearly over time, and the adjustment of the target peak current value i_{PK_TARGET} (n) by the delay compensation factor DELAY_COMP represents a linear extrapolation of the input current i_IN that occurs during the delays.

Once the delay compensator 216 determines the estimated peak current i_{PK_EST}, and, based on the estimated peak current i_{PK_EST}, operation 310 determines the amount of output current i_OUT provided to the load 212. In at least one embodiment, the particular quantification of the value of the output current i_OUT provided to the load 212 is a matter of design choice. In at least one embodiment, operation 310 quantifies the current i_OUT provided to the load 212 as an amount of charge provided to the load 212 during a period TT of the control signal CS₁.

Operation 312 sets the next target peak current value i_{PK_TARGET}(n+1) to minimize a difference between the amount of estimated actual output current i_OUT provided to the load 212 and the target output current i_{OUT_TARGET}. In at least one embodiment, operation 312 sets the value of the target peak current value i_{PK_TARGET}(n+1) by responding to any difference between the output current i_OUT provided to the load 212, as determined using estimated peak current i_{PK_EST}, and the target output current i_{OUT_TARGET} for provision to the load 212. If the estimated actual output current i_OUT is greater than the target output current i_{OUT _TARGET}, then operation 312 reduces the value of the target peak current value i_{PK_TARGET}(n+1). If the estimated actual output current i_OUT is less than the target output current i_{OUT_TARGET}, then operation 312 increases the value of the target peak current value i_{PK_TARGET}(n+1). In at least one embodiment, operation 312 adjusts the target peak current value i_{PK_TARGET}(n+1) every cycle of the control signal CS₁ to minimize the difference between the estimated output current i_OUT provided to the load 212 and the target output current i_{OUT_TARGET}. The particular convergence algorithm used to select the values of each subsequent target peak current value i_{PK_TARGET}(n+1) so that the output current i_OUT converges to the target output current i_{OUT_TARGET} is a matter of design choice and can be any custom or well-known convergence algorithm. The delay compensator 216 provides the target peak current value i_{PK_TARGET}(n+1) to the sensor 217. The target peak current value i_{PK_TARGET}(n+1) then becomes the current target peak current value i_PTARGET(n) for the next cycle of control process 300.

In operation 314, the switch control signal generator 218 generates the switch control signal CS₁ to turn the switch 208 ON. The particular time at which the switch control signal generator 218 turns the switch 208 ON is a matter of design choice and, in at least one embodiment, depends on the operational mode of the switching power converter 204. In at least one embodiment, the switching power converter 204 operates in quasi-resonant mode and/or discontinuous conduction mode as described, for example, in U.S. patent application Ser. No. 13/486,625, filed Jun. 1, 2012, entitled “Control Data Determination From Primary-Side Sensing of a Secondary-Side Voltage in a Switching Power Converter”, assignee Cirrus Logic, Inc., and inventors Robert T. Grisamore and Zhaohui He, which is hereby incorporated by reference in its entirety (referred to herein as “Grisamore-He”).

FIG. 4 depicts an electronic system 400, which represents one embodiment of the electronic system 200. FIG. 5 depicts exemplary operational waveforms 500 for the electronic system 400. Referring to FIGS. 4 and 5, electronic system 400 includes a controller 402 that generates a control signal CS₂ to control a flyback-type switching power converter 404. The switch control signal generator 218 generates a pulse width modulated, current switch control signal CS₂ to control the conductivity of an n-channel metal oxide semiconductor field effect transistor (NMOSFET) switch 406, which represents one embodiment of switch 208. During a pulse, such as pulse 502, of the control signal CS₂, the primary-side current i_PRIMARY linearly increases through the primary-side coil 408 of transformer 410 and develops a primary-side voltage V_P across the primary-side coil 408. The primary-side voltage V_P induces a secondary voltage V_S across the secondary-side coil 414. Because of the dot configuration of the transformer 410, the secondary voltage V_S is inverted from the primary-side voltage V_P and reverse biases a diode 412 during each pulse of the control signal CS₂. While the diode 412 is reverse biased, capacitor 416 provides current to the load 208.

In at least one embodiment, the electronic system 400 operates in accordance with an embodiment of the exemplary control process 300. During the pulse 502, the primary-side current i_PRIMARY flows through the switch 406 and develops a voltage across sense resistor 417. In operation 302, the comparator 418 receives the current sense signal i_CS, which represents one embodiment of the current value CV in FIGS. 2 and 3, and compares the current sense signal i_CS with the then-current target peak current value i_{PK_TARGET}(n) value in operation 304. The peak reached signal PKR is a logical 1 until the current sense signal i_CS reaches the target peak current value i_PTARGET, then the peak reached signal PKR transitions to a logical 0. The comparator 418 provides the logical zero value of the peak reached signal PKR to the switch control signal generator 218 and delay compensator 422. In operation 306, the switch signal control generator 218 causes the switch control signal CS₂ to transition to a logical 0 at time t₀, which turns the FET 406 OFF. The duration of the pulse 502 of switch control signal CS₂ is referred to as T1.

The delay compensator 422 conceptually includes two functional units, the secondary output current and peak primary current estimator with post-target current detection delay compensation 423 (referred to as the “currents estimator 423”) and the peak target current generator 425. In operation 308, the currents estimator 423 adjusts the target peak current value i_{PK_TARGET}(n) by a delay compensation factor DELAY_COMP to generate an estimated peak current i_{PK_EST} in order to determine the amount of secondary-side current i_SECONDARY delivered to the load 208. As previously discussed, various delays occur between the time when the comparator 418 detects that the current sense signal i_CS reaches the target peak current value i_{PK_TARGET}(n) and when the FET 406 stops conducting the primary-side current i_PRIMARY.

FIG. 6 depicts an exemplary primary-side current i_PRIMARY and delay effects graph 600. Referring to FIGS. 4, 5, and 6, one of the delays is the delay by the comparator 418 in comparing the current sense voltage V_CS with the target peak current value i_{PK_TARGET}(n). With finite gain and bandwidth, the current sense comparator 418 incurs a detection delay dT_cscmp_dly between when the comparator 418 actually detects that the current sense voltage V_CS equals the target peak current value i_PTARGET(n), as indicated by the “ACTUAL CROSSOVER POINT i_{PK_TARGET}”, when the comparator 418 transitions the state of the peak reached signal PKR. During the detection delay dT_cscmp_dly, the primary-side current i_PRIMARY continues to linearly increase. In at least one embodiment, Equation [3] represents change in the peak value Δi_PK of the primary-side current i_PRIMARY due to the detection delay dT_cscmp_dly:

Δ

⁢

⁢

i

PK

=

V

IN

L

×

dT_cscmp

⁢

_dly

.

Equation

⁢

[

3

]

V_IN is the input voltage, L is the inductance value of the primary-side coil 408, and a dT_cscmp_dly is the detection delay between when the comparator 418 actually detects that the current sense voltage V_CS equals the target peak current value i_PTARGET(n).

A further delay is a propagation delay dT_logic_dly from an output of the comparator 418 to the transition of the control signal CS₂ at the gate of the FET 406. The propagation delay dT_logic_dly is due to, for example, delays in inverters, flip-flops, level shifters, etc., which allow the primary-side current to continue to linearly increase. In at least one embodiment, Equation [4] represents change in the peak value Δi_PK of the primary-side current i_PRIMARY due to the propagation delay dT_logic_dly:

Δ

⁢

⁢

i

PK

=

V

IN

L

×

dT_logic

⁢

_dly

.

Equation

⁢

[

4

]

V_IN is the input voltage, L is the inductance value of the primary-side coil 408, and a dT_logic_dly is the propagation delay from an output of the comparator 418 to the transition of the control signal CS₂ at the gate of the FET 406.

Another delay is the delay in turning OFF the FET 406. Turning the FET 406 involves, for example, removing charge from the gate of the FET 406 and depleting charge in the conducting channel of the FET 406. In at least one embodiment, Equation [5] represents change in the peak value Δi_PK of the primary-side current i_PRIMARY due to the turn OFF delay of FET 406:

Δ

⁢

⁢

i

PK

=

V

IN

L

×

dT_gdrv

⁢

_dly

.

Equation

⁢

[

5

]

V_IN is the input voltage, L is the inductance value of the primary-side coil 408, and a dT_gdrv_dly is the delay in turning the FET 406 OFF.

By summing Equations [3], [4], [5], Equation [6] represents the estimated peak current i_{PK_EST} of the primary-side current i_PRIMARY.

i

PK

⁢

⁢

_

⁢

⁢

EST

=

V

IN

L

×

(

T

⁢

⁢

1

⁢

_meas

+

dT_cscmp

⁢

_dly

+

dT_logic

⁢

_dly

+

dT_gdrv

⁢

_dly

)

,

⁢

which

⁢

⁢

rearranges

⁢

⁢

to

⁢

:

⁢

⁢

i

PK

⁢

⁢

_

⁢

⁢

EST

=

i

PK

⁢

⁢

_

⁢

⁢

TARGET

×

(

1

+

dT_dly

⁢

_total

T

⁢

⁢

1

⁢

_meas

)

.

Equation

⁢

[

6

]

dT_dly_total=dT_cscmp_dly+dT_logic_dly+dT_gdrv_dly is the estimated delay duration of the primary-side current i_PRIMARY during a cycle of the control signal CS₂. The quantity

(

1

+

dT_dly

⁢

_total

T

⁢

⁢

1

⁢

_meas

)

represents an embodiment of a delay compensation factor DELAY_COMP. T1_meas is a measured value of T1 since the actual value of T1 is unknown. The measured value also incurs a delay error. However, dT_dly_total is much smaller than the actual T1, so the delay due to measuring T1 is not included in the delay compensation factor. In at least one embodiment, the value of the delay compensation factor DELAY_COMP equal to

(

1

+

dT_dly

⁢

_total

T

⁢

⁢

1

⁢

_meas

)

is empirically or analytically predetermined based on knowledge of the components used on the electronic system 400 and is stored in the memory 424. The delay compensation factor DELAY_COMP is used by the currents estimator 423 to determine the estimated peak current i_{PK_EST} after detection of the target peak value of the primary-side current. In at least one embodiment, this “post-detection” delay compensation factor DELAY_COMP reduces external components and is flexible to represent multiple delay types. Additionally, in at least one embodiment, the delay compensation factor DELAY_COMP is not sensitive to variations in inductance values of the primary-side coil 408.

In at least one other embodiment, the value of the delay compensation factor DELAY_COMP is measured as dT_meas by measuring changes in the drain to source V_DS voltage of FET 406 as shown in waveform 602. However, this measurement also incurs a delay that is, in at least one embodiment, accounted for by adding dT_cscmp_dly to dT_meas.

In operation 310, in accordance with Equation [7], the currents estimator 423 uses the estimated peak current i_{PK_EST} of Equation [6] to determine the secondary current i_SECONDARY delivered to the load 208 during the period TT of the control signal CS₂. The area beneath the secondary-side current i_SECONDARY represents the amount of charge delivered to the load 208. Equation [7] represents the amount of charge provided to the load 208 during the period TT of the control signal CS₂;

i

SECONDARY

=

Q

TT

=

1

2

×

i

PK

⁢

⁢

_

⁢

⁢

EST

×

T

⁢

⁢

2

TT

.

Equation

⁢

[

7

]

Q is the charge provided to the load 208, TT is the period of the control signal CS₂, i_{PK_EST} is the estimated peak value of the primary-side current i_PRIMARY as adjusted by the delay compensation factor DELAY_COMP, and T2 is the duration of the secondary-side current i_SECONDARY from the end of the period T1 until the secondary-side current i_SECONDARY decays to zero. Grisamore-He describes an exemplary system and method to determine the values of T2 and TT.

The currents estimator 423 provides a peak primary-side current target adjustment signal TARG_ADJ to the peak target current generator 425. In operation 312, the delay compensator 422 sets the next value of the target peak current value i_PTARGET(n+1) based on how the amount of secondary-side current i_SECONDARY provided to the load 208 as determined by Equation [7] compares to the targeted amount of secondary-side current i_{SECONDARY_TARGET}. The peak target current generator 425 increases the target peak current value i_{PK_TARGET}(n+1) if the comparison indicates a desired increase in the amount of energy provided to load 208 and decreases the target peak current value i_{PK_TARGET}(n+1) if the comparison indicates a desired decrease in the amount of current provided to the load 208. The peak target current generator 425 provides the next target peak current value i_{PK_TARGET}(n+1) to a digital-to-analog converter 426 to provide an analog version of the target peak current value i_{PK_TARGET}(n+1) to the comparator 418 for the next cycle of process 300. Thus, the target peak current value i_{PK_TARGET}(n+1) then becomes the current target peak current value i_{PK_TARGET} for use by the comparator 418. The peak target current generator 425 also provides the next target peak current value i_{PK_TARGET}(n−1) to the currents estimator 423 for use in conjunction with Equation [6].

FIG. 7 depicts an exemplary delay compensated and uncompensated comparison graph 700 using a ratio of the actual primary-side peak current “iPK_ACTUAL” to a peak primary-side current “iPK_TARGET” to determine the current provided to the load 208 having 9 LEDs and 3 LEDs. For the compensated primary-side peak current, iPK_TARGET represents the estimated peak current i_{PK_EST}. Because graph 700 depicts a ratio, the ideal value is 1 with less ideal values varying further from 1. The delay compensator 422, utilizing a post-detection delay compensation factor DELAY_COMP and the post-detection delay compensated estimated peak current i_{PK_EST} clearly results in a closer estimate of the peak value of the primary-side current i_PRIMARY. Having a close estimate can be particularly important in certain embodiments of the electronic system 300 such as in a multiple color, multiple LED lamp load 208 when precise provision of energy to the LEDs has a noticeable effect on the color of light produced by this embodiment of the load 208.

FIG. 8 depicts an electronic system 800, which represents another embodiment of the electronic system 300. The method of sampling the primary-side current i_PRIMARY is a matter of design choice. The electronic system 800 utilizes an auxiliary winding 802 to generate an auxiliary voltage V_AUX that is proportional to the secondary-side voltage V_S. Resistors 804 and 806 form a voltage divider to generate the current sense signal i_CS. The auxiliary current i_AUX flows through resistor 807 and diode 808 when the diode 808 is forward biased and charges capacitor 810 to generate the V_DD operating voltage for the controller 402.

Thus, an electronic system includes controller to control a switching power converter to provide power to a load. In at least one embodiment, the controller adjusts a detected target peak value with a post-detection delay compensation factor to generate a delay compensated current value that more accurately represents an actual peak current value associated with the current in the switching power converter. In at least one embodiment, the controller utilizes the delay compensated current value to determine an amount of current provided to the load and to determine a subsequent target peak current value.

Although embodiments have been described in detail, it should be understood that various changes, substitutions, and alterations can be made hereto without departing from the spirit and scope of the invention as defined by the appended claims.