Low level conversion system
阅读：324发布：2023-02-14
专利汇可以提供Low level conversion system专利检索，专利查询，专利分析的服务。并且Multiplexed analog signals are applied to the input of a sampling amplifier having a digitally controlled gain. The signals at the output of the sampling amplifier are applied to an analog to digital integrating converter. A phase lock oscillator is connected to a clock which controls the operation of the converter in such a manner that the integration time of the converter is equal to one or more cycles of the power line frequency, whereby maximum common mode rejection occurs at the power line frequency.，下面是Low level conversion system专利的具体信息内容。
1. A low level analog to digital conversion system powered by an alternating current, said system comprising: a. sampling amplifier means, an analog signal applied to an input of said sampling amplifier means; b. integrating converter means electrically connected to said sampling amplifier means for converting the analog signal at an output of said sampling amplifier means to a digital signal; and c. means electrically connected to said converter means for controlling the conversion time of said converter means, the integration time of said converter means being at least one cycle of the power line frequency; d. said means for controlling including: i. clock-control means electrically connected to said integrating converter means; and ii. phase lock oscillator means electrically connected to said clock-control means, said clock-control means governing the operation of said integrating converter means, said phase lock oscillator means controlling said clock-control means; e. said integrating converter means being a bipolar, dual slope integrating converter which includes: i. input means electrically connected to said sampling amplifier means; ii. current source means for providing a reference current; iii. voltage means for providing a reference voltage; iv. first switch means electrically connected to said clockcontrol means, said first switch means controlled by said clock-control means; v. second switch means electrically connected to said clockcontrol means, said second switch means controlled by said clock-control means; vi. integrator means operatively connected to said current source means through said first switch means and operatively connected to said input means through said second switch means; and vii. comparator means having at least two inputs, one of said inputs connected to said voltage source, the other of said inputs connected to said integrator, first switch, and second switch means; vIii. said integrator means charged to said reference voltage, said integrator means discharged through said second switch means and input means, said integrator means charged by said reference current through said first switch, said first and second switches having mutually exclusive states.
2. The system as claimed in claim 1, wherein said sampling amplifier and integrating converter means are floating.
3. The system as claimed in claim 2, said system including multiplexer means electrically connected to the input of said sampling amplifier means, said analog signal applied selectively to the input of said sampling amplifier means.
4. The system as claimed in claim 3 wherein said system includes: a. guard means positioned about said sampling amplifier and integrating converter means; and b. shielded cable means electrically connecting said multiplexer and sampling amplifier means, said analog signal applied selectively to the input of said sampling amplifier means via the lines of said shielded cable, the shield of said shielded cable connected to said guard means.
5. The system as claimed in claim 1, wherein said phase lock oscillator means includes means for generating a first signal, said first signal generating means electrically connected to said clock-control means, said first and second switch means being responsive to said first signal, the frequency of said first signal being equal to at least one cycle of said power line frequency.
6. The system as claimed in claim 5 wherein said power line frequency is 60Hz and the frequency of said first signal is 61.4KHz.
7. The system as claimed in claim 5 wherein said phase lock oscillator means includes means for generating a second signal, said second signal generating means electrically connected to said clock-control means, the frequency of said second signal being a multiple of the frequency of said first signal.
8. A low level analog to digital conversion system powered by an alternating current, said system comprising: a. sampling amplifier means, an analog signal applied to the input of said sampling amplifier means; b. integrating converter means electrically connected to said sampling amplifier means for converting the analog signal as at the output of said sampling amplifier means to a digital signal; and c. means electrically connected to said converter means for controlling the conversion time of said converter means, the integration time of said converter means being at least one cycle of the power line frequency; d. said sampling amplifier means including: i. amplifier means having an input and output; ii. first switch means, one side of said first switch means connected to the input of said amplifier means; iii. second switch means; one side of said second switch means connected to the input of said amplifier means; iv. capacitor means, one side of said capacitor means connected to the output of said amplifier means; v. third switch means, one side of said third switch means connected to the other side of said capacitor means, the other side of said third switch means connected to the other side of said second switch means; vi. said analog signal applied to the input of said amplifier means through said first switch means when said first switch means is energized; vii. said capacitor means charged to the offset voltage of said amplifier means when said second and third switch means are energized; viii. said second and third switch means having similar states, said first switch means and said second and third switch means having mutually exclusive states.
9. The system as claimed in claim 8 wherein said sampling amplifier means includes means for controlling the gain of said amplifier means.
10. The system as claimed in claim 9 including means for digitally specifying the gain of said amplifier means, said digital specifying means electrically connected to said means for controlling the gain oF said amplifier means.
11. A low level analog to digital conversion system powered by an alternating current, said system comprising: a. sampling amplifier means having input and output terminals, said input terminal adapted to receive an analog signal; b. integrating converter means electrically connected to said sampling amplifier means for converting the analog signal at said output terminal of said sampling amplifier means to a digital signal; c. clock means operatively connected to said converter means for controlling the conversion time of said converter means, the integration time of said converter means being an integral multiple of the power line frequency; and d. phase lock means operatively connected to said clock means, said phase lock means generating an output signal derived from the power line frequency, said output signal being independent of shifts in the power line frequency, said output signal operating to control said clock means.
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