Deadband amplifier circuit
阅读：497发布：2021-12-20
专利汇可以提供Deadband amplifier circuit专利检索，专利查询，专利分析的服务。并且There is disclosed an amplifier with an adjustable deadband in which the common mode range is widened and in which the deadband is made easily adjustable by adjustment of the current sources coupled to the collectors of an emitter-driven push-pull output stage of the amplifier.，下面是Deadband amplifier circuit专利的具体信息内容。
1. An adjustable deadband amplifier circuit, adapted for connection between a first and second power supply terminal, comprising: a. a differential amplifier, having a pair of input terminals for receiving an input voltage signal, a first output leg for conducting a first current output and a second output leg for conducting a second current output, the current imbalance between the first and second currents being proportional to the voltage difference between the input terminals; b. a differential-to-single-ended converter having an output terminal, the converter being electrically connected to receive the first and second current outputs for providing a single signal at the output terminal whose amplitude is representative of the current imbalance and the polarity of the voltage signal at each of the input terminals; c. current supplying and diverting means electrically connected to the output terminal of the converter, responsive to the single signal, to supply current to the converter when the amplitude of the single signal is below a prescribed level and to divert current from the converter when the amplitude of the single signal is above the prescribed level; and d. output means electrically connected to the current supplying and diverting means, responsive to the supplied current and the diverted current, for producing an output signal when either the supplied current or the diverted current exceed an adjusted value.
2. The current of claim 1 wherein the circuit supplying and diverting means further comprise: c. i. a first adjustable current source, electrically connected tO the first supply terminal; ii. a second adjustable current source, electrically connected to the second supply terminal; iii. a first current control electrically connected to the first current source for causing the first current source to provide the supplied current; and iv. a second current control electrically connected to the second current source for causing the second current source to provide the diverted current.
3. The circuit of claim 2 wherein the output means further comprise: d. i. a first output amplifier having an input control terminal connected between the first current source and the first current control, for providing an output signal when the supplied current is exceeded; and ii. a second output amplifier having an input control terminal connected between the second current source and the second current control for providing an output signal when the diverted current is exceeded.
4. The circuit of claim 2 wherein the differential-to-single-ended converter further comprises: b. i. an NPN transistor, having its collector connected to the second output leg, its emitter connected to the second supply-terminal and its base connected to the first output leg; and ii. a diode having its anode connected to the first output leg and to the base of the NPN transistor, and the other electrode connected to the supply terminal, the diode characteristic being matched to the NPN transistor characteristic to insure that the current flowing between the diode and the second supply terminal is equal to the current flowing between the NPN transistor and the second supply terminal.
5. The circuit of claim 3 wherein the differential-to-single-ended converter further comprises: b. i. an NPN transistor, having its collector connected to the second output leg, its emitter connected to the second supply terminal and its base connected to the first output leg; and ii. a diode having its anode connected to the first output leg and to the base of the NPN transistor, and the other electrode connected to the supply terminal, the diode characteristic being matched to the NPN transistor characteristic to insure that the current flowing between the diode and the second supply terminal is equal to the current flowing between the NPN transistor and the second supply terminal.
6. The circuit of claim 3 wherein the first current control is an NPN transistor and the second control is a PNP transistor, the output of the converter being connected to the emitters of the current control transistors, the collectors of the first and second current control transistors being connected respectively to the first and second adjustable current sources, and the bases of the first and second current control transistors being connected to a common bias point between the first and second supply terminal.
7. The circuit of claim 6 wherein the first output amplifier is a PNP transistor having its base connected to the collector of the first current control transistor and having its emitter connected to the first supply terminal, and wherein the second output amplifier is an NPN transistor having its base connected to the collector of the second current control transistor and having its emitter connected to the second supply terminal, the output signal being taken from the collectors of both output amplifier transistors.
8. The circuit of claim 7 wherein the common mode range of the circuit is increased by providing a bias voltage at the common bias point equal to the sum of the base-to-emitter voltage drops across the current control transistors.
9. The circuit as recited in claim 4 wherein said differential amplifier includes two PNP transistors, a pair of series coupled resistors coupled between the emitters of said last mentioned PNP transistors, and a current source coupled at one end to the mid point between said resistors and adapted to be coupled at its other end to the first supply terminal, the deadband of said circuit being adjusted by changing the value of the current generated by any of said current sources or by changing the resistance of said resistors.
10. The circuit as recited in claim 9 wherein the voltage differential at said input terminals at which an output signal is generated is given by the formula: where n constant of proportionality k Boltzman''s constant, T temperature in degrees Kelvin, ln natural log, IcA the current generated by either of the current sources coupled to the sides of said push-pull amplifier, said current sources generating equal currents, IcB the current generated by the current source associated with said differential amplifier, and R resistance of either of said resistors, said resistors having the same resistance.
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