Semiconductor integrated circuit
专利汇可以提供Semiconductor integrated circuit专利检索，专利查询，专利分析的服务。并且PURPOSE:To shorten an execution time for a computer largely in a CAD system for a layout by dividing and treating cell structure and an inter-cell wiring region and finally returning both to original states when preparing a master slice system IC. CONSTITUTION:A cell 1 is constituted while pairing a cell row 2 arranged in a row and an inter-cell wiring region 3 formed adjoined to the row 2, and one division array 7 is manufactured by disposing a plural pair of the cells 1. A division array wiring region 6 for wiring a plurality of the division arrays 7 is formed, and a wiring region 5 connecting the division arrays 7 and an I/O buffer group 4 is shaped, thus manufacturing a master slice system LSI. On the design, a signal wiring terminal to other arrays 7 or the buffer group 4 is mounted virtually to the array 7 as a terminal, which does not exist in the IC actually, and a signal terminal for the buffer group 4 is wired by using the virtual terminal. Divided states brought in this manner are returned to original states, and an execution time for a computer is reduced.，下面是Semiconductor integrated circuit专利的具体信息内容。
| 标题 | 发布/更新时间 | 阅读量 |
|---|---|---|
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| 一种方便进行发光单元拆卸的LED装饰路灯 | 2020-05-11 | 786 |
| 一种具有防水抗拉功能的接线端子 | 2020-05-08 | 439 |
| 一种小型漏电断路器 | 2020-05-11 | 471 |
| 一种石油钻机的井场防爆电路装置 | 2020-05-08 | 365 |
| 一种FPC连接器 | 2020-05-08 | 986 |
| 一种接地性良好的FPC连接器 | 2020-05-08 | 938 |
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