Master slice type integrated circuit
专利汇可以提供Master slice type integrated circuit专利检索，专利查询，专利分析的服务。并且PURPOSE:To contrive performance of high speed operation and high integration of master slice type IC by a method wherein two or more of internal fundamental cells having different gate lag time respectively are provided. CONSTITUTION:In the actual CMOS master slice type IC used, the parts which are operated at the maximum speed are the first stage FF of counting system, a clock drive and the like only which are the so-called input stage of a circuit or its circumferential circuit part. Accordingly, it is unnecessary to arrange all the fundamental cells having the same gate lag time, a fundamental cell 11 which can be operated at a high speed is arranged at the upper part and the lower part of the internal cell region, a reference fundamental cell 14 with which certain fundamental gate can be accomplished is arranged at the intermediate part, and the I/O block group 13 having an input-output buffer funcrtion is arranged on the circumference of a chip. According to this constitution, the high speed operation and the high integration of the master slice type IC can be accomplished.，下面是Master slice type integrated circuit专利的具体信息内容。
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| 同步方法 | 2020-05-08 | 825 |
| 一种电子设备 | 2020-05-13 | 98 |
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