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Production of insulated gate type field effect transistor

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专利汇可以提供Production of insulated gate type field effect transistor专利检索,专利查询,专利分析的服务。并且PURPOSE: To increase the scale of integration by depositing a gate oxide film of a width slightly winder than the channel region to be obtained on a semiconductor substrate and forming a channel stopper in the substrate under the gate oxide film by using a mask of a width smaller than this.
CONSTITUTION: After a thick filed insulation film 22 is formed to the end part of a P type Si substrate 21, a thin gate insulation film 22 is deposited in the window 23 surrounded by this. At this time, the width W
1 of the window 23 is made at W
1 = W
0 +α which adds a mask alignment error component α to the channel width W
0 to be obtained in the final. Next, a conductive layer 24 such as of Mo, low resistance polycrystalline Si or other is deposited on the film 22 and a T-form Si
3 N
4 film of a width slightly smaller than that of the layer 24 and extending of the film 22 is formed thereon. Thereafter, P type impurity ions are implanted into the film 22 of a narrow width exposed in the window 23 to form a P type channel stopper 27. The mask 25 is then removed by leaving the width (d) along and N
+ type source and drain regions 28, 29 are respectively diffusion-formed on both sides of the conductive layer 24 thereunder.
COPYRIGHT: (C)1979,JPO&Japio,下面是Production of insulated gate type field effect transistor专利的具体信息内容。

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