专利汇可以提供Master slice type semiconductor integrated circuit device and its manufacture专利检索,专利查询,专利分析的服务。并且PURPOSE:To obtain a device which is provided with a wiring pattern to by-pass a wiring-failure pattern, and can be easily manufactured in a short term, by forming a first layer wiring in a basic cell region as a fixed wiring, and forming a second layer wiring as a variable wiring capable of alternation according to the input-output circuit system applied to said basic cell region. CONSTITUTION:The title master slice type LSI is provided with the following; a master chip containing a basic cell region in which a plurality of basic cell rows 106 are arranged in a specified direction, and an input-output cell region, a first layer wiring and a second layer wiring. The first layer wiring 8 in the basic cell region is a fixed wiring formed on the master chip side. The second layer wiring in the basic cell region is a variable wiring capable of alternation according to the input-output circuit system applied to said basic cell region. A plurality of basic cells 104, 105 are arranged in the longitudinal direction of a master chip in the basic cell region, at specified intervals. A by-pass wiring region 40 having a previously set fixed-pattern is formed on a first layer between the basic cells 104, 105.,下面是Master slice type semiconductor integrated circuit device and its manufacture专利的具体信息内容。
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