专利汇可以提供Digital processor or analog signal专利检索,专利查询,专利分析的服务。并且PURPOSE: To reduce the required bit number of digital data by obtaining 2nd- order difference data representing a difference of the 1st-order difference of digital data comprising plural adjacent bits in the sampling order and converting the 2nd-order difference data into a minority bit digital data comprising plural bits less than the former plural bits.
CONSTITUTION: An A/D converter 6 consists of an A/D conversion IC6a of 8 bit parallel output and a JK flip-flop 6b. A microprocessor CPU7 controls the set/reset of a flip-flop 6b to control the sampling and holding of a sample- and-hold circuit 5. A CPU7 commands A/D conversion to the A/D converter 6 with a nearly constant time interval when recording is commanded from an operation board 12 to obtain the A/D conversion data (8 bit), it is subjected to 2nd order difference processing to generate normally 4 bit compression data and stored sequentially in an internal RAM. When the reproduction is commanded, a voice compression data (2nd-order difference data) stored in the internal RAM is read sequentially and subjected to composite processing to reproduce digital data (8 bit) corresponding to the A/D conversion data.
COPYRIGHT: (C)1986,JPO&Japio,下面是Digital processor or analog signal专利的具体信息内容。
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