首页 / 专利库 / 人工智能 / 语音触发器 / Clock abnormality detector

Clock abnormality detector

阅读:382发布:2021-02-04

专利汇可以提供Clock abnormality detector专利检索,专利查询,专利分析的服务。并且PURPOSE: To produce the signals that can control other circuits (for muting, etc.) by supplying the output signal of a PLL circuit to a delay circuit to sample the "0" level side of a clock of the output of the PLL circuit at the rise of the delayed clock of the delay circuit and sampling the "1" level side of the clock of the output of the PLL circuit after inverting the delayed clock to detect a clock abnormal position.
CONSTITUTION: A D type flip-flop 1 has its output that changes at a drop-out point and is held up to a normal position since the "0" level side of the output pulse (b) of a PLL circuit 2 is sampled at the rise of the output pulse loss of a delay circuit 3. While the output of a D type flip-flop 2 changes at a drop-out point and is held up to a normal position since the "1" level side of the output pulse of the circuit 2 is sampled at the rise of the output pulse (c) of an inverting circuit 4. These outputs are supplied to a synthesizing circuit 7 and a clock abnormality detecting signal is obtained. This detecting signal is supplied to a voice muting circuit 11, etc.
COPYRIGHT: (C)1986,JPO&Japio,下面是Clock abnormality detector专利的具体信息内容。

高效检索全球专利

专利汇是专利免费检索,专利查询,专利分析-国家发明专利查询检索分析平台,是提供专利分析,专利查询,专利检索等数据服务功能的知识产权数据服务商。

我们的产品包含105个国家的1.26亿组数据,免费查、免费专利分析。

申请试用

分析报告

专利汇分析报告产品可以对行业情报数据进行梳理分析,涉及维度包括行业专利基本状况分析、地域分析、技术分析、发明人分析、申请人分析、专利权人分析、失效分析、核心专利分析、法律分析、研发重点分析、企业专利处境分析、技术处境分析、专利寿命分析、企业定位分析、引证分析等超过60个分析角度,系统通过AI智能系统对图表进行解读,只需1分钟,一键生成行业专利分析报告。

申请试用

QQ群二维码
意见反馈