Manufacture of semiconductor devive containing gold wiring layer
专利汇可以提供Manufacture of semiconductor devive containing gold wiring layer专利检索，专利查询，专利分析的服务。并且PURPOSE: To avoid occurrence of the defect caused by the stage error part by forming the first metal layer before formation of the gold wiring, forming the gold wiring layer on the first metal layer with deformation of the side area through heat treatment and then forming the protective film.
CONSTITUTION: Oxide film 10 and nitride film 11 are drilled on N-layer 1 on P- type Si substrate, and platinum silicide film 12 is formed selectively at the opening part after coating of the Pt film and the heat treatment in Ar. Then Ti3 and Pt4 are laminated; film 4 is removed selectively via aqua regia at the ereas exept the electrode forming part; and gold thin film 14 is formed selectively on film 4 through electroplating. After this, gold wiring layer 7 is given the electroplating via resist mask 5 inside the layer, thus causing the eaves part to layer 7. Resist 5 is then re moved and layer 3 is etched and removed with use of layer 4 as the mask, and the heat treatment is given in H
2 at about 370°C. As a result, the eaves of layer 7 is turned into an arc from to secure a gentle contact angle to the foundation, and the cross-sectional form is improved for the gold wiring when Si
3 N
4 13 is coated. Thus, the occurrence of the defect caused by the poor coating of film 13
COPYRIGHT: (C)1979,JPO&Japio，下面是Manufacture of semiconductor devive containing gold wiring layer专利的具体信息内容。
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