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Low distortion signal oscillator

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专利汇可以提供Low distortion signal oscillator专利检索,专利查询,专利分析的服务。并且In an oscillatory signal generator circuit, exceptionally low distortion is ensured by the use of a transistor common to multiple feedback loops that causes gain to be compressed as a logarithmic function of amplitude. Changes in output impedance or loop length are compensated for or equalized by shifting the compression threshold as a function of line voltage.,下面是Low distortion signal oscillator专利的具体信息内容。

1. An oscillatory signal generator circuit comprising, in combination: a plurality of transistor amplifier stages connected in cascade; means including a first additional transistor connected in a first feedback loop between two of said stages for compressing amplifier gain as a predetermined function of amplitude; signal tuning means; means including a multifunction second additional transistor for supplying a relatively low impedance drive for said tuning means and for providing feedback to control the operation of said first additional transistor; an output point; and a feedback path connecting an electrode of said second additional transistor to said output point and thence to an input electrode of a transistor of one of said stages by way of said tuning means.
1. An oscillatory signal generator circuit comprising, in combination: a plurality of transistor amplifier stages connected in cascade; means including a first additional transistor connected in a first feedback loop between two of said stages for compressing amplifier gain as a predetermined function of amplitude; signal tuning means; means including a multifunction second additional transistor for supplying a relatively low impedance drive for said tuning means and for providing feedback to control the operation of said first additional transistor; an output point; and a feedback path connecting an electrode of said second additional transistor to said output point and thence to an input electrode of a transistor of one of said stages by way of said tuning means.
2. An oscillatory signal generator comprising, in combination: an amplifier including a plurality of single transistor stages connected in cascade; means including a first feedback path between a junction point common to an electrode of each of two of said transistors and an input electrode of another one of said transistor stages for compressing the gain of said amplifier as a predetermined function of amplitude, said path including the collector-to-emitter path of a first additional transistor; a generator output point; a second feedback path connecting the output electrode of one of said two transistors to the input electrode of said last named transistor by way of the base-to-collector path of said first additional transistor; signal tuning means; a third feedback path connecting said last named output electrode to the input electrode of the input one of said single transistor stages by way of said signal tuning means; and means connecting said output electrode to said output point.
3. Apparatus in accordance with claim 2 including a fourth feedback path connecting two of said stages.
4. Apparatus in accordance with claim 3 wherein said input one of said transistor stages is connected in emitter-follower configuration thereby providing a level shifting function of one base-to-emitter voltage drop, multiplication of input impedance and a limitation on bias current flowing through said signal tuning means.
5. Apparatus in accordance with claim 2 wherein said stages include an input emitter-follower stage, followed by second, third and fourth common emitter stages, and a fourth feedback path including a resistive element connecting the emitter electrodes of said second and fourth common emitter stages.
6. Apparatus in accordance with claim 5 including a first capacitive element connecting the collector and base electrodes of the transistor of said third stage and a second capacitive element connecting the collector electrode of said fourth stage to the common junction of the emitter electrodes of said third stage and of said first additional transistor.
7. Apparatus in accordance with claim 3 including a reference potential terminal and an output transistor having its collector-emitter path connected between said output point and said reference potential terminal.
8. Apparatus in accordance with claim 7 including an equalizer circuit in parallel relation to said collector-emitter path of said output transistor, said equalizer circuit comprising a path including a resistor and a plurality of series connected diodes shunting said last named collector-emitter path, an equalizer transistor having its collector-emitter path connected between one terminal of said last named resistor and said reference potential terminal, and means connecting a terminal of one of said diodes to the base electrode of said equalizer transistor.
9. An oscillatory signal generator comprising, in combination: an input point, an output point, and a point of reference potential; a plurality of transistors each having its collector-emitter path connected between said output point and said point of reference potential; an input transistor having its emitter electrode connected to the base electrode of a first one of said plurality of transistors, its base electrode connected to said input point, and its collector electrode connected to said output point; signal tuning means; a first feedback path including said tuning means connected between the emitter electrode of a fourth one of said plurality of transistors and said input point; a second feedback path including a resistive element connected between a first and a third one of said plurality of transistors; a third feedback path including the collector-emitter path of an additional transistor connected between the emitter electrode of a second one of said transistors and a junction common to the collector of said third transistor and to the base of said fourth transistor, said additional transistor effecting gain compression of said signal as a predetermined function of amplitude; and a fourth feedback path including a resistive element and the base-collector path of said additional transistor connected between the emitter and base of said fourth transistor; a fifth one of said transistors being an output stage having its base electrode connected to the emitter electrode of said fourth transistor.
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