JPS528141B2 - |
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| 申请号 | JP9997672 | 申请日 | 1972-10-06 | 公开(公告)号 | JPS528141B2 | 公开(公告)日 | 1977-03-07 |
| 申请人 | 发明人 | ||||||
| 摘要 | Analog input information is compacted by a differential encoding process that anticipates abrupt transitions in signal levels and initiates compensatory action in time to prevent the encoded representations of such transitions from being shifted out of phase due to slope overload. Digitized analog signal representations which are to be encoded are first passed through a shift register having L stages, the number L signifying the amount of "lookahead", i.e., the number of sampled analog elements that are to be analyzed as a group prior to encoding. The contents of the shift register at any instant will furnish the "history" of variations in the respective levels of the first L signal elements which currently await encoding. By a judicious interpretation of this history, the system is able to select an optimal encoded bit pattern which would most nearly represent in compact digital code form the apparent trend of these variations, and the leading bit or bits of this pattern will be fed out by the encoder. The optimal bit pattern is continually updated as the makeup of the lookahead code group changes. By anticipating rapid changes of level, the phase shift of elements having highly contrasting levels is avoided. | ||||||
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