Method and apparatus for compressing LUT |
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| 申请号 | US15098904 | 申请日 | 2016-04-14 | 公开(公告)号 | US09864699B1 | 公开(公告)日 | 2018-01-09 |
| 申请人 | Marvell International Ltd.; | 发明人 | Wei Xu; Fei Sun; Ka-Ming Keung; Jinjin He; Young-Ta Wu; Tony Yoon; | ||||
| 摘要 | Aspects of the disclosure provide a circuit that includes a memory circuit and a controller circuit. The memory circuit is to have a look-up table (LUT) that associates logical address used in computation with physical address used in storage space. The LUT includes a first level LUT with first level entries corresponding to logical addresses, each first level entry includes an indicator field and a content field, and the indicator field is indicative of a compressible/non-compressible attribute of a physical address associated with a logical address. The controller circuit is to receive a logical address, and translate the logical address into a physical address associated with the logical address based on the LUT. | ||||||
| 权利要求 | |||||||
| 说明书全文 | |||||||
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