MEMORY CONTROLLER, MEMORY SYSTEM, AND CONTROL METHOD

申请号 US15693585 申请日 2017-09-01 公开(公告)号 US20180152207A1 公开(公告)日 2018-05-31
申请人 Toshiba Memory Corporation; 发明人 Daiki WATANABE;
摘要 A memory controller according to an embodiment includes a memory interface that reads out a received word from a non-volatile memory and a decoder that performs bounded distance decoding for the read received word. The decoder sets rm (rm is a natural number equal to or larger than 1) symbols of a plurality of symbols constituting the received word, as options of symbol positions at each of which an error is assumed, generates a test pattern in which m (m is a natural number equal to or larger than 1 and equal to or smaller than the rm) symbols of the rm symbols are objects of rewriting, generates test hard-decision values by rewriting each of hard-decision values of the m symbols that are objects of rewriting in the test pattern, among the symbols, and performs bounded distance decoding for the test hard-decision values.
权利要求
说明书全文
QQ群二维码
意见反馈