Transmission system of serial binary code |
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| 申请号 | JP14259179 | 申请日 | 1979-11-02 | 公开(公告)号 | JPS5666950A | 公开(公告)日 | 1981-06-05 |
| 申请人 | Fujitsu Ltd; | 发明人 | YAMAMOTO MASAHARU; | ||||
| 摘要 | PURPOSE:To reduce the amount of code setting work, by selecting arbitrary m-sets out of 2 types of n-digit serial binary codes and transmitting them serially in the designated order. CONSTITUTION:A 4-digit serial binary code generating circuit FC repetitively outputs 4-bit signals to 16 output terminals O-F based on the clock CL from the clock pulse generating circuit CG. A multiplexer Mx transmits the signal in 4-bit fed to 16 sets of input terminals 0'-15' based of the selection signal sequentially in serial via a flip-flop FF. Accordingly, by arbitrarily connecting the input terminals 0'-15' to the output terminals O-F of FC, in case of Figure, the binary codes having 64-bit arbtrary pulse patterns can be transmitted. | ||||||
| 权利要求 | |||||||
| 说明书全文 | |||||||
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