摘要 |
A semiconductor memory device may include a memory core unit including a plurality of memory cells suitable for storing data, an error correction code (ECC) control unit suitable for detecting an error of the data to output a flag signal corresponding to a result of detection of the error, and an address control unit suitable for adjusting a refresh interval of at least one memory cell that stores data in which the error is detected, or repairing the memory cell among the memory cells, in response to the flag signal. |