Decoding circuit for inhibiting error propagation |
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| 申请号 | EP90120169.9 | 申请日 | 1990-10-20 | 公开(公告)号 | EP0450148A3 | 公开(公告)日 | 1992-03-11 |
| 申请人 | MITSUBISHI DENKI KABUSHIKI KAISHA; | 发明人 | Iwane, Yasushi, c/o Mitsubishi Denki K. K.; | ||||
| 摘要 | A decoding circuit in the invention receives signals encoded in differential logical conversion, and decodes it into an original signals. During the decoding, a bit position of known data included in the original signals in the received signal is detected, and also the known data is forcedly set to the bit position of the decoded signal, thereby spread of bit error is suppressed up to the position of the known data. | ||||||
| 权利要求 | |||||||
| 说明书全文 | |||||||
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