Converting circuit |
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| 申请号 | JP5583481 | 申请日 | 1981-04-14 | 公开(公告)号 | JPS57170626A | 公开(公告)日 | 1982-10-20 |
| 申请人 | Nippon Denso Co Ltd; | 发明人 | NAKAMURA TETSUYA; YASUURA NOBUSHI; SHIOZAKI MAKOTO; OGISO HARUHIKO; SAKA MITSUHIRO; ISHII MIYA; | ||||
| 摘要 | PURPOSE:To use parts, which are used for an A/D and a D/A converter, in common and to decrease the number of the parts by using an I/O port, a buffer and a resistance ladder for the D/A converter when they are not used for the A/D converter. CONSTITUTION:This converting circuit normally operates as a D/A converter. In this case, the port 111 of an I/O port 11 has a level LOW, an analog switch 24a is cut off, and an analog switch 24b is closed. Therefore, digital data outputted from the port 11 is passed through a buffer 12 and a resistance ladder to be converted into analog data, which is outputted to a terminal 131 and then applid to an integrating circuit 26 as a sample holding circuit through the switch, so that it is outputted to an analog data output terminal 271 through a voltage follower circuit 27. When a computer requires the analog data, the port 11 is held at a high level to turn the switch 24a on and to turn the switch 24b off. Consequently, the converting circuit operates as an A/D converter. | ||||||
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| 说明书全文 | |||||||
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