Integrated parallel type a/d converter circuit |
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| 申请号 | JP18051681 | 申请日 | 1981-11-11 | 公开(公告)号 | JPS5881327A | 公开(公告)日 | 1983-05-16 |
| 申请人 | Nec Corp; | 发明人 | TAKAHASHI KAZUKIYO; | ||||
| 摘要 | PURPOSE:To prevent fluctuation in comparison voltage for A/D conversion, and to improve precision, by providing an array of resistance elements for D/A conversion besides an array of resistance elements for A/D conversion. CONSTITUTION:When a signal is applied to an input terminal 1, a voltage from a reference voltage source is divided through an array of resistances R1-Rn+1 and a comparison voltage is compared by comparators C1-Cn and encoded by an encoding circuit 30 through AND circuits L1-Ln; and a voltage from a reference voltage source 12 is divided through an array of resistance R1,1- R1,n+1 to obtain voltages, which are switched by transfer gates S1-Sn to obtain a D/A conversion output at an output terminal 2. Thus two resistance arrays are provided independently, so fluctuation in comparison voltage for A/D conversion is prevented to improve precision. | ||||||
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| 说明书全文 | |||||||
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