Sampling system |
|||||||
| 申请号 | JP8383180 | 申请日 | 1980-06-20 | 公开(公告)号 | JPS5710528A | 公开(公告)日 | 1982-01-20 |
| 申请人 | Toshiba Corp; | 发明人 | ENDOU KENJIROU; KITAGAWA KAZUO; KIRA EIJI; | ||||
| 摘要 | PURPOSE:To perform optimum control for the sampling rate according to the slope of signals, by adding a slope detector. CONSTITUTION:An analog input signal applied to an input terminal 51 is inputted to a sampling circuit 52 and a slope detector 53. The sampling circuit 52 samples input signals every time when clock pulses are given from a clock oscillator 54 and outputs the sampled series to an output terminal 55. A slope detector 53 detects the slope of an input signal to the circuit 52 and outputs a signal having the level corresponding to the slope, and the output is given to the clock oscillator 54 as a control signal. The clock oscillator 54 consists of a VCO, and the oscillated frequency is controlled with the output of the slope detector 53 so that the interval of clock pulses applied to the circuit 52 is smaller with greater slope of the input signal. | ||||||
| 权利要求 | |||||||
| 说明书全文 | |||||||
QQ群二维码
意见反馈
意见反馈