Signal processor |
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申请号 | JP33139188 | 申请日 | 1988-12-27 | 公开(公告)号 | JPH02174422A | 公开(公告)日 | 1990-07-05 |
申请人 | Mitsubishi Electric Corp; | 发明人 | KATO HISAO; ADACHI YASUSHI; | ||||
摘要 | PURPOSE: To obtain an output without noise by revising a processing mode of a data processing unit when an output of a D/A converter is completely attenuated so as to bring an output of the D/A converter into a complete attenuation state while an output data of the data processing unit is unstable. CONSTITUTION: Suppose that an output data C of a data processing unit is unstable for a time between '0' and t7 at application of power. As soon as power is applied, a signal Z is supplied from a power application confirming circuit 50 11B, which starts counting in response to the signal Z and supplies a signal 12 to a current control signal generating circuit 12 when the count for times of 0-t7 is counted out. The circuit 12 supplies an attenuation release signal K to a switch 20 in response to the signal 12. The circuit 12 responds to the attenuation release signal K and is selected to the position of a prediction device 14 for the normal operation. Since an analog signal D is in the completely attenuated state for times 0-t7 after application of power till a data C is made stable in such a way, a noise caused by an unstable data C is not generated. COPYRIGHT: (C)1990,JPO&Japio |
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