Electronic musical instrument

This inventicn relates to electronic musical instruments, and particularly to expandable arrangements of sound generating systems.

Description of the prior art

Electronic musical instruments utilizing a generator assigning system has been manufactured recently. The generator assigning system has fewer sound generator channels than number of keys in the keyboard. A generator assigner scans the keys and detects newly depressed keyswitch or keyswitches The generator assigner searches for a vacant sound generator channel that is not in use, has the vacant one generate a musical sound signal having pitch of the newly depressed keyswitch. When the generator as signer detects that the keyswitch is released, then the sound generating channel assigned to the keyswitch becomes a vacant channel.

In the generator assigner system, the number of sound generating channels can be only ten or so, each of the sound generating channels can be complicated for generating a wide variety of sound qualities. On the other hand, the generator assigner must know of keyswitch operation as soon as possible and must execute complicated generator assigment decisions and must manage tone generation in the sound generating channels.

Objects of invention

Therefore, an object of the present invention is to provide a system in which a generator assignor can manage the sound generating channels simply and in a short time, and can execute tasks other than the generator assignment.

Another object of the present invention is to provide a sound generating system which can be used in parallel form for expanding a variety of musical sounds.

Brief description of Figures

• Fig. 1 is a block diagram of an embodiment of an electronic musical instrument of the present invention;
• Fig. 2 is timing charts of data signals output from a control block;
• Fig. 3 is a detailed block diagram of a sound generating block;
• Fig. 4 is an emboeiment of an octave selector;
• Fig. 5 is an embodiment of an envelope generator circuit;
• _Fig. 6 is an example of envelope signals;
• Fig. 7 is a block diagram of another embodiment of the electronic musical instrument of the present invention; and
• Fig. 8 shows timing diagrams of block selecting data, channel selecting data and timbre data.

Description of the preferred embodiments

Referring to Fig. 1, a keyboard 1 has plural keyswitches. Envelop selecting switches (ESSW) 2 is composed of switches for selecting envelope characteristics. A control block 3 is composed of a generator assigner and an envelope data generating block.. The generator assigner detects depressed states of the keyboard 1, and assigns the depressed keys to plural sound generating channels. Any newly detected key is assigned to a vacant sound generating channel. The generator assigner sends key on/off data representing whether the key is depressed or not, note data and octave data representing the pitch of the note designated by the keyswitch to a sound generating block 8. The envelope data generator in the control block 3 detects on/off states of the envelope selecting switches 2 and sends envelope data representing these states of the envelope selecting switches .2 to the sound generating block 8. Fundamental function of the generator assigner is known by Japanese patent JP54-41497. The control block 3 can be achieved by using a micro computer such as Intel 8049.

A master clock generator 4 generates a master clock signal. An initial clear pulse generator (ICRG) 5 generates an initializing signal for the total system when a power supply voltage is applied to this system.

A top octave synthesizer (TOS) 6 divides the master clock signal and generates twelve scale signals of the highest octave of the musical scale. A timing pulse generator (_TPG) 7 generates timing pulses for phase synchronization. The sound generating block 8 receives the key on/off data, note data, octave data and envelope data from the control block 3 and generates desired musical sound signals according to these data. A latch 9 memorizes an address datum for channel selection. A decoder 10 decodes the address data to respective decoded lines to select respective sound generating channels TG₀, TG_l, ....., TG₇, an envelope data latch 11 and a mono-tone generator channel (MTG) 12.

These channel selecting latch 9 and the envelope data latch 11, can be any memory means to store the channel selecting data and the envelope data. The mono-tone generator 12 can generate different sound signals from the TG₀, TG₁, ....., TG₇. AND gate 13 receives a decoded signal S₈ and writing signal, and generates a clock signal for latching the envelope data in the envelope data latch 11. A musical tone synthesizer 14 is equipped for the mono-tone generator 12. This musical tone synthesizer 14 modulates in amplitude an output signal of the mono-tone generator 12 and synthesizes. a timbre. A tone filtering section 15 receives output signals from the sound generating channels TG₀, TG₁, ..., TG7 and changes the output signals to musical signals having desired timbre. An amplifier 16 and a loudspeaker 17 transduce the musical signals to sounds.

In the following descriptions, eight sound generating channels are provided. When a power supply voltage is applied to the system, ICRG 5 generates the initial clear pulse and initializes the control block 3, the TOS 6, the TPG 7 and the sound generating block 8.

Fig. 2 shows timing charts of data signals send from the control block 3 to the sound generating block 8. Referring to Fig. 2 (a), channel selecting data designating one of the sound generating channels TG₀, TG₁, ....., TG₇ are transmitted first, and after that timbre data are transmitted to the sound generating channel designated by the channel selecting data. The timbre data represent a note and octave nave of the depressed keyswitch. Fig. 2(b) shows a timing chart of an envelope data transfer. First, channel selecting data designating the latch 11 are transferred, and then the envelope data determining envelope characteristics of the sounds are transmitted to the latch 11. Fig. 2(C) shows a timing chart of mono-tone data transfer. Channel selecting data which designate the MTG channel 12 are transmitted to the latch 9, and then the mono-tons data defining the characteristics of the mono-tone are transmitted to the MTG channel 12 through A/D bus line.

The control block 3 outputs a channel selecting . data writing pulse (CSDW signal) through the ALE line and a data writing pulse (DATW signal) through the WR line. The CSDW signal synchronizes with the channel selecting data designating the TG₀, TG₁, ....., TG₇, the latch 11 and the MTG channel 12. The CSDW signal synchronizes with the timbre data, the envelope data and the mono-tone data.

After the initialization is done, the control block 3 begins to scan the keyboard 1 and the ESSW 2, and detects on/off states of the keyswitches and ESSW 2. The control block 3 outputs the channel selecting data through A/D bus line and the CSDW signal through ALE line. The channel selecting data are memorized in the latch 9 at the transition from "1" to "0" level of the CSDW signal. The channel selecting data in the latch 9 are applied to a decoder 10. The decorder 10 outputs selecting signal from S₈ terminal only. An output signal of S₈ is "1" and output signals from the remaining output terminals of the decoder 10 become "0". Therefore, output of the AND gate 13 is determined by the _DATW signal from the WR line of the control block 3. Then, the A/D bus line outputs envelope data and the WR line outputs the DATW signal. The DATW signal is applied to a CK terminal of latch 11 through AND gate 13. The envelope data on the A.D bus line are memorized in latch 11 when the DATW signal changes from "1" to "0" level. The envelope data memorized in latch 11 are distributed to terminals ECD in the sound generating channels TG₀, TG₁, ....., TG₇.

Referring to Fig. 1, a key KC₁ in the keyboard 1 has a note name of C and the lowest octave. When a key, for example the key KC₁, is depressed, the control block 3 detects it and designates the key KC₁ to a vacant sound generating channel TG_O, TG₁, ..... TG₇. After an assigning decision is done in control block 3, it puts out channel selecting data and the timbre data in accordance with the timing shown in Fig. 2(a). First, the control block 3 outputs the channel selecting data designating the vacant channel on the A/D bus line and has latch 9 memorize the channel selecting data at transition of the CSDW signal from "1" to "0" level. The decorder 10 designates the vacant channel by channel selecting data in latch 9. If the vacant channel were TG_O, the decoded line S₀ becomes "1" and the remainder of the decoded lines are "0". After that, the control block 3 puts out the timbre data through A/D bus line and has the sound generating channel TG₀ memorize the timbre data at a transition of DATW signals on the WR line from "1" to "0" level.

After the sound generating channel TG₀ receives the timbre data, the TG₀ selects a top octave signal C out of twelve top octave signals from TOS 6 in accordance with note data. The selected top octave signal C is devided by an octave divider. The octave divider generates C signals of the entire musical range. The octave data in the timbre data select the C signal or C signals having preferable octave or octaves. The key on/off data and the envelope data generate an envelope signal. The envelope signal modulates the selected C signal or C signals in amplitude. The modulated C signal or C signals are put out from OUT terminal of the TG₀.

When the key KD1 is depressed, then another vacant channel, for example the TG₁, is designated and the TG1 generates a D signal or D signals.

The mono-tone generator channel 12 is equippped for generating musical signals of the highest key among the keys depressed simultaneously. The control block 3 detects the name of the highest key depressed and sends out mono-tone data through the A/D bus line to the mono-tone generator channel 12. First, the control block 3 sends channel selecting data through the A/D bus line to latch 9 and has latch 9 memorize the channel selecting data at the CSDW signal's negative transition. The decoder 10 designates the mono-tone generator channel 12 by outputting "1" on the 5₉ line. After that, the control block 3 puts out mono-tone data through the A/D bus line and has the mono-tone generator channel 12 memorize the mono-tone data at the DATW signal's negative edge. The mono-tone data length is long, so it is divided into three segments.

Each of the segments is transmitted by designating decoded lines S₉, S₁₀ or S₁₁, respectively. The mono-tone data is composed of key on/off data and divisor data. The key on/off data represent the highest key depressed is in an on state or not. The divisor data represent frequency of the name of the key and is an integer number inversely pro_- portional to the frequency approximately. When the mono-tone data are memorized in the mono-tone generator channel 12, a KD terminal in the mono-tone generator channel 12 puts out key on/off data. The master clock signal MC is divided by the divisor data and put out from the OUT terminal as a scale signal. A programmable divider can be used for dividing the master clock signal MC by the divisor data.

The following describes formats of various data.

[Channel selecting data]

The channel selecting data are composed of 4 bits and are put out on the lower 4 bits line of the A/D bus line. A Table 1 shows relations between the data and channels to be selcted. The latch 12 in the Table 1 means that three latches are contained in the mono-tone generator channel 12.

[Timbre data)

The timbre data are 8 bits data and are put out on the A/D bus line. A table 2 shows data format. Upper ₄ bits AID ~ _A/D₇ represent note data ND₁~ ND₄ .

The 4th bit A/D₃ is the key on/off data KD. Lower 3 bits A/D₀ ~ A/D₂ are the octave data OD₁ ~OD₃. Relations between the note data ND₁ ~ ND₄ and the note name are tabu- _lated in Table 3. Relations between the octave data OD₁ ~ OD₃ and the octave name are tabulated in Table 4. The key on/off data KD is "1" when the key is depressed and is "0" when the key is not depressed.

Fig. 3 shows an example of the sound generating channel TG. Referring to Fig. 3, a latch 18 is an 8 bits latch for memorizing the timbre data sent to data terminal D₀ ~D₇. D₀ ~ D₂ are for the octave data, D₃ is for the key on/off data and D₄ ~ D₇ are for the note data. A latch 19 stores output signals of the latch 18 at a negative edge of an internal clock signal coming through a NAND gate 24. The internal clock signal is an output of an AND gate 36 and is produced by timing pulses from TPG 7.

The note data (output Q₄ ~ Q₇ of latch 19) are applied to a note selector 20. The note selector 20 selects one of the twelve top octave signals applied by TOS 6. The note selector can be embodied by using well-known data selector integrated circuits. One of the decoded lines of the decoder 10 (SEL) and the WR line are coupled to a NAND gate 21. The NAND gate 21 puts out a latching clock signal through an inverter 22 and an AND gate 23 to latch 18. 54 are phase synchronizing circuits so that output signals of plural sound generating channels become in phase to each other when the same note name is designated to these channels. This function is not related to the present invention, so detailed explanations are omitted.

Presettable counter (PFF) 55~60 compose an octave divider. When "1" is applied to a terminal P, a datum applied to a terminal D is stored and is put out from an output terminal Q. When "1" is applied to a terminal R, the output terminal Q puts out "0" and stores it. Every time the clock signal on a CK terminal changes from "1" to "0", terminal Q inverts its (Q's) output level. Frequency f of the output signal of the note selector 20 is devided by the octave divider 55~60. Frequencies of the output signals of PFF 55~60 become as follows.

An octave selector 61 receives output signals of note selector 20 and the PFF 55~60 as input signals and selects input signals in accordance with the octave data applied to A, B and C terminals. Fig. 4 shows an embodiment of the octave selector 61. Referring to Fig. 4, each of data selectors 64 ~ 48 can select one input signal of D₁~D₇ and put out from Z in response to control code (A, B, C). Relations between the octave data (A, B, C) and frequencies of the output signals O₁~O₅ of the octave selector 61 are tabulated in Table 5.

An envelope signal generator 62 generates the envelope signal inaccordance with the envelope data ECD applied from latch 11 and the key on/off data applied by the output Q₃ of the latch 19. Fig. 5 is a circuit diagram of an embodiment of the envelope generator 62. Referring Fig. 5, analog switches 73, 74 and 75 become ON when "1" is applied to terminals C and become OFF when "0" is applied to the terminals. 69, 70 and 71 are AND gates. R₁ ~ R₄ are resistors. D₁ is a diode. C is a capacitor. Vsus is a voltage source determining a sustain time:

The envelope data ECD are memorized in the envelope data latch 11 and applied to the respective envelope generator 62 in the sound generating channel (one of: TG₀, TG₁, ..... TG₇). The envelope data is composed of 3 bits, that is AT₁, AT₂ and SUS. These data are applied to the AND gates 69, 70 and 71. The envelope generator 62 generates 6 kinds of envelope signals, as shown in Fig. 6, in accordance with the key on/off data signal applied to a IN terminal.

[A] At a positive transition of the key on/off data

The AND gate 70 outputs "1" and the analog switch 74 becomes ON state. The capacitor C charges up through the analog switch 74 and R₂. An output signal build up like Fig. 6-(1) .

The AND gate 69 puts out "1" and the analog switch 73 becomes ON. The capacitor charges up through R₁ and R₂ in series. Because R₁ > R₂, the output signals build up slowly than Fig. 6-(l), like Fig. 6-(2).

[B] At a negative transition of the key on/off data

The AND gates 69, 70 and 71 put out "0". The analog switch 73, 74 and 75 become OFF. Charge in the capacitor C is discharged through R₃, D₁ and R₄. The output signal is as Fig. 6-(4), (5), (6). Discharging time can . be controlled by the voltage of V_sus.

The AND gate 71 puts out "1" and the analog switch 75 becomes ON. Charge in the capacitor C is discharged through R₂ and the analog switch 75 quickly. The output signal becomes as Fig. 6-(3).

Referring to Fig. 3, keyer gates 63 receive the scale signal O₁ ~ O₅ from the octave selector 61. Each of the keyer gates modulates the scale signal by the envelope signal applied to a terminal Vc. The keyer gates can be well-known sustain gates or amplitude modulator circuits.

Fig. 7 shows another embodiment of the present invention. Referring to Fig. 7, plural sound generating blocks 80, 81 and 82 are provided. Each of the sound generating blocks 80, 81 and 82 is the same as the sound generating block 8 shown in Fig. 1 and can produce several envelope shapes such as those ahown in Fig. 6. A latch 76 memorizes block selecting data which designate one of the sound generating blocks 80, 81 and 82.

When some key in the keyboard 1 is depressed, the control block 3 selects one of the sound generating blocks and searches for a vacant sound generating channel in the sound generating block. When the sound generating block and the vacant channel in the block are chosen in control block 3, it puts out the block selecting data and the channel selecting data through the A/D bus line. The CSDW signal is also put out from the ALE terminal as shown in Fig. 8. At a negative edge of the CSDW signal, the block selecting data are latched in latch 76 and the channel selecting data are latched in latch 9 of the sound generating blocks 80, 81 and 82.

The data format of the block selecting data is shown in Table 6. Referring to Table 6, the block selecting data have 3 bits of A/D₄ to A/D₆. The channel selecting data have 4 bits of A/D₀ to A/D₃, as shown in the Table 1. Therefore, these two data can be memorized in the latch 76 and the latch 9 independently and simultaneously. The block selecting data in latch 76 select only'one of the AND gates 77, 78 and 79. Relations between the block selecting data and a block to be selected are shown is the Table 6. For example, A/D₄="1", A/D₅="0", A/D₆="0" will select the AND gate 77, therefore the DATW signal on the WR line can be applied to the sound generating block 80.

After the block selecting data and the channel selecting data are memorized, then the timbre data are put out on the A/D bus line with the DATW signal on the WR line from the control block 3, as shown in Fig. 8. The negative transition of the DATW signal is transmitted to the sound generating block 80 through the AND gate 77, and the timbre data are memorized in the sound generating channel of block 80. The timbre data are composed of note data, key on/off data and octave data. The sound generating channel memorises these data and can produce a scale signal appointed by the timbre data, as explained with Fig. 1 and Fig. 3.

In the Table 6, every bit of the block selecting data is distributed to every sound generating block. So, the three bits can handle 3 blocks simultaneously. 8 blocks can be handled by representing the blocks by three bit code.

The envelope data and the mono-tone data can be sent to respective sound generating blocks as well as timbre data. Referring to Fig. 8, the channel selecting data should be data designating the envelope data latch 11 or the MTG 12 and the timbre data should be changed to the envelope data or the mono-tone data.

Referring to Fig. 1 and Table 1, the sound generating channels TG_O, TG₁......, TG₇ and the envelope data latch 11 and the MTG channel 12 are arranged in order and can be designated by a single channel selector, which is latch 9 and decoder 10, in 4 bits code. The channel selector can be divided into two parts. One is a channel selector for selecting sound generating channels and the other is a latch selector for selecting the control data latch (or the envelope data latch 11). The envelope data is one item of the control data defining quality of timbre. Depth of phase modulation, mixing ratio of plural feet or characteristics of tone filters can be other items of the control data.

The latch selector can be embodied with a latch selecting data latch and a control latch decoder connected to the latch selecting data latch. 'The channel selector also can be achieved by using a channel selecting data latch and a channel decoder connected with the channel selecting data latch.

An electronic musical instrument of the present invention has plural keyswitches, generator assigner, plural sound generating channels and a channel selector. The generator assigner is contained in the control block 3 and scans the keyswitches, detects the depressed keyswitch or keyswitches, assigns these keyswitches to vacant sound generating channels. After that, the generator assigner sends the channel selecting data for designating the assigned channel and timbre data representing the pitch of the keyswitch detected. The channel selecting data are sent to the channel selector and are memorized in that. The channel selector is composed of latch 9 and decoder 10 and designates one of the sound generating channels. The timbre data are sent to the designated sound generating channel and are memorized therein. The sound generating channel can produce a musical sound signal having pitch defined by the timbre data. When the keyswitch is released from depression, the timbre data representing that the key is released (the key on/off data of "0") is sent to the sound generating channel. The sound generating channel stops the generation of the musical sound signal.

The control block 3 must send new data when the keyswitches or the envelope selecting switches change their state. Whe the states do not change, the control block 3 does not have to send new data to latch 9 and the sound generating channels. Therefore, the control block 3 can have ample time to do tasks other than generator assignment and envelope characteristics management.

An electronic musical instrument of the present invention comprises, plural keyswitches, control switches designating timbre such as envelope, a control block, a latch selector, at least one control data latch, a channel selector and plural sound generating channels. The control block scans the ke^yswitches and the control switches, detects states of the keyswitches and the control switches or alterations of their states. The control block sends channel selecting data and timbre data to the channel selector and the sound generating channels and further sends latch selecting data and control data to the latch selector and the control data latch, respectively. The channel selector, the sound generating channels, the latch selector and the control data latch have means for memorizing the channel selecting data, the timbre data, the latch selecting data and the control data respectively. Therefore, the control block can put out any timbre or control data to have the sound generating . channels produce favorite musical sound signal. After putting out these data, the sound generating channels produce the musical sound signals continuously, so the control block can execute other tasks such as generation of automatic rythm beat, automatic accompaniment timing pulse and so forth.

An electronic musical instrument of the present invention comprises a plurality of sound generating blccks and a block selecting means in addition to the above. Each of the sound generating blocks has a channel selector, latch selector, control data latch and sound generating channels. The control block puts out block selecting data to the block selecting means and designates one of the sound generating blocks. After that, the control block sends channel selecting data, timbre data and control data to the designated sound generating blocks. The plural sound generating blocks can be the same as each other. That is the number of sound generating blocks can be changed in accordance with specifications of musical instruments. The most simple specification installs one sound generating block. Complicated specifications demand many blocks. The system of the present invention meets any specification by one kind of sound generating block.