| 序号 | 专利名 | 申请号 | 申请日 | 公开（公告）号 | 公开（公告）日 | 发明人 |
|---|---|---|---|---|---|---|
| 141 | Method and system for simultaneous transmission and reception of FM signals utilizing a DDFS clocked by an RFID PLL | US11754438 | 2007-05-29 | US07915999B2 | 2011-03-29 | Ahmadreza Rofougaran; Maryam Rofougaran |
| Aspects of a method and system for simultaneous transmission and reception of FM signals utilizing a DDFS clocked by an RFID PLL are provided. In this regard, a plurality of signals utilized to transmit or receive FM communication may be generated by clocking a plurality of DDFSs via a signal generated to enable RFID communication. The DDFSs may be controlled via one or more control words, which may be generated by a processor. In this regard, the control words may determine a frequency and/or phase of the signals output by the DDFSs. The control words may be adjusted to maintain a constant phase and/or frequency at the DDFS outputs in spite of changes to the signal clocking the DDFS. Accordingly, signals of two or more frequencies may be generated by the DDFSs to allow simultaneous transmission and reception of FM signals. | ||||||
| 142 | Method and system for FM transmit and FM receive using a transformer as a duplexer | US11750111 | 2007-05-17 | US07821472B2 | 2010-10-26 | Ahmadreza Rofougaran; Maryam Rofougaran |
| Aspects of a method and system for FM transmit and FM receive using a transformer as a duplexer may include communicating radio frequency signals via an antenna coupled to primary windings of a radio frequency transformer, wherein secondary windings of the radio frequency transformer may be utilized for receiving and/or transmitting the communicated radio frequency signals. The receiving and transmitting may be operated in time division duplex mode or simultaneously. A number of windings between a pair of connector terminals of the secondary windings used for transmitting of the radio frequency signals may be less than or equal to a number of windings of the primary windings. A number of windings between a pair of connector terminals of the secondary windings used for receiving of the radio frequency signals may be greater than or equal to a number of windings of the primary windings. | ||||||
| 143 | Configurable feedback for an amplifier | US11868159 | 2007-10-05 | US07692486B2 | 2010-04-06 | Mahim Ranjan; Li Liu |
| An amplifier is disclosed that includes configurable feedback based on the output of a received signal strength indicator. The feedback may be increased for high received signal levels, and decreased for low received signal levels. In an embodiment, the configurable impedance may comprise a plurality of discrete impedance settings. Amplitude and/or time hysteresis may be incorporated. | ||||||
| 144 | Method and system for using a transformer for FM transmit and FM receive functionality | US11750091 | 2007-05-17 | US07586458B2 | 2009-09-08 | Ahmadreza Rofougaran; Maryam Rofougaran |
| Aspects of a method and system for using a transformer for FM transmit and FM receive functionality may include communicating radio frequency signals via an antenna coupled to primary windings of a radio frequency transformer, wherein secondary windings of the radio frequency transformer may be utilized for receiving and/or transmitting the communicated radio frequency signals. The secondary windings may be utilized as a load of a power amplifier used for the transmitting. By applying an electrical signal at a terminal of the secondary windings, the secondary windings and/or the power amplifier may be biased. Receiving and transmitting may be operated in time division duplex mode or simultaneously. The electrical signal applied at the center terminal may be a biasing voltage. By using a plurality of capacitors, DC signal components for receiving may be blocked. | ||||||
| 145 | Operational amplifier, integrating circuit, feedback amplifier, and controlling method of the feedback amplifier | US11589238 | 2006-10-30 | US07557648B2 | 2009-07-07 | Kuniyuki Okuyama |
| An operational amplifier according to an embodiment of the present invention includes: an operational amplifier stage executing differential-amplification of an input voltage and a reference voltage; a source-grounded amplifier stage outputting the differential-amplified signal; a phase compensation capacitance compensating for a phase of an output signal; and a charge/discharge control circuit controlling charge/discharge of the phase compensation capacitance. | ||||||
| 146 | CONFIGURABLE FEEDBACK FOR AN AMPLIFIER | US11868159 | 2007-10-05 | US20090091391A1 | 2009-04-09 | Mahim Ranjan; Li Liu |
| An amplifier is disclosed that includes configurable feedback based on the output of a received signal strength indicator. The feedback may be increased for high received signal levels, and decreased for low received signal levels. In an embodiment, the configurable impedance may comprise a plurality of discrete impedance settings. Amplitude and/or time hysteresis may be incorporated. | ||||||
| 147 | METHOD AND SYSTEM FOR SIMULTANEOUS FM TRANSMIT AND FM RECEIVE FUNCTIONS USING AN INTEGRATED BLUETOOTH LOCAL OSCILLATOR GENERATOR (LOGEN) | US11754708 | 2007-05-29 | US20080233873A1 | 2008-09-25 | Ahmadreza (Reza) Rofougaran; Maryam Rofougaran |
| Aspects of a method and system for enabling simultaneous FM transmitter and FM receiver functions using an integrated Bluetooth Local Oscillator Generator (LOGEN). A Bluetooth® LOGEN may be utilized to generate Bluetooth® signal that comprise (I) and (Q) components for use in Bluetooth® communication. The Bluetooth® LOGEN may then be utilized by a DDFS to generate FM radio (I) and (Q) signals for FM radio reception. The Bluetooth® LOGEN may also be utilized by a second DDFS to generate FM radio (I) and (Q) signals for FM radio reception. The Bluetooth® signals may be kept at the same frequency, or reduced in frequency, for use in clocking the DDFS. A frequency word may also be utilized to clock the two DDFS. The outputs of each DDFS may be a constant frequency while the inputs to each DDFS may vary in frequency. | ||||||
| 148 | Method and System for Integration of Bluetooth and FM Local Oscillator Generation into a Single Unit Using a DDFS | US11754460 | 2007-05-29 | US20080232522A1 | 2008-09-25 | Ahmadreza Rofougaran; Maryam Rofougaran |
| Certain aspects of a method and system for integration of Bluetooth and FM local oscillator generation in a single unit using a direct digital frequency synthesizer (DDFS) may be disclosed. Aspects of the method may include generating a clock signal at a particular frequency in a chip that handles communication of Bluetooth signals and FM signals. The generated clock signal may be divided to produce a frequency divided clock signal, which may be mixed with the generated clock signal to enable transmission and/or reception of Bluetooth signals. The generated clock signal or the frequency divided clock signal may be selected for clocking one or more direct digital frequency synthesizers (DDFSs) to enable transmission and/or reception of the FM signals. | ||||||
| 149 | Method and System for Using a Single Transformer for FM Transmit and FM Receive Functions | US11750103 | 2007-05-17 | US20080231536A1 | 2008-09-25 | Ahmadreza Rofougaran; Maryam Rofougaran |
| Aspects of a method and system for using a single transformer for FM transmit and FM receive functions may include communicating radio frequency signals via an antenna coupled to primary windings of a radio frequency transformer, wherein first secondary windings of the radio frequency transformer may be utilized for receiving the communicated radio frequency signals, and second secondary windings of the radio frequency transformer may be utilized for transmitting the communicated radio frequency signals. Receiving and transmitting may be performed in time division duplex mode or simultaneously. A number of windings of the second secondary windings that may be used for transmitting of the radio frequency signals, may be less than or equal to a number of windings of the primary windings. | ||||||
| 150 | AMPLIFIER AND RESET METHOD THEREOF | US15867676 | 2018-01-10 | US20190074800A1 | 2019-03-07 | Chien-Ming WU; Liang-Huan LEI; Shih-Hsiung HUANG; Chih-Lung CHEN |
| An amplifier includes an output stage circuit and a compensation circuit. The output stage circuit includes a first input terminal, a second input terminal, a first output terminal, and a second output terminal. The compensation circuit includes a first capacitor, a second capacitor, a third capacitor, and a fourth capacitor. The first capacitor is coupled between the first input terminal and the second output terminal, and is configured to operate as a first Miller capacitor. The second capacitor is coupled between the second input terminal and the first output terminal, and is configured to operate as a second Miller capacitor. The third capacitor and the fourth capacitor are configured to alternately operate as the first Miller capacitor and the second Miller capacitor according to at least one clock signal. | ||||||
| 151 | Digital-To-Analog Converter Circuit, Corresponding Device and Method | US16020678 | 2018-06-27 | US20190013819A1 | 2019-01-10 | Luigino D'Alessio; Germano Nicollini |
| In some embodiments, a circuit for use in devices involving digital-to-analog conversion of signals includes: a capacitive digital-to-analog converter array and an amplifier. The capacitive digital-to-analog converter includes an input port for receiving a digital input signal and an output port. The amplifier includes capacitive feedback loops that include a first capacitor coupling the output of the amplifier with the input of the amplifier and a second capacitor coupled to the output port of the digital-to-analog converter array at the input of the amplifier. The circuit further includes a set of switches that include a first switch and a second switch coupled with opposed ends of the second capacitor at the input and at the output of the amplifier, respectively. | ||||||
| 152 | Low noise amplifier circuit | US15402502 | 2017-01-10 | US10148237B2 | 2018-12-04 | Johan Raman; Pieter Rombouts |
| A semiconductor circuit comprising an input block having a first chopper providing a chopped voltage signal, a first transconductance converting said chopped voltage signal into a chopped current signal, a second chopper providing a demodulated current signal, a current integrator having an integrating capacitor providing a continuous-time signal, a first feedback path comprising: a sample-and-hold block and a first feedback block, the first feedback path providing a proportional feedback signal upstream of the current integrator. The amplification factor is at least 2. Charge stored on the integrating capacitor at the beginning of a sample period is linearly removed during one single sampling period. Each chopper operates at a chopping frequency. The sample-and-hold-block operates at a sampling frequency equal to an integer times the chopping frequency. | ||||||
| 153 | POWER AMPLIFIER MODULE | US15918414 | 2018-03-12 | US20180262165A1 | 2018-09-13 | Shota ISHIHARA; Yusuke SHIMAMUNE |
| A power amplifier module includes an amplifier that amplifies an input signal and outputs an amplified signal, an emitter follower transistor that supplies a bias signal to the amplifier to control a bias point of the amplifier, and a current source that supplies a control current which changes in accordance with a change in control voltage to a collector of the emitter follower transistor. The current source limits the control current to not greater than an upper limit. | ||||||
| 154 | Optimized multi gain LNA enabling low current and high linearity including highly linear active bypass | US15479173 | 2017-04-04 | US10038418B1 | 2018-07-31 | Emre Ayranci; Miles Sanner |
| An LNA having a plurality of paths, each of which can be controlled independently to achieve a gain mode. Each path includes at least an input FET and an output FET coupled in series. A gate of the output FET is controlled to set the gain of the LNA. Signals to be amplified are applied to the gate of the input FET. Additional stacked FETs are provided in series between the input FET and the output FET. | ||||||
| 155 | System and method for close-down pop reduction | US15528934 | 2015-11-02 | US09991852B2 | 2018-06-05 | Kennet Skov Andersen |
| A close-down pop reduction system and a method for close-down pop reduction in an audio amplifier assembly are disclosed. The switching power conversion system comprises a forward path having a compensator and a switching power stage and a signal path from an output of a comparator in the switching power stage to a sequence control unit. The signal path includes a close-down timing circuit configured to provide a timing signal. The sequence control unit is configured to eliminate the input signal, increase the switch frequency of the close-down pop reduction system and disable the switching power stage at a moment in time within a PWM pulse of the switching power stage. Hereby, it is e.g. possible to minimize the audible pop during close-down of audio amplifier assemblies. | ||||||
| 156 | Headphone driver, a sound system that incorporates the headphone driver and a computing system that incorporates the headphone driver | US15332275 | 2016-10-24 | US09986336B2 | 2018-05-29 | Sang Hyub Kang; Sun Woo Kwon; Hyun Sun Shim; Myung Jin Lee |
| A headphone driver, a sound processor that incorporates the headphone driver and a computing system that incorporates the headphone driver, wherein the headphone driver includes an amplifier having an input terminal and an output terminal, an R-2R ladder network provided with an input signal and connected to the input terminal of the amplifier, and a feedback resistor group connected to the input terminal and to the output terminal of the amplifier. The R-2R ladder network includes a plurality of resistor branches and a first attenuator that is connected between the plurality of resistor branches. | ||||||
| 157 | Multistage amplifier circuit with improved settling time | US15489187 | 2017-04-17 | US09973161B2 | 2018-05-15 | Vadim V. Ivanov; Vaibhav Kumar; Munaf H. Shaik |
| Described examples include multistage amplifier circuits having first and second forward circuits, a comparator or sensor circuit coupled to sense a signal in the second forward circuit to identify nonlinear operation or slewing conditions in the multistage amplifier circuit, and one or more sample hold circuits operative according to a sensor circuit output signal to selectively maintain the amplitude of an amplifier input signal in the second forward circuit and/or in a feedback circuit in response to the sensor circuit output signal indicating nonlinear operation or slewing conditions in the multistage amplifier circuit. Certain examples further include a clamping circuit operative to selectively maintain a voltage at a terminal of a Miller compensation capacitance responsive to the comparator output signal indicating nonlinear operation or slewing conditions. | ||||||
| 158 | Amplifying circuit | US15657618 | 2017-07-24 | US09973146B2 | 2018-05-15 | Mengwen Zhang |
| An amplifying circuit includes a reference voltage generating circuit, a common-mode voltage conversion circuit, a common-mode negative feedback circuit, and an amplifying sub-circuit. The reference voltage generating circuit generates a first reference voltage, a second reference voltage, and a reference common-mode voltage according to a post-stage common-mode voltage. The common-mode voltage conversion circuit converts the pre-stage output differential signal into a differential input signal according to the reference common-mode voltage. The common-mode negative feedback circuit generates a control voltage to quickly establish a common-mode negative feedback of the amplifying sub-circuit, wherein the first reference voltage and the second reference voltage are used to cancel a baseline signal of the pre-stage output differential signal. The amplifying circuit can eliminate the baseline signal, convert the common-mode voltage and quickly establish the common-mode negative feedback. | ||||||
| 159 | Method And System for Accurate Gain Adjustment Of A Transimpedance Amplifier Using A Dual Replica And Servo Loop | US15707309 | 2017-09-18 | US20180026597A1 | 2018-01-25 | Stefan Barabas; Joseph Balardeta; Simon Pang; Scott Denton |
| Methods and systems for accurate gain adjustment of a transimpedance amplifier using a dual replica and servo loop is disclosed and may include, in a transimpedance amplifier (TIA) circuit comprising a first TIA, a second TIA, and a third TIA, each comprising a configurable feedback impedance, and a control loop, where the control loop comprises a gain stage with inputs coupled to outputs of the first and second TIAs and an output coupled to the configurable feedback impedance of the second and third TIAs: configuring a gain level of the first TIA by configuring its feedback impedance, configuring a gain level of the third TIA by configuring a reference current applied to an input of the first TIA, and amplifying a received electrical signal to generate an output voltage utilizing the third TIA. The reference current may generate a reference voltage at one of the inputs of the gain stage. | ||||||
| 160 | AMPLIFYING CIRCUIT | US15657618 | 2017-07-24 | US20170331432A1 | 2017-11-16 | Mengwen ZHANG |
| An amplifying circuit includes a reference voltage generating circuit, a common-mode voltage conversion circuit, a common-mode negative feedback circuit, and an amplifying sub-circuit. The reference voltage generating circuit generates a first reference voltage, a second reference voltage, and a reference common-mode voltage according to a post-stage common-mode voltage. The common-mode voltage conversion circuit converts the pre-stage output differential signal into a differential input signal according to the reference common-mode voltage. The common-mode negative feedback circuit generates a control voltage to quickly establish a common-mode negative feedback of the amplifying sub-circuit, wherein the first reference voltage and the second reference voltage are used to cancel a baseline signal of the pre-stage output differential signal. The amplifying circuit can eliminate the baseline signal, convert the common-mode voltage and quickly establish the common-mode negative feedback. | ||||||
QQ群二维码
意见反馈
意见反馈