The voltage distribution in a cascade or ladder of voltage elevator cells may become irregular in certain conditions. In such conditions, one or more cells may become overstressed. Corrective circuitry may be added to one or more of the voltage elevator cells to reduce or eliminate such stresses. Such corrective circuitry may include a capacitor, a long-channel PMOS transistor, both a capacitor and a long-channel PMOS transistor in parallel, or other electrically equivalent components coupled in parallel with the input and output node of one or more of the voltage elevator cells.

The invention provides a thin-film capacitor discharging apparatus with an inexpensive configuration that can stably produce a constant voltage upon discharging a thin-film capacitor. The thin-film capacitor discharging apparatus is featured by discharging a thin-film capacitor for use in a direct current circuit, and including a discharging function serving as a hybrid such that direct current is received from the thin-film capacitor with voltage becoming lowered to temporarily store electric charge to supply the direct current to a DC/DC inverter while a basic voltage remains until the thin-film capacitor becomes completely empty of electric charge.

A substrate usable for such as DC-DC converters, which has no defects such as openings therein but is more compact and easy to be manufactured and a method of manufacturing the same is provided. First, circuit materials are cut off by pressing and bended to be formed in desired shapes. Next, the circuit materials are joined or placed in predetermined positions to form a circuit conductor 15. Junction is performed by welding. Next, the circuit conductor 15 is installed on the mold 19. The mold 19 is for injection molding of resin 9 and has a predetermined cavity therein. The circuit conductor 15 is fixed to the mold 19, for example by a pin of a prescribed position. In such a condition, resin is injected into a mold. The substrate 1 is formed by the injection of resin to a surface and between layers of the circuit conductor.

A bi-directional converter voltage controlled current system and methods are disclosed. A bi-directional converter provides a bi-directional current to an electrical bus according to a variable duty-cycle control signal. Also, a bi-directional current sensing sensor senses the bi-directional current to provide a sensor voltage signal proportional to the converter current. Further, a variable duty-cycle controller controls a duty-cycle of the variable duty-cycle control signal to control a voltage of the electrical bus based on an error signal.

A power supply voltage booster avoids inadequate step-up capability. In a voltage boosting circuit (50), a switching device (T0) connects and disconnects between the ground potential and one end of the coil (101), the other end of which is supplied with a supply voltage VB. The switching device (T0) is repeatedly turned ON and OFF such that a capacitor (C0) is electrically charged from the force in the coil (101) when the switching device (T0) is turned off. A charging control circuit (110) turns off the switching device (T0) when current flowing through the switching device (T0) into the coil (101) is determined to have increased to a switch-off threshold value when the switching device (T0) is ON, and turns on the switching device (T0) upon determining that the charging current flowing to the capacitor (C0) from the coil (101) decreases to a switch-on threshold value when the switching device (T0) is OFF. The charging control circuit (110) sets the switch-off threshold value to a larger value as the supply voltage VB is lower. Thus, inadequacy of the step-up capability caused by a drop in the supply voltage VB can be avoided.

A power supply unit adapted to prevent or reduce damage to devices when the devices receive power with an abnormal voltage, and an organic light emitting display device using the same. An embodiment of the present invention provides a power supply unit, including: a power block including an input terminal for receiving an input power, an output terminal for outputting an output power, and an enable terminal for receiving an enable signal for controlling a driving of the power block; an input power unit configured to concurrently transfer the input power to the input terminal and the enable terminal; and a controller configured to control a voltage of the input power transferred to the enable terminal to determine the driving time point of the power block, and an organic light emitting display device using the same.

Die vorliegende Erfindung betrifft ein Mittel (13) zum Verteilen von Zündimpulsen, eine Schaltungsanordnung (10) zur Folgesteuerung von Leistungsstellern (20) mit einem solchen Mittel (13) zum Verteilen von Zündimpulsen und ein Verfahren zur Folgesteuerung von Leistungsstellern (20) zur Durchführung mit einer solchen Schaltungsanordnung (10).

Der Erfindung liegt das Problem zu Grunde, eine Schaltungsanordnung der vorgenannten Art und Komponenten für eine solche Schaltungsanordnung sowie ein Verfahren zum Betreiben der Schaltungsanordnung vorzuschlagen, die eine bessere Nutzung der Komponenten, insbesondere von Mitteln (12) zum Erzeugen von Zündimpulsen ermöglichen.

Dieses ist durch das erfindungsgemäße Mittel (13) zum Verteilen von Zündimpulsen bzw. eine erfindungsgemäße Schaltungsanordnung (10) mit diesem Mittel (13) möglich.

An interface circuit for interfacing a semiconductor transducer sensor to a patient vital signs monitor is disclosed. In one embodiment, the interface circuit includes a power supply circuit that receives an excitation power signal generated by the patient monitor, and derives therefrom unregulated and regulated supply voltages for use by the electrical components on the interface circuit. Also generated by the power supply circuit is an appropriate sensor excitation signal for the semiconductor transducer. In another embodiment, the interface circuit further includes receiving circuitry for receiving a sensor output signal generated by the transducer sensor. A scaling circuit then scales that signal into a parameter signal that is proportional to the physiological condition detected by the sensor, and that is also proportional to the excitation power signal generated by the patient monitor. If necessary, the interface circuit further includes isolation circuitry, for electrically isolating the transducer sensor from the patient monitor.

A DC/DC converter and a method protect a MOSFET driven by the converter from overcurrent conditions. No extra pins are required to sense the current, which saves IC package area and cost.

A power supply includes a first power converter, a second power converter, and a clamp reset circuit. The clamp reset circuit is electrically coupled to other components within the first power converter and the second power converter. A clamp standby connection can be provided to electrically couple the clamp reset circuit to components comprising the second power converter. The clamp reset circuit is coupled to reduce magnetizing energy of a transformer of the first power converter and limit voltage in a component of the second power converter. The clamp reset circuit may include a Zener diode and a resistor that are adapted to reduce magnetizing energy of the first power converter and voltage through the second power converter. The clamp reset circuit normally includes a capacitor that is adapted to store energy from the first power converter and the second power converter.

A control circuit for use in a power converter with an unregulated dormant mode of operation is disclosed. In one aspect a power converter includes a drive signal generator coupled to generate a drive signal to control switching of a power switch to be coupled to the control circuit to regulate a flow of energy to a power converter output in response to an energy requirement of one or more loads to be coupled to the power converter output. An unregulated dormant mode control circuit is included and is coupled to render dormant the drive signal generator thereby ceasing the regulation of the flow of energy to the power converter output by the drive signal generator when the energy requirement of the one or more loads falls below a threshold. The drive signal generator is coupled to be unresponsive to changes in the energy requirements of the one or more loads when dormant. The unregulated dormant mode control circuit is coupled to power up the drive signal generator after a period of time has elapsed. The drive signal generator is coupled to again be responsive to changes in the energy requirement of the one or more loads after the period of time has elapsed.

A switch-mode power circuit is disclosed herein that comprises a controllable element that controls a current in response to a control signal supplied to the controllable element; and a control unit connected to the controllable element and providing the control signal. The control unit comprises: a first signal processing unit having an output and being supplied with a first carrier signal and an input signal; a second signal processing unit having an output and being supplied with a second carrier signal and the input signal; and a combiner unit connected to the first and second signal processing units combining the outputs of the first and second signal processing units to form a signal representative of the control signal.

A Factorized Power Architecture ("FPA") method and apparatus includes a front end power regulator which provides one or more controlled DC bus voltages which are distributed through the system and converted to the desired load voltages using one or more DC voltage transformation modules ("VTMs") at the point of load. VTMs convert the DC bus voltage to the DC voltage required by the load using a fixed transformation ratio and with a low output resistance. VTMs exhibit high power density, efficiency and, owing to their inherent simplicity and component utilization, reliability. VTMs may be paralleled and share power without dedicated protocol and control interfaces, supporting scalability and fault tolerance. Feedback may be provided from a feedback controller at the point of load to the front end or to upstream, on-board power regulator modules ("PRMs") to achieve precise regulation.

In a preferred embodiment, a Sine Amplitude Converter ("SAC") method and apparatus for VTMs converts a DC input voltage to a DC output voltage using a fixed transformation ratio at a frequency locked to a resonance. The SAC uses a resonant circuit including a transformer and complementary primary switches operating with balanced switching and a high power conversion duty cycle (e.g., above 94%) to perform high frequency, low noise, single stage power processing. The resonant circuit may have a low Q while enhancing conversion efficiency. The SAC may be operated with primary ZVS and secondary ZVS and ZCS. Controlled current slew rates enable ZVS and ZCS operation of synchronous rectifiers at frequencies greater than 1 MHz, contributing to efficiency and power density. Low-loss, common-source gate-control topologies may be used to efficiently drive a multiplicity of switches at frequencies greater than 1 MHz. Cancellation of the impedances of the resonant circuit at resonance coupled with a low Q enable high bandwidth performance to address the fast transient load characteristics of microprocessors, particularly in the absence of other serial impedances (i.e. input and output filter inductors), which are unnecessary owing to the low differential-mode noise characteristics of SACs. Common-mode noise may be effectively reduced using symmetrical resonant power trains.

In a preferred embodiment, a low profile (< 0.16 inch high), low permeability "dog's bones" core structure, integrated with multi-layer PCB windings to complete SAC transformers, gives rise to a VTM manufacturing platform with greater than 400 Watts/cubic-inch power density and 95% efficiency, converting 100-150 Watts at the point of load. Capable of low manufacturing costs, this enabling technology supports flexible, molded packages for VTMs, which are characteristic of large IC's or "System In a Package" ("SIP") devices, as distinct from the standard "bricks" characteristic of the DC-DC converters, the workhorses of vintage Distributed Power Architecture ("DPA").

In a preferred embodiment, modulation control circuitry modulates the output resistance of a converter to control V_out, limit I_out, or improve current sharing. Gate drive circuitry for delivering a unipolar voltage using a transformer recycles energy between the magnetizing inductance of the transformer and parasitic capacitances of the switch circuitry. Integrated dual drain FETs enable essentially simultaneous switching of clamp and switch circuitry particularly advantageous in gate drive and synchronous rectifier applications. A DC-DC converter may include a non-isolated power converter, preferably a ZVS buck-boost converter, followed by a DC-DC transformer, preferably a SAC.

A Factorized Power Architecture ("FPA") method and apparatus includes a front end power regulator which provides one or more controlled DC bus voltages which are distributed through the system and converted to the desired load voltages using one or more DC voltage transformation modules ("VTMs") at the point of load. VTMs convert the DC bus voltage to the DC voltage required by the load using a fixed transformation ratio and with a low output resistance. VTMs exhibit high power density, efficiency and, owing to their inherent simplicity and component utilization, reliability. VTMs may be paralleled and share power without dedicated protocol and control interfaces, supporting scalability and fault tolerance. Feedback may be provided from a feedback controller at the point of load to the front end or to upstream, on-board power regulator modules ("PRMs") to achieve precise regulation.

In a preferred embodiment, a Sine Amplitude Converter ("SAC") method and apparatus for VTMs converts a DC input voltage to a DC output voltage using a fixed transformation ratio at a frequency locked to a resonance. The SAC uses a resonant circuit including a transformer and complementary primary switches operating with balanced switching and a high power conversion duty cycle (e.g., above 94%) to perform high frequency, low noise, single stage power processing. The resonant circuit may have a low Q while enhancing conversion efficiency. The SAC may be operated with primary ZVS and secondary ZVS and ZCS. Controlled current slew rates enable ZVS and ZCS operation of synchronous rectifiers at frequencies greater than 1 MHz, contributing to efficiency and power density. Low-loss, common-source gate-control topologies may be used to efficiently drive a multiplicity of switches at frequencies greater than 1 MHz. Cancellation of the impedances of the resonant circuit at resonance coupled with a low Q enable high bandwidth performance to address the fast transient load characteristics of microprocessors, particularly in the absence of other serial impedances (i.e. input and output filter inductors), which are unnecessary owing to the low differential-mode noise characteristics of SACs. Common-mode noise may be effectively reduced using symmetrical resonant power trains.

In a preferred embodiment, a low profile (< 0.16 inch high), low permeability "dog's bones" core structure, integrated with multi-layer PCB windings to complete SAC transformers, gives rise to a VTM manufacturing platform with greater than 400 Watts/cubic-inch power density and 95% efficiency, converting 100-150 Watts at the point of load. Capable of low manufacturing costs, this enabling technology supports flexible, molded packages for VTMs, which are characteristic of large IC's or "System In a Package" ("SIP") devices, as distinct from the standard "bricks" characteristic of the DC-DC converters, the workhorses of vintage Distributed Power Architecture ("DPA").

In a preferred embodiment, modulation control circuitry modulates the output resistance of a converter to control V_out, limit I_out, or improve current sharing. Gate drive circuitry for delivering a unipolar voltage using a transformer recycles energy between the magnetizing inductance of the transformer and parasitic capacitances of the switch circuitry. Integrated dual drain FETs enable essentially simultaneous switching of clamp and switch circuitry particularly advantageous in gate drive and synchronous rectifier applications. A DC-DC converter may include a non-isolated power converter, preferably a ZVS buck-boost converter, followed by a DC-DC transformer, preferably a SAC.