A phase sequence protection circuit is shown in which first and second resistors (R1, R2) and a first capacitor (C1) all having equivalent impedance are connected in a Y configuration and coupled to power source leads (A, C, B) of a three phase power supply, resistor R1 being coupled to phase A, capacitor C1 to phase B and resistor R2 to phase C. A comparator network (12) is connected in line with the first resistor (R1) and, in one embodiment will cause a solid state switch (Q1) to conduct when the phases are out of sequence. In a second embodiment a buffer portion (COMP2) is provided to add switching hysteresis which also reverses the switching logic causing the solid state switch (Q1) to conduct when the phases are in sequence. In another embodiment the comparator network (12'') is provided with the buffer portion (COMP2) for switching hysteresis and arranged to cause the solid state switch (Q1) to conduct when the phases are out of sequence. An opto-isolator (14) interfaces with the comparator network (12, 12', 12'') to provide isolation. The signal from the opto-isolator in comparator network (12') controls the energization of a second solid state switch (Q2) and a relay coil (K1) used to energize a load.

A set of generators are connected in parallel using an electrical bus. One of the generators includes selectively connected inputs including a first input associated with a generator and a second input associated with the bus. A controller is configured to receive a first electrical characteristic from the first input assigned to a first connection and a second electrical characteristic from the second input assigned to a second connection. The controller is configured to generate a switching signal to assign the first input to the second connection or assign the second input to the first connection in response to a difference between the first electrical characteristic and the second electrical characteristic exceeding a threshold.

Voltages of respective phase lines (L1, L2, L3) of an alternating-current power supply (1) of three-phase four-line type are rectified by a full-wave rectification circuit (11), and whether an output voltage (11) of the full-wave rectification circuit is above a predetermined value or not is determined. If a determination result thereof continuously indicates being above the predetermined value for a constant time, connection to the alternating-current power supply (1) of three-phase four-line type is determined to be not an error. If the determination results does not continuously indicates being above the predetermined value for the constant time, the connection to the alternating-current power supply (1) of three-phase four-line type is determined to be an error.

A device (9) for detecting opposite phases and an open phase in an input three-phase voltage for a DC motor (31) wherein the input three-phase voltage is rectified by a three-phase bridge circuit (3) and supplied to the armature of the DC motor, comprising: a first means for producing a first voltage which lags one phase, for example, U-phase of the input three-phase voltage by a phase angle of 60° (91); a second means for producing a second voltage which lags another phase, for example, W-phase, by a phase angle of 180°(92); a third means for producing a difference voltage between the first and second voltages (93); means for comparing the maximum level of the difference voltage with a reference voltage (94), and; means (8) for supplying the input three-phase voltage to the three-phase bridge circuit (3). In this device, the input three-phase voltage is supplied to the three-phase bridge circuit when the maximum level is equal to or less than the reference voltage, while the input three-phase voltage is not supplied to the bridge circuit when the maximum level is greater than the reference voltage.