| 序号 | 专利名 | 申请号 | 申请日 | 公开（公告）号 | 公开（公告）日 | 发明人 |
|---|---|---|---|---|---|---|
| 261 | Display panel and repair method thereof | US14492929 | 2014-09-22 | US09377661B2 | 2016-06-28 | Yizhuang Zhuang; Songxian Wen; Mingfeng Deng |
| A flat display panel and a related repairing method are provided. The flat display panel includes multiple horizontal repair lines parallel to scan lines and multiple vertical repair lines parallel to data lines. The vertical repair lines are disposed on one side of the data lines one to one, and the horizontal repair lines are disposed on one side of the scan lines one to one. When one of the data lines or one of the scan lines is broken, an electrical route formed by a use of the vertical repair lines or the horizontal repair lines detours the broken scan line or data line, so as to deliver signal to pixel electrode normally. | ||||||
| 262 | Display device and electronic apparatus | US14179903 | 2014-02-13 | US09368078B2 | 2016-06-14 | Tadayoshi Katsuta; Hiroshi Mizuhashi |
| According to an aspect, a display device includes: a plurality of pixels aligned in row and column directions, each of the pixels including a drive element; a plurality of scan lines each coupled with the drive elements included in the pixels aligned in the row direction to transmit thereto a scan signal for selecting the pixels row by row; a plurality of signal lines each coupled with the drive elements included in the pixels aligned in the column direction to write display data; and a display control unit. The display control unit alternately repeats a display period and a stop period. In a latter term of the stop period, display control unit provides the display data written in the respective pixels in a row that has been selected during the display period immediately before the stop period, to the signal lines corresponding to the respective pixels. | ||||||
| 263 | Display device and output buffer circuit for driving the same | US14689575 | 2015-04-17 | US09349320B2 | 2016-05-24 | Takao Tanikame |
| Disclosed herein is a display device including: a plurality of pixel circuits; a power source line connected to corresponding ones of the plurality of pixel circuits; and an output buffer circuit for supplying currents to corresponding ones of the plurality of pixel circuits by alternately applying a first potential applied to a first power source supply terminal, and a second potential applied to a second power source supply terminal to the power source line. The output buffer includes a variable resistance circuit connected to a path between the first power source supply terminal and the power source line, the variable resistance circuit serving to change a resistance value thereof in accordance with a magnitude of a total sum of the currents. | ||||||
| 264 | Display device that switches light emission states multiple times during one field period | US14627065 | 2015-02-20 | US09330602B2 | 2016-05-03 | Takao Tanikame; Seiichiro Jinta |
| A scan driving circuit includes a shift register unit and a logic circuit unit. The start of a start pulse of an output signal STp+1 of a p+1′th shift register is situated between the start and end of a start pulse of the output signal STp of a p′th shift register, and one each of a first enable signal through a Q′th enable signal exist in sequence between the start of the start pulse of the output signal STp and the start of the start pulse of the output signal STp+1. The operations of a (p′, q)′th NAND circuit are restricted based on period identifying signals, such that the NAND circuit generates scanning signals based only on a portion of the output signal STp corresponding to the first start pulse, the signal obtained by inverting the output signal STp+1, and the q′th enable signal ENq. | ||||||
| 265 | ORGANIC LIGHT-EMITTING DISPLAY DEVICE, METHOD OF REPAIRING THE SAME, AND METHOD OF DRIVING THE SAME | US14986216 | 2015-12-31 | US20160118455A1 | 2016-04-28 | Ki-Nyeng Kang; Na-Young Kim; Soo-Beom Jo; Jae-Ho Lee; Myung-Koo Hur |
| An organic light-emitting display device includes a plurality of emission pixels aligned in columns and rows, each of the emission pixels including an emission device and a first pixel circuit coupled to the emission device, a dummy pixel including a second pixel circuit in each column of the emission pixels, and a repair line in each column, wherein a same data signal is provided to one of the emission pixels coupled to the repair line and to the dummy pixel coupled to the repair line, and wherein the emission pixels are configured to simultaneously emit light. | ||||||
| 266 | DISPLAY DEVICE AND ELECTRONIC APPARATUS | US14985742 | 2015-12-31 | US20160111056A1 | 2016-04-21 | Tadayoshi KATSUTA; Hiroshi MIZUHASHI |
| According to an aspect, a display device includes: a plurality of pixels aligned in row and column directions, each of the pixels including a drive element; a plurality of scan lines each coupled with the drive elements included in the pixels aligned in the row direction to transmit thereto a scan signal for selecting the pixels row by row; a plurality of signal lines each coupled with the drive elements included in the pixels aligned in the column direction to write display data; and a display control unit. The display control unit alternately repeats a display period and a stop period. In a latter term of the stop period, display control unit provides the display data written in the respective pixels in a row that has been selected during the display period immediately before the stop period, to the signal lines corresponding to the respective pixels. | ||||||
| 267 | LIQUID CRYSTAL DISPLAY DEVICE | US14786202 | 2014-02-25 | US20160078831A1 | 2016-03-17 | Takuya SONE; Noriyuki TANAKA |
| A scanning line drive unit sequentially selects a plurality of scanning lines, and utilizes a drive voltage generated by the booster circuit to control the operation of a thin-film transistor. A timing control unit controls the scanning line drive unit on the basis of a display signal, which includes a horizontal synchronization signal, a vertical synchronization signal and an image signal. A reference synchronization signal is input to the booster circuit during a period in which the scanning line drive unit selects none of the plurality of scanning lines. A booster circuit generates a non-selection voltage in synchronization with the reference synchronization signal in the abovementioned period. The scanning line drive unit outputs the non-selection voltage generated by the booster circuit to the plurality of scanning lines in the abovementioned period. | ||||||
| 268 | SHIFT REGISTER AND DISPLAY DEVICE USING THE SAME | US14839367 | 2015-08-28 | US20160071614A1 | 2016-03-10 | Young-Jang LEE |
| Discussed is a shift register capable of reducing a circuit area through simplification of a logic circuit configuration. The shift register according to an embodiment includes stages each selectively executing a forward scan and a backward scan. Each stage includes a pull-up transistor for generating a first clock under control of a control node, as an output thereof, a pull-down transistor for generating a gate-off voltage under control of a third clock, as an output thereof, a first transistor for setting and resetting the control node during the forward scan while resetting the control node during the backward scan, under control of a fourth clock, using output signals from a previous stage, and a second transistor for setting and resetting the control node during the backward scan while resetting the control node during the forward scan, under control of a second clock, using output signals from a next stage. | ||||||
| 269 | Display device and method of driving the same | US13731606 | 2012-12-31 | US09275602B2 | 2016-03-01 | Young-Ho Kim |
| A display device including a display panel including gate and data line that cross each other; a first control signal generation unit generating a source output enable signal and a first gate output enable signal in synchronization with a data enable signal modulated according to a spread frequency clock signal; a second control signal generation unit counting a number of clocks of a fixed-frequency clock signal based on a point of time at which a logic high state of the source output enable signal ends, and outputting a second gate output enable signal when the number of the counted clocks becomes equal to a reference value; and a gate driving unit controlling outputting of a gate signal to the gate lines using the second gate output enable signal. | ||||||
| 270 | Display device and driving method thereof | US14171940 | 2014-02-04 | US09262955B2 | 2016-02-16 | Jun-Ho Hwang |
| A display device includes a display panel, a gate driver, a gate clock signal modulating unit, and a gate clock signal generator. The display panel includes gate lines and pixels connected to the gate lines via respective switching elements. The gate driver includes stages configured to output gate signals to the gate lines. The gate clock signal modulating unit is configured to modulate an input gate clock signal based on a scanning start signal to generate an output gate clock signal. The gate clock signal generator is configured to generate a clock signal based on the gate clock signal and output the clock signal to the gate driver. The gate clock signal modulating unit is configured to modulate a width of a pulse of the input gate clock signal overlapping a pulse of the scanning start signal. | ||||||
| 271 | Organic light-emitting display device, method of repairing the same, and method of driving the same | US14062816 | 2013-10-24 | US09256109B2 | 2016-02-09 | Ki-Nyeng Kang; Na-Young Kim; Soo-Beom Jo; Jae-Ho Lee; Myung-Koo Hur |
| An organic light-emitting display device includes a plurality of emission pixels aligned in columns and rows, each of the emission pixels including an emission device and a first pixel circuit coupled to the emission device, a dummy pixel including a second pixel circuit in each column of the emission pixels, and a repair line in each column, wherein a same data signal is provided to one of the emission pixels coupled to the repair line and to the dummy pixel coupled to the repair line, and wherein the emission pixels are configured to simultaneously emit light. | ||||||
| 272 | EMISSION DRIVER AND DISPLAY DEVICE INCLUDING THE SAME | US14597082 | 2015-01-14 | US20160035262A1 | 2016-02-04 | Hae-Yeon Lee; Bo-Yong Chung; Na-Young Kim |
| An emission driver and a display device having the same are disclosed. In one aspect, the emission driver includes a plurality of stages each configured to output an emission control signal, wherein each of the stages includes first and second driving blocks and a buffer block. The buffer block is configured to selectively output an emission control signal so as to operate in a sequential emission mode or in a simultaneous emission mode, the stages being configured to sequentially output a plurality of the emission control signals in the sequential emission mode and substantially simultaneously output the emission control signals in the simultaneous emission mode. The buffer block is further configured to determine a duration in which the emission control signal has a first voltage level based on an interval between time points when first and second intermediate signals have low voltage levels. | ||||||
| 273 | COMPENSATION PIXEL CIRCUIT AND DISPLAY APPARATUS | US14443511 | 2014-09-30 | US20150348462A1 | 2015-12-03 | Zhanjie MA |
| There are provided a compensation pixel circuit and a display apparatus. The compensation pixel circuit comprises an organic light emitting diode (D1) and a driving transistor (M1), a first terminal of the driving transistor (M1) being connected to an anode of the organic light emitting diode (D1). The compensation pixel circuit further comprises: a resetting module, a data voltage writing module, a light emitting control module and a switching module. The resetting module includes a capacitor (C1) whose first terminal is connected to a gate of the driving transistor (M1) and configured to make the gate of the driving transistor (M1) discharge so that a gate voltage is reduced to a magnitude of a threshold voltage of the organic light emitting diode (D1). The data voltage writing module is configured to discharge at the gate of the driving transistor (M1) so as to connect a data voltage to a second terminal of the driving transistor (M1) after the gate voltage is made reduced to the magnitude of the threshold voltage of the organic light emitting diode (D). The light emitting control module is configured to connect a source of the driving transistor (M1) and a second terminal of the capacitor (C1) to an operating voltage at a high level after data voltage writing is completed. The switching module is configured to disconnect the driving transistor (M1) from the organic light emitting diode (D1) when the data voltage is connected to the second terminal of the driving transistor (M1). The compensation pixel circuit can compensate for the threshold voltage offset, and reduce the influence of signals from frame to frame greatly. | ||||||
| 274 | CAPACITIVE IN-CELL TOUCH PANEL, DISPLAY DEVICE, AND DRIVING METHOD | US14435548 | 2014-09-03 | US20150346860A1 | 2015-12-03 | Wei Qin |
| A capacitive in-cell touch panel, a display device and a driving method are provided. For the capacitive in-cell touch panel, at least one gate line (4) or at least one data line (5) is reused as a first touch sensing electrode, a plurality of mutually independent common electrodes (6) are disposed to intersect the first touch sensing electrode, and at least one common electrode (6) is reused as a second touch sensing electrode. The capacitive in-cell touch panel can reduce the number of masking in the manufacturing process, reduce the thickness of the touch panel and reduce the production cost. In the driving process of the touch panel, certain period is set aside of a frame of picture as touch period, that is, a time division driving mode is used for the touch time period and the display time period, it is also possible to avoid mutual interference between display signals and touch driving signals and in turn guarantee the quality of displayed picture and the touch accuracy. | ||||||
| 275 | METHOD AND DEVICE FOR CONTROLLING VOLTAGE OF ELECTRODE | US14381719 | 2013-12-19 | US20150325161A1 | 2015-11-12 | Yoon Sung UM; Hyun Sic CHOI; Zhiqiang XU; Hui LI |
| A voltage control method and device for electrodes, wherein the method includes inputting a varying voltage signal to common electrodes on an array substrate. The solution of the present application may avoid the problem of greenish picture of products due to influence of data line voltage on common electrodes. | ||||||
| 276 | DISPLAY DEVICE AND METHOD FOR DRIVING THE SAME | US14504331 | 2014-10-01 | US20150302793A1 | 2015-10-22 | Hai-Jung In; Yong-Sung Park |
| Each pixel of a display device includes: an organic light emitting diode between a first and a second power supply; a first transistor to transmit a drive current based on data signals; a second transistor to couple a gate electrode of the first transistor to the data line in response to a scan signal; a first capacitor between the first power supply and the gate electrode of the first transistor; a light receiving element coupled to a third power supply; a second capacitor between the light receiving element and a fourth power supply; a third transistor between the data line and a first electrode of the second capacitor, the third transistor including a gate electrode coupled to a selection signal line; and a fourth transistor between the fourth power supply and the third transistor, the fourth transistor including a gate electrode coupled to the first electrode of the second capacitor. | ||||||
| 277 | DISPLAY UNIT, DRIVE UNIT, DRIVING METHOD, AND ELECTRONIC APPARATUS | US14442297 | 2013-12-18 | US20150294623A1 | 2015-10-15 | Naobumi Toyomura; Tetsuro Yamamoto |
| A display unit includes: a unit pixel; a switch configured to perform ON-OFF control between a second terminal and a third terminal, based on a pulse signal applied to a first terminal, the second terminal being supplied with a DC signal, and the third terminal being connected to the unit pixel; and a non-linear element interposed between the first terminal and the third terminal. | ||||||
| 278 | Display device and driving method thereof | US13166463 | 2011-06-22 | US09159275B2 | 2015-10-13 | Hajime Kimura |
| A method for reducing afterimages in a device for displaying images by application of an electric field to a charged substance is provided. A plurality of pixels each include a display element including a pixel electrode, a charged layer, and a counter electrode. The display device has a function of applying different potentials to pixel electrodes that are adjacent to each other in a period during which the pixels are initialized. Thus, electric fields are generated not only in a direction perpendicular to the pixel electrodes but also in a direction parallel to the pixel electrodes (the end-face direction of the pixel electrodes), so that charged substances in the charged layer stir. Accordingly, aggregation can be prevented. | ||||||
| 279 | DISPLAY DEVICE AND OUTPUT BUFFER CIRCUIT FOR DRIVING THE SAME | US14689575 | 2015-04-17 | US20150279275A1 | 2015-10-01 | Takao Tanikame |
| Disclosed herein is a display device including: a plurality of pixel circuits; a power source line connected to corresponding ones of the plurality of pixel circuits; and an output buffer circuit for supplying currents to corresponding ones of the plurality of pixel circuits by alternately applying a first potential applied to a first power source supply terminal, and a second potential applied to a second power source supply terminal to the power source line. The output buffer includes a variable resistance circuit connected to a path between the first power source supply terminal and the power source line, the variable resistance circuit serving to change a resistance value thereof in accordance with a magnitude of a total sum of the currents. | ||||||
| 280 | Display device and output buffer circuit for driving the same | US14465104 | 2014-08-21 | US09035928B2 | 2015-05-19 | Takao Tanikame |
| Disclosed herein is a display device including: a plurality of pixel circuits; a power source line connected to corresponding ones of the plurality of pixel circuits; and an output buffer circuit for supplying currents to corresponding ones of the plurality of pixel circuits by alternately applying a first potential applied to a first power source supply terminal, and a second potential applied to a second power source supply terminal to the power source line. The output buffer includes a variable resistance circuit connected to a path between the first power source supply terminal and the power source line, the variable resistance circuit serving to change a resistance value thereof in accordance with a magnitude of a total sum of the currents. | ||||||
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