| 序号 | 专利名 | 申请号 | 申请日 | 公开（公告）号 | 公开（公告）日 | 发明人 |
|---|---|---|---|---|---|---|
| 41 | Precision clock frequency detector having reduced supply voltage dependence | US994137 | 1997-12-19 | US5926042A | 1999-07-20 | Ronald F. Talaga, Jr. |
| A clock frequency detector is provided having a precise trip frequency which is insensitive to power supply variations. In one embodiment, the clock frequency detector employs a current source to discharge a capacitor at a constant rate and a gated current source to charge the capacitor at a frequency-dependent rate. If the charge rate exceeds the discharge rate, the capacitor will charge and an output signal is asserted. The gated current source is controlled by an edge-triggered pulse generator which generates pulses of a precise width in response to edges in the input clock signal. To create these pulses, the pulse generator produces an inverted clock signal with delayed transitions and combined this signal with the clock signal. The delayed transitions are created using a capacitor which is charged by a current source. The capacitor is provided with a shunt transistor which drains the charge from the capacitor whenever the clock signal is asserted. When the clock signal is de-asserted, the capacitor is allowed to charge, and an op-amp detects when the capacitor voltage exceeds a reference voltage and asserts an output signal. The reference voltage is also provided using a current source, so the transition delay is independent of changes in the power supply voltage. The clock frequency detector provided herein has a high precision with respect to process variation. A consistent frequency detection performance is achieved which is insensitive to changes in power supply voltage. This advantageously provides microprocessors with an added degree of reliability as higher circuit densities and lower supply voltages are pursued. | ||||||
| 42 | Dynamic phase-frequency detector circuit | US652839 | 1996-05-23 | US5661419A | 1997-08-26 | Raghunand Bhagwan |
| A sequential phase-frequency detector circuit using precharged logic and a minimum number of transistors is suitable for use in a delay locked loop because of insensitivity to a stuck delay line output signal. The detector receives standard REFERENCE and LOCAL input signals and provides UP and DOWN output signals for control of a charge pump. In one embodiment, the detector includes a pulse generator for isolating the reset of the UP output signal from a stuck delay line output. This feature permits the UP output to be turned ON while the LOCAL input is stuck at a high level. The circuit exhibits improved gain at phase differences of less than 20 pico-seconds, resulting in reduced phase jitter. The isolating feature minimizes frequency acquisition time in applications in which the frequency of the REFERENCE signal is sometimes substantially reduced, such as during an Energy-Star.TM. power-conserving or Slow modes, which typically causes the delay line output to become stuck. These features make the detector desirable for use in VLSI clock regeneration circuits where high operating frequencies and tight layout restrictions place a premium on circuit size and performance. | ||||||
| 43 | Synchronization circuit using a high speed digital slip counter | US129537 | 1993-09-30 | US5483201A | 1996-01-09 | James R. Bortolini |
| Simplifying measurement equipment so that any two frequency sources can be accurately and quantitatively compared to each other. With this simplified measurement equipment, calibration can be performed on an oscillator using an external reference signal, while the oscillator is being used in an active system. By simplifying the measurement equipment, the equipment can be built into a time base unit allowing recalibration to be performed at relatively short time intervals. A frequency difference detector based on ring counters and an existing controller in a telecommunication switching system compare an accurate external reference against an oscillator of the time base unit for calibration in the field. Within the telecommunication switching system, a highly accurate external reference signal is normally available from an interconnected telecommunication network. The use of ring counters in the frequency difference detector allows for simple measurement equipment which adds little to the cost of the time base unit. Further, since measurement equipment is all digital, no tuning of the equipment is necessary as is required of measurement equipment having analog components. | ||||||
| 44 | Frequency detector circuit | US316750 | 1989-02-28 | US4975594A | 1990-12-04 | Leland G. Wiren |
| A circuit for determining the validity of the frequency of a clock signal is shown. The circuit includes a frequency detector circuit having a synchronizer which receives the clock signal and synchronizes it to a synchronous clock signal. A pattern detector detects an error pattern from the synchronizer and generates an error signal which is transmitted to a latch and stored. | ||||||
| 45 | Oscillator frequency control loop | US346994 | 1982-02-08 | US4438412A | 1984-03-20 | Christopher W. Malinowski; Heinz Rinderle |
| In a circuit arrangement including at least one control loop composed of a controllable oscillator for producing an a.c. output signal whose frequency is a function of the value of a control signal thereto, a frequency/d.c. signal converter connected for producing a d.c. output signal which is a function of the frequency of the oscillator output signal, and a signal comparator having two inputs and an output, with one comparator input receiving a signal corresponding in value to the converter output signal, and the oscillator receiving a control signal corresponding to the signal at the comparator output, the circuit arrangement further including an a.c. signal source, and a second frequency/d.c. signal converter connected for producing a d.c. output signal which is a function of the frequency of the a.c. signal produced by the source, with the other comparator input receiving a signal corresponding in value to the second converter output signal. An adjustable signal control arrangement is connected between the output of the second converter and its associated comparator input for applying to the associated comparator input a signal which differs in value from and varies in proportion with the output signal from the second converter. | ||||||
| 46 | Non-ringing phase responsive detector | US273166 | 1981-06-12 | US4414517A | 1983-11-08 | Joseph Mahig |
| A non-ringing circuit for detecting the presence of predetermined frequency components in input signals and for delivering an output signal when a predetermined component is dominant, the circuit employing plural tuned filters with different adjacent cross-over frequencies, and using coincidence detectors connected to pairs of these filters in such a way as to detect when there exists a dominant frequency component having a frequency so located with respect to said cross-over frequencies that the relative phases of the signals fed to the coincidence detectors from the filters will produce phase coincidences therein, the circuit further using multiple different paired filters having staggered cross-over frequencies such that the tendencies of these filters to ring as a result of transient excitations will produce diverse and non-coincident ringing wave forms. | ||||||
| 47 | Maximum frequency detector | US191117 | 1980-09-26 | US4360782A | 1982-11-23 | John R. Nowell |
| A maximum frequency detector having a counter which counts through a certain number of counts unless an inhibit signal is received at a rate determined by the frequency of the clock pulse received. The inhibit signal is generated by a logic network to prevent the counter from producing an outgoing digital pulse of the digital pulse stream. The counter, the clock pulse generator and the logic network cooperate to have the frequencies of the incoming and outgoing digital pulses equal unless the incoming digital pulse stream has its frequency exceed the predetermined maximum frequency. In the event that the frequency of the incoming digital pulse stream exceeds the predetermined maximum frequency the frequency of the outgoing digital pulse stream is the certain predetermined maximum frequency. | ||||||
| 48 | Method and means for detecting spurious electrical signals in an electrical power system | US130733 | 1980-03-17 | US4331882A | 1982-05-25 | Narain G. Hingorani |
| Spurious subsynchronous and supersynchronous electrical signals in an electrical power system are detected rapidly and reliably by generating an electrical signal which is proportional to the power signal and rectifying the generated signal. The rectified signal includes a dc component and a component having a frequency equal to the difference of the contact power frequency and the spurious signal frequency. The component is readily identified by a tuned filter and detector whereby remedial action can be taken to eliminate the spurious signal. | ||||||
| 49 | Tone signal detectors | US972176 | 1978-12-21 | US4313107A | 1982-01-26 | Toshihiro Mori |
| A tone signal detector for use in paging receivers, transceivers, mobile radio equipment and the like is disclosed. Received tone signals are waveform-converted to generate complementary gating pulses. These gating pulses are used to gate clock pulses to one of two counters, each of which produce a detecting pulse upon counting up to a predetermined number during a predetermined time interval. A detecting pulse from one counter resets the other, and a detecting pulse from either enables a third counter to count clock pulses. This third counter will produce a detecting pulse upon counting up to a predetermined number during a predetermined time interval. The first and second counters enable the tone signal detector to yield detecting pulses without being adversely affected by threshold variations in the waveform converting circuit, while the third counter examines frequency deviation of incoming tone signals. | ||||||
| 50 | Superheterodyne receiver frequency tracking circuit | US44967 | 1979-06-04 | US4306310A | 1981-12-15 | Christopher W. Malinowski; Heinz Rinderle |
| In a superheterodyne signal receiver including an input circuit arranged to be tuned to a frequency to be received and including a signal controllable variable reactance element presenting a reactance whose value is adjusted by a tuning signal and determines the frequency to which the input circuit is tuned, and a controllable local oscillator producing an alternating signal to be mixed with a received signal to produce an intermediate frequency received signal, a tracking circuit composed of: a first frequency control circuit including the local oscillator; a second frequency control circuit including a controllable sampling oscillator and a member connected to respond to the frequency of the output from the sampling oscillator to derive a signal related thereto and supplying that signal, as the tuning signal, to the controllable element; and a control signal generating unit generating first and second control signals and connected for supplying the first control signal to the first frequency control circuit for adjusting the frequency of the signal produced by the local oscillator, and for supplying the second control signal to the second frequency control circuit for adjusting the value of the tuning signal to tune the input circuit to a selected frequency, the generating unit maintaining a relationship between the first and second control signals such that the output frequency of the local oscillator is adjusted to the value corresponding to the received signal frequency to which the input circuit is tuned. | ||||||
| 51 | Tuning apparatus | US915758 | 1978-06-15 | US4198606A | 1980-04-15 | Michiru Baba |
| A fundamental frequency detection device generates a fundamental frequency pulse signal having a frequency corresponding to the fundamental frequency of a signal to be tuned. The fundamental frequency pulse signal is converted to a first pulse signal having a pulse width corresponding to the fundamental frequency. The pulse width of this first pulse signal is compared with that of a second pulse signal of such a pulse width as to correspond to the frequency of a reference sound signal. A deviation signal expressing the frequency deviation between the signal to be tuned and the reference sound signal is obtained by counting cent value-corresponding pulses during the period corresponding to the difference of the pulse width between the first and second pulse signals. | ||||||
| 52 | Time interval measurement | US869643 | 1978-01-16 | US4165459A | 1979-08-21 | Walter R. Curtice |
| The interval between arrival of two time displaced signals is measured with a resolution less than 0.5 nanoseconds by electronic vernier techniques utilizing transferred electron logic device circuits. The first arriving signal triggers a first clock generator of pulse period T.sub.C, the pulses from which are counted by a first counter and a second counter. The second arriving signal triggers a second clock pulse generator having a pulse period T.sub.V, the first pulse therefrom disabling the first counter at a count of M. As T.sub.V <T.sub.C coincidence of the pulses from the two clock pulse generators will eventually occur causing disabling of the second counter at a count of N. Time interval .DELTA.T is computed from the formula: .DELTA.T=(N-1)T.sub.C -(N-M)T.sub.V. | ||||||
| 53 | Frequency measurement using phase continuous frequency switching | US547282 | 1975-02-05 | US3984770A | 1976-10-05 | David C. Chu |
| An automatic transfer oscillator system for frequency measurement using a single sampler is described. Two signals, of frequencies f.sub.1 and f.sub.2, are alternately used to drive the sampler. The two frequencies are sufficiently close by design so that the intermediate frequency signals generated arise from the same harmonic number when sampling a signal of unknown frequency f.sub.x. The resulting average IF output is accurately measured and used to compute the unknown frequency f.sub.x. Accurate measurement of the average IF output is made possible because the transition between f.sub.1 driving the sampler and f.sub.2 driving the sampler only occurs when the two signals are in phase. As a result, the IF signal transitions are also in phase and spurious signals are not produced. This technique is referred to as phase continuous switching. | ||||||
| 54 | Warning system for belt slippage | US39277773 | 1973-08-29 | US3877003A | 1975-04-08 | KAWASHIMA ISAMU |
| A shaft revolution detector detects the number of revolutions of the engine shaft of a vehicle engine, a driven member revolution detector for detecting the number of revolutions of a driven rotary member connected to the engine shaft through a belt, a circuit compares the detected signals of the driven member revolution detector and the shaft revolution detector, and actuates a warning circuit when the output signal of the comparator circuit reaches a predetermined value.
|
||||||
| 55 | Digital frequency comparator | US3656063D | 1970-04-29 | US3656063A | 1972-04-11 | VOLLMER DONALD W |
| A digital frequency comparator circuit whose output is the frequency difference between two input signals and which consists of two flip-flops triggered by the negative going portion of the input waveform connected in a divide-by-four configuration and where the reset output is energized whenever coincident input signals arrive at the first flip-flop''s toggle and reset inputs. The circuit produces an output pulse whenever two consecutive negative going portions of an input waveform arrive at the toggle input without an intervening negative going portion of a second input waveform arriving at the reset input of the first flipflop.
|
||||||
| 56 | Apparatus for determining the frequency difference of two signals by comparison of differentiated and un-differentiated beat signals | US33119763 | 1963-12-17 | US3297946A | 1967-01-10 | LANGSFORD CLAY DAVID |
| 57 | Frequency coincidence detector | US69104057 | 1957-10-18 | US3012200A | 1961-12-05 | HYMAN HURVITZ |
| 58 | Alternating current synchronizing apparatus | US69440546 | 1946-08-31 | US2482444A | 1949-09-20 | MAURICE TOUSSAINT |
| 59 | DETECTION DEVICE, DETECTION SYSTEM, DETECTION METHOD, AND PROGRAM | EP15776844.1 | 2015-04-07 | EP3130363A1 | 2017-02-15 | NEBUYA Satoru |
A detection device includes: a frequency property acquisition unit that acquires a frequency property when an alternating-current signal is input to at least two conductive bodies provided on a fiber sheet; and a detection signal output unit that outputs a detection signal when the frequency property acquisition unit acquires a predetermined frequency property. |
||||||
| 60 | AN APPARATUS AND METHOD FOR MULTI-PHASE DIGITAL SAMPLING | EP06810803.4 | 2006-09-22 | EP1915629A2 | 2008-04-30 | SANDER, Wendell c/o Panasonic Emerging Advanced RF Laboratory |
| A method and apparatus for determining a relationship between an input signal frequency (14) and a reference signal frequency is envisioned. The system derives a plurality of internal reference signals from the reference signal. The internal reference signals are provided to a level detection circuit (20a) which in turn samples the input signal a number of times within a period of time. Values associated with these samples are stored, as is one value of a sample from a previous period. The stored samples are correlated, and a relationship between the input signal frequency and the reference signal frequency is derived. | ||||||
QQ群二维码
意见反馈
意见反馈