最新美国发明专利第2022-12-06期 - 专利汇|PatentHub专利检索|专利查询网|发明专利查询分析

Document	Document Title
US11522922B2	Multimedia data processing method and apparatus, storage medium, and electronic device A multimedia data processing method is provided. The multimedia data processing method includes: establishing, by a signaling processing module deployed on a remote node, a session between a terminal device and a media processing module, and controlling the session; and receiving, by the media processing module deployed on an edge computing node after the session is established with the terminal device, multimedia data transmitted by the terminal device, and processing the multimedia data.
US11522921B1	Core network bypass for toll-free calling Techniques are described for determining when and how to re-route toll-free calls around a core telephony network experiencing significant disruptions. A core telephony network of a telephony service provider is monitored for anomalies. Upon detecting an anomaly, it is determined whether the anomaly is significant enough to warrant re-routing inbound toll-free calls around the core telephony network. The re-routing process comprises accessing an industry registry database including a plurality of toll-free numbers (TFNs) associated with a routing template comprising the instructions for routing toll-free calls. The routing template instructions may be switched to re-direct toll-free calls associated with one or more specific TFNs to a particular carrier. Within that particular carrier, the routing instructions may be switched to re-direct the toll-free calls away from the service provider's core telephony network to a network bypass cloud platform. The network bypass cloud platform may be configured to receive toll-free calls, determine a customer telephony network to which to route the received toll-free calls based on the TFN of the toll-free call, and route the toll-free call to the customer telephony network.
US11522919B2	Establishing a secure communication link This disclosure is directed to devices, systems, and techniques for establishing a secure connection between two or more devices. In some examples, a device is configured for wireless communication. The device comprises signal reception circuitry configured to receive communications transmitted according to at least a first communication protocol, communication circuitry configured for wireless communication according to at least a second communication protocol, and processing circuitry electrically coupled to the signal reception circuitry and the communication circuitry. The processing circuitry is configured to receive, via the signal reception circuitry, a first signal according to the first communication protocol. In response to receiving the first signal, the processing circuitry is further configured to transmit, via the communication circuitry, a second signal according to the second communication protocol and establish a secure link according to the second communication protocol.
US11522917B2	Scalable network processing segmentation A method for processing network communications, the method including receiving a network packet at a network device and performing at least one lookup for the packet in one or more first lookup tables in which the one or more first lookup tables are programmed to include at least one of an exact match or longest prefix match (LPM) table entry. The method includes obtaining a security source segment and a security destination segment based upon the result of the at least one lookup for the packet in the one or more first lookup tables. The method further includes performing a lookup in a second lookup table based upon the security source segment and security destination segment in which the second lookup table is programmed in a content addressable memory. Based upon the result of the lookup in the second lookup table, processing a forwarding decision for the packet according to the security source segment and security destination segment.
US11522915B2	Adaptable network event monitoring configuration in datacenters Some embodiments provide a method for defining an adaptable monitoring profile for a network. The defined network monitoring profile is independent of the security policy defined for the network and includes one or more log generation rules, each of which defines a logging policy for a set of data compute nodes (DCNs) that share a common attribute. A log generation rule specifies whether the network activities of a set of DCNs that share a common attribute should be logged or not. A log generation rule can also specify other logging parameters such as priority level of the logs and the required logging protocol for transmission of the logs. The logging policy of a log generation rule is associated with a set of service rules (e.g., firewall rules) through a dynamic service group, and is applied to the service rules when any of these rules is triggered.
US11522910B1	Workflow trigger generation Methods and systems for initiating a workflow are disclosed. The systems and methods described herein may receive as input a data segment from an external source, and identify at least one type of data object present in the data segment. The systems and methods described herein may then autonomously generate an application programming interface (API) trigger to initiate a workflow, wherein the API trigger is based on the at least one type of data object present in the data segment.
US11522907B2	Apparatus and methods for mitigation of network attacks via dynamic re-routing Apparatus and methods for mitigating network attacks, such as by dynamically re-routing traffic. Various disclosed embodiments manipulate path-based routing of the backbone network to insert a scrubbing appliance within the backbone network topology, rather than using traditional network addressed tunnels in the edge network. In one implementation, traffic entering the backbone network ingress peer routers (from either another backbone network, or an edge network) is normally destination-address routed via the backbone to its appropriate egress router based on a path label; however, when a Distributed Denial of Service (DDoS) attack is detected, the ingress peer router inserts an additional hop into the path label that redirects dirty traffic to a substantially centralized scrubbing appliance. The benefits of the disclosed solutions include, among other things, significantly reduced attack response/recovery times without significant capital outlays.
US11522906B2	Malware detection method for preventing execution of malware, method for detecting domain generation algorithm, and computer device therefor A malware detection method for preventing execution of malware, a method for detecting a domain generation algorithm, and a computer device therefor are provided. The malware detection method includes monitoring, by a processor of a computer, domain name system (DNS) query requests for all processes and replies to the query requests and counting, by the processor, the number of times of failure DNS query requests per unit process and determining, by the processor, malware.
US11522905B2	Malicious virtual machine detection A method, system, and computer program product for malicious virtual machine detection is provided. The method passes network traffic from a set of virtual machines to a set of network resources. The network traffic passes through a network monitor. The network monitor monitors a set of traffic characteristics for the network traffic. A change in a network traffic characteristic is identified. The change results in a modified traffic characteristic. The method identifies a first virtual machine of the set of virtual machines. The first virtual machine is associated with the modified traffic characteristics. An alert is then generated which identifies the first virtual machine and the modified traffic characteristic.
US11522903B2	Methods and systems for evaluating effects of cyber attacks on cyber-physical systems Described are systems and methods for evaluating cyber effects in a cyber-physical system (CPS). In some embodiments, a simulation model of the CPS is built and includes an attacked component set and an evaluated component set. A control component is inserted into the simulation model. One or more direct connections between the attacked component set and the evaluated component set are disconnected. One or more indirect connections are identified and then disconnected from the simulation model with disconnected direct connections. The one or more direct connections and indirect connections are routed through the control component. A cyber-attack on the attacked component set can be simulated by configuring the control component to control outputs transmitted via a routed connection, the routed connection being one of the routed direct or indirect connections. The simulated components of the simulation model can be progressively and iteratively replaced by corresponding components from the CPS.
US11522902B2	Reliability calculation apparatus, reliability calculation method and program A level-of-confidence calculation apparatus includes a first collecting unit that collects relevant information related to first threat intelligence that is input; a second collecting unit that collects, from a memory unit storing threat intelligence to which a level of confidence is appended, second threat intelligence related to the relevant information; a generation unit that generates a graph in which the first threat intelligence, the relevant information, and the second threat intelligence are set as nodes and the nodes relating to related information are connected; and a calculating unit that calculates, by applying a belief propagation method to the graph, a level of confidence of the first threat intelligence based on a level of confidence of the second threat intelligence, and therefore a level of confidence of threat intelligence with uncertain level of confidence can be calculated.
US11522901B2	Computer security vulnerability assessment A system receives binary data and first identification data. The binary data includes hashes of strings of bits, bytes, words or characters. The system receives vulnerability data and second identification data. The system determines a correspondence between the binary data and the vulnerability data based on matching the first identification data with the second identification data. The vulnerability data includes a country of origin for a product identified by the second identification data. The system generates a binaries-to-vulnerabilities database. The system scans target binary data from a target device to to find matches between the target binary data and the binary data using the binaries-to-vulnerabilities database. The system determines a known security vulnerability based on the results of the scanning and the correspondence between the binary data and the vulnerability data. The known security vulnerability includes the country of origin for the product in the target device.
US11522894B2	Methods, systems, and devices for dynamically modeling and grouping endpoints for edge networking Various embodiments described herein disclose an endpoint modeling and grouping management system that can collect data from endpoint computer devices in a network. In some embodiments, agents installed on the endpoints can collect real-time information at the kernel level providing the system with deep visibility. In some embodiments, the endpoint modeling and grouping management system can identify similarities in behavior in response to assessing the data collected by the agents. In some embodiments, the endpoint modeling and grouping management system can dynamically model groups such as logical groups, and cluster endpoints based on the similarities and/or differences in behavior of the endpoints. In some embodiments, the endpoint modeling and grouping management system transmits the behavioral models to the agents to allow the agents to identify anomalies and/or security threats autonomously.
US11522893B2	Virtual private cloud flow log event fingerprinting and aggregation Techniques for fingerprinting and aggregating a virtual private cloud (VPC) flow log stream are provided. Each VPC flow log event in the VPC flow log is first determined to be a request event or a response event. A fingerprint is then generated for each VPC flow log event. The fingerprint for a VPC flow log event is generated based on the determination whether the VPC flow log event is a request event or a response event and by concatenating and encoding data contained in a set of data fields corresponding to the VPC flow log event. Based on the fingerprint generated for each VPC flow log event, related events can be detected and aggregated to form an aggregated event. Information stored with each aggregated event can then be used to better monitor the VPC.
US11522891B2	Machine learning anomaly detection of process-loaded DLLs An endpoint device monitors loading of dynamically loaded libraries (DLLs) by a process, such as during execution of the process on the endpoint device. The endpoint device can generate an endpoint-independent representation of the DLLs upon exiting of the process. The endpoint device may generate a hash, such as a one-way hash, of the endpoint-independent representation. The endpoint device may transmits the process and the hash to a management device to detect in a machine learning manner whether loading of the DLLs during the execution of the process was anomalous.
US11522888B2	Anomaly detection and troubleshooting system for a network using machine learning and/or artificial intelligence A method for anomaly detection and troubleshooting in a network includes parsing a network service descriptor (NSD) describing a network service (NS) to be deployed in the network. Monitoring data including time series of service-level metrics and resource-level metrics of network functions (NFs) of the NS are received from different domains of the network. Representations of the time series from the different domains are learned with a common dimensionality. An NS signature of the NS is computed as a cross-correlation matrix comprising cross-correlations between the service-level metrics and the resource-level metrics of the NFs. Embeddings of the NS signature are learned using a model and determining a reconstruction error of the model. It is determined whether the NS is anomalous based on the reconstruction error of the model. The NS is identified as a target for the troubleshooting in a case that the NS was determined to be anomalous.
US11522887B2	Artificial intelligence controller orchestrating network components for a cyber threat defense A cyber-threat coordinator-component identifies devices and/or users that are in a breach state of a benchmark of parameters, utilized by AI models, that correspond to the normal pattern of life for the network. The cyber-threat coordinator-component sends an external communication to selected network devices in order to initiate actions with that network device in order to change a behavior of a detected threat of at least one a user and/or a device acting abnormal to the normal pattern of life on the network. The initiated actions are also targeted to minimize an impact on other network devices and users that are i) currently active in the network and ii) that are not in breach of being outside the normal behavior benchmark.
US11522883B2	Creating and handling workspace indicators of compromise (IOC) based upon configuration drift Systems and methods for creating and handling workspace indicators of compromise (IOC) based upon configuration drift are described. In some embodiments, a memory storage device may have program instructions stored thereon that, upon execution by one or more processors of an Information Handling System (IHS) of a workspace orchestration service, cause the IHS to: receive configuration information from a client IHS at a workspace orchestration service, where the configuration information represents a change in a configuration of a workspace executed by the client IHS, and where the workspace is instantiated based upon a workspace definition provided by the workspace orchestration service; determine, by the workspace orchestration service, that the configuration information matches an IOC; and transmit, from the workspace orchestration service to the client IHS, an instruction to perform an action responsive to the IOC.
US11522882B2	Detection of adversary lateral movement in multi-domain IIOT environments Implementations are directed to methods for detecting and identifying advanced persistent threats (APTs) in networks, including receiving first domain activity data from a first network domain and second domain activity data from a second network domain, including multiple alerts from the respective first and second network domains and where each alert of the multiple alerts results from one or more detected events in the respective first or second network domains. A classification determined for each alert of the multiple alerts with respect to a cyber kill chain. A dependency is then determined for each of one or more pairs of alerts and a graphical visualization of the multiple alerts is generated, where the graphical visualization includes multiple nodes and edges between the nodes, each node corresponding to the cyber kill chain and representing at least one alert, and each edge representing a dependency between alerts.
US11522881B2	Structural graph neural networks for suspicious event detection A computer-implemented method for graph structure based anomaly detection on a dynamic graph is provided. The method includes detecting anomalous edges in the dynamic graph by learning graph structure changes in the dynamic graph with respect to target edges to be evaluated in a given time window repeatedly applied to the dynamic graph. The target edges correspond to particular different timestamps. The method further includes predicting a category of each of the target edges as being one of anomalous and non-anomalous based on the graph structure changes. The method also includes controlling a hardware based device to avoid an impending failure responsive to the category of at least one of the target edges.
US11522872B2	CAN transceiver A transceiver for sending and receiving data from a controller area network (CAN) bus is disclosed. The transceiver includes a microcontroller port, a transmitter and a receiver. The transceiver is configured to receive a data frame from a microcontroller via the microcontroller port and to determine if the microcontroller is authorized to send the data frame or part of it based on a message identifier in the data frame and the outcome of the arbitration process. If the microcontroller is unauthorized to send the data, the transceiver is configured to invalidate the data frame and disconnect the microcontroller from the CAN bus for a predetermined period.
US11522866B2	Account access recovery system, method and apparatus Some embodiments of the invention provide a program for recovering access to a service associated with an account. The program provides a login credential to log into the account to receive the associated service. Next, the program receives an access continuation parameter (ACP) after logging into the account. The program then accesses the service and receives a rejection of a subsequent access to the service. The program then provides the ACP in lieu of the login credential to continue to receive the service.
US11522864B1	Secure identity transfer A first request is received for a temporary alternate identifier for a user, wherein the user is identified within a service using a user service identifier, and wherein the temporary alternate identifier assists in transferring the user service identifier from the service to a resource. In response to the first request, the temporary alternate identifier is generated and associated with the user service identifier. The temporary alternate identifier is then provided the user, and the temporary alternate identifier is also provided by the user to the resource. A second request is received, from the resource, for an associated service identifier that is associated with the temporary alternate identifier. An indication is then provided, to the resource, that the user service identifier is the associated service identifier.
US11522863B2	Method and system for managing resource access permissions within a computing environment A computer-implemented method for revoking access permissions to computing resources, the method including retrieving certification rules for a computing resource; receiving information related to a user associated with an access permission for the computing resource; comparing the information with the certification rules to determine compliance with the certification rules; and responsive to determining that compliance with the certification rules fails, revoking the access permission.
US11522862B2	Systems and methods for a trusted entity to facilitate authentication of emails sent by 3rd parties A company may authorize a 3rd party to send emails on behalf of the company's domain. The emails are sent by the 3rd party, but the “From” portion of the email header is populated with the company's email address/domain. Methods are disclosed that, in some embodiments, enable email authentication (e.g. SPF record checks and/or DKIM verification) for emails sent by the 3rd party on behalf of a company's domain. In some embodiments, a trusted entity is enlisted to communicate with the 3rd party and the company. The trusted entity has the proper permissions to request changes in the DNS records of the company. The trusted entity receives the request from the 3rd party to add email authentication information to the DNS record. The trusted entity confirms that the 3rd party is authorized by the company and then adds the information to the DNS record.
US11522861B2	Methods to authorizing secondary user devices for network services and related user devices and back-end systems Methods are provided to authorize a secondary user device for a network service provided over a network. Responsive to receiving a request from a primary user device, a voucher may be transmitted over the network to the primary user device. A request for an authorization waiver may be received from the secondary user device over the network, wherein the request for the authorization waiver includes the voucher that was transmitted to the primary user device. Responsive to receiving the request from the secondary user device including the voucher, an authorization waiver may be transmitted to the secondary user device. Related methods of operating primary and secondary user devices are also discussed.
US11522860B2	Storage integration with an external storage location A command to load or unload data at a storage location is received. In response to the command, a storage integration object associated with the storage location is identified. The storage integration object identifies a cloud identity object that corresponds to a cloud identity that is associated with a proxy identity object corresponding to a proxy identity granted permission to access the storage location. The data is loaded or unloaded at the storage location by assuming the proxy identity.
US11522858B2	Event based transfer of did delegated authority Embodiments are related to computing systems and methods for event based transfer of DID delegated authority. An indication is received that a first DID user is attempting to use a delegated DID on behalf of a second DID user. The first DID user has previously been delegated authority to use the delegated DID by operation of a legal relationship or a legal agreement between the first and second DID users. A determination is made if an event has occurred that has changed the legal relationship or the legal agreement between the first and second DID users. If an event has occurred, the delegation of authority to use the delegated DID is automatically revoked such that the first DID user is no longer able to use the delegated DID. If an event has not occurred, the first DID user is allowed to continue to use the delegated DID.
US11522857B1	Video gateway for camera discovery and authentication A video gateway device at a worksite (or other location) automatically locates cameras on the network, authenticates the gateway device with the cameras, and initiates streaming of a video stream (and/or other camera sensor data) from the cameras. For example, a worksite with existing cameras from multiple manufacturers, models, and/or capabilities may all be automatically registered with the video gateway devices through a series of automated communication and authentication attempts.
US11522853B2	Image forming apparatus having transmission function, and control method and storage medium therefor An image forming apparatus capable of maintaining user's convenience in performing transmission while utilizing a transmission setting even when destinations usable for the transmission according to the transmission setting are restricted to a predetermined destination such as an authenticated user's address in order to enhance security. In a case where destinations usable for the transmission according to the transmission setting are restricted to an authenticated user's address and where at least one transmission destination registered in the transmission setting differs from the user's address, the at least one transmission destination registered in the transmission setting is rewritten to the authenticated user's address.
US11522852B2	Display system, display method, and recording medium In a display system according to the present disclosure, a server device includes an authentication processor that authenticates a user for use of a file, based on authentication information of the user input at a user terminal and an access information generator that generates first access information for accessing the file if the user is authenticated by the authentication processor for use of the file, and a display device includes a file acquirer that acquires the file from the server device, based on the first access information generated by the access information generator, and a display processor that displays the file acquired by the file acquirer, on the display.
US11522851B2	Secured rest execution inside headless web application A system and method for facilitating establishing a secure connection between a client application and a content provider. An example method includes employing a security gateway to authenticate a client for communications therewith; maintaining, for the client, security credentials for a data provider via a security configuration module, wherein the security credentials are associated with a description of data, which is associated with a data provider; using the gateway to determine which of the security credentials to use to fulfill the request message received by the security gateway from the client based on the request; and employing the selected security credentials to selectively retrieve data from and deliver the data to the client application. The example method may further include generating the request message when a User Interface (UI) control displayed in a UI display screen of a browser client is selected or activated.
US11522849B2	Authentication system and computer readable medium In an authentication system (120) of a first organization that a first user belongs to, when the first user accesses a service of another organization from a user terminal of the first organization, an authentication device (300) receives a hello message from another organization system, encrypts the hello message using a client private key of the first user, and sends the encrypted hello message to said another organization system as a signature message.
US11522845B2	Methods and systems for automatically and securely joining an association A method for joining an association that includes receiving, by a first cluster, an association access credential and a unique address of an association manager, generating, based on the association access credential, an association access request, sending, to the unique address, the association access request, receiving, in response to the sending, association information, and initiating, based on the association information, a connection to a second cluster in the association.
US11522843B2	Method and devices for communicating between an internet of things device and a remote computer system For communicating between an Internet of Things (IoT) device and a remote computer system, the IoT device transmits an upload data message via a close range communication circuit to a mobile communication device, for forwarding to the remote computer system. The remote computer system receives the upload data message via a mobile radio communication network and stores an address of the mobile communication device, as a communication relay address for the IoT device. The remote computer system transmits a download data message via the mobile radio communication network to the communication relay address, for forwarding to the IoT device. The IoT device receives the download data message from the remote computer system, as forwarded by the mobile communication device via the close range communication circuit.
US11522842B2	Central trust hub for interconnectivity device registration and data provenance Apparatus and method for device and data authentication in a computer network, such as but not limited to an IoT (Internet of Things) network. In some embodiments, a trust hub device is coupled to an interconnectivity device. The trust hub device includes a controller and non-volatile memory (NVM), and may be a network capable data storage device. The interconnectivity device is configured as an Internet of Things (IoT) or Operational Technology (OT) device, and includes a controller and a sensor. Data from the sensor are transferred from the interconnectivity device to the trust hub device. The trust hub device proceeds to attest a provenance of the data from the sensor to a remote entity associated with the interconnectivity device. The trust hub device includes a firewall to the external network, establishes a root of trust for the local interconnectivity device, and performs enrollment and signing services for the interconnectivity device.
US11522840B2	Automatic client device registration Broadly speaking, the present technique provides methods, apparatuses and systems for performing a TLS/DTLS handshake process between machines in a manner that reduces the amount of data sent during the handshake process.
US11522830B2	System and method of acquiring network-centric information for customer premises equipment (CPE) management A method, device, and computer-readable medium are provided for sending, by a customer-premises equipment (CPE) device to a wireless access device via a CPE network interface, an Internet protocol (IP) address lease request, wherein the wireless access device terminates a wireless backhaul connection to a service provider network; receiving, responsive to the IP address lease request, an acknowledge message that includes a requested IP address and a protocol configuration option (PCO) providing identification information for the wireless access device; connecting, via the wireless access device and using the requested IP address, to a bootstrap server device associated with the service provider network; receiving, via the wireless access device, attachment information associated with a network management server and the service provider network; and sending, via the wireless access device, the identification information to the network management server in an attachment procedure using the attachment information.
US11522827B2	Detecting relayed communications Methods, apparatus and computer readable code for determining whether a potential relay device is a relay device are provided herein. In some embodiments, first and second information elements are received from a potential relay device, which is an original source of the second information element. In order to determine whether the potential relay device is a relay device, it is determined whether a feature of an original source of the first information element and a feature of the potential relay device are features unlikely to relate to a single device, wherein a positive result of the determining is indicative that the potential relay device is a relay device. In an exemplary embodiment, a disclosed system includes an information element receiver and a feature incompatibility analyzer. Optionally, the disclosed system includes a feature discovery module, a parameter obtainer and a feature database.
US11522826B2	Automatic IPV6/IPV4 fallback approach in proxy networks The method for an automated IPv6/IPv4 fallback approach in proxy networks is presented. In some embodiments, the method comprises receiving, at a proxy server, a request from a client executing on a client computer for access to a target computer; determining identification-information of the client; determining an address pair including an IPv6 address and an IPv4 address of the proxy server; assigning the address pair to the identification-information of the client; establishing a first communications connection between the client computer and the proxy server using one of IP addresses included in the address pair, and a second communications connection between the proxy server and the target computer using one of IP addresses included in the address pair; and facilitating a network packet flow between the client computer and the target computer using the first communications connection and the second communications connection.
US11522823B2	Method and apparatus for storing email messages A method for saving an email to an electronic storage location is disclosed. A topic identifier located in the email is used to locate a storage location on the electronic storage device for saving the email message. Emails relating to the same topics of interest may be stored in the same storage location.
US11522822B1	Ephemeral gallery elimination based on gallery and message timers A server maintains a gallery of ephemeral messages respectively comprising visual media content, such as user-provided photographic content or user-provided video content. Each ephemeral message is posted to the gallery by a user for viewing by recipients via recipient devices. In response to a gallery view request from any of the recipient devices, the ephemeral messages in the gallery are displayed on the requesting device in automated sequence, each message being displayed for a respective display duration before display of the next message in the gallery. The gallery has a global gallery availability parameter, and each message has a gallery participation timer. The gallery is made unavailable for viewing upon expiry of the gallery availability parameter or upon expiry of the gallery participation timer of a last posted message in the gallery, whichever occurs first.
US11522817B1	Spatial dispersion buffer An improved buffer for networking and other computing devices comprises multiple memory instances, each having a distinct set of entries. Transport data units (“TDUs”) are divided into storage data units (“SDUs”), and each SDU is stored within a separate entry of a separate memory instance in a logical bank. One or more grids of the memory instances are organized into overlapping logical banks. The logical banks are arranged into views. Different destinations or other entities are assigned different views of the buffer. A memory instance may be shared between logical banks in different views. When overlapping logical banks are accessed concurrently, data in a memory instance that they share may be recovered using a parity SDU in another memory instance. The shared buffering enables more efficient buffer usage in a network device with a traffic manager shared amongst egress bocks. Example read and write algorithms for such buffers are disclosed.
US11522816B2	Multi-stride packet payload mapping for robust transmission of data Systems and methods for packet payload mapping for robust transmission of data are described. For example, methods may include receiving, using a network interface, packets that each respectively include a primary frame and one or more preceding frames from the sequence of frames of data that are separated from the primary frame in the sequence of frames by a respective multiple of a stride parameter; storing the frames of the packets in a buffer with entries that each hold the primary frame and the one or more preceding frames of a packet; reading a first frame from the buffer as the primary frame from one of the entries; determining that a packet with a primary frame that is a next frame in the sequence has been lost; and, responsive to the determination, reading the next frame from the buffer as a preceding frame from one of the entries.
US11522815B2	Switch, control apparatus, communication system, communication control method and program A switch comprises: a register; a control entry holding part that holds control entries set by a predetermined control apparatus; a packet processing part that selects a control entry to be applied to a received packet by referring to a value on the register in addition to match conditions for the control entry; a register change part that changes the value on the register in a case where a change instruction for the value on the register is set to the control entry selected.
US11522814B2	Virtualized fabric login server for storage area network Techniques for a virtualized fabric login server for a storage area network are described herein. An aspect includes operating a storage area network, the storage area network including a hybrid control plane. Another aspect includes managing, using a virtualized fabric login server and the hybrid control plane, the storage area network, wherein the virtualized fabric login server is disposed in a container that is hosted on an element of the storage area network.
US11522813B2	Software-enhanced stateful switching architecture A stateful packet processing system includes: a first stateful stage including a first state table and a first finite state machine (“FSM”) table; and a second stateful stage including a second state table and a second FSM table. The system performs a distribution operation defining when a flow is processed by the first and/or the second stateful stage. The first and/or second FSM table is extended with states and transitions that support the distribution operation. The first and/or second stateful stage executes an evaluation operation that executes the distribution operation. The evaluation operation provides a criterion for moving a particular flow from one of the first or second stateful stage to the other stateful stage. The first and second stateful stages are included in a software-defined networking (“SDN”) switch. The distribution operation operates within defined capabilities of a software and/or hardware pipeline of the SDN switch.
US11522808B2	Shared storage model for high availability within cloud environments Techniques are provided for a high availability solution (e.g., a network attached storage (NAS) solution) with address preservation during switchover. A first virtual machine is deployed into a first domain and a second virtual machine is deployed into a second domain of a computing environment. The first and second virtual machines are configured as a node pair for providing clients with access to data stored within an aggregate comprising one or more storage structures within shared storage of the computing environment. A load balancer is utilized to manage logical interfaces used by clients to access the virtual machines. During switchover, the load balancer preserves an IP address used to mount and access a data share of the aggregate used by a client.
US11522807B2	Computationally efficient analysis and management of systems modeled as networks A technique is described for quantifying a change in a system parameter in response to a perturbation of another system parameter. The technique identifies a region of influence of the perturbation and limits the propagation of the perturbation to the identified region.
US11522805B2	Technologies for protocol-agnostic network packet segmentation Technologies for protocol-agnostic network packet segmentation includes determining whether a size of a payload of a network packet to be transmitted by the compute device exceeds a maximum size threshold and segmenting the payload into a plurality of segmented payloads if the size of the payload exceeds the maximum size of threshold. The payload may be segmented based on segmentation metadata associated with the network packet.
US11522801B2	Reducing packet delay variation of time-sensitive packets A first node provides a time function to a second node. The first node generates a time function protocol data unit required for supporting the time function and generates a plurality of preamble protocol data units. The plurality of preamble protocol data units are sent before the time function protocol data unit. The preamble protocol data units carry routing information to cause the preamble protocol data units to follow a same network path as the time function protocol data unit. At an intermediate node the plurality of preamble protocol data units, the time function protocol data unit and other data traffic are stored in queues of different priority level. The intermediate node controls a time order of forwarding based on priority levels of the queues.
US11522799B1	Dynamically managed data traffic workflows Dynamic management of data traffic workflows is performed. An event to perform a data traffic workflow at a remote performance location may be received. Computing resources to perform the data traffic workflow may be identified. Operations to perform the data traffic workflow may be dynamically directed by the identified computing resources to adaptively balance performance of the operations with operations for other data traffic workflows in order to meet respective performance requirements of the data traffic workflows.
US11522793B2	Stitching label sending method, receiving method, and device A stitching label sending method, receiving method, and a device, the sending method including receiving, by a controller, first label range information sent by an intermediate device, where the first label range information indicates a first label range in a plurality of label ranges of the intermediate device, selecting, by the controller, a label from the first label range as a stitching label, and sending, by the controller, to the intermediate device, the stitching label and a first label stack corresponding to the stitching label, where the first label stack indicates a first label switched path starting from the intermediate device.
US11522791B2	Dynamic multipathing using programmable data plane circuits in hardware forwarding elements Some embodiments provide a novel method for adjusting a path for a packet flow from a source machine to a destination machine in a network. The method of some embodiments identifies a condition at a first forwarding element along a first path traversed by the packet flow through the network. The first path traverses through a hardware, second forwarding element before the first forwarding element. In some embodiments, the second forwarding element includes a programmable data plane circuit. The method, in some embodiments, uses an application programming interface (API) of the programmable data plane circuit to provide a set of parameters to the data plane circuit that cause the data plane circuit to forego selecting the first path to forward the packets of the packet flow to the destination machine and instead to select a second path, not traversing the first forwarding element, to the destination machine.
US11522790B2	Multipath data transmission processing method and network device Embodiments of this application relate to a multipath data transmission processing method and a network device. A first network device receives a packet from a first host device, and determines a first connection identifier between the first network device and a second network device based on the packet. The first network device encapsulates the packet based on the first connection identifier. The first network device sends the encapsulated packet to the second network device through one of a plurality of subflows between the first network device and the second network device. According to the embodiments of this application, multipath data transmission is implemented, a data transmission rate is increased, and a host device does not perceive a plurality of paths. The embodiments of this application can be applied to any existing communications system.
US11522785B2	Intelligent path selection systems and methods to reduce latency Described embodiments provide systems and method for intelligent path selection to reduce latency and maintain security. A client can request access to a server and multiple connections can be initiated to the requested destination, for example, a direct connection from a branch office and a backhauled connection through a data center. Traffic via the second connection can be controllable by application of at least one rule of the data center. A device can determine a delay in the exchange of data via the connections and a security level of the connections. The determination of the delay in the exchange of data via the another connection can be based on in part feedback about the application of the rule. The device can connect a client device to a server through one of the connections using the determination of the delay and the security level of the connection.
US11522784B2	Routing and forwarding method for multi-homed network based on programmable network technology A programmable network technology-based multi-homed network routing and forwarding method includes a data packet performing address-to-port matching a forwarding flow table address matching method; classifying addresses to matched ports corresponding to a destination address group; selecting a link information table and a port selection function, an appropriate port and a corresponding destination address group; cropping destination address groups of the remaining ports using an address filtering function and previous hop information carried in data to further crop the remaining destination address groups and addresses in the destination address group, a single destination address can be determined using a single address selection method, taking the single destination address using a universal routing and forwarding method to forward a packet to the destination address; otherwise, packaging the destination address group, and using a single address selection method to determine the single destination address hop by hop until the destination address is reached.
US11522780B1	Monitoring networks by detection of noisy agents Usually agents probe other agents across the network to determine health of a network. However, it is also useful for agents to probe themselves. Such a test probe is off-network in that it does not leave a server rack. The off-network probes can be used to detect noisy agents, which can be excluded from further consideration in evaluating overall network quality. The off-network probing of the agents can be done in a loopback interface of the host device or via a top-of-rack switch to another distinct agent in the rack.
US11522772B2	Systems and methods for rapid booting and deploying of an enterprise system in a cloud environment The present disclosure relates to systems and methods for deploying enterprise systems in cloud environments. In one implementation, a system for deploying an enterprise system in a cloud environment may include at least one processor configured to provide: one or more first containers hosting at least one application with at least one enterprise function; one or more second containers hosting at least one microservice configured to activate the at least one enterprise function; at least one application programming interface (API) between the at least one microservice and at least one client; and at least one gateway configured to manage access to the at least one API.
US11522770B2	Visual overlays for network insights Examples described herein include systems and methods for providing network insights on a graphical user interface (“GUI”). The GUI can visualize network errors to help administrative or information technology users more quickly identify issues with an enterprise application. The enterprise application can report network request information to a server. Then the GUI can present visual overlays that compare error metrics between different time cycles of the application. The visual overlay can graphically display these errors on top of one another for immediate relative visualization. Additionally, a grouped list of host destinations can be simultaneously provided. The destination addresses can be abbreviated, and errors grouped accordingly in a manner that provides advantageous error visualization.
US11522768B2	Notifications with input-based completion Techniques are disclosed for presenting notifications that can receive input data. The techniques include presenting a notification in response to occurrence of an event, wherein the notification is associated with a specified data type and a data source from which data is to be received, receiving input data of the specified data type from the data source, wherein the notification is presented until the input data is received, and storing the input data. The notification can block access to a user interface of at least one application until the input data is received. The data source can be a data entry component of a user interface that receives user input, or can be an application that provides data of the specified data type, and receiving input data can include requesting data of the specified data type from the application, and receiving the input data from the application via inter-process communication.
US11522764B2	Forwarding element with physical and virtual data planes Some embodiments of the invention provide a novel method of performing network slice-based operations on a data message at a hardware forwarding element (HFE) in a network. For a received data message flow, the method has the HFE identify a network slice associated with the received data message flow. This network slice in some embodiments is associated with a set of operations to be performed on the data message by several network elements, including one or more machines executing on one or more computers in the network. Once the network slice is identified, the method has the HFE process the data message flow based on a rule that applies to data messages associated with the identified slice.
US11522762B2	Coordination device and method for providing control applications via a communication network for transmitting time-critical data Coordinator and method for providing control applications via a communication network, wherein prior to migrating a flow control component of a control application to a server device, a coordinator checks whether a data stream for transmitting application data was set up for the control application, where the coordinator enables migration of the flow control component if a data stream has not been set up, in the event a data stream had been set up previously, a check is performed to determine whether sufficient resources for data transmission are available for paths to the server device, such that if sufficient resources are unavailable, migration of the respective flow control component is stopped, and if sufficient resources are available, the coordinator prompts set-up of the data stream to the server device and disconnection of the previously set-up data stream and enables migration of the flow control component to the server device.
US11522760B2	Systems and methods for profiling and clustering network-connected devices A network device determines when multiple users each connect to a network using one or more devices. The network device obtains device or network-related parameters associated with the one or more devices and generates profiling vectors for each of the multiple users, that connects to the network using the one or more devices, to produce multiple profiling vectors. The network device clusters the multiple profiling vectors to identify cluster centers associated with a plurality of user groups, and determines first users of the multiple users for, or with, whom to perform certain actions or activities based on the first users' affinity with one or more of the plurality of user groups. The network device performs the certain actions or activities with respect to the determined first users.
US11522759B2	Method and device manager for controlling program components in a network device A method and device manager for controlling program components in a network device, wherein the network device is used for handling data traffic in a communication network. First, the device manager identifies, out of a set of predefined policies, a policy comprising rules which determine how the network device should operate when handling data traffic. Then, program components required to fulfil the identified policy are identified and existing program components present in the network device are determined. The device manager further pushes any of the required program components being absent in said existing program components, to the network device. Thereby, any network device(s) can be configured and/or upgraded automatically according to appropriate predefined policies, requiring a minimum of manual work. The predefined policies can also easily be modified or extended to deploy new and/or upgraded functions.
US11522754B2	Systems and methods for Zero-Touch Provisioning of a switch in intermediate distribution frames and main distribution frames Systems and methods are provided herein for an improved method of Zero-Touch Provisioning (ZTP) where a first switch receives a virtual local area network (VLAN) identifier from a second switch, allowing the first switch to reach a dynamic host configuration protocol (DHCP) server. This may be accomplished by a first switch receiving a VLAN identifier from a second switch. The first switch then transmits a DHCP discover message using the VLAN identifier. The first switch then receives reachability information for a ZTP server from the DHCP server. The first switch uses the reachability information to establish a provisioning session between the first switch and the ZTP server.
US11522749B2	Detecting communication pathways affected by session flaps A method that includes retrieving a first list of routing prefixes learned by a border node in a first network fabric and retrieving a second list comprising addresses of nodes in a second network fabric. The method also includes generating a dependency mapping based on the routing prefixes in the first list and the addresses in the second list. The dependency mapping indicates that network traffic to the addresses of the nodes in the second network fabric is affected by the border node in the first network fabric. The method further includes, in response to detecting that the border node in the first network fabric has malfunctioned and based on the dependency mapping, generating an alert indicating that network traffic to the addresses of the nodes in the second network fabric is affected by the border node in the first network fabric malfunctioning.
US11522747B1	Cloud service outage reporting Various examples are directed to systems and methods for providing software services to one or more consumer systems. A cloud service provider system may receive a first outage message from a second cloud service provider system. The first outage message may describe a first outage of a first software service consumed by the first cloud service provider system and provided by the second cloud service provider system. The cloud service provider system may apply a set of outage inheritance rules to the first outage message and determine that the first outage is to be auto-reported. The cloud service provider system may render a revised first outage message and send the revised first outage message to a consumer system that receives a second software service provided by the cloud service provider system.
US11522744B2	Reference signal design for cellular broadcast Various aspects of the present disclosure generally relate to wireless communication. In some aspects, a user equipment (UE) may determine a set of resources, in a set of physical multicast channel symbols, for receiving a first type of reference signal and a second type of reference signal. The UE may receive one or more reference signal transmissions in accordance with the set of resources. Numerous other aspects are provided.
US11522741B2	Receiver, communication apparatus, method and computer program for receiving an amplitude shift keyed signal A method of a receiver is used for receiving an amplitude shift keyed signal provided over a multi-layered transmission from a plurality of antennas with different precoding of different symbols for the respective layers. The method comprises receiving a sequence of signal values of the signal, estimating, from the sequence of signal values, channels for the respective layers, and selecting one of a plurality of detection methods based on a difference in quality between the estimated channels A receiver and a computer program are also disclosed.
US11522738B1	High-speed communication link with self-aligned scrambling High-speed communication links with self-aligned scrambling on a communication link that sends scrambled signals may include a slave device that may self-align by initially detecting an unscrambled preamble symbol and more particularly detect an edge of the unscrambled preamble symbol. Based on the detected edge, a fine alignment adjustment may be made by testing subsequent scrambled data for a repeated pattern such as an IDLE symbol by comparing the repeated pattern to a candidate scrambled sequence that has been received through the communication link. The comparison may use an exclusive OR (XOR) circuit on some bits to derive a scrambler seed that is used to test for a match for the remaining bits. If there is a match, the scrambler seed and frame alignment have been detected and alignment is achieved.
US11522737B2	Systems and methods for automatic level control Systems and methods for automatic level control (ALC) are provided. In one embodiment, an ALC system for communications signals comprises: a multi-threshold programmable ALC controller; and at least one signal path that includes: a digital step attenuator configured to receive an analog communications signal and attenuate the analog communications signal in response to an attenuation adjustment signal from the ALC controller; and an analog-to-digital converter configured to receive the analog communications signal as attenuated by the digital step attenuator and generate samples of the attenuated analog communications signal, wherein the ALC controller receives the samples. The ALC controller comprises a plurality of clip detectors that function in parallel. Each of the clip detectors are programmed with a respective amplitude and time threshold. Based on which of the plurality of clip detectors determine that the samples exceed their respective amplitude and time threshold, the ALC controller generates the attenuation adjustment signal.
US11522736B2	Analog front-end receiver and electronic device including the same receiver An analog front-end receiver including a termination resistor configured to receive first and second differential signals from different data lines, the second differential signal being differential with respect to the first differential signal, an active equalizer configured to receive a first input differential signal through a first input node and a second input differential signal through a second input node, the first and second input differential signals both having an input common mode voltage, the first and second input differential signals being based on the first and second differential signal, respectively, and output first and output differential signals to first and second output nodes, respectfully, the second output differential signal being differential with respect to the first output differential signal, and an input common mode voltage generator configured to adjust the input common mode voltage to be equal to an output common mode voltage of the first output differential signal.
US11522733B2	Gateway device determining whether or not received frame is appropriate A gateway device for a vehicle network system installed in a vehicle is provided. The vehicle network system includes a network, an electronic control unit connected to the network, and the gateway device connected to the first network and configured to communicate outside the vehicle. The gateway device receives a first frame from outside the vehicle; determines whether or not the first frame is appropriate; generates a second frame when the first frame is not determined to be appropriate; and transmits the second frame to the network. The second frame includes control information and additional information based on content of the first frame. The control information restricts processing of the additional information included in the second frame by the electronic control unit, after the second frame is received by the electronic control unit.
US11522729B2	Method, apparatus and computer program product for generating externally shared communication channels Methods, apparatus and computer program product for causing a rendering of a graphical icon associated with a message communication, wherein the message communication is received in a shared communication channel in a group-based communication platform. The graphical icon comprises a user avatar associated with a sender of the message communication and a group icon indicating association of the message communication with a group. A computer-implemented method may include receiving, from a first client and in a shared communication channel on the group-based communication platform, a message communication; transmitting, to a plurality of clients associated with the shared communication channel, the message communication; and causing rendering of the message communication with a first graphical icon within a shared communication channel interface associated with the shared communication channel, wherein the first graphical icon comprises (i) a first user avatar indicating that the message communication is associated with the first user, and (ii) a first group icon indicating that the message communication is associated with the first group identification.
US11522728B2	PoE system for the distribution of high voltage power The present invention provides a system comprising PoE apparatus including midspans, switches and routers that can provide high powered PoE connections that enable the recovery of DC power in sufficient quantities that allow it to be converted to AC power by way of an inverter. The invention also provides a method for providing AC power, data and light to office workstations using a single PoE connection. The invention further comprises a common mode signaling system that operates independently of any TCP/IP signal transmitted through an Ethernet connection wherein said signaling system is adapted to communicate with and control PoE powered devices.
US11522727B2	Cooperative power management Embodiments are generally directed to managing power consumption of powered devices. In some embodiments, the powered devices draw power from a common source of power, which is limited. Under certain circumstances, exceeding the power limits can cause interruption of power to one or more of the devices, thus introducing a source of communication failures. To ensure reliable communications, an attempt to increase a power consumption of a first powered device in a power group is first reviewed to determine if the increase will cause a supplied power of the group to exceed a maximum power of the group. If the increase will cause the maximum power to be exceeded, the increase is modified, in some circumstances, to fit within the maximum power level. Alternatively, power consumption of a lower priority device is reduced to accommodate the requested power consumption increase.
US11522725B2	Reducing amount of helper data in silicon physical unclonable functions via lossy compression without production-time error characterization A method, system and computer program product for reducing the amount of helper data that needs to be stored using two innovative techniques. The first technique uses bit-error-rate (BER)-aware lossy compression. By treating a fraction of reliable bits as unreliable, it effectively reduces the size of the reliability mask. With the view of practical costs of production-time error characterization, the second technique enables economically feasible across-temperature per-bit BER evaluation for use in a number of fuzzy extractor optimizations based on bit-selection to reduce overall BER (with or without subsequent compression) using room-temperature only production-time characterization. The technique is based on stochastic concentration theory and allows efficiently forming confidence intervals for average across-temperature BER of a selected set of bits. By using these techniques, it is economically feasible to achieve a dramatic reduction in the amount of helper data that needs to be stored in non-volatile memory and/or one-time-programmable memory.
US11522724B2	SRAM as random number generator An approach is provided in which an information handling system performs multiple tests on a memory device using different supply voltage levels. The information handling system identifies a set of memory cells in the memory that produce a same set of results during each of the memory tests at the different supply voltage levels, and generates a random number based on a set of data values collected from the set of memory cells. In turn, the information handling system uses the random number generator in one or more processes executed by the information handling system.
US11522721B2	System and method for establishing dynamic trust credentials for network functions Systems and methods leverage trust anchors to generate tokens which can then be used by network functions (NFs). A virtualization infrastructure manager (VIM) for a virtualized platform receives a NF software package and a certificate request token (CRT) from a management function. The NF is a virtual NF, a containerized NF, or another virtual entity (xNF) to be deployed. The CRT is digitally signed by the management function and includes a network address of a trust anchor platform and a NF profile. The VIM deploys the NF and provides the CRT to the NF. The NF obtains from the CRT the network address of the trust anchor platform, generates a certificate signing request (CSR) for a digital certificate, and submits the CSR and the CRT to the trust anchor platform. The NF receives a digital certificate from the trust anchor platform based on validation of both the CSR and CRT.
US11522714B2	User apparatus using block chain, block chain system including the same and product information managing method thereof A product for participating in a block chain system includes: a network interface configured to communicate, by using a first network, with participants of the block chain system to share block chain data, the block chain data including at least one of an ownership record block and an ownership registration block for the product; an output circuitry configured to output a notification signal; and a processor configured to determine, during a booting operation of the product, whether ownership of the product is registered in the block chain data through the network interface and to control the output circuitry to output a message requesting registration of an ownership of the product based on a determination that the ownership of the product is not registered in the block chain data.
US11522713B2	Digital credentials for secondary factor authentication The system for credential authentication comprises an interface and a processor. The interface is configured to receive a request from an application for authorization to access, wherein access to the application is requested by a user using a user device. The processor is configured to provide a login request to the user; validate a login response; determine a user authentication device based on the login response; provide a proof request to the user authentication device; receive a proof response; determine that the proof response is valid using a distributed ledger; generate a token; and provide the token to the application authorizing access for the user.
US11522712B2	Message authentication apparatus, message authentication method, and computer readable medium A message authentication apparatus compresses a message M into a value H of 2n bits, and divides the value H into two values H[1] and H[2] each having n bits. The message authentication apparatus extracts two values U[1] and U[2] each having min{t, n/2} bits from the value H[1], generates a value V[1] of t bits, using as input the message M and the value U[1], and generates a value V[2] of t bits, using as input the message M and the value U[2]. The message authentication apparatus encrypts the value H[2] by a tweakable block cipher E, using the value V[1] as a tweak, to generate a value Z[1], and encrypts the value H[2] by the tweakable block cipher E, using the value V[2] as a tweak, to generate a value Z[2]. The message authentication apparatus generates an authenticator Z from the value Z[1] and the value Z[2].
US11522711B2	Systems and methods for block chain authentication A system for providing secure authentication between a service provider and at least one user device having a storage. The system having a processor managed by the service provider, which processor manages authentication between the at least one device and the service provider. The processor is configured to generate a block including at least user account information upon receipt of an authentication request from the at least one device; apply a cryptographic hash function to the block to create a hash; transmit the hash to the at least one device for storage in the memory of the at least one device; and upon receipt of the hash, validate the hash prior to providing access to the service provider.
US11522710B2	Blockchained media stored in a material exchange format file Digital media that has been blockchained into a blockchain file format may be stored into a secondary file format like a Material eXchange Format (MXF) digital file by deconstructing the blockchain file and storing its subcomponent blockchain data and blockchain hash digests for each block within separate structures of the MXF digital file by generating a table for the blockchain hash digests that links to the blockchain data through data pointers. These separate structures of the MXF digital file are the generic container for a media file and a SDTI-CP (Serial Data Transport Interface—Content Package) compatible system item.
US11522701B2	Generating and managing a composite identity token for multi-service use Methods, systems, computer-readable media, and apparatuses may provide creation and management of composite tokens for use with services in a virtual environment without the user having to re-authenticate each time the user accesses a different service. A composite identity server may receive a request to upgrade a first authentication token for a user. The composite identity server may redirect a user agent to an identity provider for authentication and, in response, may receive a second authentication token for the user. The composite identity server may send the second authentication token to a federated microservice and, in response, may receive one or more claims of the second authentication token designated for inclusion in a composite token. The composite identity server may generate a composite token including the one or more claims of the first authentication token and one or more claims of the second authentication token.
US11522694B2	Acoustical physically unclonable function (puf) and system The present invention is a diverse acoustical object containing a range of particles that have acoustical wave impedances that are substantially different from the binder. The particles create a substantially different reflection as an acoustic wave is scattered by the particles. A negative reflection is created when the scattered wave is from a particle that has a wave impedance that is substantially less than the binder impedance. Practically, it may be necessary to encase this material in a thin material that will withstand the fabrication process (e.g., air or silicone elastomer could be encased in glass). If the wavelength is large compared to the encasing material thickness, then the reflection will be more dependent on the interior material. A mixture of materials that generate positive as well as negative reflections within the binder would add to the complexity of the PUF.
US11522687B2	Consensus-based online authentication Methods and systems for consensus-based online authentication are provided. An encryption device may be authenticated based on an authentication cryptogram generated by the encryption device. The encryption device may transmit a request for security assessment to one or more support devices. The support devices may individually assess the encryption device, other security devices, and contextual information. The support devices may choose to participate in a multi-party computation with the encryption device based on the security assessments. Support devices that choose to participate may transmit one or more secret shares or partial computations to the encryption device. The encryption device may use the secret shares or partial computations to generate an authentication cryptogram. The authentication cryptogram may be transmitted to a decryption device, which may decrypt the authentication cryptogram, evaluate its contents, and authenticate the encryption device based on its contents.
US11522686B2	Securing data using key agreement Methods and systems for securing customer data in a multi-tenant database environment are described. A key identifier received from a security server may be stored by an application server. The key identifier may be associated with a private key that is accessible by the security server and not accessible by the application server. A request to derive a symmetric key may be transmitted from the application server to the security server, the request including a public key generated by the application server, a salt value, and the key identifier. The symmetric key may then be derived based on the transmitted public key and the private key using a key derivation function. The application server may then receive and store the symmetric key in an in-memory cache, and be used to securely encrypt data received by the application server from client devices.
US11522679B2	Exposing cryptographic measurements of peripheral component interconnect express (PCIe) device controller firmware Examples disclosed herein include are computing device hardware components, computing devices, systems, machine-readable mediums, and interconnect protocols that provide for code object measurement of a peripheral device and a method for accessing the measurements to verify integrity across a computing interconnect (e.g., Peripheral Component Interconnect Express—PCIe). For example, a cryptographic processor of a PCIe endpoint (such as a peripheral) may take a measurement (e.g., computing a hash value) of a code object on the device prior to executing the code object. This measurement may be placed in a register that is accessible to another component, such as a host operating system across a PCIe bus for interrogation. The host operating system may utilize an interconnect protocol, such as a PCIe protocol to access the measurement. These measurements may be consumed by a Trusted Platform Manager or other components of a host system that may verify the measurements.
US11522675B2	Apparatus and method for encryption and decryption based on tweak converter to which key table is applied A method according to one embodiment includes generating one or more key tables based on a first seed value; generating one or more secret values from a tweak value based on the one or more key tables; and performing encryption or decryption using the one or more secret values. An apparatus according to one embodiment includes a key table generator configured to generate one or more key tables based on a first seed value, a secret value generator configured to generate one or more secret values from a tweak value based on the one or more key tables, and an encryptor/decryptor configured to perform encryption or decryption using the one or more secret values.
US11522674B1	Encryption, decryption, and key generation apparatus and method involving diophantine equation and artificial intelligence Embodiments of the invention relate to symmetric encryption that converts plain text to Diophantine equations, i.e. cipher text, and creates a symmetric key which is held by a sender (or encryption apparatus) and a recipient (or decryption apparatus). The key is used by the decryption apparatus to decrypt the Diophantine equations, and convert them to original plain text. Particularly, undecidable encryption and artificial intelligence (AI) are employed in combination. More particularly, the AI would exclude any class of Diophantine equations which has been solved or deciphered without key, or known to be solvable. In the event certain classes of Diophantine equations are solved in the future, the AI will exclude the use of these solved or solvable classes of Diophantine equation in encryption.
US11522673B2	Method and device for blockchain full sharding based on a P2P storage network and a multi-layer architecture A method for blockchain full sharding based on a P2P storage network and a multi-layer architecture is provided. The entire network blockchain nodes are divided into a shard chain, a relay chain and a beacon chain by means of network sharding, that is, shard cross-chain communication is realized by using a beacon-relay-shard three-layer architecture or an architecture with more than three layers, so that the network requirement of the nodes has a linear relationship with the total number of TPS of the network. A transaction is divided into a W primitive and a D primitive. The D primitives are grouped and hash values corresponding to the D primitives are calculated: the W primitive is executed on an initiator's shard, the D primitive is stored in the P2P storage network, and the hash value corresponding to the primitive is communicated across the chain, and finally executed on a receiver's shard.
US11522670B2	Pyramid construct with trusted score validation Disclosed herein are systems and methods for decentralized data distribution by a database network system comprising a hierarchical blockchain model. The hierarchical blockchain model may comprise a quantum pyramid consensus to distribute data throughout the database network system in a decentralized and secure manner. The hierarchical construct may be built according to trusted scores calculated for the nodes of the network over their lifetime at the network.
US11522669B2	Using cryptographic blinding for efficient use of Montgomery multiplication Aspects of the present disclosure involves receiving an input message, generating a first random value that is used to blind the input message input message to prevent a side-channel analysis (SCA) attack, computing a second random value using the first random value and a factor used to compute the Montgomery form of a blinded input message without performing an explicit Montgomery conversion of the input message, and computing a signature using Montgomery multiplication, of the first random value and the second random value, wherein the signature is resistant to the SCA attack.
US11522668B2	Receiver circuit and method capable of accurately estimating time offset of signal A method applicable to a receiver circuit, including: performing a cross-correlation operation upon at least one time-domain signal on at least one receiver path of the receiver circuit according to a local sequence signal, to estimate at least one time offset amount of the at least one time-domain signal as at least one time offset compensation amount; and, performing time offset compensation upon the at least one time-domain signal on the at least one receiver path according to the at least one time offset compensation amount.
US11522665B2	Feedback transmissions for mixed services A method for communications comprising obtaining configuration information from a network node. The configuration information is related to resource configurations of feedback transmissions with respect to data transmissions from the network node to the terminal device for different types of services. The method further comprises determining a correspondence between the resource configurations and the different types of services based at least in part on the configuration information.
US11522656B2	Apparatus and method for determining resources for phase tracking reference signal (PT-RS) pilot signals using frequency domain patterns An apparatus for wireless communication selects a recommendation for the need. The apparatus selects the resource to transmit a phase tracking reference signal based on a condition of a communication system. The apparatus performs at least one of transmitting an indication of the selected recommendation for the resource to a second wireless communication device or transmitting at least one of information or a reference signal to the second device to assist the second device in determining the resource. In an aspect, the selection may be made based on receiving a request for a recommendation from the second wireless communication device or the transmitting the at least one of the information or the reference signal are based on a request received.
US11522650B2	Methods and apparatus for multi-carrier communication systems with adaptive transmission and feedback An arrangement is disclosed where in a multi-carrier communication system, the modulation scheme, coding attributes, training pilots, and signal power may be adjusted to adapt to channel conditions in order to maximize the overall system capacity and spectral efficiency without wasting radio resources or compromising error probability performance, etc.
US11522646B2	Electronic apparatus and method According to one embodiment, an electronic apparatus includes a transmitter circuitry, a receiver circuitry, and a processing circuitry. The transmitter circuitry transmits a first data frame including first data to a destination apparatus. The receiver circuitry receives first acknowledgment information indicative of a reception state of the first data included in the first data frame. The receiver circuitry receives second acknowledgment information indicative of a reception state of the first data included in a second data frame. The second data frame is transmitted from another electronic apparatus to the destination apparatus. The processing circuitry determines whether the first data frame is retransmitted, based on at least one of the first and second acknowledgment information.
US11522644B2	Acknowledgement information sending method and apparatus An acknowledgement information sending method and apparatus is provided. A network device determines and sends downlink scheduling signaling, where the downlink scheduling signaling is used to schedule first downlink data to a terminal, the first downlink data is downlink data corresponding to acknowledgement information fed back on a same uplink control channel, and the downlink scheduling signaling is used to determine a first threshold, a second threshold, or a third threshold. The terminal receives the downlink scheduling signaling sent by the network device, determines, based on the first threshold, the second threshold, or the third threshold, the acknowledgement information corresponding to the first downlink data, and sends the acknowledgement information corresponding to the first downlink data to the network device on the same uplink control channel.
US11522641B2	Data transmission system for multiplexing a plurality of pieces of data in a layered division multiplexing (LDM) method and transmitting multiplexed data, reception device used in the data transmission system, and data transmission method therefor [Problem] To propose a technology capable of appropriately demodulating, in a receiving device, a plurality of pieces of data multiplexed through the quasi-synchronous LDM method. [Solution] A transmission device generates a UL modulated signal by using an IFFT process of NUL points, generates an LL modulated signal by using an IFFT process of NLL points different from the NUL points, and transmits signals obtained by timing-adjusting the modulated signals such that the start timings thereof coincide with each other in a predetermined cycle, and combining the timing-adjusted signals at a predetermined power ratio. In addition, the receiving device performs an NUL point FFT process on the reception signal from the transmitting device, reproduces UL and generates UL reception replica, on the basis of the result, and performs an NLL point FFT process on a signal obtained by subtracting the UL reception replica from the reception signal, and reproduces LL on the basis of the result.
US11522639B2	Mobile communication method using AI Provided is a method for transmitting or receiving data, by a user equipment (UE), to or from a base station (BS). The method includes transmitting, by the UE, capability information of the UE to the BS, wherein the capability information includes information related to artificial intelligence (AI) calculation for the data transmission or reception, receiving, by the UE, at least one of a plurality of AI parameters from the BS, and applying the at least one AI parameter to an encoding process for the data transmission or a decoding process for the data reception, wherein the encoding process or the decoding process is performed by information on a network structure in the at least one AI parameter, and wherein the at least one AI parameter comprises a plurality of information for performing the encoding process or the decoding process by the network structure.
US11522631B2	Switching at a terminal end transceiver between primary and auxiliary communication paths Disclosed herein are switch devices in terminal ends of a network and methods of using same. One embodiment relates to a terminal end of a network including a terminal end transceiver configured to communicate with one or more end user devices, and a switch device configured to automatically route communication at the terminal end transceiver between a primary communication path with a central office and an auxiliary communication path with the central office. Another embodiment relates to a method of switching between primary and auxiliary communication paths at a terminal end. Automatic switching is particularly applicable in a looped communication architecture with redundant communication paths for preventing interruption and increasing reliability for an improved user experience. Another embodiment relates to indexing with splices to reduce connections in a communication path and increase signal quality.
US11522629B2	Channelized optical amplifiers and amplifier arrays Systems and methods are provided for amplifying optical signals within one of two optical bands, such as C-band and L-band. An optical amplifying device, according to one implementation, may include a shared optical coil configured to propagate an optical signal. The optical amplifying device may further include a first junction configured to separate the shared optical coil into a first-band optical fiber and a second-band optical coil and a pump device configured to amplify the optical signal in the shared optical coil and the second-band optical coil. The first-band optical fiber may be configured to propagate the optical signal when the optical signal resides in a channel of a first plurality of channels within a first optical band. The second-band optical coil may be configured to propagate the optical signal when the optical signal resides in a channel of a second plurality of channels within a second optical band.
US11522628B2	Radio communication device and response signal spreading method A radio communication device capable of randomizing both inter-cell interference and intra-cell interference. In this device, a spreading section primarily spreads a response signal in a ZAC sequence set by a control unit. A spreading section secondarily spreads the primarily spread response signal in a block-wise spreading code sequence set by the control unit. The control unit controls the cyclic shift amount of the ZAC sequence used for the primary spreading in the spreading section and the block-wise spreading code sequence used for the secondary spreading in the spreading section according to a set hopping pattern. The hopping pattern set by the control unit is made up of two hierarchies. An LB-based hopping pattern different for each cell is defined in the first hierarchy in order to randomize the inter-cell interference. A hopping pattern different for each mobile station is defined in the second hierarchy to randomize the intra-cell interference.
US11522626B2	Acquiring current time in a network Exemplary of embodiments of the disclosure include a method which includes determining, by a first device, whether the first device has a current time and transmitting a request for the current time to a second device if the first device does not have the current time. The second device is in a local network. The method further includes receiving, by the first device, the current time from the second device, authenticating a certificate based on the current time received from the second device, and establishing a network connection to the local network based on the authenticated certificate.
US11522625B1	Predicting regional viewership for broadcast media events Techniques for regional viewership predictions of broadcast events such as live broadcast professional sporting events. The techniques can make the predictions without a direct response variable such as regional viewership data for training a prediction model. Instead, in one technique, demand information for a good or service is used. From the demand information, a derivative demand for the good or service relative to a normal demand is determined. A regression framework is used to learn relationships between the derivative demand for the good or service and features of past live broadcast sporting events. This results in a matrix of feature weights. A non-parametric mixture framework is then used to find a set of feature weights that can be applied to features of future broadcast events to generate regional viewership predictions for the events.
US11522624B2	Method for the locationally selective transmission of a signal by radio, method for the locationally selective reception of a signal by radio, and transmitter/receiver unit for carrying out such a method A method is described for the locationally selective transmission of a signal by radio. Both a transmitter and a receiver are synchronized to the same time reference. The receiver receiving and demodulating, at a time that is one of the specified times of the time reference, a signal transmitted by the transmitter, if the receiver has received the signal at a time that is one of the specified times. The method includes the transmitter determining a receive location within a receive zone to which it wishes to transmit the signal in selective fashion, a position in the receive zone being a function of a position of the transmitter and a signal runtime. The method also includes the transmitter transmitting the signal; and the receiver, which is situated inside the receive zone, receives and demodulates the signal.
US11522621B2	Method and circuit for calibrating wireless transceiver The present invention discloses a calibration method and calibration circuit for a wireless transceiver. The wireless transceiver includes a transmission path and a reception path, and there is a mixer on the transmission path. The calibration method includes the following steps: (A) adjusting a first parameter of a first LC tank circuit of the mixer; (B) receiving a first input signal via a coupling path and the reception path; (C) measuring a first power of the first input signal; (D) repeating steps (A) to (C) to obtain multiple first powers; and (E) determining a first target parameter corresponding to a largest power of the first powers.
US11522617B1	System and method for phase noise compensation in fibered optical paths A system for laser phase noise compensation for a fibered communication path, the system being configured for connection with a node of the fibered communication path, including at least one signal splitter optically coupled to a laser source of the fibered communication path, the at least one signal splitter having two output communication path, the communication paths having a path difference therebetween; an integrated coherent receiver (ICR) optically coupled to the first output communication path and the second output communication path; and a digital signal processor (DSP) communicatively connected to the ICR, the ICR being configured to determine, based signals received from the first and second output communication paths, at least one phase noise indication related to phase noise of the laser source, the DSP being configured to determine an estimated laser phase noise based on at least the at least one phase noise indication.
US11522616B2	Methods and apparatus for optical communications via pulse amplitude modulation (PAM) in dense wavelength-division multiplexing (DWDM) systems A method includes applying, to a modulated digital signal, a forward error correction (FEC) including a low-density parity-check (LDPC) to produce a coded digital signal. Nyquist shaping is applied to the coded digital signal to generate a filtered digital signal. A representation of the filtered digital signal is transmitted in an optical communication channel via a dense wavelength division multiplexing (DWDM) scheme.
US11522613B2	Adjustable bidirectional transmission micro-optoelectronic system supporting online upgrade configuration An adjustable micro-optoelectronic system supporting bidirectional transmission, an online upgrade, and online configuration. The system includes: a substrate; and edge connectors, a clock-and-data recovery (CDR) chip for transmitting, a CDR chip for receiving, a microprocessor, and an internal optical system, which are provided on the substrate. The edge connectors serve as an interface of a high-speed electrical signal, and are configured to exchange information between the micro-optoelectronic system and an external environment. The internal optical system is configured to transmit and receive an optical signal. A link for the high-speed electrical signal is connected among the edge connectors, the CDR chip for transmitting, the internal optical system, and the CDR chip for receiving. A communication connection is provided between the microprocessor and each of the edge connectors, the CDR chip for transmitting, the CDR chip for receiving, and the internal optical system.
US11522612B2	Systems, devices, and methods for optical communication A technology is described for optical communication. An example of the technology can include receiving an event stream containing indications of independent events detected by pixels in an event camera. An event may be a change in brightness detected by a pixel in the pixel array, and the pixel independently generates an indication of the event in response to detecting the event. The event stream can be demultiplexed into a plurality of communication streams containing related events associated with a plurality of communication sources. The events contained in a communication stream can be aggregated based in part on an event proximity and an event time that associates an event with other events contained in the event stream. The plurality of communication streams can be demodulated to extract optically transmitted information from the plurality of communication streams, which can be sent to a data consumer.
US11522610B2	Free space optical receiver A free space optical receiver including a multi-mode transmission medium configured to receive a light beam comprising a plurality of modes, the light beam having been propagated through a free space path. The free space optical receiver also includes a mode separating means configured to separate the plurality of modes for transmission through a corresponding first plurality of transmission media as a corresponding plurality of single-mode light beams, and a combining means configured to combine two or more of the plurality of single-mode beams into a combined beam for transmission through a further transmission medium.
US11522609B2	Communication device, communication method, and communication program A communication device includes an interleaving unit that determines an interleaving length of transmit data to be transmitted through free-space optical communication, and interleaves the transmit data based on the determined interleaving length, and a shaping unit that shapes the interleaved transmit data so as to make the interleaving length detectable on a receiving side of the free-space optical communication.
US11522607B2	Free-space optical communication system and methods for efficient data delivery Communication systems and methods for high-data-rate, high-efficiency, free-space communications are described. High-speed optical modems and automatic repeat request can be employed to transmit large data files without data errors between remote devices, such as an earth-orbiting satellite and ground station. Data rates over 100 Gb/s can be achieved.
US11522604B2	Simplified inter-satellite link communications using orbital plane crossing to optimize inter-satellite data transfers In a method and apparatus for inter-satellite communications, transmissions between a satellite and neighboring satellites that share an orbital plane occur via an aft antenna or a forward antenna and transmissions between the satellite and neighboring satellites that do not share an orbital plane occur via the aft antenna or the forward antenna timed during orbital plane crossings. This occurs even if the total path length and number of links is higher than inter-satellite communications that use side-to-side transfers.
US11522602B2	Method and component for determining a frequency spectrum for wireless aircraft in-cabin communication A method and component for determining a spectrum for wireless in-cabin communication between a user equipment and a network node which are within an aircraft. The method comprises obtaining flight information indicating a position of the aircraft; determining one or more available spectrums based on a regulation on an allowed spectrum corresponding to the flight information at the position; and sending, to at least one of the user equipment and the network node, an instruction to use the one or more available spectrums for the wireless in-cabin communication.
US11522597B2	Beam information feedback method and apparatus, and configuration information feedback method and apparatus Presented herein are systems and methods for beam information feedback. A first communication node may receive, from a second communication node, a group of reference signals that are carried either on respective beams or on a same beam. The group of reference signals may be determined based on one or more time-frequency-code resources. The first communication node may determine, based on the group of reference signals, one or more beam indexes and channel state information. The first communication node may transmit, to the second communication node, a set including the one or more beam indexes and the channel state information.
US11522594B2	Method and apparatus for multiple panel and/or multiple beam codebook based PUSCH transmissions The present disclosure relates to method and apparatus for multiple panel and/or multiple beam codebook based PUSCH transmissions. The method includes receiving, at a User Equipment (UE), Downlink Control Information (DCI) including two or more sets of parameters; and performing codebook based Physical Uplink Shared Channel (PUSCH) transmission for transmitting the two or more codewords according to the two or more sets of parameters, respectively; wherein each of the two or more sets of parameters includes at least one of a Sounding Reference Signal Resource Indicator (SRI), a Transmitted Precoding Matrix Indicator (TPMI), a Modulation Coding Scheme (MCS), a New Data Indicator (NDI) and a Redundancy Version (RV).
US11522590B2	Wireless communication apparatus and display method for use in wireless communication apparatus A wireless communication apparatus includes a first antenna circuit that forms a beam selected from among a plurality of first beams through a beamforming process performed for communication using a millimeter wave band and a monitor that displays a first pattern indicating a radiation direction of the selected beam.
US11522588B1	Apparatus, system, and method for adaptive beamforming in wireless networks A system comprising a plurality of nodes communicatively coupled to one another via at least one wireless link and a controller communicatively coupled to at least one of the nodes, wherein the controller (1) coordinates at least one scan that measures interference introduced into the wireless link, (2) identifies, based at least in part on the scan, one or more characteristics of the wireless link, (3) determines, based at least in part on the characteristics of the wireless link, that the node is eligible for a tapered codebook that, when implemented, modifies at least one feature of an antenna array that supports the wireless link in connection with the node, and then (4) directs the node to implement the tapered codebook. Various other apparatuses, systems, and methods are also disclosed.
US11522585B2	Method and system for processing uplink signal in cloud radio access networks A method and a system for processing uplink signals in cloud radio access networks are disclosed The system comprising a baseband unit and a number of remote radio heads. The baseband unit and the remote radio heads are connected through fronthaul links. When one remote radio head receives a signal transmitted from a user equipment, the remote radio head first encodes the received signal according to a post-coding matrix, then quantizes the encoded signal according to a number of quantization bits allocated to the user equipment, and finally transmits the quantized signal to the baseband unit.
US11522584B2	Transmission method and transmission device A transmission method includes encoding processing that generates an encoded block, modulation processing that generates symbols from the encoded block, phase change processing that changes the phase of the symbols, and transmission processing that arranges the symbols in data carriers and transmits the symbols. The transmission processing configures a frame by arranging symbol groups in order in the frequency direction and transmits the frame. The symbol groups each include a symbol generated from a first encoded block and a symbol generated from a second encoded block. The phase change processing includes changing the phase of symbols the same symbol group using the same phase change value.
US11522579B2	Attachable booster antenna and reader/writer using same An attachable booster antenna attachable to a coil antenna, includes a body; and an antenna including a multiple resonant antennas arrayed on the body, with each resonant antenna including an insulator layer having first and second surfaces; and first and second loop antennas disposed on the first and second surfaces, respectively, so as to confront each other via the insulator layer. Moreover, the first and second loop antennas each having an opening that discontinue a part of a loop and are arranged such that a closed loop is defined by at least a part of the first loop antenna and at least a part of the second loop antenna in a transparent plane viewed from a normal direction of the insulator layer. Furthermore, in the plan view of the insulator layer, the opening of the first and second loop antennas and the opening of the coil antenna overlap each other.
US11522578B2	Near-field communications circuit The present disclosure relates to a near-field communications circuit, comprising: a near-field communications controller; a matching network; and a switch, wherein the switch has one or more inputs, coupled to one or more outputs of the near-field communications controller via the matching network, and a plurality of outputs, each output being suitable for coupling the switch to a corresponding one of a plurality of near-field communications antennas.
US11522573B1	Transceiver apparatus and transceiver apparatus operation method thereof having phase-tracking mechanism The present invention discloses a transceiver apparatus having phase-tracking mechanism. A phase detection circuit of a receiver circuit performs sampling and phase detection on an input data signal according to a sampling clock signal to generate a phase detection result. A proportional gain circuit of the receiver circuit applies a proportional gain operation on the phase detection result to generate a phase adjusting signal. A CDR circuit of the receiver circuit receives a source clock signal to generate the sampling clock signal and performs phase-adjusting according to the phase adjusting signal. The integral gain circuit apples an integral gain operation on the phase detection result to generate a frequency adjusting signal. The source clock generating circuit receives a reference clock signal to generate the source clock signal and perform frequency-adjusting according to the frequency adjusting signal. The transmitter circuit performs signal transmission according to the source clock signal.
US11522567B1	Matching network, antenna circuit and electronic device Provided are a matching network, an antenna circuit and an electronic device. The matching network includes a first inductor, a second inductor, and a third inductor, the first inductor having two ends serving as a pair of output terminals, the second inductor having two ends serving as a first pair of input terminals, and the third inductor having two ends serving as a second pair of input terminals, where a first coupling coefficient between the first inductor and the second inductor is greater than a second coupling coefficient between the first inductor and the third inductor. According to the matching network, the matching network can present a rather large resistance value conversion ratio even with a rather small area taken by inductors, the circuit design can be more flexible, and the signal interference can be lowered.
US11522559B2	Variable read error code correction Devices and techniques for variable read throughput control in a storage device are described herein. Bits from can be received for a read that is one of several types assigned to reads. A low-density parity-check (LDPC) iteration maximum can be set based on the type. LDPC iterations can be performed up to the LDPC iteration maximum and a read failure signaled in response to the LDPC iterations reaching the LDPC iteration maximum.
US11522557B1	System and method of calibration of sigma-delta converter using tone injection A digital conversion system including a sigma-delta converter, a tone generator that generates injects a tone signal into the conversion path of the sigma-delta converter at a frequency that is outside operating signal frequency range, a tone detector that isolates and detects a level of the injected tone signal and provides a corresponding tone level value, a tone ratio comparator that converts the tone level value into a tone level ratio and that compares the converted tone level ratio with an expected tone level ratio to provide an error signal, and a loop controller that converts the error signal to a correction signal to adjust a loop filter frequency the sigma-delta converter. Tones may be serially injected one at a time or simultaneously in parallel for determining a measured tone level ratio for comparison with a corresponding one of multiple stored expected tone level ratios.
US11522556B1	Noise-shaping successive approximation register (SAR) analog-to-digital converter In certain aspects, an analog-to-digital converter (ADC) includes a comparator having a first input, a second input, and an output. The ADC also includes a digital-to-analog converter (DAC) coupled to the first input of the comparator, a switching circuit, a first capacitor coupled between the first input of the comparator and the switching circuit, a second capacitor coupled between the first input of the comparator and the switching circuit, and an amplifying circuit having an input and an output, wherein the input of the amplifying circuit is coupled to the switching circuit. The ADC further includes a first switch coupled between the output of the amplifying circuit and the DAC, and a successive approximation register (SAR) having an input and an output, wherein the input of the SAR is coupled to the output of the comparator, and the output of the SAR is coupled to the DAC.
US11522540B2	Gate-driving circuit and device A gate-driving circuit includes a unidirectional module and two driving modules, and has a low-potential terminal, an output terminal, and two input terminals via which two driving signals are received. Each of the driving modules includes a capacitor and a resistor that are connected in parallel and between the output terminal and the respective one of input terminals, a power source that is connected between the output terminal and the low-potential terminal, and a diode that is connected between the output terminal and the power source. The unidirectional module is connected between the output terminal and one of the driving modules, and allows an electrical signal to pass only from the one of the driving modules to the output terminal.
US11522539B1	Charging device The disclosure provides a charging device, which includes an input terminal configured to receive an input voltage; an output terminal configured to connect a target load so as to charge the target load; a control terminal, configured to receive a control voltage; a junction field-effect transistor and a control circuit. The junction field-effect transistor includes at least: a drain, electrically connected to the input terminal so as to receive the input voltage; a source, electrically connected to the output terminal so as to output an output voltage and an output current; and a gate, electrically connected to the control terminal. The control circuit is electrically connected to the control terminal, and configured to change the control voltage based on a change in a load voltage so as to change a pinch-off voltage of the JFET by controlling a bias voltage on the gate, thereby controlling the output current.
US11522537B2	Galvanic isolated gate driver based on a transformer used for both power transfer from primary to secondary coil and data transmission A gate driver communication system includes a cored transformer including a primary coil and a secondary coil configured to receive power signals and uplink data signals from the primary coil; a primary side power signal generator coupled to the primary coil and configured to generate the power signals having a first frequency; a primary side data transmitter coupled to the primary coil and configured to generate the uplink data signals having a second frequency different from the first frequency; and a primary side controller configured to allocate the power signals and the uplink data signals to the primary coil according to a plurality of time slots, wherein the power signals are allocated to first time slots of the plurality of time slots and the uplink data signals are allocated to second times slots of the plurality of time slots.
US11522534B2	Solid state relay A compact solid state relay (7) is provided. Solid state devices (74, 75), such as Triacs or Thyristors are used to implement the relay functionality. The device is at least partially enclosed in a housing that has pins for mounting on an electronics board. A number of “U” shaped jumpers (72) or other jumpers or wires are provided in the housing to act as heat sinks. A sub-miniature fan (70) is positioned to create an air flow over the heat sinks and dissipate heat from the device.
US11522528B2	Voltage control This application relates to methods and apparatus for voltage control, and in particular to maintain safe voltages for components of audio driving circuits that are operable in a high voltage mode. An audio driving circuit (100) may include a power supply module (106) and may be operable such that, in use, a voltage magnitude at a source terminal of at least a first transistor (306, 309, 603, 605) of the audio driving circuit can exceed its gate-source voltage tolerance. A voltage generator (111 P) is configured to output a first intermediate voltage (VSAFEP) to an intermediate voltage path for use as a gate control voltage for at least the first transistor, to maintain its gate-source voltage below tolerance. An intermediate path voltage clamp (114P) is provided for selectively clamping the intermediate voltage path to a voltage level, so as to maintain the magnitude of the gate-source voltage of the first transistor below tolerance. The voltage clamp (114P) is enabled by a reset condition (RST) for the audio driving circuit.
US11522527B2	Chip, signal level shifter circuit, and electronic device This application discloses a chip and a signal level shifter circuit for use on a mobile terminal such as a charger or an adapter. The chip is co-packaged with a first silicon-based driver die and a second silicon-based driver die that are manufactured by using a BCD technology, and a first gallium nitride die and a second gallium nitride die that are manufactured by using a gallium nitride technology. A first silicon-based circuit is integrated on the first silicon-based driver die, a second silicon-based circuit is integrated on the second silicon-based driver die, and a high-voltage resistant gallium nitride circuit is integrated on the first gallium nitride die. In this way, it can be ensured that a second low-voltage silicon-based driver die manufactured by using a low-voltage BCD technology is not damaged by a high input voltage, thereby reducing costs of the chip.
US11522524B2	Programmable voltage variable attenuator A programmable voltage variable attenuator (VVA) that enables selection among multiple analog, continuous attenuation ranges. Some embodiments include a dual-mode interface to enable digitally programming a DAC and provide the analog output to control the attenuation level of the VVA, or alternatively apply an externally provided analog voltage to directly control the VVA attenuation level. A VVA may be used in conjunction with a digital step attenuator (DSA). Some embodiments include circuitry for changing the VVA reference impedance. The attenuator architecture of the VVA includes one or more variable resistance shunt elements and/or series elements which may be a resistor and FET circuit controlled by a provided variable analog voltage. The multiple resistance element architecture may be implemented with stacked FET devices. Embodiments for the VVA may be based, for example, on T-type, Bridged-T type, Pi-type, L-pad type, reflection type, or balanced coupler type attenuators.
US11522519B2	Transmit filter circuit and composite filter device A transmit filter circuit includes an input terminal, an output terminal, plural series arm resonators, and a parallel arm resonator. The input terminal receives a transmit signal. The output terminal is electrically connected to an antenna. The plural series arm resonators are electrically connected in series with each other on a line between the input and output terminals. The plural series arm resonators include first and second series arm resonators. The first series arm resonator is closest to the output terminal. The second series arm resonator is second closest to the output terminal. A first end of the parallel arm resonator is electrically connected to a node between the first and second series arm resonators. A reference potential is provided to a second end of the parallel arm resonator. The resonant frequency of the first series arm resonator is higher than that of the second series arm resonator.
US11522517B2	Surface acoustic wave device and method of manufacturing the same A surface acoustic wave device includes a piezoelectric substrate, a supportive layer, a cover layer and a pillar bump. The supportive layer is disposed on the piezoelectric substrate and around a transducer, the cover layer covers the supportive layer, and the pillar bump is located in a lower via hole of the supportive layer and an upper via hole of the cover layer. The upper via hole has a lateral opening located on a lateral surface of the cover layer, and the pillar bump in the cover layer protrudes from the lateral surface of the cover layer via the lateral opening.
US11522516B2	Thin-film surface-acoustic-wave filter using lithium niobate An apparatus is disclosed for a surface-acoustic-wave filter using lithium niobate (LiNbO3). In an example aspect, the apparatus includes at least one surface-acoustic-wave filter including an electrode structure, a substrate layer, and a piezoelectric layer disposed between the electrode structure and the substrate layer. The piezoelectric layer includes lithium niobate material configured to enable propagation of an acoustic wave across its planar surface in a direction along a first filter axis. A second filter axis is along the planar surface and perpendicular to the first filter axis. A third filter axis is normal to the planar surface. An orientation of the first, second, and third filter axes is relative to a crystalline structure of the lithium niobate material as defined by Euler angles λ, μ, and θ. A value of μ has a range approximately from −70° to −55° or at least one symmetrical equivalent.
US11522515B2	Acoustic wave device including interdigital electrodes covered by silicon oxynitride film An acoustic wave device includes a piezoelectric substrate, a pair of interleaved interdigital transducer electrodes disposed on the piezoelectric substrate, and a dielectric film including silicon oxynitride covering the pair of interleaved interdigital transducer electrodes. The dielectric film exhibits a temperature coefficient of velocity of substantially zero throughout an operating temperature range of the acoustic wave device of between −55° C. and 125° C.
US11522508B1	Dual-band monolithic microwave IC (MMIC) power amplifier A dual-band MMIC power amplifier and method of operation to amplify frequencies in different RF bands while only requiring input drive signals at frequencies f1 and f2 in a narrow RF input band. This allows for the use of a conventional narrowband RF IC to drive the MMIC and does not require additional circuitry (e.g., a LO) on the MMIC power amplifier. The matching network of the last amplification stage is modified to pass f1 (or a harmonic thereof), reflect f2, pass a Pth harmonic of f2 where P is 2 or 3 and to reflect any unused 1st, 2nd or 3rd order harmonics of f1 or f2 back into the MMIC. In response to an input signal at f1, the MMIC power amplifier amplifies and outputs a signal at f1 (or a harmonic thereof). In response to an input signal at f2 at sufficient RF power, the last amplification stage operates in compression such that the MMIC power amplifier generates the harmonics, selects the Pth harmonic and outputs an amplified RF signal at P*f2.
US11522504B2	Wideband RF short/DC block circuit for RF devices and applications Inductance-capacitance (LC) resonators having different resonant frequencies, and radio frequency (RF) transistor amplifiers including the same. One usage of such LC resonators is to implement RF short/DC block circuits. A RF transistor amplifier may include a transistor on a base of the RF transistor amplifier coupled to an input and an output of the RF transistor amplifier; a first inductance-capacitance (LC) resonator comprising a first inductance and a first capacitance; and a second LC resonator comprising a second inductance and a second capacitance. The first LC resonator may be configured to resonate at a first frequency, and the second LC resonator may be configured to resonate at a second frequency different from the first frequency.
US11522502B2	Wideband radio-frequency transceiver front-end and operation method thereof A wideband radio-frequency transceiver front-end is provided. The transceiver front-end includes an antenna port and a transmission path coupled to the antenna port comprising a power amplifier and a first matching network. The transceiver front-end further includes a reception path coupled to the antenna port comprising a low noise amplifier and a second matching network. Furthermore, the transceiver front-end includes an impedance inverter coupled in-between the antenna port and the second matching network. Moreover, the transceiver front-end includes a controller comprising switching arrangement for a gate and a drain of the power amplifier. In this context, the controller is configured to initiate a first reception mode by connecting the gate of the power amplifier to ground and by connecting the drain of the power amplifier to a supply voltage.
US11522501B2	Phased array amplifier linearization Apparatus and methods provide predistortion for a phased array. Radio frequency (RF) sample signals from phased array elements are provided along return paths and are combined by a hardware RF combiner. Phase shifters are adjusted such that the RF sample signals are phase-aligned when combined. Adaptive adjustment of predistortion for the amplifiers of the phased array can be based on a signal derived from the combined RF sample signals.
US11522498B2	RF power amplifier with extended load modulation Aspects of the subject disclosure may include a Doherty amplifier that includes a carrier amplifier having an output terminal, an output network coupled to the output terminal, and a peaking amplifier, wherein the output network comprises a non-linear reactance component, and wherein the non-linear reactance component changes an effective impedance of a load presented to the carrier amplifier when the peaking amplifier is off. Other embodiments are disclosed.
US11522497B2	Doherty amplifier incorporating output matching network with integrated passive devices An amplifier includes a package that includes a carrier amplifier having a carrier amplifier input and output, a peaking amplifier having a peaking amplifier input and output, and corresponding input and output leads. The package includes a first integrated passive device including a first capacitor structure. The first integrated passive device includes a first contact pad coupled to the peaking amplifier output and a second contact pad coupled to the peaking output lead. The package includes a second integrated passive device including a second capacitor structure. The second integrated passive device includes a third contact pad coupled to the carrier amplifier output and a fourth contact pad coupled to the carrier output lead. The amplifier includes input circuitry a combining node configured to combine a carrier output signal and a peaking output signal.
US11522491B2	Systems and methods for adaptive range of motion for solar trackers A system including a tracker configured to collect solar irradiance and attached to a rotational mechanism for changing a plane of the tracker and a controller in communication with the rotational mechanism. The controller is programmed to store a plurality of positional and solar tracking information, determine a position of the sun at a first specific point in time, calculate a first angle for the tracker based on the position of the sun, detect an amount of accumulation at the first specific point in time, determine a first maximum range of motion for the tracker based on the amount of accumulation, adjust the first angle for the tracker based on the first maximum range of motion for the tracker, and transmit instructions to the rotational mechanism to change the plane of the tracker to the first adjusted angle.
US11522490B2	Height adjustment bracket for roof applications A roof mount system supports a solar panel above a roof and includes a base positioned on the roof and a first fastener connected to the base and extending away from the roof and moveable along the base in a direction generally parallel to the roof. A first clamp supports a bottom surface of a solar panel frame and adjusts the height of the solar panel above the roof by moving the first clamp along a first fastener in a direction perpendicular to the roof. A second clamp is connected to a second fastener and moves with respect to the first clamp perpendicular to the roof. The solar panel is clamped between the first clamp and the second clamp portion. A protrusion extends from the first or second clamp to form an electrical bond between the solar panel frame and the respective first or second clamp.
US11522486B2	Temperature estimation device, motor control device, and temperature estimation method A temperature estimation device estimates a drive duty ratio by taking account of the influence of ambient temperature on the energization to a coil part, on the basis of a drive duty ratio and the ambient temperature, and estimates the power consumption of a motor when the coil part is energized with the estimated drive duty ratio, the power consumption of the motor, this power consumption being accompanied by the heat dissipation of the coil part, the power difference between both the power consumption values, the temperature time constant of the coil part, and a temperature variation during a period of the temperature time constant of the coil part, and estimates the temperature variation of the coil part from the ambient temperature on the basis of these estimated values and a last temperature variation of the coil part.
US11522485B2	Three-phase motor driving circuit and three-phase motor driving method A three-phase motor driving circuit and a three-phase motor driving method are provided. The three-phase motor driving circuit includes an inverter circuit, a control circuit, a turn-off module, a turn-off confirmation module, and a turn-on logic unit. The inverter circuit includes a plurality of phase circuits, each including an upper bridge switch and a lower bridge switch. The control circuit operates in a feedback mode to output a feedback start signal. The turn-off module includes a feedback detection unit, a voltage adjusting unit, and a turn-off logic unit. The feedback detection unit detects an output current of a designated phase circuit, and if the output current flows out, a voltage regulation signal is output until the output current is 0, and a lower bridge turn-off signal is output. The voltage adjusting unit adjusts the voltage of the output node to be close to a predetermined voltage.
US11522481B2	Memory motor winding multiplexing control method and system for flux linkage observation A memory motor winding multiplexing control method and system for flux linkage observation. The method comprises the following steps: I: when the magnetization state of a memory motor needs to be adjusted, selecting a flux regulation current reference value according to a rotation speed of the motor; II: by means of current feedback control, driving a direct-current flux regulation winding to generate a flux regulation current so as to adjust the magnetization state of a permanent magnet; III: when the memory motor is operating normally, collecting an induction voltage of the flux regulation winding and extracting an induced electromotive force of the flux regulation winding; and IV: using the induced electromotive force of the flux regulation winding to calculate the flux linkage of the permanent magnet for vector control of the motor.
US11522480B2	SPMSM sensorless composite control method with dual sliding-mode observers A PMSM sensorless composite control method with dual sliding-mode observers is provided. In particular, two sliding-mode observers are designed, one provides an exponential piecewise sliding-mode function for observation of back electromotive force, and the other sliding-mode observer is for observation of load torque and fine-tuning parameters of a piecewise PI controller while introducing an estimated load torque onto a q-axis for feedforward compensation. A q-axis current inner loop is designed with a second-order sliding-mode controller, which can improve tracking performance of q-axis current and indirectly control an electromagnetic torque. The exponential piecewise sliding-mode function is more conductive to the observation of back electromotive force and can weaken the buffeting phenomenon. The sliding-mode observer for observing the load torque fine-tunes parameters of the piecewise PI controller while performing the feedforward compensation, the load capability of the system is improved. The second-order sliding-mode controller can reduce a torque ripple.
US11522479B2	Method and system of subsynchronous oscillations and interactions damping A method and system of subsynchronous oscillations and interactions damping integrated in in a rotor converter based on an adaptive state feedback controller with two spinning vectors, and a Kalman filter whose parameters are optimized by minimizing maximum sensitivity under a constraint of positive damping for a plurality of sensible scenarios is provided. The damping signal generated by the damping module is applied either to a power proportional integer controller or to a current proportional integer controller.
US11522477B2	Contactless power supply and motor control system A contactless power supply and motor control system includes a pulse width modulator, a rotary transformer, a demodulator circuit, a motor driver, and a motor. The pulse width modulator supplies a first pulse width modulated (PWM) signal that has a duty cycle and a first amplitude. The rotary transformer receives the PWM signal. The secondary winding is rotatable relative to the primary winding and supplies a second PWM signal having the duty cycle and a second amplitude. The demodulator circuit is rotatable with the secondary winding and supplies a demodulated direct current (DC) voltage having a DC voltage amplitude. The motor driver is rotatable with the secondary winding and the demodulator circuit and controllably supplies motor current. The motor receives the motor current and rotates at a rotational speed.
US11522473B2	Vibration wave motor and optical device A vibration wave motor includes an element configured to be displaced by application of voltage, and an annular elastic body having a bottom surface coming into contact with the element and a drive surface having a groove, configured to drive a moving element by a vibration wave produced on the drive surface by displacement of the element. The element has a density of 4.2 to 6.0×103 kg/m3. A value of [(T/B)÷W] is in a range of 0.84 to 1.94, where T represents a depth of the groove, B represents a distance from a bottom part of the groove to the bottom surface, and W represents a radial width of the elastic body.
US11522471B2	Vibration type motor and driver apparatus A vibration type motor has a vibrator; a frictional member, a pressurization unit that causes the vibrator and the frictional member to come into pressure-contact with each other, a retaining member that retains the frictional member, and a fixing unit that fixes the friction member to the retaining member, and the vibrator and the frictional member make relative movement by the vibrator being vibrated. The frictional member has a first area including an area that contacts the vibrator and a second area including an area that is retained by the retaining member. A size of the first area in an orthogonal direction that is orthogonal to both the direction of the relative movement and a pressure direction of the pressurization unit is smaller than a size of the second area in the orthogonal direction.
US11522469B2	Electric machines as motors and power generators Devices, methods, and systems for electrostatic machines which can act as both an electric motor, converting electrical energy to mechanical energy, and an electric generator, converting mechanical energy to electrical energy, are described. In some embodiments, a spring positioned between two oppositely charged plates may be used as an electric motor and/or electric generator.
US11522466B1	Power conversion structure, power conversion method, electronic device including power conversion structure, and chip unit An output terminal of one phase switched capacitor converter is connected to a first output terminal, and an output terminal of the other phase switched capacitor converter is connected to the first output terminal via a second switch, such that the power conversion structure can operate in a mode of two phase switched-capacitor converters in parallel, and a current formed by the operating of only one phase switched capacitor converter flows through the second switch, thus greatly reducing a value of current flowing through the second switch, greatly reducing the on-state loss of the second switch, and improving the efficiency of the power conversion structure, and because the second switch has lower on-state loss and less heat, there is a larger selectivity of the second switch and a reduction of the cost of power conversion structure.
US11522463B2	System and method to extend low line operation of flyback converters An amplifier system may include at least one input source, a flyback converter including a pair of complementary metal oxide silicon field effect transistor (MOSFETs), a controller integrated circuit (IC) having a quasi-resonant (QR) pin and configured to provide a biased drive current to the flyback converter, and a transition component arranged at the controller IC and configured to correct pulse width modulation at the IC to ensure the voltage at a transition pin of the IC is above a predefined threshold during a resonant transition.
US11522462B2	Switch mode power converter A switch mode power converter comprises an inverter, a transformer having a primary side winding and a secondary side winding and a first inductor in series with the primary side winding. A second inductor is provided magnetically coupled to the first inductor, and a voltage at one end of the second inductor is used as a feedback signal for indirectly measuring (i.e. approximating) the secondary side voltage, but with measurement at the primary side.
US11522459B2	Combining temperature monitoring and true different current sensing in a multiphase voltage regulator According to certain aspects, the present embodiments are directed to techniques for providing the ability to monitor one or more operational parameters of a voltage regulator. In embodiments, the voltage regulator is a multiphase voltage regulator having a plurality of power stages corresponding to each respective phase. In these and other embodiments, the operational parameters include one or both of a phase current and a phase temperature. According to certain additional aspects, the present embodiments provide the ability to monitor the respective phase current output and phase temperature of each phase independently. According to further aspects, this ability to monitor the operational parameters is achieved while minimizing circuit complexity.
US11522454B2	Bias generator A switching mode power supply includes a microcontroller, an interface circuit connected to the controller, and a boost circuit connected to the controller. A feedback circuit is connected to the controller, and an SiPM is connected to the boost circuit and the feedback circuit.
US11522452B2	Buck converter A method of operating a buck converter is disclosed. The buck converter includes a first capacitor, a second capacitor, and an inductor between a node and an output of the buck converter. The method includes, during a first portion of a cycle, coupling the first capacitor and the second capacitor in series between an input of the buck converter and a ground, wherein the first capacitor is coupled between the input of the buck converter and the node, and the second capacitor is coupled between the node and the ground. The method also includes, during a second portion of the cycle, coupling the second capacitor and the first capacitor in series between the input of the buck converter and the ground, wherein the second capacitor is coupled between the input of the buck converter and the node, and the first capacitor is coupled between the node and the ground.
US11522447B2	Startup of switched capacitor step-down power converter Circuit embodiments for a switched-capacitor power converter, and/or methods of operation of such a converter, that robustly deal with various startup scenarios, are efficient and low cost, and have quick startup times to steady-state converter operation. Embodiments prevent full charge pump capacitor discharge during shutdown of a converter and/or rebalance charge pump capacitors during a startup period before switching operation by discharging and/or precharging the charge pump capacitors. Embodiments may include a dedicated rebalancer circuit that includes a voltage sensing circuit coupled to an output voltage of a converter, and a balance circuit configured to charge or discharge each charge pump capacitor towards a target steady-state multiple of the output voltage of the converter as a function of an output signal from the voltage sensing circuit indicative of the output voltage. Embodiments prevent or limit current in-rush to a converter during a startup state.
US11522439B2	Switching regulator with driver power clamp A switching regulator clamping the power or ground of the power switch driver is introduced. In a buck regulator, the power switch is coupled between the input terminal of the buck regulator and the first terminal of an inductor. The second terminal of the inductor is coupled to the output terminal of the buck regulator. There is a driver power clamp configured to clamp the ground terminal of the driver of the power switch. In a boost regulator, an inductor is provided which has a first terminal coupled to an input terminal of the boost regulator and has a second terminal coupled to the negative supply terminal of the power supply through a power switch. The boost regulator has a driver power clamp that is configured to clamp the power terminal of the driver of the power switch.
US11522438B2	Conversion system and control method thereof The present application provides a conversion system and a control method, including N power converters and N controllers, and N controllers one-to-one corresponds to the N power converters. In addition to receiving a first side current and a second side voltage of a corresponding power converter, each of the N controllers can also receive a neighboring direct current voltage signal which only reflects second side voltages of other M power converters in the conversion system, and perform voltage control on the corresponding power converter according to the received signal. The present application adopts fully distributed control, and does not need to set up a centralized controller. When parts of controllers fail, the other controllers can continue to work, so the reliability is higher.
US11522437B1	Controllers, devices, and methods for directly controlling a dual active bridge converter Various disclosed embodiments include illustrative controller modules, direct current (DC) fast charging devices, and methods. In an illustrative embodiment, a controller module for a DC-DC converter includes a controller and computer-readable media configured to store computer-executable instructions configured to cause the controller to: receive an input voltage, an output voltage, and a requested power value. The computer-executable instructions are configured to cause the controller to: determine primary and secondary side inter-bridge phase shifts responsive to the requested power value, the input voltage, and the output voltage; determine an effective phase shift value responsive to the requested power value, the input voltage, the output voltage, and the primary side inter-bridge phase shift; generate control signals for switches of the DC-DC converter responsive to the primary side inter-bridge phase shift, the secondary side inter-bridge phase shift, and the effective phase shift value; and output the generated control signals.
US11522435B1	Electromagnetic payload orientation control Apparatus and associated methods relate to an electromagnetic steered orientation device. In an illustrative example, an exemplary electromagnetic payload orientation device (EPOD) includes a rotor, a stator, and a payload mounted on the rotor. The rotor, for example, may be coupled to a magnetic source. For example, the stator may include electromagnetic coils operable by a controller circuit to induce relative rotation between the rotor and the stator. In some examples, the rotor is a sphere provided with one or more guide tracks on an outer surface, and the stator is a concentric shell surrounding the sphere provided with at least one follower corresponding to the guide tracks such that a relative rotation between the rotor and stator is constrained by the guide track to follow a predetermined motion profile. Various embodiments may advantageously provide a substantially smooth and low voltage mechanism to orient the payload.
US11522432B2	Methods and apparatus for Linear Electric Machine An embodiment of a linear electric machine includes two or more phases that define a central bore, and alternating permanent magnets that are disposed within the central bore and are free to move relative the windings. An embodiment of a method for selectively powering the windings is disclosed that enables the machine to realize a commanded force, or to determine the force present by using the current within the windings and the alignment of the magnets relative to the windings.
US11522431B2	Variable torque linear motor/generator/transmission A linear motor/generator/transmission system includes a guideway with rails and a plurality of stator cores and coils evenly disposed along the length and in the center of the guideway. The system also includes a carriage configured to travel along the guideway having at least two magnet bars with alternating pole magnets, each successive magnet of each magnet bar mounted in front of the other in a direction of travel of the carriage. In embodiments, the magnet bars are mounted parallel to and on either side of a longitudinal centerline of the carriage such that, when adjacent to the center line and each other, the at least two magnet bars are positioned over the stator coils and are configured to be slidably translated away from the center line of the carriage to a position where the at least two magnet bars are not over the stator coils.
US11522425B2	Planar high torque electric motor A motor is provided, and includes: a stator having a plurality of electromagnets and a plurality of rolling elements arranged around the electromagnets; a rotor having a plurality of rotor traction components arranged to engage the plurality of rolling elements; and a control circuit; wherein the plurality of rolling elements are arranged relative to the plurality of rotor traction components to form a gap between the plurality of rolling elements and the plurality of rotor traction components; wherein the control circuit is configured to activate the plurality of electromagnets to cause the rotor to pivot about a pivot point defined in a spherical bearing and change the gap such that the rotor compresses against the stator and the plurality of rolling elements and the plurality of rotor traction components translate the compression into tangential thrust and rotation of the rotor.
US11522423B2	Method and a device for inserting windings into a stator or rotor with gripping members A device for inserting electrical conductors into a machine element of an electric machine comprises a collection receptacle for providing an assembly of one or several crowns formed from electrically conductive hairpins, and an inserting device for removing the crown assembly from the collection receptacle and for introducing the crown assembly into the machine element. An associated method comprises the steps of: providing, in a collection receptacle, an assembly of one or several crowns of hairpins; removing the crown assembly from the collection receptacle; and introducing the crown assembly into the machine element which, in particular, is a stator or rotor of an electric motor.
US11522420B2	Method of producing motor core A method of producing a motor core includes preparing a soft magnetic plate containing a transition metal element, preparing a modifying member containing an alloy having a melting point lower than a melting point of the soft magnetic plate, bringing the modifying member into contact with a part of a plate surface of the soft magnetic plate, causing the modifying member to diffuse and penetrate into the soft magnetic plate from a contact surface between the soft magnetic plate and the modifying member and forming a hard magnetic phase-containing part in a part of the soft magnetic plate, and laminating a plurality of soft magnetic plates on each other after the modifying member is brought into contact with the part of the plate surface of the soft magnetic plate.
US11522416B2	Electric drive system An electric drive system (100) used in an electric vehicle or a hybrid electric vehicle to drive the vehicle's wheels to rotate. The electric drive system (100) includes an electric motor (300). The electric motor (300) includes a housing in which a stator and a rotor are received. A transmission device (400) is operatively coupled to the electric motor (300); and an output shaft (500) is operatively coupled to the transmission device (400). The output shaft (500) extends from the transmission device (400) and is substantially parallel to the rotor's axis of the electric motor (300). The electric drive system (100) also includes an inverter (200) secured over the housing of the electric motor (300) such that the inverter is located between the output shaft (500) and the housing of the electric motor (300).
US11522411B2	Switch module for a power tool An electronic switch module for a power tool is provided including a housing, a trigger moveable relative to the housing, a magnet being moveable relative to the housing with the trigger along a movement axis, and a linear hall sensor fixed relative to the housing and intersecting the movement axis of the magnet. The linear hall sensor magnetically detects a linear position of the magnet along the movement axis and outputs a voltage signal based on the detected linear position.
US11522410B2	Molded structure of brushless fan motor and method for molding brushless fan motor In this molded structure of the brushless fan motor, at least a part of a circuit board is supported by a notch portion in a distal end portion of a projecting end formed on a board storage portion side and a rotary shaft side of an insulator, the board storage portion and the insulator are placed in such a manner as to surround a periphery of a bearing support tube portion, a part of a molded portion is disposed between the bearing support tube portion and the insulator and between the board storage portion and the insulator, and the entire circuit board located inside a storage chamber, excluding the portion supported by the projecting end formed on the board storage portion side of the insulator, is covered with the part of the molded portion.
US11522407B2	Electronic apparatus [Object] To provide an electronic apparatus capable of inhibiting a failure due to dropping of a screw from occurring.[Solving Means] An electronic apparatus 100 according to an embodiment of the present invention includes: a casing 10; a cover portion (case cover 20); a circuit board 22; a screw member 80; and a facing member (holding member 60). The cover portion has a first surface and a second surface and is to be attached to an opening portion 11 of the casing 10, the first surface including a screw hole 203 and facing the casing 10, the second surface being opposite to the first surface. The circuit board 22 is to be disposed on the first surface. The screw member 80 includes a head portion 81 and a shank 82 and fixes the circuit board 22 to the cover portion, the head portion 81 engaging with the circuit board 22, the shank 82 including a groove 82s and passing through the circuit board 22, the groove 82s being screwed into the screw hole 203. The facing member is to be disposed inside the casing 10 and faces the head portion 81 with a distance (L1) smaller than a length (L2) of the shank 82.
US11522405B2	Motor A motor for a driving device includes a rotor rotatable around a central axis, a stator facing the rotor, a busbar electrically connected to the stator, a busbar support to hold the busbar, a terminal bar including a first end electrically connected to the busbar, the terminal bar including a connection terminal at a second end and that is to be electrically connected to the driving device, and a seal to be attached to the driving device and located between the busbar and the connection terminal. The seal portion includes a through-hole into which the terminal bar is press-fitted.
US11522398B2	Electric machine rotor end plates A supply end plate apparatus includes a supply end plate with an aperture therethrough configured to be mounted at a first axial end of the rotor core for supplying fluid to the rotor core. The supply end plate defines a plurality of end plate passages therein extending outward from an inward portion of the supply end plate toward an outward portion of the supply end plate. Each of the plurality of end plate passages includes: a radial section extending in a radial direction from an inlet in the inward portion of the supply end plate toward the outward portion; a transition section extending obliquely from the radial section; and a circumferential section extending circumferentially from the transition section to an outlet of the supply end plate.
US11522394B2	Hybrid module and shipping jig A hybrid module includes a rotational axis and an electric motor. The electric motor has a stator assembly and a rotor assembly. The stator assembly includes a stator plate with a first radially extending tab with a first threaded hole for receiving a first fastener for fixing the stator assembly to a jig plate, a second radially extending tab with a first dowel hole for receiving a first dowel to locate the stator assembly in the jig plate, and a third radially extending tab with a second dowel hole for receiving a second dowel to locate the stator assembly in a transmission housing. The rotor assembly is disposed radially inside of the stator assembly and includes a torque converter with a pilot for locating the torque converter relative to the jig plate or relative to an engine crankshaft.
US11522393B2	Wireless inductive power transfer An inductive power transfer system is arranged to transfer power from a power transmitter to a power receiver via a wireless power signal. The system supports communication from the power transmitter to the power receiver based on load modulation of the power signal. The power receiver transmitting a first message to the power transmitter which comprises a standby power signal requirement for the power signal during a standby phase. The power transmitter receives the message, and when the system enters the standby phase, the power transmitter provides the power signal in accordance with the standby power signal requirement during. A power receiver configurable standby phase is provided which may for example allow devices to maintain battery charge or to provide fast initialization of the power transfer phase.
US11522390B2	Wireless power transmission for near and far field applications The disclosed wireless transmitter estimates a client location in space and transmits power in the form of electromagnetic (EM) waves to that location. In response to receiving the power, a client sends a power request signal. In some implementations, the power request signal includes a request that the wireless transmitter transmit more power to the client. In response to the power request signal, the wireless transmitter can modify the power transmitted to the client to increase/decrease the amount of power the client is receiving. For example, the wireless transmitter can modify the emitted EM waves to increase coherent addition or decrease coherent addition at the location of the client to increase the amount of power the client receives. In some implementations, the wireless transmitter modifies the phase distribution of EM waves to increase the amount of power a client receives.
US11522389B2	Inductively coupled AC power transfer An Inductive Power Transfer System pickup provides a controlled AC power supply by controlled variation of the phase angle between the pickup coil induced voltage (jwMI) and the tuning capacitor C voltage. The phase angle can be varied by maintaining the tuning capacitor C voltage substantially constant for a selected time period. Switches S1 and S2 may be used to clamp the tuning capacitor C voltage at substantially zero volts during the selected time period. Switch S1 can be operated to prevent a rise in positive voltage across the tuning capacitor, and switch S2 can be used to prevent the voltage across the tuning capacitor from going negative.
US11522384B2	Fast charging device for mobile electronic device A fast charging device for mobile electronic device is disclosed. Particularly, an input-end filtering unit contained in the fast charging device is designed to comprise two first input capacitors, one second input capacitor, and one switch element. By such design, in case of a rated voltage of an input AC power being smaller than 110 Vac, the switch element is controlled to complete a switch-ON operation, so as to make the input-end filtering unit execute a signal filtering process by simultaneously using two first input capacitors and one second input capacitor. Moreover, in case of the rated voltage of the input AC power being in a range between 110 Vac and 264 Vac, the switch element is controlled to complete a switch-OFF operation, so as to make the input-end filtering unit execute the signal filtering process by merely using two first input capacitors.
US11522379B2	Device for supplying power to external device and method therefor Disclosed is an electronic device. The electronic device may include a plurality of interfaces each of which is connected to one peripheral electronic device in a wired manner to deliver power to the connected peripheral electronic device, a power supply circuit connected to the plurality of interfaces, and a control circuit including a plurality of pins each connected to one interface to allow the power supply circuit to supply power to the plurality of interfaces. In addition, various embodiments understood from the disclosure are possible.
US11522373B2	Terminal and battery charging control device and method thereof The present disclosure relates to the technical field of charging. A terminal and a battery charging control device and method are provided. The battery charging control device including a battery connector, a main control circuit and a quick charging switch circuit is adopted. During the regular charging or the quick charging, the main control circuit performs a data communication with the external power adapter via the communication interface, and obtains a charging voltage and a charging current for the battery; if the charging voltage is greater than a voltage threshold and/or the charging current is greater than a current threshold, the main control circuit sends a charging switch-off instruction, such that the controller controls the communication interface to switch off; if the charging voltage is less than or equal to the voltage threshold and the charging current is less than or equal to the current threshold, the main control circuit continues to obtain the charging voltage and the charging current.
US11522370B2	Equalization circuit, a charging device and an energy storage device The present invention relates to an equalization circuit, a charging device, and an energy storage device connected between a battery pack and a charger. The battery pack comprises a plurality of cells connected in series. The equalization circuit comprises: a detection module used for detecting a voltage, temperature, and/or current of each cell; an auxiliary charging module used for providing a second charging current to the battery pack, wherein the second charging current is less than a first charging current provided by the charger to the battery pack; and a control module used for controlling the detection module and the auxiliary charging module.
US11522367B2	Battery charge balancing circuit for series connections Systems and methods are described for managing charging and discharging of battery packs. In one or more aspects, a system and method are provided to minimize overcharging of battery cells of specific battery chemistries while still enabling fast charging cycles. In other aspects, a buck converter may be used to reduce a voltage of power used to charge the cells. In further aspects, a fast overcurrent protection circuit is described to address situations involving internal short circuits of a battery cell or battery pack. In yet further aspects, a bypass circuit is provided in series-connected battery packs to improve the charging of undercharged battery packs while also increasing the efficiency of the overall charging process. In other aspects, a circuit is provided that permits a controller to determine a configuration of battery packs. In yet further aspects, a system may determine a discharge current for a collection of battery packs based on each battery pack's state of health (SOH) and forward that determination to an external device.
US11522362B2	Control device for handling the transfer of electric power Electric power is transferred to an electric load as alternating current over at least two incoming and outgoing lines. At least one line circuit manages at least one parameter of the transferred electric power. A central circuit exchanges data and/or commands with the at least one line circuit over a respective galvanically isolated communication interface, such that a reference potential of the central circuit is floating relative to an earth potential of the at least two incoming and outgoing lines. A respective surge protection capacitor is arranged in parallel with each galvanically isolated communication interface. The surge protection capacitors are configured to accumulate a respective fraction of an electric charge resulting from an undesired overvoltage on one of said incoming lines so as to split up the undesired overvoltage into two or more voltages over the galvanically isolated communication interfaces each of which voltage is smaller than the undesired overvoltage.
US11522355B2	Method and apparatus for use in earth-fault protection A method and an apparatus for use in an earth-fault protection in a three-phase electric network, the apparatus is configured to detect a phase-to-earth fault in the network, to determine for each of the phases of the network a phase current during the fault or a change in the phase current due to the fault, to detect a faulted phase of the network, to determine an estimate of an earth-fault current on the basis of the faulted phase and the phase currents or the changes in the phase currents, to determine a zero-sequence voltage of the electric network or a change in the zero-sequence voltage, and to determine a direction of the phase-to-earth fault from the measuring point on the basis of the estimate of the earth-fault current and the zero-sequence voltage or the change in the zero-sequence voltage.
US11522354B1	Circuit breaker distribution system configured to provide selective coordination A circuit breaker distribution system is configured to provide selective coordination. The system comprises a solid-state switch disposed as a main or upstream breaker and a switch with an over current protection disposed as a branch or downstream breaker. The solid-state switch comprises a microcontroller including a processor and a memory, and computer-readable logic code stored in the memory which, when executed by the processor, causes the microcontroller to: allow repeated pulses of current through to the branch or downstream breaker in an event of an overload or short circuit, and choose a maximum current limit for the solid-state switch as a “chop level” such that the chop level is chosen higher than a rated current of the solid-state circuit breaker but low enough that the solid-state switch is not damaged from repeated pulses over a period of time needed to switch OFF the branch or downstream breaker.
US11522353B2	Systems and methods for detecting and identifying arcing Systems and methods for detecting and identifying arcing are disclosed. A method of detecting arcing includes obtaining data indicative of voltage and data indicative of current, determining a waveform of a cycle of a primary load current according to the data indicative of current, determining at least one noise signal according to the determined waveform of a cycle of the primary load current and the data indicative of current, determining a probability density of the noise signal according to a time window, and comparing the probability density of the noise signal with at least one model probability density.
US11522352B1	Support system for isolated phase bus enclosure System and method for supporting an electrical, conductor-carrying set of end to end pipes or enclosures to form an Iso Phase bus for electrical power transmission. The multiple tubular components are axially aligned in the field by a system comprising a saddle support with support legs, brackets for the support legs wherein the brackets secure to the upper flange of an I-beam on a steel support held in the ground. The brackets are adjustably secured to the legs of the saddle support and to the flange of the I-beam. In addition, an over the top enclosure, thin metal strap is provided which is also secured to the bracket and to the flange of the I-beam. Adjustments of the orientation of one enclosure to the adjacent connecting enclosure is able to be done in three axis.
US11522350B2	Coating removing method for cable and coating removing device for cable There is provided a coating moving method for a cable that removes a coating at a terminal portion of a cable, including a step of applying a pressing force having such a magnitude that a cutting edge stops at a position before reaching the core wire to the cutting blade to make an incision on the coating by the cutting blade, a step of twist-cutting an uncut portion of the coating between the cutting edge of the cutting blade and the outer periphery of the core wire by rotating the coating on a distal end side from an incision position with respect to the coating on a base end side, and a step of removing the coating on the distal end side from the incision position by gripping and pulling out the coating on the distal end side from the incision position to expose the core wire.
US11522349B2	Cable-laying apparatus provided with a safety system and method for stopping said cablelaying apparatus safely Apparatus to lay cables, comprising a work unit bearing at least a pair of capstans to support the cables and provided with a safety device cooperating with the pair of capstans; a winding and unwinding unit for the cables, provided with a dynamic braking device cooperating with a reel for winding and unwinding the cables; an adjustment and safety hydraulic circuit in which a work fluid flows and with which the following are associated: a first power transmission unit to transmit power to the work unit and to pump the work fluid toward the safety device and toward said dynamic braking device, a second motorized braking unit of the work unit cooperating with a third command unit of the safety device, and a fourth regulation unit to regulate the winding and unwinding unit comprising at least a motorized counter-traction valve of the winding and unwinding unit and cooperating with said power transmission unit.
US11522347B2	Method of making an innerduct for a conduit A method of fabricating a multi-compartment innerduct includes the steps of positioning a plurality of longitudinally extending, laterally spaced, strips of adhesive on a longitudinally extending sheet of fabric material, connecting adjacent of the strips together to form compartments, and attaching the compartments together.
US11522344B2	Optimizing a layout of an emitter array A closely spaced emitter array may include a first emitter comprising a first plurality of structures and a second emitter, adjacent to the first emitter, comprising a second plurality of structures. The first emitter and the second emitter may be configured in the closely spaced emitter array such that different types of structures between the first plurality of structures and the second plurality of structures do not overlap while maintaining close spacing between the first emitter and the second emitter.
US11522341B2	Tunable laser and laser transmitter A tunable laser includes a reflective semiconductor optical amplifier (SOA), a grating codirectional coupler, and a reflective microring resonator. The grating codirectional coupler and the reflective microring resonator are both formed on a silicon base. An anti-reflection film is disposed on a first end surface of the reflective SOA, and the first end surface is an end surface, coupled to a first waveguide of the grating codirectional coupler, of the reflective SOA. A second waveguide of the grating codirectional coupler is coupled to the first waveguide, a first grating is disposed on the first waveguide, a second grating disposed opposite to the first grating is disposed on the second waveguide, and the first grating and the second grating constitute a narrow-band pass filter. The second waveguide is connected to the reflective microring resonator.
US11522339B2	Method for narrowing the linewidth of a single mode laser by injecting optical feedback into the laser cavity through both laser cavity mirrors A method or apparatus for narrowing the linewidth of a single mode laser is provided. The linewidth of a single mode laser is narrowed by injecting an optical feedback simultaneously into the first laser cavity mirror and the second laser cavity mirror of the single mode laser.
US11522332B2	Optical receiver using a photonic integrated circuit with array of semiconductor optical amplifiers In one embodiment, an intensity modulated (IM) direct detection (DD) optical receiver using a photonic integrated circuit (PIC) with an array of semiconductor optical amplifiers (SOAs) for flexible chromatic dispersion compensation (CDC) is provided. The PIC comprises an 1:N optical splitter to split an input optical signal into N copies; an array of N semiconductor optical amplifiers (SOAs) to receive the N optical outputs from the optical splitter; an array of optical delay lines to receive the outputs from the N SOAs, wherein the delay coefficients for the array of optical delay lines are {0, T, 2T, . . . (N−1) T}, where T=½B, where B is the system symbol rate, and each optical path with odd index (1, 3, 5, . . . N−1) from the N optical paths includes a 90-degree phase-shifter; and an optical N:1 coupler to re-combine all N optical paths. A method for automatically controlling a PIC based on the feedback signal from the Rx DSP in an optical receiver is also provided.
US11522329B2	Terminal-wire bonding method and bonded terminal-wire A terminal-wire bonding method includes: arranging a first core at a second end of a first terminal-wire having a first terminal connected with the first core exposed from an insulating sheath at a first end, onto a side of an anvil and a second core at a second end of a second terminal-wire having a second terminal connected with the second core exposed, at a first end, from an insulating sheath longer than the insulating sheath of the first terminal-wire, onto a side of a horn; and bonding the first core at the second end and the second core at the second end together by ultrasonic bonding between the horn and the anvil.
US11522323B2	High-voltage plug connection part for a high-voltage plug connector of a motor vehicle, high-voltage electrical system, and motor vehicle A high-voltage plug connection part for a high-voltage plug connector of a high-voltage electrical system of a motor vehicle, the high-voltage electrical system, and the motor vehicle are disclosed herein. The high-voltage plug connector can be coupled to at least one high-voltage line. The high-voltage plug connection part has at least one integrated temperature sensor which is designed to detect a sensor signal that characterizes the temperature of the at least one high-voltage line and provide the detected sensor signal to an analysis device in order to monitor the temperature of the at least one high-voltage line.
US11522314B2	Base and detection apparatus A base and a detection device for installing a detection apparatus are provided. The base includes a base member, a first fixing member, provided on the base member for fixing the detection apparatus, and an extension member, configured to transmit an electric signal to the detection apparatus, in which the extension member extends outward to a predetermined position of the base member. The detection device includes a detection apparatus and the base.
US11522313B2	Waterproof connector A waterproof connector disposed on a circuit board of an electronic device and inserted with a housing of the electronic device is provided. The waterproof connector includes a connector and a waterproof covering member. The connector is disposed on the circuit board, and the waterproof covering member covers the connector and a part of the circuit board. An outer surface of the waterproof covering member has multiple ribs, and the ribs contact the housing to provide waterproof protection for an inside of the electronic device.
US11522312B2	Safety adapter for electrical connectors A safety adapter assembly includes a first electrical connector, a second electrical connector, a connector body, and a safety sleeve. The connector body is structured to couple the first electrical connector to the second electrical connector. The safety sleeve is substantially surrounding the connector body and configured to move relative to the connector body to selectively allow user access to the first electrical connector while substantially blocking user access to the second electrical connector, or to allow user access to the second electrical connector while substantially blocking user access to the first electrical connector.
US11522311B1	Tamper evident port protector A port protector is provided for locking insert into a communication port of electronic equipment. The port protector comprises a base member defining a support surface extending longitudinally between outer and inner ends. The locking member is deflectively coupled to the base member by a spine member extending transversely therebetween. The locking member includes an anchored portion attached to the spine member and a plank portion projecting longitudinally inward therefrom to terminate at a free end, such that the plank portion extends over the support surface of the base member. An engagement member extends from the plank portion of the locking member and is configured for retentively engaging the communication port when disposed at a locking position therein. The engagement member is releasable from the locking position responsive to the spine member being severed to decouple the locking and base members from one another.
US11522310B2	High-frequency electrical connector An electrical connector with improved high frequency performance. The connector has conductive elements, forming both signal and ground conductors, that have multiple points of contact distributed along an elongated dimension. The ground conductors may be formed with multiple beams of different length. The signal conductors may be formed with multiple contact regions on a single beam, with different characteristics. Signal conductors may have beams that are jogged to provide both a desired impedance and mating contact pitch. Additionally, electromagnetic radiation, inside and/or outside the connector, may be shaped with an insert electrically connecting multiple ground structures and/or a contact feature coupling ground conductors to a stiffener. The conductive elements in different columns may be shaped differently to reduce crosstalk.
US11522307B2	Removal mechanism of daughter board A removal mechanism of the daughter board includes a fixed frame, a moving frame, a moved frame and a handle. The fixed frame has a pushed portion. The moving frame is movably coupled to the fixed frame and has an oblique tapered edge. The moved frame is fixed to the daughter board and has a corresponding oblique edge. The handle is rotatably connected to the moving frame and has a pushing portion, and the pushed portion is on a rotation path that the pushing portion rotates with the handle. When the handle is operated, the pushing portion pushes the pushed portion, the moving frame moves relative to the fixed frame to push the corresponding oblique edge by the oblique tapered edge. The moved frame drives the daughter board to be removed from the connector.
US11522306B2	Transformation connector An electrical connector including a substrate, a pitch transformation routing assembly formed on the substrate and including pitch transformation routing members, a first set of contact members, each contact member extends away from a first end of a corresponding pitch transformation routing member, and a second set of contact members, each contact member extends away from a second end of a corresponding pitch transformation routing member. A first subset of the pitch transformation routing members each includes a first routing section extending in a first direction and a second routing section extending in a second direction. A pitch of the first set of contact members associated with the first subset of the pitch transformation routing members is different from a pitch of the second set of contact members associated with the first subset of the pitch transformation routing members.
US11522305B2	Frangible shunt link and assembly A frangible shunt link assembly includes a frangible link configured to conductively couple a current collector coupled with a vehicle and one or more components of the vehicle. The frangible link is configured to break responsive to the current collector being at least partially separated from the vehicle to interrupt a conductive connection between the current collector and the one or more components of the vehicle.
US11522304B2	Modular circuit board multi-tap A multi-tap device for a cable television (CATV) system includes a tap housing and a faceplate configured to be connected to the tap housing. The device also includes a first circuit board configured to be connected to the tap housing. The device also includes a second circuit board configured to be connected to the faceplate and to the first circuit board. The device also includes an access cover connected to the tap housing. The access cover is configured to be opened to provide access to disconnect the first circuit board from the tap housing and from the second circuit board and to subsequently remove the first circuit board from the tap housing, thereby changing a tap value of the multi-tap device. The second circuit board is configured to remain connected to the faceplate and positioned within the tap housing when the first circuit board is removed from the tap housing.
US11522297B2	Deployable cylindrical parabolic antenna A deployable antenna structure is provided that, in one embodiment, implements an offset feed, cylindrical parabolic antenna. The antenna structure employs a semi-rigid panel that can transition from a stowed state characterized by the retention of substantial strain energy to a deployed state characterized by less strain energy than in the stowed state but more than if the panel were in a strain-free state and a portion of the panel having a shape that closely conforms to a cylindrical parabolic shape.
US11522292B1	Portable electronic device and plate antenna module thereof A portable electronic device and a plate antenna module thereof are provided. The plate antenna module includes an antenna carrying structure, an inner surrounding radiation structure, a first inner feeding structure, an outer surrounding radiation structure, and a first outer feeding structure. The first inner feeding structure is surrounded by the inner surrounding radiation structure. The inner surrounding radiation structure is surrounded by the outer surrounding radiation structure and separate from the outer surrounding radiation structure. The first outer feeding structure corresponds to the first inner feeding structure. The inner surrounding radiation structure and the first inner feeding structure can cooperate with each other to form a first antenna assembly for generating a first antenna operating frequency, and the outer surrounding radiation structure and the first outer feeding structure can cooperate with each other to form a second antenna assembly for generating a second antenna operating frequency.
US11522289B2	Antenna radiator with pre-configured cloaking to enable dense placement of radiators of multiple bands Disclosed is an antenna that enables dense packing of low band, mid band, and C-band radiators. The low band radiators have a plurality of dipole arms that minimize re-radiation of either RF energy emitted by either the mid band or C-Band radiators. In one embodiment, the dipole arms are formed of a two-dimensional structure that has a shape that substantially prevents re-radiation in both the mid band and the C-band. In another embodiment, the dipole arms have two different configurations: a first configuration optimized for preventing re-radiation in the mid band, and a second configuration optimized for preventing re-radiation in the C-Band. In the latter embodiment, the low band radiators in close proximity to the mid band radiators have dipole arms of the first configuration, and the low band radiators in close proximity to the C-Band radiators have dipole arms of the second configuration.
US11522284B2	Image-capturing doorbell device This document describes an image-capturing doorbell device. In aspects, the image-capturing doorbell device provides a compact, space-efficient, battery-powered, doorbell camera. The architecture of the image-capturing doorbell device is optimized by concentrating sensors at one end of the device and user input mechanism(s) at the opposing end of the device and including a thin and narrow middle portion between the two opposing ends. The sensors include an image sensor and a PIR sensor mounted to the same PCB for space conservation. A camera lens protrudes from an outer surface of an IR window aligned with IR LEDs to mitigate IR flare. The PIR sensor is aligned with a lens that enhances radial motion detection by implementing two stacked rows of lenslets. The user input mechanism includes a light ring formed via a two-shot molding technique with a button to bond the light ring to the button for enhanced waterproofing.
US11522279B1	Radome with integrated antenna array and antenna assembly having the same A radome having an integrated antenna array and an antenna assembly having the same are described herein. A method for fabricating a radome having an integrated antenna array is also described herein. In one example, a radome is provided that includes a radome shell and an antenna array. The antenna array has a radiating surface and a backside surface. The radome shell is affixed to the antenna array forming an independent unitary structure separable from other components of an antenna assembly.
US11522273B2	Antenna for wearable devices An antenna is provided for a wearable personal computing device, such as an earbud. The antenna integrates with other components of the wearable device, such as an input control. For example, the antenna may at least partially surround a portion of a touchpad input at a surface of the device that is exposed when the device is worn. In one example, the antenna shares a ground plane with the touchpad. In another example, the antenna includes two nested traces, wherein a first trace is connected to ground and a second trace is connected to an antenna feed.
US11522270B2	Solution for beam tilting associated with dual-polarized mm-Wave antennas in 5G terminals A user equipment (UE) and a method of operating the UE. The UE a display, a cover, a transceiver, and an antenna array. The display partially forms a front surface of the UE. The cover partially forms a side surface of the UE and includes a plurality of electromagnetic strips . The transceiver transmits a signal including a vertical polarization element and a horizontal polarization element. The antenna array is electrically connected with the transceiver and disposed in the space such that, the antenna array is substantially non-overlapped with the cover. The vertical polarization element or the horizontal polarization element is substantially perpendicular to at least one of the plurality of electromagnetic strips.
US11522268B2	Wireless device with substrate to antenna coupling A device comprises an integrated circuit (IC) die, a substrate, a printed circuit board (PCB), an antenna, and a waveguide stub. The IC die is affixed to the substrate, which comprises a signal launch on a surface of the substrate that is configured to emit or receive a signal. The substrate and the antenna are affixed to the PCB, such that the signal launch and a waveguide opening of the antenna are aligned and comprise a signal channel. The waveguide stub is arranged as a boundary around the signal channel. In some implementations, the waveguide stub has a height of λ/4, where λ represents a wavelength of the signal. In some implementations, the antenna includes the waveguide stub; in others, the substrate includes the waveguide stub.
US11522262B1	Waveguide combiner/divider having plural input/output ports with longitudinal extent A combiner/divider includes a plurality of input/output waveguides distributed in a plane and diverging in at least a partially common direction away from a central point. Each input/output waveguide extends from an outer node disposed distal of the central point to an inner port proximate to and spaced from the central point. Each input/output waveguide has a respective dimension in the plane that increases between the inner port and the outer node. An output/input waveguide has an aggregate port proximate to the central point and facing the inner ports. A transition waveguide defines an open cavity that flares outwardly in the plane from the aggregate port toward the inner ports and communicatively couples the output/input waveguide with the input/output waveguides. Opposing distal surfaces of the transition waveguide and inner port edges are spaced apart by a distance that decreases with increasing distance from the aggregate port.
US11522261B2	Multi-mode transmission line and storage device including the same A multi-mode transmission line includes a first and second conductive layers, first and second waveguide walls, a strip line, and a blind conductor. The second conductive layer that is formed over the first conductive layer. The first waveguide wall is elongated in a first direction and is in contact with the first conductive layer and the second conductive layer in a vertical direction. The second waveguide wall is elongated in the first direction parallel to the first waveguide wall and is in contact with the first conductive layer and the second conductive layer in the vertical direction. The strip line is formed between the first and second conductive layers and between the first and second waveguide walls. The blind conductor is connected to one of the first conductive layer, the second conductive layer, the first waveguide wall, or the second waveguide wall.
US11522260B2	Cavity filter The present invention relates to a cavity filter and, in particular, provides an advantage of preventing performance deterioration of an antenna device by efficiently absorbing an assembly tolerance which may occur due to assembly design and preventing an interruption of an electrical flow, by comprising: an RF signal connecting part provided to be spaced apart at a predetermined distance from an external member having an electrode pad formed on one surface thereof; a terminal part which electrically connects the electrode pad of the external member to the RF signal connecting part, while absorbing an assembly tolerance existing within the predetermined distance and simultaneously preventing an interruption of an electrical flow between the electrode pad and the RF signal connecting part; a dielectric body which is inserted into a terminal insertion hole so as to surround the outside of the terminal part; and an elastic member which has a portion of the edge supported by the dielectric body and which elastically supports the terminal part by means of an operation in which a hollow part is deformed in the vertical direction when an assembly force is transmitted to the terminal part supported to pass through the hollow part, wherein the terminal part comprises one terminal brought into contact with the electrode pad and the other terminal connected to the RF signal connecting part.
US11522258B2	Electrolyte removing device, apparatus and method for manufacturing secondary battery comprising the same, and secondary battery The present invention relates to an electrolyte removing device. The electrolyte removing device comprises: a jig assembly configured to receive in a seated position a pouch comprising an accommodation part in which an electrode assembly is accommodated, a gas pocket part, and a connection part connecting the accommodation part to the gas pocket part; and an electrolyte removing assembly configured to push an electrolyte remaining on the connection part to the gas pocket part to remove the electrolyte from the connection part.
US11522257B2	Button cell A rechargeable battery includes: an electrode assembly including a first electrode, a second electrode, and a separator between the first electrode and the second electrode; a case connected to the first electrode and accommodating the electrode assembly, the case including an opening to receive the electrode assembly; a cap plate bonded to the case to cover an outer region of the opening and including a through-hole to expose a center region of the opening; a terminal plate bonded to and insulated from the cap plate, covering the through-hole, and connected to the second electrode; and a terminal plating layer coated on an upper surface of the terminal plate, and a thickness of a center portion of the terminal plating layer overlapping the through-hole is thicker than a thickness of an outer portion of the terminal plating layer overlapping the upper surface of the terminal plate.
US11522256B2	Secondary battery A secondary battery includes: an electrode assembly including a first electrode plate and a second electrode plate, and electrode uncoated portions protruding at opposite sides of the electrode assembly, a case accommodating the electrode assembly; a current collector including an electrode connecting portion located at a region corresponding to an electrode uncoated portion of the electrode uncoated portions and including a coupling groove located in a surface of the electrode connecting portion, and a terminal connecting portion bent from the electrode connecting portion and extending over the electrode assembly; and a sub-tab including a first region coupled to the coupling groove, and a second region bent from the first region and connected to the electrode uncoated portion.
US11522255B2	Battery and battery pack having the same, and electric vehicle A battery (100) and a battery pack having the same, and an electric vehicle are disclosed. The battery (100) includes: a housing; a cover plate (30) located at an end of the housing; a terminal (40) disposed on the cover plate (30); a pole core (10) located inside the housing and having a tab (20), at least one part of the tab (20) being connected to the terminal (40); and an insulating spacer (50) covering one side that is of the at least one part of the tab (20) and that faces away from the terminal (40).
US11522254B2	Energy storage apparatus This embodiment provides an energy storage apparatus that includes: a plurality of energy storage devices, each having an external terminal; and a bus bar configured to conductively connect the external terminals to each other between different ones of the plurality of energy storage devices. The bus bar includes a pair of connecting portions, each placed on the external terminal. Each of the pair of connecting portions includes a plurality of curved welded portions, each formed in a curved shape that convexly curves inward in a first direction where the pair of connecting portions are aligned. The plurality of curved welded portions are formed to be aligned in the first direction.
US11522248B2	Power storage system for an electric drive vehicle A power storage system for an electric drive vehicle; the power storage system comprises: at least one battery pack, which is provided with a plurality of electrochemical cells, which are electrically connected to one another; a container, which is provided, on the inside, with a chamber housing the battery pack; at least one first connector, which is mounted on the container; and a covering casing, which is designed to thermally insulate and protect the casing from fire. The covering casing is made of a fireproof fabric, which is also thermally insulating and is in direct contact with an outer surface of the container.
US11522244B2	Power supply and electronic cigarette having same The invention discloses a power supply for an electronic cigarette, comprising a main body and a cover, wherein the main body is provided with an accommodating with an opening, the cover comprises a cover body and a handle, the outer peripheral surface of the cover body is provided with a connection thread, the inner wall of the accommodating chamber is correspondingly provided with an internal thread, so that the cover body is detachably connected to the main body, the handle is mounted to cover body, and when the cover body is mounted to the main body, the cover body is exposed to the outside of the main body, so as to drive the cover body to rotate under an external force.
US11522239B2	Battery module, battery pack including battery module, and vehicle including battery pack A battery module includes a plurality of battery cells; a module case configured to accommodate the plurality of battery cells; and heatsink provided on at least one side of the module case to cool the plurality of battery cells by means of a flow of a coolant. The heatsink may include a cooling channel having a sequential arrangement of branch locations along a direction of the flow of the coolant, defined from an inlet side to an outlet side of the heatsink, where the cooling channel diverges into a plurality of branches at each of the branch locations.
US11522236B2	Battery pack optimization for thermal management A battery pack for an electric vehicle or a hybrid vehicle may include a housing, a stack of battery cells disposed within the housing, and a cooling subassembly. The housing typically holds the cell stack together, and the cooling subassembly typically cools the cell stack to prevent damage to the battery cells and to maintain the performance of the battery cells. The cooling subassembly may include a cold plate defining a liquid flow channel and one or more thermoelectric devices (TEDs) that are operable to cool the cell stack when current is supplied thereto. Heat spreaders may be employed within the battery pack, and exemplary configurations of components to thermally and mechanically couple the cooling subassembly are described.
US11522235B1	Battery systems for use with telematics Vehicles can employ onboard telematic monitoring devices to collect vehicle and operation data, such as for improved vehicle fleet management. Such telematic monitoring devices are dependent on power from a vehicle, such that data collection and communication can be interrupted if a telematic monitoring device is disconnected or has a poor connection. The present disclosure relates to battery devices, which provide power to telematic monitoring devices as needed in order to maintain data collection and communication, or other more limited functionality. The present disclosure also relates to systems including battery devices, and methods for operating battery devices. The present disclosure also relates to detecting temperature of batteries, as well as emergency input and messages for telematic monitoring systems.
US11522227B2	Secondary battery and comb-type electrode Provided is a secondary battery and a comb-type electrode. A negative electrode layer sheet formed by stacking a negative electrode active material layer on two surfaces of a negative electrode current collector and a positive electrode layer sheet formed by stacking a positive electrode active material layer on two surfaces of a positive electrode current collector are alternately stacked, and an electrolyte body is interposed between the negative electrode layer sheet and the positive electrode layer sheet adjacent in a stacking direction. Each of the negative electrode current collector and the positive electrode current collector includes a bent connecting part sandwiching a notch part and formed by bending two sides in directions opposite to each other. The bent connecting parts of the negative electrode current collectors adjacent in the stacking direction and the bent connecting parts of the positive electrode current collectors adjacent in the stacking direction are connected.
US11522226B2	Solid-state battery A solid-state battery, in which a battery case and electrode terminals are integrally formed by resin molding, includes a solid-state battery laminate including a cathode having a cathode layer on a first current collector, an anode having an anode layer on a second current collector, a plurality of solid electrolytes located between the cathode and the anode, and a plurality of bipolar electrodes, each bipolar electrode being located between adjacent solid electrolytes and including another cathode layer and another anode layer on both surfaces of a third current collector, a cathode terminal plate, an anode terminal plate, and a resin case encapsulating the solid-state battery laminate and the cathode and anode terminal plates.
US11522225B2	Horizontal composite electricity supply element group A horizontal composite electricity supply element group comprises a first insulation layer, a second insulation layer, a first patterned conductive layer, a second patterned conductive layer, and a plurality of electricity supply element groups. The first patterned conductive layer is disposed on the first insulation layer. The second patterned conductive layer is disposed on the second insulation layer. The plurality of electricity supply element groups are disposed between the first insulation layer and the second insulation layer, and connected in series and/or in parallel via the first patterned conductive layer and the second patterned conductive layer. The electricity supply element group is formed by several serially connected independent electricity supply elements whose electrolyte systems do not circulate with one another. Thereby, the high voltage produced by connection will not influence any single electricity supply element nor decompose their respective electrolyte systems.
US11522223B2	Silicon-based energy storage devices with phosphazene containing electrolyte additives Electrolytes and electrolyte additives for energy storage devices comprising phosphazene based compounds are disclosed. The energy storage device comprises a first electrode and a second electrode, wherein at least one of the first electrode and the second electrode is a Si-based electrode, a separator between the first electrode and the second electrode, an electrolyte comprising at least two electrolyte co-solvents, wherein at least one electrolyte co-solvent comprises a phosphazene based compound.
US11522221B2	Gelation reagent for forming gel electrolyte and methods relating thereto The present technology relates to gel electrolytes for using in lithium-ion electrochemical cells and methods of forming the same. For example, the method may include adding one or more gelation reagents to an electrochemical cell including one or more liquid electrolyte precursors. The one or more gelation reagents include one or more initiators and one or more crosslinking agents. Each of the one or more initiators may be one of a thermal initiator and an actinic/electron beam initiator. Each of the one or more crosslinking agents may be one of a tridentate alkane and a tetradentate alkane having one or more substitutes including a terminal group represented by:
US11522208B2	Membrane-electrode assembly for fuel cells with improved chemical durability and proton conductivity and method of manufacturing the same The present disclosure relates to a membrane-electrode assembly for fuel cells and a method of manufacturing the same, and more particularly to a membrane-electrode assembly to which an electrolyte membrane including a cerium oxide and phosphoric acid functionalized graphene oxide is applied, whereby chemical durability and proton conductivity of the membrane-electrode assembly are improved.
US11522207B2	Fuel cell system, method of controlling fuel cell system, and storage medium A fuel cell system includes fuel cell, an electrical storage device that stores electric power generated by the fuel cell, and a control device that controls generation of power by the fuel cell, that acquires a charging rate of the electrical storage device, when the electric power in the electrical storage device is supplied to external devices, the control device performs first control which increases a charging rate of the electrical storage device and second control which restricts a power generation amount of the fuel cell to be smaller than in the first control and decreases a charging rate of the electrical storage device, and when a temperature detected by the temperature sensor is lower than a predetermined temperature, a power generation amount per hour of the fuel cell in the first control is reduced in comparison when the detected temperature is equal to or greater than the predetermined temperature.
US11522205B2	Fuel cell system and control method for fuel cell system The control device is provided with a power generation part configured to be able to selectively perform normal power generation and low efficiency power generation in which the power generation loss is greater compared with normal power generation when there is a request for warmup of the fuel cell. The power generation part temporarily stops the low efficiency power generation and performs normal power generation when during performance of the low efficiency power generation the target generated electric power of the fuel cell becomes equal to or greater than a predetermined first switching electric power.
US11522204B1	Method and aparatus for controlling temperature of coolant in fuel cell system A fuel cell system includes a fuel cell stack, a first cooling line configured to circulate a first coolant that passes via the fuel cell stack, a first radiator disposed on the first cooling line, a valve configured to switch a flow path of the first coolant to the fuel cell stack or the first radiator, and a controller connected to the valve and configured to set a target temperature at an inlet of the fuel cell stack and a correction coefficient for controlling an opening degree of the valve, measure a first coolant temperature at an outlet of the fuel cell stack and a second coolant temperature at an outlet of the first radiator, calculate the opening degree of the valve based on the first coolant temperature, the second coolant temperature, the target temperature, and the correction coefficient, and correct the correction coefficient based on comparison of a third coolant temperature at the inlet of the fuel cell stack and the target temperature, in response to the opening degree being within a first range.
US11522203B2	Drying method of fuel cell and drying apparatus of fuel cell A drying method of a fuel cell includes holding the fuel cell having separator plates exposed on the surface of the fuel cell at a predetermined angle, and blowing air to the fuel cell at an angle in a range of 5° or larger and 85° or smaller with respect to the surface of the separator plate of the fuel cell held at the predetermined angle.
US11522202B2	Alloy member, cell stack, and cell stack device An alloy member includes a base member that includes a plurality of recesses in a surface and is constituted by an alloy material containing chromium, a plurality of embedded portions that are respectively disposed in the plurality of recesses, and a coating layer that covers the base member and is connected to the plurality of embedded portions. An average value of actual lengths of line segments of the plurality of embedded portions is longer than an average value of straight lengths of straight lines of the plurality of embedded portions in a cross-section of the base member along a thickness direction of the base member. The average value of the actual lengths is 1.10 times or more the average value of the lengths of the straight lines.
US11522196B2	Anode active material, preparation method therefor, and nonaqueous lithium secondary battery comprising same anode active material, and preparation method therefor The present invention relates to an anode active material, a nonaqueous lithium secondary battery comprising the same, and a preparation method therefor, and the purpose of the present invention is to improve high-rate charging characteristics without deterioration of charging and discharging efficiency and lifetime characteristics when applying an amorphous carbon coating layer as the anode active material of the nonaqueous lithium secondary battery, wherein the amorphous carbon coating layer comprising MoPx particles composed of MoP and MoP2 is formed on the surface of a carbon-based material, thereby reducing resistance when intercalating lithium ions into the surface of the carbon-based material, and improving reactivity and structural stability of the surface. The anode active material according to the present invention comprises a carbon-based material, and an amorphous carbon coating layer comprising MoPx particles composed of MoP and MoP2 formed on the surface of the carbon-based material.
US11522195B2	Liquid metal buffer layer for lithium batteries Enabling the use of lithium metal as an anode electrode is a key for developing next generation energy storage device beyond current lithium ion battery technology. However, there are major obstacles that need to be overcome before it can be used in commercial applications; specifically, dendrite formation can short the cell, and electrolyte decomposition contributes to decreased battery lifetimes. Each obstacle can be overcome by coating a lithium metal anode with a liquid metal buffer that enables uniform deposition of lithium ions thereon, preventing dendritic growth and forming a stable solid electrolyte interface to separate the lithium metal anode from the electrolyte within a battery cell. The liquid metal buffer becomes a semi-liquid buffer when contributing to forming a solid electrolyte interface, and can regain its liquid state when the lithium ions flow to the cathode of the battery cell.
US11522194B2	Negative electrode plate, preparation method thereof and electrochemical device The invention refers to negative electrode plate, preparation method thereof and electrochemical device. The negative electrode plate comprises: a negative current collector, a negative active material layer, and an inorganic dielectric layer which are provided in a stacked manner; the negative active material layer comprises opposite first surface and second surface, wherein the first surface is disposed away from the negative current collector; the inorganic dielectric layer is disposed on the first surface of the negative active material layer and consists of an inorganic dielectric material. The negative electrode plate provided by the application is useful in an electrochemical device, and can result in an electrochemical device having simultaneously excellent safety performance and cycle performance.
US11522190B2	Lead-based alloy and related processes and products A lead-based alloy containing alloying additions of bismuth, antimony, arsenic, and tin is used for the production of doped leady oxides, lead-acid battery active materials, lead-acid battery electrodes, and lead-acid batteries.
US11522187B2	Positive electrode material for rechargeable lithium ion batteries The invention provides a positive electrode active material for a lithium ion battery, comprising a lithium transition metal-based oxide powder, the powder comprising single crystal monolithic particles comprising Ni and Co and having a general formula Li1+a ((Niz (Ni1/2 Mn1/2)y Cox)1−kAk)1-a 02, wherein A is a dopant, −0.02
US11522183B2	Rechargeable lithium battery A rechargeable lithium battery includes an electrode laminate including a positive electrode including a positive current collector and a positive active material layer disposed on the positive current collector; a negative electrode including a negative current collector, a negative active material layer disposed on the negative current collector, and a negative electrode functional layer disposed on the negative active material layer; and a separator, wherein the electrode laminate has a ratio (L/W) of a height (L), which is a length in a protruding direction of an electrode terminal, relative to a width (W), which is perpendicular to the protruding direction of the electrode terminal and parallel to the laminate surface, is about 1.1 to about 2.3, the positive active material layer includes a first positive active material including at least one of a composite oxide of a metal selected from cobalt, manganese, nickel, and a combination thereof and lithium and a second positive active material including a compound represented by Chemical Formula 1, the negative electrode functional layer includes flake-shaped polyethylene particles, and an operation voltage is greater than or equal to about 4.3 V. LiaFe1-x1Mx1PO4 [Chemical Formula 1] In Chemical Formula 1, 0.90≤a≤1.8, 0≤x1≤0.7, and M is Mn, Co, Ni, or a combination thereof.
US11522181B2	Silicon-oxygen compound, secondary battery using it, and related battery module, battery pack and device The present application provide a silicon-oxygen compound, a secondary battery using it, and related battery modules, battery packs, and devices. The silicon-oxygen compound provided by the present application has a formula of SiOx, in which x satisfies 0
US11522176B2	Electrodes, lithium-ion batteries, and methods of making and using same Described herein are improved composite anodes and lithium-ion batteries made therefrom. Further described are methods of making and using the improved anodes and batteries. In general, the anodes include a porous composite having a plurality of agglomerated nanocomposites. At least one of the plurality of agglomerated nanocomposites is formed from a dendritic particle, which is a three-dimensional, randomly-ordered assembly of nanoparticles of an electrically conducting material and a plurality of discrete non-porous nanoparticles of a non-carbon Group 4A element or mixture thereof disposed on a surface of the dendritic particle. At least one nanocomposite of the plurality of agglomerated nanocomposites has at least a portion of its dendritic particle in electrical communication with at least a portion of a dendritic particle of an adjacent nanocomposite in the plurality of agglomerated nanocomposites.
US11522175B2	Method of producing cathode slurry, cathode and all-solid-state battery, and cathode and all-solid-state battery In conventional arts, it is impossible to form a good solid-solid interface in cathode mixture layers of all-solid-state batteries, which significantly deteriorates resistance of the all-solid-state battery after the charge/discharge cycle, which is problematic. A cathode slurry is produced by a method including: a first step of dispersing a conductive additive constituted of carbon in a solvent to obtain a first slurry; a second step of dispersing a sulfide solid electrolyte in the first slurry to obtain a second slurry; and a third step of dispersing a cathode active material in the second slurry to obtain a third slurry, to be used to form a cathode mixture layer. This may suppress agglomeration of the cathode active material as using the conductive additive as a core, and may lower the proportion of agglomerate present in the cathode mixture layer. As a result, a good solid-solid interface may be formed in the cathode mixture layer of the all-solid-state battery, and the resistance increase of the all-solid-state battery after the charge/discharge cycle may be suppressed.
US11522171B2	Rechargeable battery and method for manufacturing the same A rechargeable battery includes at least an electrolyte layer, a cathode layer and an anode layer. The electrolyte layer includes a lithium salt compound arranged between a cathode surface of the cathode layer and an anode surface of the anode layer. The anode layer is a nanostructured silicon containing thin film layer including a plurality of columns, wherein the columns are directed in a first direction perpendicular or substantially perpendicular to the anode surface of the silicon thin film layer. The columns are arranged adjacent to each other while separated by grain-like column boundaries running along the first direction. The columns include silicon and have an amorphous structure in which nano-crystalline regions exist.
US11522168B2	Negative electrode sheet, preparation method thereof and lithium ion battery containing the same The present disclosure provides a negative electrode sheet, a preparation method thereof and a lithium ion battery containing the same. The negative electrode sheet includes a negative electrode current collector, where the negative electrode current collector includes a single-sided coating area and a double-sided coating area; in the double-sided coating area, second coating layers are disposed on both side surfaces of the negative electrode current collector, respectively, wherein each of the second coating layers includes a first negative electrode active material layer and a second negative electrode active material layer, the second negative electrode active material layer is disposed on a surface of the negative electrode current collector, and the first negative electrode active material layer is disposed on a surface of the second negative electrode active material layer.
US11522167B2	Display substrate, display apparatus, and method of manufacturing thereof The present disclosure is related to a method of manufacturing a display substrate. The method may include forming a pattern layer (100, 200) on a base substrate (300) and forming a first planarization layer (500). The pattern layer (100, 200) may include at least one recess (105). Forming the first planarization layer (500) may include forming a pre-polymerized solution (501) at least in the recess (105) and polymerizing the pre-polymerized solution (501) in the recess (105) to form the first planarization layer (500).
US11522165B2	Organic EL image display device The present invention provides an organic EL image display device including a reflecting layer, an organic electroluminescent layer group, a polarization separation layer, and a circularly polarizing plate in this order, in which the polarization separation layer includes polarization separation sites arranged in a matrix form corresponding to the organic electroluminescent layer group, the polarization separation site reflects light of one polarization state and transmits light of the other polarization state in light emitted from the corresponding organic electroluminescent layer, the polarization separation layer is divided by a visible light transmission region to form the polarization separation sites, and a wavelength range of the reflection is wider than a wavelength range of the light emission. The organic EL image display device according to the present invention has high brightness at the time of both front observation and oblique observation and little image blurring.
US11522162B2	Display device with wiring line between islands in bending region In a bending region provided in a frame region, an opening is formed in an inorganic layered film, a plurality of residual layers of the inorganic layered film are provided in island shapes in a plan view in the opening, and a frame wiring line is disposed between the adjacent residual layers.
US11522160B2	Optical layer having refractive layer covering organic layer and display device including the same A display device includes: a display area; a display element which emits light and includes a pixel electrode, an opposite electrode, and a light emission layer between the pixel electrode and the opposite electrode; an encapsulation layer covering the display element; sensing electrodes disposed on the encapsulation layer; and a light-shielding layer disposed on each of the sensing electrodes to correspond to each of the sensing electrodes. The encapsulation layer includes: a first organic layer having a refractive index, a first opening defined in the first organic layer and corresponding to the light emission layer of the display element, and a first refractive layer covering the first organic layer.
US11522157B2	Display device comprising sealing film provided covering light-emitting element Provided is a display device including: a base substrate; a light-emitting element provided on one surface side of the base substrate; and a sealing film provided covering the light-emitting element, wherein the sealing film includes a first inorganic film and a second inorganic film sequentially provided covering the light-emitting element, and a resin layer provided in an island shape between the first inorganic film and the second inorganic film.
US11522156B2	Display device with light-transmissive conductive film between sealing films A display device includes: a base substrate; a TFT layer; a plurality of light-emitting elements; a sealing portion; a display region; and a frame region, wherein the sealing portion includes a first sealing film provided on the plurality of light-emitting elements, a second sealing film provided above the first sealing film, a third sealing film provided above the second sealing film, and a light-transmissive conductive film provided between two sealing films of the first sealing film, the second sealing film, and the third sealing film, an edge of the first sealing film and an edge of the third sealing film are positioned outward of an edge of the second sealing film in the frame region, and the light-transmissive conductive film is electrically connected to a first electrodes or a second electrode.
US11522154B2	Flexible display apparatus A flexible display apparatus includes a first functional layer, a second functional layer above the first functional layer, a third functional layer above the second functional layer, a first adhesive layer between the first functional layer and the second functional layer, and having a first recovery rate, and a second adhesive layer between the second functional layer and the third functional layer, and having a second recovery rate that is lower than the first recovery rate.
US11522151B2	Organic light-emitting device An organic light-emitting device includes a first electrode layer, an emission layer, an electron transporting layer, an electron injection layer, and a second electrode layer sequentially formed from bottom to top. The emission layer includes a guest light-emitting material, a first phenyl phosphine oxide derivative and a hole transporting material. The electron transporting layer includes a second phenyl phosphine oxide derivative and a third phenyl phosphine oxide derivative different from the second phenyl phosphine oxide derivative. One of the second phenyl phosphine oxide derivative and the third phenyl phosphine oxide derivative is identical to the first phenyl phosphine oxide derivative. The electron injection layer includes an alkaline metal compound.
US11522148B2	Display panel having quantum dot light scattering particle composite and manufacturing method thereof The present application provides a display panel and a manufacturing method thereof. Quantum dot ink is prepared by dispersing a quantum dot light scattering particle composite in a dispersion medium. The quantum dot light scattering particle composite includes light scattering particles and oil phase quantum dots attached to surfaces of the light scattering particles. Oil solubility of the oil phase quantum dots is used to increase dispersion stability of the light scattering particles in the dispersion medium to satisfy process requirements of inkjet printing.
US11522142B2	Light-emitting element material, light-emitting element, light-emitting device, electronic device, lighting device, and organometallic complex A novel light-emitting element material is provided. Alternatively, a light-emitting element material capable of simplifying a process for manufacturing a light-emitting element is provided. Alternatively, a light-emitting element material capable of reducing the cost for manufacturing a light-emitting element is provided. Alternatively, one embodiment of the present invention provides a light-emitting element material capable of achieving a light-emitting element having favorable emission efficiency. A light-emitting element material including an organic compound which includes a first skeleton having a carrier-transport property and a second skeleton having a light-emitting property in one molecule and in which the molecular weight is less than or equal to 3000, is provided.
US11522141B2	Electronic switching element An electronic switching element is described having, in sequence, a first electrode, a molecular layer bonded to a substrate, and a second electrode. The molecular layer contains compounds of formula I, R1-(A1-Z1)r—B1—(Z2-A2)s-Sp-G, wherein A1, A2, B1, Z1, Z2, Sp, G, r, and s are as defined herein, in which a mesogenic radical is bonded to the substrate via a spacer group, Sp, by means of an anchor group, G. The switching element is suitable for production of components that can operate as a memristive device for digital information storage.
US11522139B2	Organic light emitting diode Disclosed herein are an organic light emitting diode including: at least two light emitting stacks interposed between an anode and a cathode and including at least one light emitting material layer; and a charge generation layer interposed between the light emitting stacks. The charge generation layer includes an N-type charge generation layer and a P-type charge generation layer, wherein the N-type charge generation layer and the P-type charge generation layer are stacked in such direction for the N-type charge generation layer to face the anode and for the P-type charge generation layer to face the cathode. The N-type charge generation layer includes a compound represented by Formula 1. The P-type charge generation layer includes any one selected from the group consisting of a compound represented by Formula 2, a compound represented by Formula 3, and a combination thereof. The material for N-type charge generation layers and the material for P-type charge generation layers of the disclosure can secure low driving voltage and long lifespan of an organic light emitting diode when used in the organic light emitting diode. Compounds of Formulae 1, 2, and 3 are as defined herein.
US11522137B2	Organic light emitting element, display device, image information processing device, lighting device, image forming device, exposure device, and organic photoelectric conversion element The present disclosure provides an organic light emitting element which has a pair of electrodes and an organic compound layer disposed therebetween and in which the organic compound layer contains an organic compound represented by the following general formula [1], wherein in the formula [1], Ar1 and Ar2 each independently represent an aromatic hydrocarbon group or a heteroaromatic ring group, R1 to R4 are each independently selected from a hydrogen atom or a substituent, R1 and R2 and R3 and R4 each may form a benzene ring, wherein the benzene ring may have at least one substituent.
US11522134B2	Resistive switching memory including resistive switching layer fabricated using sputtering and method of fabricating the same Disclosed is a method of fabricating a resistive switching memory. A method of fabricating a resistive switching memory according to an embodiment of the present invention includes a step of forming a lower electrode on a substrate; a step of forming a resistive switching layer on the lower electrode using sputtering; and a step of forming an upper electrode on the resistive switching layer, wherein, in the step of forming a resistive switching layer on the lower electrode using sputtering, the substrate is disposed in a region, which is not reached by plasma generated by the first and second targets, between the first target and the second target disposed above the substrate to deposit the resistive switching layer.
US11522132B2	Storage device and storage unit with a chalcogen element A storage device includes a first electrode, a second electrode, and a storage layer. The second electrode is disposed to oppose the first electrode. The storage layer is provided between the first electrode and the second electrode, and includes one or more chalcogen elements selected from tellurium (Te), selenium (Se), and sulfur (S), transition metal, and oxygen. The storage layer has a non-linear resistance characteristic, and the storage layer is caused to be in a low-resistance state by setting an application voltage to be equal to or higher than a predetermined threshold voltage and is caused to be in a high-resistance state by setting the application voltage to be lower than the predetermined threshold voltage to thereby have a rectification characteristic.
US11522131B2	Resistive memory device and methods of making such a resistive memory device An illustrative device disclosed herein includes a bottom electrode, a conformal switching layer positioned above the bottom electrode and a top electrode positioned above the conformal switching layer. The top electrode includes a conformal layer of conductive material positioned above the conformal switching layer and a conductive material positioned above the conformal layer of conductive material.
US11522128B2	Metasurface phase change communicator A metasurface unit cell for use in constructing a metasurface array is provided. The unit cell may include a ground plane layer comprising a first conductive material, and a phase change material layer operably coupled to the ground plane layer. The phase change material layer may include a phase change material configured to transition between an amorphous phase and a crystalline phase in response to a stimulus. The unit cell may further include a patterned element disposed adjacent to the phase change material layer and includes a second conductive material. In response to the phase change material transitioning from a first phase to a second phase, the metasurface unit cell may resonate to generate an electromagnetic signal having a defined wavelength. The first phase may be the amorphous phase or the crystalline phase and the second phase may be the other of the amorphous phase or the crystalline phase.
US11522126B2	Magnetic tunnel junctions with protection layers A film stack for a magnetic tunnel comprises a substrate, a magnetic reference layer disposed over the substrate, and a tunnel barrier layer disposed over the magnetic reference layer. The film stack further comprises a magnetic storage layer disposed over the tunnel barrier layer, and a capping layer disposed over the magnetic storage layer. Further, the film stack comprises at least one protection layer disposed between the magnetic reference layer and the tunnel barrier layer and disposed between the magnetic storage layer and the capping layer. Additionally, a material forming the at least one protection layer differs from at least one of a material forming the magnetic reference layer and a material forming the magnetic storage layer.
US11522124B2	Spin-orbit torque type magnetoresistance effect element, and method for producing spin-orbit torque type magnetoresistance effect element A spin-orbit torque type magnetoresistance effect element including a magnetoresistance effect element having a first ferromagnetic metal layer with a fixed magnetization direction, a second ferromagnetic metal layer with a varying magnetization direction, and a non-magnetic layer sandwiched between the first ferromagnetic metal layer and the second ferromagnetic metal layer; and spin-orbit torque wiring that extends in a first direction intersecting with a stacking direction of the magnetoresistance effect element and that is joined to the second ferromagnetic metal layer; wherein the magnetization of the second ferromagnetic metal layer is oriented in the stacking direction of the magnetoresistance effect element; and the second ferromagnetic metal layer has shape anisotropy, such that a length along the first direction is greater than a length along a second direction orthogonal to the first direction and to the stacking direction.
US11522120B1	Micro crystal oscillator A micro crystal oscillator includes: a tank body including a tank bottom and a side wall, the tank bottom including an inner surface and an outer surface, wherein the side wall is disposed on a periphery of the inner surface of the tank bottom to form a recess together with the tank bottom; a plurality of patterned electrodes arranged on the outer surface; a first patterned circuit arranged on the side wall; a plurality of vias disposed in the tank body for electrically connecting at least one of the patterned electrodes to the first patterned circuit; an oscillating chip arranged on the inner surface and located in the recess; and a plurality of connecting wires located in the recess and respectively connected to the oscillating chip and the first patterned circuit in a wire bonding manner; wherein the micro crystal oscillator is of millimeter level.
US11522118B2	Superconductor structure with normal metal connection to a resistor and method of making the same A method of forming a superconductor structure is disclosed. The method comprises forming a superconductor line in a first dielectric layer, forming a resistor with an end coupled to an end of the superconductor line, and forming a second dielectric layer overlying the resistor. The method further comprises etching a tapered opening through the second dielectric layer to the resistor, and performing a contact material fill with a normal metal material to fill the tapered opening and form a normal metal connector coupled to the resistor.
US11522117B2	Phononic bus for coherent interfaces between a superconducting quantum processor, spin memory, and photonic quantum networks A hybrid quantum system performs high-fidelity quantum state transduction between a superconducting (SC) microwave qubit and the ground state spin system of a solid-state artificial atom. This transduction is mediated via an acoustic bus connected by piezoelectric transducers to the SC microwave qubit. For SC circuit qubits and diamond silicon vacancy centers in an optimized phononic cavity, the system can achieve quantum state transduction with fidelity exceeding 99% at a MHz-scale bandwidth. By combining the complementary strengths of SC circuit quantum computing and artificial atoms, the hybrid quantum system provides high-fidelity qubit gates with long-lived quantum memory, high-fidelity measurement, large qubit number, reconfigurable qubit connectivity, and high-fidelity state and gate teleportation through optical quantum networks.
US11522115B2	Impedance matched superconducting nanowire photodetector for single- and multi-photon detection Conventional readout of a superconducting nanowire single-photon detector (SNSPD) sets an upper bound on the output voltage to be the product of the bias current and the load impedance, IB×Zload, where Zload is limited to 50Ω in standard RF electronics. This limit is broken/exceeded by interfacing the 50Ω load and the SNSPD using an integrated superconducting transmission line taper. The taper is a transformer that effectively loads the SNSPD with high impedance without latching. The taper increases the amplitude of the detector output while preserving the fast rising edge. Using a taper with a starting width of 500 nm, a 3.6× higher pulse amplitude, 3.7× faster slew rate, and 25.1 ps smaller timing jitter was observed. The taper also makes the detector's output voltage sensitive to the number of photon-induced hotspots and enables photon number resolution.
US11522114B2	Thermoelectric conversion material and method for producing same The present invention provides: a thermoelectric conversion material capable of being produced in a simplified manner and at a lower cost and excellent in thermoelectric performance and flexibility, and a method for producing the material. The thermoelectric conversion material has, on a support, a thin film of a thermoelectric semiconductor composition containing thermoelectric semiconductor fine particles, a heat-resistant resin and an inorganic ionic compound. The method for producing a thermoelectric conversion material having, on a support, a thin film of a thermoelectric semiconductor composition containing thermoelectric semiconductor fine particles, a heat-resistant resin and an inorganic ionic compound includes a step of applying a thermoelectric semiconductor composition containing thermoelectric semiconductor fine particles, a heat-resistant resin and an inorganic ionic compound onto a support and drying it to form a thin film thereon, and a step of annealing the thin film.
US11522113B2	Display device and method of manufacturing the same A display device includes a substrate and a display element layer disposed on the substrate and emitting light. The display element layer includes a first electrode electrically connected to a portion of a first light emitting element, a second electrode electrically connected to another portion of the first light emitting element, and at least one insulating structure disposed on the substrate and having a convex shape protruding from the substrate. The first light emitting element is disposed in a space of the at least one insulating structure. A method of manufacturing the display device is also disclosed.
US11522111B2	Optoelectronic device An optoelectronic device, including: a support; at least one first electrically-conductive layer covering the support; display pixel circuits including first and second opposite surfaces bonded to the first electrically-conductive layer, each display pixel circuit including an electronic circuit including the first surface and a third surface opposite to the first surface, the first surface being bonded to the first electrically-conductive layer, and at least one optoelectronic circuit bonded to the third surface and including at least one light-emitting diode, at least one of the electrodes of the light-emitting diode being connected to the electronic circuit by the third surface; at least one second electrically-conductive layer covering the display pixel circuits and electrically coupled to the electronic circuits of the display pixel circuits on the side of the second surface.
US11522109B2	Light emitting package structure and method of manufacturing the same A light emitting package structure and a method of manufacturing the light emitting package structure are provided. The method includes: a preparation process: mounting a light emitting unit on a substrate; a dispensing process: coating a sealant on a first joint area of the substrate; a cover-enclosing process: disposing a cover element having a second joint area on the substrate, the first joint area and the second joint area joined to each other by the sealant; a vacuum process: reducing an ambient pressure to a first pressure lower than the original ambient pressure; a pressure-adjusting process: adjusting the ambient pressure around the package structure to a second pressure higher than the first pressure; and a curing process: curing the sealant.
US11522107B2	Light emitting diode and fabrication method thereof A light-emitting diode includes a light-emitting epitaxial layer having a first surface as a light-emitting surface and a second, opposing, surface, including a first type semiconductor layer, an active layer, and a second type semiconductor layer; a metal reflective layer disposed over the second surface; and a protective layer formed seamlessly on a surface of the metal reflective layer and on a side wall of the metal reflective layer.
US11522106B2	Nitride-based light-emitting diode device A nitride-based light-emitting diode (LED) device includes an n-type nitride semiconductor layer, an active layer that is disposed on the n-type nitride semiconductor layer, a p-type nitride semiconductor layer disposed on the active layer, and a defect control unit disposed between the n-type nitride semiconductor layer and the active layer. The defect control unit includes first, second and third defect control layers that are sequentially disposed on the n-type nitride semiconductor layer in such order, and that have different doping concentrations. The third defect control layer includes one of Al-containing ternary nitride, Al-containing quaternary nitride, and a combination thereof.
US11522105B2	Nitride semiconductor laminated structure, nitride semiconductor light emitting element, and method for manufacturing nitride semiconductor laminated structure An object of the present disclosure is to provide a technique capable of attaining an AlN template which has less strain and is suitable for producing the ultraviolet LED. Provided is a nitride semiconductor laminate structure, including at least a sapphire substrate, a first AlN layer formed on a principal surface of the sapphire substrate, and a second AlN layer formed on the first AlN layer, wherein an absolute value of a strain amount ε2 of the second AlN layer in the a-axis direction is smaller than an absolute value of a strain amount ε1 of the first AlN layer in the a-axis direction.
US11522102B2	Semiconductor device A semiconductor device is provided. The semiconductor device includes a first semiconductor layer; a second semiconductor layer on the first semiconductor layer; an active region between the second semiconductor layer and the first semiconductor layer; an electron blocking structure between the active region and the second semiconductor layer; a first Group III-V semiconductor layer between the active region and the electron blocking structure; and a second Group III-V semiconductor layer between the electron blocking structure and the second semiconductor layer; wherein the first Group III-V semiconductor layer and the second Group III-V semiconductor layer each includes indium, aluminum and gallium, the first Group III-V semiconductor layer has a first indium content, the second Group III-V semiconductor layer has a second indium content, and the second indium content is less than the first indium content.
US11522101B2	Inorganic light-emitting diode chip, method for preparing the same, and display substrate The present disclosure provides an inorganic light-emitting diode chip, a method for preparing the same, and a display substrate. The inorganic light-emitting diode chip includes: an undoped gallium nitride layer and a light-emitting unit arranged on the undoped gallium nitride layer, the light-emitting unit includes a first light-emitting subunit including a first N-type gallium nitride layer, a first multi-quantum well layer and a first P-type gallium nitride layer that are sequentially arranged, and a second light-emitting subunit including a second P-type gallium nitride layer, a second multi-quantum well layer and a second N-type gallium nitride layer that are sequentially arranged on a surface of the first P-type gallium nitride layer; an orthogonal projection of the second multi-quantum well layer on the undoped gallium nitride layer is smaller than an orthogonal projection of the first multi-quantum well layer on the undoped gallium nitride layer.
US11522100B2	Light-emitting device and display apparatus Provided are a light-emitting device and a display apparatus. The light-emitting device includes: sub-pixels located on an array substrate, the sub-pixels each includes a first electrode and a second electrode that are disposed opposite to each other, and a quantum migrating layer between the first electrode and the second electrode. The quantum migrating layer includes a non-light-exiting region and a light-exiting region corresponding to a backlight source. Transparent charged particles and quantum dots, which can be driven by an electric field to migrate in the light-exiting region and the non-light-exiting region, are encapsulated in an accommodating cavity of the quantum migrating layer. When there are quantum dots gathered in the light-exiting region, the quantum dots are excited to emit light; when there is no quantum dot in the light-exiting region, the light emitted by the backlight source directly passes and exits through the light-exiting region.
US11522095B2	Solar cell module including solar cells, method of manufacturing solar cell module A 12th solar cell and a 13th solar cell are provided to overlap in part as viewed from a side of a light receiving surface 22. A portion of a light receiving surface of the 12th solar cell and a portion of a back surface of the 13th solar cell face each other in an overlapping portion across a wire. The overlapping portion includes a part where a resin is located both between the light receiving surface of the 12th solar cell and the wire and between the back surface of the 13th cell and the wiring member.
US11522093B2	Optoelectronic device with reflective face The present invention relates to an optoelectronic device comprising a substrate having a first and a second substantially planar face, a series of grooves in the first substantially planar face, and a first and a second electrical conductor on the second substantially planar face; wherein a first face of the first electrical conductor and a first face of the second electrical conductor are reflective.
US11522088B2	Display panel, manufacturing method thereof, and display device The disclosure provides a display panel, a manufacturing method thereof, and a display device. The display panel includes a substrate layer, a gate layer, an insulating layer, and an active layer. The gate layer is disposed on the substrate layer and includes a first gate layer and a second gate layer. The second gate layer is disposed on a surface of the first gate layer. The insulating layer covers the gate layer and the substrate layer. The active layer is disposed on a surface of the insulating layer away from the gate layer. The active layer includes a first layer section and a second layer section connected to the first layer section, and a surface of the second layer section is above a surface of the first section layer.
US11522085B2	Ferroelectric semiconductor device and method A ferroelectric semiconductor device and method are described herein. The method includes performing a diffusion anneal process to drive elements of a dopant film through an amorphous silicon layer and into a gate dielectric layer over a fin to form a doped gate dielectric layer with a gradient depth profile of dopant concentrations. The doped gate dielectric layer is crystallized during a post-cap anneal process to form a gradient depth profile of ferroelectric properties within the crystallized gate dielectric layer. A metal gate electrode is formed over the crystallized gate dielectric layer to obtain a ferroelectric transistor with multi-ferroelectric properties between the gate electrode and the channel. The ferroelectric transistor may be used in deep neural network (DNN) applications.
US11522084B2	FinFET device and method of forming and monitoring quality of the same A FinFET structure with a gate structure having two notch features therein and a method of forming the same is disclosed. The FinFET notch features ensure that sufficient spacing is provided between the gate structure and source/drain regions of the FinFET to avoid inadvertent shorting of the gate structure to the source/drain regions. Gate structures of different sizes (e.g., different gate widths) and of different pattern densities can be provided on a same substrate and avoid inadvertent of shorting the gate to the source/drain regions through application of the notched features.
US11522080B2	High-voltage p-channel FET based on III-nitride heterostructures III-Nitride heterostructures with low p-type sheet resistance and III-Nitride heterostructure devices with gate recess and devices including the III-Nitride heterostructures are disclosed.
US11522079B2	Electrostatically controlled gallium nitride based sensor and method of operating same An electrostatically controlled sensor includes a GaN/AlGaN heterostructure having a 2DEG channel in the GaN layer. Source and drain contacts are electrically coupled to the 2DEG channel through the AlGaN layer. A gate dielectric is formed over the AlGaN layer, and gate electrodes are formed over the gate dielectric, wherein each gate electrode extends substantially entirely between the source and drain contacts, wherein the gate electrodes are separated by one or more gaps (which also extend substantially entirely between the source and drain contacts). Each of the one or more gaps defines a corresponding sensing area between the gate electrodes for receiving an external influence. A bias voltage is applied to the gate electrodes, such that regions of the 2DEG channel below the gate electrodes are completely depleted, and regions of the 2DEG channel below the one or more gaps in the direction from source to drain are partially depleted.
US11522076B2	Field effect transistor, method of fabricating field effect transistor, and electronic device A field effect transistor (FET), a method of fabricating a field effect transistor, and an electronic device, the field effect transistor comprises: a source and a drain, the source being made of a first graphene film; a channel disposed between the source and the drain, and comprising a laminate of a second graphene film and a material layer having semiconductor properties, the second graphene film being formed of bilayer graphene; and a gate disposed on the laminate and electrically insulated from the laminate.
US11522075B2	Semiconductor device and method of manufacturing same A semiconductor device according to one or more embodiments may include a first semiconductor region of a first conductivity type, a second semiconductor region of the first conductivity type with a higher impurity concentration than an impurity concentration of the first semiconductor region, the second semiconductor region being provided on a first principal surface of the first semiconductor region, a third semiconductor region of a second conductivity type provided on an upper surface of the second semiconductor region, the third semiconductor region being doped with an impurity in accordance with an impurity concentration profile including peaks along a film thickness direction, a fourth semiconductor region of the first conductivity type provided on an upper surface of the third semiconductor region.
US11522073B2	Semiconductor devices and methods of manufacturing thereof A method of fabricating a semiconductor device is disclosed. The method includes forming semiconductor fins on a substrate. A first dummy gate is formed over the semiconductor fins. A recess is formed in the first dummy gate, and the recess is disposed between the semiconductor fins. A dummy fin material is formed in the recess. A portion of the dummy fin material is removed to expose an upper surface of the first dummy gate and to form a dummy fin. A second dummy gate is formed on the exposed upper surface of the first dummy gate.
US11522069B2	Thin-film semiconductors Systems and methods disclosed and contemplated herein relate to manufacturing thin film semiconductors. Resulting thin film semiconductors are particularly suited for applications such as flexible optoelectronics and photovoltaic devices. Broadly, methods and techniques disclosed herein include high-temperature deposition techniques combined with lift-off in aqueous environments. These methods and techniques can be utilized to incorporate thin film semiconductors into substrates that have limited temperature tolerances.
US11522067B2	High electron mobility transistor (HEMT) device and method of forming same A high electron mobility transistor (HEMT) device and a method of forming the same are provided. The method includes forming a first III-V compound layer over a substrate. A second III-V compound layer is formed over the first III-V compound layer. The second III-V compound layer has a greater band gap than the first III-V compound layer. A third III-V compound layer is formed over the second III-V compound layer. The third III-V compound layer and the first III-V compound layer comprise a same III-V compound. A passivation layer is formed along a topmost surface and sidewalls of the third III-V compound layer. A fourth III-V compound layer is formed over the second III-V compound layer. The fourth III-V compound layer has a greater band gap than the first III-V compound layer.
US11522064B2	Metal oxide semiconductor field-effect transistor (MOSFET) devices and manufacturing methods thereof Provided are metal oxide field-effect transistor (MOSFET) devices having a metal gate structure, in which a work function of the metal gate structure is uniform along a length direction of a channel, and manufacturing methods thereof. The MOSFET devices include a semiconductor substrate, an active area on the semiconductor substrate and extending in a first direction, and a gate structure on the semiconductor substrate. The gate structure extends across the active area in a second direction that traverses the first direction and comprises a high-k layer, a first metal layer, a work function control (WFC) layer, and a second metal layer, which are sequentially stacked on the active area. A lower surface of the WFC layer may be longer than a first interface between a lower surface of the first metal layer and an upper surface of the high-k layer in the first direction.
US11522058B2	Semiconductor device with field plate electrode A semiconductor device includes a first electrode, a first semiconductor layer connected to the first electrode, a second semiconductor layer on the first semiconductor layer, a third semiconductor layer on the second semiconductor layer, a fourth semiconductor layer on the third semiconductor layer, a second electrode connected to the third and fourth semiconductor layers, a gate electrode extending from the fourth toward the second semiconductor layer next to the third semiconductor layer, a field plate electrode extending in a direction from the fourth toward the second semiconductor layer next to the second semiconductor layer, and a first insulating film between the field plate electrode and the second semiconductor layer and having a lower end further from the field plate electrode than the first semiconductor layer; the first, second, and fourth semiconductor layers are of a first conductivity type; and the third semiconductor layer is of a second conductivity type.
US11522055B2	Stack comprising single-crystal diamond substrate A stack including at least a semiconductor drift layer stacked on a single-crystal diamond substrate having a coalescence boundary, wherein the coalescence boundary of the single-crystal diamond substrate is a region that exhibits, in a Raman spectrum at a laser excitation wavelength of 785 nm, a full width at half maximum of a peak near 1332 cm−1 due to diamond that is observed to be broader than a full width at half maximum of the peak exhibited by a region different from the coalescence boundary, the coalescence boundary has a width of 200 μm or more, and the semiconductor drift layer is stacked on at least the coalescence boundary.
US11522054B2	Non-equilibrium polaronic quantum phase-condensate based electrical devices Electrical devices are disclosed. The devices include an insulating substrate. A UO2+x crystal or oriented crystal UO2+x film is on a first portion of the substrate. The UO2+x crystal or film originates and hosts a non-equilibrium polaronic quantum phase-condensate. A first lead on a second portion of the substrate is in electrical contact with the UO2+x crystal or film. A second lead on a third portion of the surface is in electrical contact with the UO2+x crystal or film. The leads are isolated from each other. A UO2+x excitation source is in operable communication with the UO2+x crystal or film. The source is configured to polarize a region of the crystal or film thereby activating the non-equilibrium quantum phase-condensate. One source state causes the UO2+x crystal or film to be conducting. Another source state causes the UO2+x crystal or film to be non-conductive.
US11522048B2	Gate-all-around integrated circuit structures having source or drain structures with epitaxial nubs Gate-all-around integrated circuit structures having source or drain structures with epitaxial nubs, and methods of fabricating gate-all-around integrated circuit structures having source or drain structures with epitaxial nubs, are described. For example, an integrated circuit structure includes a first vertical arrangement of horizontal nanowires and a second vertical arrangement of horizontal nanowires. A first pair of epitaxial source or drain structures includes vertically discrete portions aligned with the first vertical arrangement of horizontal nanowires. A second pair of epitaxial source or drain structures includes vertically discrete portions aligned with the second vertical arrangement of horizontal nanowires. A conductive contact structure is laterally between and in contact with the one of the first pair of epitaxial source or drain structures and the one of the second pair of epitaxial source or drain structures.
US11522045B2	Semiconductor structures including middle-of-line (MOL) capacitance reduction for self-aligned contact in gate stack A method of forming a semiconductor structure includes forming a first middle-of-line (MOL) oxide layer and a second MOL oxide layer in the semiconductor structure. The first MOL oxide layer including multiple gate stacks formed on a substrate, and each gate stack of the gate stacks including a source/drain junction. A first nitride layer is formed over a silicide in the first MOL oxide layer. A second nitride layer is formed. Trenches are formed through the second nitride layer down to the source/drain junctions. A nitride cap of the plurality of gate stacks is selectively recessed. At least one self-aligned contact area (CA) element is formed within the first nitride layer. The first MOL oxide layer is selectively recessed. An air-gap oxide layer is deposited. The air gap oxide layer is reduced to the at least one self-aligned CA element and the first nitride layer.
US11522044B2	Ferroelectric capacitor integrated with logic Ferroelectric capacitor is formed by conformably depositing a non-conductive dielectric over the etched first and second electrodes, and forming a metal cap or helmet over a selective part of the non-conductive dielectric, wherein the metal cap conforms to portions of sidewalls of the non-conductive dielectric. The metal cap is formed by applying physical vapor deposition at a grazing angle to selectively deposit a metal mask over the selective part of the non-conductive dielectric. The metal cap can also be formed by applying ion implantation with tuned etch rate. The method further includes isotopically etching the metal cap and the non-conductive dielectric such that non-conductive dielectric remains on sidewalls of the first and second electrodes but not on the third and fourth electrodes.
US11522039B2	Stretchable display panel and display device A stretchable display panel and a display device are provided in the present disclosure. The stretchable display panel includes a plurality of display islands arranged in an array and a plurality of stretch bridges each connecting to two adjacent display islands, and further includes a display function layer and a touch control electrode layer. The display function layer and the touch control electrode layer are both disposed on a display island of the plurality of display islands; and an orthographic projection of the touch control electrode layer on the display island at least partially surrounds an orthographic projection of the display function layer on the display island.
US11522038B2	Display device for improving brightness unevenness in display region of peculiar shape A frame region includes a first routed wire extending from one of a plurality of scan signal lines, one of a plurality of light-emission control lines, or one of a plurality of data signal lines. The first routed wire is electrically connected to drive circuits. The first routed wire is included in a first metal layer. A first conductive film is included in a second metal layer. The first routed wire and the first conductive film overlap each other via an inorganic insulating film.
US11522035B2	Display panel A display panel includes a base layer, a circuit layer, a light emitting element, a pixel defining film, an encapsulation layer, and a first dam. The base layer may include a display area and a non-display area adjacent to the display area. The encapsulation layer may include a first inorganic film, an organic film, and a second inorganic film. The first dam may be disposed between the first inorganic film and the second inorganic film, and outside the organic film. The first dam may overlap the non-display area and the pixel defining film on a plane. Therefore, in the display panel of an embodiment, the non-display area may be reduced.
US11522031B2	Display panel, display device, and manufacturing method of display panel A display panel, a display device, and a manufacturing method of the display panel are disclosed. The display panel includes an array substrate and a light-emitting function layer disposed on the array substrate. The display panel includes a display area and a sensor light-receiving area adjacent to the display area. The array substrate includes a thin film transistor array disposed in the display area, the light-emitting function layer is disposed in the display area and the sensor light-receiving area, and the thin film transistor array is electrically connected to the light-emitting function layer.
US11522029B2	Display backplate and manufacturing method thereof, and display device A display backplate and a manufacturing method thereof, and a display device are provided. The display backplate includes a base substrate and a pixel defining layer provided on the base substrate, the pixel defming layer defines a plurality of sub-pixel openings, an accommodation groove is provided at a surface of the pixel defining layer facing away from the base substrate, and the accommodation groove is located between two adjacent sub-pixel openings.
US11522025B2	Polymeric films and display devices containing such films Polymeric films, which may be adhesive films, and display devices including such polymeric films, wherein a polymeric film includes: a first polymeric layer having two major surfaces, wherein the first polymeric layer includes a first polymeric matrix and particles. The first polymeric layer includes: a first a polyolefin-based low WVTR adhesive polymeric matrix having a refractive index n1; and particles having a refractive index n2 uniformly dispersed within the first polymeric matrix; wherein the particles are present in an amount of less than 30 vol-%, based on the volume of the first polymeric layer, and have a particle size range of 400 nanometers (nm) to 3000 nm; and wherein n1 is different than n2.
US11522023B2	Display device The present invention provides a display device which includes a display panel, a light shielding member, and an electronic element. The display panel includes a first display region and a second display region disposed corresponding to the electronic element, and a light transmittance of the second display region is greater than a light transmittance of the first display region. When the electronic element is in operation, the light shielding member is opened to open a light-transmitting channel between the electronic element and the second display region. When the electronic element is not in operation, the light shielding member is closed to close the light-transmitting channel. When the electronic element needs to be used, the light shielding member is opened. When the electronic element is not needed, the light shielding member shield the electronic element to hide it.
US11522019B2	Display panel A display panel includes at least two pixel repeating units arranged in an array. Each of the pixel repeating units at least includes a first pixel, a second pixel, and a third pixel. A shape of the first pixel includes a convex arc, and each of shapes of the second pixel and the third pixel includes a convex arc and a concave arc. Shapes of edges of two of the first pixel, the second pixel, and the third pixel are complementary in at least one of a first direction, a second direction, a third direction, and a fourth direction, the first direction is perpendicular to the second direction, the third direction is a direction having an angle of less than 90 degrees with the first direction, and the fourth direction is perpendicular to the third direction.
US11522018B2	Pixel structure, display panel and display apparatus The present disclosure provides a pixel structure, a display panel and a display apparatus. The pixel structure according to an embodiment of the present disclosure includes a pixel structure including: a plurality of pixel units. Each of the plurality of pixel units includes a plurality of sub-pixels, each of the plurality of sub-pixels is divided into at least two target sub-pixels, and a separation region is provided between two adjacent target sub-pixels.
US11522017B2	Organic photoreceptors A sensor unit detects beams. The sensor unit has organic photoreceptors, and at least one computing unit. Respective photoreceptors of the organic photoreceptors are configured to generate a voltage depending on a type and intensity of an incident radiation. The respective photoreceptors of the organic photoreceptors are directly connected to the at least one computing unit as a respective signal source. The at least one computing unit is configured to generate an image from information ascertained from the photoreceptors or from electric pulses.
US11522014B2	Connections for memory electrode lines Subject matter disclosed herein relates to an integrated circuit device having a socket interconnect region for connecting a plurality of conductive lines at a first vertical level to interconnect structures formed at a second vertical level different from the first vertical level. The conductive lines include a plurality of contacted lines that are vertically connected to the interconnect structures at the socket interconnect region, a plurality of terminating lines terminating at the socket interconnect region, and a plurality of pass-through lines that pass through the socket interconnect region without being vertically connected and without being terminated at the socket interconnect region.
US11522012B2	Deep in memory architecture using resistive switches A DIMA semiconductor structure is disclosed. The DIMA semiconductor structure includes a frontend including a semiconductor substrate, a transistor switch of a memory cell coupled to the semiconductor substrate and a computation circuit on the periphery of the frontend coupled to the semiconductor substrate. Additionally, the DIMA includes a backend that includes an RRAM component of the memory cell that is coupled to the transistor switch.
US11522009B2	MRAM device having self-aligned shunting layer Various embodiments of the present disclosure are directed towards a memory device including a shunting layer overlying a spin orbit torque (SOT) layer. A magnetic tunnel junction (MTJ) structure overlies a semiconductor substrate. The MTJ structure includes a free layer, a reference layer, and a tunnel barrier layer disposed between the free and reference layers. A bottom electrode via (BEVA) underlies the MTJ structure, where the BEVA is laterally offset from the MTJ structure by a lateral distance. The SOT layer is disposed vertically between the BEVA and the MTJ structure, where the SOT layer continuously extends along the lateral distance. The shunting layer extends across an upper surface of the SOT layer and extends across at least a portion of the lateral distance.
US11522003B2	Matrix-array detector with a plurality of groups of driver modules are interlaced according to the order of the rows of pixels and method for implementing the detector A matrix-array detector and to a method for implementing the detector are provided. The detector includes an array of pixels that are sensitive to a physical effect and arranged in a matrix along rows and down columns, each pixel generating a signal according to the physical effect; row conductors, each allowing the pixels of one row to be driven; a first group of driver modules each delivering selection signals to one row conductor of a first group of row conductors; a second group of driver modules each delivering selection signals to one row conductor of a first group of row conductors; the first and second groups of row conductors being interlaced.
US11522002B2	Method for forming semiconductor image sensor A method for forming a semiconductor image sensor includes following operation. A first substrate including a first bottom side and a first top side is provided. A first interconnect structure is disposed under the first bottom side of the first substrate. An insulating structure is formed over the first top side of the first substrate. A conductor penetrating the insulating structure and the first substrate is formed and a first bonding pad is formed in the insulating structure. A second substrate including a second bottom side and a second top side is provided with the second bottom side facing the first top side of the first substrate. A second interconnect structure is disposed under the second bottom side of the second substrate, and a second bonding pad is coupled to the second interconnect structure. The first bonding pad is bonded to the second bonding pad to form a first bonded structure.
US11521999B2	Image sensing device An image sensing device includes a photoelectric conversion element, a floating diffusion (FD) region, and a transfer gate. The photoelectric conversion element is disposed in a substrate, and generates photocharges in response to incident light. The floating diffusion (FD) region is disposed over the photoelectric conversion element, and stores the photocharges generated by the photoelectric conversion element. The transfer gate transfer the photocharges generated by the photoelectric conversion element to the floating diffusion (FD) region in response to a transmission signal. The transfer gate includes a horizontal gate disposed over the photoelectric conversion element, and a vertical gate coupled to the horizontal gate. The vertical gate is positioned at a side of the photoelectric conversion element, and surrounds the photoelectric conversion element.
US11521994B2	Open circuit voltage photodetector An open circuit voltage photodetector comprises a photovoltaic device including a photovoltaic junction, and a transistor. The photovoltaic device is connected to the gate terminal of the transistor to input an open circuit voltage of the photovoltaic device to the gate terminal. An array of such photodetectors and a readout integrated circuit forms an image sensor. In a photodetection method, an open circuit voltage is generated in a photovoltaic device in response to illumination by incident radiation, and the open circuit voltage is applied to a gate terminal of a transistor to modulate a channel current flowing in a channel of the transistor. A readout electronic circuit may be fabricated with an extra transistor, and a photovoltaic device disposed on the readout electronic circuit and electrically connected to apply an open circuit voltage of the photovoltaic device to a gate of the extra transistor.
US11521993B2	Display panel and method of manufacturing the same A display panel and method of manufacturing the same are provided. The method of manufacturing the display panel includes the steps of providing a substrate, forming a gate on the substrate, forming a gate insulating layer on the gate and the substrate, forming a polysilicon layer on the gate insulating layer, performing a first gray-scale mask process on the polysilicon layer to form a source region, a drain region and an active region located between the source region and the drain region by the polysilicon layer, forming an interlayer dielectric layer on the gate insulating layer and the polysilicon layer, forming a first electrode layer on the interlayer dielectric layer, performing a second gray-scale mask process on the first electrode layer and the interlayer dielectric layer.
US11521990B2	Display device The object of the present invention is to make it possible to form an LTPS TFT and an oxide semiconductor TFT on the same substrate. A display device includes a substrate having a display region in which pixels are formed. The pixel includes a first TFT using an oxide semiconductor 109. An oxide film 110 as an insulating material is formed on the oxide semiconductor 109. A gate electrode 111 is formed on the oxide film 110. A first electrode 115 is connected to a drain of the first. TFT via a first through hole formed in the oxide film 110. A second electrode 116 is connected to a source of the first TFT via a second through hole formed in the oxide film 110.
US11521989B2	Display substrate, display apparatus and manufacturing method of display substrate A display substrate, a display apparatus, and a manufacturing method of the display substrate are provided. The display substrate includes: a base substrate; and a crystallization induction layer and a polysilicon layer stacked on the base substrate. The crystallization induction layer includes induction layer patterns and intervals between the induction layer patterns. The polysilicon layer includes a portion overlapping the induction layer patterns and a portion overlapping the intervals, a crystallinity of the portion of the polysilicon layer overlapping the induction layer patterns is larger than a crystallinity of the portion of the polysilicon layer overlapping the intervals.
US11521987B2	Vertical memory devices A vertical memory device may include a channel connecting pattern on a substrate, gate electrodes spaced apart from each other in a first direction on the channel connecting pattern, and a channel extending in the first direction through the gate electrodes and the channel connecting pattern. Each of the electrodes may extend in a second direction substantially parallel to an upper surface of the substrate, and the first direction may be substantially perpendicular to the upper surface of the substrate. An end portion of the channel connecting pattern in a third direction substantially parallel to the upper surface of the substrate and substantially perpendicular to the second direction may have an upper surface higher than an upper surface of other portions of the channel connecting pattern except for a portion thereof adjacent the channel.
US11521985B2	Electro-thermal method to manufacture monocrystalline vertically oriented silicon channels for three-dimensional (3D) NAND memories A method of forming a multitude of vertical NAND memory cells, includes, in part, forming a multitude of insulating materials on a silicon substrate, forming a trench in the insulating materials to expose a surface of the silicon substrate, depositing a layer of polysilicon along the sidewalls of the trench, filling the trench with oxide, forming a metal layer above the trench, and forming a mono-crystalline channel for the NAND memory cells by applying a voltage between the silicon substrate and the metal layer to cause the polysilicon sidewalls to melt. The melted polysilicon sidewalls is enable to recrystallize into the mono-crystalline channel.
US11521983B2	Method of fabricating three-dimensional semiconductor memory device Methods of fabricating a three-dimensional semiconductor memory device are provided. A method may include forming a mold structure on a substrate including channel regions and a non-channel region between the channel regions, and forming, on the mold structure, a multilayered mask layer including a first mask layer, an etch stop layer, and a second mask layer that are sequentially stacked. The multilayered mask layer may include mask holes exposing the mold structure in the channel regions, dummy mask holes exposing the first mask layer in the non-channel region, and buffer spacers covering sidewalls of the second mask layer exposed by the mask holes and the dummy mask holes. The method may include etching the mold structure using the multilayered mask layer as an etch mask to form channel holes in the channel regions.
US11521982B2	Three-dimensional semiconductor device having deposition inhibiting patterns The present disclosure may provide a semiconductor device having a stable structure and a low manufacturing degree of the difficulty. The device may include conductive layers and insulating layers which are alternately stacked; a plurality of pillars passing through the conductive layers and the insulating layers; and a plurality of deposition inhibiting patterns, each deposition inhibiting pattern being formed along a portion of an interface between a side-wall of each of the pillars and each of the conductive layers and along a portion of an interface between each of the insulating layers and each of the conductive layers.
US11521981B2	Three-dimensional (3D) semiconductor memory device A 3D semiconductor memory device includes a peripheral circuit structure including a first row decoder region, a second row decoder region, and a control circuit region between the first and second row decoder regions, a first electrode structure and a second electrode structure on the peripheral circuit structure, spaced apart in a first direction, and each including stacked electrodes, a mold structure on the peripheral circuit structure between the first and second electrode structures and including stacked sacrificial layers, vertical channel structures penetrating the first and second electrode structures, a separation insulating pattern provided between the first electrode structure and the mold structure and penetrating the mold structure, and a separation structure intersecting the first electrode structure in the first direction and extending to the separation insulating pattern, wherein a maximum width of the separation insulating pattern in a second direction is greater than a maximum width of the separation structure in the second direction.
US11521979B2	Power gating in a memory device Methods, systems, and devices for power gating in a memory device are described for using one or more memory cells as drivers for load circuits of a memory device. A group of memory cells of the memory device may represent memory cells that include a switching component and that omit a memory storage element. These memory cells may be coupled with respective plate lines that may be coupled with a voltage source having a first supply voltage. Each memory cell of the group may also be coupled with a respective digit line that may be coupled with the load circuits. Respective switching components of the group of memory cells may therefore act as drivers to apply the first supply voltage to one or more load circuits by coupling a digit line with a plate line having the first supply voltage.
US11521978B2	Semiconductor device and method for fabricating the same The present application discloses a semiconductor device with a programmable unit and a method for fabricating the semiconductor device. The semiconductor device includes a substrate comprising a first region and a second region; a first semiconductor element positioned in the first region of the substrate; a second semiconductor element positioned in the first region of the substrate and electrically coupled to the first semiconductor element; and a programmable unit positioned in the second region and electrically connected to the first semiconductor element.
US11521977B2	Semiconductor memory device A method of manufacturing a semiconductor memory device and a semiconductor memory device, the method including providing a substrate that includes a cell array region and a peripheral circuit region; forming a mask pattern that covers the cell array region and exposes the peripheral circuit region; growing a semiconductor layer on the peripheral circuit region exposed by the mask pattern such that the semiconductor layer has a different lattice constant from the substrate; forming a buffer layer that covers the cell array region and exposes the semiconductor layer; forming a conductive layer that covers the buffer layer and the semiconductor layer; and patterning the conductive layer to form conductive lines on the cell array region and to form a gate electrode on the peripheral circuit region.
US11521974B2	Memory device with different types of capacitors and method for forming the same A memory device includes a semiconductor substrate having a first active region and a second active region adjacent to the first active region. The memory device also includes a first word line extending across the first active region and the second active region. The memory device further includes a first source/drain region in the first active region and a second source/drain region in the second active region disposed at opposite sides of the first word line. In addition, the memory device includes a first capacitor disposed over and electrically connected to the first source/drain region in the first active region, and a second capacitor disposed over and electrically connected to the second source/drain region in the second active region. The first capacitor and the second capacitor have different sizes.
US11521970B2	Semiconductor device and a method for fabricating the same In a method of manufacturing a semiconductor device, first and second gate structures are formed. The first (second) gate structure includes a first (second) gate electrode layer and first (second) sidewall spacers disposed on both side faces of the first (second) gate electrode layer. The first and second gate electrode layers are recessed and the first and second sidewall spacers are recessed, thereby forming a first space and a second space over the recessed first and second gate electrode layers and first and second sidewall spacers, respectively. First and second protective layers are formed in the first and second spaces, respectively. First and second etch-stop layers are formed on the first and second protective layers, respectively. A first depth of the first space above the first sidewall spacers is different from a second depth of the first space above the first gate electrode layer.
US11521967B2	Multi-finger devices with reduced parasitic capacitance A substrate has an active area including first and second doped regions separated by portions of the substrate. Gates are located over the active area, each gate formed extending over a portion of the substrate separating adjacent first and second doped regions. A length of the doped regions is greater than other devices within the substrate that have a same gate oxide thickness. A first metallization layer has first electrical connectors between each of the first doped regions and a gate immediately adjacent thereto, and second electrical connectors connected to each of the second doped regions. A second metallization layer has a first electrical connector connected to each first electrical connector of the first metallization layer, and a second electrical connector connected to each second electrical connector of the first metallization layer, with the second electrical connector of the second metallization layer not overlapping the gates.
US11521964B2	Schottky diode structures and integration with III-V transistors Embodiments herein describe techniques, systems, and method for a semiconductor device. Embodiments herein may present a semiconductor device having a channel area including a channel III-V material, and a source area including a first portion and a second portion of the source area. The first portion of the source area includes a first III-V material, and the second portion of the source area includes a second III-V material. The channel III-V material, the first III-V material and the second III-V material may have a same lattice constant. Moreover, the first III-V material has a first bandgap, and the second III-V material has a second bandgap, the channel III-V material has a channel III-V material bandgap, where the channel material bandgap, the second bandgap, and the first bandgap form a monotonic sequence of bandgaps. Other embodiments may be described and/or claimed.
US11521962B1	ESD protection circuit An electrostatic discharge protection circuit capable of clamping both positive and negative ESD events and passing signals is provided. Generally, the circuit includes a p-channel field-effect transistor (PFET) clamp coupled to a pin to be protected, the PFET clamp including a plurality of PFETs in a DN-well, an n-channel field-effect transistors (NFET) clamp coupled between ground and the pin through the PFET clamp, the NFET clamp including a plurality of NFETs coupled in series, and a bias network for biasing a voltage of the DN well to substantially equal a voltage on the pin when the voltage on the pin is greater than ground potential, and to ground potential when the pin voltage is less than ground potential. The plurality of are PFETs coupled in parallel between the pin and the NFET clamp, each of the PFETs is coupled to the pin though one of a plurality ballast resistors.
US11521961B2	Back ballasted vertical NPN transistor An integrated circuit includes a bipolar transistor, e.g. a back-ballasted NPN, that can conduct laterally and vertically. At a low voltage breakdown and low current conduction occur laterally near a substrate surface, while at a higher voltage vertical conduction occurs in a more highly-doped channel below the surface. A relatively high-resistance region at the surface has a low doping level to guide the conduction deeper into the collector.
US11521960B2	Terminal protection circuit of semiconductor chip A terminal protection circuit of a semiconductor chip, including a first pad serving as a ground terminal of the semiconductor chip, a ground line extending along an outer periphery of the semiconductor chip and being connected to the first pad, and an overcurrent sensing circuit. The overcurrent sensing circuit has a second pad, a threshold voltage generating circuit, a comparator having inverting and non-inverting input terminals respectively connected to the threshold voltage generating circuit and the second pad, the comparator comparing a current detection signal and a threshold voltage received respectively at the non-inverting and inverting input terminals, a first input protection element connected between the second pad and a first position on the chip-peripheral ground line, and a potential shift element connected between the inverting input terminal of the comparator and the first position, for shifting the threshold voltage thereat according to a potential at the first position.
US11521959B2	Die stacking structure and method forming same A method includes bonding a first device die to a second device die, encapsulating the first device die in a first encapsulant, performing a backside grinding process on the second device die to reveal through-vias in the second device die, and forming first electrical connectors on the second device die to form a package. The package includes the first device die and the second device die. The method further includes encapsulating the first package in a second encapsulant, and forming an interconnect structure overlapping the first package and the second encapsulant. The interconnect structure comprises second electrical connectors.
US11521958B2	Semiconductor device package with conductive pillars and reinforcing and encapsulating layers A semiconductor device package includes a redistribution layer, a plurality of conductive pillars, a reinforcing layer and an encapsulant. The conductive pillars are in direct contact with the first redistribution layer. The reinforcing layer surrounds a lateral surface of the conductive pillars. The encapsulant encapsulates the first redistribution layer and the reinforcing layer. The conductive pillars are separated from each other by the reinforcing layer.
US11521955B2	Display apparatus A display apparatus includes a blue light emitting element configured to emit blue light; a red light emitting element configured to emit red light; and a green light emitting element configured to emit green light. The blue light emitting element may include a first light emitting diode configured to emit light having a maximum intensity at a wavelength shorter than a blue wavelength; and a blue filter configured to transmit light having the blue wavelength.
US11521954B2	LED assembly having vertically aligned vertical type micro LED Disclosed is a light emitting diode (LED) assembly having vertical type micro LEDs which are vertically aligned and is capable of significantly improving light efficiency, a light quantity, and an integration degree through optimized alignment of the vertical type micro LEDs each having a nano size or micro size. The LED assembly includes a substrate provided with a plurality of through holes formed in a thickness direction, micro LEDs each formed in a vertical type in which a vertical width is greater than a lateral width, and aligned in an upright state by being at least partially inserted into the through holes, and a first electrode deposited on a lower surface of the substrate to be connected to a first conductive layer and a second electrode deposited on an upper surface of the substrate to be connected to a second conductive layer.
US11521953B1	3D stacked ferroelectric compute and memory Described is a packaging technology to improve performance of an AI processing system. An IC package is provided which comprises: a substrate; a first die on the substrate, and a second die stacked over the first die. The first die includes memory and the second die includes computational logic. The first die comprises a ferroelectric RAM (FeRAM) having bit-cells. Each bit-cell comprises an access transistor and a capacitor including ferroelectric material. The access transistor is coupled to the ferroelectric material. The FeRAM can be FeDRAM or FeSRAM. The memory of the first die may store input data and weight factors. The computational logic of the second die is coupled to the memory of the first die. The second die is an inference die that applies fixed weights for a trained model to an input data to generate an output. In one example, the second die is a training die that enables learning of the weights.
US11521951B2	Wristband type electronic device An electronic device includes a plurality of light emitting units mounted on a substrate, and an opening that is provided so as to correspond to each of the light emitting units and guides light emitted from the light emitting units to an outside.
US11521948B2	Method of manufacturing semiconductor device A method of manufacturing a semiconductor device, includes: preparing a support substrate having a peeling layer formed on a main surface side; partially forming a wiring layer above the peeling layer; arranging a semiconductor chip on the support substrate so that a pad of the semiconductor chip is electrically connected to the wiring layer; forming an encapsulating layer that encapsulates at least a part of the wiring layer and the semiconductor chip and is in contact with the peeling layer or a layer above the peeling layer so as to form an intermediate laminated body including the semiconductor chip, the wiring layer, and the encapsulating layer on the support substrate; cutting a peripheral portion of the support substrate after forming the intermediate laminated body; and mechanically peeling the intermediate laminated body from the support substrate with the peripheral portion cut away, with the peeling layer being as a boundary.
US11521947B1	Space efficient flip chip joint design An apparatus includes an Integrated Circuit (IC). A first pillar includes a first end and a second end. The first end is connected to the IC and the second end includes a first attachment point collinear with a first central axis of the first pillar. The first attachment point includes a first solder volume capacity. A second pillar includes a third end and a fourth end. The third end is connected to the IC and the fourth end includes a second attachment point disposed on a side of the second pillar facing the first pillar. The second attachment point includes a second solder volume capacity being less than the first solder volume capacity. A first distance between the first end and the second end is less than a second distance between the third end and the fourth end.
US11521946B2	Method for temporarily fastening a semiconductor chip to a surface, method for producing a semiconductor component and semiconductor component In an embodiment a method for producing a semiconductor component comprising at least one semiconductor chip mounted on a surface, wherein the semiconductor chip is fixed on the surface by applying a solder compound to an assembling surface of the semiconductor chip, applying a metallic adhesive layer to a side of the solder compound facing away from the assembling surface, preheating the surface to a first temperature T1, bringing the metallic adhesive layer into mechanical contact in a solid state with the preheated surface, the metallic adhesive layer at least partially melting while it is brought into mechanical contact with the preheated surface, and subsequently cooling the surface to room temperature, the semiconductor chip being at least partially metallurgically bonded to the surface, and wherein the semiconductor chip is subsequently soldered to the surface to form a resulting solder connection.
US11521943B2	Method of forming a capacitive loop substrate assembly A capacitor loop substrate assembly includes a substrate with a loop shape, one or more capacitors or other electronic components on the substrate, and an opening in the substrate to allow the capacitor loop substrate assembly to be coupled to an integrated circuit package, such as a package including a die. Interconnects and/or contacts for interconnects are formed in an integrated circuit package to couple the capacitor loop substrate assembly to the integrated circuit package.
US11521939B2	Semiconductor device structure having stiffener with two or more contact points for heat dissipating element Semiconductor device structures and methods for manufacturing the same are provided. The semiconductor device structure includes a substrate, a die and a stiffener. The substrate has an upper surface. The die is disposed on the upper surface of the substrate. The stiffener is disposed on the upper surface of the substrate and surrounds the die. The stiffener has a first upper surface adjacent to the die, a second upper surface far from the die and a lateral surface extending from the first upper surface to the second upper surface. A first distance between the first upper surface of the stiffener and the upper surface of the substrate is less than a second distance between the second upper surface of the stiffener and the upper surface of the substrate.
US11521936B2	Display substrate and method of manufacturing the same, and display panel A display substrate has a display area and a peripheral area. The display substrate includes a base, a first insulating layer disposed above the base, a first alignment pattern disposed in the peripheral area on a surface of the first insulating layer facing away from the base, and a second alignment pattern disposed in the peripheral area at a side of the first insulating layer away from the base. An orthographic projection of the second alignment pattern on the base and an orthographic projection of the first alignment pattern on the base have a non-overlapping region therebetween, and the second alignment pattern is in contact with the first insulating layer in the non-overlapping region. Adhesion between the second alignment pattern and the first insulating layer is greater than adhesion between the second alignment pattern and the first alignment pattern.
US11521935B2	Package structure and fabrication methods The present disclosure relates to methods and apparatus for forming a thin-form-factor semiconductor package. In one embodiment, a glass or silicon substrate is structured by micro-blasting or laser ablation to form structures for formation of interconnections therethrough. The substrate is thereafter utilized as a frame for forming a semiconductor package with embedded dies therein.
US11521932B2	Composite bridge die-to-die interconnects for integrated-circuit packages Disclosed embodiments include composite-bridge die-to-die interconnects that are on a die side of an integrated-circuit package substrate and that contacts two IC dice and a passive device that is in a molding material, where the molding material also contacts the two IC dice.
US11521928B2	Reducing stress cracks in substrates Implementations described herein are related to an improved semiconductor device package for providing an electrical connection between one or more semiconductor die and one or more substrates. The one or more substrates includes a dielectric layer having a first side and a second side opposite the first side, and a first metal layer bonded to the first side of the dielectric layer, the first metal layer having a first portion and a second portion. The semiconductor device package can also include a semiconductor die disposed onto the first metal layer within the first portion of the first metal layer. In some implementations, the one or more conducting substrates includes a direct bonded copper (DBC) substrate, i.e., the metal is copper.
US11521924B2	Semiconductor device with fuse and anti-fuse structures and method for forming the same The present disclosure provides a semiconductor device with a fuse structure and an anti-fuse structure and a method for forming the semiconductor device. The semiconductor device includes a first dielectric layer disposed over a semiconductor substrate, and a first electrode disposed over the first dielectric layer. The semiconductor device also includes a fuse link disposed over the first electrode, and a second electrode disposed over the fuse link. The semiconductor device further includes a third electrode disposed adjacent to the first electrode, and a second dielectric layer separating the first electrode from the first dielectric layer and the third electrode. The first electrode, the fuse link, and the second electrode form a fuse structure, and the first electrode, the third electrode, and a portion of the second dielectric layer between the first electrode and the third electrode form an anti-fuse structure.
US11521921B2	Semiconductor device package assemblies and methods of manufacture In one general aspect, a semiconductor device package can include a die attach paddle having a first surface and a second surface that is opposite the first surface. The package can also include a semiconductor die coupled with the first surface of the die attach paddle. The package can further include a direct-bonded-metal (DBM) substrate. The DBM substrate can include a ceramic layer having a first surface and a second surface that is opposite the first surface; a first metal layer disposed on the first surface of the ceramic layer and coupled with the second surface of the die attach paddle; and a second metal layer disposed on the second surface of the ceramic layer. The second metal layer can be exposed external to the semiconductor device package. The second metal layer can be electrically isolated from the first metal layer by the ceramic layer.
US11521919B2	Flex-foil package with coplanar topology for high-frequency signals The invention relates to a foil-based package with at least one foil substrate having an electrically conductive layer arranged thereon which is patterned to provide a first electrically conducting portion and a second electrically conducting portion, which is coplanar to the first electrically conducting portion, and a third electrically conducting portion, which is coplanar to the first electrically conducting portion, the first electrically conducting portion being arranged between the second and third electrically conducting portions. In accordance with the invention, the first electrically conducting portion is implemented to be a signal-guiding waveguide for high-frequency signals and the second electrically conducting portion, which is coplanar to the first electrically conducting portion, and the third electrically conducting portion, which is coplanar to the first electrically conducting portion, form an equipotential surface.
US11521918B2	Semiconductor device having component mounted on connection bar and lead on top side of lead frame and method of manufacturing semiconductor device thereof In one example, a semiconductor device comprises a substrate and an electronic device on a top side of the substrate, a lead frame on the top side of the substrate over the electronic device, wherein the lead frame comprises a connection bar and a lead, a component mounted to the connection bar and the lead on a top side of the lead frame, and an encapsulant on the top side of the substrate, wherein the encapsulant contacts a side of the electronic device and a side of the component. Other examples and related methods are also disclosed herein.
US11521917B2	Semiconductor device A semiconductor device includes a chip that includes a mounting surface, a non-mounting surface, and a side wall connecting the mounting surface and the non-mounting surface and has an eaves portion protruding further outward than the mounting surface at the side wall and a metal layer that covers the mounting surface.
US11521916B2	Method for fabricating semiconductor device with etch stop layer having greater thickness The present application discloses provides a method for fabricating a semiconductor device including providing a first semiconductor die including a first conductive layer, forming a first etch stop layer on the first conductive layer, bonding a second semiconductor die, which includes a second conductive layer above the first etch stop layer and a second etch stop layer on the second conductive layer, onto the first etch stop layer, performing a via etch process to concurrently form a first via opening to expose the first etch stop layer and a second via opening to expose the second etch stop layer, conformally forming isolation layers in the first via opening and the second via opening, performing a punch etch process to extend the first via opening and the second via opening, and concurrently forming a first through substrate via in the first via opening and a second through substrate via in the second via opening.
US11521911B2	Conformable heat sink pedestal for multi-chip packages The present disclosure relates to a heat sink pedestal including a composite material. The composite material may include at least one layer of a thermally conductive primary material and at least one layer of a thermally conductive secondary material. The composite material may include a conductivity ratio of lateral thermal conductivity (Kz) to planar thermal conductivity (Kx, Ky) of the composite material of at least 0. The heat sink pedestal may be conformable to a shape of a semiconductor chip.
US11521910B2	High-conductance thermal connector A high conductance thermal link (1) includes a thermal conductive strap (2) having pyrolytic graphite layers arranged in stacks (5) and polyimide film (6) at least partially covering each stack (5). Adhesive material is between the pyrolytic graphite layers. The thermal conductive strap (2) has two opposite ends (4) and two end fittings (3, 3′) that house the corresponding ends (4) of the thermal conductive strap (2). An adhesive material is in the ends (4) of the thermal conductive strap (2) between the pyrolytic graphite layers and between the stacks (5) of pyrolytic graphite layers. At least one of the ends (4) of the thermal conductive strap (2) has a geometry including protrusions (7) separated by intermediate gaps (8).
US11521908B2	Heater elements for processor devices Examples include a computing system including a heater element for heating a processor device installed in the computing system. The computing system includes a chassis, a circuit board assembly housed in the chassis and a heat sink assembly disposed on the chassis to form a cover of the chassis. The circuit board assembly includes a processor package including a substrate having a first portion and a second portion. The processor package includes the processor device disposed on the first portion of the substrate. The heater element disposed on the second portion of the substrate. In the computing system, the heat sink assembly is disposed on the chassis such that a gap separates the heat sink assembly and the heater element.
US11521907B2	Hybrid embedded package A semiconductor package includes a substrate formed of electrically insulating material and having a die mounting surface, a first semiconductor die embedded within the substrate and comprising a first conductive terminal that faces the die mounting surface, a second semiconductor die mounted on the die mounting surface and comprising a first conductive terminal that faces and is spaced apart from the die mounting surface, and a first electrical connection that directly connects the first conductive terminals of the first and second semiconductor dies together, wherein the second semiconductor die partially overlaps with the first semiconductor die.
US11521906B2	Circuit module A circuit module (100) includes: a substrate (10) including a plurality of inner conductors (2); a first electronic component arranged on one main surface (S1) of the substrate (10); a first resin layer (40) provided on the one main surface (S1) and configured to seal the first electronic component; a plurality of outer electrodes (B1) provided on another main surface (S2) of the substrate (10) and including a ground electrode; a conductor film (50) provided at least on an outer surface of the first resin layer (40) and a side surface (S3) of the substrate (10) and connected to the ground electrode with at least one of the plurality of inner conductors (2) interposed therebetween; and a resin film (60).
US11521901B2	Method for preparing semiconductor device The present disclosure provides a method for preparing a semiconductor device. The semiconductor device includes a substrate, a first region, a second region, a third region, a fourth region, a fifth region and a sixth region. The first type region is disposed on the substrate and has a ring structure. The second type region is disposed on the substrate and disposed in the center of the first type region. A plurality of second well regions are formed in the first region, the second region, the fourth region, the fifth region and the sixth region. A plurality of second well regions in the first region, the second region, the fourth region, the fifth region and the sixth region. The first well region, the second well region, the first type region and the second type region are formed by ion implantation.
US11521900B2	Semiconductor device and method of fabricating the same A method of manufacturing a semiconductor device includes forming a first fin-type pattern and a second fin-type pattern which are separated by a first trench between facing ends thereof, forming a first insulating layer filling the first trench, removing a portion of the first insulating layer to form a second trench on the first insulating layer, and forming a third trench by enlarging a width of the second trench.
US11521899B2	Method for increasing the electrical functionality, and/or service life, of power electronic modules In a method for increasing the electrical functionality, and/or service life, of power electronic modules, the power electronic circuit carrier, and/or the metallisation applied onto the power electronic circuit carrier, and/or a base plate connected, or to be connected, to a rear face of the power electronic circuit carrier, is finely structured by means of local material removal with at least one laser beam, so as to reduce thermomechanical stresses occurring during the production or operation of the module. In an alternative form of embodiment, the metallisation applied onto the front face of the power electronic circuit carrier is structured, or an already created structure is refined or supplemented, by means of local material removal with laser radiation, so as to achieve a prescribed electrical functionality of the metallisation.
US11521896B2	Selective deposition of a protective layer to reduce interconnect structure critical dimensions In some embodiments, the present disclosure relates to an integrated chip that includes a lower conductive structure arranged over a substrate. An etch stop layer is arranged over the lower conductive structure, and a first interconnect dielectric layer is arranged over the etch stop layer. The integrated chip further includes an interconnect via that extends through the first interconnect dielectric layer and the etch stop layer to directly contact the lower conductive structure. A protective layer surrounds outermost sidewalls of the interconnect via.
US11521892B2	Method for fabricating a semiconductor device The present application discloses a method for fabricating a semiconductor device with liners. The method includes providing a substrate having a first surface and a second surface opposite to the first surface, inwardly forming a trench on the first surface of the substrate, forming a plurality of liners positioned on side surfaces of the trench, forming a first insulating segment filling the trench, and removing part of the substrate from the second surface to expose the first insulating segment and the plurality of liners.
US11521891B2	Semiconductor device comprising a deep trench isolation structure and a trap rich isolation structure in a substrate and a method of making the same A semiconductor device includes: a metal-oxide semiconductor (MOS) transistor on a substrate; a deep trench isolation structure in the substrate and around the MOS transistor; and a trap rich isolation structure in the substrate and surrounding the deep trench isolation structure. Preferably, the deep trench isolation structure includes a liner in the substrate and an insulating layer on the liner, in which the top surfaces of the liner and the insulating layer are coplanar. The trap rich isolation structure is made of undoped polysilicon and the trap rich isolation structure includes a ring surrounding the deep trench isolation structure according to a top view.
US11521890B2	Apparatus for manufacturing semiconductor device An apparatus for manufacturing a semiconductor device includes a base portion, a bonding stage arranged on the base portion and having a placement surface for placing a substrate; and one or more connecting members which connect the base portion and the bonding stage, wherein at least one of the one or more connecting members is a connecting plate that deflects following the expansion and contraction of the bonding stage in the plane direction caused by a temperature change.
US11521889B2	Conductive porous ceramic substrate and method of manufacturing same The present invention relates to a conductive porous ceramic substrate and a method of manufacturing the same, and more particularly to a conductive porous ceramic substrate, in which a porous ceramic substrate used as a chuck or stage for fixing a thin semiconductor wafer substrate or display substrate through vacuum adsorption is imparted with antistatic performance so as to prevent the generation of static electricity, and a method of manufacturing the same.
US11521887B2	Method of transferring micro LED and micro LED transferring apparatus A method of transferring a plurality of micro LEDs formed on a substrate including transferring the micro LEDs onto a first carrier substrate having a first adhesive material layer, reducing an adhesiveness of the first adhesive material layer by curing the first adhesive material layer, transferring the micro LEDs from the first carrier substrate onto a second carrier substrate having a second adhesive material layer, bonding at least a portion of the micro LEDs on the second carrier substrate to pads of a circuit board using a metal bonding layer, and separating the second carrier substrate from the micro LEDs bonded onto the circuit board.
US11521885B2	Substrate fixing device A substrate fixing device includes a base plate including therein a gas supply section, and an electrostatic chuck provided on the base plate. The electrostatic chuck includes a base having a mounting surface on which a target to be held by electrostatic attraction is mounted, an insertion hole, penetrating the base, having an inner surface that defines the insertion hole and is threaded to form a female thread, and a screw member, having an outer surface that is threaded to form a male thread, and inserted into the insertion hole to assume a mated state in which the male thread mates with the female thread. A gas from the gas supply section is supplied to the mounting surface via the screw member.
US11521884B2	Electrostatic chuck sidewall gas curtain The present disclosure describes an apparatus. The apparatus includes a chuck for placing an object thereon, a gas passage extending along a periphery of an outer sidewall of the chuck and separating the chuck into an inner portion and a sidewall portion, and a plurality of gas holes through the sidewall portion and configured to connect a gas external to the chuck to the gas passage.
US11521879B2	Load port apparatus, semiconductor manufacturing apparatus, and method of controlling atmosphere in pod Provided is a load port apparatus including: a mounting unit on which a pod housing a housed object is mounted; a frame portion provided to stand adjacent to the mounting unit and having a frame opening to which a main opening of the pod is connected; a door engageable with a lid for the main opening of the pod for opening and closing the frame opening and the main opening; a door drive mechanism which drives the door; an inner gas exhaust unit provided below an inner side of the frame opening to exhaust a gas from an inside of a mini environment connected to the pod through the main opening and the frame opening; and a corrosive gas detection sensor arranged between the frame opening and the inner gas exhaust unit or in an exhaust flow path of the inner gas exhaust unit.
US11521878B2	Adsorption device, transferring system having same, and transferring method using same An adsorption device includes a substrate and a magnetic film on a surface of the substrate. The substrate has magnetic properties and is capable of generating magnetic field. The magnetic film partially covers the surface. The magnetic film generates a magnetic field having a direction that is opposite to a direction of the magnetic field generated by the substrate. Portions of the surface of the substrate not covered by the magnetic film form positions to attract and adsorb target objects, and other portion of the surface of the substrate covered by the magnetic film is not able to attract any target object.
US11521877B2	Carrier tray A carrier tray includes a housing, an ingot accommodating recess that accommodates a semiconductor ingot, and a wafer accommodating recess that accommodates a wafer. The housing has an upper wall, a lower wall, a pair of side walls connecting the upper wall and the lower wall to each other, and a tunnel defined by the upper wall, the lower wall, and the pair of side walls. A plurality of levers each of which has a point of application projecting from a bottom surface of the ingot accommodating recess, a point of action projecting from a side surface of the ingot accommodating recess, and a fulcrum formed between the point of application and the point of action are each attached to the housing so as to be rotatable around the fulcrum.
US11521876B2	Horizontal substrate boat A horizontal substrate carrier is provided, for example a carrier for holding semiconductor substrates during horizontal thermal processing. The horizontal substrate carrier has asymmetrically placed support rails. One side of the horizontal substrate carrier has no upper rail while the other side of the horizontal substrate carrier has an upper rail placed at a relatively high location, for example at an angular location of 60° or more, more preferably of 70° or more, and most preferably at 90°. The side without an upper rail may be used for robotic loading of the horizontal substrate carrier. In a preferred embodiment, only three rails are provided: one upper rail on one side and two lower rails. The use and placement of these three rails can hold the substrate in precise uniform locations, minimize substrate movement, and minimize particle generation, all while allowing for easy robotic access.
US11521875B2	Carrier spacer and method of manufacturing semiconductor device A carrier spacer includes an annular main body, a first tapered part formed on an inner peripheral part of a front surface of the main body, a second tapered part formed on the inner peripheral part of a reverse surface of the main body, a flat surface formed on the outer peripheral side of the first tapered part on the front surface of the main body and holding the reverse surface of the outer peripheral part of a semiconductor wafer, a peripheral edge part formed on the outer peripheral side of the flat surface of the main body and provided with a step having a height position higher than a height position of the flat surface, an arcuate cutout part formed from the peripheral edge part to the flat surface of the main body, and a pair of handles protruding from the peripheral edge part toward the outer peripheral side.
US11521873B2	Processing information management system and method for managing processing information According to one embodiment, a processing information management system includes: an abnormality analyzer configured to generate abnormality occurrence data of a target wafer based on processing location information, the processing location information collected based on a first sensor outputting a first sensor signal according to a detected processing state, the first sensor provided in a wafer processing apparatus; and an integration system configured to integrate the abnormality occurrence data into wafer map data corresponding to the target wafer.
US11521872B2	Method and apparatus for measuring erosion and calibrating position for a moving process kit Embodiments disclosed herein include a method of calibrating a processing chamber. In an embodiment, the method comprises placing a sensor wafer onto a support surface in the processing chamber, wherein a process kit displaceable in the Z-direction is positioned around the support surface. In an embodiment, the method further comprises measuring a first gap distance between the sensor wafer and the process kit with a sensor on an edge surface of the sensor wafer. In an embodiment, the method further comprises displacing the process kit in the Z-direction. In an embodiment, the method further comprises measuring an additional gap distance between the sensor wafer and the process kit.
US11521871B2	Rapid thermal processing apparatus The present disclosure relates to a rapid thermal processing apparatus for rapid heat treatment of a substrate, and particularly, to increasing the accuracy in measuring the temperature of a substrate to be thermally processed by configuring a thermocouple for measuring the temperature of the substrate under the same conditions as the substrate to be thermally processed so as to be attached to and detached from the chamber, and the present disclosure provides a rapid thermal processing apparatus having a thermocouple installed to measure a temperature of a substrate to be thermally processed located inside a chamber, and the rapid thermal processing apparatus includes a mounting hole formed in the chamber, and a thermocouple kit inserted into and mounted to the mounting hole so that a bonding portion of a thermocouple wire is located at a thermocouple substrate extending into the chamber.
US11521867B2	Cutting apparatus A cutting apparatus includes a cassette table on which a first cassette in which a frame unit, ring-shaped frame and wafer are housed, and a second cassette in which a simple wafer is housed. A first conveying unit having a first frame holding part holds the ring-shaped frame of the frame unit withdrawn from the first cassette and conveys the frame unit to a chuck table. A first wafer holding part holds the simple wafer withdrawn from the second cassette and conveys the simple wafer to the chuck table. A cutting unit cuts the wafer, and a second conveying unit conveys the frame unit from the chuck table to a cleaning unit. A second wafer holding part holds the cut simple wafer and conveys it from the chuck table to the cleaning unit.
US11521865B2	Substrate processing method and substrate processing device A substrate processing method includes a liquid discharging step of discharging liquid through a nozzle toward a predetermined supply region on the main surface of a substrate held on a substrate holding unit within a chamber, a humidified gas supplying step of supplying humidified gas with a humidity higher than the humidity within the chamber onto the main surface of the substrate to remove electrical charges carried on the substrate, and a spin-drying step of rotating the substrate about a predetermined rotational axis after the liquid discharging step to spin off the liquid component from the main surface of the substrate. The humidified gas supplying step is started before the start of the liquid discharging step and ended at a predetermined termination timing after the start of the liquid discharging step and before the spin-drying step.
US11521861B2	Method of manufacturing semiconductor devices and corresponding semiconductor device Semiconductor dice are arranged on a substrate such as a leadframe. Each semiconductor die is provided with electrically-conductive protrusions (such as electroplated pillars or bumps) protruding from the semiconductor die opposite the substrate. Laser direct structuring material is molded onto the substrate to cover the semiconductor dice arranged thereon, with the molding operation leaving a distal end of the electrically-conductive protrusion to be optically detectable at the surface of the laser direct structuring material. Laser beam processing the laser direct structuring material is then performed with laser beam energy applied at positions of the surface of the laser direct structuring material which are located by using the electrically-conductive protrusions optically detectable at the surface of the laser direct structuring material as a spatial reference.
US11521851B2	Method of forming structures including a vanadium or indium layer Methods and systems for depositing vanadium and/or indium layers onto a surface of a substrate and structures and devices formed using the methods are disclosed. An exemplary method includes using a cyclical deposition process, depositing a vanadium and/or indium layer onto the surface of the substrate. The cyclical deposition process can include providing a vanadium and/or indium precursor to the reaction chamber and separately providing a reactant to the reaction chamber. The cyclical deposition process may desirably be a thermal cyclical deposition process. Exemplary structures can include field effect transistor structures, such as gate all around structures. The vanadium and/or indium layers can be used, for example, as barrier layers or liners, as work function layers, as dipole shifter layers, or the like.
US11521847B2	Hydrogen assisted atmospheric radical oxidation Apparatus, systems, and methods for processing workpieces are provided. In one example implementation, a hydrogen gas mixed with an inert gas can be reacted with an oxygen gas to oxidize a workpiece at atmospheric pressure. A chemical reaction of a hydrogen gas with an oxygen gas facilitated by a hot workpiece surface can positively affect an oxidation process. A reaction speed of the chemical reaction can be slowed down by mixing the hydrogen gas with an inert gas. Such mixture can effectively reduce a partial pressure of the hydrogen gas. As such, the oxidation process can be carried out at atmospheric pressure, thereby, in an atmospheric thermal processing chamber.
US11521843B2	Sample support, sample ionization method, and mass spectrometry method A sample support is a sample support for sample ionization, including: a substrate formed with a plurality of through holes opening to a first surface and a second surface on a side opposite to the first surface; a conductive layer provided not to block the through hole in the first surface; and a reinforcement member disposed inside a part of the plurality of through holes.
US11521839B2	Inline measurement of process gas dissociation using infrared absorption Embodiments of the present invention provide apparatus, systems and methods for measuring dissociation of a process gas generated by a RPS. In one embodiment, a method of measuring dissociation of a process gas includes receiving a process gas from a RPS, the process gas including a polyatomic molecule that dissociates into at least one free radical. The method further includes irradiating the process gas with IR radiation at one or more wavelengths, detecting the IR radiation that passes through the process gas, and determining a degree of dissociation of the polyatomic molecule in the process gas based, at least in part, on the detected IR radiation. In one embodiment, the method further comprises modifying one or more settings of the RPS, based, at least in part, on the determined degree of dissociation.
US11521829B2	Inductive coil structure and inductively coupled plasma generation system An inductively-coupled plasma (ICP) generation system may include a dielectric tube, a first inductive coil structure to enclose the dielectric tube, an RF power supply, a first main capacitor between a positive output terminal of the RF power supply and one end of the first inductive coil structure, and a second main capacitor between a negative output terminal of the RF power supply and an opposite end of the first inductive coil structure. The first inductive coil structure may include inductive coils connected in series to each other and placed at different layers, the inductive coils having at least one turn at each layer, and auxiliary capacitors, which are respectively provided between adjacent ones of the inductive coils to distribute a voltage applied to the inductive coils.
US11521828B2	Inductively coupled plasma source Disclosed herein is an apparatus for processing a substrate using an inductively coupled plasma source. An inductively coupled plasma source utilizes a power source, a shield member, and a coil coupled to the power source. In certain embodiments, the coils are arranged with a horizontal spiral grouping and a vertical extending helical grouping. The shield member, according to certain embodiments, utilizes a grounding member to function as a Faraday shield. The embodiments herein reduce parasitic losses and instabilities in the plasma created by the inductively coupled plasma in the substrate processing system.
US11521825B2	System and method for predicting stochastic-aware process window and yield and their use for process monitoring and control In one embodiment, a method includes generating a model trained to predict a low-probability stochastic defect, using the model to predict the low-probability stochastic defect, determining a process window based on the low-probability stochastic defect, and controlling, based on the process window, a lithography tool to manufacture a device.
US11521823B2	Sample attachment device A sample attachment device includes a mount, a mounted depression, and a pressure release depression. Liquid and air bubbles can pass the pressure release depression. The mounted depression is on the mount. A cartridge is mounted on the mounted depression. The pressure release depression is in the mounted depression. The pressure release depression is vertically under the cartridge when the cartridge is mounted on the mounted depression.
US11521821B2	Ion source repeller An ion source has an arc chamber having one or more arc chamber walls defining and interior region of the arc chamber. A cathode electrode is disposed along an axis. A repeller has a repeller shaft and a ceramic target member separated by a gap. The repeller shaft is not in electrical or mechanical contact with the target member, and the repeller shaft is configured to indirectly heat the target member. The target member, can be a cylinder encircling the repeller shaft, where the gap separates the cylinder from the repeller shaft. A top cap can enclose the cylinder can be separated from a top repeller surface of the repeller shaft by the gap. A target hole can be in the top cap. The target member can be supported by a bottom liner of the arc chamber or a support member mechanically and electrically coupled to the repeller shaft.
US11521820B2	Three-dimensional beam forming x-ray source X-ray target element is comprised of a planar wafer. The planar wafer element includes a target layer and a substrate layer. The target layer is comprised of an element having a relatively high atomic number and the substrate layer is comprised of diamond. The substrate layer is configured to support the target layer and facilitate transfer of thermal energy away from the target layer.
US11521817B2	Switching device and method for operating a switching device A switching device includes: a first terminal contact; a first fixed contact arranged at the first terminal contact; a contact bridge; a contact bridge carrier arranged at the contact bridge and having a barrier; a first movable contact arranged at the contact bridge; a second terminal contact; a second fixed contact arranged at the second terminal contact; a second movable contact arranged at the contact bridge; and a magnetic drive assembly including a coil and an armature, the armature being coupled to the contact bridge. The first fixed contact is in contact with the first movable contact in a switched-on state of the switching device. The first fixed contact is free of contact with the first movable contact in a switched-off state of the switching device. The second fixed contact is in contact with the second movable contact in the switched-on state of the switching device.
US11521814B2	Low-voltage circuit breaker A low-voltage circuit breaker includes at least one current sensor for determining the magnitude of the electric current of a conductor of the low-voltage circuit breaker; and at least one electromechanical switching unit for connecting and disconnecting at least two electrical contact points. In a first switching position of the movable contact point, two contact points are connected and in a second switching position the contact points are not connected to one another. The circuit breaker further includes at least one electronic switching unit having a semiconductor switching element, electrically conductive in a first switching state and electrically blocking in a second switching state; an electronic tripping unit, connected to the current sensor, the electronic switching unit and the electromechanical switching unit. Further, when current and/or current/time-period limit values of the conductor are exceeded, first the electromechanical switching unit is opened and then the electronic switching unit is blocked.
US11521812B2	Roller input device A roller input device includes a casing and a roller. A roller seat and an encoder are disposed in the casing. The roller is pivotally disposed on the roller seat. The body of the roller includes a shaft portion, a first side, and a second side. The first side and the second side are at opposite sides of the body. The first shaft and the second shaft of the roller are connected to the shaft portion and respectively extend from the first side and the second side. An end portion of the first shaft and an end portion of the second shaft away from the shaft portion respectively have a first connection portion and a second connection portion. A structural strength of the first connection portion is greater than a structural strength of the second connection portion, and the first connection portion is connected to the encoder.
US11521811B1	Key device for a keyboard A key device for a keyboard includes a circuit board, a keycap located over the circuit board, a supporting plate disposed under the circuit board, a first stabilizing member, a second stabilizing member and two supporting members. The supporting plate includes two first mounting seats cooperatively defining a rotating axis extending in a first direction. Each of the first stabilizing member and the second stabilizing member is made of a plastic material, slidably engages the keycap, and is rotatably mounted to the first mounting seats. When the keycap is pressed toward the supporting plate, the first stabilizing member and the second stabilizing member rotate relative to the supporting plate about the rotating axis.
US11521803B2	Biochemical energy conversion cell Presented herein is a voltaic cell containing light harvesting antennae or other biologically-based electron generating structures optionally in a microbial population, an electron siphon population having electron conductive properties with individual siphons configured to accept electrons from the light harvesting antennae and transport the electrons to a current collector, an optional light directing system (e.g., a mirror), and a regulator having sensing and regulatory feedback properties for the conversion of photobiochemical energy and biochemical energy to electricity. Also presented herein is a voltaic cell having electricity-generating abilities in the absence of light. Also presented herein is the use of the voltaic cell in a solar panel.
US11521800B2	Capacitor A capacitor that includes a substrate having a first principal surface and a second principal surface, a lower electrode on the first principal surface, a dielectric film on the lower electrode, and an upper electrode on the dielectric film, wherein at least one of the lower electrode and the upper electrode has, in plan view of the first principal surface, a first region having a rectangular shape, and at least one second region protruding from at least one side of the first region.
US11521798B2	Ceramic electronic device and wiring substrate A ceramic electronic device includes: a multilayer chip in which each of internal electrode layers and each of dielectric layers are alternately stacked, wherein the multilayer chip has a first capacity region having a first electrostatic capacity C1 and a first inductance L1 and a second capacity region having a second electrostatic capacity C2 and a second inductance L2, wherein the first electrostatic capacity C1, the first inductance L1, the second electrostatic capacity C2 and the second inductance L2 satisfy (C1·L1)/(C2·L2)<0.5 or 1.9<(C1·L1)/(C2·L2).
US11521788B2	Inductor and transformer An inductor includes a plurality of wires disposed about an axis, a first electrode connected to a first end of each of the plurality of wires, and a second electrode connected to a second end of each of the plurality of wires. Each of the wires includes an outer-winding helical portion shifting in an axial direction while gradually increasing a radius thereof, an inner-winding helical portion shifting in the axial direction while gradually reducing a radius thereof, and an outer circumference connection portion that connects an end of the outer-winding helical portion and an end of the inner-winding helical portion at different positions in the axial direction.
US11521784B2	Coil component A coil component includes a body having one surface and another surface opposing each other in one direction, an internal insulating layer embedded in the body, and a coil portion disposed on the internal insulating layer and forming at least one turn. First and second external electrodes are disposed on the one surface of the body to be spaced apart from each other, and first and second connection electrodes respectively penetrate through the body to connect the coil portion and the first and second external electrodes to each other. A support electrode extends from the coil portion to be exposed to the other surface of the body to support the coil portion and the internal insulating layer.
US11521783B2	Reactor including outer iron-core and method for manufacturing the same Provided is a reactor having a core main body that includes an outer peripheral iron core, at least three iron cores, and coils. Between the iron cores adjacent to each other, a gap being magnetically coupled is formed. The reactor includes a fixture that fixes both end portions of the at least three iron cores together by passing through an interior of the outer peripheral iron core in a region between the outer peripheral iron core and the gap. The fixture includes plate-like members disposed on both end faces of the core main body and includes rod-like members that connect the plate-like members to each other by passing through the interior of the outer peripheral iron core. The plate-like members each include a protrusion extending axially inward of the core main body.
US11521780B2	Static heat exchanger for wireless power transfer pad An apparatus for a wireless power transfer (“WPT”) pad heat management system includes a ferrite structure positioned adjacent to a coil configured to wirelessly transfer power. The apparatus includes a plurality of heat spreaders positioned along a length of a component of the ferrite structure. Each of the plurality of heat spreaders is non-metallic. The apparatus includes a trough shaped to surround at least a portion of each of the plurality of heat spreaders, wherein the trough is non-metallic. The apparatus includes a phase change material (“PCM”) in the trough where at least a portion of the heat spreaders extend into the PCM. The ferrite structure, coil, plurality of heat spreaders, trough and PCM are encased in a solid material, and each of the plurality of heat spreaders comprises a material that transfers heat from the component of the ferrite structure to the PCM.
US11521779B2	Reactor A reactor including: an assembly that includes a coil and a magnetic core; a case in which the assembly is accommodated; a sealing resin with which the case is filled; and a pushing plate accommodated in the case, wherein the case includes a bottom, a side wall, and at least one groove that is open in an inner surface of the side wall, and the groove of the case includes an opening end provided in an end surface of the side wall of the case that is located opposite to the bottom of the case, and a closed end provided on the bottom of the case with respect to the opening end.
US11521778B2	Coil substrate The coil substrate may include a substrate; a first conductor layer including a plurality of first and second segments periodically disposed on a top and a bottom of the substrate; a second conductor layer including a plurality of first and second segments periodically overlapping the first conductor layer on the top and the bottom of the substrate; a first connection line that connects the first and second segments of the first conductor layer; and a second connection line that connects the first and second segments of the second conductor layer. The first connection line includes a first region exposed on at least one of first and second surfaces that are opposite to each other of the substrate and second and third regions disposed through the substrate from both sides of the first region.
US11521775B2	Electronic command and control device for an electromagnetic actuator and electromagnetic actuator thereof A device for the command and control of the electric power supply of windings of an electromagnetic actuator, comprising a plurality of electronic means configured to receive at the input either a direct current feeding voltage or alternatively an alternating current feeding voltage and to generate at the output a first digital command signal triggering an activation phase of the electromagnetic actuator in which at least one of the windings is powered, for a first predefined and adjustable time interval, with an activation current, a second digital command signal triggering a maintenance phase of the electromagnetic actuator in which the windings are powered with a maintenance current having an intensity lower than the activation current, and a third digital command signal triggering a third phase of deactivation of the electromagnetic actuator in which the power supply of the windings is interrupted for a second predefined and adjustable time interval.
US11521771B2	System for quench protection of superconducting machines, such as a superconducting wind turbine generator A quench protection system for a superconducting machine, such as a superconducting generator having a plurality of series-arranged superconducting coils, includes at least one switch heater electrically coupled to each of the superconducting coils. A quench protection switch is provided in series with the coils, wherein each switch heater is in thermal contact with the quench protection switch. A heater network is configured in parallel with the quench protection switch and is in thermal contact with each of the coils. A quench of any one of the coils triggers a quench of the quench protection switch, wherein the heater network then triggers a quench of all of the remaining coils.
US11521768B2	Ferrite powder, resin composition, and molded body The ferrite powder of the present invention is a ferrite powder containing a plurality of ferrite particles, wherein the ferrite particles each are a single crystal body having an average particle diameter of 1-2,000 nm, and have a polyhedron shape, and wherein the ferrite particles each contain 2.0-10.0 mass % of Sr, and 55.0-70.0 mass % of Fe.
US11521766B2	Wire-harness electric wire length correcting device, and wire harness producing device A wire harness electric wire length correcting device, which corrects a design value of an electric wire length of an electric wire included in a wire harness, includes an electric wire identifying means including an identification mark, which is attached to an end portion of the electric wire, and which is to be cut off from the electric wire when the wire harness is installed on an installation target object, so as to use the identification mark to identify which electric wire an end cut off from the electric wire has been cut off from, a measuring means for measuring a length of the cut off end, and a correcting means for, for the electric wire identified by the electric wire identifying means, correcting the design value of the electric wire length of that electric wire, based on the length of the cut off end measured by the measuring means.
US11521762B2	Purification process for the preparation of non-carrier added copper-64 Compositions comprising high levels of high specific activity copper-64, and process for preparing said compositions. The compositions comprise from about 2 Ci to about 15 Ci of copper-64 and have specific activities up to about 3800 mCi copper-64 per microgram of copper. The processes for preparing said compositions comprise bombarding a nickel-64 target with a low energy, high current proton beam, and purifying the copper-64 from other metals by a process comprising ion exchange chromatography or a process comprising a combination of extraction chromatography and ion exchange chromatography.
US11521761B2	Radiation shielded enclosure for spent nuclear fuel cask A containment enclosure for shielding an outer cask containing an inner canister loaded with nuclear waste such as spent fuel rods. The enclosure includes a lower base portion at least partially embedded in a concrete pad and an upper radiation shielding portion defined by a shield jacket coupled to and supported by the lower base portion at a circumferential joint. Cavities of the base and shielding portions collectively define a contiguous containment space for the cask. A portion of the cask resides in each of the base and shielding portions which completely enclose and shield the cask to minimize radiation dosage of personnel in the environment surrounding the cask. The cask is cooled by a natural convectively-driven ambient cooling air ventilation system including air inlets at the circumferential joint of the enclosure. The concrete pad may be part of a spent nuclear fuel storage installation comprising plural cask containment enclosures.
US11521754B2	System and method for modulating therapy in a remote care architecture A system and method for modulating delivery of remote therapy to a patient having an implantable medical device (IMD). Upon establishing a remote care session between a patient controller device and a clinician programmer, wherein the clinician and the patient are remotely located with respect to each other, a determination may be made if a first triggering event is detected. Responsive to the determination, a remote therapy session used for programming the patient's IMD is paused and one or more remote care therapy setting controls provided at the clinician programmer device to facilitate one or more adjustments with respect to the patient's IMD are disabled. Subsequently, responsive to detecting a second triggering event, the remote therapy session with the patient may be resumed, wherein the one or more remote care therapy setting controls of the clinician programmer device are enabled.
US11521749B2	Library screening for cancer probability A method, system, and computer program product are provided for generating a predictive model. A processor(s) obtains a raw data set (peptide libraries) of patients designated as diagnosed/pre-diagnosed with a condition or not diagnosed with the condition. The processor(s) segments the raw data set into a pre-defined number of groups and separates out a holdout group. The processor(s) performs a principal component analysis on the remaining groups to identify, based on a frequency of features in the remaining groups, common features (principal components) in the remaining groups and weighs the common features based on frequency of occurrence. The processor(s) determines a smallest number of the principal components that yields a pre-defined level of validation accuracy. The processor(s) generates a predictive model, by utilizing the smallest number for a best fit in a logistic regression model. The predictive model provides binary outcomes.
US11521746B1	Apparatus and methods for causing privacy-sensitive direction of advertising messages based on prevalence of a healthcare condition in a plurality of geographic areas A computer system and method causes selection of an advertisement based on the prevalence of a healthcare condition in each of a plurality of geographic areas. The prevalence is calculated by an entity that matches healthcare data with consumer data to determine, in each of the geographic areas, how many individuals have an unidentified healthcare condition. The entity removes information pertaining to specific geographic areas and healthcare condition codes that would permit re-identification of persons coded with those specific codes, so that the privacy of the personal healthcare information is maintained.
US11521742B2	Methods of implementing an artificial intelligence based neuroradiology platform for neurological tumor identification and for T-Cell therapy initiation and tracking and related precision medical treatment predictive modeling A method of implementing an artificial intelligence based neuroradiology platform for neurological tumor identification comprises providing a multilayer convolutional network for neurological tumor identification configured for segmenting data sets of full neurologic scans into resolution voxels; supervised learning and validation of the platform by classification of tissue within classification voxels of a specific given training and validation data sets by the multilayer convolutional network for neurological tumor identification with each classification voxel of the training and validation data sets having a predetermined ground truth; and implementing the platform by classification of tissue within classification voxels of a specific given patient data sets by the multilayer convolutional network for neurological tumor identification with each classification voxel of each data set assigned a label. The platform may be used for T-cell therapy initiation and tracking. An artificial intelligence based neuroradiology platform implemented according to the method is disclosed.
US11521741B2	Methods, systems, and computer readable media for evaluating risks associated with vascular pathologies Provided are methods for estimating a Reserve Strength Ratio in a segment of a blood vessel or a lymphatic vessel. In some embodiments, the methods include providing a multiphase Digital Imaging and Communications in Medicine (DICOM) stack of computed tomography (CT) or magnetic resonance (MR) images of a blood vessel or a lymphatic vessel to software, wherein the stack of DICOM images is organized by phase; providing the output from the software to a Model Segmentation procedure in which the first phase of the DICOM stack (1st phase) is segmented to create the Geometric Model and finite element mesh of the 1st phase and a map of Local Thickness Measure; uploading a mesh created for the first phase onto the DICOM image volume; mapping each voxel position of the mesh for the first phase to all the subsequent meshes using an optical flow (OF) algorithm; creating deformed meshes at all phases from the maps of displaced nodes; estimating local curvature at each node location for all the phases using a finite difference method; evaluating the local deformation at each phase from the meshes corresponding to all the phases using an element approach; calculating local thickness at each node for all the phases using the deformation calculation at each phase and the thickness measured at the first phase and using the assumption of incompressibility for the aortic wall; and calculating the local principal stresses for each element from an extension of Laplace's equation applied to the local principal directions of curvatures, whereby the Reserve Strength Ratio in a segment of a blood vessel or a lymphatic vessel is estimated. Also provided are methods for predicting an increased risk of rupture of a blood vessel or a lymphatic vessel, methods for identifying subjects as being at risk for rupture of a blood vessel or a lymphatic vessel, and computer program products with computer executable instructions embodied in computer readable medium for performing the methods disclosed herein.
US11521739B2	Method for including redundancy in communicating an alert condition from an implanted system to an external system A method, implantable medical system and an external system for communicating an alert signal via a transcutaneous energy transfer system (TETS), with or without the presence of transmission of the alert signal by an alternative wireless communication system, are disclosed. According to one aspect, a method in an implanted medical system includes obtaining the alert signal based on an occurrence of an event, and transmitting the alert signal from the implanted medical device to the external system via a TETS used to transfer power requests to the external system.
US11521736B1	System and method for encouraging therapeutic psychosocial activity A system for encouraging therapeutic psychosocial activity of a patient comprising a master control system having a processor for operating system software, one or more portable communication devices in communication with the master control system, a testing device having testing input software that operates to transmit information to the master control system, wherein the master control system operates to transmit an information request to the one or more portable communication devices to direct the testing input software to create a window on a display screen informing the patient information has been requested, and the testing device operates to collect and transmit test information in response to the information request.
US11521735B2	Delivering individualized mental health therapies via networked computing devices Aspects and features of this disclosure relate to delivering individualized mental health therapies via networked computing devices. A mental-health-treatment-delivery server outputs a module with video content in connection with a mental health treatment protocol for a user. The mental-health-treatment-delivery server outputs a request for the user to respond to a question or to stimuli. The mental-health-treatment-delivery server receives a response from the user to the question or the stimuli. The mental-health-treatment-delivery server compares the response to stored data to determine information to present to the user. The mental-health-treatment-delivery server receives a command from the server device to present the information to the user. The mental-health-treatment-delivery server outputs the information to an interface of the user device.
US11521734B2	Recipe generation based on neural network An illustrative aspect of the present disclosure is a system and method of generating a recipe, which includes determining rankings for a plurality of food ingredients for a target food product according to at least one of a health-based feature, a cost, or a prevalence of the plurality of food ingredients. A neural network can receive, as inputs, the rankings of the plurality of food ingredients, and a plurality of existing recipes for food products in a same category as the target food product. The neural network can generate, as output, according to the rankings of the plurality of food ingredients and the plurality of existing recipes, a new recipe for the target food product that incorporates a select food ingredient from the plurality of food ingredients.
US11521731B2	Charging device for a physiological signal transmitter A charging device for a physiological signal transmitter is disclosed, wherein the physiological signal transmitter is to receive and externally transmit a physiological signal from a subcutaneous tissue of a living body, and has a first electrical connecting port. The charging device comprises a transmitter placing seat, a charging module and a locking module. The transmitter placing seat includes a bearing surface, and a first opening. The bearing surface disposes thereon the physiological signal transmitter; and the first opening aligns therewith the first electrical connecting port of the physiological signal transmitter. The charging module includes a second electrical connecting port, a third electrical connecting port and a circuit assembly. The second electrical connecting port is disposed in the first opening and moveable between a first position and a second position. The third electrical connecting port is for connecting thereto a power source. The circuit assembly is for performing charging and charging control on the physiological signal transmitter, and the circuit assembly is electrically connected to the second electrical connecting port and the third electrical connecting port. The locking module is extendable or retractable on the bearing surface for releasably positioning the physiological signal transmitter, wherein the charging module is driven to move the second electrical connecting port from the first position to the second position to be electrically connected to the first electrical connecting port, and the locking module is driven to protrude out of the bearing surface to fix the transmitter.
US11521730B2	Systems and methods for the determination of insulin sensitivity A subject is prescribed short and long acting insulin medicament regimens. When a qualified fasting event occurs, the basal insulin sensitivity estimate of the subject is updated using (i) an expected fasting blood glucose level based upon the long acting insulin medicament dosing specified by the long acting regimen during the fasting event, (ii) glucose measurements contemporaneous with the fasting event and (iii) a prior insulin sensitivity factor. A basal insulin sensitivity factor curve is calculated from the updated basal insulin sensitivity estimate. A bolus insulin sensitivity estimate of the subject is updated upon occurrence of a correction bolus with a short acting insulin medicament using (i) an expected blood glucose level based upon the correction bolus, (ii) glucose measurements after occurrence of the correction bolus, and (iii) a prior insulin sensitivity factor. A bolus insulin sensitivity factor curve is calculated from the updated bolus insulin sensitivity estimate.
US11521728B2	Optimization of medicines delivery Embodiments for scheduling the delivery of multiple medications to a patient by a processor. Any interactions between the multiple medications or between one of the multiple medications and a type of food are considered to construct an analytical model to identify an optimized schedule for delivery of the multiple medications to the patient. The optimized schedule is adjusted in real time as additional information concerning the multiple medications and the type of food are introduced, and delivered to a dispensing device associated with the one of the multiple medications.
US11521726B2	System and method for monitoring drug delivery A system for monitoring drug delivery including a container having a medicine, the medicine associated with a patient and a code on an outside of the container. The system also including a user device having a camera and software executing on a computer readable medium for initiating recording of a video with the camera, prompting the patient to show the code in the video and show the taking of the medicine in the video. The system further includes a computer receiving the video, the computer having a datastore with a plurality of profiles, one of the plurality of profiles being a patient profile associated with the patient and software executing on a computer readable medium for storing the video, verifying the association of the medicine and the patient, identifying movement in the video, and generating a score indicative of the likelihood the medicine was taken by the patient.
US11521725B1	System and method for automating pharmacy processing of electronic prescriptions A method and system may provide an automated pharmacy processing system which automatically processes an electronic prescription by converting the electronic prescription into a pharmacy prescription record. In this way, an electronic prescription can be filled by a pharmacist without manual data entry. The system receives an electronic prescription and compares data from the electronic prescription with entries in one or more pharmacy database(s). When there is a match between the electronic prescription data and an entry in the one or more pharmacy database(s), the system populates the pharmacy prescription record with data from the matching pharmacy database entry. If all of the data fields from the pharmacy prescription record have been populated the pharmacist can fill the electronic prescription.
US11521724B2	Personalized patient engagement in care management using explainable behavioral phenotypes A mechanism is provided in a data processing system to implement a personalized patient engagement engine. The personalized patient engagement engine develops a set of models for a plurality of behavioral phenotypes based on anonymized unstructured and structured patient-care management records for a plurality of patients over a period of time; matches a given patient to a behavioral phenotype; estimates a propensity of positive and/or negative behavioral responses of each of a plurality of targeted behaviors; dynamically updates personalized intervention effectiveness rankings in context for care manager and patient decision-making based on what has been shown to lead to positive responses for individuals with a similar behavioral profile; generates an intervention recommendation for the given patient based on the personalized intervention effectiveness rankings relative to the patient given an assigned goal and an individual intervention effect estimation; and provides the intervention recommendation to the care manager.
US11521723B2	Using natural language processing to find adverse events A method for automatically classifying clinical descriptions of patients by a computer processor using natural language processing is provided. The clinical descriptions relate to the use of a ventricular assist device to treat the patient. The method comprises receiving at least one clinical description comprising text. The method also then comprises determining the position of a target word within the text. Further the method comprises determining the existence of at least one negation word within an active region, the active region comprising a predetermined number of words within the text occurring immediately before and immediately after the target word, including the target word. The method then comprises determining the existence of at least one body-part word within the active region. Lastly, the method comprises determining that the clinical description is to be disregarded if the active region contains either a negation word or a body-part word.
US11521722B2	Capturing detailed structure from patient-doctor conversations for use in clinical documentation A method and system is provided for assisting a user to assign a label to words or spans of text in a transcript of a conversation between a patient and a medical professional and form groupings of such labelled words or spans of text in the transcript. The transcript is displayed on an interface of a workstation. A tool is provided for highlighting spans of text in the transcript consisting of one or more words. Another tool is provided for assigning a label to the highlighted spans of text. This tool includes a feature enabling searching through a set of predefined labels available for assignment to the highlighted span of text. The predefined labels encode medical entities and attributes of the medical entities. The interface further includes a tool for creating groupings of related highlighted spans of texts. The tools can consist of mouse action or key strokes or a combination thereof.
US11521719B1	Valence profiling of virtual interactive objects Introduced here are health management platforms able to infer the health state of a subject based on behavioral changes reflected in the digital activities performed by a subject. A health management platform can initially acquire contextual data pertaining to digital activities performed by the subject. The health management platform can identify the target(s) of the digital activities by parsing the contextual data, and then compile the digital activities and corresponding activities into a personalized valence index. Thereafter, the health management platform can compare digital activities performed by the subject to the entries included in the personalized valence index. If a matching entry is not discovered, the health management platform can identify an instance of behavior change. These instances of behavior change may be indicative of changes in the subject's health state.
US11521718B2	Mobile application for medication reminders Methods, systems, and computer-readable media are provided for computer based healthcare information to automatically provide reminders to a patient to take prescription medications at the appropriate times on the patient's mobile device. The patient enters a medical record number (MRN) into the mobile device and this information is communicated to the patient's electronic medical record. The user device receives the prescription information for the MRN from the patient's electronic medical record. Utilizing the prescription information on the user's device, the user can view and set reminders to take the medication directly from the patient's mobile device.
US11521717B2	System and method for generating and updating a user interface to evaluate an electronic medical record A method for generating a user interface for analyzing a patient-specific electronic medical or health record that includes a problem list includes the steps of grouping related potential problems into problem list categories, grouping a subset of the problems into clusters within the categories, mapping, using a computer, entries in the problem list with a respective description in an interface terminology, associating one or more of other medical data, e.g., medication, lab results, procedures, imaging results, past medical history or surgeries, notes, vital signs, or allergy data in the record withdf at least one problem, receiving a request corresponding to a problem or problem list category or to other medical data, identifying non-problem data in the record grouped in a cluster with the requested data, and modifying a user interface to display the identified data separate from other similar medical data included in the electronic medical or health record.
US11521714B1	Increasing diversity of participants in health research using adaptive methods Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for adapting communications and interactions to enhance monitoring using remote devices. In some implementations, a system communicates with remote devices that are each configured to perform monitoring. The system generates records that specify outcomes or responses obtained after sending the messages. The generated records are used to create or update profiles for different categories of users. Each profile has a set of inclusion criteria defining the category corresponding to the profile, and stores data that characterizes effects of message attributes on outcomes or responses for users in the category corresponding to the profile. The system selects a profile for each member of a group of users involved in a particular monitoring program, then adapts communication for each user based on the profile selected for the user.
US11521713B2	System and method for generating clinical trial protocol design document with selection of patient and investigator Disclosed is a system for generating Clinical trial protocol design document with selection of a Patient and an Investigator for a clinical trial process. The system inputs meaningful information derived from the raw data, a pre-Drafted protocol, a regulatory authorities' protocol curated by regulatory authorities, and a pre-stored dataset, present in a repository. A Clinical trial protocol design document is drafted by generating a case frame upon extracting data in form of a key value into a standard document. Each key value is validated and a prediction score is computed based on overlapping of the interim Clinical trial protocol design template with the pre-Drafted protocol and the regulatory authorities' protocol to determine whether the interim Clinical trial protocol design document is approved or rejected. A Clinical trial protocol design document is generated when the interim Clinical trial protocol design document is approved.
US11521712B2	Computational method for classifying and predicting ligand docking conformations A computer-implemented method for predicting a conformation of a ligand docked into a protein is disclosed. According to some embodiments, the method may include determining one or more poses of the ligand in the protein, the poses being representative conformations of the ligand. The method may also include determining, using a neural network, energy scores of the poses. The method may further include determining a proper conformation for the docked ligand based on the energy scores.
US11521711B2	System for handling information relating to chemical substances A system for generating first data including content data includes an interface for outputting the content data, a conversion unit to convert an intensity change indicative of a detected chemical substance contained in data from a sensor into the content data. The sensor includes a mass spectrometric type sensor capable of controlling sensitivity, resolution or selectivity, and a hardware unit that is configured to carry out an analysis of the data with initial setting conditions designed for scanning in a first range using a test sample prepared in advance, change the setting conditions for the sensor for use with the conversion unit, based on the analysis carried out automatically and periodically, the setting conditions including at least one of a voltage for ionizing and a voltage for scanning a spectrum region for detecting a chemical substance requested by an application.
US11521709B2	Systems and methods for analyses of biological samples Disclosed are methods, systems, and articles of manufacture for performing a process on biological samples. An analysis of biological samples in multiple regions of interest in a microfluidic device and a timeline correlated with the analysis may be identified. One or more region-of-interest types for the multiple regions of interest may be determined; and multiple characteristics may be determined for the biological samples based at least in part upon the one or more region-of-interest types. Associated data that respectively correspond to the multiple regions of interest in a user interface for at least a portion of the biological samples in the user interface based at least in part upon the multiple identifiers and the timeline. A count of the biological samples in a region of interest may be determined based at least in part upon a class or type of data using a convolutional neural network (CNN).
US11521707B2	Software accelerated genomic read mapping Methods, systems, apparatus, and computer programs are disclosed for software-accelerated genomic data read mapping. In one aspect, the methods can include actions of obtaining a k-mer seed from a genomic data read, generating a genomic signature based on the obtained k-mer seed, determining a reference sequence location that match at least a portion of the k-mer seed using a hash data structure, wherein the hash data structure comprises N data cells comprising a first portion storing a predetermined genomic signature and a second portion storing a value that corresponds to a first occurrence of a reference sequence location that match at least a portion of the k-mer seed from which the predetermined genomic signature was derived, and selecting the determined reference sequence location as an actual alignment for the obtained k-mer seed based on one or more alignment scores.
US11521706B2	Testing and representing suspicion of sepsis Embodiments of the present technology include a method for testing a blood sample for sepsis. The method may include receiving a blood sample from an individual. The method may also include executing an instruction to analyze the blood sample for sepsis. In addition, the method may include measuring values of a set of characteristics in the blood sample. The set of characteristics being determined prior to measuring the values. The method may further include analyzing the values of the set of characteristics to produce a representation of a suspicion of sepsis. In addition, the method may include displaying the representation. Embodiments also include systems for testing blood sample for sepsis.
US11521705B2	Random sequence generation for gene simulations A random sequence generation of defined values may be provided. A method comprises pre-loading a RAM block with an initial list comprising the defined values of a sequence of values to be updated, and shuffling the defined values of the sequence using a counter and a random offset for indices in the list.
US11521698B2	Testing read-only memory using memory built-in self-test controller A system includes a volatile storage device, a read-only memory (ROM), a memory built-in self-test (BIST) controller and a central processing unit (CPU). The CPU, upon occurrence of a reset event, executes a first instruction from the ROM to cause the CPU to copy a plurality of instructions from a range of addresses in the ROM to the volatile storage device. The CPU also executes a second instruction from the ROM to change a program counter. The CPU further executes the plurality of instructions from the volatile storage device using the program counter. The CPU, when executing the plurality of instructions from the volatile storage device, causes the ROM to enter a test mode and the memory BIST controller to be configured to test the ROM.
US11521692B2	Memory with one-time programmable (OTP) cells and reading operations thereof A memory includes a plurality of one-time programmable (OTP) memory cells, wherein each OTP memory cell includes a corresponding storage element capable of being in a permanently blown state or non-blown state. In the non-blown state, the corresponding storage element is capable of being in a low conductive state (LCS) or high conductive state (HCS). Control circuitry is configured to, in response to a received read request having a corresponding access address which selects a set of OTP memory cells, direct write circuitry to apply a voltage differential across the corresponding storage element of each selected OTP memory cell sufficient to set the corresponding storage element to a predetermined one of the LCS or HCS, and, after the write circuitry applies the voltage differential across the corresponding storage element, direct read circuitry to read the selected OTP memory cells to output read data stored in the selected OTP memory cells.
US11521690B2	NAND data placement schema Disclosed in some examples are improvements to data placement architectures in NAND that provide additional data protection through an improved NAND data placement schema that allows for recovery from certain failure scenarios. The present disclosure stripes data diagonally across page lines and planes to enhance the data protection. Parity bits are stored in SLC blocks for extra protection until the block is finished writing and then the parity bits may be deleted.
US11521684B2	Memory device and method of operating the same A memory device, and a method of operating the same, includes a memory cell array coupled to a plurality of word lines, wherein each word line is coupled to a plurality of memory cells. The memory device also includes a peripheral circuit configured to perform a sensing operation of sensing selected memory cells coupled to a selected word line selected from among the plurality of word lines. The memory device further includes control logic configured to control the peripheral circuit apply a turn-on voltage to a block word line coupled to the selected word line when the sensing operation is terminated and when potentials of the plurality of word lines are increased due to a recovery operation for channels of the plurality of memory cells after the plurality of word lines have been discharged.
US11521681B2	Component having optically active materials A component includes a memory region containing optically active material, a control arrangement configured to provide at least one control signal configured to change optical properties of the optically active material, and a detector configured to detect a change in the optical properties of the optically active material. The detector includes an evaluation input region configured to receive at least one evaluation input signal and an evaluation output region configured to provide an evaluation output signal. The memory region is arranged between the evaluation input region and the evaluation output region, and the control arrangement adjoins the memory region.
US11521679B2	Memory device for canceling sneak current Disclosed is a memory device for cancelling a sneak current. The memory device according to the exemplary embodiment of the present disclosure includes a memory cell array which includes a plurality of word lines and a plurality of bit lines intersecting each other and memory cells disposed at intersections of the word lines and the bit lines; and a sensing circuit which supplies a bit line current to all or some of the bit lines, cancels a sneak current based on the bit line current by at least one switching control, and senses and amplifies data stored in the memory cell to output the sensed and amplified data.
US11521677B1	Memory apparatus and method of operation using negative kick clamp for fast read A memory apparatus and method of operation are provided. The apparatus includes memory cells connected to word lines and arranged in strings and configured to retain a threshold voltage. A control circuit is coupled to the word lines and strings and is configured to compute a target word line voltage including a kicking voltage to be applied to selected ones of word lines for a kick time during a read operation. The control circuit extends the kick time by a compensation time to a compensated kick time in response to determining the target word line voltage is not greater than a predetermined voltage design limit. The control circuit applies the kicking voltage to the selected ones of word lines for the compensated kick time thereby enabling a word line voltage to reach one of a plurality of reference voltages quickly without exceeding the predetermined voltage design limit.
US11521662B2	Write circuit of memory device A device includes memory banks, a first pair of write data wirings, a second pair of write data wirings and a global write circuit. The first pair of write data wirings is connected to a first group among the memory banks. The second pair of write data wirings is connected to a second group among the memory banks. In response to a first clock signal, the global write circuit generates a first global write signal and a first complement global write signal transmitted to the first group among the memory banks through the first pair of write data wirings. In response to a second clock signal, the global write circuit generates a second global write signal and a second complement global write signal transmitted to the second group among the memory banks through the second pair of write data wirings.
US11521658B2	Binary weighted voltage encoding scheme for supporting multi-bit input precision An illustrative embodiment disclosed herein is an apparatus including a non-volatile memory cell and multi-bit input circuitry that simultaneously receives a plurality of bits, receives a supply voltage, converts the plurality of bits and the supply voltage into a multiply voltage, and applies the multiply voltage to the non-volatile memory cell. The non-volatile memory cell may pass a memory cell current in response to the multiply voltage. A magnitude of the multiply voltage may represent a multiplier. The memory cell current may represent a product of the multiplier and a multiplicand stored in the non-volatile memory cell.
US11521657B2	System and method for generating dynamic media The present invention provides a method for generating customized dynamic video, said method comprising the steps of: partitioning customized dynamic video's timeline, using a predefined partition scheme, into a series of chunk descriptors, each defined by an interval of the timeline and corresponding to a video chunk of the customized dynamic video; for each chunk descriptor, constructing an identifier based on a set of parameters that represent visual characteristics of the video chunk, and associating said identifier to the chunk descriptor; for each chunk descriptor, querying a cache of previously rendered and encoded video chunks for a video chunk indexed by the identifier matching that of the chunk descriptor; in the case that a video chunk whose identifier matches the queried identifier is found, retrieving said video chunk from the cache; otherwise, rendering and encoding the video chunk, for the chunk descriptor's timeline interval, and saving said video chunk in the cache, indexed by the identifier.
US11521656B2	Incorporating visual objects into video material This disclosure relates to the embedding of visual objects into the image content of a video by a visual embed specialist, whilst maintaining the security of the video. A low-resolution version of the video content is sent by the video owner to the specialist for analysis to identify parts of the video that are suitable for visual object insertion. A high resolution version of those identified parts of the video is then sent to the specialist for visual object insertion. The specialist may then return the modified parts of the video and the content owner create a final version of the high-resolution video by replacing the relevant parts of the high-resolution video with the modified parts.
US11521653B2	Video sequence layout method, electronic device and storage medium A video sequence layout method, electronic device and storage medium are provided, and relate to fields of deep learning, virtual reality, cloud computing, video layout processing and the like. The method includes: acquiring a first video sequence, the first video sequence including a main sequence for describing a first posture of a human body and a subordinate sequence for describing a plurality of second postures of the human body; extracting the main sequence and the subordinate sequence from the first video sequence; and in a case that it is detected that a sequencing identification frame exists in the first video sequence, performing random mixed sequencing processing on video frames in the main sequence and the subordinate sequence based on the sequencing identification frame and taking a sequence combination obtained by the random mixed sequencing processing as a second video sequence.
US11521646B2	Hard disk drive having dual micro-actuators on carriage arms According to one embodiment, there is provided a hard disk drive including a first recording surface, a second recording surface, a first magnetic head, a first actuator and a second actuator that move the first magnetic head, a second magnetic head, a third actuator and a fourth actuator that move the second magnetic head, a fifth actuator that moves the second actuator and the fourth actuator, a drive circuit that implements at least one of a first mode in which the second actuator and the fourth actuator operate differently from each other or a second mode in which the first and third actuators operate differently from each other, and a controller that controls the drive circuit.
US11521641B2	Model learning device, estimating device, methods therefor, and program State-of-satisfaction change pattern models each including a set of transition weights in state sequences of the states of satisfaction are obtained for predetermined change patterns of the states of satisfaction, and a state-of-satisfaction estimation model for obtaining the posteriori probability of the utterance feature amount given the state of satisfaction of an utterer is obtained by using the utterance-for-learning feature amount and a correct value of the state of satisfaction of an utterer who gave an utterance for learning corresponding to the utterance-for-learning feature amount. By using the input utterance feature amount and the state-of-satisfaction change pattern models and the state-of-satisfaction estimation model, an estimated value of the state of satisfaction of an utterer who gave an utterance corresponding to the input utterance feature amount is obtained.
US11521640B2	Systems and methods for improved audio-video conferences Systems and methods for efficient management of an audio/video conferences is disclosed. The method includes receiving an audio question from a first user of a plurality of users connected to a conference, recording the audio question and preventing an immediate transmission of the audio question to the plurality of users connected to the conference, analyzing the recorded audio question to determine that the audio question is relevant to a second user of the plurality of users and not relevant to a third user of the plurality of users, preventing the audio question from being transmitted to the third user, and transmitting the audio question to the second user of the plurality of users.
US11521638B2	Audio event detection method and device, and computer-readable storage medium An audio event detection method including performing a framing processing on an audio to obtain audio data for each time period in the audio and extracting a specified feature vector from the audio data of each time period; inputting the specified feature vector of the audio data to a Recurrent Neural Network/Bidirectional Recurrent Neural Network (RNN/BI-RNN) model, to obtain a posterior probability of each pre-set audio event in the audio data of each time period; obtaining, for each time period, a target audio event of the audio data according to the posterior probability of each audio event in the audio data and a pre-set audio decoding algorithm; and extracting an optimal audio data sequence of the target audio event from the audio data of each time period.
US11521634B2	System and method for acoustic echo cancelation using deep multitask recurrent neural networks A method for performing echo cancellation includes: receiving a far-end signal from a far-end device at a near-end device; recording a microphone signal at the near-end device including: a near-end signal; and an echo signal corresponding to the far-end signal; extracting far-end features from the far-end signal; extracting microphone features from the microphone signal; computing estimated near-end features by supplying the microphone features and the far-end features to an acoustic echo cancellation module including: an echo estimator including a first stack of a recurrent neural network configured to compute estimated echo features based on the far-end features; and a near-end estimator including a second stack of the recurrent neural network configured to compute the estimated near-end features based on an output of the first stack and the microphone signal; computing an estimated near-end signal from the estimated near-end features; and transmitting the estimated near-end signal to the far-end device.
US11521632B2	Personal audio assistant device and method A system includes a first microphone that captures audio, a communication module communicatively coupled to the first microphone, a logic circuit communicatively coupled to the first microphone and communication module, a speaker operatively coupled to the logic circuit, and an interaction element. The interaction element and logic circuit are configured to initiate control of audio content for output from the speaker in response to at least one voice command detected in captured audio. Other embodiments are disclosed.
US11521630B2	Deep learning segmentation of audio using magnitude spectrogram A method, system, and computer readable medium for decomposing an audio signal into different isolated sources. The techniques and mechanisms convert an audio signal into K input spectrogram fragments. The fragments are sent into a deep neural network to isolate for different sources. The isolated fragments are then combined to form full isolated source audio signals.
US11521625B2	Audio signal coding apparatus, audio signal decoding apparatus, audio signal coding method, and audio signal decoding method An audio signal coding apparatus includes a time-frequency transformer that outputs sub-band spectra from an input signal; a sub-band energy quantizer; a tonality calculator that analyzes tonality of the sub-band spectra; a bit allocator that selects a second sub-band on which quantization is performed by a second quantizer on the basis of the analysis result of the tonality and quantized sub-band energy, and determines a first number of bits to be allocated to a first sub-band on which quantization is performed by a first quantizer; the first quantizer that performs first coding using the first number of bits; the second quantizer that performs coding using a second coding method; and a multiplexer.
US11521624B1	Voice controlled assistant with coaxial speaker and microphone arrangement A voice controlled assistant has a housing to hold one or more microphones, one or more speakers, and various computing components. The housing has an elongated cylindrical body extending along a center axis between a base end and a top end. The microphone(s) are mounted in the top end and the speaker(s) are mounted proximal to the base end. The microphone(s) and speaker(s) are coaxially aligned along the center axis. The speaker(s) are oriented to output sound directionally toward the base end and opposite to the microphone(s) in the top end. The sound may then be redirected in a radial outward direction from the center axis at the base end so that the sound is output symmetric to, and equidistance from, the microphone(s).
US11521620B2	Synthesizing higher order conversation features for a multiparty conversation Technology is provided for identifying synthesized conversation features from recorded conversations. The technology can identify, for each of one or more utterances, data for multiple modalities, such as acoustic data, video data, and text data. The technology can extract features, for each particular utterance of the one or more utterances, from each of the data for the multiple modalities associated with that particular utterance. The technology can also apply a machine learning model that receives the extracted features and/or previously synthesized conversation features and produces one or more additional synthesized conversation features.
US11521619B2	System and method for modifying speech recognition result Provided are a system and method for modifying a speech recognition result. The method includes: receiving, from a device, text output from an automatic speech recognition (ASR) model of the device; identifying at least one domain related to the received text; selecting, from among a plurality of text modification models included in the server, at least one text modification model corresponding to the identified at least one domain; and modifying the received text by using the selected at least one text modification model.
US11521613B2	Communication system, control method, and non-transitory computer-readable storage medium A communication system comprises a communication device and a server system. The communication system obtains permission to perform a function related to the communication device from a user, performs a predetermined process of obtaining permission to perform a predetermined function from the user, if the predetermined function that the user does not permit the server system to perform is added as the function, performs the function that the user permits the server system to perform in advance, if an instruction for performing the function that the user permits the server system to perform in advance is inputted into a voice control device with a voice, after the predetermined process is performed and in a state where the permission to perform the predetermined function is not obtained from the user, and performs a process corresponding to the function.
US11521611B2	Using conversation structure and content to answer questions in multi-part online interactions A computer-implemented method for determining an answer to a question in a multi-party conversation includes receiving a multi-party conversation having multiple nodes of unstructured natural language. Each node is parsed into a plurality of elements. Each element of the plurality of elements that comprises a question is identified. A conversation node list is constructed that identifies relationships between the nodes. At least one answer to the question is produced based on the conversation node list.
US11521609B2	Voice command system and voice command method A voice command system according to a first disclosure comprises a gateway apparatus having an interface configured to receive a voice command, and a controller configured to perform a registration process of registering a speaker permitted to receive the voice command. The controller is configured to perform an authentication process of rejecting a reception of the voice command when a speaker of the voice command is not registered, and permitting a reception of the voice command when a speaker of the voice command is registered. The controller is configured to perform the authentication process for each voice command.
US11521606B2	Refrigerator and information display method thereof A refrigerator comprises a storage compartment configured to store food, a temperature detector configured to detect an internal temperature of the storage compartment, a cooler configured to supply cool air to the storage compartment, a microphone configured to receive a speech, a display configured to display information, at least one processor configured to be electrically connected to the temperature detector, the microphone, and the display; and a memory configured to be electrically connected to the at least one processor. The memory stores at least one instructions configured to, when a first speech including a food name is recognized via the microphone, allow the processor to display a food list, which comprises food information corresponding to the food name and an identification mark identifying the food information, on the display, and configured to, when a second speech referring to the identification mark is recognized via the microphone, allow the processor to display food purchase information corresponding to the identification mark, on the display.
US11521602B2	Intent recognition model creation from randomized intent vector proximities A set of candidate intent vectors is generated from an input intent vector. A validation of the set of candidate intent vectors is performed that selects as valid intent vectors any of the set of candidate intent vectors that are semantically similar to the input intent vector.
US11521601B2	Detecting extraneous topic information using artificial intelligence models Systems and methods for improving machine learning systems used to model topics on a plurality of calls are described herein. In an embodiment, a server computer receives plurality of digitally stored call transcripts that have been prepared from digitally recorded voice calls. The server computer uses a topic model of an artificial intelligence machine learning system, the topic model modeling words of a call as a function of one or more word distributions for each topic of a plurality of topics, to generate an output of the topic model which identifies the plurality of topics represented in the plurality of call transcripts. The server computer computes, for a particular topic of the plurality of topics a first value representing a vocabulary of the particular topic and a second value representing a consistency of the particular topic in two more call transcripts of the plurality of call transcripts which include the particular topic. Based, at least in part, on one or more of the first value or the second value, the server computer determines that the particular topic meets a particular criterion and, in response, updates the output of the topic model to remove the particular topic or distinguish the particular topic from other topics of the plurality of topics which do not meet the particular criterion.
US11521597B2	Correcting speech misrecognition of spoken utterances Implementations can receive audio data corresponding to a spoken utterance of a user, process the audio data to generate a plurality of speech hypotheses, determine an action to be performed by an automated assistant based on the speech hypotheses, and cause the computing device to render an indication of the action. In response to the computing device rendering the indication, implementations can receive additional audio data corresponding to an additional spoken utterance of the user, process the additional audio data to determine that a portion of the spoken utterance is similar to an additional portion of the additional spoken utterance, supplant the action with an alternate action, and cause the automated assistant to initiate performance of the alternate action. Some implementations can determine whether to render the indication of the action based on a confidence level associated with the action.
US11521593B2	Method of embodying online media service having multiple voice systems A method of embodying an online media service having a multiple voice system includes a first operation of collecting preset online articles and content from a specific media site and displaying the online articles and content on a screen of a personal terminal, a second operation of inputting a voice of a subscriber or setting a voice of a specific person among voices that are pre-stored in a database, a third operation of recognizing and classifying the online articles and content, a fourth operation of converting the classified online articles and content into speech, and a fifth operation of outputting the online articles and content using the voice of the subscriber or the specific person, which is set in the second operation.
US11521590B2	High-power ultrasound emitter design Disclosed herein a method of producing an ultrasound that includes defining a set of criteria for an ultrasound emitter comprising a plate. The set of criteria includes a power output criterion, a frequency criterion and number of nodes for a resonance mode of the plate, a focus criterion, and a durability criterion. The method includes determining an outline and a thickness range for the plate, based on the set of criteria. The method includes using topology optimization to determine internodal zone dimensions for the plate, based on the set of criteria, the outline, and the thickness range. The method includes manufacturing the plate according to the internodal zone dimensions.
US11521588B2	Sound attenuator for a fluid flow line and method of manufacturing the same A sound attenuator has an inner pipe (12) with expansion sections (121) of enlarged diameter corresponding to the constriction sections (141) of an outer pipe (14). The expansion sections (121) in pairs axially delimit an intermediate inner pipe section (122) containing a wall opening (18) and having a reduced diameter relative to the expansion sections (121). The inner surface of the outer pipe (14) in each of its constriction sections (141) is connected to the outer surface of the inner pipe (12) in its respective corresponding expansion section (121). A method of manufacturing such a sound attenuator (10) also is provided and uses internal high-pressure forming.
US11521575B2	Electronic device, electronic device control method, and medium An electronic device includes an information acquisition unit, a display information determination unit, and a display control unit. The information acquisition unit acquires first pulse wave information indicating a pulse wave of a part of a body based on image information of the body in a first image obtained by imaging at least the part of the body, and acquires second pulse wave information indicating a pulse wave of a part of the body based on image information of the body in a second image obtained by imaging the part of the body after the first image has been obtained. The display information determination unit determines a display range of a display color of a display image or brightness corresponding to a blood flow variation of a part of the body based on first pulse wave information and second pulse wave information. The display control unit controls display of the display image by the display color determined based on the display range or brightness and the second pulse wave information.
US11521574B2	Dynamically gamut adjustable displays A computing device may include a processor and a display device communicatively coupled to the processor wherein the display device includes a wide gamut mode wherein the wide gamut mode comprises a plurality of different gamut profiles and wherein the display device adjusts from a first gamut profile to a second gamut profile based on a gamut profile associated with an image to be represented on the display device.
US11521573B2	Electronic devices and method of operating electronic devices First and second electronic devices are provided in which in use one of the devices acts as a source of at least one of video and audio which is sent to the other device over a cable. The first device detects that a cable connector of a cable has been connected to the socket of the first device. The first device transmits a wireless signal for receipt by the second device. The wireless signal indicates at least one of the type of signal that is output or input at that socket of the first device and the type of socket for that socket of the first device. In response to the second device receiving the wireless signal, the second device indicates a corresponding socket on the second device to which a cable connector at the other end of the cable should be connected.
US11521571B2	Display device, for memory in pixel (MIP) system and inspection machine automatically detecting pixel defect According to one embodiment, a display device including a plurality of pixels each of which includes a memory is provided. The display device includes a plurality of signal lines connected to the plurality of pixels, a signal line drive circuit configured to provide a data signal to one of the memories through one of the signal lines, a readout circuit configured to read the data signal in the memory through the signal line, and an output wire configured to externally output the data signal read by the readout circuit without passing through the signal line drive circuit.
US11521569B2	Display apparatus and electronic device A display apparatus capable of improving image quality is provided. In the display apparatus, an adder circuit is provided inside and outside a display region, and the adder circuit has a function of adding a plurality of pieces of data supplied from a source driver. Some components of the adder circuit are separately arranged in a pixel region. Thus, limitation on the size of a component included in the adder circuit can be eased, and data addition can be performed efficiently. In addition, by providing the other components included in the adder circuit outside the display region, the number of wirings in the display region can be reduced and the aperture ratio of the pixel can be increased.
US11521565B2	Crosstalk reduction for electro-optic displays An electro-optic display having at least one row of display pixels, the display include a first display pixel of the at least one row of display pixels, the first display pixel coupled to a first bias line, and a second display pixel of the at least one row of display pixels, the second display pixel coupled to a second bias line, wherein the second bias line is different from the first bias line.
US11521562B2	Display device and driving method thereof Embodiments of the present disclosure relate to a display device including a display panel having a plurality of gate lines extending in a first direction, a plurality of data lines extending in a second direction, and a plurality of subpixels; a gate driving circuit for supplying scan signals to the plurality of gate lines; a data driving circuit for supplying data voltages to the plurality of data lines and including a sensing circuit of characteristic value to sense the characteristic value of the plurality of subpixels; and a timing controller for controlling the gate driving circuit and the data driving circuit, and determining a defective line by detecting a distorted section for the sensed characteristic value for each subpixel arranged in the second direction in respect to a plurality of blocks corresponding to the display panel.
US11521561B2	Display device and driving method thereof A display device includes: scan, control, and emission control signal lines, signals transmitted thereby being different from one another; data and driving voltage lines; a first transistor including a first gate electrode and first source and drain; a second transistor including a second gate electrode connected to a first scan line, a second source connected to a first data line, and a second drain connected to the first source; a light-emitting element; a control transistor including a control gate electrode connected to a first control line and between the driving voltage line and the first source or the light-emitting element and the first drain; and an emission control transistor in series between the light-emitting element and the control transistor, the control transistor and the first transistor, or the driving voltage line and the control transistor, and an emission control gate electrode connected to the emission control signal line.
US11521559B2	Display panel having a switch unit between a digital-to-analog converter and an amplifier for improving driving and driving method thereof The present disclosure relates to a display panel and a driving method thereof. The display panel includes a source driving circuit and a pixel driving circuit. The source driving circuit includes a DAC power amplifier, and a switch unit. The DAC is configured to convert a digital data signal into an analog data signal; the power amplifier is configured to receive the analog data signal and improve a driving capability of the analog data signal; the switch unit is connected to the DAC, the power amplifier, and a control signal terminal, and is configured to connect the DAC to the power amplifier in response to a signal of the control signal terminal. The pixel driving circuit includes a data signal terminal; an output terminal of the power amplifier is connected to the data signal terminal, and is configured to input the analog data signal with improved driving capability to the data signal terminal.
US11521552B2	Display device A display device, includes: a pixel connected to a scan line and a data line crossing the scan line, wherein the pixel includes a light emitting element, a driving transistor configured to control a driving current supplied to the light emitting element according to a data voltage received from the data line, and a first switching transistor configured to apply the data voltage of the data line to the driving transistor according to a scan signal applied to the scan line; wherein the driving transistor includes a first active layer including an oxide semiconductor and a first oxide layer on the first active layer and including an oxide semiconductor; and wherein the first switching transistor includes a second active layer on the first active layer and including the same oxide semiconductor as the first oxide layer.
US11521551B2	Display device, method of driving display device, and electronic apparatus Provided is a display device including: a pixel array unit in which pixels including a light-emitting unit are arranged in a matrix shape; two drive units which are disposed on the same substrate as the pixel array unit with the pixel array unit interposed therebetween, which have output stages in a number that is half of the number of pixel rows of the pixel array unit, and in which the output stages are in charge of driving of pixels on an odd row side and on an even row side; and a control unit which performs control of driving the pixels on the odd row side by using the output stages of one drive unit between the two drive units, of driving the pixels on the even row side by using the output stages of the other drive unit, and of inverting the driving for each field.
US11521550B2	Data current generation circuit including a compensation control circuit, driving method, driver chip and display panel A data current generation circuit includes a data voltage generation circuit, a data voltage transmission control circuit, a compensation control circuit, a first capacitor, a first transistor and a reference voltage writing circuit. The data voltage transmission control circuit transmits a data voltage from the data voltage generation circuit to a first electrode of the first transistor; the compensation control circuit is electrically connected to a gate and a second electrode of the first transistor separately and associates a threshold voltage of the first transistor with the gate of the first transistor; the first capacitor stores a voltage of the gate of the first transistor; the reference voltage writing circuit is electrically connected to the first electrode of the first transistor and a first reference voltage output terminal separately; and the second electrode of the first transistor serves as an output of the data current generation circuit.
US11521548B2	Display device and driving method of the same Embodiments of the present disclosure relate to a display device and a driving method of the display device. More particularly, a subpixel includes a first control transistor for controlling a connection between a body of a driving transistor and a first node of the driving transistor, and a second control transistor for controlling a connection between the body of the driving transistor and a second node of the driving transistor, so that it is possible to improve mobility and on-current performance while increasing a S-factor of the driving transistor.
US11521542B2	Method for display driver system and display driver system The present disclosure provides a method for a display driver system and a display driver system. The method comprises: the control circuit transmitting a global signal and a first signal for a LED driver circuit in each stage to a first-stage LED driver circuit, wherein the global signal includes an command for indicating an operation mode of the LED driver circuit in each stage; the LED driver circuit in each stage determining the operation mode corresponding to the command according to the global signal, identifying a corresponding first signal of the LED driver circuit in the stage, and operating according to the determined operation mode and the corresponding first signal; and the LED driver circuit in each stage except for last stage transmitting the global signal to the LED driver circuit in its next stage, and in response to a completion of operation according to the determined operation mode and the corresponding first signal, transmitting the first signal for the LED driver circuit in each of sequential stages to the LED driver circuit in its next stage.
US11521540B2	Display device and electronic equipment A display device is provided. The device comprises a pixel array, a scanning circuit configured to select a row in the pixel array, and a signal output circuit configured to supply image signals to pixels arranged in the row selected by the scanning circuit. The device displays an image using pixels arranged between an initial line on one side in the pixel array and an end line succeeding the initial line on the other side. The scanning circuit includes a start designation circuit configured to designate the initial line, an end designation circuit configured to designate the end line and a shift register. The shift register is configured to start selection for writing the image signals from the initial line and sequentially select the rows between the initial line and the end line in one frame period for displaying one image.
US11521530B2	Display panel A display panel including a gate driver on array (GOA) circuit region is provided. The GOA circuit region includes cascaded n-staged GOA circuit units and N high-frequency clock signal lines; each of the staged GOA circuit units is electrically connected to one of the N high-frequency clock signal lines through a signal connection line; the display panel further includes at least two compensation unit groups, which are positioned in a region where the N high frequency clock signal lines are positioned. By setting a compensation unit in the region where the high-frequency clock signal lines are positioned, a problem of a wider GOA region is solved.
US11521524B2	Adjustable base holder for garden flagpoles An adjustable base to hold garden flag banner poles includes a base and two cylinders with holes for the two legs of the garden flag pole, the legs held in place with set screws on the side of the cylinders, the cylinders sit in a slot within the base, are attached to the base with two carriage bolts on the bottom of the base, one for each cylinder, the slot within the base allows the each cylinder holder of a leg components to slide to fit the multiple distances between flag pole legs.
US11521523B1	Curved display panels An example electronic device includes a housing. In addition, the electronic device includes a display panel supported by the housing. The display panel includes a planar portion and a side portion extending from the planar portion to an end of the display panel. The planar portion and the side portion are to display images. The side portion is to transition between a first position in which the side portion is co-planar with the planar portion and a second position in which the side portion is curved relative to the planar portion.

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