最新美国发明专利第2022-03-01期 - 专利汇|PatentHub专利检索|专利查询网|发明专利查询分析

Document	Document Title
US11265087B2	Compact optic-connecting device The present disclosure provides a compact-optic-connecting device for mounting on a motherboard of a computer, which includes an optic-receiving unit, an optic-launching unit, two flexible-circuit plates, a circuit board and a connecting interface. The optic-receiving unit and the optic-launching unit are connected to the bottom surface of the circuit board respectively via flexible-circuit plates. The connecting interface is connected to the bottom surface of the circuit board, and also connected to an external motherboard via the connecting interface. By virtue of such structure, the compact optic-connecting device can have a small length and size, and meanwhile to maintain a safety distance between the connecting interface and the optic-receiving unit, or the connecting interface and optic-launching unit, to prevent faulty conduction therebetween.
US11265086B2	Low rate loss bit-level distribution matcher for constellation shaping Systems and methods for constellation shaping using low rate loss bit-level distribution matchers include receiving blocks of input bits and, for each input block of a predetermined size, assigning a respective codeword of a predetermined output block size. The number of bits of a given bit value in the codeword is dependent on a predetermined target probability distribution. A one-to-one mapping exists between each possible combination of input bits and a codeword for input blocks containing the combination. Some codewords include a number of bits having the given bit value that is different than the predetermined target probability distribution, but an average number of bits having the given bit value in the available codewords meets the predetermined target probability distribution. The disclosed methods result in more available codewords and a lower rate loss than in bit-level distribution matchers with a constant modulus, while achieving similar shaping.
US11265085B2	Detection circuit having reduced noise There may be provided detection circuit that may include (i) a photodiode that may be configured to convert radiation to a photodiode electrical signal; (ii) a photodiode bias circuit that may be configured to bias the photodiode, wherein the photodiode bias circuit may include a photodiode bias voltage supply and a photodiode bias capacitor; and (iii) a differential transimpedance amplifier that may be configured to amplify the photodiode electrical signal to provide a differential voltage. The differential transimpedance amplifier may include an amplification circuit and an additional circuit, wherein the amplification circuit may include a positive input port, a negative input port, a positive output port, a negative output port and a common mode input port. The photodiode bias voltage supply may be a floating voltage supply.
US11265084B2	Flexible baud rate A method, system, and apparatus enabled to selectively choose a baud rate for communication of optical data using a modem enabled to operate with an optical signal modulated at plurality of finely tuned baud rates.
US11265082B2	LED light control assembly and system An LED light and communication system is in communication with a broadband over power line communications system. The LED light and communication system includes at least one optical transceiver light fixture. The optical transceiver light fixture includes a plurality of light emitting diodes, at least one photodetector, and a processor. A facility control unit is in communication with the light emitting diode light fixtures and a control server. The facility control unit is constructed and arranged to control the operation of the optical transceiver light fixtures.
US11265080B2	Submarine cable fault determining method and apparatus This application discloses a submarine cable fault determining method and apparatus for realizing detecting whether a fault occurs to a submarine cable, without depending on TTE. The submarine cable fault determining method includes: receiving, by a network management system, first detection information from a first device during a first preset time, and receiving second detection information from a second device during a second preset time, where the second detection information is used to indicate whether the second device receives a first heartbeat signal from the first device through a submarine cable, and the first detection information is used to indicate whether the first device receives a second heartbeat signal from the second device through the submarine cable; and determining, by the network management system based on the first detection information and the second detection information, whether a fault occurs to the submarine cable between the first device and the second device.
US11265079B2	Process and device for measurement of physical quantity based on Rayleigh backscattering A process including the following steps: injecting in an optical fiber a first optical pump at a first optical frequency that evolves in time or not, and a second optical pump at a second optical frequency that evolves in time or not, the first optical frequency and the second optical frequency being different at each given time; a first detection of a first Rayleigh backscattered signal at the first optical frequency from the optical fiber; a second detection, separated from the first detection, of a second Rayleigh backscattered signal at the second optical frequency from the optical fiber; and analyzing the detected first Rayleigh backscattered signal and the detected second Rayleigh backscattered signal.
US11265078B2	Flexible beamforming for satellite communications Systems and methods for supporting more flexible coverage areas and spatial capacity assignments using satellite communications systems are disclosed. A hub-spoke, bent-pipe satellite communications system includes: terminals; gateways; a controller for specifying data for controlling satellite operations in accordance with a frame definition including timeslots for a frame and defining an allocation of capacity between forward and return traffic. The satellite communications system may employ a satellite with a feed array assembly and may use on-board beamforming or ground-based beamforming. Beam hopping within timeslots of the frame may be used to provide coverage to different cells in different time periods. The flexible coverage areas may be provided using changes in satellite position, antenna patterns, or beam resource allocations.
US11265077B1	Method for deploying task in satellite network Disclosed is a method for deploying tasks in a satellite network. In the method for deploying tasks in a satellite network, a utility function is determined by constructing a task processing delay model and a traffic model; a fitness degree of each individual is determined according to the utility function, and an individual with a highest fitness degree is put into a next-generation population; a probability that each of the plurality of individuals is selected is determined according to the fitness degree; a crossover operation and a mutation operation are performed on the individual according to the probability, to obtain a crossover individual and a mutation individual respectively; an available crossover individual and an available mutation individual are put into a next-generation population, to perform a repeated iteration and complete population updating; an optimal task deployment location table is output; and satellite network task deployment is completed.
US11265076B2	System and method for forward error correcting across multiple satellites An illustrated embodiment disclosed herein is a method including receiving, by a gateway, a first physical data unit (PDU) of a plurality of PDUs from an endpoint via a first satellite, receiving, by the gateway, a second PDU of the plurality of PDUs from the endpoint via a second satellite, and decoding, by the gateway, a payload from the first PDU and the second PDU.
US11265075B2	Radio frequency signal boosters serving as outdoor infrastructure in high frequency cellular networks Radio frequency signal boosters serving as outdoor cellular infrastructure are provided. In certain embodiments, a signal booster system for a high frequency cellular network includes a parabolic base station antenna configured to receive a downlink signal of a frequency band higher than 20 gigahertz and to transmit an amplified uplink signal of the frequency band, booster circuitry configured to amplify an uplink signal to generate the amplified uplink signal and to amplify the downlink signal to generate an amplified downlink signal, and a mobile station antenna configured to receive the uplink signal and to transmit the amplified downlink signal.
US11265072B2	Apparatus and method for beam alignment based on location information in wireless communication system A method for beam alignment through location recognition in a wireless communication system and an apparatus therefor are provided. The method includes a first process of configuring a beam set including beams based on relative location information of a terminal, a second process of receiving reference signals (RSs) from the terminal by using the beams, and a third process of determining an optimal beam from among the beams included in the beam set, and the third process includes configuring a window including adjacent beams in the beam set, measuring beams within the window by using the RSs, determining a local optimal beam from among the measured beams, and re-configuring a window based on the local optimal beam.
US11265070B2	Beam search for precoder for channel state feedback Methods, systems, and devices for wireless communications are described. A user equipment (UE) may perform a digital simulation to determine a precoding matrix indicator (PMI) associated with a digital reception beam. A base station may send, to the UE, a reference signal. The UE may perform a coarse beam search on the reference signal using non-oversampled digital reception beams. The UE may measure the signal strength of the reference signal for each of the non-oversampled digital reception beams and select the non-oversampled digital reception beam with the strongest signal. The UE may perform a refined beam search procedure on the selected beam by using a set of oversampled digital reception beams which correspond to the selected non-oversampled digital reception beam. The UE may determine the PMI associated with the strongest oversampled digital reception beam and send the PMI in a report to the base station.
US11265068B2	Beam selection in handheld wireless communications devices Methods, systems, and devices for wireless communications are described. An example method includes performing transmission or receive beam measurements at two or more wireless antennas of a wireless device, selecting a serving beam pair based at least in part on the transmission or receive beam measurements, and presenting an indication at the wireless device corresponding to the selected serving beam pair. The method may further include detecting user obstruction of part of the selected serving beam pair. The method may also include determining that a transmission power restriction applies to a first antenna associated with the selected transmission beam based at least in part on the transmission or receive beam measurements. Other example methods may further include detecting a change in an orientation of the wireless device and performing the transmission or receive beam measurements in response to detecting the change in the orientation of the wireless device.
US11265064B2	Method and apparatus for focused data communications A method and apparatus for focused communication is disclosed. The method includes a base transmitter array in communication with at least one client device at the same frequency. The base transmitter array provides a focused data communication to the client device.
US11265062B2	Sounding reference signal transmission method, terminal device, and computer-readable storage medium This application provides sounding reference signal transmission methods and apparatuses. One method comprises: determining, by a terminal device, that a sounding reference signal (SRS) to be transmitted is an nSRSth transmission of a plurality of SRS transmissions, wherein nSRS is a non-negative integer; selecting, by a terminal device, an antenna group of Λ antenna groups to transmit the sounding reference signal (SRS) based on Λ and nSRS, such that when sending the SRS for 2Λ times, the SRS is sent through each of the Λ antenna groups at least once, wherein Λ is a positive integer greater than or equal to 3; and sending, by the terminal device during the nSRSth transmission, the SRS through antenna ports comprised in the selected antenna group.
US11265061B2	Correction apparatus and correction method The present disclosure relates to correction apparatus and correction methods. One example correction apparatus includes a first adjustment module, a plurality of second adjustment modules, a correction calculation module, and a plurality of non-ideal channels. One second adjustment module is disposed on one non-ideal channel. The first adjustment module is connected to each non-ideal channel. The correction calculation module is separately connected to the first adjustment module and the plurality of second adjustment modules. The correction calculation module is connected to an output end of each non-ideal channel. The non-ideal channel is a channel that outputs an output signal in response to a drive signal having an error value.
US11265060B2	Method for transmitting and receiving channel state information in wireless communication system and device therefor Disclosed are a method for transmitting and receiving channel state information (CSI) in a wireless communication system and a device therefor. Particularly, a method by which a terminal reports channel state information in a wireless communication system can comprise the steps of: receiving, from a base station, configuration information relating to the CSI report on a downlink channel; receiving, from the base station, at least one CSI-RS for the CSI report; outputting feedback information by means of the at least one CSI-RS; and reporting the CSI to the base station by using the outputted feedback information.
US11265058B2	Feedback method and acquisition method for grouping indication information and device The present invention provides a method and device for feeding back grouping indication information and a method and device for acquiring grouping indication information. The method for feeding back grouping indication information includes: determining M resources from a candidate resource set and dividing the M resources into N first-type resource groups, where M is an integer greater than or equal to 1 and N is a positive integer less than or equal to M; and feeding back indication information for indicating the M resources and first-type grouping indication information for indicating that the M resources are divided into the N first-type resource groups to a first communication node. Resources in the candidate resource set include at least one of: a transmission beam resource, a transmission antenna resource, a transmission port resource, a transmission frequency domain resource, a transmission sequence resource and a transmission time domain resource.
US11265053B2	User equipment (UE) and methods for communication using directional transmission and reception Embodiments of an Evolved Node-B (eNB), User Equipment (UE) and methods for directional communication are generally described herein. The eNB may transmit, during a downlink sub-frame, a first beam refinement training signal and an uplink scheduling block to a first UE according to a downlink transmission direction from the eNB to the first UE. The eNB 104 may further transmit, during the downlink sub-frame, a second beam refinement training signal and a downlink scheduling block to a second UE according to a downlink transmission direction from the eNB to the second UE. The uplink scheduling block may indicate scheduled uplink resources for a scheduled uplink transmission by the first UE and the downlink scheduling block may indicate scheduled downlink resources for a scheduled downlink transmission to the second UE.
US11265048B2	Group-based unequal MCS schemes for a single user station in WLAN transmissions Systems and methods of transmitting a PPDU to or from a single user station (STA) in an MIMO transmission by using unequal MCSs. An access point (AP) allocates a plurality of spatial streams to the STA and assigned them into groups for the MIMO transmission. Multiple unequal MCSs are assigned to the different spatial stream groups. Correspondingly the STA ID is repeatedly specified in the user block fields of a SIG-B field of a downlink PPDU, or in the user information fields of a trigger frame. Alternatively, multiple AIDs of the STA can be specified in the user block fields or the user information fields instead of repeating the same STA ID. An indication may be inserted in the SIG-A field to indicate that the grouped-based unequal MCSs scheme is used for the MIMO transmission.
US11265046B2	Virtual beam steering using MIMO radar Examples disclosed herein relate to a Multiple-Input Multiple-Output (MIMO) radar for virtual beam steering. The MIMO radar has a plurality of transmit antennas and a receive antenna array having a plurality of radiating elements. The MIMO radar also includes a digital signal processor (DSP) configured to synthesize a virtual receive array having N×M receive subarrays from the plurality of transmit antennas and the receive antenna array, where N is the number of transmit antennas and M is the number of receiving elements. Other examples disclosed herein relate to a method of virtual beam steering.
US11265042B2	Wireless communication between electronic devices in close proximity A method of communicating between a first electronic communication device of a plurality of electronic communication devices and a wireless communication initiating device for reading the first electronic communication device. The method comprises receiving, at the first electronic communication device, a communication signal from the wireless communication initiating device and determining a first characteristic value relating to the communication signal. The method further comprises receiving at least a second characteristic value relating to a communication signal received by at least a second electronic communication device that is connected to the first electronic communication device and initiating communication with a reading device based on the first and second value.
US11265040B2	Method and system for optimizing transceiver spectrum sharing A method and system for providing a cooperative spectrum sharing model that jointly optimizes primary user equipment parameters for improved frequency agility and performance while mitigating mutual interference between the primary user equipment and secondary user equipment. Spectrum sensing is implemented to form a power spectral estimate of the electromagnetic environment (EME) and apply multi-objective optimization to adjust the operational parameters of the primary user equipment to mitigate interference.
US11265038B1	Wideband balanced duplexer Embodiments disclosed herein relate to isolating a receiver circuit of an electronic device from a transmission signal and leakage of the transmission signal. To do so, an isolation circuit is disposed between the receiver circuit and a transmission circuit. The isolation circuit may include multiple variable impedance devices and one or more antennas. The impedances of the variable impedance devices may be balanced such that a signal at a particular frequency or within a particular frequency band can pass through or is blocked by the isolation circuit. The isolation circuit may include one or more double balanced duplexers to achieve the improved isolation. The isolation circuit may also increase bandwidth available for wireless communications of the electronic device.
US11265036B2	Self-tuning method, self-tuning system and mobile terminal A self-tuning method can be applied to a self-tuning system and a mobile terminal. In the method, an actual performance index value of the self-tuning system in a current use environment is acquired; when it is determined that a difference between the actual performance index value and a preset performance index value in a current use environment is greater than a preset value, the self-tuning system is controlled to perform tuning until the self-tuning system finishes the tuning of all states thereof, so as to obtain a reflection signal corresponding to each of the states; each reflected signal is compared with a radio frequency signal received by the self-tuning system respectively, so as to obtain a comparison result; and a tuning parameter, within a first preset range, corresponding to the comparison result is determined as the tuning parameter of the self-tuning system in the current use environment.
US11265026B2	Tuner device Disclosed is a tuner device including an input terminal, a separator, a first amplifier, a second amplifier, and a tuner. The input terminal receives an input of a reception signal of satellite digital broadcasts. The separator is connected to the input terminal and adapted to frequency-separate a first signal and a second signal. The first signal is in a low-frequency domain of the reception signal, and the second signal is in a high-frequency domain of the reception signal. The first and second amplifiers respectively amplify the first and second signals. The tuner receives an input of output signals from the first and second amplifiers.
US11265025B2	Reconfigurable FEC The present invention is directed to data communication systems and methods thereof. According to various embodiments, the present invention provides a communication with a reconfigurable forward-error-correction (FEC) module. The FEC module processes data received from two or more communication lanes, and depending on the mode of operation, the FEC module can combine data from the two or more communication lanes and perform error correction on the combined data, or the FEC module can processes data from the two communications lanes separately and perform error correction independently for the each of the data communication lanes. There are other embodiments as well.
US11265024B1	Systems, methods and computer program products including features of transforming data involving a secure format from which the data is recoverable Systems and methods are disclosed for processing data. In one exemplary implementation, there is provided a method of generating H output data from W data input streams produced from input data. Moreover, the method may include generating the H discrete output data components via application of the W data inputs to one or more transforming components or processes having specified mathematic operations and/or a generator matrix functionality, wherein the W data inputs are recoverable via a recovery process capable of reproducing the W data inputs from a subset (any W members) of the H output data streams. Further exemplary implementations may comprise a transformation process that includes producing an H-sized intermediary for each of the W inputs, combining the H-sized intermediaries into an H-sized result, and processing the H-sized result into the H output data structures, groups or streams.
US11265023B2	Transmitting apparatus and interleaving method thereof A transmitting apparatus is provided. The transmitting apparatus includes: an encoder configured to generate a low-density parity check (LDPC) codeword by LDPC encoding of input bits based on a parity check matrix including information word bits and parity bits, the LDPC codeword including a plurality of bit groups each including a plurality of bits; an interleaver configured to interleave the LDPC codeword; and a modulator configured to map the interleaved LDPC codeword onto a modulation symbol, wherein the interleaver is further configured to interleave the LDPC codeword such that a bit included in a predetermined bit group from among the plurality of bit groups constituting the LDPC codeword onto a predetermined bit of the modulation symbol.
US11265020B2	Electronic device with bit pattern generation, integrated circuit and method for polar coding An electronic device configured to perform polar coding is described. The electronic device includes a bit pattern generator (3403) configured to successively perform a bit pattern generation process over a series (t=┌n/w┐) of clock cycles; and a counter (c, 4203), operably coupled to the bit pattern generator (3403) and configured to count a number of successive bit pattern generation sub-processes over the series (t=┌n/w┐) of clock cycles. The bit pattern generator (3403) is configured to: provide a successive sub-set of (w) bits from a bit pattern vector (bk,n) in each successive t=┌n/w┐ clock cycle; where the bit pattern vector comprises n bits, of which ‘k’ bits adopt a first binary value and n−k bits adopt a complementary binary value.
US11265017B2	Modulator and modulation method using non-uniform 16-symbol signal constellation for low-density parity check codeword having 4/15 code rate A modulator and a modulation method using a non-uniform 16-symbol signal constellation are disclosed. The modulator includes a memory and a processor. The memory receives a codeword corresponding to a low-density parity check (LDPC) code having a code rate of 4/15. The processor maps the codeword to 16 symbols of the non-uniform 16-symbol signal constellation on a 4-bit basis.
US11265001B1	RF DAC with low noise spectral density and mismatch spurs A DAC current steering circuit includes first and second transistors, respectively coupled to first and second outputs via first and second nodes at their drains, and source coupled to each other and to ground. A gate of the first transistor is coupled to a data input (D), and a gate of the second transistor coupled to a complement of the data input (DB). The circuit further includes first and second bleeder transistors, whose drains are respectively coupled to the first and second nodes, and whose sources are coupled together at a third node, the third node coupled to ground, and first and second bleeder switching transistors, whose drains and sources are each coupled to the third node, a gate of the first bleeder switching transistor coupled to a switching input (S) and a gate of the second bleeder switching transistor coupled to a complement of the switching input (SB).
US11264999B2	High resolution counter using phased shifted clock Methods and apparatus for generating phase-shifted clock signals from a reference clock, connecting the phase-shifted clock signals to a counter module so that the phase-shifted clock signals change values in counters in the counter module, and combining the values in the counters to generate an output signal corresponding to an amount of time. One or more events can be detected at a time corresponding to the output signal. In embodiments, pulses can be transmitted and received at a measure time to evaluate connected devices.
US11264998B1	Reference free and temperature independent voltage-to-digital converter A system and method for measuring power supply variations are described. A functional unit includes one or more power supply monitors capable of measuring power supply variations. The power supply monitors forego use of a clock signal from clock generating circuitry and forego use of a reference voltage from a reference power supply. The power supply monitors use an output of a source ring oscillator as a clock signal for the sequential elements of a counter. The counter measures a number of revolutions of a measuring ring oscillator within a period of the output of the source oscillator. The revolutions of the measuring ring oscillator are associated with a number of rising edges and falling edges of the output signal of the measuring ring oscillator. An encoder converts the output of the sequential elements to a binary value, and sends the binary value to an external age tracking unit.
US11264996B1	Digital PLL circuitry A digital PLL circuitry, according to the present embodiment, includes: a phase difference arithmetic circuitry configured to arithmetically operate and output a phase difference between an input clock signal and an output clock signal; a first control code generation circuitry configured to generate a first control code for controlling an oscillation frequency based on the phase difference and a frequency control input being a control target frequency relating to the output clock signal, and output the first control code; a second control code generation circuitry configured to generate and output a second control code for controlling the oscillation frequency according to a sequence; a selection circuitry configured to select and output one of the first control code and the second control code as a selection control code; and a digitally controlled oscillator configured to output the output clock signal of the oscillation frequency according to the selection control code.
US11264994B1	Delay circuit and a delay locked loop circuit using the same A delay circuit includes a coarse delay circuit, a header circuit, and a phase mixing circuit. The coarse delay circuit is configured to delay a reference clock signal to generate a first clock signal and a second clock signal and to change each phase of the first clock signal and the second clock signal by double a unit phase. The header circuit is configured to receive the first clock signal and the second clock signal and to generate a first phase clock signal and a second phase clock signal, between which a phase difference corresponds to half of the unit phase. The phase mixing circuit is configured to mix phases of the first phase clock signal and the second phase clock signal to generate an output clock signal.
US11264993B1	Counting device A counting device, including multiple counting circuit stages and a first logic operation circuit, is provided. The counting circuit stages are serially coupled in sequence. A first counting circuit stage performs a counting action according to a first clock signal and generates a first counting result. Second to Nth counting circuit stages perform counting actions according to a second clock signal, where N is a positive integer greater than 2. The first logic operation circuit provides the first counting result to be the second clock signal according to an indication signal.
US11264988B2	Code shift calculation circuit and method for calculating code shift value A code shift calculation circuit is provided. A first operation circuit of the code shift calculation circuit generates a first output value according to a temperature difference and a first change rate of a driving strength code to temperature. The temperature difference is a difference between a previous temperature when getting a previous ZQ command and a current temperature when getting a current ZQ command. A second operation circuit generates a second output value according to a voltage difference and a second change rate of the driving strength code to voltage. The voltage difference is a difference between a previous working voltage when getting the previous ZQ command and a current working voltage when getting the current ZQ command. A third operation circuit sums up the first output value and the second output value to generate a shift value, thereby adjusting the driving strength code calibrated by ZQ calibration.
US11264986B1	Capacitive touch sensing with high safety integrity A method for capacitive touch sensing with high safety integrity includes measuring at least one of a first mutual-capacitance of an electrode pair comprising two of a first electrode, a second electrode and a third electrode, and a self-capacitance between the third electrode and a body biased to a fixed voltage. A contact of the body to a dielectric overlaying each of the first electrode, the second electrode and the third electrode is detected by comparing at least one of the first mutual-capacitance of the electrode pair to a first reference range, and the self-capacitance to a second reference range.
US11264985B1	Bipolar pulsed-voltage gate driver A gate driver circuit comprises a gate-driver assembly, a transformer, first and second circuit voltage outputs, first and second switching devices, and a controller. The gate-driver assembly comprises a first and second voltage inputs and a first and second voltage outputs coupled to a primary winding of the transformer. The first and second switching devices are coupled to the secondary winding and respectively coupled to the first and second circuit voltage outputs. The controller is configured to cause the first circuit voltage output to supply a positive output voltage by supplying a higher first input voltage to the first voltage input than to the second voltage input and is also configured to cause the first circuit voltage output to supply a negative output voltage by supplying a higher second input voltage to the second voltage input than to the first voltage input.
US11264978B2	Circuit for processing a logic input A circuit for processing a logic input, including a first comparator capable of comparing the logic input with a first reference voltage and of providing a logic output at a first output logic level if the logic input is higher than the first reference voltage and otherwise at a second output logic level different from the first output logic level. The power supply of the first comparator and the first voltage reference are activated by the logic input.
US11264976B2	Symmetrically-interconnected tunable time delay circuit Aspects of the disclosure are directed to adaptively delaying an input signal. In accordance with one aspect, an apparatus includes a plurality of delay units, wherein each of the plurality of delay units includes a substantially similar output load characteristic; a plurality of buffer units, wherein each of the plurality of buffer units is coupled to one of the plurality of delay units; wherein a quantity of the plurality of delay units equals a quantity of the plurality of buffer units; an additional delay unit coupled to a delay unit output of one of the plurality of delay units; and a one-hot decoder coupled to each of the plurality of buffer units, the one-hot decoder configured to enable one and only one of the plurality of buffer units.
US11264974B2	Processing circuit using delay element coupled between control terminal and connection terminal of input transistor for hold time violation immunity A processing circuit includes an input circuit and a follow-up circuit. The input circuit includes a first transistor, a second transistor, and a delay element. The first transistor has a control terminal, a first connection terminal, and a second connection terminal. The control terminal of the first transistor is arranged to receive a data signal. A first connection terminal of the second transistor is coupled to the second connection terminal of the first transistor, and a control terminal of the second transistor is arranged to receive a first non-data signal. The delay element is coupled between the control terminal and the second connection terminal of the first transistor. A data input is received at an input node of the follow-up circuit, and the input node of the follow-up circuit is coupled to the second connection terminal of the second transistor.
US11264970B2	Piezoelectric resonator with patterned resonant confiners A MEMS resonator is operated at its parallel resonance frequency. An acoustic wave is propagated laterally away from a central region of the MEMS resonator through a piezoelectric layer of the MEMS resonator. The propagating acoustic wave is attenuated with concentric confiners that surround and are spaced apart from a perimeter of an electrode that forms the MEMS resonator.
US11264968B2	High-frequency device and multiplexer A high-frequency device includes: a circuit substrate including dielectric layers that are stacked, wiring patterns located on at least one of the dielectric layers, and a passive element formed of at least one of the wiring patterns, the circuit substrate having a first surface that is a surface of an outermost dielectric layer in a stacking direction of the dielectric layers; a terminal for connecting the high-frequency device to an external circuit, the terminal being located on the first surface and electrically connected to the passive element through a first path in the circuit substrate; and an acoustic wave element located on the first surface and electrically connected to the passive element through a second path in the circuit substrate.
US11264962B2	Fully differential amplifier including feedforward path A fully differential amplifier includes: an input stage comprising a first amplification circuit and a second amplification circuit, one of which is configured to generate a push signal and the other of which is configured to generate a pull signal, each by amplifying a differential input signal; an output stage for generating a differential output signal based on the push signal and the pull signal; and a feedback circuit for providing common mode feedback to the first amplification circuit based on the differential output signal, wherein the second amplification circuit may include a passive network for setting a common mode voltage of the push signal or the pull signal.
US11264959B2	Reference precharge system A precharge circuit comprises a gain amplifier, a comparator, a reservoir capacitor, a switch, a current source, and a switching network. The gain amplifier has a gain G1 and receives an input voltage Vrefp. The gain amplifier outputs an amplified voltage G1Vrefp to the comparator, which compares G1Vrefp to a voltage across the reservoir capacitor. The comparator outputs a control signal for the switch based on the comparison. The switch couples the current source to the reservoir capacitor. The current from the current source charges the reservoir capacitor. The switching network couples the reservoir capacitor to an output of the precharge circuit during a first operating mode and provides the input voltage Vrefp to the output during a second operating mode.
US11264955B2	Semiconductor amplifier circuit and semiconductor circuit A semiconductor amplifier circuit has a driver that outputs a drive signal corresponding to an input signal and switches drive capability of the drive signal in accordance with a logic of an instruction signal, an instruction signal setting unit that sets the logic of the instruction signal in accordance with whether the input signal satisfies a predetermined condition, and an output circuit that comprises a control terminal to which the drive signal is input and an output terminal that outputs a signal obtained by amplifying the input signal.
US11264951B2	Amplifier An amplifier includes: a circuit pattern providing a plurality of signal paths having different lengths; a transistor chip; a plurality of pads of transistor cells, the pads being electrically connected to the circuit pattern and being arranged on the transistor chip; a plurality of the transistor cells; a plurality of transmission lines for connecting each of the plurality of pads and each of the plurality of transistor cells, the transmission lines being arranged on the transistor chip, and a plurality of harmonic processing circuits each connected to each of the plurality of transmission lines and arranged on the transistor chip. The plurality of harmonic processing circuits each has a capacitor and an inductor, and a product of the capacitance of the capacitor and the inductance of the inductor is made constant in each of the plurality of harmonic processing circuits.
US11264944B1	Systems for damping a solar photovoltaic array tracker Solar tracker systems include a torque tube, a solar panel attached to the torque tube, and a damper assembly. The damper assembly includes an outer shell, a first chamber wall and a second chamber wall within the outer shell at least partially defining a chamber, and a piston to direct fluid through the chamber. A valve is within the chamber that includes a first axial end, a second axial end, and a seal positioned on the first axial end. The damper assembly further includes a biasing assembly that biases the valve into a first position within the chamber in which the seal is spaced from the first chamber wall. The valve is moveable within the chamber from the first position to a second position in which the seal contacts and seals against the first chamber wall to prevent the flow of fluid through the chamber.
US11264942B2	Actuator driven single-axis trackers A single-axis solar tracker consisting of a series of A-frame shaped foundation with actuators attached to each leg that are connected at one end to a common rotating assembly supporting multiple solar panels. Concerted action of the actuators causes the common rotating assembly to rotate about an axis of rotation. The system may include a central torque tube supported by the series of A-frame foundations or a frame assembly that is hingedly attached to each A-frame foundation via a torque arm.
US11264939B2	Exterior siding material with integrated solar panel A siding material for a building configured to hold one or more solar panels is disclosed including a siding shell including a first section and/or a second section, wherein each first and/or second section includes an essentially flat face disposed at an angle ranging from about 30 degrees to about 90 degrees relative to the ground or a perpendicular plane extending from a side of the building. In addition, one or more surfaces of the first section and/or the second section are perforated, and the first section and/or the second section each include a channel configured to hold an electrical cable.
US11264938B2	Radiative micron-gap thermophotovoltaic system with transparent emitter A thermophotovoltaic panel assembly including a heat sink and a plurality of thermophotovoltaic modules mounted on the heat sink. Each thermophotovoltaic module includes a photovoltaic element separated from an emitter assembly by a gap. The emitter assembly includes an emitter and applies force towards the photovoltaic element to maintain the gap. The thermophotovoltaic panel assembly may also utilize a force application layer on the emitter and be bolted in place. A housing can be used for protection and to transfer energy to the emitter. The heat sink cantilevers into the housing to define a space between the thermophotovoltaic modules and the inner surface of the housing. Preferably, the housing maintains a vacuum and, in turn, the gap is evacuated. The heat sink can be monolithic and cooled with fluid pumped therethrough. The emitter may be transparent or at least partially transmissive.
US11264934B2	Method to control loads using isolated drive circuits Methods and apparatus for providing DC motor gate driver isolation. In embodiments, first and second DC input signals are received at a supply control module, which generates first and second control signals for controlling first and second switches. A first transformer has a primary winding having one end coupled to the first DC input signal and another end coupled to the first switch A second transformer has a primary winding having one end coupled to the second DC input signal and another end coupled to the second switch. The supply control module controls the first and second control signals so that a secondary winding of the first or second transformer energizes an isolated AC bus coupled to the first and second transformers. First and second gate drivers receive respective isolated AC signals from the isolated AC bus. Conversion of the isolated AC signals back to DC occurs at the point of use.
US11264930B2	Low to high speed operation of a sensorless brushless DC motor A method of operating a Brushless Direct Current Motor (BLDCM), the BLDCM of the type including: a series of concentric independently activated electromagnetic phase coils interacting with a series of permanent magnets to provide relative movement therebetween, the phase coils having temporal periods of activation time and deactivation time, the method including the steps of: (a) activating at least one of the phase coils for a short period of activation; and (b) measuring the voltage response across the phase coil of the deactivated phase coil during the short period of activation to determine the rotor position.
US11264927B2	Electric vehicle propulsion control device An electric vehicle propulsion control device includes a power converter that applies an alternating-current voltage to an induction machine and a controller that controls the power converter based on an external operation command. The controller includes a first calculation unit. The first calculation unit calculates, from current information (id and iq) detected at the induction machine and current command values (id1 and iq1) that are based on the operation command, a d-axis voltage command (Vd1) and a q-axis voltage command (Vq1) for the power converter, and a primary magnetic flux φds and a secondary magnetic flux φdr of the induction machine. The first calculation unit also adds to or subtracts from a term including the q-axis voltage command (Vq1) an interference term stemming from the d-axis voltage command (Vd1) in calculating a first speed ω1 that is a free-run speed of the induction machine.
US11264926B2	Driving circuit and method for stepping motor Excitation position is changed in accordance with an external clock. The state of a full bridge circuit including four transistors connected to a coil of a stepping motor, is controlled in accordance with the excitation position. At the time of transition from the excitation position at which coil current that flows in the coil is nonzero to the excitation position at which the coil current is zero, a switch is made to (i) the inverse state where the on or off state of each of the four transistors before the transition is inverted, and then a switch is made to (ii) the off state where all the four transistors are off.
US11264925B2	Bi-stable, sub-commutated, direct-drive, sinusoidal motor controller for precision position control An electric motor controller system for modulating requested motor torque via oscillating the instantaneous torque, including a bi-stable torque controller; a proportional-integral (PI) velocity controller a proportional-integral-differential (PID) position controller; and sinusoidal zero-velocity table mapping.
US11264924B2	Motor driving apparatus and refrigeration cycle equipment In a motor driving apparatus including an inverter connectable to n motors (n being an integer not less than 2) each including a rotor having a permanent magnet, braking operation is performed on i (i being an integer from 1 to n−1) of the n motors, and then braking operation is performed on j (j being an integer from 1 to n−i) of the n motors other than the i motors. It is possible to reduce the risks of failure of the inverter and demagnetization of the motors due to overcurrent by reducing current flowing through the inverter and the motors when the braking operation is performed.
US11264922B2	Piezoelectric drive device and robot A piezoelectric drive device includes a rotor which has an output section for outputting a rotational force and a transmission section disposed on an outer periphery of the output section, and rotates around a rotational axis, and a vibrating part which has a piezoelectric element, and rotates the rotor due to a deformation of the piezoelectric element. The transmission section has a first portion and a second portion different from each other in position in a radial direction from the output section toward the transmission section, the first portion is coupled to the output section, the second portion is higher in Young's modulus than the first portion, the second portion is higher in mass per unit volume than the first portion, and the vibrating part makes contact with the transmission section at a position overlapping the second portion in a plan view from an axial direction of the rotational axis.
US11264917B2	Interleaved inverter A system and method for an interleaved inverter including a set of module circuits and an inverter controller. The module circuits include multiple switches. The inverter controller is configured to assign a first phase shift value to each of the module circuits during a normal mode of operation and assign a second phase shift value to at least one of the module circuits during a failure mode of operation. The second phase shift value is greater than the first phase shift value.
US11264916B2	Operating a modular multilevel converter A method that operates a modular multilevel converter (MMC), includes controlling a plurality of submodules of an arm of the MMC for a plurality of subsequent periods. Each of the submodules has a capacitor. The controlling includes, for each of the subsequent periods: sampling a value of a reference voltage; determining an integer number n of submodules of the plurality of submodules required to approximate the sampled value; for each submodule of a subset of the n submodules of the plurality of submodules, determining a temperature characterizing the respective submodule; inserting all submodules of the subset of the n submodules except for one remaining submodule; determining, depending on the determined temperatures, a duty ratio; and inserting the one remaining submodule for a duration given by the duty ratio. A minimum temperature of the determined temperatures is identified and the duty ratio is determined depending on the minimum temperature.
US11264911B1	Method and apparatus for delivering power to semiconductors A semiconductor package includes a VLSI semiconductor die and one or more output circuits connected to supply power to the die mounted to a package substrate. The output circuit(s), which include a transformer and rectification circuitry, provide current multiplication at an essentially fixed conversion ratio, K, in the semiconductor package, receiving AC power at a relatively high voltage and delivering DC power at a relatively low voltage to the die. The output circuits may be connected in series or parallel as needed. A driver circuit may be provided outside the semiconductor package for receiving power from a source and driving the transformer in the output circuit(s), preferably with sinusoidal currents. The driver circuit may drive a plurality of output circuits. The semiconductor package may require far fewer interface connections for supplying power to the die.
US11264908B1	Multi-phase switched-mode power supplies A multi-phase switched-mode power supply includes first and second interleaved phase circuits coupled between input and output terminals. The first phase circuit includes a first inductor coupled with a first switch, and the second phase circuit includes a second inductor coupled with a second switch. A control circuit is configured to output first and second PWM signals to the first and second switches. An on time of the second PWM signal is equal to an on time of the first PWM signal plus a fixed offset time period. The control circuit is configured to determine a period between rising edges of the first PWM signal in order to determine an off trigger PWM signal, and change the second PWM signal to a logical low value when a falling edge of the off trigger PWM signal occurs while the second PWM signal has a logical high value.
US11264905B2	DC-DC converter regulation circuit and method for determining overshoot duration An embodiment DC to DC conversion circuit comprises a DC to DC converter and a regulation circuit. The regulation circuit comprises a comparator configured to detect, during a discharge phase of the DC to DC converter, an overshoot period during which an output voltage of the DC to DC converter exceeds a target voltage, and a timer configured to measure a duration of the overshoot period.
US11264904B2	Energy storage modules with parallel energy storage module architectures An energy storage module (ESM) assembly, ESM and method of balancing current flow on a direct current bus are provided. The ESM assembly includes a bidirectional DC-DC converter, an ESM having first and second energy cell strings connected in parallel relative to one another and configured to be connected to respective inputs of the bidirectional DC-DC converter. The ESM is configured to absorb current from the bidirectional DC-DC converter when the bidirectional DC-DC converter is operated in a buck mode. The ESM is configured to source current to the bidirectional DC-DC converter when the bidirectional DC-DC converter is operated in a boost mode.
US11264903B2	Power converter with zero-voltage switching A power converter circuit includes a power stage that includes a transformer and a switch. The switch can be controlled in response to a PWM signal to provide a primary current through a primary winding of the transformer to induce a secondary current in a secondary winding of the transformer to generate an output voltage. The power stage includes a switching node between the switch and the primary winding having a switching voltage. The circuit also includes a switching controller configured to generate the PWM signal in response to a ramp signal. The ramp signal can have an amplitude of a slope that is proportional to a decay rate of a magnetizing current of the transformer and generated in response to feedback from the power stage. The switch can be activated in response to the switching voltage having an amplitude of approximately zero volts based on the amplitude of the ramp signal.
US11264901B2	Electric-power conversion system controller There is provided an electric-power conversion system controller in which even when the temperatures of a switching device and a diode included in the driving circuit for a converter become high, the performances of the devices are prevented from being deteriorated and the lifetimes thereof are prevented from being shortened. In the case where even when determining that direct-coupling control is to be performed, a positive-polarity-side device temperature is higher than a determination temperature, the electric-power conversion system controller performs voltage-boosting control in which the positive-polarity-side switching device and the negative-polarity-side switching device are on/off-controlled in an on/off period; in the case where the positive-polarity-side device temperature is the same as or lower than the determination temperature, the electric-power conversion system controller performs direct-coupling control in which the positive-polarity-side switching device is turned on and the negative-polarity-side switching device is turned off.
US11264900B2	PFM control method for boost converters The present disclosure is directed to a pulse frequency modulation (PFM) control method for a boost converter and apparatus for carrying out the method. A boost converter includes an inductor and a transistor coupled thereto. A control circuit is arranged to control the transistor to cause current pulsed to be sourced through the inductor. When operating in a PFM mode, the control circuit may control the timing of pulses such that, at the beginning of a specified time period, current pulses may be sourced with no spacing between successive pulses. After a desired number of pulses have been sourced, no pulses are sourced for the remainder of the specified time period. Nevertheless, the number of pulses sourced over the time period corresponds to a desired average frequency of pulses.
US11264898B2	Switching converter with multiple drive stages and related modes A system includes a switching converter with an output inductor. The switching converter also includes a switch set with a switch node coupled to the output inductor. The switching converter also includes a first drive stage coupled to the switch set. The switching converter also includes a second drive stage coupled to the switch set. The switching converter also includes a controller coupled to the first drive stage and the second drive stage. The controller includes a supply voltage detector circuit. The controller also includes a level shifter coupled to an output of the supply voltage detector circuit. The controller also includes a selection circuit coupled between the level shifter and the second drive stage.
US11264897B2	Pulse width modulator delay control circuit A switching power supply controller includes a pulse width modulator circuit. The pulse width modulator circuit includes a delay circuit and a delay control circuit coupled to the delay circuit. The delay control circuit includes an amplifier circuit. The amplifier circuit includes a first input terminal, a second input terminal, and an output terminal. The first input terminal is coupled to a first voltage reference terminal. The second input terminal is coupled to the second voltage reference terminal. The output terminal is coupled to a control terminal of the delay circuit.
US11264896B2	Two-phase boost converter with reduced voltage stress, and inherent current balancing A two-phase boost converter is provided. The converter includes a first boost converter coupled between an input node and a common node; and a second boost converter coupled between the input node and an output node, wherein the second boost converter comprises: a first transistor coupled between ground and an internal node, an inductor coupled between the input node and the internal node, a capacitor coupled between the internal node and the common node, and a second transistor coupled between the common node and the output node.
US11264885B2	Rotor with a coil arrangement and a winding carrier Various embodiments include a rotor for an electric machine comprising: an electric coil arrangement; and a winding carrier mechanically carrying the coil arrangement and at least partially enclosing the coil arrangement on a radially outer side of the coil arrangement. The rotor includes an inner cavity for circulating a fluid coolant such that the coil arrangement comes into contact with the liquid coolant on its radially inner side as the rotor rotates.
US11264882B2	Vibrating motor The present application discloses a vibrating motor, which includes a housing having a receiving cavity, a stator received in the receiving cavity, a vibrator received in the receiving cavity, and a flexible assembly received in the receiving cavity. The flexible assembly is configured for elastically supporting the vibrator. The housing includes a top wall, a bottom wall facing the top wall, and a side wall connecting the top wall and the bottom wall. The stator includes an iron core, a coil sleeved on the iron core, and pole shoes positioned at two ends of the iron core. Each the pole shoe has a surface close to the iron core recessed to form an avoiding portion, and the iron core is inserted in the avoiding portion.
US11264880B2	Permanent magnet motor A permanent magnet motor includes a rotor having a field pole of a rotor core, wherein the field pole has a radius smaller than an arc centered on a shaft of the rotor, a multiple of slits are formed in the field pole, the multiple of slits are disposed so that an interval between a first central line positioned between a multiple of the slits and a second central line positioned between a neighboring multiple of the slits increases as the first central line and the second central line head toward an outer peripheral side of the rotor core, and of the multiple of slits of the field pole, a first slit disposed in a central position of the field pole, and a second slit and a third slit disposed on either side of the first slit, are disposed within 20% of a circumferential direction width of the permanent magnet.
US11264879B2	In-wheel motor An in-wheel motor, comprising: a rotor (14) of a surface permanent magnet type, wherein a plurality of permanent magnets (15) are fixed along an inner circumferential surface of the rotor; wedge-shaped protrusions (42) for fixing the permanent magnets (15) on the rotor (14); and a stator (30) disposed inside the rotor (14), wherein teeth (35) and slots (36) are alternately formed on an outer circumferential portion of the stator; wherein the number of the permanent magnets (15) is 32, and the number of the slots 36 is 24; wherein each of the permanent magnets (15) has chamfers (43) on each of the ends so that a magnetic flux cannot concentrate, and is convex toward the stator (30), in a cross-section perpendicular to a rotary axis of the rotor (14).
US11264876B2	Flywheel systems and flywheel bearing modules A flywheel system includes a rotor configured to rotate about a rotation axis. The flywheel system further includes a fixture and an active magnetic bearing module for actively stabilizing the rotor relative to the fixture. The active magnetic bearing module includes a plurality of first magnetizable elements mechanically coupled to or integrated in the rotor, and a plurality of electromagnets mechanically coupled to the fixture and configured to magnetically couple with the plurality of first magnetizable elements to actively stabilize the rotor relative to the fixture. Each of the first magnetizable elements is farther than each of the electromagnets from the rotation axis.
US11264875B2	Rotor for an electric machine of a vehicle A rotor for an electric machine of a vehicle. The rotor includes permanent magnets, receptions for the permanent magnets and deformation components. The permanent magnets are adapted to be deformed elastically and are arranged within the receptions, which are designed such that the permanent magnets may deform within the receptions. The deformation components are adapted to deform the permanent magnets such that at least one of a magnetic induction, a conductor length and a rotor radius is adjusted.
US11264874B2	Current-controlled motor The disclosure relates to the technical field of motor driven, and in particular to a current-controlled motor. The motor includes a rotator assembly, a stator assembly, external connectors and bearings, wherein the stator assembly is in driven connection with the rotator. And the rotator assembly is connected with the bearings which connected with the external connector. Two capacitance structures are formed by the outer surfaces of the two ends of the rotator assembly and the inner surface of the relative position of the external connector with air gap between them.
US11264871B2	Inverter drive system, bus bar and assembly An inverter drive assembly includes a first array of inverters, a second array of inverters spaced from the first array of inverters and defining a plenum therebetween, and a crossover bus bar spanning the plenum and electrically connecting the first array of inverters to the second array of inverters. The crossover bus bar includes a first laminated bus section electrically connected to the first array of inverters, a second laminated bus section electrically connected to the second array of inverters, and a solid bus connection interconnecting the first laminated bus section with the second laminated bus section.
US11264866B2	Pump arrangement, axial-flow machine and compressor comprising at least one rotor having permanent magnets and a stator having a multiplicity of teeth separated from each other wherein the tooth tip has a substantially rectangular-shaped cross section A pump arrangement includes an axial-flow machine and a drive to convey fluid mounted in a housing. The axial-flow machine is formed by at least one first rotor having permanent magnets, a shaft connected to the first rotor and a stator arrangement with stator teeth distributed concentrically around the shaft axis circumferentially and axially separated from the first rotor by an air gap. The stator teeth have axially-opposite end portions and a tooth core therebetween wound with at least one coil winding. The second end portion, turned away from the first rotor, of each stator tooth forms a tooth root joined to a back plate. The first rotor is an eccentric disk and on the side away from the stator arrangement has an eccentric cam, radially spaced from the shaft axis, and rotatably and torque-transmittingly connected to the drive. An axial-flow machine and a compressor includes the pump arrangement.
US11264864B2	Flat-motor driving method and drive circuit, and electronic device An electronic device includes a signal trigger circuit, a flat-motor drive circuit, and a flat motor. The signal trigger circuit sends a starting instruction to the flat-motor drive circuit for instructing to start the flat motor. A processor of the flat-motor drive circuit sends a first triggering instruction to a voltage processing circuit of the flat-motor drive circuit after receiving the starting instruction. The voltage processing circuit provides a first working voltage V1 to the flat motor after receiving the first triggering instruction, and provides a second working voltage V0 to the flat motor after a first time period. V0
US11264859B2	Rotary electric machine A rotary electric machine includes: a housing; a stator that is disposed in the housing; a rotating shaft that is rotatably disposed in the housing; a rotor that is disposed on the rotating shaft; and a rotational angle detecting apparatus that generates a signal that corresponds to a rotational angle of the rotating shaft. The rotational angle detecting apparatus includes: a magnetism generating body that is disposed on an axial end surface of the rotating shaft; and a magnetic sensor that faces the magnetism generating body. A recess portion is disposed on the end surface. The magnetism generating body is disposed in the recess portion.
US11264858B2	Hairpin electric machine with self-supporting jumpers An electric machine includes a stator core and interconnected hairpins attached to the stator core and defining a path. A pair of the interconnected hairpins have first and second ends, respectively, and are circumferentially spaced apart from each other. A jumper is interconnected between the first and second ends. The jumper has a body defining first and second holes that receive the first and second ends, respectively. The first hole is defined by a perimeter having opposing first and second walls and opposing third and fourth walls.
US11264857B2	Stator for an electric motor A stator for an electric motor, including a stator ring with slots arranged on the inner or the outer circumference, wherein each slot accommodates a plurality of conductors extending along the slot and having a rectangular cross-section, each of which is covered by an insulation layer, wherein to form a channel through which a coolant can flow, the insulation layer of at least one of the conductors has at least one recess extending along the conductor.
US11264856B2	Hairpin winding electric machine An electric machine includes a stator core defining circumferentially arranged slots alternating between odd and even slots. Each slot has radial pin positions arranged in adjacent pairs to define radial layers. A hairpin winding includes a first path of interconnected hairpins that is disposed in the stator core such that, for each of the radial layers, the first path is disposed in the odd slots and the even slots a same number of times.
US11264854B2	Electric machine with phase change material for a turbomachine starter/generator An electric machine includes a stator and a rotor configured to be driven in rotation in relation to one another. The rotor includes a plurality of permanent magnets, and the stator further includes a magnetic circuit including poles extending toward the rotor. The machine includes windings of conducting elements around each pole and at least one heat sink arranged inside a conducting element and/or between the conducting elements. The heat sink includes a phase change material.
US11264852B2	Motor A cooling structure is provided that cools a rotor in a motor. The motor includes a shaft that is rotatably supported on a case and a rotor having a rotor core to which a plurality of magnets are provided on an outer periphery of the shaft and which is disposed to face a stator. Flow passages are formed on the shaft and the rotor and cooling oil passes through a core flow passage inside the rotor core from an introduction flow passage on a first side in an axial direction of the shaft and flows to the introduction flow passage on a second side in the axial direction of the shaft. An inlet communicating with the introduction flow passage and an outlet communicating with the introduction flow passage are formed in the case.
US11264850B2	Laminated rotor having deflecting magnet retaining prongs and support posts for the prongs A rotor assembly for an electric machine includes a rotor core that is fabricated from a plurality of laminations stacked along a rotational axis of the electric machine. The rotor core has a plurality of arcuately arranged, axially extending magnet-receiving slots. The rotor core includes a plurality of magnets received in respective ones of the magnet-receiving slots. Each of the laminations includes opposed deflectable magnet-retaining prongs that extend into a corresponding one of the magnet-receiving slots. The magnet-retaining prongs are deflected by and engage the magnets to exert a reactive force against the magnets and hold them in place. Each of the laminations also includes respective support posts axially adjacent the magnet-retaining prongs. The support posts extend alongside and thereby limit the deflection of the magnet-retaining prongs when engaged with the corresponding one of the magnets.
US11264849B2	Rotor for an electric machine The present disclosure relates to a rotor (3) for an electric machine (1). The rotor (3) includes a plurality of magnet poles (5a-f; 5a-h) each comprising one or more permanent magnets (6-n). The magnet poles (5a-f; 5a-h) are angularly separated from each other and an inter-pole region (7a-f; 7a-h) is formed between adjacent magnet poles (5a-f; 5a-h). At least one external flux barrier (12-1, 12-2) is disposed in each said inter-pole region (7a-f; 7a-h), the at least one external flux barrier (12-1, 12-2) comprising an external aperture. The present disclosure also relates to an electric machine (1) including a rotor (3); and to a vehicle (2) including an electric machine (1).
US11264846B2	Split stator body for an electric machine A stator for an electric machine having a plurality of radially extending teeth, supported by an outer annular yoke radial to the teeth, at least part of the teeth supporting a coil and the outer annular yoke having flutes of partially cylindrical shape opening towards the teeth, at least part of the teeth each having, at their end, on the side of the outer annular yoke, a protuberance of partially cylindrical shape, the protuberance being held in the flute by contact points so that at least one part of the teeth performs a relative movement having a degree of rotational and/or translational freedom relative to the annular yoke.
US11264845B2	Rotary electrical machine A rotary electrical machine includes a switch for supplying power to a field winding and a controller. A ratio of an on-time to a switching cycle of the switch, i.e., a duty ratio which is larger than the duty ratio corresponding to the field current that gives the maximum reduction amount of the inductance of the field winding with respect to an increasing amount of the field current in a range that the field current can take and which has a predetermined value less than 100%. The controller calculates the duty ratio on the condition that an upper limit of the duty ratio is set as the predetermined value and turns on/off the switch based on the calculated duty ratio, and sets the predetermined value to be larger as a rotation speed of a rotor is higher, or as a d-axis current flowing through an armature winding is larger.
US11264836B2	Wireless kinetic charger A power unit and method of manufacturing a power unit. The power unit may include one or more inductors arranged in an alternating pole configuration. The inductors are attached to a circuit board to form an electrical generator configured to provide electrical energy to a wireless charger. The wireless charger may be detached from the generator.
US11264835B2	Inductive-capacitive network circuit for capacitive power transfer Systems, methods, apparatuses, and computer program products for drone based network optimization are provided. An inductive-capacitive circuit may include a first branch including a first energy storage element. The inductive-capacitive circuit may also include a second branch including a second energy storage element and a third energy storage element. In addition, the inductive-capacitive circuit may include a third branch including a fourth energy storage element and a fifth energy storage element, and a power source supplying a current through the first branch, the second branch, and the third branch. Further, the first branch, the second branch, and the third branch may be connected to at least one common node of the inductive-capacitive circuit.
US11264831B2	Solid-state lighting with an emergency driver An LED luminaire emergency driver comprises a rechargeable battery, a charger circuit, an LED driving circuit, and a charging and discharging control circuit. The LED luminaire emergency driver is intended to automatically supply a first supplied voltage to drive LED arrays in an event of a normal power failure. The LED driving circuit is configured to convert a terminal voltage from the rechargeable battery into the first supplied voltage when a line voltage from AC mains is unavailable. The charging and discharging control circuit comprises a relay switch and a transistor circuit assembly configured to sense a charging voltage, to control switching between normal power and an emergency power to operate the LED arrays, and to meet regulatory requirements without operational ambiguity and safety issues.
US11264828B2	Vehicle-mounted power source control apparatus, vehicle-mounted power source apparatus, and vehicle control method Provided are a vehicle-mounted power source control apparatus, a vehicle-mounted power source apparatus, and a vehicle control method that are highly versatile. A power source control apparatus sets a setting value corresponding to a combination of loads to be connected to multiple output ports based on information determining a candidate value for a setting value for each combination of the loads. Also, control relating to backup is performed based on the set setting value. By doing so, it is possible to perform control relating to backup in a mode corresponding to the combination of the loads.
US11264825B1	Vehicle to vehicle high power charging A vehicle charger includes two charge connectors configured to couple with DC charge ports of two vehicles each having a battery, a buck boost converter connected between the two charge connectors configured to convert a first DC voltage to a second DC voltage, and a controller. The controller is configured to wirelessly connect to a mobile device to obtain a charging instruction identifying a donor vehicle and a beneficiary vehicle among the two vehicles, and responsive to the two charger connectors being coupled with the DC charge ports of the donor vehicle and the beneficiary vehicle, output a request for charging permission to a digital device associated with at least one of the vehicles. The controller is further configured to, responsive to receiving the charging permission, start a charging session by transferring electric charge from the donor vehicle to the beneficiary vehicle via the buck boost converter.
US11264823B2	Multi-coil wireless charger A wireless charger includes multiple transmitter coils, first and second drivers, and a controller. The transmitter coils are arranged close to and/or overlap with each other. The first driver is coupled with at least one of the transmitter coils to drive the transmitter coil to communicate with and/or provide power over a first channel to receiver devices. The second driver is coupled with at least another one of the transmitter coils to drive the transmitter coil to communicate with and/or provide power over a second channel to receiver devices. The controller is coupled with the first and second drivers and enables only one of the first and second drivers at a time during a first stage.
US11264819B1	Illuminated wireless charging area for a vehicle interior panel A vehicle interior panel includes a decorative layer having a decorative side, a sensor, a wireless charger, and a light source. The sensor is configured to detect a mobile device situated on the decorative side of the decorative layer, and the wireless charger is configured to create a wireless charging area on the decorative side of the decorative panel. The light source is configured to display a trace sequence that is located between the mobile device and the wireless charging area to help a user locate the wireless charging area.
US11264815B2	Control of thermal runaway event in battery system A method of controlling a thermal runaway event in a battery system having first and second battery modules. The method includes detecting a thermal runaway event in the first battery module, and, in response to the detection of the thermal runaway event, determining whether an electrical current is flowing through the first battery module. The method also includes electrically decoupling the first battery module from the second battery module in response to the detection of the thermal runaway event, if the current is not flowing through the first battery module. Furthermore, the method includes electrically connecting the second battery module to an electrical load to discharge the second module through the load, if the current is determined to be flowing through the first battery module or after decoupling the first module. Discharging the second battery module is intended to control propagation of the thermal runaway event through the second module.
US11264814B2	Method and apparatus for connecting a battery power source to a portable electronic device Battery circuitry forms part of apparatus for connecting a battery power source to a portable electronic device. The battery circuitry is configured to detect a transitioning of an enable signal, caused by actuation of a power switch, from a de-asserted state to an asserted state. In response to detecting the transitioning of the enable signal, the battery circuitry is further configured to open an electrical path within the battery circuitry. The path, when opened, connects the battery power source in a manner that permits powering on of the portable electronic device.
US11264809B2	Method for operating an energy storage system and energy storage system A method for operating an energy storage system, which includes at least one energy store with a plurality of cells and is designed to supply an electric drive system of a vehicle is provided. The method includes identifying a reference cell from among the cells, and carrying out a first symmetrization procedure for the cells at a first point in time, at which the reference cell has a first reference charge state. The method also includes carrying out a second symmetrization procedure for the cells, if the following conditions a) and b) are met at a second point in time following the first point in time: a) the voltage difference between the voltage of the cell with the lowest voltage and the voltage of the cell with the highest voltage is greater than or equal to a specified voltage difference; and b) the reference state of charge of the reference cell at the second point in time lies within a specified state of charge range, the state of charge range being determined in such a way that it includes the first reference state of charge.
US11264802B2	Relating to reactive power control in wind power plants A method for controlling a renewable energy power plant comprising a plurality of renewable energy generators, the method comprising: carrying out the following steps dynamically: determining a reactive power capability value of the power plant based on the generated active power of each of the renewable energy generators within the power plant; determining a reactive power exchange limit value based on a measured grid voltage level; and controlling the power plant so that the generated reactive power does not exceed the lower of the determined reactive power capability value and the determined reactive power exchange limit value that are determined dynamically.
US11264801B2	Load management algorithm for optimizing engine efficiency Systems and methods for operating a series of generators configured to provide power to a motor or motors. Generators generally operate at different efficiency levels depending on the operating capacity. A computation component can analyze the current efficiency of the generators and determine if there is an alternative power distribution among the existing generators that would result in a more efficient operation of the system.
US11264799B2	Submodular load clustering with robust principal component analysis Systems and methods manage electrical loads in a grid by applying Robust principal component analysis (R-PCA) to decompose annual load profiles into low-rank components and sparse components; extracting one or more predetermined features; constructing a similarity graph; selecting submodular cluster centers through the constructed similarity graph; determining a cluster assignment based on selected centers; and applying the clustering assignment for load analysis.
US11264798B2	Charging station having dynamic charging current distribution A charging station for charging a plurality of electric vehicles, in particular electric automobiles, comprising: a supply device, in particular for connection to an electricity supply grid for supplying the charging station with electric power, a plurality of charging terminals for charging in each case at least one electric vehicle, and each charging terminal comprises a supply input for drawing electric power from the supply device, a charging output with one or more charging connections for outputting a respective charging current for charging a respective connected electric vehicle, and at least one DC chopper arranged between the supply input and the charging output in order to generate a respective chopper current from the electric power of the supply device, or as an alternative at least one chopper terminal arranged between the supply input and the charging output in order to provide a chopper current generated outside the charging terminal by a DC chopper, in particular chopper current generated in the supply device, wherein in each case each charging current is formed from a chopper current or a plurality of chopper currents, and wherein the charging terminals are connected to one another at exchange connections via electrical exchange lines in order thereby to exchange chopper currents with one another.
US11264797B2	Overvoltage protective device for lightning protection Disclosed in the present invention is a novel overvoltage protective device for lightning protection, comprising a first varistor, a second varistor, a PTC Thermistor, and lead-out terminals. The first varistor and the PTC Thermistor are connected in parallel, and then further connected in series with the second varistor to form a single port combined circuit. The surge-withstand capability of the first varistor is higher than the surge-withstand capability of the second varistor. At least one of the two lead-out terminals of the single port combined circuit is a thermally-conductive end with low thermal resistance. The second varistor is thermally coupled to the PTC Thermistor. The thermally-conductive end with low thermal resistance is thermally coupled to one or both of the second varistor and the PTC Thermistor.
US11264792B2	Secondary battery protection circuit, secondary battery protection apparatus and battery pack A secondary battery protection circuit for protecting a secondary battery, including: a low-voltage detecting circuit configured to detect a voltage across the secondary battery that is lower than a second voltage for low voltage detection, the second voltage being set to be lower than a first voltage for overdischarge detection; and a switching circuit configured to cause a gate of a charge control NMOS transistor to be fixed at a potential at a high side power supply terminal, upon detecting, by the low-voltage detecting circuit, that the voltage across the secondary battery is lower than the second voltage for low voltage detection.
US11264791B2	Smart wiring devices A protective wiring device disposed in an electrical distribution system, the device comprising: a plurality of line terminals comprising a line-side phase terminal and a line-side neutral terminal; a plurality of load terminals comprising a load-side phase terminal and a load-side neutral terminal; a line conductor electrically coupling the line-side phase terminal to the load-side phase terminal; a neutral conductor electrically coupling the line-side neutral terminal to the load-side neutral terminal; a controller configured to transmit wirelessly data derived from signals present on at least one of the line conductor or the neutral conductor and to receive wirelessly receive at least one command.
US11264787B2	Load center Implementations include a compartmentalized plug-in load center having connector receptacles for load circuit wiring connection to the load center and a plug-in back plate to connect the plug-in load center to a vertical power busway within a utility wall panel of a building, and a method for installing the load center in a building with a vertical power busway.
US11264785B2	Quick connect An electrical connection assembly includes an electrical box including a housing having an internal surface defining an internal volume of the housing. An electrical connector is positioned outside the internal volume of the housing and fixed to the housing with a fastener. The housing includes an aperture having an opening defining an insertion path extending from a location external to the housing along a frame of the electrical connector to a location within the internal volume of the housing. The assembly includes a disc mechanically secured to the housing relative to the opening to obstruct the insertion path. A retainer and a bushing including a membrane for the electrical connector as well as methods of making an electrical connector are also provided.
US11264784B2	Conductor identification Conductor identification may be provided. A first sleeve may be placed around a first conductor and a second sleeve around a second conductor. Next, a first tag may be placed on the first conductor and a second tag on the second conductor. Then, the first conductor and the second conductor may be pulled together through a conduit. The first conductor may slideably move through the first sleeve and the second conductor may slideably move through the second sleeve as the first conductor and the second conductor are pulled together through the conduit.
US11264783B2	Headlock cable installation system A headlock cable installation system includes a headlock assembly, an extension rod, and a flexible headlock cable. The headlock cable installation system is used for installing a pre-connectorized cable assembly. The headlock assembly defines a cavity configured to receive a connectorized end of the pre-connectorized cable assembly. The flexible headlock cable has opposite first and second ends. The first end of the headlock cable is coupled to the headlock assembly, whereas the opposite second end of the headlock cable is adjustably coupled to the extension rod. Adjustment of the second end varies a position of the headlock assembly relative to the extension rod.
US11264775B2	Discriminative remote sensing and surface profiling based on superradiant photonic backscattering Disclosed is a system and method for remote sensing, surface profiling, object identification, and aiming based on two-photon population inversion and subsequent photon backscattering enhanced by superradiance using two co-propagating pump waves. The present disclosure enables efficient and highly-directional photon backscattering by generating the pump waves in properly pulsed time-frequency modes, proper spatial modes, with proper group-velocity difference in air. The pump waves are relatively delayed in a tunable pulse delay device and launched to free space along a desirable direction using a laser-pointing device. When the pump waves overlap in air, signal photons will be created through two-photon driven superradiant backscattering if target gas molecules are present. The backscattered signal photons propagate back, picked using optical filters, and detected. By scanning the relative delay and the launching direction while the signal photons are detected, three-dimensional information of target objects is acquired remotely.
US11264773B2	Laser apparatus and method for manufacturing optical element A laser apparatus including an optical element made of a CaF2 crystal and configured to transmit an ultraviolet laser beam obliquely incident on one surface of the optical element, the electric field axis of the P-polarized component of the laser beam propagating through the optical element coinciding with one axis contained in <111> of the CaF2 crystal, with the P-polarized component defined with respect to the one surface. A method for manufacturing an optical element, the method including causing a seed CaF2 crystal to undergo crystal growth along one axis contained in <111> to form an ingot, setting a cutting axis to be an axis inclining by an angle within 14.18±5° with respect to the crystal growth direction toward the direction of another axis contained in <111>, which differs from the crystal growth direction, and cutting the ingot along a plane perpendicular to the cutting axis.
US11264771B1	Laser device An optical path cover is located on an optical path through which beam light travels. The optical path cover includes a cylindrical portion through which the beam light is capable of passing. A plurality of protruding portions are formed on inner walls of the cylindrical portion, the inner walls facing toward a side of an optical axis of the beam light. The protruding portions, each of which has a convex shape in cross-section taken perpendicularly to the optical axis, are arranged next to each other with the convex shape facing toward the side of the optical axis. Each of the protruding portions has an elongated shape extending along the optical axis.
US11264769B1	Power adapter having contact elements in a recess and method of controlling a power adapter A power adapter configured to provide power to a load is described. The power adapter may comprise a first plurality of contact elements accessible on an outer surface of the power adapter, the first plurality of contact elements comprising a first contact element configured to receive power; and a recess comprising a second plurality of contact elements and adapted to receive a control attachment; wherein a second contact element of the second plurality of contact elements is configured to receive power by way of the first contact element of the first plurality of contact elements, and a third contact element of the second plurality of contact elements is configured to receive power by way of the control attachment.
US11264765B2	Electrical connector and electrical connector assembly An electrical connector includes two adjacent terminal groups in a front-rear direction, including a front terminal group and a rear terminal group. Each terminal group includes a ground terminal and a signal terminal. The ground terminal has a first base portion and a first elastic arm. The first elastic arm includes two extending arms and a through slot formed therebetween. The signal terminal has a second base portion and a second elastic arm. The first elastic arm and the second elastic arm are used to be electrically connected to a mating member. In a same terminal group, the signal terminal is located in front of the first base portion, and the second elastic arm runs through the through slot. The mating member presses on the first elastic arm. The first elastic arm of the ground terminal of the rear terminal group abuts the ground terminal of the front terminal group.
US11264759B1	Connector with integrated primary lock reinforcement and terminal position assurance A connector assembly comprises a resilient primary lock for securing a wire terminal with a housing, a primary lock reinforcement (PLR) device, and a PLR actuator for moving the PLR device between pre- and fully-staged configurations. The PLR device is configured to move in response to contact by the PLR actuator as the housing components are mated together. The PLR actuator includes an elongated, tapered finger that wedges against the PLR device during housing mating. A method of reinforcing a primary lock of a connector assembly is also described.
US11264758B2	Holder bracket for extension cord receptacle head A holder bracket for extension cord receptacle head having a base plate and one or more clips, hooks, claws, or latches for receiving and securing to a surface a receptacle head of an electrical extension cord. The clips, hooks, claws, or latches provide flexibility which allow for easy intentional insertion and removal of the receptacle head of the electrical extension cord, sufficient retention force to allow single-handed plugging and unplugging of electrical plugs into and out of the receptacle head, and a forceful release feature to prevent or reduce trip hazards that may be posed by the electrical extension cord.
US11264756B2	Connector mounting rack and patch panel system thereof A connector mounting rack configured to assemble a plurality of connectors includes a panel, a frame and one or more first partitions. The panel has a plurality of openings formed in an array, each adjacent two of the openings separated by a portion of the panel. The frame is arranged at a back side of the panel. The frame has one or more first walls arranged corresponding to the portion of the panel between the openings along a first direction to define a slot between each adjacent two of the first walls. The slot communicates with the opening. Each of the one or more first walls has an assembling part. Each of the one or more first partitions has a first engaging part and removably connected to one of the one or more first walls by engaging the first engaging part with the assembling part.
US11264740B2	Battery post terminal assembly A battery post terminal assembly includes a conductive band and a clamp mechanism. The conductive band includes a first free end and a second free end. The conductive band defines an aperture for receiving a battery post of a battery. The clamp mechanism includes a wedge member that defines a recess between a first surface and a second surface thereof. The recess has an open end and a closed end that is narrower than the open end. The first surface is convex. The first free end and the second free end are positioned in the recess. The first free end is movable along the first surface toward the closed end to be moved by the first surface toward the second free end to tighten the conductive band around the battery post.
US11264738B2	Quick connection system A conductive pin configured for a quick connection system. The conductive pin has a non-conductive head and a conducting shaft with a conductive shaft bottom contact point. Beneath the head are a plurality of conducting contact arms in a X-configuration, each arm at a right angle to the next and separate to an adjacent conducting contact arm. The conducting shaft has a partial non-conductive sheath below the head. Rotating the conducting contact arms to contact points by rotating the conductive pin completes the circuit in the quick connection system.
US11264737B2	Solder-free component carrier connection using an elastic element and method A component carrier is illustrated and described. The component carrier has i) a stack with at least one electrically conductive layer structure and/or at least one electrically insulating layer structure, and ii) at least one elastic element attached to the stack and configured to reversibly connect the component carrier with a further component carrier by elastically deforming the at least one elastic element and essentially not deforming the stack and the further component carrier.
US11264736B2	Insulation piercing connector Mechanical-type electrical connectors having insulation piercing screws used to create an electrically conductive path between a run conductor secured to the connector and a branch conductor secured to the connector are provided.
US11264734B2	Antenna and electronic device including same According to various embodiments, an electronic device may include: a housing including a side member including a conductive member and a non-conductive member coupled with the conductive member; and at least one antenna structure disposed in an internal space of the housing and including a substrate disposed to face the side member, and at least one antenna element which is disposed on the substrate such that a beam pattern is formed through the non-conductive member in a direction in which the side member faces, wherein: when the side member is viewed from the outside, a boundary region between the conductive member and the non-conductive member is disposed in a region not overlapping the substrate; in the boundary region, the conductive member includes at least one concave part formed to at least partially receive the non-conductive member; and the at least one concave part includes two or more stepped parts which gradually get higher or lower as the stepped parts are further leftward or rightward from the substrate, when the side member is viewed from the outside.
US11264732B2	Antenna module and communication apparatus An antenna module includes a dielectric substrate, multiple patch antennas provided at a first main surface side of the dielectric substrate, and an RFIC mounted at a second main surface side of the dielectric substrate. The multiple patch antennas include multiple sets of antenna groups each composed of the multiple patch antennas periodically arranged at a pitch Px in the X-axis direction, which is one of a polarization direction and a direction perpendicular to the polarization direction. The multiple sets of antenna groups are periodically arranged at a pitch Py in the Y-axis direction, which is the other of the polarization direction and the direction perpendicular to the polarization direction, and each of the multiple sets of antenna groups is arranged so as to be shifted from another antenna group adjacent in the second direction by an offset distance Dx in the first direction.
US11264731B2	Antenna array and wireless communications device An antenna array and a wireless communications device are disclosed. The antenna array includes at least two directional antennas in different directions. Each directional antenna includes an antenna element, a reflector, a feed line coupled to the antenna element, and a switch for controlling the feed line. The antenna element is a microstrip dipole antenna element. The reflector is a parasitic microstrip antenna element. A length of the reflector is greater than a length the antenna element. Two ends of the reflector are bent toward the antenna element. A distance between midpoints of reflectors of any two directional antennas is less than a distance between midpoints of antenna elements thereof. Because the reflectors of the antenna array are located on an inner side of a pattern enclosed by the antenna elements of directional antennas, a size of the antenna array is small.
US11264729B2	Wide scan phased array fed reflector systems Systems and methods are provided for wide scan phased array fed reflector systems using ring-focus optics to significantly improve the scan volume of such systems. The subject system includes a reflector having a focal plane and a parabolic curvature configured to receive electromagnetic radiation having a first gain and provide reflected electromagnetic radiation having a second gain greater than the first gain that collimates into a focal ring. The subject system includes a feed array having feed elements positioned about the focal ring, in which each feed element is configured to receive the reflected electromagnetic radiation from the reflector and collimate the reflected electromagnetic radiation into a scanned beam for scanning an annular region. In some aspects, the feed array is centered on the focal ring such that at least one feed element overlaps with the focal ring and remaining feed elements are non-overlapping with the focal ring.
US11264726B2	Lensed antennas for use in cellular and other communications systems Phased array antennas include a plurality of radiating elements and a plurality of RF lenses that are generally aligned along a first vertical axis. Each radiating element is associated with a respective one of the RF lenses, and each radiating element is tilted with respect to the first vertical axis.
US11264724B2	Omnidirectional antenna assembly An antenna includes a feed element, a ground element, and a slot therebetween. The feed element includes a feed end wall and first and second feed side walls extending from the feed end wall at first and second corners. The ground element includes a ground end wall and first and second ground side walls at first and second corners. The slot includes a first slot portion between the first feed and ground side walls, a second slot portion between the second feed and ground side walls, and a third slot portion between the feed and ground end walls. The third slot portion is continuous between the first slot portion and the second slot portion.
US11264723B2	Slot antennas Examples of slot antennas are described herein. In an example, the slot antenna includes a substrate and an antenna element disposed on the substrate to transmit and receive signals. The substrate is porous.
US11264721B2	Antenna, configuration method of antenna and wireless communication device One end of a second feeding line is connected to a first feeding line configured to transmit a first polarization at a first position and the other end is connected to a patch at a second position. One end of a third feeding line is connected to the first feeding line and the other end is connected to the patch at a third position. One end of a fourth feeding line is connected to the patch at a fourth position and configured to transmit a second polarization, wavelengths of the first and second polarizations being the same as each other. The second and third feeding lines are configured to cause the first polarization at the second position to be in opposite phase to the first polarization at the third position. A distance between the second and fourth positions is equal to a distance between the third and fourth positions.
US11264718B2	Eight-frequency band antenna An eight-frequency band antenna includes a carrier, a high-frequency segment, a low-frequency segment, a printed circuit board (PCB) and an inductor. The high-frequency segment is arranged on left side of the carrier and the low-frequency segment is arranged on right side of the carrier. The radiator on the bottom face of the carrier electrically connects with the micro strip of the PCB and the ground line of the ground metal when the carrier is fixed to the PCB. Moreover, the low-frequency segment is corresponding to a metal face with smaller area such that the low-frequency segment is at a free space to enhance the frequency response of the low-frequency segment and the bandwidth of the high-frequency segment. The area and the volume of blind hole on the carrier can adjust the effective dielectric constant to adjust the resonant frequency and bandwidth of the antenna.
US11264715B2	Self-calibrating phased-array transceiver A phased-array includes, in part, N transceivers each including a receiver and a transmitter, and a controller. The phased array is configured to transmit a first radio signal from a first element of the array during a first time period, receive the first radio signal from a second element of the array, recover a first value associated with the radio signal received by the second element, transmit a second radio signal from the second element of the array during a second time period, receive the second radio signal from the first element of the array, recover a second value associated with the radio signal received by the first element, and determine a first phase of a reference signal received by the second element from the recovered first and second values. The first phase is relative to a second phase of the reference signal received by the first element.
US11264708B2	Component carrier with integrated antenna structure An electronic assembly and a method for fabricating the same are disclosed. The assembly includes a component carrier, a wireless communication component and an antenna structure. The component carrier has at least one dielectric layer and a metallic layer. The wireless communication component is attached to the component carrier. The antenna structure is formed from a metallic material and is electrically connected with the wireless communication component. An opening formed in the component carrier extends from an upper surface into the interior of the component carrier. The antenna structure is formed at least partially at a wall of the opening.
US11264705B2	Antenna apparatus The antenna apparatus has a base station installed in a first space partitioned by a wall, a radio terminal provided in a second space, and a repeater including passive antennas and installed on the wall. The repeater is constituted of a first antenna that transmits and receives signals to and from a base station, a plurality of second antennas that transmit and receive the signals to and from the radio terminal, and a transmission line that connects the first antenna with the second antenna. Further, the plurality of second antennas are installed such that planes of polarization of the second antennas are different from each other to improve transmission with the radio terminal.
US11264702B1	Wideband phased array antenna mitigating effects of housing A wideband antenna transmits and/or receives electromagnetic radiation. The wideband antenna includes a feedline, a first dielectric layer, a via, a driven patch, a second dielectric layer, and a parasitic patch. The feedline couples a radiofrequency signal and an element of the wideband antenna. The first dielectric layer is between the feedline and the driven patch. The via couples the radiofrequency signal of the feedline through the first dielectric layer. The driven patch couples between the electromagnetic radiation and the radiofrequency signal of the via. The second dielectric layer has a low dielectric constant of less than 1.3. The parasitic patch is electrically isolated from the driven patch by the second dielectric layer between the driven patch and the parasitic patch. The parasitic patch electromagnetically couples with the driven patch and the electromagnetic radiation to produce a wideband frequency response of the wideband antenna.
US11264700B2	Electronic device with antenna An electronic device is provided that includes a housing; a printed circuit board including a first and second surfaces; an antenna module disposed on the first surface and adjacent to a side surface member, forming a first gap therewith, the antenna module being configured to radiate an antenna beam; a wireless communication circuit electrically connected with the antenna module, and configured to transmit or receive a signal having a frequency between 3 and 100 gigahertz; and a dielectric structure including a seating portion to have the antenna module mounted thereon, and configured to form the antenna beam to be radiated toward an outside of the housing.
US11264696B2	Multi-antenna mounting device and multi-antenna assembly A multi-antenna mounting device includes: a mounting member to which two or more antennas are fixable; and a tilt angle adjusting mechanism including an upper adjusting component and a lower adjusting component spaced apart along a length direction of the mounting member. The upper adjusting component includes a plurality of tilt angle adjusting holes arranged in a row, one end of the upper adjusting component is connectable to the mounting member, and the other end is connectable to a user's support pole with a fastening element extending through one of the tilt angle adjusting holes. When the fastening element extends through different tilt angle adjusting holes, the multi-antenna assembly has different mechanical tilt angles relative to the support pole. The lower adjusting component includes a first section and a second section. The second section has a predetermined length and the first section is pivotable relative to the second section.
US11264694B2	Satellite signal acquiring apparatus and method A satellite signal acquiring apparatus includes antenna, azimuth motor, elevation motor, main body, inclination sensor and processor. Antenna receives radio wave from a communication satellite. Azimuth motor rotates the antenna in azimuth angle direction. Elevation motor changes elevation angle of the antenna. Main body is equipped with the antenna, the azimuth motor, and the elevation motor. Inclination sensor obtains inclination information of the main body. Processor corrects the elevation angle based on inclination information to hold the elevation angle of the antenna in an earth coordinate system constant regardless of an azimuth angle of the antenna. Processor acquires the communication satellite signal based on reception intensity of the radio wave.
US11264693B2	Antenna mounting system Systems and methods for mounting antennas to a vehicle provide for reducing a height by which the antennas extend from a vehicle while maintaining the antennas as the furthest extending component in a vertical direction from the vehicle. The systems and methods also maintain antennas towards an interior of the vehicle, such as inward of a leading edge of the vehicle, in order to reduce risk of damage, displacement, or both of the antennas.
US11264691B2	Ground plane heater An antenna with a heater and method for using the same are disclosed. The antenna may comprise: an antenna aperture having a plurality of radio-frequency radiating antenna elements, the antenna aperture having a ground plane and a material for tuning permittivity or capacitance; and a heater structure in thermal contact with the material.
US11264689B2	Transition between a waveguide and a substrate integrated waveguide, where the transition includes a main body formed by symmetrical halves A broadband transition coupling for transition between a waveguide and a printed circuit board with a substrate integrated waveguide is disclosed. The broadband transition coupling comprises a main body that encompasses an air-filled waveguide section and a transition section. The air-filled waveguide section comprises a first interface for the waveguide. The transition section provides a second interface for the printed circuit board. The transition section continuously tapers along the second interface in order to reduce a height of the transition section for transition coupling with the printed circuit board. Further, the present disclosure relates to a broadband system for processing electromagnetic signals.
US11264688B2	Interposer and substrate incorporating same An interposer (16) and a substrate (10) incorporating the interposer (16) are provided. The interposer (16) includes one or more layers (18) and a cavity (20) defined in the one or more layers (18), the cavity (20) being configured as a waveguide for propagation of electromagnetic waves.
US11264681B2	Electrode assembly and secondary battery using the same An electrode assembly includes a first electrode plate having a first electrode active material layer and a first electrode uncoated portion, a second electrode plate having a second electrode active material layer and a second electrode uncoated portion, and a separator between the first electrode plate and the second electrode plate, and a case accommodating the electrode assembly, where a ceramic layer having a smaller thickness than the first electrode active material layer is on the first electrode uncoated portion.
US11264680B2	Electrode assembly and secondary battery Embodiments of secondary batteries having electrode assemblies are provided. A secondary battery can comprise an electrode assembly having a stacked series of layers, the stacked series of layers having an offset between electrode and counter-electrode layers in a unit cell member of the stacked series. A set of constraints can be provided with a primary constraint system with first and second primary growth constraints separated from each other in a longitudinal direction, and connected by at least one primary connecting member, and a secondary constraint system comprises first and second secondary growth constraints separated in a second direction and connected by members of the stacked series of layers. The primary constraint system may at least partially restrain growth of the electrode assembly in the longitudinal direction, and the secondary constraint system may at least partially restrain growth in the second direction that is orthogonal to the longitudinal direction.
US11264679B2	Secondary battery A secondary battery includes an electrode body that includes a positive-electrode sheet and a negative-electrode sheet, an exterior body that accommodates the electrode body, a sealing plate that seals an opening of the exterior body, a positive-electrode terminal that is secured to the sealing plate, a positive-electrode tab that is connected to the positive-electrode sheet, a first positive-electrode current collector that is connected to the positive-electrode terminal and electrically connected to the positive-electrode tab, an inner insulating member that is disposed between the sealing plate and the first positive-electrode current collector, and a cover that is composed of a resin and disposed between the first positive-electrode current collector and the electrode body. The cover includes a cover portion that faces the first positive-electrode current collector and a cover joint that extends from the cover portion toward the sealing plate. The cover joint is connected to the inner insulating member.
US11264677B2	Separator and electrochemical device Embodiments of the present application relate to an electrochemical device. Specifically, the electrochemical device includes a cathode, an anode and a separator, the separator being disposed between the cathode and the anode, the separator including a porous substrate and a porous layer, and the porous layer being disposed on a surface of the porous substrate and including inorganic particles and a binder, where a ratio of a puncture elongation of the porous substrate to a puncture force of the porous substrate is about 1.5 mm/N to about 25 mm/N. A lithium-ion battery including the separator, provided by the present application, improves the safety performance of the lithium-ion battery.
US11264676B2	Separators for electrochemical cells Provided are separators for use in an electrochemical cell comprising (a) an inorganic oxide and (b) an organic polymer, wherein the inorganic oxide comprises organic substituents. Also provided are electrochemical cells comprising such separators.
US11264672B2	Pressure relief mechanism, case, and pressure relief valve According to embodiments, a pressure relief mechanism comprises a case with an installation hole formed therein, and a pressure relief valve. The pressure relief valve comprises an insertion portion which comprising a vent path formed in an axial portion of the insertion portion and a slit formed in a peripheral wall portion of the insertion portion so as to communicate with the vent path, a pedestal portion provided at an outer end of the insertion portion, a locking portion provided at an inner end of the insertion portion and locked on an inner edge of the installation hole, and a ring-like seal member interposed between around the installation hole and the pedestal portion, the seal portion comprising an elastic member.
US11264670B2	Battery pack having expandable battery module structure Disclosed is a battery pack, which includes a plurality of unit battery modules, each unit battery module having a plurality of battery cells accommodated in an inner space thereof, the plurality of unit battery modules being structurally connected successively in one direction; and a pack case configured to cover the plurality of unit battery modules, wherein each unit battery module has two side plates forming opposite side surfaces thereof, and wherein one of the side plates of any one of the unit battery modules and one of the side plates of another one of the unit battery modules adjacent thereto are engaged with each other to form a single common wall.
US11264669B2	Battery box and battery module The present application provides a battery box and a battery module. The battery box includes two end plates and two side plates, in which the end plates and the side plates are connected end to end in sequence to enclose to form a cavity of the battery box; each of the end plates is respectively bent at different positions to form a plurality of reinforcing members and a plurality of supporting members, each of the reinforcing members is parallel to the bottom surface of the battery box, at least one supporting member is provided between any two adjacent reinforcing members; and the location where the reinforcing member is opposite to the supporting member is a connecting portion, in which a connecting member of the battery box passes through the connecting portion and is connected to a case of a battery pack.
US11264668B2	Battery module having improved cooling structure A battery module includes a cell stack defined by a stack of a plurality of battery cells; and a module housing configured to accommodate the cell stack. The module housing has a lower housing, a pair of side housings, a pair of front and rear housings, and an upper housing. The lower housing may include a base plate configured to cover a lower surface of the cell stack; a spacer interposed between the cell stack and the base plate to partially cover the lower surface of the cell stack; a supply tube connected to the spacer to supply a cooling medium through the inside of the spacer to an empty space defined between the cell stack and the base plate; and a discharge tube connected to the spacer to discharge the cooling medium from the empty space and the spacer.
US11264659B2	Rechargeable lithium-hydroxide based non-aqueous lithium oxygen batteries An electrochemical device includes an air cathode; a lithium-containing anode metal; a porous separator; and a non-aqueous electrolyte comprising a lithium salt, a sodium salt, and a solvent; wherein the electrochemical device is a lithium-air battery. A total concentration of the lithium salt and the sodium salt in the non-aqueous electrolyte may be from about 0.001 M to about 7 M.
US11264658B2	Heat exchanger with internal cold fluid distribution features for cooling multiple rows of battery cells A heat exchanger for cooling multiple rows of battery cells has a plurality of longitudinal flow sections defining at least first and second U-shaped flow areas, each underlying a row of battery cells. The flow sections includes inlet and outlet flow sections, and at least two intermediate flow sections. Inlet and outlet ports are in flow communication with the respective inlet and outlet flow sections, and a first bypass channel extends between the inlet port and at least one of the intermediate flow sections. The first bypass channel supplies relatively cold heat transfer fluid from the inlet to mix with warmer fluid in a second or subsequent U-shaped flow area, to improve temperature uniformity between the rows of battery cells. A second bypass channel may extend around the outer periphery of the heat exchanger, from the inlet flow section to a second or subsequent U-shaped flow area.
US11264655B2	Thermal management system including flapper valve to control fluid flow for thermoelectric device A system for conditioning and moving a fluid can include a thermoelectric device comprising a first side and a second side, the first side configured to heat or cool the fluid with electrical current applied to the thermoelectric device. The system can include a fluid conduit configured to allow a fluid to flow therein and to transfer the fluid into being in thermal communication with the thermoelectric device. The system can include a flow control device in fluid communication with the thermoelectric device, the flow control device configured to direct the fluid in the fluid conduit with respect to the thermoelectric device. The system can include a flapper valve configured to move relative to the thermoelectric device to at least partially block flow of the fluid through a portion of the fluid conduit.
US11264652B2	Vehicular battery charger, charging system, and method A vehicle battery charger and a vehicle battery charging system are described and illustrated, and can include a controller enabling a user to enter a time of day at which the vehicle battery charger or system begins and/or ends charging of the vehicle battery. The vehicle battery charger can be separate from the vehicle, can be at least partially integrated into the vehicle, can include a transmitter and/or a receiver capable of communication with a controller that is remote from the vehicle and vehicle charger, and can be controlled by a user or another party (e.g., a power utility) to control battery charging based upon a time of day, cost of power, or other factors.
US11264645B2	Lithium battery A lithium battery includes a cathode including a cathode active material, an anode including an anode active material, and an organic electrolytic solution between the cathode and the anode. The anode active material includes a metal-based anode active material. The organic electrolytic solution includes a first lithium salt; an organic solvent; and a bicyclic sulfate-based compound represented by Formula 1 below: wherein, in Formula 1, each of A1, A2, A3, and A4 is independently a covalent bond, a substituted or unsubstituted C1-C5 alkylene group, a carbonyl group, or a sulfinyl group, wherein both A1 and A2 are not a covalent bond and both A3 and A4 are not a covalent bond.
US11264642B2	Sulfide solid electrolyte A sulfide solid electrolyte containing lithium, phosphorus, sulfur; and one or more of elements X selected from the group consisting of halogen elements and chalcogen elements excluding sulfur, wherein the sulfide solid electrolyte includes an argyrodite-type crystal structure, and wherein a molar ratio of the lithium to the phosphorus, a (Li/P), a molar ratio of the sulfur to the phosphorus, b (S/P), and a molar ratio of the element X to the phosphorus, c (X/P), satisfy formulas (1) to (3): 5.0≤a≤7.1 (1) 1.00 and c>0 are satisfied.
US11264641B2	All-solid secondary battery, multilayered all-solid secondary battery, and method of manufacturing all-solid secondary battery An all-solid secondary battery, including: a first current collector; a pair of first active material layers disposed on opposite sides of the first current collector; a pair of solid electrolyte layers disposed on surfaces of the pair of first active material layers; a pair of second active material layers disposed on surfaces of the pair of solid electrolyte layers; and a pair of second current collectors disposed on surfaces of the pair of second active material layers, wherein a surface of one of the pair of second current collectors opposite to a surface of one of the pair of second active material layers does not comprise protrusions having a height of greater than about 8 micrometers.
US11264638B2	Increasing gravimetric capacity in batteries A sodium-ion battery includes an electrode having a crystalline active material represented by formula units that intercalate and/or deintercalate more than two charge carriers during operation of the battery. In some instances, the active material that experiences a volume change of less than 6.0%, 4.0%, or even 2.0% when the active material intercalates more than two charge carriers during operation of the battery.
US11264637B2	Battery system and production method One variation of a battery unit includes: a substrate including silicon and defining a cell, wherein the cell includes a base encompassed by a continuous wall and a set of posts extending normal to the base; an electrolyte material coating vertical surfaces of each post, in the set of posts, and vertical surfaces of the continuous wall in the cell; a cathode material filling the cell over the electrolyte material, between posts in the set of posts, and between the set of posts and the continuous wall; a seal extending along a top of the continuous wall; and a cathode current collector bonded to the seal, electrically coupled to the cathode material, and cooperating with the substrate to enclose the cell to form a single-cell battery.
US11264627B2	Fuel cell system A fuel cell system includes a first fuel cell having first unit cells stacked together, a second fuel cell having second unit cells stacked together, a first voltage detector, a second voltage detector, and a controller. The first voltage detector detects voltage of the first unit cells for every “N” unit cells on average, and the second voltage detector detects voltage of the whole second fuel cell, or detects voltage of the second unit cells for every “M” unit cells on average. The controller determines whether any of the first unit cells is in a fuel deficiency state, by referring to a detection result of the first voltage detector, and performs a cancellation process to cancel the fuel deficiency state, on the first fuel cell that is in a power generating state, while stopping power generation of the second fuel cell, when an affirmative decision is obtained.
US11264624B2	Electrocatalyst An electrocatalyst material having improved stability to corrosion compared to existing conductive high surface area carbon and metal carbide support materials is disclosed. The electrocatalyst material comprises (i) metal carbide nanotubes and (ii) a metal or metal alloy deposited on the metal carbide nanotubes. The electrocatalyst material is suitable for oxidising hydrogen, reducing oxygen or evolving hydrogen.
US11264623B2	Palladium-tin shell electrocatalysts, the preparation thereof, and using the same for fuel cells Compositions comprised of a tin film, coated by a shell of less than 50 nm thick made of palladium and tin in a molar ratio ranging from 1:4 to 3:1, respectively, are disclosed. Uses of the compositions as an electro-catalyst e.g., in a fuel cell, and particularly for the oxidation of various materials are also disclosed.
US11264611B2	Battery This application relates to a battery comprising a positive electrode plate, a separator, and a negative electrode plate, wherein the positive electrode plate comprises a positive electrode current collector and at least two layers of positive active material coated on at least one surface of the positive electrode current collector, and wherein an underlying positive active material layer in contact with the positive electrode current collector comprises a first positive active material, a first polymer material and a first conductive material; and wherein an upper positive active material layer in contact with the underlying positive active material layer and away from the positive electrode current collector comprises a second positive active material, a second polymer material and a second conductive material, and the first polymer material comprises fluorinated polyolefin and/or chlorinated polyolefin polymer material. The battery has good safety and improved electrical properties.
US11264607B2	Alkaline electrochemical cell with improved anode and separator components An alkaline electrochemical cell includes a cathode, an anode which includes an anode active material, and a non-conductive separator disposed between the cathode and the anode, wherein from about 20% to about 50% by weight of the anode active material relative to a total amount of anode active material has a particle size of less than about 75 μm, and wherein the separator includes a unitary, cylindrical configuration having an open end, a side wall, and integrally formed closed end disposed distally to the open end.
US11264603B2	Molten fluid apparatus with solid non-brittle electrolyte A battery includes a fluid negative electrode and a fluid positive electrode separated by a solid electrolyte at least when the electrodes and electrolyte are at an operating temperature. The solid electrolyte includes ions of the negative electrode material forming the fluid negative electrode and has a softness less than beta-alumina solid electrolyte (BASE) ceramics. In one example, the fluid negative electrode comprises lithium (Li), the fluid positive electrode comprises sulfur (S) and the solid electrolyte comprises lithium iodide (LiI).
US11264598B2	Battery utilizing printable lithium A battery having a cathode and a composite anode is provided. In one embodiment, the composite anode may include a lithium metal anode, a solid electrolyte and at least one interface layer. The interface layer improves the uniformity of the surface of the solid electrolyte thereby optimizing contact between the surface of the lithium metal anode and the surface of the solid electrolyte for better battery performance. The anode and/or the interface may be formed of a printable lithium composition including lithium metal powder, a polymer binder compatible with the lithium metal powder, a rheology modifier compatible with the lithium metal powder, and a solvent compatible with the lithium metal powder and with the polymer binder. The cathode may be a composite cathode. In another embodiment, the printable lithium composition may be in the form of a foil or film.
US11264597B2	Multiple QD-LED sub-pixels for high on-axis brightness and low colour shift A light emitting structure comprises a bank surrounding a sub-pixel stack on a substrate, a first filler material in an interior space above the sub-pixel stack, and a second filler material over the first filler material. The sub-pixel stack emits a first emission peak along an on-axis direction substantially normal to a top surface of the sub-pixel stack and through an interface between the first and second filler materials. The sub-pixel stack emits a second emission peak along an off-axis direction that is totally internally reflected by the interface before reaching a sloped sidewall of the bank and is then emitted along the on-axis direction. An emissive area of the sub-pixel stack is configured such that the second emission peak is reflected by the interface not more than once before reaching the sloped sidewall.
US11264595B2	Display panel and method of manufacturing the same A display panel disclosed in the embodiments of the present application includes a substrate layer, a first inorganic layer, a plurality of first organic layers, a second inorganic layer, and a plurality of second organic layers. The first inorganic layer is disposed on the substrate layer, and a plurality of first receiving structures are disposed on a side of the first inorganic layer away from the substrate layer. The first organic layers are respectively disposed in the first receiving structures. The second inorganic layer is disposed on the first inorganic layer and the first organic layers, and a plurality of second receiving structures are disposed on a side of the second inorganic layer away from the substrate layer. The second organic layers are respectively disposed in the second receiving structures.
US11264592B2	Encapsulation structure and encapsulation method of electroluminescent device, display panel An encapsulation structure of an organic electroluminescent device includes a substrate, a first inorganic sealing layer and an organic sealing layer. The first inorganic sealing layer is stacked on the substrate, and the organic sealing layer is stacked on a side of the first inorganic sealing layer that is away from the substrate. The organic sealing layer includes a UV light absorbing material and/or a UV resistant polymer material. An encapsulation method of the encapsulation structure of an organic electroluminescent device and a display panel including the encapsulation structure are further provided.
US11264591B2	Organic light emitting diode display A light emitting diode display includes: a substrate; a light emitting element on the substrate; and a capping layer on the organic light emitting element and including a plurality of refractive layers each including a low refraction layer and a high refraction layer, wherein the high refraction layer includes a first inorganic material having a refractive index which is equal to or greater than about 1.7 and equal to or less than about 6.0, wherein the low refraction layer includes a second inorganic material having a refractive index which is equal to or greater than about 1.0 and equal to or less than about 1.7, and wherein the second inorganic material comprises at least one selected from LiF, AlF3, NaF, KF, RbF, CaF2, SrF2, and YbF2.
US11264589B2	Image display device sealing material and image display device sealing sheet The image display device sealing material contains a resin component and a curing agent, wherein the resin component contains biphenyl skeleton-containing epoxy resin having a weight-average molecular weight of 200 or more and 100,000 or less, alicyclic skeleton-containing epoxy resin having a weight-average molecular weight of 180 or more and 790 or less, and styrene oligomer having a weight-average molecular weight of 750 or more and 4000 or less.
US11264587B2	Display apparatus having a larger display region and moisture impermeability A display apparatus includes a substrate having a first region and a second region surrounding the first region. An insulating part is disposed above the substrate, covering the first region and the second region, and comprising a first opening portion in the second region. A dam part is disposed above the insulating pan in the second region and surrounds a periphery of the first opening portion. A first organic insulating layer is disposed above the insulating part and covers an inner surface of the first opening portion. An organic light-emitting device is disposed above the insulating part in the first region and comprises a pixel electrode. An encapsulation layer is disposed above the insulating part in both the first region and the second region. The encapsulation layer covers the organic light-emitting device.
US11264585B2	Flexible display device with improved packaging structure and manufacturing method thereof The present disclosure provides a flexible display device and a manufacturing method thereof. The flexible display device includes a base substrate; a pixel defining layer disposed on the base substrate defining a plurality of light emitting regions; and a first electrode layer disposed on a side of the pixel defining layer away from the base substrate and in light-emitting regions. A thin film encapsulation layer covers the first electrode layer and has protrusions protruding toward the pixel defining layer at a plurality of positions.
US11264582B2	Light emitting device A light emitting device includes a first light emitting unit and a second light emitting unit. The first light emitting unit includes a first composite layer, and the first composite layer includes an organic light emitting layer. The second light emitting unit is adjacent to the first light emitting unit, the second light emitting unit includes a second composite layer, and the second composite layer includes a quantum dot light emitting layer. A thickness of the first composite layer is different from a thickness of the second composite layer.
US11264580B2	Photoelectric conversion element, Method of manufacturing the same, solid state image sensor, electronic device, and solar cell The present technology relates to, in a photoelectric conversion element using a photoelectric conversion film, the photoelectric conversion element and a method of manufacturing the same, a solid state image sensor, an electronic device, and a solar cell, for enabling improvement of quantum efficiency. The photoelectric conversion element includes two electrodes constituting an anode and a cathode, and a photoelectric conversion layer arranged between the two electrodes, and at least one electrode side of the two electrodes is doped with an impurity at impurity density of 1e16/cm3 or more in the photoelectric conversion layer. The present technology can be applied to, for example, a solid state image sensor, an electronic device, a solar cell and the like.
US11264575B2	Compounds for electronic devices The present invention relates to compounds of the formula (1), (17) 18) or (20) and to the use thereof in electronic devices, and to electronic devices which contain these compounds. The invention furthermore relates to the preparation of the compounds of the formula (1), (17) 18) or (20) and to formulations contains one or more compounds of the formula (1), (17) 18) or (20).
US11264574B2	Composition for organic optoelectronic element, organic optoelectronic element, and display device The present invention relates to a composition for an organic optoelectronic element, an organic optoelectronic element employing the composition, and a display device, wherein the composition comprises: a first compound for an organic optoelectronic element, represented by Chemical Formula 1; and a second compound for an organic optoelectronic element, comprising a combination of a moiety represented by Chemical Formula 2 and a moiety represented by Chemical Formula 3. The details of chemical formulas 1 to 3 are as defined in the specification.
US11264566B2	Magnetic element with perpendicular magnetic anisotropy (PMA) and improved coercivity field (Hc)/switching current ratio A perpendicular magnetic tunnel junction is disclosed wherein a metal insertion (MIS) layer is formed within a free layer (FL), a partially oxidized Hk enhancing layer is on the FL, and a nitride capping layer having a buffer layer/nitride layer (NL) is on the Hk enhancing layer to provide an improved coercivity (Hc)/switching current (Jc) ratio for spintronic applications. Magnetoresistive ratio is maintained above 100%, resistance×area (RA) product is below 5 ohm/μm2, and thermal stability to 400° C. is realized. The FL comprises two or more sub-layers, and the MIS layer may be formed within at least one sub-layer or between sub-layers. The buffer layer is used to prevent oxygen diffusion to the NL, and nitrogen diffusion from the NL to the FL. FL thickness is from 11 Angstroms to 25 Angstroms while MIS layer thickness is preferably from 0.5 Angstroms to 4 Angstroms.
US11264562B1	Multiferroic-assisted voltage controlled magnetic anisotropy memory device and methods of manufacturing the same A magnetic memory device includes a first electrode, a second electrode, and a layer stack located between the first electrode and the second electrode. The layer stack includes a reference layer, a tunnel barrier layer, a free layer, and a magnetoelectric multiferroic layer including at least one crystalline grain. The magnetization of the magnetoelectric multiferroic layer may be axial, canted, or in-plane. For axial or canted magnetization of the magnetoelectric multiferroic layer, a deterministic switching of the free layer may be achieved through coupling with the axial component of magnetization of the magnetoelectric multiferroic layer. Alternatively, the in-plane magnetization of the magnetoelectric multiferroic layer may be employed to induce precession of the magnetization angle of the free layer.
US11264560B2	Minimal thickness, low switching voltage magnetic free layers using an oxidation control layer and magnetic moment tuning layer for spintronic applications A perpendicular magnetic tunnel junction is disclosed wherein first and second interfaces of a free layer (FL) with a first metal oxide (Hk enhancing layer) and second metal oxide (tunnel barrier), respectively, produce perpendicular magnetic anisotropy (PMA) to provide thermal stability to 400° C. Insertion of an oxidation control layer (OCL) such as Mg and a magnetic moment tuning layer (MMTL) like Mo or W enables FL thickness to be reduced below 10 Angstroms while providing sufficient PMA for a switching voltage substantially less than 500 mV at a 10 ns pulse width and 1 ppm defect rate. Magnetoresistive ratio is ≥1, and resistance×area (RA) product is below 5 ohm-μm2. Embodiments are provided where MMTL and OCL materials interface with each other, or do not contact each other. Each of the MMTL and OCL materials may be deposited separately, or at least one is co-deposited with the FL.
US11264559B2	Multilayered magnetic free layer structure for spin-transfer torque (STT) MRAM A multilayered magnetic free layer structure is provided that includes a first magnetic free layer and a second magnetic free layer separated by a non-magnetic layer in which the second magnetic free layer is composed of a M1/M2 superlattice structure or a M1/M2 multilayer structure, wherein M1 is a first magnetic metal selected from the group consisting of cobalt (Co), iron (Fe) and alloys thereof, and M2 is a second magnetic metal selected from the group consisting of platinum (Pt), palladium (Pd), nickel (Ni), rhodium (Rh), iridium (Jr), rhenium (Re) and alloys thereof.
US11264557B2	High retention storage layer using ultra-low RA MgO process in perpendicular magnetic tunnel junctions for MRAM devices A method for manufacturing a magnetic random access memory element having increased retention and low resistance area product (RA). A MgO layer is deposited to contact a magnetic free layer of the memory element. The MgO layer is deposited in a sputter deposition chamber using a DC power and a Mg target to deposit Mg. The deposition of Mg is periodically stopped and oxygen introduced into the deposition chamber. This process is repeated a desired number of times, resulting in a multi-layer structure. The resulting MgO layer provides excellent interfacial perpendicular magnetic anisotropy to the magnetic free layer while also having a low RA.
US11264556B2	Piezoelectric sensor The present invention provides a piezoelectric sensor that has elastic properties in a surface direction thereof, and can smoothly follow stretching of a body to be measured to accurately measure movement of the body to be measured, and detect movement in a surface direction of a surface of the body to be measured on which the piezoelectric sensor is disposed. The piezoelectric sensor of the present invention includes: a piezoelectric sheet including a porous synthetic resin sheet; a signal electrode layer that is layered on a surface of the piezoelectric sheet and contains conductive fine particles and a binder resin having elastic properties; and a ground electrode layer that is layered on another surface of the piezoelectric sheet and contains conductive fine particles and a binder resin having elastic properties.
US11264553B2	Overheat detection system and insulation muff comprising an overheat detection system An overheat detection system and insulation muff comprising an overheat detection system. The overheat detection system comprises a thermometer, a thermal harvesting module comprising at least one passive radiator, the thermal harvesting module being able to generate electrical energy from the thermal difference between two elements, and a digital module, comprising a power management system, a data treatment system and a wireless transmission system, wherein the electrical energy generated by the thermal harvesting module powers the thermometer and the digital module.
US11264552B2	Light emitting device, light emitting module, method of manufacturing light emitting device, and method of manufacturing light emitting module The light emitting device includes: a light emitting element, a covering member, a pair of electrode layers, and a pair of electrode terminals. The light emitting element has an electrode-formed surface on which a pair of electrode posts are formed. The covering member covers an electrode-formed surface of the light emitting element while forming an exposed portion of each of the pair of electrode posts which is exposed from the covering member. The pair of electrode layers are provided on a surface of the covering member and electrically connected to the exposed portions of the pair of electrode posts. The pair of electrode terminals are electrically connected to the pair of electrode layers, and provided on the surface of the covering member. The pair of electrode terminals are thicker than the pair of electrode layers, and are disposed at an interval larger than an interval between the pair of electrode posts.
US11264549B2	Method for producing light emitting device, and light emitting device Provided is a method for producing a light emitting device, including the steps of providing an intermediate body including a precursor substrate including a base member that includes a top surface and a first bottom surface, a pair of first wiring portions on the top surface, and a pair of second wiring portions electrically connected with the pair of first wiring portions respectively and positioned between the top surface and the first bottom surface; and a light emitting element on the first wiring portions; removing a part of the base member off the first bottom surface of the base member to thin the base member so that a second bottom surface of the base member is formed; and forming a pair of external electrodes, to be electrically connected with the pair of second wiring portions respectively, on the second bottom surface.
US11264547B2	Light emitting device having a reflective member A light-emitting device includes a substrate, a first light-emitting chip, a first wavelength conversion member, and a barrier member. The first light-emitting chip is mounted on the substrate. The first wavelength conversion member covers the upper surface of the first light-emitting chip. A first reflective member covers the side surface of the first wavelength conversion member. Further, the barrier member includes an outer wall surrounding the side surfaces of the first light-emitting chip and the first reflective member.
US11264546B2	Metallic structure for optical semiconductor device, method for producing the same, and optical semiconductor device using the same A metallic structure for an optical semiconductor device, including a base body having disposed thereon at least in part metallic layers in the following order; a nickel or nickel alloy plated layer, a gold or gold alloy plated layer, and a silver or silver alloy plated layer, wherein the silver or silver alloy plated layer has a thickness in a range of 0.001 μm or more and 0.01 μm or less.
US11264545B2	Light bar and exterior lighting assembly for an automotive vehicle comprising the same A light emitting diode (LED) having a uniform optimal luminance pattern includes an outer cylindrical section, an inner cone shape section completely contained inside the outer section, and a top section having a plurality of micro-lenses covering the top surface of the outer cylindrical section.
US11264536B2	Nanowires or nanopyramids grown on a graphene substrate A composition of matter comprising: a graphitic substrate optionally carried on a support, a seed layer having a thickness of no more than 50 nm deposited directly on top of said substrate, opposite any support; and an oxide or nitride masking layer e directly on top of said seed layer; wherein a plurality of holes are present through said seed layer and through said masking layer to C said graphitic substrate; and wherein a plurality of nanowires or nanopyramids are grown from said substrate in said holes, said nanowres or nanopyramids comprising at least one semiconducting group III-V compound.
US11264535B1	Pixel device and display using a monolithic blue/green LED combined with red luminescence materials An LED has: a substrate formed as a substrate layer; a buffer layer formed on the substrate layer; and an N− doped layer formed on the buffer layer. A first dual color blue/green MQW active region, a negative electrode, and a second dual color blue/green MQW active region formed on the N− doped layer. A first P− doped layer is formed on the first dual color blue green MQW active region. A second P− doped layer is formed on the second dual color blue green MQW active region. A first P+ doped layer is formed on the first P− doped layer. A second P+ doped layer is formed on the second P− doped layer. A first positive electrode is formed on the first P+ doped layer. A second positive electrode is formed on the second P+ doped layer. A blue/green LED with red luminescence materials emits a full spectrum.
US11264534B2	Method for manufacturing package lid member and method for manufacturing package A method for manufacturing a package lid member includes a metalizing step of forming a metalized layer on a surface of a glass member, a paste applying step of applying an Au—Sn paste on the metalized layer in a frame shape, a reflow step of heating the glass member to which the Au—Sn paste was applied after the paste applying step and reflowing the Au—Sn paste, and a cooling step of cooling the glass member after the reflow step to form an Au—Sn layer. The cooling step includes a holding step of holding the glass member in a temperature range of 150° C. or higher and 190° C. or lower for 2 minutes or longer.
US11264532B2	Manufacturing method of semiconductor light emitting device Provided a manufacturing method of a semiconductor light emitting device including forming a plurality of light emitting cells that are separated on a first substrate, forming a first planarization layer by providing an insulating material on the plurality of light emitting cells, forming a second planarization layer by providing a photoresist on the first planarization layer to have a flat upper surface, and soft baking the photoresist, and dry etching the second planarization layer to a predetermined depth to expose a portion of the first planarization layer provided on the plurality of light emitting cells, and a portion of the second planarization layer remaining between the plurality of light emitting cells on the first planarization layer, wherein forming the second planarization layer and dry etching are repeated at least once to remove the portion of the second planarization layer provided between the plurality of light emitting cells.
US11264520B2	Method for for producing a photovoltaic device The present invention relates to a method for manufacturing a photovoltaic device comprising: —forming a porous first conducting layer on one side of a porous insulating substrate, —coating the first conducting layer with a layer of grains of a doped semiconducting material to form a structure, —performing a first heat treatment of the structure to bond the grains to the first conducting layer, —forming electrically insulating layers on surfaces of the first conducting layer, —forming a second conducting layer on an opposite side of the porous insulating substrate, —applying a charge conducting material onto the surfaces of the grains, inside pores of the first conducting layer, and inside pores of the insulating substrate, and—electrically connecting the charge conducting material to the second conducting layer.
US11264519B2	Light-receiving element and method for manufacturing element A light receiving element includes a first substrate, a photodiode formed on a main surface of the first substrate, and a second substrate constituted by a semiconductor and adhered to a rear surface side of the first substrate by an adhesive layer formed from a resin adhesive. A light receiving element according to an embodiment includes a lens that is formed on the side of an adhesion surface of the second substrate, has a convex surface, and is disposed in a light receiving region of the photodiode. The light receiving side of the photodiode is oriented toward the side of the first substrate. The lens is disposed so that the convex surface thereof is oriented toward the side of a light receiving surface of the photodiode.
US11264515B2	Resistor element A resistor element encompasses a first resistive layer, a first protection strip implemented by a tandem connection of p-n junctions, an interlayer insulating film covering the first resistive layer and the first protection strip, a first external electrode on the interlayer insulating film, being connected to a terminal of the first resistive layer and a terminal of the first protection strip, and a second external electrode on the interlayer insulating film, being connected to another terminal of the first resistive layer and another terminal of the first protection strip.
US11264512B2	Thin film transistors having U-shaped features Thin film transistors having U-shaped features are described. In an example, integrated circuit structure including a gate electrode above a substrate, the gate electrode having a trench therein. A channel material layer is over the gate electrode and in the trench, the channel material layer conformal with the trench. A first source or drain contact is coupled to the channel material layer at a first end of the channel material layer outside of the trench. A second source or drain contact is coupled to the channel material layer at a second end of the channel material layer outside of the trench.
US11264510B2	Thin film transistor and manufacturing method thereof The present disclosure provides a thin film transistor and a manufacturing method thereof. The thin film transistor includes a substrate, a light shielding layer, an intermediate buffer layer, and a buffer layer, wherein the light shielding layer is formed on the substrate, the buffer layer is located above the substrate and the light shielding layer, the intermediate buffer layer is formed between the buffer layer and the light shielding layer, and the intermediate buffer layer is made of ceramic material.
US11264509B2	Thin film transistor, array substrate, display panel and display device A thin film transistor, an array substrate, a display panel and a display device are provided, which is related to the field of display technologies. A thin film transistor comprises: a substrate; at least two active layers on the substrate, each active layer comprising a first terminal and a second terminal opposite to each other; a source and a drain above the substrate. The first terminal of each of the at least two active layers is electrically connected to the source, and the second terminal of each of the at least two active layers is electrically connected to the drain, and the at least two active layers are arranged on an upper surface of the substrate and separated from one another.
US11264505B2	FinFET device and method of forming same A method includes forming a fin over a substrate, forming a dummy gate structure over the fin, forming a first spacer over the dummy gate structure, implanting a first dopant in the fin to form a doped region of the fin adjacent the first spacer, removing the doped region of the fin to form a first recess, wherein the first recess is self-aligned to the doped region, and epitaxially growing a source/drain region in the first recess.
US11264503B2	Metal gate structures of semiconductor devices A method of fabricating a semiconductor device includes forming first and second nanostructured layers arranged in an alternating configuration on a substrate, forming first and second nanostructured channel regions in the first nanostructured layers, forming first and second gate-all-around structures wrapped around each of the first and second nanostructured channel regions. The forming the GAA structures includes depositing first and second gate barrier layers having similar material compositions and work function values on the first and second gate dielectric layers, forming first and second diffusion barrier layers on the first and second gate barrier layers, and doping the first and second gate barrier layers from a dopant source layer through the first and second diffusion barrier layers. The first diffusion barrier layer is thicker than the second diffusion barrier layer and the doped first and second gate barrier layers have work function values and doping concentrations different from each other.
US11264497B2	LDMOS device and method for manufacturing same Disclosed is an LDMOS device comprising a drift region formed by a selected area of a doped layer of a first conductivity type on a semiconductor substrate, a gate structure comprising a gate dielectric layer and a gate conductive layer which are sequentially formed on a surface of the doped layer of the first conductivity type, a doped self-aligned channel region of a second conductivity type, and a doped layer formed by tilted ion implantation with a first side face of the gate structure as a self-alignment condition. A method for manufacturing an LDMOS device is further disclosed. The channel length is not affected by lithography and thus can be minimized to fulfill an ultralow specific-on-resistance, and the distribution uniformity of the channel length can be improved, so that the performance uniformity of the device is improved.
US11264494B2	Wide-gap semiconductor device A wide gap semiconductor device has: a drift layer 12 using wide gap semiconductor material being a first conductivity type; a plurality of well regions 20 being a second conductivity type and formed in the drift layer 12; a polysilicon layer 150 provided on the well regions 20 and on the drift layer 12 between the well regions 20; an interlayer insulating film 65 provided on the polysilicon layer 150; a gate pad 120 provided on the interlayer insulating film 65; and a source pad 110 electrically connected to the polysilicon layer 150.
US11264492B2	High electron mobility transistor and method for fabricating the same A method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a buffer layer on a substrate; forming a barrier layer on the buffer layer; forming a hard mask on the barrier layer; performing an implantation process through the hard mask to form a doped region in the barrier layer and the buffer layer; removing the hard mask and the barrier layer to form a first trench; forming a gate dielectric layer on the hard mask and into the first trench; forming a gate electrode on the gate dielectric layer; and forming a source electrode and a drain electrode adjacent to two sides of the gate electrode.
US11264489B2	Negative-capacitance and ferroelectric field-effect transistor (NCFET and FE-FET) devices Negative capacitance field-effect transistor (NCFET) and ferroelectric field-effect transistor (FE-FET) devices and methods of forming are provided. The gate dielectric stack of the NCFET and FE-FET devices includes a non-ferroelectric interfacial layer formed over the semiconductor channel, and a ferroelectric gate dielectric layer formed over the interfacial layer. The ferroelectric gate dielectric layer is formed by inserting dopant-source layers in between amorphous high-k dielectric layers and then converting the alternating sequence of dielectric layers to a ferroelectric gate dielectric layer by a post-deposition anneal (PDA). The ferroelectric gate dielectric layer has adjustable ferroelectric properties that may be varied by altering the precisely-controlled locations of the dopant-source layers using ALD/PEALD techniques. Accordingly, the methods described herein enable fabrication of stable NCFET and FE-FET FinFET devices that exhibit steep subthreshold slopes.
US11264487B2	Reduction of fin loss in the formation of FinFETs A method includes forming a dummy gate stack on a top surface and a sidewall of a middle portion of a semiconductor fin, and forming a spacer layer. The spacer layer includes a first portion on a sidewall of the dummy gate stack, and a second portion on a top surface and a sidewall of a portion of the semiconductor fin. The method further includes performing an implantation on the spacer layer. After the implantation, an anneal is performed. After the anneal, the second portion of the spacer layer is etched, wherein the first portion of the spacer layer remains after the etching. A source/drain region is formed on a side of the semiconductor fin.
US11264480B2	Threshold adjustment for quantum dot array devices with metal source and drain Incorporation of metallic quantum dots (e.g., silver bromide (AgBr) films) into the source and drain regions of a MOSFET can assist in controlling the transistor performance by tuning the threshold voltage. If the silver bromide film is rich in bromine atoms, anion quantum dots are deposited, and the AgBr energy gap is altered so as to increase Vt. If the silver bromide film is rich in silver atoms, cation quantum dots are deposited, and the AgBr energy gap is altered so as to decrease Vt. Atomic layer deposition (ALD) of neutral quantum dots of different sizes also varies Vt. Use of a mass spectrometer during film deposition can assist in varying the composition of the quantum dot film. The metallic quantum dots can be incorporated into ion-doped source and drain regions. Alternatively, the metallic quantum dots can be incorporated into epitaxially doped source and drain regions.
US11264477B2	Field-effect transistors with independently-tuned threshold voltages Structures for field-effect transistors and methods of forming a structure for field-effect transistors. A semiconductor layer includes first and second channel regions, a first field-effect transistor has a first gate dielectric layer over the first channel region, and a second field-effect transistor has a second gate dielectric layer over the second channel region. The first and second channel regions are each composed of an undoped section of an intrinsic semiconductor material, the first gate dielectric layer contains a first atomic concentration of a work function metal, and the second gate dielectric layer contains a second atomic concentration of the work function metal that is greater than the first atomic concentration of the work function metal in the first gate dielectric layer.
US11264474B1	Semiconductor device with boron nitride layer and method for fabricating the same The present application discloses a semiconductor device and a method for fabricating the semiconductor device. The semiconductor device includes a substrate, a pad oxide layer positioned on the substrate, a hard mask layer positioned on the pad oxide layer, an isolation layer positioned along the hard mask layer and the pad oxide layer and extending to the substrate, a first dielectric layer positioned between the substrate and the isolation layer, and a liner layer positioned on a top surface of the hard mask layer and positioned between the first dielectric layer and the isolation layer, between the pad oxide layer and the isolation layer, and between the hard mask layer and the isolation layer. The hard mask layer and the liner layer include boron nitride.
US11264473B2	Method for manufacturing semiconductor device A method of manufacturing a split-gate type nonvolatile memory improving reliability and manufacturing yield. In a method of manufacturing a split-gate type nonvolatile memory in which a memory gate electrode is formed prior to a control gate electrode, a protective film is formed to cover the gate insulating film exposed between control gate electrodes before unnecessary control gate electrodes are removed.
US11264471B2	Junction gate field-effect transistor (JFET) having source/drain and gate isolation regions A junction gate field-effect transistor (JFET) includes a substrate, a source region formed in the substrate, a drain region formed in the substrate, a channel region formed in the substrate, and at least one gate region formed in the substrate. The channel region connects the source and drain regions. The at least one gate region contacts one of the source and drain regions at an interface, and the at least one gate region is isolated from the other of the source and drain regions. A dielectric layer covers the interface while exposing portions of the gate region and the one of the source and drain regions.
US11264469B2	Method for forming thin semiconductor-on-insulator (SOI) substrates Various embodiments of the present application are directed to a method for forming a thin semiconductor-on-insulator (SOI) substrate without implantation radiation and/or plasma damage. In some embodiments, a device layer is epitaxially formed on a sacrificial substrate and an insulator layer is formed on the device layer. The insulator layer may, for example, be formed with a net charge that is negative or neutral. The sacrificial substrate is bonded to a handle substrate, such that the device layer and the insulator layer are between the sacrificial and handle substrates. The sacrificial substrate is removed, and the device layer is cyclically thinned until the device layer has a target thickness. Each thinning cycle comprises oxidizing a portion of the device layer and removing oxide resulting from the oxidizing.
US11264467B2	Semiconductor device having multi-layer diffusion barrier and method of making the same A semiconductor device includes a metal layer, an insulating layer disposed above the metal layer, and a multi-layer diffusion barrier disposed on the metal layer between the metal layer and the insulating layer. The multi-layer diffusion barrier includes a first material layer including a metallic nitride and a second material layer including a metallic oxide.
US11264459B2	Power semiconductor device A power semiconductor device includes a semiconductor body having front and back sides. The semiconductor body includes drift, field stop and emitter adjustment regions each of a first conductivity type. The field stop region is arranged between the drift region and the backside and has dopants of the first conductivity type at a higher dopant concentration than the drift region. The emitter adjustment region is arranged between the field stop region and the backside and has dopants of the first conductivity type at a higher dopant concentration than the field stop region. The semiconductor body has a concentration of interstitial oxygen of at least 1E17 cm−3. The field stop region includes a region where the dopant concentration is higher than that in the drift region at least by a factor of three. At least 20% of the dopants of the first conductivity type in the region are oxygen-induced thermal donors.
US11264457B1	Isolation trenches augmented with a trap-rich layer Semiconductor structures with electrical isolation and methods of forming a semiconductor structure with electrical isolation. A shallow trench isolation region, which contains a dielectric material, is positioned in a semiconductor substrate. A trench extendes through the shallow trench isolation region and to a trench bottom in the semiconductor substrate beneath the shallow trench isolation region. A dielectric layer at least partially fills the trench. A polycrystalline region, which is arranged in the semiconductor substrate, includes a portion that is positioned beneath the trench bottom.
US11264453B2	Methods of doping fin structures of non-planar transistor devices Methods and structures formed thereby are described relating to the doping non-planar fin structures. An embodiment of a structure includes a substrate, wherein the substrate comprises silicon, a fin on the substrate comprising a first portion and a second portion; and a dopant species, wherein the first portion comprises a first dopant species concentration, and the second portion comprises a second dopant species concentration, wherein the first dopant species concentration is substantially less than the second dopant species concentration.
US11264451B2	Semiconductor device exhibiting soft recovery characteristics A semiconductor device includes a semiconductor layer having a first surface and a second surface, a first region of a first conductivity type formed on the first surface side of the semiconductor layer, a second region of a second conductivity type in contact with the first region, a third region of the first conductivity type that is in contact with the second region and exposed from the first surface side of the semiconductor layer, a gate electrode facing the second region through a gate insulating film, a first electrode that is physically separated from the gate electrode and faces the second region and the third region through an insulating film, a second electrode formed on the semiconductor layer and electrically connected to the first region, the second region, and the first electrode, and a third electrode electrically connected to the third region.
US11264450B2	Semiconductor device and manufacturing method The embodiments of the invention provides a semiconductor device and a method for manufacturing it The semiconductor device provided by the embodiments of the invention comprises: a first electrode layer; a substrate layer positioned on the first electrode layer; an epitaxy layer positioned on the substrate layer and comprising a first surface far from the substrate layer; a plurality of well regions disposed by extending from the first surface into the epitaxy layer and orthographic projections thereof on the first surface are spaced from each other; a second electrode layer, comprising first metal layers, each disposed between adjacent two of the well regions on the first surface and forms a Schottky contact with the epitaxy layer, wherein the Schottky contact has variable barrier height. The semiconductor device provided by the embodiments of the invention may improve the forward conduction ability without affecting the reverse blocking ability.
US11264444B2	Display apparatus including an amorphous silicon conductive layer and method of manufacturing the same A display apparatus includes a base substrate. A first data line is disposed on the base substrate. A first insulating layer is disposed on both the data line and the base substrate. An amorphous silicon conductive layer is disposed on the first insulating layer. A second insulating layer is disposed on the amorphous silicon conductive layer. A second data line is disposed on the second insulating layer.
US11264439B2	Organic light-emitting diode array substrate and method of manufacturing the same An organic light-emitting diode (OLED) array substrate and a method of manufacturing the same are disclosed. The OLED array substrate includes a substrate, a thin-film transistor layer, an insulating layer, an anode layer, and a pixel defining layer, wherein the pixel defining layer has a first slot and a second slot. A light-emitting layer is formed in the first slot, and a plurality of fillers are provided in the second slot to form a plurality of discontinuous slots in the second slot for forming a plurality of discontinuous cathode layers. When the cathodes on the surface of the pixel defining layer away from the display area are corroded, the function of the cathodes in the display area would not be affected in such a manner that the display effect of the display device would not be affected.
US11264437B2	Display devices A display device includes a substrate, a thin film transistor provided on the substrate, a first electrode connected to the thin film transistor, a second electrode overlapping the first electrode, and a partition wall and a light-emitting device layer provided between the first electrode and the second electrode. The partition wall may include a main chain and a side chain connected to the main chain, and a carbon number of the side chain may be equal to or greater than 14.
US11264436B2	Display substrate, manufacturing method therefor, display panel and display device A display substrate, a manufacturing method thereof, a display panel and a display device are provided. The display substrate includes: a base substrate, a plurality of display areas arranged in an array on the base substrate, and non-display areas between the display areas. A display structure is disposed in the display area and configured to display images. The non-display area is light-transparent and is provided with a photochromic pattern. The photochromic pattern is configured to adjust the light transmittance of the non-display area according to the illumination intensity of the received light.
US11264434B2	Display device and method of manufacturing the same A display device includes a display panel and an input sensing unit disposed on the display panel. The display panel includes a base layer, a first signal line, a light emitting element, a first encapsulation inorganic layer, and a signal pad. The first signal line overlaps a display area and a non-display area and is connected to a transistor disposed in the display area. The first encapsulation inorganic layer is disposed on a second electrode of the light emitting element and overlaps the display area and the non-display area. The signal pad is electrically connected to the first signal line and disposed in the non-display area. The signal pad is connected to the first signal line through a first contact hole defined through the first encapsulation inorganic layer.
US11264428B2	Self-aligned embedded phase change memory cell having a fin shaped bottom electrode An integrated circuit comprising a self-aligned embedded phase change memory cell is described. In an example, the integrated circuit includes a bottom electrode. A conductive line is above the bottom electrode along a first direction above a substrate. A memory element is coupled between the bottom electrode and the conductive line, the memory element comprising a phase change material layer that is self-aligned with the conductive line.
US11264427B2	Optoelectronic device with light-emitting diodes An optoelectronic circuit including a substrate and display pixels, each display pixel having a first light-emitting diode adapted to emit a first radiation and a second light-emitting diode adapted to emit a second radiation, the first light-emitting diode having a planar structure and resting on the substrate and the second light-emitting diode having a tridimensional structure and resting on the first light-emitting diode or crossing at least partially through the first light-emitting diode.
US11264426B2	Image sensor for detecting infrared multi-band, and electronic device using same The embodiments disclosed in the present document relate to an image sensor for detecting infrared multi-band light, and an electronic device using same. The image sensor according to the various embodiments of the present invention may comprise: a first filter configured to allow light in the infrared band to pass; a pixel array comprising a first pixel configured to be able to at least detect light of a first band which corresponds to part of the light in the infrared band that passed through the first filter, and a second pixel configured to be able to at least detect light of a second band which corresponds to another part of the light in the infrared band that passed through the first filter; and a second filter provided on top of the first pixel, for lowering electrical reactivity of the first pixel towards light in a band other than the first band.
US11264423B2	Solid-state imaging device having improved light-collection, method of manufacturing the same, and electronic apparatus A solid-state imaging device includes: a pixel region in which a plurality of pixels composed of a photoelectric conversion section and a pixel transistor is arranged; an on-chip color filter; an on-chip microlens; and a multilayer interconnection layer in which a plurality of layers of interconnections is formed through an interlayer insulating film. The solid-state imaging device further includes a light-shielding film formed through an insulating layer in a pixel boundary of a light receiving surface in which the photoelectric conversion section is arranged.
US11264420B2	Light detecting element and method of manufacturing same The present technology relates to a light detecting element and a method of manufacturing the same that make it possible to reduce pixel size. The light detecting element includes a plurality of pixels arranged in the form of a matrix. Each of the pixels includes a first semiconductor layer of a first conductivity type formed in an outer peripheral portion in the vicinity of a pixel boundary, and a second semiconductor layer of a second conductivity type opposite from the first conductivity type formed on the inside of the first semiconductor layer as viewed in plan. A high field region formed by the first semiconductor layer and the second semiconductor layer when a reverse bias voltage is applied is configured to be formed in a depth direction of a substrate. The present technology is, for example, applicable to a photon counter or the like.
US11264417B2	Photo detection element, optical sensor, and method of manufacturing photo detection element A photo detection element includes: a substrate; a light-receiving layer formed over the substrate, the light-receiving layer including graphene layers that are stacked such that lattices of the graphene layers are randomly displaced from each other in plan view; a first electrode that is in contact with the light-receiving layer; and a second electrode that is in contact with the light-receiving layer, a material of the second electrode differing from a material of the first electrode.
US11264415B2	Electronic device An object is to provide a pixel structure of a display device including a photosensor which prevents changes in an output of the photosensor and a decrease in imaging quality. The display device has a pixel layout structure in which a shielding wire is disposed between an FD and an imaging signal line (a PR line, a TX line, or an SE line) or between the FD and an image-display signal line in order to reduce or eliminate parasitic capacitance between the FD and a signal line for the purpose of suppressing changes in the potential of the FD. An imaging power supply line, image-display power supply line, a GND line, a common line, or the like whose potential is fixed, such as a common potential line, is used as a shielding wire.
US11264414B2	Image sensor An image sensor includes a semiconductor substrate having opposite first and second surfaces, a wiring structure on the first surface of the semiconductor substrate, and a refractive structure on the second surface of the semiconductor substrate. The refractive structure includes a first anti-reflective layer on the second surface of the semiconductor substrate, a refractive pattern on the first anti-reflective layer, an insulation layer on the first anti-reflective layer, and a second anti-reflective layer on the refractive pattern and the insulation layer. The refractive pattern includes first refractive parts spaced apart from each other in a first direction parallel to the second surface of the semiconductor substrate, and the insulation layer fills spaces between the first refractive parts.
US11264411B2	Array substrate and display device including light shielding layers An array substrate and a display device are provided in embodiments of the present disclosure. The array substrate includes a base substrate, a buffer layer, an active layer, a gate insulating layer, a gate electrode, an interlayer insulating layer, a source-drain electrode electrically conductive layer, a passivation layer, and a first light shielding layer. The first light shielding layer is disposed on a side of the passivation layer facing away from the interlayer insulating layer. An orthographic projection of the first light shielding layer on the base substrate at least partially overlaps with an orthographic projection of the active layer on the base substrate, and the first light shielding layer is formed by a photoresist material.
US11264408B2	Array substrate and organic light-emitting display including the same An array substrate includes a substrate, a barrier layer disposed on the substrate, a buffer layer disposed on the barrier layer, a first insulating layer disposed on the buffer layer, a second insulating layer disposed on the first insulating layer, a plurality of wiring patterns disposed between the first insulating layer and the second insulating layer and/or on the second insulating layer. In addition, the wiring patterns are separated from each other, and extend toward a side of the substrate. The array substrate further includes a recess pattern disposed adjacent the wiring patterns and recessed from a top surface of the second insulating layer to expose at least part of a top surface of the substrate, and an organic insulating layer disposed on the second insulating layer and exposing at least part of a portion of the top surface of the substrate which is exposed by the recess pattern.
US11264406B2	Thin-film transistor array, image display device, and method for manufacturing thin-film transistor array A thin-film transistor array including an insulating substrate, a gate insulating film sandwiched between a first structure and a second structure, the first structure including a gate electrode, a gate wire connected to the gate electrode, a capacitor electrode, and a capacitor wire connected to the capacitor electrode, and the second structure including a source electrode, a source wire connected to the source electrode, a drain electrode, and a pixel electrode connected to the drain electrode, a resistor inserted between parts of the capacitor wire, and a semiconductor layer formed between the source electrode and the drain electrode. The pixel electrode is positioned over the capacitor electrode with the gate insulating film positioned therebetween and has a storage capacitance, and the source electrode and the drain electrode are positioned over the gate electrode with the gate insulating film positioned therebetween.
US11264405B2	Semiconductor diodes employing back-side semiconductor or metal Integrated circuit (IC) strata including one or more transistor and one or more semiconductor diode. A transistor may include one or more non-planar semiconductor bodies in which there is a channel region while the diode also includes one or more non-planar semiconductor bodies in which there is a p-type region, an n-type region, or both. One IC stratum may be only hundreds of nanometers in thickness and include both front-side and back-side interconnect levels. The front-side interconnect level is disposed over a front side of one or more of the non-planar semiconductor bodies and is coupled to at least one terminal of the transistor. The back-side interconnect level is disposed over a back side of one or more of the non-planar semiconductor bodies and is coupled to at least one terminal of the semiconductor diode.
US11264404B2	Microelectronic devices including a varying tier pitch, and related electronic systems and methods A microelectronic device comprises a first set of tiers, each tier of the first set of tiers comprising alternating levels of a conductive material and an insulative material and having a first tier pitch, a second set of tiers adjacent to the first set of tiers, each tier of the second set of tiers comprising alternating levels of the conductive material and the insulative material and having a second tier pitch less than the first tier pitch, a third set of tiers adjacent to the second set of tiers, each tier of the third set of tiers comprising alternating levels of the conductive material and the insulative material and having a third tier pitch less than the second tier pitch, and a string of memory cells extending through the first set of tiers, the second set of tiers, and the third set of tiers. Related microelectronic devices, electronic systems, and methods are also described.
US11264403B2	Semiconductor memory device According to one embodiment, a semiconductor memory device includes: first and second interconnect layers; a plurality of third interconnect layers stacked between the first and second interconnect layers; a first insulating layer passing through the plurality of third interconnect layers, and including one end that is in contact with a first face of the first interconnect layer; a first memory pillar including a first semiconductor layer passing through the plurality of third interconnect layers and a charge storage layer provided between the plurality of third interconnect layers and the first semiconductor layer. A distance between a third face of the first interconnect layer opposite to the first face and the second interconnect layer in the first direction, differs at a position corresponding to the first insulating layer from at positions corresponding to the third interconnect layers.
US11264402B2	Boundary design to reduce memory array edge CMP dishing effect In some embodiments, the present disclosure relates to a method of forming an integrated chip. The method includes forming a plurality of memory devices within an embedded memory region of a substrate and forming a plurality of transistor devices within a logic region of the substrate. A first isolation structure is formed within a boundary region of the substrate disposed between the logic region and the embedded memory region. The first isolation structure is formed within a recess in the substrate. A logic wall is formed over the first isolation structure. The logic wall surrounds the embedded memory region and has a first height that is greater than heights of the plurality of memory devices.
US11264399B2	Semiconductor device and method of manufacturing the same A semiconductor device and a method of manufacturing a semiconductor device may be provided. The semiconductor device may include first and second vertical conductive patterns isolated from each other by a first slit. The semiconductor device may include at least one first half conductive pattern extending toward a first region disposed at one side of the first slit from the first vertical conductive pattern. The semiconductor device may include at least one second half conductive pattern extending toward a second region disposed at the other side of the first slit from the second vertical conductive pattern.
US11264397B2	Source structure of three-dimensional memory device and method for forming the same Embodiments of source structure of a three-dimensional (3D) memory device and method for forming the source structure of the 3D memory device are disclosed. In an example, a NAND memory device includes a substrate, an alternating conductor/dielectric stack, a NAND string, a source conductor layer, and a source contact. The alternating conductor/dielectric stack includes a plurality of conductor/dielectric pairs above the substrate. The NAND string extends vertically through the alternating conductor/dielectric stack. The source conductor layer is above the alternating conductor/dielectric stack and is in contact with an end of the NAND string. The source contact includes an end in contact with the source conductor layer. The NAND string is electrically connected to the source contact by the source conductor layer. In some embodiments, the source conductor layer includes one or more conduction regions each including one or more of a metal, a metal alloy, and a metal silicide.
US11264395B1	Vertical transistor, integrated circuitry, method of forming a vertical transistor, and method of forming integrated circuitry A method of forming a vertical transistor comprising a top source/drain region, a bottom source/drain region, a channel region vertically between the top and bottom source/drain regions, and a gate operatively laterally-adjacent the channel region comprises, in multiple time-spaced microwave annealing steps, microwave annealing at least the channel region. The multiple time-spaced microwave annealing steps reduce average concentration of elemental-form H in the channel region from what it was before start of the multiple time-spaced microwave annealing steps. The reduced average concentration of elemental-form H is 0.005 to less than 1 atomic percent. Structure embodiments are disclosed.
US11264394B2	Integrated components which have both horizontally-oriented transistors and vertically-oriented transistors Some embodiments include an integrated assembly. The integrated assembly has a first transistor with a horizontally-extending channel region between a first source/drain region and a second source/drain region; has a second transistor with a vertically-extending channel region between a third source/drain region and a fourth source/drain region; and has a capacitor between the first and second transistors. The capacitor has a first electrode, a second electrode, and an insulative material between the first and second electrodes. The first electrode is electrically connected with the first source/drain region, and the second electrode is electrically connected with the third source/drain region. A digit line is electrically connected with the second source/drain region. A conductive structure is electrically connected with the fourth source/drain region.
US11264389B2	Stack capacitor structure and method for forming the same The stack capacitor structure includes a substrate, first, second, third, and fourth support layers, first, second, and third insulating layers, first, second, and third holes, and a capacitor. The first support layer is disposed over the substrate. The first insulating layer is disposed on the first support layer. The second support layer is disposed on the first insulating layer. The third support layer is disposed on the second support layer. The second insulating layer is disposed on the third support layer. The third insulating layer is disposed on the second insulating layer. The fourth support layer is disposed on the third insulating layer. The first hole penetrates through from the second support layer to the first support layer. The second and third holes penetrate through from the fourth support layer to the third support layer. The capacitor is disposed in the first, second, and third holes.
US11264387B2	Semiconductor storage device comprising staircase portion and method for manufacturing the same A semiconductor storage device according to an embodiment includes: a stacked body in which a plurality of conductive layers are stacked via an insulating layer and which has a memory portion in which a plurality of memory cells are disposed and a staircase portion in which end portions of the plurality of conductive layers form a staircase shape. The staircase portion has three or more first sub-staircase portions ascending in a direction opposite to a direction toward the memory portion, and at least one first sub-staircase portion among the three or more first sub-staircase portions is divided into at least an upper staircase and a lower staircase by a difference in level larger than a difference in level of each stair of the first sub-staircase portion.
US11264386B2	Semiconductor device A semiconductor device may include a substrate including an active pattern extending in a first direction, a gate electrode running across the active pattern and extending in a second direction intersecting the first direction, a source/drain pattern on the active pattern and adjacent to a side of the gate electrode, an active contact in a contact hole exposing the source/drain pattern, an insulating pattern filling a remaining space of the contact hole in which the active contact is provided, a first via on the active contact, and a second via on the gate electrode. The active contact may include a first segment that fills a lower portion of the contact hole and a second segment that vertically protrudes from the first segment. The first via is connected to the second segment. The insulating pattern is adjacent in the first direction to the second via.
US11264384B2	CMOS structure and method for manufacturing CMOS structure The disclosure relates to a CMOS structure and a manufacturing method thereof. The CMOS structure includes a substrate and an N-type TFT and a P-type TFT on the substrate. The N-type TFT includes a first gate electrode, a first active layer, and a first gate dielectric layer therebetween. The first active layer includes a first semiconductor layer, a second semiconductor layer of the N-type, and a third semiconductor layer of the N-type which are located at opposite ends of the first semiconductor layer and sequentially stacked in a direction away from the first gate dielectric layer. An N-type doping concentration of the second semiconductor layer is smaller than that of the third semiconductor layer. The P-type TFT includes a fifth semiconductor layer and a sixth semiconductor layer. A P-type doping concentration of the fifth semiconductor layer is smaller than that of the sixth semiconductor layer.
US11264382B2	Fin-type field effect transistor with reduced fin bulge and method Disclosed are a method of forming a fin-type field effect transistor (FINFET) and a FINFET structure. In the method, isolation regions are formed on opposing sides of a semiconductor fin. Each isolation region is shorter than the fin, has a lower isolation portion adjacent to a lower fin portion, and has an upper isolation portion that is narrower than the lower isolation portion and separated from a bottom section of an upper fin portion by a space. Surface oxidation of the upper fin portion thins the top section, but leaves the bottom section relatively wide. During gate formation, the gate dielectric layer fills the spaces between the bottom section of the upper fin portion and the adjacent isolation regions. Thus, the gate conductor layer is formed above any fin bulge area and degradation of gate control over the channel region due to a non-uniform fin width is minimized or avoided.
US11264381B2	Integrated circuit device and method of manufacturing the same An integrated circuit device includes a fin-type active region protruding from a substrate and extending in a first direction, a plurality of semiconductor patterns disposed apart from an upper surface of the fin-type active region, the plurality of semiconductor patterns each including a channel region; a gate electrode surrounding the plurality of semiconductor patterns, extending in a second direction perpendicular to the first direction, and including a main gate electrode, which is disposed on an uppermost semiconductor pattern of the plurality of semiconductor patterns and extends in the second direction, and a sub-gate electrode disposed between the plurality of semiconductor patterns; a spacer structure disposed on both sidewalls of the main gate electrode; and a source/drain region connected to the plurality of semiconductor patterns, disposed at both sides of the gate electrode, and contacting a bottom surface of the spacer structure.
US11264379B2	Monolithic integration of enhancement mode and depletion mode field effect transistors A monolithic integration of enhancement mode (E-mode) and depletion mode (D-mode) field effect transistors (FETs) comprises a compound semiconductor substrate overlaid by an epitaxial structure overlaid by source and drain electrodes. The epitaxial structure includes from bottom to top sequentially a buffer layer, a channel layer, a Schottky barrier layer, a first etch stop layer, and a first cap layer. The respective first gate metal layers of the D-mode and E-mode FET are in contact with the first etch stop layer. The D-mode and E-mode gate-sinking regions are beneath the respective first gate metal layers of the D-mode and E-mode gate electrode at least within the first etch stop layer. The first gate metal layer material of the D-mode is the same as that of the E-mode, where the first gate metal layer thickness of the E-mode is greater than that of the D-mode.
US11264377B2	Devices including control logic structures, and related methods A semiconductor device includes a stack structure comprising decks. Each deck of the stack structure comprises a memory element level comprising memory elements and control logic level in electrical communication with the memory element level, the control logic level comprising a first subdeck structure comprising a first number of transistors comprising a P-type channel region or an N-type channel region and a second subdeck structure comprising a second number of transistors comprising the other of the P-type channel region or the N-type channel region overlying the first subdeck structure. Related semiconductor devices and methods of forming the semiconductor devices are disclosed.
US11264375B2	Semiconductor device A semiconductor device has an N-type substrate, a through conductor penetrating the N-type substrate, a protection target circuit provided on the N-type substrate, and an ESD protection circuit provided on the N-type substrate. The protection target circuit and the ESD protection circuit are connected together to the through conductor.
US11264371B2	Photosensitive imaging devices and associated methods A monolithic sensor for detecting infrared and visible light according to an example includes a semiconductor substrate and a semiconductor layer coupled to the semiconductor substrate. The semiconductor layer includes a device surface opposite the semiconductor substrate. A visible light photodiode is formed at the device surface. An infrared photodiode is also formed at the device surface and in proximity to the visible light photodiode. A textured region is coupled to the infrared photodiode and positioned to interact with electromagnetic radiation.
US11264370B2	LED package structure A light-emitting diode (LED) package structure includes a substrate, an LED, a side wall, an encapsulant, and a waterproof protective coating. The LED is disposed on the substrate, the side wall defines a through hole and is disposed on the substrate, and the LED is accommodated in the through hole. The encapsulant is filled in the through hole and covers the LED. A heterojunction is disposed between the encapsulant and the side wall, and the waterproof protective coating seals the heterojunction. Furthermore, the encapsulant includes a first fluoropolymer, the waterproof protective coating includes a second fluoropolymer, and the light transmittance of the first fluoropolymer is greater than that of the second fluoropolymer.
US11264366B2	Module Provided is a module which has a package-on-package structure including a redistribution layer and can be easily reduced in height. A module includes an upper module including a substrate, a first component, and a sealing resin layer, and a lower module including an intermediate layer and a redistribution layer. The first component is connected to the redistribution layer with a columnar conductor interposed therebetween and provided in the intermediate layer, and both the first component and a second component are rewired by the redistribution layer. By fixing a resin block containing the second component to a lower surface of the substrate by a fixing conductor, positional deviation of the second component can be prevented. Further, by polishing an upper surface of the resin block, it is possible to improve the flatness.
US11264365B2	Image display device and display An image display device includes a plurality of micro light-emission elements that constitute a pixel and that are provided on a driving circuit substrate. The micro light-emission element displays an image by emitting light to a side opposite to the driving circuit substrate. A light convergence portion that converges light is disposed in the pixel.
US11264359B2	Chip bonded to a redistribution structure with curved conductive lines An embodiment is package structure including a first integrated circuit die, a redistribution structure bonded to the first integrated circuit die, the redistribution structure including a first metallization pattern in a first dielectric layer, the first metallization pattern including a plurality of first conductive features, each of the first conductive features including a first conductive via in the first dielectric layer and first conductive line over the first dielectric layer and electrically coupled to the respective first conductive via, each of the first conductive lines comprising a curve in a plan view, a second dielectric layer over the first dielectric layer and the first metallization pattern, and a second metallization pattern in the second dielectric layer, the second metallization pattern including a plurality of second conductive via in the second dielectric layer, each of the second conductive vias being over and electrically coupled to a respective first conductive line.
US11264357B1	Mixed exposure for large die Techniques and arrangements for performing exposure operations on a wafer utilizing both a stepper apparatus and an aligner apparatus. The exposure operations are performed with respect to large composite base dies, e.g., interposers, defined within the wafer, where the interposers will become a part of microelectronic devices by coupling with active dies or microchips. The composite base dies may be coupled to the active dies via “native interconnects” utilizing direct bonding techniques. The stepper apparatus may be used to perform exposure operations on active regions of the composite base dies to provide a fine pitch for the native interconnects, while the aligner apparatus may be used to perform exposure operations on inactive regions of the composite base dies to provide a coarse pitch for interfaces with passive regions of the composite base dies.
US11264350B2	Semiconductor device with composite dielectric structure and method for forming the same A semiconductor device includes an interconnect structure disposed over a first semiconductor die. The first semiconductor die includes a semiconductor substrate and a first conductive pad disposed over the semiconductor substrate, and the first conductive pad is covered by the interconnect structure. The semiconductor device also includes dielectric spacers surrounding the interconnect structure. An interface between the dielectric spacers and the interconnect structure is curved. The semiconductor device further includes a dielectric layer surrounding the dielectric spacers, and a second semiconductor die bonded to the dielectric layer and the interconnect structure. The second semiconductor die includes a second conductive pad, and the interconnect structure is covered by the second conductive pad.
US11264348B2	Semiconductor device having an ultrasonic bonding portion provided between a substrate and a semiconductor chip A semiconductor device of embodiments includes a substrate; a semiconductor chip provided above the substrate; a first ultrasonic bonding portion provided between the substrate and the semiconductor chip; a first terminal plate electrically connected to the semiconductor chip via the first ultrasonic bonding portion, the first ultrasonic bonding portion being provided on the substrate, and the first terminal plate having a first surface facing the semiconductor chip; and a first adhesive layer provided on the first surface, and the first adhesive layer containing a first adhesive.
US11264347B2	RF devices with enhanced performance and methods of forming the same The present disclosure relates to a radio frequency (RF) device that includes a mold device die and a multilayer redistribution structure underneath the mold device die. The mold device die includes a device region with a back-end-of-line (BEOL) portion and a front-end-of-line (FEOL) portion over the BEOL portion, and a first mold compound. The FEOL portion includes an active layer formed from a strained silicon epitaxial layer, in which a lattice constant is greater than 5.461 at a temperature of 300K. The first mold compound resides over the active layer. Herein, silicon crystal does not exist between the first mold compound and the active layer. The multilayer redistribution structure includes a number of bump structures, which are at a bottom of the multilayer redistribution structure and electrically coupled to the FEOL portion of the mold device die.
US11264346B2	Sacrificial dielectric for lithographic via formation to enable via scaling in high density interconnect packaging An apparatus, comprising a substrate comprising a dielectric, a conductor, comprising a via embedded within the dielectric, the via has a first end and a second end, and substantially vertical sidewalls between the first end and the second end, and a conductive structure extending laterally from the first end of the via over the dielectric, wherein the via and the conductive structure have a contiguous microstructure.
US11264345B2	Conductive barrier direct hybrid bonding A method for forming a direct hybrid bond and a device resulting from a direct hybrid bond including a first substrate having a first set of metallic bonding pads, preferably connected to a device or circuit, capped by a conductive barrier, and having a first non-metallic region adjacent to the metallic bonding pads on the first substrate, a second substrate having a second set of metallic bonding pads capped by a second conductive barrier, aligned with the first set of metallic bonding pads, preferably connected to a device or circuit, and having a second non-metallic region adjacent to the metallic bonding pads on the second substrate, and a contact-bonded interface between the first and second set of metallic bonding pads capped by conductive barriers formed by contact bonding of the first non-metallic region to the second non-metallic region.
US11264342B2	Package on package structure and method for forming the same Some embodiments relate to a semiconductor device package, which includes a substrate with a contact pad. A non-solder ball is coupled to the contact pad at a contact pad interface surface. A layer of solder is disposed over an outer surface of the non-solder ball, and has an inner surface and an outer surface which are generally concentric with the outer surface of the non-solder ball. An intermediate layer separates the non-solder ball and the layer of solder. The intermediate layer is distinct in composition from both the non-solder ball and the layer of solder. Sidewalls of the layer of solder are curved or sphere-like and terminate at a planar surface, which is disposed at a maximum height of the layer of solder as measured from the contact pad interface surface.
US11264341B2	Microwave integrated circuit Provided is a microwave integrated circuit including: a semiconductor substrate; a plurality of amplification units that are formed in the semiconductor substrate; a wiring that is formed in one layer wiring excluding an uppermost layer wiring and a lowermost layer wiring among a plurality of layer wirings formed on the semiconductor substrate and is used for supplying power to the plurality of amplification units; and a plurality of vias that connect a plurality of conductive regions formed in the layer wiring with the wiring interposed therebetween and other conductive regions formed in a region interposing the wiring in the two layer wirings immediately above and immediately below the layer wiring, in which each of the plurality of vias forms a via structure connected to the conductive regions of the lowermost layer wiring by a plurality of other vias.
US11264338B2	Integrated circuit package with through void guard trace Apparatuses, systems and methods associated with over void signal trace design are disclosed herein. In embodiments, an integrated circuit (IC) package may include a first layer that has a void and a guard trace, wherein a first portion of the void is located on a first side of the guard trace and a second portion of the void is located on a second side of the guard trace. The IC package may further include a second layer located adjacent to the first layer, wherein the second layer has a signal trace that extends along the guard trace. Other embodiments may be described and/or claimed.
US11264337B2	Semiconductor package structure A semiconductor package structure is provided. The semiconductor package structure includes a substrate, a semiconductor die and a frame. The semiconductor die is disposed over the substrate. The frame is disposed over the substrate, wherein the frame is adjacent to the semiconductor die, and the upper surface of the frame is lower than the upper surface of the semiconductor die.
US11264333B2	Reconstituted substrate structure and fabrication methods for heterogeneous packaging integration The present disclosure relates to thin-form-factor reconstituted substrates and methods for forming the same. The reconstituted substrates described herein may be utilized to fabricate homogeneous or heterogeneous high-density 3D integrated devices. In one embodiment, a silicon substrate is structured by direct laser patterning to include one or more cavities and one or more vias. One or more semiconductor dies of the same or different types may be placed within the cavities and thereafter embedded in the substrate upon formation of an insulating layer thereon. One or more conductive interconnections are formed in the vias and may have contact points redistributed to desired surfaces of the reconstituted substrate. The reconstituted substrate may thereafter be integrated into a stacked 3D device.
US11264331B2	Package structure and fabrication methods The present disclosure relates to methods and apparatus for forming a thin-form-factor semiconductor package. In one embodiment, a glass or silicon substrate is structured by micro-blasting or laser ablation to form structures for formation of interconnections therethrough. The substrate is thereafter utilized as a frame for forming a semiconductor package with embedded dies therein.
US11264315B2	Electronic package with passive component between substrates An electronic package with passive components located between a first substrate and a second substrate. The electronic package can include a first substrate including a device interface for communication with an electronic device. An interposer can be electrically coupled to the first substrate. A second substrate can be offset from the first substrate at a distance. The second substrate can be electrically coupled to the first substrate through the interposer. A passive component can be attached to one of the first substrate or the second substrate. The passive component can be located between the first substrate and the second substrate. A height of the passive component can be is less than the distance between the first substrate and the second substrate. The second substrate can include a die interface configured for communication with a die. The die interface can be communicatively coupled to the passive component.
US11264308B2	RF devices with enhanced performance and methods of forming the same The present disclosure relates to a radio frequency device that includes a transfer device die and a multilayer redistribution structure underneath the transfer device die. The transfer device die includes a device region with a back-end-of-line (BEOL) portion and a front-end-of-line (FEOL) portion over the BEOL portion and a transfer substrate. The FEOL portion includes isolation sections and an active layer surrounded by the isolation sections. A top surface of the device region is planarized. The transfer substrate resides over the top surface of the device region. Herein, silicon crystal does not exist within the transfer substrate or between the transfer substrate and the active layer. The multilayer redistribution structure includes a number of bump structures, which are at a bottom of the multilayer redistribution structure and electrically coupled to the FEOL portion of the transfer device die.
US11264304B2	Semiconductor structure and associated method for manufacturing the same A method for manufacturing a semiconductor structure is disclosed. The method includes: providing a semiconductor substrate having a plurality of dies thereon; dispensing an underfill material and a molding compound to fill spaces beneath and between the dies; disposing a temporary carrier over the dies; thinning a thickness of the semiconductor substrate; performing back side metallization upon the thinned semiconductor substrate; removing the temporary carrier; and attaching a plate over the dies. An associated semiconductor structure is also disclosed.
US11264303B2	Power semiconductor device and method of manufacturing the same A power semiconductor device includes a frame, a semiconductor element, a substrate, and a sealing resin. The semiconductor element is disposed on the frame. The substrate is disposed on a side of the frame opposite to a side on which the semiconductor element is disposed. The sealing resin seals the semiconductor element and the substrate. The substrate includes a metal sheet, a first insulating sheet on one main surface side of the metal sheet, and a second insulating sheet on the other main surface side of the metal sheet. The metal sheet has flexibility at a normal temperature.
US11264301B2	System and method to enhance reliability in connection with arrangements including circuits A reliability cover that is disposed over at least one of an integrated circuit package and a Si die of the integrated circuit package is disclosed. The integrated circuit package is mountable to a printed circuit board via a plurality of solder balls. The reliability cover is configured to reduce a difference in a coefficient of thermal expansion between the integrated circuit package and the printed circuit board, and between the Si die and a substrate of the integrated circuit package by a threshold value.
US11264300B2	Package structure with lid and method for forming the same A package structure and method for forming the same are provided. The package structure includes a semiconductor die formed over a first side of an interconnect structure, and the semiconductor die has a first height. The package structure also includes a first stacked die package structure formed over the first side of the interconnect structure, and the first stacked die package structure has a second height. The second height is greater than the first height. The package structure includes a lid structure formed over the semiconductor die and the first stacked die package structure. The lid includes a main portion and a protruding portion extending from the main portion, and the protruding portion is directly over the semiconductor die.
US11264297B2	Display panel with thin ink film between substrate and protecting film Disclosed are a display panel and a display device, and the display panel includes a substrate, a thin ink film, and a protecting film stacked over each other, where an orthographical projection of the thin ink film onto the substrate covers an orthographical projection of the protecting film onto the substrate, an edge of the thin ink film is coated sealing glue.
US11264294B2	Integrated circuit devices and manufacturing methods for the same A method of manufacturing an integrated circuit device, the method including forming a plurality of target patterns on a substrate such that an opening is defined between two adjacent target patterns; forming a pyrolysis material layer on the substrate such that the pyrolysis material layer partially fills the opening and exposes an upper surface and a portion of a sidewall of the two adjacent target patterns; and forming a material layer on the exposed upper surface and the exposed portion of the sidewall of the two adjacent target patterns, wherein, during the forming of the material layer, the material layer does not remain on a resulting surface of the pyrolysis material layer.
US11264293B2	Wiring board, electronic device package, and electronic device A wiring board includes an insulating substrate and a wiring conductor. The insulating substrate includes a first layer having an upper surface and a lower surface and having a first content of aluminum oxide and containing mullite and a second layer stacked on the upper surface and/or the lower surface of the first layer and having a second content of aluminum oxide greater than the first content. The wiring conductor is located inside the first layer and contains a manganese compound and/or a molybdenum compound. A manganese silicate phase and/or a magnesium silicate phase in an interface area between the insulating substrate and the wiring conductor.
US11264286B2	Co-integration of tensile silicon and compressive silicon germanium Integrated circuits are disclosed in which the strain properties of adjacent pFETs and nFETs are independently adjustable. The pFETs include compressive-strained SiGe on a silicon substrate, while the nFETs include tensile-strained silicon on a strain-relaxed SiGe substrate. Adjacent n-type and p-type FinFETs are separated by electrically insulating regions formed by a damascene process. During formation of the insulating regions, the SiGe substrate supporting the n-type devices is permitted to relax elastically, thereby limiting defect formation in the crystal lattice of the SiGe substrate.
US11264285B2	Method for forming film stacks with multiple planes of transistors having different transistor architectures Three-dimensional integration can overcome scaling limitations by increasing transistor density in volume rather than area. To provided gate-all-around field-effect-transistor devices with different threshold voltages and doping types on the same substrate, methods are provided for growing adjacent nanosheet stacks having channels with different doping profiles. In one example, a first nanosheet stack is formed having channels with first doping characteristics. Then the first nanosheet stack is etched, and a second nanosheet stack is formed in plane with the first nanosheet stack. The second nanosheet stack has channels with different doping characteristics. This process can be repeated for additional nanosheet stacks. In another example, the formation of the nanosheet stacks with channels having different doping characteristics is performed by restricting layer formation to predefined locations using a patterned layer (e.g., a conformal oxide layer) that limits epitaxial growth to exposed regions of the substrate where the patterned layer is etched away.
US11264283B2	Multi-channel devices and methods of manufacture The disclosure is directed towards semiconductor devices and methods of manufacturing the semiconductor devices. The methods include forming fins in a device region and forming other fins in a multilayer stack of semiconductor materials in a multi-channel device region. A topmost nanostructure may be exposed in the multi-channel device region by removing a sacrificial layer from the top of the multilayer stack. Once removed, a stack of nanostructures are formed from the multilayer stack. A native oxide layer is formed to a first thickness over the topmost nanostructure and to a second thickness over the remaining nanostructures of the stack, the first thickness being greater than the second thickness. A gate dielectric is formed over the fins in the device region. A gate electrode is formed over the gate dielectric in the device region and surrounding the native oxide layer in the multi-channel device region.
US11264281B2	Semiconductor device with reduced loading effect The present disclosure relates to a method for forming a semiconductor structure includes depositing a dielectric layer on a substrate and depositing a patterning layer on the dielectric layer. The method also includes performing a first etching process on the patterning layer to form a first region including a first plurality of blocks at a first pattern density and a second region including a second plurality of blocks at a second pattern density that is lower than the first pattern density. The method also includes performing a second etching process on the second plurality of blocks to decrease a width of each block of the second plurality of blocks and etching the dielectric layer and the substrate using the first and second pluralities of blocks to form a plurality of fin structures.
US11264276B2	Interconnect integration scheme with fully self-aligned vias A method is presented for forming self-aligned vias by employing a top level line pattern. The method includes forming first conductive lines within a first dielectric material, recessing one conductive line of the conductive lines to define a first opening, filling the first opening with a second dielectric material, and forming a sacrificial block perpendicular to and in direct contact with a non-recessed first conductive line. The method further includes forming a single via directly underneath the sacrificial block by recessing the non-recessed first conductive line, removing the sacrificial block to define a second opening, and filling the second opening with a conductive material to define a second conductive line such that the single via aligns to both the non-recessed first conductive line and the second conductive line.
US11264272B2	Semiconductor device and method for manufacturing the same, and electronic apparatus The present technology relates to Provided are a semiconductor device in which an air gap structure can be formed in any desired region regardless of the layout of metallic wiring lines, a method for manufacturing the semiconductor device, and an electronic apparatus. A first wiring layer and a second wiring layer including a metallic film are stacked via a diffusion preventing film that prevents diffusion of the metallic film. The diffusion preventing film is formed by burying a second film in a large number of holes formed in a first film. At least the first wiring layer includes the metallic film, an air gap, and a protective film formed with the second film on the inner peripheral surface of the air gap, and the opening width of the air gap is equal to the opening width of the holes formed in the first film or is greater than the opening width of the holes.
US11264268B2	FinFET circuit devices with well isolation A method includes receiving a structure that includes a substrate including a first well region having a first dopant type and a second well region having a second dopant type that is opposite to the first dopant type; and fins extending above the substrate. The method further includes forming a patterned etch mask on the structure, wherein the patterned etch mask provides an opening that is directly above a first fin of the fins, wherein the first fin is directly above the first well region. The method further includes etching the structure through the patterned etch mask, wherein the etching removes the first fin and forms a recess in the substrate that spans from the first well region into the second well region; and forming a dielectric material between remaining portions of the fins and within the recess.
US11264266B2	Substrate processing method A substrate processing method is implemented in a substrate processing apparatus including a processing chamber, a turntable on which a substrate is placed inside the processing chamber, and first and second gas supplies that supply first and second gases, respectively. The substrate processing method deposits a film, generated by a reaction between the first gas and the second gas, on the substrate in a first state where the substrate rotates and the turntable undergoes a clockwise orbital rotation around a rotating shaft so that the substrate passes through a region supplied with the first gas and thereafter passes through a region supplied with the second gas, and deposits the film on the substrate in a second state where the substrate rotates and the turntable undergoes a counterclockwise orbital rotation.
US11264262B2	Wafer debonding and cleaning apparatus The present disclosure, in some embodiments, relates to a debonding and cleaning apparatus. The apparatus has a debonding module configured to separate semiconductor substrates from carrier substrates. A first cleaning module is configured to clean surfaces of a first plurality of the semiconductor substrates and a second cleaning module is configured to clean surfaces of a second plurality of the semiconductor substrates. The apparatus also has a first substrate handling module including a first robotic arm in communication with the debonding module and a second substrate handling module including a second robotic arm that is located between the first cleaning module and the second cleaning module. The second substrate handling module is configured to transfer the first plurality of the semiconductor substrates to first cleaning module and to transfer the second plurality of the semiconductor substrates to the second cleaning module.
US11264253B2	Substrate processing apparatus, method of manufacturing semiconductor device, and recording medium There is provided a technique includes: a process chamber in which a substrate is processed; a plurality of microwave supply sources configured to supply predetermined microwaves for heating the substrate in the process chamber; and a controller configured to control the microwave supply sources such that while keeping constant a sum of outputs of the microwaves respectively supplied to the substrate from the plurality of microwave supply sources, at least one of the plurality of microwave supply sources is turned off, and periods in which the at least one of the plurality of microwave supply sources is turned off are different from each other.
US11264252B2	Chamber lid with integrated heater Implementations described herein provide a chamber lid assembly. In one embodiment, a chamber lid assembly includes a heater embedded in a dielectric body forming a boundary of a processing chamber, wherein the heater has one or more heating zones that are independently controlled.
US11264251B2	Method of manufacturing power amplifier package embedded with input-output circuit A method of manufacturing a power amplifier package embedded with an input-output circuit including a dielectric circuit board, a heat sink and lead frames, the method comprising: the step of preparing the dielectric circuit board including the steps of forming a power amplifier hole in which a power amplifier chip is to be disposed on a dielectric substrate, printing an input matching network metal pattern on a left side of the power amplifier hole, and printing an output matching network metal pattern on a right side of the power amplifier hole, and sintering the input matching network metal pattern and the output matching network metal pattern printed on the dielectric substrate; the step of preparing the lead frames by etching alloy 42 and plating nickel; and the step of attaching the heat sink on a bottom surface of the dielectric circuit board.
US11264250B2	Use of a chemical mechanical polishing (CMP) composition for polishing of cobalt and / or cobalt alloy comprising substrates Use of a chemical mechanical polishing (CMP) composition (Q) for chemical mechanical polishing of a substrate (S) comprising (i) cobalt and/or (ii) a cobalt alloy, wherein the CMP composition (Q) comprises (A) Inorganic particles (B) an anionic surfactant of the general formula (I) R-S wherein R is C5-C20-alkyl, C5-C20-alkenyl, C5-C20-alkylacyl or C5-C20-alkenylacyl and S is a sulfonic acid derivative, an amino acid derivative or a phosphoric acid derivative or salts or mixtures thereof (C) at least one amino acid, (D) at least one oxidizer (E) an aqueous medium and wherein the CMP composition (Q) has a pH of from 7 to 10.
US11264246B2	Plasma etching method for selectively etching silicon oxide with respect to silicon nitride An etching method is provided for selectively etching a first region of silicon oxide with respect to a second region of silicon nitride by performing plasma processing on a target object including the first region and the second region. In the etch method, first, a plasma of a processing gas including a fluorocarbon gas is generated in a processing chamber where the target object is accommodated. Next, the plasma of the processing gas including the fluorocarbon gas is further generated in the processing chamber where the target object is accommodated. Next, the first region is etched by radicals of fluorocarbon contained in a deposit which is formed on the target object by the generation and the further generation of the plasma of the processing gas containing the fluorocarbon gas. A high frequency powers used for the plasma generation is smaller than a high frequency power used for plasma further generation.
US11264244B2	Method of manufacturing semiconductor device After a MISFET is formed on a substrate including a semiconductor substrate, an insulating layer and a semiconductor layer, an interlayer insulating film and a first insulating film are formed on the substrate. Also, after an opening is formed in each of the first insulating film and the interlayer insulating film, a second insulating film is formed at each of a bottom portion of the opening and a side surface of the opening and also formed on an upper surface of the first insulating film. Further, each of the second insulating film formed at the bottom portion of the opening and the second insulating film formed on the upper surface of the first insulating film is removed by etching. After that, an inside of the opening is etched under a condition that each of the first insulating film and the second insulating film is less etched than the insulating layer.
US11264242B2	Method and apparatus for determining expansion compensation in photoetching process, and method for manufacturing device A method and an apparatus for determining expansion compensation in a photoetching process, and a method for manufacturing a semiconductor device are provided. A relative vector misalignment value of a first wafer and a second wafer after being bonded is obtained based on a relative position relationship between a first alignment pattern of the first wafer and a second alignment pattern of the second wafer in a boding structure. A relative expansion value of the first wafer and the second wafer is obtained based on the relative vector misalignment value. A developing expansion compensation value in the photoetching process is obtained. The expansion compensation value is used to the photoetching process of a first conductor layer including the first alignment pattern of the first wafer and/or a second conductor layer including the second alignment pattern of the second wafer.
US11264237B2	Method of epitaxy and semiconductor device A transistor is provided including a source-drain region, the source-drain region including a first layer wherein a first average silicon content is between about 80% and 100%, a second layer wherein a second average silicon content is between zero and about 90%, the second average silicon content being smaller than the first average silicon content by at least 7%, and the second layer disposed on and adjacent the first layer, a third layer wherein a third average silicon content is between about 80% and 100%, and a fourth layer wherein a fourth average silicon content is between zero and about 90%, the fourth average silicon content being smaller than the third average silicon content by at least 7%, and the fourth layer disposed on and adjacent the third layer.
US11264236B2	Substrate processing method A substrate processing method includes: providing a substrate having a pattern formed on a surface layer thereof; setting a temperature of the substrate such that a change in the pattern becomes a predetermined change amount; forming a reaction layer having a thickness corresponding to the temperature set in the setting on the surface layer of the substrate; and applying energy to the substrate formed with the reaction layer thereby removing the reaction layer from the surface layer of the substrate.
US11264234B2	Conformal deposition of silicon carbide films Disclosed are methods and systems for providing silicon carbide films. A layer of silicon carbide can be provided under process conditions that employ one or more silicon-containing precursors that have one or more silicon-hydrogen bonds and/or silicon-silicon bonds. The silicon-containing precursors may also have one or more silicon-oxygen bonds and/or silicon-carbon bonds. One or more radical species in a substantially low energy state can react with the silicon-containing precursors to form the silicon carbide film. The one or more radical species can be formed in a remote plasma source.
US11264229B1	Time-of-flight mass spectrometer and method for improving mass and spatial resolution of an image Disclosed embodiments include a time-of-flight mass spectrometer with a straight ion optical axis comprising: an ion gate is electrically insolated electrode on which applied voltages to reject/pass ions through ion gate, entrance module and exit module set in focus/mirror modes, and create ion optical image on image plane located in field view aperture, electrostatic object lens, entrance module in focus mode and, transport electrostatic lens, exit module in focus mode and projection lens focused and map ions from image plane of field view aperture to image plane of ion detector, projection lens configured to form ion optical image of sample holder on image plane of ion detector and ion optical components with corrected geometrical, chromatic and timed aberrations configured to compensate time arriving disturbance in image plane of ion detector and improve mass and spatial resolution of image on image plane of ion detector.
US11264225B2	Ion flow guide devices and methods Certain configurations of devices are described herein that include DC multipoles that are effective to direct ions. In some instances, the devices include a first multipole configured to provide a DC electric field effective to direct first ions of an entering particle beam along a first exit trajectory that is substantially orthogonal to an entry trajectory of the particle beam. The devices may also include a second multipole configured to provide a DC electric field effective to direct the received first ions from the first multipole along a second exit trajectory that is substantially orthogonal to the first exit trajectory.
US11264217B2	Substrate processing apparatus There is provided a technique that include: a process chamber including a plasma generation space and a process space; a coil electrode arranged around the plasma generation space; a substrate mounting table on which a substrate to be processed in the process space is mounted; an elevator configured to move the substrate mounting table in the process chamber; and a controller configured to control the elevator to vary a distance between the substrate and an end portion of the coil electrode according to process distribution information on the substrate.
US11264216B2	Modifiable magnet configuration for arc vaporization sources The present invention relates to an arc vaporization source for generating hard surface coatings on tools. The invention comprises an arc-vaporization source, comprising at least one electric solenoid and a permanent magnet arrangement that is displaceable relative to the target surface. The vaporization source can be adjusted to the different requirements of oxide, nitride, or metal coatings. The rate drop during the lifespan of a target to be vaporized can be held constant or adjusted by suitably adjusting the distance of the permanent magnets to the front side of the target. A compromise between the coating roughness and rate can be set.
US11264215B2	Semiconductor manufacturing apparatus A semiconductor manufacturing apparatus includes: a stage configured to support a semiconductor substrate; and a conductive annular member provided at an outer circumferential portion of the stage and configured to enclose the semiconductor substrate when supported on the stage. The stage has a groove that is provided below a lower portion of an inner circumferential end of the annular member.
US11264213B2	Chemical control features in wafer process equipment Gas distribution assemblies are described including an annular body, an upper plate, and a lower plate. The upper plate may define a first plurality of apertures, and the lower plate may define a second and third plurality of apertures. The upper and lower plates may be coupled with one another and the annular body such that the first and second apertures produce channels through the gas distribution assemblies, and a volume is defined between the upper and lower plates.
US11264207B2	Apparatuses and methods for avoiding electrical breakdown from RF terminal to adjacent non-RF terminal An isolation system includes an input junction coupled to one or more RF power supplies via a match network for receiving radio frequency (RF) power. The isolation system further includes a plurality of channel paths connected to the input junction for distributing the RF power among the channel paths. The isolation system includes an output junction connected between each of the channel paths and to an electrode of a plasma chamber for receiving portions of the distributed RF power to output combined power and providing the combined RF power to the electrode. Each of the channel paths includes bottom and top capacitors for blocking a signal of the different type than that of the RF power. The isolation system avoids a risk of electrical arcing created by a voltage difference between an RF terminal and a non-RF terminal when the terminals are placed proximate to each other.
US11264205B2	Techniques for determining and correcting for expected dose variation during implantation of photoresist-coated substrates A method, including using an implant recipe to perform an implant by scanning an ion beam along a first axis over a substrate, coated with a photoresist layer, while the substrate is scanned along a perpendicular axis; measuring an implant current (I) during the implant, using a first detector, positioned to a side of a substrate position; determining a value of a difference ratio (I−B)/(B), based upon the implant current, where B is current measured by the first detector, during a calibration at base pressure; determining a plurality of values of a current ratio (CR) for the plurality of instances, based upon the difference ratio, the current ratio being a ratio of the implant current to a current measured by a second detector, positioned over the substrate position, during the calibration; and adjusting scanning the ion beam, scanning of the substrate, or a combination thereof, based upon the current ratio.
US11264201B2	Charged particle beam device A charged particle beam device includes: a charged particle beam source configured to generate a charged particle beam with which a sample is irradiated; a charged particle detection unit configured to detect a charged particle generated when the sample is irradiated with the charged particle beam; an intensity data generation unit configured to generate intensity data of the charged particle detected by the charged particle detection unit; a pulse-height value data generation unit configured to generate pulse-height value data of the charged particle detected by the charged particle detection unit; and an output unit configured to output a first image of the sample based on the intensity data and a second image of the sample based on the pulse-height value data.
US11264200B1	Lamella alignment based on a reconstructed volume Apparatuses and methods for aligning lamella to charged particle beams based on a volume reconstruction are disclosed herein. An example method at least includes forming a reconstructed volume of a portion of a sample, the sample including a plurality of structures, and the reconstructed volume including a portion of the plurality of structures, performing, over a range of angles, a mathematical transform on each plane of a plurality of planes of the reconstructed volume, and based on the mathematical transform on each plane of the plurality of planes, determining a target orientation of the sample within the range of angles, wherein the target orientation aligns the plurality of structures parallel to an optical axis of a charged particle beam.
US11264198B2	Objective lens arrangement An objective lens arrangement that may include a magnetic lens and an electrostatic lens. The magnetic lens may include one or more coils, an upper polepiece and a lower polepiece. The electrostatic lens may include an upper electrode, an internal lower electrode and an external lower electrode. A majority of the internal lower electrode may be surrounded by a majority of the external lower electrode. The upper electrode, the internal lower electrode, and the external lower electrode are arranged in a coaxial relationship along an optical axis of the objective lens arrangement. An area of a bottom aperture of the external lower electrode may not exceed an area of a bottom aperture of the internal lower electrode.
US11264195B2	Relay The relay according to an embodiment of the disclosure includes a main body configured to open and close a circuit by an input signal, and a plurality of terminals extending from the main body and coupled to a PCB, wherein each of the plurality of terminals comprises an inclined extension portion configured to allow the main body to be spaced apart from the PCB and maintain an inclined state with respect to a surface of the PCB and a lower surface of the main body, and a coupling portion extending from the inclined extension portion in a direction to enter a coupling slot of the PCB.
US11264194B2	Temperature-dependent switch A temperature-dependent switch comprises first and second stationary contacts and a temperature-dependent switching mechanism having a movable contact member and a temperature-dependent snap-action part, which transitions between geometric low- and high-temperature configurations based on a temperature of the switch. Switching the snap-action part from its geometric low- to high-temperature configuration moves the switching mechanism from a first to a second switching position and thereby opens the switch. A closing lock prevents the switch once having opened from closing again by keeping it in its second switching position. The closing lock comprises a fusible medium which melts when a melting temperature of the medium is exceeded, contacts, in a molten state, a part of the switching mechanism when it is in its second switching position, and solidifies again and thereby locks it in its second switching position when the temperature of the switch falls below the melting temperature of the medium again.
US11264193B2	Two wire pressure indicating switch with all electronic architecture with millivolt operating supply Systems, devices, and methods for a two wire detection circuit powered system comprising: an electronic switch circuit configured to sense a pressure level above or below a predetermined value and indicate an open or closed switch condition, wherein the electronic switch circuit provides a contact resistance voltage of about 20 mV in the closed switch condition; and an energy harvester configured to convert 20 mV when the electronic switch circuit is in the closed switch condition to an operating voltage between 3.6 Volts and 5 Volts for the electronic switch circuit to operate without an additional power source.
US11264188B2	Operator for an electrical switching apparatus An operator for an electrical switching apparatus includes an actuator configured to be grasped by a user. A linkage is attached to the actuator at a first end of the linkage and configured for extending through an enclosure housing the electrical switching apparatus. An engagement assembly is attached to the linkage at a second end of the linkage such that when the operator is mounted to the enclosure movement of the actuator outside of the enclosure causes movement of the engagement assembly inside the enclosure. The engagement assembly includes an extension arm attached to the linkage and an attachment member attached to the extension arm. The attachment member is configured to engage a toggle of the electrical switching apparatus in the enclosure to move the toggle between at least two positions.
US11264187B2	Control device configured to provide visual feedback A control device configured for use in a load control system to control an external electrical load may provide simple feedback regarding the operation of the control device. For example, the control device may comprise a base portion configured to be mounted to an electrical wallbox or over a mechanical switch, and a control unit connected to the base portion. The control unit may comprise a rotation portion rotatable with respect to the base portion, an actuation portion, and a light source. The control unit may be configured to control the light source to illuminate at least an illuminated portion of the actuation portion in response to actuations of the rotation portion and the actuation portion. In addition, the control unit may provide a limit indication on the illuminated portion by blinking the illuminated portion when the electrical load has reached a limit.
US11264184B2	Remote load control device capable of orientation detection A remote control device is provided that is configured for use in a load control system that includes one or more electrical loads. The remote control device includes a mounting structure and a control unit, and the control unit is configured to be attached to the mounting structure in a plurality of different orientations. The control unit includes a user interface, an orientation sensing circuit, and a communication circuit. The control unit is configured to determine an orientation of the control unit via the orientation sensing circuit. The control unit is also configured to translate a user input from the user interface into control data to control an electrical load of the load control system based on the orientation of the control unit and/or provide a visual indication of an amount of power delivered to the electrical load based on the orientation of the control unit.
US11264183B2	Spring loaded auxiliary contact system for bus transfer switching in a center break switch The invention relates to a center break switch having a contact system for electrical current conduction and bus transfer switching. The contact system includes two moving contacts. One of the two moving contacts includes a finger contact and the other moving contact includes a first contact. Each moving contact includes a contact for bus transfer switching, wherein one of the two contacts includes a spherical contacting element, and the other contact includes a rectangular contacting element. The spherical contacting element and the rectangular contacting element engage during switching for the bus transfer, and stay in contact when the finger contact is engaged with the first contact for electrical current conduction.
US11264175B2	Multilayer ceramic capacitor A multilayer ceramic capacitor includes a ceramic main body including dielectric layers and internal electrodes, principal surfaces, side surfaces, and end surfaces, and an external electrode electrically connected to the internal electrode on both end surfaces. The dielectric layer includes at least one element of Si and Mg. In a section defined by the width and lamination directions at a position of a central portion in the length direction of the ceramic main body, an outside in the width direction is higher than a central portion in the width direction in an amount of at least one element existing in a rectangular region of about 10 μm×about 10 μm of the dielectric layer in planar view, and continuity of the internal electrodes within a range of about 10 μm from an end in the width direction of the internal electrodes is greater than or equal to about 95%.
US11264161B2	Coil electronic component A coil electronic component includes a support substrate, a coil pattern disposed on at least one surface of the support substrate, a lead-out pattern disposed on at least one surface of the support substrate to be connected to the coil pattern, an encapsulant disposed to encapsulate the support substrate, the coil pattern, and at least one portion of the lead-out pattern, and an external electrode disposed on an external surface of the encapsulant to be connected to the lead-out pattern. The lead-out pattern includes a slit disposed on a side of a region facing the external electrode. The slit is exposed in a direction toward the external electrode and in a direction away from the support substrate, on the basis of a thickness direction of the support substrate, and is not connected to the support substrate.
US11264158B2	Electromagnetically-driven ferromagnetic actuator device A ferromagnetic actuator is disposed between first and second semiconductor devices that include first and second inductors. Each inductor is disposed on top of a multilevel wiring structure. Current flows through the first inductor to generate a first magnetic field that attracts the ferromagnetic actuator towards the first inductor causing the ferromagnetic actuator to transition from a first state to a second state. In the second state, a portion of the ferromagnetic actuator is disposed closer to the first inductor than it is in the first state. Current flows through the second inductor to generate a second magnetic field that attracts the ferromagnetic actuator towards the second inductor causing the ferromagnetic actuator to transition from the first or second state to a third state. In the third state, a portion of the ferromagnetic actuator is disposed closer to the first inductor than it is in the first state.
US11264157B2	Magnetic force control device and magnetic body holding device using same A magnetic force control device includes a first pole piece having an interaction surface, made of a ferromagnetic material, and configured to be in contact with an N pole of a permanent magnet, a second pole piece having an interaction surface, made of a ferromagnetic material, and configured to be in contact with an S pole of the permanent magnet or another permanent magnet different from the permanent magnet, rotary permanent magnet configured to be rotatable to define a first arrangement state in which an N pole thereof is magnetically connected to the second pole piece and an S pole thereof is magnetically connected to the first pole piece and a second arrangement state in which the N pole is magnetically connected to the first pole piece and the S pole is magnetically connected to the second pole piece.
US11264155B2	Epsilon-type iron oxide magnetic particles and method for producing the same, magnetic powder, magnetic coating material and magnetic recording medium containing magnetic particles An object of the present invention is to provide a magnetic powder having a narrow particle size distribution of epsilon-type iron oxide particles, and another object is to provide magnetic powder suitable for magnetic recording medium by improving particle size distribution, and provide epsilon-type iron oxide magnetic particles and related technologies in which a number average particle diameter of major diameters (D50) is 10 to 20 nm, a 90% cumulative particle diameter (D90) is 30 nm or less, and a geometric standard deviation (σg) of major diameters is 1.45 or less, which are obtained by TEM observation.
US11264154B2	Rare earth permanent magnet and rare earth permanent magnet manufacturing method A rare earth permanent magnet includes a main phase containing: a rare earth element R of one or more types including Nd; an element L of one or more types selected from a group consisting of Co, Be, Li, Al, and Si; B; and Fe, wherein crystals which form the main phase belong to P42/mnm; some of B atoms occupying a 4f site of the crystals are substituted with atoms of the element L; each distribution of Nd atoms and the atoms of the element L appears along a C-axis direction of the crystals in a plurality of cycles; and the rare earth permanent magnet includes an area where a cycle of the atoms of the element L matches a cycle of the Nd atoms.
US11264153B2	Electrical isolator An electrical isolator comprising: a first fluid-carrying member and a second fluid-carrying member spaced apart from said first fluid-carrying member; wherein said first fluid-carrying member has a first toothed surface and said second fluid-carrying member has a second toothed surface; wherein the electrical isolator further comprises: a fibre-reinforced polymer tube that overlaps both the first fluid-carrying member and the second fluid-carrying member and which contacts the first toothed surface in a first interface region of the fibre-reinforced polymer tube and which contacts the second toothed surface in a second interface region of the fibre-reinforced polymer tube; and a compression fitting arranged to bias the first interface region and the first toothed surface together.
US11264150B2	Method for producing an at least two-part structure, in particular a semifinished product for a superconducting wire A method for producing an at least two-part structure, such as a semifinished product for a superconducting wire is provided. A first structure and a second structure are separately produced, and the first structure and the second structure are then inserted one into the other. The first structure and the second structure are respectively produced in layers by selective laser melting or selective electron beam melting of a powder. The method produces two-part structures for semifinished products of superconducting wires.
US11264149B2	Twin axial cable with dual extruded dielectric A twin axial cable includes a pair of wires each with a core conductor; a first dielectric extruded around each of the core conductors, said pair of conductors with the first dielectrics being intimately side by side positioned with each other in a transverse direction; a second dielectric different form the first dielectric and extruded around the first dielectrics; a shielding layer enclosing the second dielectric; and a heat seal PET layer enclosing the shielding layer. A coupling ratio which is calculated by a value of an even mode characteristic impedance subtracted an odd mode characteristic impedance divided by a value of the even mode characteristic impedance pulsed the odd mode characteristic impedance is between 15% to 30%.
US11264148B2	Composite cable and composite harness A composite cable includes a pair of first electric wires, a twisted pair wire formed by twisting a pair of second electric wires having a smaller outer diameter than the first electric wires, a tape member wound into a spiral around an assembly that is formed by twisting the pair of first electric wires and the twisted pair wire together, and a sheath covering an outer periphery of the tape member. The tape member and the sheath includes an inwardly projecting part formed in a spiral along a cable longitudinal direction and formed so as to enter inward at least one of a valley part between the two first electric wires and valley parts between the first electric wires and the twisted pair wire. The inwardly projecting part has a projecting length of not less than 3% of an outer diameter of the first electric wires.
US11264147B2	Cable assembly A cable assembly extends in a longitudinal direction. The cable assembly comprises a first cable, two second cables, two coupling portions, an interposing portion and an outer cover. The first cable has a first conductor and a first cover. Each of the second cables has a second conductor and a second cover. The coupling portions couple the second covers, respectively, with the first cover. The first cable, the two second cables and the two coupling portions are arranged in a V-shape in a plane perpendicular to the longitudinal direction. The interposing portion extends along the first cable and the two second cables and has a full length which is equal to that of each of the first cable and the two second cables. The interposing portion is brought into contact with all the first cable and the two second cables.
US11264144B2	System and method for thermionic energy conversion A thermionic energy conversion system, preferably including one or more electron collectors, interfacial layers, encapsulation, and/or electron emitters. A method for manufacturing the thermionic energy conversion system. A method of operation for a thermionic energy conversion system, preferably including receiving power, emitting electrons, and receiving the emitted electrons, and optionally including convectively transferring heat.
US11264139B2	Method and system for adjusting interactive 3D treatment zone for percutaneous treatment The present teaching relates to surgical procedure planning. In one example, at least one 3D object contained in a 3D volume is rendered on a display screen. The at least one 3D object includes a 3D object corresponding to an organ. First information related to a 3D pose of a surgical instrument positioned with respect to the at least one 3D object is received from a user. A 3D representation of the surgical instrument is rendered in the 3D volume based on the first information. Second information related to a setting of the surgical instrument is received from the user. A 3D treatment zone in the 3D volume with respect to the at least one 3D object is estimated based on the first and second information. The 3D treatment zone in the 3D volume is visualized on the display screen. Controls associated with the 3D representation of the surgical instrument and/or the 3D treatment zone are provided to facilitate the user to dynamically adjust the 3D treatment zone via the controls.
US11264124B2	System and apparatus for item management Item-management systems, apparatus, and methods are described, preferably for management of items such as medicaments. In embodiments, an item-management system comprises a container defining plural cells, a docking station configured to receive the container, sources of visible information to indicate the cell(s) into which an item is to be loaded, and at least one controller operable to control the visible information sources to indicate the cell into which the item is to be received.
US11264121B2	Real-time industrial plant production prediction and operation optimization Direct measurement and simulation of real-time production rates of chemical products in complex chemical plants is complex. A predictive model developed based on machine learning algorithms using historical sensor data and production data provides accurate real-time prediction of production rates of chemical products in chemical plants. An optimization model based on machine learning algorithms using clustered historical sensor data and production data provides optimal values for controllable parameters for production maximization.
US11264115B2	Integrated circuit memory with built-in self-test (BIST) An integrated circuit includes a memory core and a built-in self-test (BIST) controller. The memory core has an array of memory cells located at intersections of a plurality of word lines and a plurality of bit line pairs. The BIST controller is coupled to the memory core and has a mission mode and a built-in self-test mode. When in the mission mode, the BIST controller performs read and write accesses using precharge on demand. When in the built-in self-test mode, the BIST controller performs a floating bit line test by draining a voltage on true and complement bit lines of a selected bit line pair and subsequently precharging the true and complement bit lines of the selected bit line pair, before reading or writing data using the true and complement bit lines of the selected bit line pair.
US11264109B2	Memory device A circuit includes: writing a plurality of data words, each of which has a plurality of data bits, into respective bit cells of a memory device; in response to determining that not all the data bits of the plurality of data words are correctly written into the respective bit cells of the memory device, grouping the plurality of data words as a plurality of data word sets; and simultaneously rewriting a subset of data bits that were not correctly written into the respective bit cells of the memory device, wherein the subset of the data bits are contained in a respective one of the plurality of data word sets.
US11264102B2	Semiconductor storage device A semiconductor storage device includes a bit line driver, and a control circuit configured to be able to execute a writing sequence for repeating at least one loop including a program operation for writing data into at least one of the plurality of memory cells and a verify operation for verifying the data a plurality of times while increasing a program voltage by a step-up voltage. The bit line driver can obtain a number of memory cells into which writing is completed or a number of memory cells into which writing is insufficient for each of the at least two consecutive loops from a result of the verify operation, and the control circuit can determine the step-up voltage in the subsequent loop based on a result obtained by the bit line driver.
US11264101B2	Method of programming in flash memory devices A memory device includes a plurality of memory cells. Each row of the plurality of memory cells is coupled to a respective one of a plurality of wordlines. A method of programming the memory device includes applying a program voltage to a selected wordline of the plurality of wordlines. The method also includes applying a series of incremental verifying voltages to the selected wordline in a first time period after applying the program voltage. The method further includes floating an unselected wordline of the plurality of wordlines in a second time period at least partially overlapping the first time period. The unselected wordline is adjacent to the selected wordline.
US11264100B2	Memory device and operation method thereof An operation method of a memory device may include performing a program operation on a memory block in response to a program command from a controller, and applying a program voltage to a dummy word line coupled to dummy cells within the memory block such that the dummy cells have an indication threshold voltage higher than a normal pass voltage and providing a program fail signal to the controller when the program operation fails.
US11264097B2	Voltage generation circuit and semiconductor circuit including the voltage generation circuit A voltage generation circuit includes a driver configured to generate an internal voltage by driving an external voltage depending on a driving signal; an amplifier configured to generate the driving signal depending on a result of comparing a reference voltage and a feedback voltage; and a switch configured to delay a decrease of the internal voltage by precharging a node of the amplifier with a predetermined voltage depending on a control signal.
US11264095B2	Electronic device and method of operating memory cell in the electronic device An electronic device includes a semiconductor memory. The semiconductor memory includes a word line, a bit line, and a memory cell coupled to and disposed between the word line and the bit line, the memory cell including a variable resistance layer that remains in an amorphous state regardless of a value of data stored in the memory cell. In a reset operation, the memory cell is programmed to a high-resistance amorphous state by applying, to the memory cell, a sub-threshold voltage that is greater than 0.7 time of a threshold voltage of the memory cell and is smaller than 0.95 time of the threshold voltage.
US11264090B2	Memory system A memory system has a nonvolatile memory which comprises memory cells capable of storing 4-bit data of first to fourth bits by sixteen threshold regions including a first threshold region corresponding to an erased state and second to sixteenth threshold regions having higher voltage levels than a voltage level of the first threshold region corresponding to a written state; and a controller which causes the nonvolatile memory to execute a first program for writing data of the first bit and the second bit and then causes the nonvolatile memory to execute a second program for writing data of the third bit and the fourth bit. The controller controls such that the threshold region is any threshold region of a seventeenth threshold region corresponding to an erased state and eighteenth to twentieth threshold regions having higher voltage levels than that of the seventeenth threshold region corresponding to a written state.
US11264087B2	Semiconductor device and method of driving semiconductor device A semiconductor device includes a first wiring having a first portion, a second portion, a third portion provided between the first portion and the second portion, memory cells connected to the third portion of the first wiring, a field effect transistor having a drain connected to the second portion, and a gate, and a second wiring provided in parallel with the first wiring. The third portion of the first wiring includes a fourth portion located nearest to the first portion and a fifth portion located nearest to the second portion. The first wiring further includes a sixth portion disposed between the first portion and the fourth portion. The memory cells include a first memory cell connected to the fourth portion and a second memory cell connected to the fifth portion. The second wiring is electrically connected between the sixth portion and the gate of the field effect transistor.
US11264082B2	Memory device, memory system and autonomous driving apparatus A memory device comprises a first memory area including a first memory cell array having a plurality of first memory cells each for storing N-bit data, where N is a natural number, and a first peripheral circuit for controlling the first memory cells according to an N-bit data access scheme and disposed below the first memory cell array, a second memory area including a second memory cell array having a plurality of second memory cells each for storing M-bit data, where M is a natural number greater than N, and a second peripheral circuit for controlling the second memory cells according to an M-bit data access scheme and disposed below the second memory cell array, wherein the first memory area and the second memory area are included in a single semiconductor chip and share an input and output interface, and a controller configured to generate calculation data by applying a weight stored in the first memory area to sensing data in response to receiving the sensing data obtained by an external sensor, and store the calculation data in one of the first memory area or the second memory area according to the weight, wherein the plurality of first memory cells and the plurality of second memory cells are included in a first chip having a first metal pad, the first peripheral circuit and the second peripheral circuit are included in a second chip having a second metal pad, and the first chip and the second chip are vertically connected to each other by the first metal pad and the second metal pad.
US11264081B1	Memory circuit, electronic device having the memory circuit, and method of operating memory circuit The disclosure is directed to a memory circuit, an electronic device, and a method of operating the memory circuit. According to an exemplary embodiment, the disclosure is directed to a memory circuit which includes not limited to a voltage equalizing circuit configured to equalize and pre-charge a first data line and a second data line to a reference voltage, a sense amplifier circuit configured to sense a binary data based on a relative voltage between the first data line and the second data line, a read-out latch circuit configured to receive the binary data which is to be transmitted to an external controller, and a write circuit configured to receive a first signal of the first data line and a second signal of the second data line so as to write the first signal to a first bit line and the second signal to a second bit line.
US11264080B1	Semiconductor device and method for operating the same According to an embodiment, a semiconductor device includes a transmission circuit including first and second transistors coupled in series between a first voltage terminal and a second voltage terminal, and a first common node coupled between the first and second transistors and coupled to a through line, the transmission circuit outputting a signal transferred from an internal circuit to the first common node according to an output control signal; a reception circuit including third and fourth transistors coupled in series between the first voltage terminal and the second voltage terminal, and a second common node coupled between the third and fourth transistors and coupled to the internal circuit, the reception circuit transferring a signal transferred through the through line to the internal circuit according to a first input control signal; and a deterioration acceleration circuit for applying stress to the first and third transistors according to a test signal.
US11264070B2	Systems and methods for memory operation using local word lines Systems and method are provided for a memory circuit. In embodiments, the circuit includes a plurality of memory cells corresponding to a word of data and a global write word line. A plurality of local write lines are connected to a subset of the plurality of memory cells of the word of data. Selection logic is configured to activate a particular subset of memory cells for writing via a particular local write line based on a signal on the global write line and a selection signal associated with the particular subset of memory cells.
US11264063B2	Memory device having security command decoder and security logic circuitry performing encryption/decryption commands from a requesting host A memory device, including a secure command decoder implementing security logic configured to detect commands carrying an encrypted immediate data payload from a requesting host, authenticate the host as source of the command, decode the immediate data and perform a memory access command called for by a command portion of the decrypted immediate data upon the storage cells of the memory device using the non-command portion of the decrypted immediate data, as well as to encrypt any result from executing the command portion prior to returning the result to the requesting host, and an input/output interface for I/O data units supporting multiple hosts.
US11264061B2	Control method for memory device According to one embodiment, a method of controlling a memory device includes supplying a second potential having a first value to a second electrode and simultaneously, or thereafter, supplying a third potential to a third electrode, and thereafter stopping supply of the third potential such that the potential of the third electrode decays while reducing the potential of the second electrode, and thereafter supplying a first potential to the first electrode.
US11264048B1	Audio processing for detecting occurrences of loud sound characterized by brief audio bursts A boundary of a highlight of audiovisual content depicting an event is identified. The audiovisual content may be a broadcast, such as a television broadcast of a sporting event. The highlight may be a segment of the audiovisual content deemed to be of particular interest. Audio data for the audiovisual content is stored, and the audio data is automatically analyzed to detect one or more audio events indicative of one or more occurrences to be included in the highlight. Each audio event may be a brief, high-energy audio burst such as the sound made by a tennis serve. A time index within the audiovisual content, before or after the audio event, may be designated as the boundary, which may be the beginning or end of the highlight.
US11264046B2	Speech signal leveling A speech signal leveling system and method include generating an output signal by applying a frequency-dependent or frequency-independent controllable gain to an input signal, the gain being dependent on a gain control signal, and generating at least one speech detection signal indicative of voice components contained in the input signal. The system and method further include generating the gain control signal based on the input signal and the at least one speech detection signal, controlling the controllable-gain block to amplify or attenuate the input signal to have a predetermined mean or maximum or absolute peak signal level as long as voice components are detected in the input signal.
US11264039B2	Space division method and apparatus, and storage medium A space division method includes: receiving a first sound signal that is a medium-high frequency sound signal; decoding the first sound signal by specified decoding to obtain device information of a sound source device that emits the first sound signal; and generating space division information when the device information of the sound source device is successfully obtained, wherein the space division information is configured to indicate that the sound source device and the sound collection device are located in the same spatial region.
US11264029B2	Local artificial intelligence assistant system with ear-wearable device Embodiments herein relate to a local assistant system responding to voice input using an ear-wearable device. The system detects a wake-up signal and receives a first voice input communicating a first query content. The system includes speech recognition circuitry to determine the first query content, speech generation circuitry, and an input database of locally-handled user inputs. If the first audio input matches one of the locally-handled user inputs, then the system takes a local responsive action. If the first audio input does not match one of the locally-handled user inputs, then the system transmits at least a portion of the first query content over a wireless network to a network resource.
US11264025B2	Automated graphical user interface control methods and systems using voice commands A system includes a processor and a memory storing instructions that, when executed by the processor, cause the system to receive an utterance, transmit the utterance to a cloud to generate an intent and an entity, receive the intent and the entity, and perform an action with respect to a graphical user interface. A method includes receiving an utterance, transmitting the utterance to a cloud to generate an intent and an entity, receiving the intent and the entity, and performing an action with respect to a graphical user interface. A non-transitory computer readable medium includes program instructions that when executed, cause a computer to receive an utterance, transmit the utterance to a cloud to generate an intent and an entity, receive the intent and the entity, and perform an action with respect to a graphical user interface.
US11264023B2	Using multiple modality input to feedback context for natural language understanding Input context for a statistical dialog manager may be provided. Upon receiving a spoken query from a user, the query may be categorized according to at least one context clue. The spoken query may then be converted to text according to a statistical dialog manager associated with the category of the query and a response to the spoken query may be provided to the user.
US11264022B2	Information processing apparatus, information processing method, and program There is provided an information processing apparatus, method, and program. The information processing apparatus includes: an information acquisition unit configured to acquire input information of a user that includes a time lag between an input start and end, in a mode in which a plurality of contents are consecutively provided via at least one non-content period; and an output control unit configured, in a case where the input information is acquired in a content period in which first content or second content to be provided at a time later than the first content is being provided, to cause an output unit to output first output information on the basis of the input information, and in a case where the input information is acquired in the non-content period, to cause the output unit to output second output information different from the first output information, on the basis of the input information.
US11264019B2	Methods, systems, and media for voice-based call operations Methods, systems, and media for voice-based call operations are provided. In some embodiments, a method comprises: receiving, at a first user device, a communication; detecting a voice command, using the first user device, that includes a keyword; and in response to detecting the voice command, causing the communication to be transferred to a second user device that is associated with the keyword.
US11264018B2	System and method for voice actuated configuration of a controlling device A speech recognition engine is provided voice data indicative of at least a brand of a target appliance. The speech recognition engine uses the voice data indicative of at least a brand of the target appliance to identify within a library of codesets at least one codeset that is cross-referenced to the brand of the target appliance. The at least one codeset so identified is then caused to be provisioned to the controlling device for use in commanding functional operations of the target appliance.
US11264016B2	Noise manageable electronic device and control method thereof The present disclosure relates to a noise manageable electronic device and a control method thereof as the disclosure capable of operating even in the Internet of Things (IoT) environment through a 5G communication network, and the electronic device of the present disclosure may control the driving of the electronic device that generates noise when a voice command is generated by a user. The present disclosure may be configured to include a receiver configured to receive the voice command from the user and noise generated from a plurality of electronic devices arranged in the home, a noise extractor configured to extract the noise, and a processor configured to determine whether the received voice command is recognizable, and to reduce the noise by controlling driving of a first electronic device that has generated the noise among the plurality of electronic devices, when it is determined that the voice command is not recognizable.
US11264008B2	Method and electronic device for translating speech signal A method and an electronic device for translating a speech signal between a first language and a second language with minimized translation delay by translating fewer than all words of the speech signal according to a level of understanding of the second language by a user that receives the translation.
US11264007B2	Translation device, translation method, and program A translation device includes a speech recognition unit, a storage, a translation processor, and an information acquisition unit. The speech recognition unit recognizes a voice to generate a spoken sentence in a first language. The storage stores a plurality of example sentences each including a parameter representing a category corresponding to a plurality of terms. The translation processor searches the plurality of example sentences stored in the storage for an example sentence on the basis of the spoken sentence as a search result example sentence, and generates a converted sentence based on the search result example sentence. The information acquisition unit acquires specific information representing a specific term which corresponds to a specific parameter. If the search result example sentence includes the specific parameter, the translation processor generates the converted sentence based on the specific term represented by the specific information.
US11264001B1	Musical instrument stand support apparatus with rotatable adjustment mechanism to display a guitar A musical instrument stand support apparatus with enhanced stability and a rotatable adjustment mechanism designed to display a guitar in one of a plurality of viewing positions is provided. The stand support apparatus includes a support base, a securement frame rotatably mounted to the support base and having a plurality of bars and a support plate, an upper cradle coupled to the securement frame, and a pair of arms pivotably mounted to the securement frame. The stand support apparatus is designed to secure the guitar with its body disposed on the support plate, guitar neck disposed within the upper cradle and pair of sides of the guitar body secured within the pair of arms. The securement frame is rotatably adjusted relative to the support base to display the secured guitar in one of the plurality of viewing positions.
US11264000B2	Display control device and non-transitory computer readable medium A display control device controls display of a virtual image which is superimposed on foreground of a vehicle by projection of a display light image from an optical unit to a projection area. The display control device sets a projection position of the display light image which is projected in the projection area on the basis of a relative position of a superimposition object on which the virtual image is superimposed, obtains a measurement information from one vehicle height sensor measuring a displacement in a vertical direction occurring in the vehicle, obtains a gradient information indicating a gradient of a road on which the vehicle travels on the basis of three-dimensional map data, and corrects the projection position of the display light image on the basis of the measurement information and the gradient information.
US11263999B2	Image processing device and control method therefor Enabling generation of a display image giving less uncomfortable feeling. An image processing device comprises: an input unit configured to receive, as an image signal and a synchronizing signal, a frame image constituting a moving image; an acceptance unit configured to accept an image shift instruction instructing a change of a display position of the frame image in a vertical direction of a given display unit; a correction unit configured to correct the synchronizing signal on the basis of the image shift instruction; and an output unit configured to output the image signal and the corrected synchronizing signal in association with each other. If an image shift amount in the vertical direction included in the image shift instruction exceeds a predetermined amount, the correction unit performs correction corresponding to an image shift amount not more than the predetermined amount.
US11263990B2	Method and device for adjusting display panel, and display device The present disclosure discloses a method for adjusting a display panel, a device for adjusting a display panel, and a display device including the adjusting device. The method includes: detecting an image displayed by a display panel to determine whether the displayed image is a flickering image; inverting original polarities of data voltages inputted onto at least partial data lines of the display panel when it is detected that the displayed image is the flickering image; scanning an I2C interface, and determining whether a common voltage is written; and restoring the polarities of the data voltages on the at least partial data lines to the original polarities when it is determined that the common voltage is written via the I2C interface.
US11263986B2	System and method for display fault monitoring A display device for a vehicle comprises a pixel array comprising a plurality of display elements. The device further comprises at least one test element and a controller. The controller is configured to selectively activate the display elements of the pixel array via a plurality of control signals and identify the activation of the at least one test element in response to at least one of the control signals. The controller is further configured to identify a display fault of the display device by comparing the at least one control signal communicated to the at least one test element to a diagnostic signal communicated from the at least one test element.
US11263985B2	Power supply circuit and display device A power supply circuit and a display device are provided, belonging to the field of display technologies. The power supply circuit includes a boosting sub-circuit and a driving sub-circuit. The boosting sub-circuit may boost the voltage of the power signal provided by the power source; the driving sub-circuit may drive the load to work normally while ensuring that the capacitance of the capacitor in the driving sub-circuit is small when supplying power to the load with the power signal of which the voltage is boosted.
US11263984B2	Image signal luminance processing method, device and display apparatus An image signal processing device of the present disclosure includes a luminance correction section that performs, on a basis of information on a maximum output luminance value in a display section, luminance correction on an image signal to be supplied to the display section, the maximum output luminance value being variable.
US11263982B2	Advanced LEP display mode, architectures and methodologies for display compensation A display having a variably controlled backlight and/or driver is disclosed. The backlight includes a first light source that emits light within a first spectral power distribution and has a first radiant power output. A second light source emits light within a second spectral power distribution matched to an optical filter for producing a perceived chromaticity and luminosity matching the perceived display appearance without the optical filter.
US11263980B2	Display apparatus and method of driving display panel using the same A display apparatus including a display panel, a gate driver, a data driver, an emission driver, and a driving controller. The display panel includes a pixel including a switching element of a first type and a switching element of a second type. The driving controller determines a driving frequency of the switching element of the first type to be a first driving frequency and a driving frequency of the switching element of the second type to be a second driving frequency less than the first driving frequency in a low frequency driving mode. The driving controller determines the second driving frequency based on a difference of a luminance of a writing frame in which the data voltage is written in the pixel and a luminance of a holding frame in which the written data voltage in the pixel is maintained without writing the data voltage.
US11263976B2	Display device and method of driving the same A display device includes a first transistor including a first electrode connected to a first power line, a second electrode connected to a third node, and a gate electrode connected to a first node, a first capacitor formed between the first power line and a second node, a second capacitor formed between the first node and the second node, an emission transistor including a first electrode connected to the third node, a second electrode, and a gate electrode connected to an emission control line, and a light emitting element connected to the second electrode of the emission transistor and a second power line.
US11263975B2	Display apparatus A display apparatus includes a substrate including a first area, a display area surrounding the first area, and a non-display area surrounding the display area; pixels disposed in the display area; scan lines extending in a first direction and disconnected in the first area; data lines extending in a second direction intersecting the first direction and disconnected in the first area; and data connection lines electrically connecting the data lines disconnected in the first area.
US11263972B2	Pixel circuitry and drive method thereof, array substrate, and display panel Embodiments of the present disclosure provide a pixel circuitry and a drive method thereof, an array substrate, and a display panel. The pixel circuitry includes a shift register unit, an inverter, and a pixel driving circuit. The shift register unit is configured to provide a first drive signal under the control of an enable signal, a first clock signal, and a second clock signal. The inverter is configured to invert the first drive signal to generate a second drive signal. The pixel driving circuit is configured to control a light emitting device according to the first drive signal and the second drive signal.
US11263969B2	Pixel circuit, parameter detection method, display panel and display device A pixel circuit, a parameter detection method, a display panel and a display device are provided. The pixel circuit includes a data writing-in circuit, a driving circuit, a reset control circuit, a detection control circuit, and a light emitting element. The detection control circuit is configured to control the connection or disconnection between the first electrode of the light emitting element and the sensing line under the control of a detection control signal provided by the detection control line. The reset control circuit is configured to control the connection or disconnection between the first electrode of the light emitting element and the second electrode of the light emitting element under the control of a reset control signal provided by the reset control line.
US11263968B2	Display substrate and driving method thereof, and display device A display substrate, a driving method thereof, and a display device. The display substrate includes: a first display sub-region including a plurality of first repeating regions each including a first pixel unit and a second pixel unit disposed adjacently, the first pixel unit including a first sub-pixel and a second sub-pixel, and the second pixel unit including a second sub-pixel and a third sub-pixel; and a second display sub-region including a plurality of second repeating regions each including a third pixel unit and a first transparent pixel, the third pixel unit including a first sub-pixel, a second sub-pixel and a third sub-pixel; the first transparent pixel is configured such that a pixel density of the second display sub-region is less than a pixel density of the first display sub-region, and a light transmittance of the second display sub-region is greater than a light transmittance of the first display sub-region.
US11263964B2	Display panel, display screen, and display terminal The present application relates to a display panel, a display screen and a display terminal. The display panel comprises a substrate provided with pixel circuits thereon; a pixel-defining layer; a light-emitting structure layer; a first electrode layer disposed on the pixel circuits and comprising a plurality of first electrodes; a second electrode disposed on the light emitting structure layer and being a surface electrode; and a scanning line and a data line both connected to each of the pixel circuits; wherein, sub-pixels in adjacent sub-pixel rows are staggered with one another and/or sub-pixels in adjacent sub-pixel columns are staggered with one another; the scanning line supplies a voltage to the pixel circuit to control turning-on and turning-off of the pixel circuit, and when the pixel circuit is turned on, a drive current from the data line is directly supplied to the first electrode to control light-emitting of the corresponding sub-pixel.
US11263958B2	Pixel driving circuit and driving method improving stability of pixel driving circuit in driving light emitting element A pixel driving circuit and a driving method thereof, a display panel and a display device are provided. A second light emitting control device controls, in a case that a first light emitting control device controls a floating signal to be transmitted to a gate of a drive transistor for a first predetermined time period, a driving current to be transmitted to a light emitting element, and the light emitting element can emit light. In this way, the light emitting element can be driven to emit light after a fluctuation period of a voltage of the gate of the drive transistor during which the floating signal is initially inputted to the gate of the drive transistor is passed, improving the stability of the pixel driving circuit in driving the light emitting element.
US11263955B2	Display panel and electronic device A display panel and an electronic device are provided. The display panel includes a driving substrate, an insulating layer, which is provided with a first receiving groove and a second receiving groove, a first micro light emitting diode disposed in the first receiving groove, a second micro light emitting diode disposed in the second receiving groove, and a first reflective layer disposed above the second micro light emitting diode. The display panel and the electronic device can reduce a thickness of the display panel.
US11263948B2	Display apparatus and control method A display apparatus and a control method are disclosed. The display apparatus includes a plurality of sub-pixels, at least one photosensitive assembly, and a processor. Each photosensitive assembly is configured to detect and output actual luminance value(s) of at least one sub-pixel. The processor is configured to obtain a display compensation map corresponding to a target sub-pixel according to actual luminance values of the target sub-pixel that are acquired respectively in cases where a plurality of preset display data are input to the target sub-pixel, and target luminance values of the target sub-pixel that are obtained respectively in cases where the plurality of preset display data are input to the target sub-pixel.
US11263946B2	Reference voltage generating circuit and display device Disclosed are a reference voltage generating circuit and a display device. The reference voltage generating circuit includes a timing control circuit, a digital-to-analog conversion circuit, an operational amplifier circuit, a drive circuit, a switch control circuit, a first switch circuit, and a second switch circuit. The switch control circuit generates a control signal according to a frame start signal and a clock signal provided by the timing control circuit, and outputs the control signal to the first switch circuit and the second switch circuit to control the channels inside the first switch circuit and the second switch circuit to be turned on sequentially, such that an analog voltage signal output by the digital-to-analog conversion circuit can be output to the drive circuit through the first switch circuit, the operational amplifier circuit and the second switch circuit, to provide a reference voltage signal for the drive circuit.
US11263941B2	Data driving circuit, driving method thereof, array substrate and display panel Embodiments of the present disclosure relate to a data driving circuit, a driving method thereof, an array substrate, and a display panel. The data driving circuit includes a data driver, a multiplex circuit, and a control circuit. The data driver includes M data output terminals, and each of the data output terminals provides a data signal to L data lines via the multiplex circuit. The multiplex circuit includes M×L switch groups, and each of the switch groups includes N switch tubes and is coupled between one data line and the corresponding data output terminal. Each switch tube is coupled to one of L×N gate control terminals of the control circuit. Each gate control terminal is coupled to M switch tubes that are spaced apart from each other by (L×N×1) switch tubes. In the embodiments, M is an integer, and L and N are integers greater than or equal to 2.
US11263940B2	Shift register unit, driving method thereof, gate drive circuit and display device A shift register unit, a driving method thereof, a gate drive circuit and a display device are provided. The shift register unit includes: an input circuit, an output circuit, a pull-down control circuit and a pull-down circuit; and the output circuit is connected to a first DC power supply terminal, a second clock signal terminal, a pull-up node, a first driving signal output terminal and a second driving signal output terminal respectively, and is configured to output a first power supply signal of the first DC power supply terminal to the first driving signal output terminal under control of the pull-up node.
US11263938B1	Light-emitting panel and display device A light-emitting panel and a display device are provided. The light-emitting panel includes a plurality of light-emitting components arranged in an array, a plurality of signal calculation modules, and a reference-signal generation module. A light-emitting component includes a light-emitting module and a first switch module. The light-emitting module and the first switch module are connected in series between a first power terminal and a second power terminal. A control terminal of the first switch module is connected to a signal calculation module, and the signal calculation module is connected to the reference-signal generation module. The reference-signal generation module is configured to generate a reference signal. The signal calculation module is configured to receive an original data signal and the reference signal, and generate a first data signal. The signal calculation module is further configured to generate a pulse width modulation signal, and to control the light-emitting module to emit light.
US11263932B2	Display device A display device includes a display panel which includes a display area which displays an image on a first major surface of the display panel. The display panel includes a first folding portion, a second folding portion, and a third folding portion which are disposed in the display area, and an extension direction of the first folding portion, an extension direction of the second folding portion, and an extension direction of the third folding portion are different from each other.
US11263929B2	Flexible display apparatus A flexible display apparatus includes at least two components that are stacked, and at least one optical adhesive layer. Each optical adhesive layer is disposed between two adjacent components of the at least two components, and includes at least two adhesive layers stacked in a stacking direction of the at least two components. The at least two adhesive layers include at least one first adhesive layer and at least one second adhesive layer. One of the at least one first adhesive layer is adhered to one of the two adjacent components, and a storage modulus of each second adhesive layer is less than a storage modulus of each first adhesive layer.
US11263927B2	Tamper evident label and article incorporating the same A tamper evident label is formed of destructible material and has opposite major surfaces. One of the major surfaces has an adhesive thereon and is configured to overlie a theft protection sensor and adhere to an article to be protected. At least one weakness formation is provided in the label adjacent the periphery thereof.
US11263923B2	Vasculature models and associated systems and methods Vasculature models and associated systems and methods are disclosed herein. In some embodiments, the model comprises a tube including a lumen extending therethrough, a synthetic thrombus including a magnetic component, and a magnetized member. The thrombus is sized to be positioned within the lumen, and the magnetized member is positioned peripheral to the thrombus such that a radially outward force is exerted on the thrombus via the magnetized member. The tube may be part of a network of tubes that generally resemble human neurovasculature.
US11263922B2	Cannulation simulation Aspects of the disclosure are directed to methods and/or apparatuses that may facilitate simulation for various cannulation activities. As may be implemented consistent with one or more embodiments herein, an apparatus includes a pliable surface structure having an inner surface and an outer surface, a tube adjacent the inner surface, and a tank configured to hold fluid and to receive fluid exiting from the tube. The tube and pliable surface structure simulate a blood vessel below the inner surface of the pliable surface structure. The tank operates with the tube and the pliable surface to receive a cannula passed through the pliable surface, into the tube and extending into the tank, and facilitates simulated blood flow in the tube below the inner surface of the pliable surface structure via fluid pumped from the tank, through the tube and back into the tank.
US11263921B2	Medicament delivery device configured to produce wireless and audible outputs An apparatus includes a simulated medicament delivery device and an electronic circuit system. The simulated medicament delivery device includes a housing, and is devoid of a medicament delivery mechanism that causes a medicament to be delivered. The electronic circuit system is coupled to the housing and includes an audible output device and a cover. The housing of the medicament delivery device and the cover of the electronic circuit system collectively define an acoustic enclosure. The audible output device is configured to be disposed within the acoustic enclosure.
US11263915B2	Simulator and method for simulating a use of a missile A simulator for simulating a use of a missile of an attacking system is proposed. The simulator comprises: a storage device for storing of a terrain model of a battle terrain and target object models of target objects; a sensing unit for sensing and tracking a defined target object of the target objects in the battle terrain; a transmitting unit for transmitting a coded laser signal to the defined target object; a receiving unit for receiving a response signal transmitted by the defined target object; a providing unit for providing a target object model for the defined target object in dependence on at least type information of the received response signal; and a visual means associated with the missile for outputting a current visual representation of the battle terrain by means of the terrain model, the provided target object model and the location information.
US11263914B2	Multi-level executive functioning tasks Systems and methods of the present invention provide for generating a first, second, and third series of interface objects comprising a first and second sequence respectively, displayed on a graphical user interface (GUI). At least one visual indicator display object is also displayed that requires a switch between the first and second series of user interface objects. A user navigates through the first and second series of interface objects, including the visual indicator display object(s), and a score for the user is calculated according to a user input matching, or failing to match, a correct response associated with a task data defining a function skill demonstrating a cognitive ability of the user.
US11263912B2	Aircraft taxi assistance avionics An aircraft includes an engine, a thrust reverser, landing gear, a brake system, a pilot input device, and a control system. The engine is configured to generate thrust directed to move the aircraft in a forward direction. The landing gear includes wheels. The brake system is configured to generate a braking force on the wheels. The pilot input device is positioned for use by a pilot of the aircraft. The control system is programmed to: determine whether the taxi operations are allowed; receive a request to achieve and hold a taxi speed at a desired taxi speed from the pilot input device; and command the engine, the thrust reverser, and the brake system to achieve and maintain the desired taxi speed in response to receiving the request to hold taxi speed only when the taxi operations are allowed.
US11263908B2	Service provider system associated with geographical position based services and a mobile service requesting application A service system includes a service provider server-system in wireless communication over a network with at least one service requesting application, wherein the requesting application is executing in a smartphone. The requesting application includes a computer coded map. The requesting application is configured, on a request by a user of the application, to request a service by transmitting a map information layer including a visual symbol located on the geographical position (GPS) of the smartphone together with an indication of the requested service to the service provider server-system.
US11263906B2	Automotive vehicle parking systems, methods, and apparatus Systems, methods, and apparatuses for locating parking spaces are disclosed. According to one method, a request is received from a user of a vehicle to locate a space; the location of the user is determined; a database comprising spaces within a geographic region is accessed; from the database, a subset of spaces within the geographic region is identified, the subset comprising user-specific spaces; a determination is made regarding the availability of the user-specific spaces; and if a user-specific space is available, a transmission is initiated, intended for the user, providing the location of at least one available space. The systems, methods, and apparatus may be used to locate free spaces, may allow users to indicate when they are vacating a space to enable other users to access the space via a “park it forward” approach, and may assign available spaces to users based on an equitable prioritization protocol.
US11263903B2	Information provision system Provided is an information provision system capable of reducing secondary damage in the case of a disaster. The information provision system includes: a vehicle; and an information provision apparatus communicatively connected to the vehicle and configured to provide information to the vehicle. The information provision apparatus includes an acquirer that acquires fire-related information indicating information about fire, a fire detector that detects an occurrence of fire based on the fire-related information, and a fire information generator that generates, in response to the detection of the occurrence of fire by the fire detector, fire avoidance information for avoiding the fire, and transmits the fire avoidance information to the vehicle. The vehicle includes an information receiver that receives the fire avoidance information, and a display controller that causes a display to display the fire avoidance information.
US11263898B2	Apparatus and methods for assessing vehicles straddled between lanes A method of assessing whether a vehicle is straddled between lanes (12,14) on a multi-lane carriageway, the method comprising the steps of: a) measuring inductance change values from two adjacent inductive loops (22a, 20b) situated at a loop site, as the vehicle traverses the loop site; b) summing separate logarithms of the inductance change values, or taking a logarithm of the product of the inductance change values, to obtain a value; and c) comparing the value from step (b) against a predetermined threshold value to make a determination as to whether: i) a single vehicle is straddling multiple lanes (12,14), where the value from step (b) is on one side of the predetermined threshold value, or ii) two vehicles are present in adjacent lanes (12,14), where the value from step (b) is on the other side of the predetermined threshold value.
US11263895B2	Audio riser active electrical supervision An audio riser active electrical supervision system includes a high-voltage audio alert system connected to a riser circuit. The high-voltage audio alert system disconnects a high-voltage analog signal from the riser circuit when the audio riser active electrical supervision system operates in a standby mode, and connects the high-voltage analog signal to the riser circuit when the audio riser active electrical supervision system operates in an active alert mode. A plurality of isolator modules operate in a closed state that connects a circuit node to the riser circuit and an open state that disconnects the respective circuit node from the riser circuit. A riser supervision circuit is connected to at least one isolator module to detect a circuit fault on the riser circuit when the audio riser active electrical supervision system operates in the standby mode and the active alert mode.
US11263891B2	Enhanced emergency response Disclosed is a back-end system for emergency response, and a corresponding front-end system. The back-end system handles network communication to and/or from multiple information sources for gathering emergency response information from the information sources, including at least video data related to an emergency and/or security situation and additional emergency response information. The back-end system extracts subsets of information from the emergency response information at least partly based on input originating from one or more users and/or operators. The back-end system is configured to perform processing of the emergency response information to enable formation of a common overview of the emergency and/or security situation valid for different users/operators, while also enabling the emergency response information and/or extracted subsets thereof to be processed, compiled and/or filtered, and/or presented to a specific user and/or operator in a way that is customized for the specific user and/or operator of the emergency response system.
US11263888B1	Multiple proximity sensors based electronic device A multiple proximity sensors based electronic device is disclosed. The electronic device includes a plurality of proximity sensors, which are configured to iteratively capture at least one proximity parameter at predefined time intervals. A processor within the electronic device analyzes the at least one proximity parameter and determines, for each of the plurality of proximity sensors, a rate of change of the associated at least one proximity parameter in response to the analyzing. The processor further computes a stability factor for the electronic device based on the determined rate of change of the associated at least one proximity parameter for each of the plurality of proximity sensors. The processor further compares the stability factor with a stability threshold and determines a fall probability of the electronic device based on the comparison.
US11263881B2	System and method of alternative tracking upon disabling of monitoring device A method is provided. The method includes: establishing a database of a plurality of individuals, data for each individual including identity, short range wireless device information, and at least one rule regarding expected interaction by the individual relative to the area; receiving probe signal information from a plurality of sensors around an area, each of the sensors being configured to receive probe signals from proximate wireless devices, the probe signals lacking information directly identifying an owner of the originating wireless device; cross referencing at least some of the received probe signals with at least a portion of the database; identifying, based at least on the cross referencing, a presence of an unauthorized individual in the area; and notifying a supervising authority of the identified unauthorized individual.
US11263880B2	Alarming cables, assemblies, and systems Alarming cables, assemblies and systems for displaying and protecting a powered article of merchandise from theft include an alarm unit disposed between a first cable having a first connector for connection to a power source and a second cable having a second connector for connection to the merchandise. An alarm unit connector may connect the second cable to the alarm unit. The alarm unit and the alarm unit connector may each include a connection member to electrically connect the merchandise with the alarm unit and the power source when the alarm unit connector aligns with and engages the alarm unit.
US11263877B2	Identifying mechanical impedance of an electromagnetic load using a two-tone stimulus A method for identifying a mechanical impedance of an electromagnetic load may include generating a waveform signal for driving an electromagnetic load, the waveform signal comprising a first tone at a first driving frequency and a second tone at a second driving frequency. The method may also include during driving of the electromagnetic load by the waveform signal or a signal derived therefrom, receiving a current signal representative of a current associated with the electromagnetic load and a back electromotive force signal representative of a back electromotive force associated with the electromagnetic load. The method may further include determining amplitude and phase information of the current signal responsive to the first tone and second tone, determining amplitude and phase information of the back electromotive force signal responsive to the first tone and second tone, and identifying parameters of the mechanical impedance of the electromagnetic load based on the amplitude and phase information of the current signal and the amplitude and phase information of the back electromotive force signal.
US11263875B2	Method for detecting the presence of a smart card cloning device in an automatic payment and/or withdrawal terminal and respective automatic payment and/or withdrawal terminal It is described a method for detecting the presence of a device for cloning a smart card in an automatic payment and/or withdrawal terminal, comprising the steps of detecting that a smart card has not been at least partially inserted inside a reader of the terminal; simulating the presence of a smart card inside the reader; measuring a current or voltage value generated by the simulation; comparing the measured current or voltage value with respect to a defined threshold value; detecting the presence of the cloning device if, as a function of said comparison, it results that the measured current or voltage value is greater than or equal to the threshold value; and blocking the operation of the automatic payment and/or withdrawal terminal in case of detecting the presence of the cloning device.
US11263868B2	Game token management system According to the present invention, there is provided a management system that prevents misuse of many game tokens during the operation of casino using card game tables in casino and other card game facilities using card game tables. The management system has a function that previously registers IDs of contemplated game tokens on database, manages IDs of game tokens present on a game table chip tray and a storage together with information on location on database, specifies the game token in the game table chip tray and the storage at predetermined timing, and generates an error signal when the following statuses is noticed: 1) a fact that ID absent on database is newly present and 2) a fact that two or more identical IDs are present.
US11263865B2	Electronic gaming machine having a variable position gaming display and a flexible gaming display responsive to gaming conditions A gaming machine, system and method providing variable position display capable of display movement and an extendable screen responsive to gaming conditions. The gaming machine includes a cabinet, a variable position display, an extendable display screen, and a controller. The variable position display rotates, tilts, pans, or some combination of translation, rotation, tilting and panning, in relation to the cabinet and in response to at least one or more predefined gaming conditions. The controller initiates a movement sequence movement of the variable position display, from a first position to a second position, and initiates the game program tailored to retractably extend the extendable display screen with respect to the cabinet relatively to the movement of the variable position display, and present the game and game outcomes of the game on the variable position display in the second position.
US11263859B2	Maintenance monitoring apparatus, system, method, and program A maintenance monitoring apparatus includes: a maintenance management part that manages, based on a monitoring result of a current or power of a vending machine that provides a beverage by extracting the beverage from a raw material, whether an operation performed on the vending machine is a predetermined maintenance operation and whether the maintenance has been executed at an appropriate time interval and as many times as necessary; and a notification part that notifies that a maintenance has been executed or not.
US11263858B2	Cash processing system, cash processing method, portable terminal and cash processing machine A cash processing system capable of preventing erroneous operations by an operator during cash transfer processing and enabling the cash transfer to be executed efficiently. This system comprises a first cash processing machine for performing an outgoing cash transfer, a second cash processing machine for performing an incoming cash transfer, and a portable terminal. The portable terminal is equipped with a display unit, an operation unit for receiving input of cash transfer information, including cash information, and a communication processing unit. Upon receiving outgoing cash transfer information included in the cash transfer information from the portable terminal, the first cash processing machine pays out cash based on the outgoing cash transfer information. Upon receiving incoming cash transfer information included in the cash transfer information from the portable terminal, the second cash processing machine receives cash based on the incoming cash transfer information.
US11263856B2	Coded polymer substrates for banknote authentication A method and system for authenticating an item includes providing the item including a polymer substrate comprising a polymer material and a doping material, the polymer material and the doping material configured to transmit radiation laterally through the polymer substrate, and the doping material capable of scattering radiation and absorbing radiation of at least one specific wavelength to generate a spectral signature in a spectral band of wavelengths of the transmitted radiation, irradiating the item with incident radiation characterized by a spectral band of wavelengths spanning a band of wavelengths including the at least one specific wavelength absorbed and scattered by the doping material, detecting the spectral signature after the radiation is transmitted laterally through the polymer substrate, and determining a code associated with the spectral signature.
US11263852B2	Method, electronic device, and computer readable storage medium for creating a vote Disclosed are a method, an electronic device, and a computer readable storage medium for creating a vote. The method includes: receiving a vote initiation instruction to obtain voice information inputted currently; determining textual information by recognizing the voice information; determining at least two option words based on semantic recognition of the textual information; generating a question stem of the vote based on the textual information; and generating voting options based on the option words for the vote.
US11263845B2	Intelligent storage device An intelligent storage device is provided that enables a user to securely store odorous materials, lock and unlock the storage device via a mobile device or other remote computing device, and receive alerts when the storage device is moved or tampered with. Embodiments include an intelligent storage device comprising a lid with a locking mechanism and a user-controllable device configured to activate the locking mechanism upon receiving a first user input; a container with an opening sized and shaped to receive the lid, wherein the locking mechanism is configured to securely seal the lid to the container when activated; and an electronics module configured to cause deactivation of the locking mechanism in response to receiving a second user input via the user-controllable device and upon confirming authorization of the user to access the storage device.
US11263843B2	Information processing apparatus, information processing mei'hod, and program Provided is an information processing apparatus including: a locking control unit configured to execute a first process of processes for causing a locking unit to unlock, on the basis of detection of access of a first communication terminal; and a detection unit configured to detect an unlocking request by a user of the first communication terminal. The locking control unit executes a second process of the processes for causing the locking unit to unlock, when the unlocking request is detected and the first process is completed.
US11263842B2	Method for preventing security breaches of a passive remove keyless entry system The present invention relates to a method for preventing security breaches of a passive remote keyless entry system for authorizing access to a vehicle. The passive remote keyless entry system comprises a base station located at the vehicle and a mobile device, in particular a remote key, wherein the base station comprises a first processor unit and a first transceiver unit, the first transceiver unit comprises a timing device, the mobile device comprises a second processor unit and a second transceiver unit, an air travel time T of a single message sent back and forth from the base station to the mobile device is measured, and access to the vehicle is granted depending on the measured air travel time T.
US11263835B2	Vehicle fault detection system and method utilizing graphically converted temporal data A vehicle fault detection system including at least one sensor configured for coupling with a vehicle system, a vehicle control module coupled to the at least one sensor, and being configured to receive at least one time series of numerical sensor data from the at least one sensor, at least one of the at least one time series of numerical sensor data corresponds to a respective system parameter of the vehicle system being monitored, generate a graphical representation for the at least one time series of numerical sensor data to form an analysis image of at least one system parameter, and detect anomalous behavior of a component of the vehicle system based on the analysis image, and a user interface coupled to the vehicle control module, the user interface being configured to present to an operator an indication of the anomalous behavior for the component of the vehicle system.
US11263833B2	Light electric vehicle defect management The present disclosure describes a system for detecting, identifying and addressing a maintenance event for light electric vehicles. The maintenance event may be detected based on rider profile information, riding parameter information and light electric vehicle information. If a maintenance event is detected, a light electric vehicle management system may determine an action that addresses the maintenance event and provide instructions regarding the action to the light electric vehicle and/or one or more individuals that are trained or otherwise certified to address the maintenance event.
US11263832B2	Data transfer device and method for transferring data for a vehicle A data transfer device for transferring data in a communications network for a vehicle, includes a data receiving device, and a data processing device. The data processing device is configured to filter received data via a filter device based on a predetermined condition, and the data processing device is configured to generate at least one data object with at least one parameter from the filtered data. The data processing device is further configured to check whether or not status information of the at least one parameter of the at least one data object has changed relative to status information of this at least one parameter of this at least one data object at an earlier time. The data processing device is further configured to transfer the changed status information of the at least one parameter of the at least one data object to the data application device.
US11263831B2	Utilizing on-board measurements and location as inputs into load tracking A mobile machine includes a load carrying mechanism configured to carry a load of material during operation of the mobile machine at a worksite. The mobile machine includes a position detection system configured to determine a position of the mobile machine and generate a position output indicative of the position of the mobile machine. The mobile machine includes a measuring system configured to determine a measure of the load and generate a measure output indicative of the measure of the load. The mobile machine also includes a material movement tracking system configured to receive the position output from the position detection system and the measure output from the measuring system and, based on both the position and the measure output, generate a material tracking indicator indicative of movement of the load of material around the worksite.
US11263829B2	Using a predicted color for both visibility evaluation and signal robustness evaluation The present document provides image processing methods and apparatus. One claim recites: obtaining a signal to be encoded in color image data, the signal comprising a plural-bit payload; predicting a resulting color of overprinting several inks on a substrate, the overprinting representing the color image data encoded with the signal; using the resulting color for both i) visibility evaluation of the overprinting, and ii) signal robustness evaluation of the overprinting as seen by an imaging device. Other claims and combinations are provided.
US11263824B2	Method and system to generate authoring conditions for digital content in a mixed reality environment Systems and methods for spawning a digital object in an environment are disclosed. Data describing the environment is received. The data includes data describing properties of the environment, a state of the environment, and properties of a plurality of objects within the environment. The data is analyzed to detect and categorize one or more of the plurality of objects, and to detect one or more surfaces related to the plurality of objects. Data is received that describes a placement of the digital object on one of the detected surfaces or detected objects and determines properties of the placement. Conditions are associated with the placed digital object, the conditions including data describing properties of the placement, data describing properties of the detected object, and data describing a state of the detected object. The spawning of the digital object is performed in the environment based on the conditions.
US11263821B1	Generating augmented reality prerenderings using template images Systems and methods for generating augmented reality prerenderings can provide the benefit of an augmented reality rendering without requiring the use of user data. Template images can be used instead of user data to protect the user's privacy while enabling the user to see an object or product rendered onto a preferred template image or a variety of template images.
US11263820B2	Multi-stage block mesh simplification A method of operating a computing system to generate a model of an environment represented by a mesh is provided. The method allows to update 3D meshes to client applications in real time with low latency to support on the fly environment changes. The method provides 3D meshes adaptive to different levels of simplification requested by various client applications. The method provides local update, for example, updating the mesh parts that are changed since last update. The method also provides 3D meshes with planarized surfaces to support robust physics simulations. The method includes segmenting a 3D mesh into mesh blocks. The method also includes performing a multi-stage simplification on selected mesh blocks. The multi-stage simplification includes a pre-simplification operation, a planarization operation, and a post-simplification operation.
US11263819B2	Interaction between a viewer and an object in an augmented reality environment A method includes: triggering rendering of an augmented reality (AR) environment having a viewer configured for generating views of the AR environment; triggering rendering, in the AR environment, of an object with an outside surface visualized using a mesh having a direction oriented away from the object; performing a first determination that the viewer is inside the object as a result of relative movement between the viewer and the object; and in response to the first determination, increasing a transparency of the outside surface, reversing the direction of at least part of the mesh, and triggering rendering of an inside surface of the object using the part of the mesh having the reversed direction, wherein the inside surface is illuminated by light from outside the object due to the increased transparency.
US11263817B1	3D captions with face tracking Aspects of the present disclosure involve a system comprising a computer-readable storage medium storing at least one program and method for performing operations comprising: receiving, by one or more processors that implement a messaging application, a video feed from a camera of a user device; detecting, by the messaging application, a face in the video feed; in response to detecting the face in the video feed, retrieving a three-dimensional (3D) caption; modifying the video feed to include the 3D caption at a position in 3D space of the video feed proximate to the face; and displaying a modified video feed that includes the face and the 3D caption.
US11263813B2	Information processing device, information processing system, and information processing method Disclosed herein is an information processing device including an acquiring unit that acquires positional information of a flat surface present in a first space around a first user and positional information of a flat surface present in a second space around a second user, and a transformation parameter determining unit that determines a coordinate transformation parameter for transforming position coordinates of the first space and the second space into position coordinates in a virtual space such that a position of the flat surface present in the first space and a position of the flat surface present in the second space coincide with each other. A position of an object present in the first space and a position of another object present in the second space are transformed into positions in the virtual space according to the determined coordinate transformation parameter.
US11263812B2	Computer-implemented method for compressing a digital representation of an object Described is compressing a digital representation of an object, wherein the object representation comprises image information items for the object that each specify a value of a measurand for the object at a defined position of the object. Compressing includes determining the object representation, determining a distance field from the image information items of the object representation that comprises a plurality of data points in a grid, the distance field assigns at least one distance value to each of the data points that in each case indicate the shortest distance of the data point from a closest material boundary of the object, determining a near region around a material boundary of the object, determining a sub-set of data points of the distance field which lie outside the near region, deleting the sub-set of data points, and saving the distance field in the form of a compressed object representation.
US11263810B2	Surface reconstruction for environments with moving objects Optimizations are provided for reconstructing geometric surfaces for an environment that includes moving objects. Multiple depth maps for the environment are created, where some of the depth maps correspond to different perspectives of the environment. A motion state identifier is assigned to at least some pixels in at least some of the depth maps corresponding to moving objects in the environment. A composite 3D mesh is built using at least some of the multiple depth maps, by incorporating pixel information from the depth maps, while omitting pixel information identified by the motion state identifiers as being associated with moving objects.
US11263807B2	Method for the automatic material classification and texture simulation for 3D models A method of automatically transforming a computerized 3D model having regions of images utilized as textures on one or more physical objects represented in the 3D model (such as building sides and roofs, walls, landscapes, mountain sides, trees and the like) to include material property information for one or more regions of the textures of the 3D model. In this method, image textures applied to the 3D model are examined by comparing, utilizing a computer, at least a portion of each image texture to entries in a palette of material entries. The material palette entry that best matches the one contained in the image texture is assigned to indicate a physical material of the physical object represented by the 3D model. Then, material property information is stored in the computerized 3D model for the image textures that are assigned a material palette entry.
US11263804B1	Systems and methods for efficient point cloud visualization based on a hybrid rendering of data points and meshes Disclosed is a system and method for rendering point clouds via a hybrid data point and construct visualization. The system receives a point cloud of a three-dimensional (“3D”) environment, and differentiates a first set of the point cloud data points from a second set of the data points based on a position of each data point relative to a specified render position. The system generates a first visualization from values of each of the first set of data points, and a second visualization from values of a set of constructs that replace the second set of data points. Each construct has a polygonal shape and a singular set of values defined from the values of two or more of the second set of data points. The system presents a final render of the 3D environment from the render position by combining the first visualization with the second visualization.
US11263801B2	Smooth surface wrapping of features in an imaged volume The present disclosure provides an automated interpretation workflow for smooth surface wrapping of an imaged volume. The methods use a volume attribute to classify data into regions corresponding to feature/uncertain/non-feature parts and use smoothing through the uncertain parts to connect the clear boundaries of the feature. Any volume attribute can be used as long as feature/uncertain/non-feature categories can be identified in terms of continuous or discontinuous threshold values or ranges. The workflow can be combined with interpretation of well-defined boundary parts to resolve uncertainty and can be used with both explicit single-z and implicit multi-z (level set) boundary representations.
US11263799B2	Cluster of scalar engines to accelerate intersection in leaf node Cluster of acceleration engines to accelerate intersections. For example, one embodiment of an apparatus comprises: a set of graphics cores to execute a first set of instructions of a primary graphics thread; a scalar cluster comprising a plurality of scalar execution engines; and a communication fabric interconnecting the set of graphics cores and the scalar cluster; the set of graphics cores to offload execution of a second set of instructions associated with ray traversal and/or intersection operations to the scalar cluster; the scalar cluster comprising a plurality of local memories, each local memory associated with one of the scalar execution engines, wherein each local memory is to store a portion of a hierarchical acceleration data structure required by an associated scalar execution engine to execute one or more of the second set of instructions; the plurality of scalar execution engines to store results of the execution of the second set of instructions in a memory accessible by the set of graphics cores; wherein the set of graphics cores are to process the results within the primary graphics thread.
US11263798B2	Multi-rendering in graphics processing units using render progression checks A graphics processing unit having multiple groups of processor cores for rendering graphics data for allocated tiles and outputting the processed data to regions of a memory resource. Scheduling logic allocates sets of tiles to the groups of processor cores to perform a first render, and at a time when at least one of the groups has not completed processing its allocated sets of one or more tiles as part of the first render, allocates at least one set of tiles for a second render to one of the other groups of processor cores for processing. Progress indication logic indicates progress of the first render, indicating regions of the memory resource for which processing for the first render has been completed. Progress check logic checks the progress indication in response to a request for access to a region of the memory resource as part of the second render and enables access that region of the resource in response to an indication that processing for the first render has been completed for that region.
US11263792B1	Calibration method for a spectral computerized tomography system A calibration method for an x-ray computerized tomography system and a method of tomographic reconstruction are provided. The calibration method includes steps of measuring at least one point spread function (PSF) at each of a plurality of points, compressing each PSF, and in one or more storing operations, storing the compressed PSFs in a computer-accessible storage medium. The PSF measurements are made in a grid of calibration points in a field of view (FOV) of the system. In the measuring step, an absorber is positioned at each of the calibration points, and an x-ray projection is taken at least once at each of those absorber positions. In the method of tomographic image reconstruction, projection data from an x-ray tomographic projection system are input to an iterative image reconstruction algorithm. The algorithm retrieves and utilizes a priori system information (APSI) The APSI comprises comprising point spread functions (PSFs) of all voxels in a voxelization of the field of view that are compressed in the form of vectors of parameters. For utilization, each retrieved vector of parameters is decompressed so as to generate a discretized PSF.
US11263790B2	Method for correcting image processing region corresponding to skin and electronic device Disclosed is an electronic device. There electronic device according to an embodiment includes: a memory; and a processor electronically connected to the memory, wherein the processor can be configured to recognize a face region from an image, check first skin probability data, corresponding to a region to be corrected, on the basis of a first skin color distribution including a skin color distribution stored in association with a plurality of races, first color data of the face region, and a second color data of the region to be corrected which is in the image and includes the face region, determine a category of the face region on the basis of the first color data of the face region, and correct the color, of the region to be corrected, on the basis of the determined category and the first skin probability data. Various other embodiments understood from the specification are also possible.
US11263789B2	Display apparatus and image processing method for applying random patches to pixel block Disclosed is an image processing apparatus and a method of operating the same. The image processing apparatus includes: a memory storing information on at least one random patch; and at least one processor configured to: obtain correlations between a pixel block included in an input image and each of a plurality of random patches obtained from the information on the at least one random patch, obtain weights respectively for the plurality of random patches on a basis of the obtained correlations and apply the weights respectively to the plurality of random patches, and obtain an output image by applying, to the pixel block, the plurality of random patches to which the weights are respectively applied.
US11263788B2	Apparatus and method for superimposing teeth data image onto face image An apparatus and method for superimposing a teeth data image onto a face image is provided. The apparatus for superimposing the teeth data image onto the face image includes a scanner for generating a teeth data image by scanning a teeth of a patient; a camera for obtaining a side face image by photographing a side face of the patient; and a control unit for extracting a feature point of the side face image, extracting a reference line of the side face based on the feature point, adjusting a size of the teeth data image according to a length of the reference line of the side face, and superimposing the teeth data image onto the side face image.
US11263786B2	Decoding data arrays When decoding a data array that has been encoded using a tree structure representation, the encoded tree representation of the array of data elements comprising a set of tree node data representing the respective node values for the different nodes of the tree and a set of bit count data indicating the number of bits that has been used for signalling the node values for each non-root node in the tree a data value for a set of one or more data elements associated with a first node of the tree structure is determined by determining an initial data value for the first node using the stored tree node data, and modifying the initial data value using a modifier value based on the number of bits used for signalling the node values for the child nodes of the first node in at least the next level of the tree.
US11263785B2	Object detection method, electronic apparatus and object detection system An object detection method, an electronic apparatus and an object detection system are provided. The method is adapted to the electronic apparatus and includes the following steps. A first image is obtained. A geometric transformation operation is performed on the first image to obtain at least one second image. The first image and the at least one second image are combined to generate a combination image. The combination image including the first image and the at least one second image is inputted into a trained deep learning model to detect a target object.
US11263784B2	Determine image capture position information based on a quasi-periodic pattern Examples disclosed herein relate to determining image capture position information based on a quasi-periodic pattern. For example, a processor may determine whether a target area is within a captured image based on the detection of a quasi-periodic pattern in a first detection area and in a second detection area of the captured image.
US11263781B2	Process for determining the infiltration of biological cells in a biological object of interest The invention relates to a process for determining an infiltration profile of biological cells of interest in a biological object of interest from a digital histopathological image of biological tissues, a histological stain having previously been applied to the biological tissues, comprising generating a biological cell detection image, pixels associated with the histological stain on the histopathological image being of a predetermined color on said image, determining a distance map comprising distance iso-curves to the boundary of the biological object, and, from the distance map, calculating a curve representative of the surface density of biological cells of interest as a function of distance to the boundary, by counting, for each boundary distance value, pixels that are both of the predetermined color on the detection image and located between the iso-curve associated with said distance value and the consecutive iso-curve.
US11263780B2	Apparatus, method, and program with verification of detected position information using additional physical characteristic points Provided is a position detection unit configured to detect position information of a first imaging device and a second imaging device on the basis of corresponding characteristic points from a first characteristic point detected as a physical characteristic point regarding a subject imaged by the first imaging device, and a second characteristic point detected as a physical characteristic point regarding the subject imaged by the second imaging device. The present technology can be applied to an information processing apparatus that specifies positions of a plurality of imaging devices.
US11263778B2	Systems and methods for aiding a visual positioning system with indoor wayfinding A device may receive images identifying interiors of buildings and movable objects and unmovable objects located in the interiors, and may train a machine learning model with the images to generate a trained machine learning model. The device may receive an image identifying an interior portion of a building and objects located in the interior portion, and may process the image, with the trained machine learning model, to identify a movable object and an unmovable object. The device may disregard the movable object to generate an image in which data identifying the movable object has been disregarded, and may process the image in which the data identifying the movable object has been disregarded, with a visual positioning system, to determine a location of the user device in the interior portion of the building. The device may perform one or more actions based on the location of the user device.
US11263768B2	3D information calculation apparatuses, 3D measurement apparatuses, 3D information calculation methods, and 3D information calculation programs A 3D information calculation apparatus includes processing circuitry that may receive first and second images of different first and second wavelength bands, respectively, at a same time and angle of view based on a subject being imaged while structured light of the first wavelength band is projected on to subject, receive third and fourth images of the first and second wavelength bands, respectively, at a same time and angle of view based on the subject being imaged while the structured light is not projected on the subject, calculate a first difference image of the first wavelength band based on subtracting the first and third images, calculate a second difference image of the second wavelength band based on subtracting the second and fourth images, calculate an extraction image based on subtracting the first and second difference images, and calculate a distance to the subject based on the extraction image.
US11263766B1	Smoothly changing a focus of a camera between multiple target objects Disclosed herein is a system to smoothly change the focus of a camera between multiple targets. The system can obtain an indication of a target, an indication of a manner of focus transition between a first target and a second target, and camera settings. The system can determine a point associated with the second target, where the point has a property that focusing the camera on the point places the second target in focus, and the point is closer to the current focus point of the camera than a substantial portion of other points having the property. The system can obtain a nonlinear function indicating a second manner of focus transition between the first target and the second target. The system can change the focus of the camera between the first target and the second target by changing the focus of the camera from the current focus point to the determined point based on the nonlinear function.
US11263764B2	Methods and devices for surface motion tracking Embodiments of the disclosure may be directed to an image processing system configured to receive a medical image of a region of a subject's body taken at a first time and to receive a surface image of an exterior portion of the region of the subject's body taken at the first time. The image processing may also be configured to receive a medical image of the region of the subject's body taken at a second time and to register the medical image taken at the first time, the surface image taken at the first time, and the medical image taken at the second time.
US11263762B2	Image recognition method and apparatus, and computer-readable storage medium Image recognition method and apparatus, and computer-readable storage medium are provided. The method includes: determining changed object according to change of states of at least one group of target objects in detection area; obtaining a set of image frames in side view consisting of image frames in side view and at least one image frame to be matched that are collected within a first preset time period before states of at least one group of target objects in detection area are changed; determining associated image frame from at least one image frame to be matched; obtaining image frame in side view corresponding to associated image frame from the set of image frame in side view; and determining, according to associated image frame and the image frame in the side view, target intervention object having the highest degree of association with changed object from at least one intervention object.
US11263759B2	Image processing apparatus, image processing method, and storage medium In an image processing apparatus, a detection unit detects a moving object from a captured image captured by an image capturing unit. An extraction unit extracts an edge from the captured image. A determination unit determines, based on a position of the moving object included in the captured image, whether to superimpose the edge on a region corresponding to the moving object in a background image. A generation unit generates an output image by superimposing a mask image, for obscuring the moving object, on the region in the background image and superimposing the edge, determined by the determination unit to be superimposed, on the region in the background image.
US11263758B2	Image processing method and apparatus The present disclosure relates to a controller (2) for identifying a periphery of a towed vehicle (T) connected to a towing vehicle (V). The controller (2) is configured to receive towing vehicle image data (DV1) corresponding to a towing vehicle image (IMG1) captured by a towing vehicle camera (C1). The towing vehicle image data (DV1) is processed to generate a plurality of movement vector. The periphery (P1) of the towed vehicle (T) is identified in dependence on the plurality of movement vectors. The present disclosure also relates to a method of identifying the periphery (P1) of a towed vehicle (T).
US11263748B2	Determining biomarkers from histopathology slide images A generalizable and interpretable deep learning model for predicting biomarker status and biomarker metrics from histopathology slide images is provided.
US11263747B2	Detecting avascular areas using neural networks An example method includes generating, using a multi-scale block of a convolutional neural network (CNN), a first output image based on an optical coherence tomography (OCT) reflectance image of a retina and an OCT angiography (OCTA) image of the retina. The method further includes generating, using an encoder of the CNN, at least one second output image based on the first output image and generating, using a decoder of the CNN, a third output image based on the at least one second output image. An avascular map is generated based on the third output image. The avascular map indicates at least one avascular area of the retina depicted in the OCTA image.
US11263746B2	Methods for determining test result validity using a wavefront position on a test strip The present disclosure relates to methods for determining a liquid front position of a liquid on a surface of an assay test strip placing a liquid on the surface of the test strip; and acquiring one or more signals from the surface of the test strip at one or more times, comparing the one or more acquired signals to a threshold, wherein the liquid front position is a position on the surface of the test strip where a signal is greater than or less than a threshold (e.g., fixed or dynamic threshold). Such methods may be used to determine the liquid front velocity of a liquid on a surface of an assay test strip and the transit time of a liquid sample to traverse the one or more positions on the surface of the assay test strip.
US11263745B2	Method of determining target treatment locations A method and system for automatic location of a target treatment structure, such as a pulmonary vein ostium, from an anatomical image. The method includes calculating a most likely path of blood flow through a pulmonary vein based on a cross-sectional area minimization technique and calculating pulmonary vein geometry as a function of length. For example, a pulmonary vein ostium may be located by analyzing a change in pulmonary vein dimensional size or other anatomical factors, such as absolute size. The method may also include determining tissue thickness at the pulmonary vein ostium or other treatment size for treatment dose optimization. The method may be an algorithm performed by a processing unit of a navigation system or other component of a medical system.
US11263741B2	System and methods of generating comparable regions of a lithographic mask Implementations of the disclosure provide methods for generating an in-die reference for die-to-die defect detection techniques. The inspection methods using in-die reference comprise finding similar blocks of a lithographic mask, the similar blocks are defined by similar CAD information. A comparison distance is selected based on (i) areas of the similar blocks and (ii) spatial relationships between the similar blocks. The similar blocks are aggregated, based on the comparison distance, to provide multiple aggregated areas; and comparable regions of the lithographic mask are defined based on the multiple aggregate blocks. Images of at least some of the comparable regions of the lithographic mask are acquired using an inspection module. The acquired images are compared.
US11263738B2	Defect detection in lyophilized drug products with convolutional neural networks In one embodiment, a method includes receiving one or more querying images associated with a container of a pharmaceutical product, each of the one or more querying images being based on a particular angle of the container of the pharmaceutical product, calculating one or more confidence scores associated with one or more defect indications, respectively for the container of the pharmaceutical product, by processing the one or more querying images using a target machine-learning model, and determining a defect indication for the container of the pharmaceutical product from the one or more defect indications based on a comparison between the one or more confidence scores and one or more predefined threshold scores, respectively.
US11263732B2	Imaging processing apparatus and method for masking an object Image processing apparatus 110 for applying a mask to an object, comprising an input 120 for obtaining an image 122, a processor 130 for (i) detecting the object in the image, and (ii) applying the mask to the object in the image for obtaining an output image 60, and the processor being arranged for said applying the mask to the object by (j) establishing an object contour of the object, (jj) generating, based on the object contour, a mask being smaller than the object, and (jjj) positioning the mask over the object for masking a body of the object while keeping clear a border area of the object.
US11263727B2	Image enhancement method, data processing device, and storage medium Provided is an image enhancement method, performed by a data processing device, the method including: performing a first edge-preserving filtering on an original image to obtain a first processed image; obtaining a detail feature of the original image based on the original image and the first processed image; determining a second processed image according to the detail feature and the first processed image; and processing the second processed image in a guided image filtering manner by using the original image as a first guidance image, to obtain a third processed image, and outputting the third processed image to be displayed.
US11263726B2	Method, apparatus, and system for task driven approaches to super resolution An approach is provided for generating a super-resolution image as a higher resolution version of an input image. The approach, for example, involves determining a set of tasks to be performed on the input image to facilitate generating the super-resolution image. The approach also involves selecting a combination of loss functions, wherein each loss function of the combination of loss functions is respectively a task-specific neural network pre-trained to perform a corresponding one of the set of tasks. The approach also involves training the super resolution neural network using the combination of loss functions as one or more layers of the super resolution neural network. The approach also involves using the trained super resolution neural network to generate the super-resolution image as a higher resolution version of the input image.
US11263723B2	Image warping method and device The present disclosure provides an image warping method and an image warping device, including: obtaining an image or a video; identifying at least one target portion of a to-be-warped portrait in the image or the video; and performing a warping process on the target portion using a preset warping algorithm, where the warping process includes one or more of the following processes: enlarging, narrowing down, or shifting. In this way, a portrait in the image or the video can be beautified automatically, without a manual beautification of the image from a user, making the beautification more intelligent and simpler, thereby improving the user experience. Moreover, according to the method of the present disclosure, a warping process can be performed on an image or a video online in real time, or performed on a stored image or a stored video offline, allowing the image warping method to be more widely used.
US11263722B2	Video processing method for remapping sample locations in projection-based frame with hemisphere cubemap projection layout to locations on sphere and associated video processing apparatus A video processing method includes: decoding a part of a bitstream to generate a decoded frame, where the decoded frame is a projection-based frame that includes projection faces in a hemisphere cubemap projection layout; and remapping sample locations of the projection-based frame to locations on the sphere, where a sample location within the projection-based frame is converted into a local sample location within a projection face packed in the projection-based frame; in response to adjustment criteria being met, an adjusted local sample location within the projection face is generated by applying adjustment to one coordinate value of the local sample location within the projection face, and the adjusted local sample location within the projection face is remapped to a location on the sphere; and in response to the adjustment criteria not being met, the local sample location within the projection face is remapped to a location on the sphere.
US11263720B2	Frequent data value compression for graphics processing units A control surface tracks an individual cacheline in the original surface for frequent data values. If so, control surface bits are set. When reading a cacheline from memory, first the control surface bits are read. If they happen to be set, then the original memory read is skipped altogether and instead the bits from the control surface provide the value for the entire cacheline.
US11263717B2	Single secure environment session generating multiple indicia Systems and methods which are adapted to generate multiple indicia in a single secure environment session are described. Embodiments provide for generation of a plurality of postage indicia in a single postage security device (PSD) transaction, whereby the PSD loads and unloads corresponding virtual PSD information a single time for generating the plurality of postage indicia (i.e., in a single secure environment session). The indicia generated in a same secure environment session according to embodiments of the invention may comprise a plurality of indicia requested by a same, single user. Additionally or alternatively, the indicia generated in the same secure environment session may comprise a plurality of indicia requested by multiple different users.
US11263712B2	Selecting photographs for a destination or point of interest Methods, systems, and apparatus, including computer programs encoded on computer storage media, for computerized travel services. One of the methods includes identifying photographs using an index of photographs, the photographs being identified from the index as photographs geographically related to a point of interest or destination and having a creation timestamp corresponding to a time of the year; determining for each of the photographs, a relevancy score based at least in part on: selection success data of the photograph for image queries referring to the point of interest or destination, and references to the point of interest or destination in documents associated with the photograph; and selecting a selected photograph from the photographs based at least in part on a respective visual quality score and the respective relevancy scores, the visual quality score representing a degree of visual quality of the respective photographs.
US11263711B2	Revocable certificates for guestroom access and guestroom controls by mobile devices A system or arrangement of room control with a mobile device by a guest at a hotel, motel, or the like. When a reservation system assigns a guest to a room in, for instance a hotel, the reservation system may request a security certificate from a server that manages a control system in the room. The certificate may be transmitted to the guestroom control equipment and room reservation system. The certificate may be pushed to a mobile device of the guest. Also a key credential may be pushed to the mobile device for room access. The certificate may indicate the date/time period where the certificate is valid and functional aspects that the certificate can support relative to the room. When a guest goes to the room, the mobile device may link up with the control equipment in the room. Both entities having the same certificate can mutually authenticate each other.
US11263710B2	System, method, and apparatus for settlement for participation in an electric power grid Systems and methods for market-based financial settlement of transactions within an electric power grid are disclosed. At least one active grid element is constructed and configured in Internet Protocol (IP)-based network communication with a settlement processor via at least one coordinator in real-time or in a predetermined timeframe. The at least one active grid element generates revenue grade metrology data based on measurement and verification for a participation of the at least one active grid element in the electric power grid. The at least one active grid element provides automated messaging to the settlement processor. The settlement processor provides a market-based financial settlement message based upon the revenue grade metrology data and a kilowatt packet (KWP) unit. The KWP unit provides a quantifying market rate for monetization for any unit of kilowatts with respect to time.
US11263708B2	System, method, computer program and data signal for scheduling at least one physical event A system and method for scheduling at least one event includes a component module arranged to receive component data regarding a plurality of possible operation decisions, a modelling module arranged to utilise the plurality of operation decisions to construct a Petri net model to simulate a real world system, a scheduling module arranged to utilise the Petri net and variable data regarding the plurality of operation decisions to determine a schedule of events that is feasible subject to a set of predetermined constraints, and an operation module arranged to provide the schedule of events to at least one external device.
US11263706B2	Controlling a bounded confidence opinion model with a dynamic population Described is a system for guiding opinions of users of a social media network. The system determines a number of control agents to be inserted into a population of users of the social media network. The system also determines a rate at which an expressed opinion of each control agent should change over a period of time. A control strategy is output which includes a control schedule based on the number of control agents to be inserted into the population of users and the rate at which the expressed opinion of each control agent should change over the period of time. Finally, the control schedule is deployed in the social media network.
US11263702B2	Systems and methods for extracting information from a transaction description The disclosed embodiments include systems and methods for extracting information from a transaction description. In one embodiment, a system is disclosed that may include one or more processors and one or more memory devices storing instructions that, when executed by the one or more processors, performs operations consistent with the disclosed embodiments. In one embodiment, the operations may include receiving a transaction description. The operations may also include identifying known location information corresponding to the transaction description and determining whether information from the transaction description corresponds to the identified known location information. The operations may further include removing location information from the transaction description based on the determination. In another aspect, the operations may also include extracting additional location information from the transaction description that is not associated with the known location information.
US11263701B2	Systems and methods for locating objects and related facilities The disclosure relates to interactive and adaptive systems and methods for tracking location-sensitive objects. An example method includes presenting a first set of user interfaces for receiving a visual image of the location-sensitive object, and using the image to determine an identifier and identify a geographic location. The example method also includes transmitting the identifier and the location to a remote computing device, and in response to receiving location-specific requirements. A second set of user interfaces may be generated and presented to guide a user to comply with the location-specific requirements.
US11263700B1	Communication of insurance claim data Aspects of the invention are directed to methods and systems for efficiently communicating data between an insurer and a non-referral repair shop, e.g., vehicle repair shops that are normally not preapproved by the insurer to perform the estimating and repair work. The methods and systems described herein are particularly useful for insurers utilizing non-referral repair shops for servicing vehicles involved in insurance claims. According to aspects of this invention, the insured may be able to select a non-referral repair shop, not delegated or preapproved by the insurer, thereby generally allowing the insured to select any available vehicle repair shop.
US11263692B2	Controlling a spending account based on user spending habits Aspects described herein may allow for receiving authorization allowing monitoring a user's spending account. A base-line spending profile and a dysfunctional spending profile for the user are established. When notification of a pending purchase transaction is received, a determination is made as to whether the pending purchase transaction is in accordance with the base-line spending profile of the user. If the pending purchase transaction is in accordance with the base-line spending profile of the user, the pending purchase transaction is allowed, however, if the pending purchase transaction is not in accordance with the base-line spending profile of the user, then a temporary secondary approval may be instituted for a predetermined period of time and a secondary approval person is electronically notified that their approval is required before allowing the pending purchase transaction to be made using the spending account of the user.
US11263691B2	System and method for secure transactions at a mobile device Systems and methods for conducting money transfer transactions are provided herein. The systems and methods may include receiving and storing reference fingerprint data associated with a first device. The reference fingerprint data can include reference device usage data corresponding to operation of the first device. Current fingerprint data associated with the first device can also be received. Based on a number of previous transactions performed using the first device, a matching threshold can be retrieved. Using the matching threshold, the current fingerprint data may be verified, thereby enabling the first device to conduct a transaction.
US11263688B2	Shopping method and system for compiling a revised user list on a portable user device using a store list downloaded from a remote database to the portable user device A computer-implemented method of optimising an electronic shopping list is disclosed. The method comprises receiving, at a user equipment, a user list of products; receiving, at a user equipment, a store list of available products, each available product characterised by at least one variable; compiling a revised list from the user list and the store list, comprising associating each product from the user list with one or more available products and arranging an order of the revised list depending upon the at least one variable; and presenting the revised list using the user equipment.
US11263682B2	System and method for coupling a user computing device and a point of sale device Systems and methods are disclosed herein for providing shopping recommendations. Amounts and timing of user purchases are recorded and analyzed to determine consumption rates for various products. A list of recommended products is generated for a user including previous purchases. Expected runout dates for products may be determined based on previous purchases and consumption rates. The list of recommended products may be prioritized based on expected runout dates. A listing of products may be presented with one or both of validation and alternative indicators associated with items of the list. A validation indicator indicates that the product satisfies a criteria and an alternative indicator indicates that an alternative product satisfies the criteria better than the product.
US11263680B2	Knowledge sharing platform Disclosed is a non-transitory computer readable medium storing a computer program. The computer program performs operations for analyzing a video when the computer program is executed by one or more processors of a computing device and the operations may include: separating contents into one or more subcontents by analyzing the contents; matching and storing additional information with the subcontents; receiving search information from a user terminal; and sending at least one of the contents, the subcontents or the matched additional information corresponding to the search information to the user terminal.
US11263671B2	Expandable content items for presenting additional content A method of providing an ad extension includes selecting an advertisement for display. The method also includes selecting additional information related to the advertisement. The method also includes transmitting data representing the advertisement to a browser. The browser interacts with an expandable API to render an inline frame having an advertisement slot. The browser renders and displays the advertisement in the frame. The method also includes transmitting display data representing the additional information related to the advertisement to the browser. The browser receives an input to activate the ad extension. In response to the input, the browser interacts with the expandable API system to expand and render the frame. The browser renders, in the frame, the advertisement slot containing the advertisement. The browser also renders, in the frame, the additional information. The browser displays the expanded inline frame, such that the displayed frame covers a portion of the content.
US11263670B2	Systems and methods for dynamically modifying video game content based on non-video gaming content being concurrently experienced by a user The disclosed systems and methods integrate gaming functionality with viewing a video program. Systems and methods for generating an interactive multimedia game for a user during the viewing of a video program by the user includes a host computer that generates the game in a context of the video program viewed on a first graphical user interface and recommends the video game to the user. The user may opt to engage with the video game on a second graphical user interface, which may be overlaid on the first graphical user interface.
US11263669B2	System and methods for increasing website advertising revenue while maintaining low latency Header bidding systems and methods increase a number of advertisers that can place bids for an advertising impression while maintaining low latency in loading of the webpage. The systems and methods utilize a specialized control wrapper in the header to manage one or more additional wrappers so as to allow for simultaneous bid collection from multiple groups of advertisers, one group per wrapper, without experiencing the traditional increase in latency of page loading as the number of entities bidding on an impression increases. Each wrapper contains information relating to a separate subset of advertisers from which to receive bids for the advertising impression. The control wrapper, as part of the header of the webpage, controls synchronization and timing of the separate bid processes controlled by the various wrappers to ensure that latency issues are avoided while the number of bids received is increased and revenue maximized.
US11263668B2	Press release distribution system A press release distribution system provides press release and other news to forum sites as posts. The forum software that runs at forum sites includes press release interface software or is adapted to receive press release interface plug-in modules for interfacing with the press release distribution system. The press release interface software or plug-in module may also monitor and/or analyze user data of forum members and/or forum activities of the users. The monitored user data and forum activities may be provided to the press release distribution system for analysis and generation of user profiles. Using the result of the analysis (e.g., user profiles), the press release distribution system can target particular users or forums to direct the press releases, news, or advertisements for most effective advertising campaign.
US11263660B2	Attribution of response to multiple channels Various implementations for multitouch attribution are described. One example method includes receiving a plurality of channel data associated with a first channel and second channel, determining conversion data for the first channel and the second channel using the plurality of channel data, receiving a first touch event and a second touch event associated with a first channel and a second channel, determining a first attribution for the first channel using a first touch event and the first channel data, determining a second attribution for the second channel using a second touch event and the second channel data, and determine an item conversion strategy using the first attribution and the second attribution.
US11263659B2	Dynamic promotion analytics A promotion program analytical system and method is disclosed. The promotion program analytical system and method selects a promotion program to offer to a consumer. Selection of the promotion program to present to the consumer includes determining a probability that the consumer will accept the promotion program. The probability of acceptance may be determined based on past performance data of similar promotion programs, and also past performance data on the promotion program itself when it is available.
US11263657B2	Systems and methods for improved brand interaction Systems and methods for improved brand interaction including a method for brand promotion comprising the steps of: receiving a media broadcast signal comprising a media signal and a unique promotion code with a media receiver; reading said unique promotion code from said media broadcast; broadcasting said promotion code using a communication network associated with the media receiver; receiving the promotion code with a computing device; correlating the promotion code with a promotion database; receiving social link data from the promotion database; wherein the computing device is adapted to provide user engagement with the link data.
US11263650B2	Process and system to categorize, evaluate and optimize a customer experience A system and a process using that system is provided for creating, analyzing and optimizing a customer journey. The process includes real-time creation and continuing analysis of an “Event Sequence Index,” (ESI) corresponding to a time-stamped labeled set of data points representing cumulative events along the customer journey. The data points are further associated with channels, which are modes of interaction between the customer and the organization, and mapped into a linked directed graph which is amenable to analysis through a recursive pattern matching method, such as a non-deterministic finite automaton, employing DQL (Distributed Query Language). Selected portions of these graphs can be identified, either statistically or causally, as signatures of highly satisfactory or unsatisfactory outcomes and may be stored in memory as real-time predictors of the course of a present customer experience and to suggest statistically feasible and effective interventions. Concurrently, the signatures may be used as feedback to an organization for improvements in customer relations.
US11263647B2	Method, management server and computer readable recording medium for managing a customer relationship Disclosed herein is a method for managing customer relationship through multiplex-assigning password of access point. According to an exemplary embodiment of the present invention, a method for managing a customer relationship by a customer management server includes: receiving customer terminal information including customer terminal identification information and customer group identification information within a shop being transmitted by accessing the access points of a plurality of customer terminals; and setting the plurality of accessed customer terminals as the same group in customer groups within the same shop based on the received customer group identification information within a shop and storing the set group in customer information corresponding to the customer terminals included in the group as customer social information.
US11263646B1	Systems, apparatus, and methods of programmatically determining unique contacts Systems, apparatus, and methods for determining unique contacts from a collection or pool of merchant data are discussed herein. Some embodiments may provide for an apparatus including circuitry configured to: access first merchant data associated with a first merchant; access second merchant data associated with a second merchant; determine a match score based the first merchant data and the second merchant data indicating a likelihood of the first merchant being the same as the second merchant; determine a match score threshold; determine whether the match score exceeds the match score threshold; and in response determining the match score fails to exceed the match score threshold, determine the first merchant as being different from the second merchant. Some embodiments may provide for techniques for machine learning with merchant data training sets to determine match scores.
US11263641B2	Cognitive operational vehicle blockchain for privileges, licensing, evaluation, authorization, and training Providing a cognitive blockchain for user privileges is provided. A distributed secure encrypted ledger is established for storing information related to privileges for users across a plurality of nodes in a permissioned network with known identities. An internet of things (IoT) device node in the plurality of nodes records a first block in the distributed secure encrypted ledger containing activity information related to a privilege corresponding to a user of the IoT device node. A licensing node in the plurality of nodes evaluates information in the first block. The licensing node records a second block containing privilege information corresponding to the user of the IoT device node based on the evaluating.
US11263638B2	Scheme for frictionless cardholder authentication A method is provided for cryptographically authenticating a cardholder in an online transaction by sending an authentication request to the issuing bank that is intercepted by a service worker and handled within the cardholder's computing device. The service worker signs a description of the transaction with a private key or forwards the request to a bank app that authenticates the cardholder biometrically in addition to signing the transaction.
US11263635B2	Check-out system and registration apparatus A registration apparatus stores priority which is set for each of a plurality of payment apparatuses. If a condition to update the priority is established, the registration apparatus updates the priority, based on data indicating a state of each payment apparatus. The registration apparatus transmits accounting data and data on the priority, to a payment apparatus having a top priority. A payment apparatus pays a transaction by transmitting a permission response to the registration apparatus, when receiving the accounting data and the priority data in a state where the payment of the transaction is possible. The payment apparatus transfers the accounting data and the priority data to another payment apparatus having a lower priority than the payment apparatus, based on the priority data, when the accounting data and the priority data are received in a state where the payment of the transaction is not possible.
US11263634B2	Payment method and device Methods, systems, and apparatus, including computer programs encoded on computer storage media, for a payment based on a face recognition are provided. One of the methods includes: acquiring first face image information of a target user; extracting first characteristic information from the first face image information, wherein the first characteristic information includes head posture information of the target user and gaze information of the target user; determining whether the target user has a willingness to pay according to the head posture information of the target user and the gaze information of the target user, including determining whether an angle of rotation in each preset direction is less than an angle threshold and whether a probability value that a user gazes at a payment screen is greater than a probability threshold; and in response to determining that the target user has a willingness to pay, completing a payment operation based on the face recognition.
US11263633B2	Systems and methods for biometric payments Systems and methods for biometric payments are disclosed. In one embodiment, a method for biometric payments may include (1) receiving transaction information from a merchant terminal, the transaction information comprising an identification of a good or service to purchase and a biometric payment instruction; (2) at least one computer processor authenticating the individual based on the biometric payment instruction; (3) the at least one computer processor determining a payment account from the biometric payment instruction; (4) the at least one computer processor retrieving a payment device associated with the payment account; and (5) the at least one computer processor providing the payment device to the merchant terminal.
US11263631B1	Funds transfer authentication The innovation disclosed and claimed herein, in one aspect thereof, comprises systems and methods of funds transfer authentication. The authentication can include receiving a transfer request to transfer funds from a payer to a payee, the transfer request identifies the payer, the payee, and an amount to transfer. Customer information associated respectively with the payer and the payee is identified. The payer and the payee are authenticated. A communication session is opened between the payer and payee. A time-limited payee OTP is generated and sent to the payee. The payee OTP is received within a first time limit. The funds are transferred from the payer to the payee based on receiving a matching payee OTP.
US11263627B2	Card voucher use system, method, device and server A card use system includes a first client configured to send a card use request including card information of a card, and display a payment code including a first resource account number corresponding to the first client; a second client configured to send a payment request to transfer a first quantity of resources from the first resource account number to a second resource account number corresponding to the second client; a card server configured to validate the card according to the card information; and in response to successfully validating the card, send a confirmation indication to the payment server; and a payment server configured to, in response to receiving the confirmation indication from the card server, transfer a second quantity of resources in the first resource account number corresponding to the first client to the second resource account number corresponding to the second client.
US11263620B2	Consumer device payment token management Systems and related methods for facilitating payments via a consumer device carried by a consumer are discussed herein. Wallet identifying tokens may be used to secure messages between the consumer device and the merchant device over a wireless link. For example, the merchant device may include circuitry configured to wirelessly receive a wallet identifying token from a consumer device and to transmit the wallet identifying token to the central system. In response, consumer identifying data associated with the wallet identifying token may be received by the merchant device from the central system. In some embodiments, payments may be secured via limiting the lifetime of wallet identifying tokens after initial use.
US11263612B2	Systems and methods for point of sale data synchronization The present disclosure relates generally to providing a mechanism for communication between point of sale devices. Using network technology and novel processes, the present systems and methods can share transaction records among multiple devices without the presence of a physical server. For example, in certain embodiments, the present systems and methods leverage virtual server technology to implement local area networks of point of sale devices with zero configuration.
US11263606B2	Consumer due diligence for money transfer systems and methods A method of transferring money from a sender to a recipient using a third party money transfer service a point of sale device receiving transaction details for a requested money transfer; determining whether the requested transaction is an allowable transaction; and either aborting the transaction; attempting to identify the sender as an existing customer using the transaction details; using the sender's transaction history and the transaction details to determine whether to allow the requested transaction to proceed. If the requested transaction is allowed to proceed, the method includes creating a money transfer record for the requested transaction; associating a money transfer control number to the money transfer record; and using the transaction details to determine whether to monitor the requested transaction.
US11263603B1	Security asset packs In one embodiment, a method includes identifying, by a payment service, a plurality of security assets for inclusion in a pack of security assets. A value of the pack of security assets may be determined based on weighted values of a base unit of each of the security assets. Information may be sent to a first user's client device to display a user interface to purchase the pack of security assets. In response to receiving a purchase request in a specified amount, the payment service may calculate, for each of the security assets in the pack, the base units of the security asset based on the respective assigned weight and the value of a base unit of the security asset. Finally, for each of the security assets in the pack, ownership of the calculated number of base units of the security asset may be assigned to the first user.
US11263601B2	Electronic receipt manager apparatuses, methods and systems The ELECTRONIC RECEIPT MANAGER APPARATUSES, METHODS AND SYSTEMS (“ERM”) transforms transaction initiation requests and receipt requests via ERM components into receipt formatting, organization, storage and linkage with transactions. The ERM may be configured to receive a receipt through an interface of a portable device and determine a set of fields for formatting data from the receipt. The ERM may format the data from the receipt to include the set of fields and store the formatted data in a memory element of the portable device.
US11263599B2	Plastic waste system and method The present application overcomes the disadvantages of the prior art by providing a system for proper life-cycle management of plastic products and the plastic waste that plastic products produce.
US11263597B2	Workscope system and method of use thereof There is provided a system for workscoping an asset. The system includes a processor and a memory that includes instructions that, when executed by the processor, cause the processor to perform operations including fetching information indicative of a service bulletin and associating the information with a module of the asset.
US11263591B2	Method and system for centralized contact management Disclosed is a method and system for managing contacts for a communication system by storing contact information in a centralized storage system and permitting receiving users to access the centralized contact information storage system using a token passed with communications from a sending user. The communications system may be a trusted network with trusted sending and receiving members. Each communications system member provides contact information the member may wish to make available to other parties. The member may also create a policy defining which contact information may be made available to different classes of users. A member of the communications system generates a message to send to a receiving user. A token that identifies the sending user to the communications system is embedded into the message to be sent to the receiving user. The receiving user, after identifying the message as a message containing a token, may request contact information for the sending user from the communications system using the token identifying the sending user to the communication system. The communication system delivers a subset of the sending user's contact information to the receiving user based on the sending user's contact information and policy definitions stored in the centralized contact information storage system of the communication systems. The system and method are especially adaptable to e-mail communications, but other forms of electronic communications may also be included in an embodiment, either solely or in combination.
US11263590B2	Cognitive assessment of permit approval A prediction system and method may include receiving a plurality of discrete applicant data inputs and a supporting document, the applicant data inputs and the supporting document being relevant to a permit application, providing a first predicted probability of approval of the permit application by comparing the discrete applicant data inputs with weighted criteria of previous applicant profiles stored in a first database, analyzing the supporting document to determine a second predicted probability of approval of the permit application by comparing the supporting document with previous applicant supporting documents stored in a second database, performing a sentiment analysis on external publically available information relevant to at least one aspect of the permit application to determine an impact score on the permit application, and determining an overall probability of success based on the first predicted probability, the second predicted probability, and the impact score.
US11263589B2	Generation of automated job interview questionnaires adapted to candidate experience According to embodiments of the present invention, a system is provided that will evaluate a candidate's experience (e.g., curriculum vitae (CV), resume, application, etc.) in view of job description requirements, and based on this combined information, will automatically generate a customized interview including questions tailored to each candidate related to his or her experience as described on the application and in view of the job description requirements.
US11263588B2	Intelligent document management in computing systems Computer systems, devices, and associated methods of intelligent content management are disclosed herein. In one embodiment, a method includes scanning a document to determine whether one or more words in the document represent a resource in the file management system, the resource being a name of a person or a linked document in the file management system. In response to determining that one or more words in the document represents a resource, the method includes retrieving a resource record corresponding to the resource from a database in the computing system, the resource record having a data field containing data representing a current status of the resource and surfacing, in the document, the retrieved data of the current status of the resource to the user.

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