最新美国发明专利第2019-02-05期 - 专利汇|PatentHub专利检索|专利查询网|发明专利查询分析

Document	Document Title
US10200378B2	Systems and methods for access to electronic data Systems, methods, and machine readable medium are provided for improving access to electronic data. An application is provided that generates a graphical user interface on a first client device requesting the server-based application via a web browser on the first client device. Credentials from a user of the first client device. After authorization of the user credentials, input from the user is received via the graphical user interface indicating an URL for a website, a file path for a document, and text. The entered input is stored in a local browser cache on the first client device and in a remotely-located database as being associated with the user credentials. Subsequently, a display is generated on the first client device, by the application, of electronic data related to the entered input.
US10200373B2	Method and apparatus for providing and receiving contents via network, method and apparatus for backing up data via network, backup data providing device, and backup system Provided are methods and apparatuses for providing contents via a network, in which original data of contents provided via a network can be traced, and contents that are modified according to performance of a contents receiving device is provided. Location information of original contents is added to metadata of contents provided via the network to thereby increase convenience of access to the original contents and modify attributes of contents that are provided, to be suitable for the performance of the contents receiving device.
US10200372B2	Principal access determination in an enviroment An access determination management system obtains information regarding various different entities in a system (e.g., a networked environment) and what rights or privileges those entities have. An entity, also referred to herein as a principal, can be a user, a computing device, a group of users, a group of computing devices, or a service. The rights or privileges that an entity has includes, for example, whether administrative privileges are available to the entity, whether a particular program can be executed, whether an entity is a member of another entity, and so forth. The access determination management system uses the obtained information to generate and display a graph of the environment. The graph of the environment includes the different objects as well as links between the objects that indicate rights or privileges one object has with respect to another.
US10200370B2	Apparatus, system, and method for authorizing a service Systems include a service-provider device; and a browser loaded on a first device. To connect the service-provider device with the first device, the browser fetches a device ID from the first device, and sends a request for a service to the service-provider device with the device ID. The service-provider device determines whether the service is allowed to be provided by checking whether the device ID is registered.
US10200366B2	Apparatus and method by which user device in home network system transmits home-device-related information An apparatus and method by which a user device in a home network system transmits home-device-related information is provided. The method includes acquiring, from at least one home device, a unique user identifier (UUID) for a related home device, a peer ID (peer ID) which is managed by a connectivity server for managing a connection between the user device and the related home device and that identifies the related home device, a peer group ID for identifying a group of home devices that have registered with a service server for managing device information on the related home device, and a device token containing key information for authenticating the connection to the related home device, selecting a specific user device which will share the UUID, peerID, peer group ID and device token from among neighboring devices, and transferring the UUID, peerID, peer group ID, and device token to the specific user device on the basis of a predetermined sharing method.
US10200365B2	Identity challenges A biometric authentication system is disclosed that provides authentication capability using biometric data in connection with a challenge for parties engaging in digital communications such as digital text-oriented, interactive digital communications. End-user systems may be coupled to devices that include biometric data capture devices such as retina scanners, fingerprint recorders, cameras, microphones, ear scanners, DNA profilers, etc., so that biometric data of a communicating party may be captured and used for authentication purposes.
US10200362B2	Method and system for verifying an account operation Method and server system for user login verification are disclosed. The method includes: obtaining a verification request from a first device for an account operation requested by a user using a first account; identifying, from the server system, usage history data associated with the first account, including data regarding usage of the first account on the first device; determining, in accordance with the data regarding the usage of the first account on the first device and one or more predetermined usage history criteria, whether the account operation associated with the first account on the first device is safe; and in accordance with a determination that the account operation associated with the first account on the first device is not safe, initiating a verification process based on a second device that qualifies as being safe for the account operation.
US10200357B2	Mobile single-sign-on authentication using browser as intermediary Features are disclosed for authentication of mobile device applications using a native, independent browser using a single-sign-on system. An authentication module within the mobile application can direct the mobile device's native browser to a URL to initiate authentication with an authentication appliance. The mobile browser can receive and store a browser-accessible token to indicate previous authentication performed by the user. The mobile application can receive from the application appliance and store a client application ID token that may be presented to network services for access. A second mobile device application may direct the same browser to the authentication appliance. The authentication appliance may inspect the persistent browser-accessible token and issue a second client application ID identity to the second application without collecting additional authentication information, or collecting additional authentication information that is different from the first authentication information.
US10200355B2	Methods and systems for generating a user profile Systems and methods are provided for authenticating a user. The systems and methods include receiving a request to generate a user profile from a device of a user. The systems and methods may determine first information associated with a first entity from the request, and may also determine second information associated with a second entity distinct from the first entity from the request. The systems and methods may access, using system credentials not associated with the user, multiple distinct data sources in a specified order to retrieve additional information. Accessing these multiple distinct data sources may include retrieving a first item of the additional information using the first information, and retrieving a second item of the additional information using the second information. The systems and methods may authenticate the user based on the additional information, and may generate a user profile based in part on the additional information.
US10200349B2	Secured file transfer management on augmented reality (AR) and virtual reality (VR) devices In one embodiment, a computer program product includes a computer readable storage medium having program instructions embodied therewith. The embodied program instructions, in response to being executed by a processing circuit, cause the processing circuit to receive an eye gaze of a source user generated by a source augmented reality or virtual reality device (source AR/VR device) on a receiver AR/VR device and determine gazed content from the eye gaze of the source user using a password key phrase determination feature. The embodied program instructions also cause the processing circuit to generate a symmetric password key utilizing the gazed content according to a set of password determination rules and receive encrypted data from the source AR/VR device on the receiver AR/VR device. Additionally, the embodied program instructions cause the processing circuit to decrypt the encrypted data using the symmetric password on the receiver AR/VR device.
US10200348B2	Method to detect an OTA (over the air) standard message affected by an error A method is to detect a message compatible with the OTA (Over The Air) standard and affected by a wrong ciphering. The method may include receiving the ciphered OTA message; deciphering the OTA message; and reading a counter field of padding bytes in the deciphered OTA message and reading corresponding padding bytes in the OTA message deciphered. The method may also include detecting at least one bit in at least one of the padding bytes of the OTA message deciphered, with the at least one bit being indicative of the wrong ciphering.
US10200347B2	Homomorphic encryption in a healthcare network environment, system and methods A system and method for homomorphic encryption in a healthcare network environment is provided and includes receiving digital data over the healthcare network at a data custodian server in a plurality of formats from various data sources, encrypting the data according to a homomorphic encryption scheme, receiving a query at the data custodian server from a data consumer device concerning a portion of the encrypted data, initiating a secure homomorphic work session between the data custodian server and the data consumer device, generating a homomorphic work space associated with the homomorphic work session, compiling, by the data custodian server, a results set satisfying the query, loading the results set into the homomorphic work space, and building an application programming interface (API) compatible with the results set, the API facilitating encrypted analysis on the results set in the homomorphic work space.
US10200346B2	System and method of efficiently generating and transmitting encrypted documents The present specification discloses an improved method of encrypting a file and distributing the encrypted file over a network from a user computer to a remote computer, which includes providing an interface to a file encryption application to a user; receiving an input designating an encryption option from among a plurality of encryption options; based upon said input designating an encryption option, and based upon a format of said file, causing a separate application specific to said format to encrypt said at least one file, wherein said encrypted file is adapted to be decrypted using a passcode and wherein said passcode is transmitted to the user via at least one message type.
US10200345B2	Electronic mail sender verification An e-mail server decrypts attachments of an e-mail message with a key associated with a sending device such that failure of the decryption indicates the e-mail message can be harmful. The sending device inserts its device identifier into the e-mail message as a header and uses an encryption key associated with the device identifier and a digital fingerprint of the sending device to encrypt all attachments of the e-mail message. The delivering e-mail server processes the e-mail message. If the e-mail message contains no identifier, if no key is associated with the parsed identifier, or if attempted encryption fails, the e-mail server determines that the e-mail message is potentially harmful and disarms the e-mail message.
US10200343B2	Implementing logical network security on a hardware switch Some embodiments provide a method for configuring a hardware switch to implement a security policy associated with a logical router of a logical network. The method receives a logical router definition. The logical router logically connects a physical machine, connected to a physical port of the hardware switch, to several VMs that execute on a set of host machines. The method defines a set of routing components for the logical router, each of which, has several interfaces. The method receives a security policy that includes a set of security rules for the physical machine and populates an ACL table with ACL rules data generated based on the received set of security rules. The method then for at least one interface of one of the routing components, generates linking data that links a set of one or more ACL rules in the ACL table to the interface of the routing component.
US10200342B2	Dynamic configurations based on the dynamic host configuration protocol Some embodiments provide a method for dynamically configuring multiple instances of applications that operate on clients in a network system. The method of some embodiments uses the Dynamic Host Configuration Protocol (DHCP) to configure the multiple instances of each application to share a pool of resources specific to the application that are used for configuring the application on each of the clients. Some embodiments of the invention store an application ID in DHCP-formatted packets to differentiate the packets from DHCP packets and to distribute shared configuration resources between various instances of the application.
US10200340B2	Client traffic redirection service Disclosed are various embodiments for performing network traffic redirection at the client side. Sending of data to a service at a network address is initiated. Whether the network address is in a predetermined network address range is determined. The network address is translated, when the network address is in the predetermined network address range, to one of multiple other network addresses based at least in part on an availability of the service at the other network address. The data is routed to the other network address.
US10200338B2	Integrating communication modes in persistent conversations Systems, methods and computer readable media for persistent conversations are described. In some implementations, a method can include receiving a communication message sent from a first user to at least one other user and generating a persistent conversation object having a conversation content section and conversation state information. The method can also include storing the communication message in the conversation content section of the persistent conversation object and forwarding the communication message to the at least one other user. The method can further include updating the conversation state information to reflect the receiving, storing and forwarding of the communication message.
US10200335B2	Dynamic chat box In one embodiment, a method includes receiving from multiple client devices real time click-stream data indicative of multiple users accessing a content object within a structured document displayed as a web page and storing presence information associated with each of the users in a server associated with a social-networking system. The method also includes identifying one or more of the users based on the presence information, where each of the identified users accessed the content object within a specified time period and the identified users are within a specified degree of separation from each other on the social-networking system. The method further includes sending, to the client device associated with a first user of the identified users, instructions to modify a representation of the web page to include a messaging interface including presence information associated with one or more second users of the identified users.
US10200332B2	Delivery of haptics to select recipients of a message Systems and methods, by which a sender can deliver haptic messages to selected recipients within a larger group of recipients that are otherwise receiving a common message, are disclosed. The haptic messages can be individualized according to a recipient's profile, preference, and/or relationship with the sender. The haptic message can be created by the sender or selected from a pre-existing library of messages, and can be delivered automatically or assigned by the sender. The haptic messages can be dynamically changed in response to haptic feedback and supplemental data collected from the recipients that is used to update preferences and profiles of message recipients.
US10200329B2	Method and device for detecting abnormal message based on account attribute and storage medium Disclosed is a method for detecting an abnormal message, comprising: diving a text of a detected message into a plurality of text segments; obtaining one or more account attributes of each text segment, and determining a publication proportion parameter corresponding to the account attributes of each text segment; determining a first factor corresponding to the account attributes of each text segment according to the publication proportion parameter; determining a second factor of the detected message according to the first factor corresponding to the account attributes of each text segment; and determining according to the second factor of the detected message whether the detected message is an abnormal message. Through the combination of publication account attributes of messages with undifferentiated text segmentation and the use of Bayesian algorithm, batches of junk messages of a microblog account are effectively limited, and the flexibility of junk message processing is improved.
US10200327B1	Storage management for ephemeral messages A storage controller processes electronic messages by partitioning a storage device into logical disks and designating a logical disk as unavailable based on its storage capacity being fully used. A time is assigned to each logical disk that is available for writing, and an estimated deletion time is determined for an electronic message. The electronic message is stored in a logical disk that is identified by comparing the assigned times of the logical disks to the estimated deletion time of the electronic message. The electronic message may be deleted based on the detection of a triggering event. If a deletion of a message results in an unavailable logical disk having more than a threshold amount of unused storage capacity, then each of the electronic messages stored in the unavailable logical disk may be copied to a logical disk available for writing and the unavailable designation may be removed from the logical disk.
US10200325B2	System and method of delivering confidential electronic files A sending computer (sender) delivers private messages over a network via dynamically established encrypted channels where no copies of the message are persisted on third party computers. Private messages are routed dynamically based on membership status of the receiving computer (receiver) and direct addressability status of the sender and receiver. The system determines membership status of the receiver and provides a notification message and delivery link to the receiver when the receiver is not a member of the private network. When the receiver is a member, direct addressability of sender and receiver is determined, and the message is delivered directly to the receiver over an encrypted channel when the sender is directly addressable. When the sender is not directly addressable, the encrypted channel between the sender and receiver is established through a third party relay without persisting a copy of the private message on the third party relay.
US10200323B2	Method and system for communicating between a sender and a recipient via a personalized message including an audio clip extracted from a pre-existing recording A method of communicating between a sender and a recipient via a personalized message, including steps of: (a) identifying text, via the user interface of a communication device, of a desired lyric phrase from within a pre-existing audio recording; (b) selecting visual data, such as an image or video, to be paired with the desired lyric phrase; (c) extracting audio substantially associated with the desired lyric phrase from the pre-existing recording into a desired audio clip; (d) inputting personalized text via the user interface; (e) creating the personalized message with the sender identification, the personalized text and access to the desired audio clip; and (e) sending an electronic message to the electronic address of the recipient. Clips may be generated automatically based on a relevance score. The electronic message may be a text message, instant message, or email message; this message may alternatively have a link to the personalized message.
US10200319B2	Searchable peer-to-peer system through instant messaging based topic indexes An embodiment of the present invention, a computer receives, on a first computer, a request to locate a topic. The computer determines a second computer to query for the topic. The computer queries the second computer for the topic. The computer receives identification information of participants of an instant messaging conversation corresponding to the topic. The computer stores, on the first computer, the identification information of the participants and indexing the stored identification information by the topic.
US10200312B1	Power management of routing tables using horizontal scaling Power management of a routing table is provided by supporting various power domain configurations. Each power domain configuration can be associated with a different number of power domains than other power domain configurations. Efficient power management can be achieved by switching between a lower power domain configuration and a higher power domain configuration during run-time based on the dynamic load conditions.
US10200300B2	Maintaining named data networking (NDN) flow balance with highly variable data object sizes A network device in a Named Data Networking (NDN) network receives an Interest from a consumer including a name and an Expected Data Size of data requested through the Interest. The network device forwards the Interest along a path to a producer of the data based on the name. As a result, the network device receives data that has traversed the path in reverse and satisfies the forwarded Interest. The network device determines an actual data size of the received data. The network device compares the actual data size to the Expected Data Size. If the actual data size is greater than the expected data size, and if a level of traffic congestion associated with forwarding the received data to the consumer is below a threshold, forwarding the received data to the consumer along a path based on the name of the data.
US10200297B2	Methods, queueing system, network element and network system for queueing and processing of packets Method for queueing packets, each packet of the packets including timing information representing a remaining time until a deadline associated with delivery at its destination; the system including N queues, each queue thereof being configured for buffering at least one packet, the N queues having a cyclic order; the method including keeping track of a pointer, initially pointing to a queue of the N queues; afterwards, repeatedly incrementing the pointer over the N queues, according to the cyclic order, after each passing of a scheduling interval S; enqueueing each packet of the packets in a queue of the N queues, that queue differing from the queue to which the pointer is pointing, based on the packet's timing information and taking into account the cyclic order; and dequeueing enqueued packets from the N queues, while prioritizing dequeueing from the queue to which the pointer is pointing.
US10200294B2	Adaptive routing based on flow-control credits A method for network communication includes receiving in a network element a packet for forwarding to a destination node. The destination node is reachable via two or more candidate ports of the network element that are connected to respective next-hop network elements. Link-level flow-control credit notifications are received in the network element from the next-hop network elements via the respective candidate ports. An egress port is selected for the packet, from among the candidate ports, based at least on the received link-level flow-control credit notifications. The packet is forwarded toward the destination node over the selected egress port.
US10200293B2	Dynamically offloading flows from a service chain Dynamically by-passing a service function instance on a service chain after the service function instance has processed the first few packets of a traffic flow may improve the overall processing efficiency of the service chain. When using a control plane mechanism, a service function instance communicates a by-pass indication to a control plane entity to prompt the control plane entity to re-route remaining portions of the traffic flow around the service function instance. When using a data plane mechanism, a service function instance includes a by-pass indication in a service chain header (SCH) of a packet in a traffic flow, and forwards the packet to a data plane entity. The by-pass indication will prompt the data plane entity to re-route remaining portions of the traffic flow around the service function instance.
US10200291B2	Packet analysis method, packet analysis device, and storage medium A packet analysis method includes acquiring a first acknowledge packet and a second acknowledge packet transmitted from the first device; acquiring a plurality of packets transmitted from the second device during a period from reception of the first acknowledge packet to reception of the second acknowledge packet; identifying a number of packets corresponds to data transmitted from the second device, by calculating a difference between a first identification number corresponding to the first acknowledge packet and a second identification number corresponding to the second acknowledge packet; calculating a plurality of bandwidth values, a number of the plurality of bandwidth values is identical to the number of packets, based on acquisition timings of the plurality of packets and an interval between the acquisition timings of two adjacent packets; and determining a bandwidth value that is to be removed from the plurality of bandwidth values by comparing the plurality of bandwidth values.
US10200289B2	Data packet processing method, apparatus, and system in software defined network SDN A method executed by a control device in a software defined network is disclosed. According to the method, after establishing a control channel with a switching device, the control device obtains an identifier of the control channel. Then, the control device generates a flow entry, where the flow entry includes a match field and the identifier of the control channel. Further, the control device sends the flow entry to the switching device, where the flow entry is used to instruct the switching device to send, to the control device using the control channel represented by the identifier of the control channel, a data packet that matches the match field. Hence, classification of a new flow is completed on a switching device side.
US10200280B2	Software-defined network for temporal label switched path tunnels A method implemented by a temporal tunnel service (TTS) controller, comprising computing a path in a network for a temporal label switched path (LSP), wherein the path satisfies a network constraint in a time interval comprising a predetermined start time and a predetermined end time, reserving, at a current time prior to the predetermined start time, a network resource along the path computed for the temporal LSP, wherein the network resource is reserved for the temporal LSP to carry traffic in the time interval, and creating the temporal LSP in the network by sending a route configuration instruction to each node along the path of the temporal LSP.
US10200279B1	Tracer of traffic trajectories in data center networks A SDN controller is configured to generate and install a tracing table with tracing rules into switches of a SDN based on a switch level in a network topology of the SDN; identify a source switch and a destination switch for tracing a trajectory path of a transit packet; generate a probe packet; set all bytes in a source address to zero and initialize a DSCP field to 16; inject the probe packet into the source switch; encode selective ingress ports of intermediate switches within the trajectory path into the source address of the probe packet; receive the probe packet when the probe packet reaches the destination switch; and reconstruct the trajectory path of the transit packet, via encoded information in the source address of the probe packet, wherein the reconstructed trajectory path is constructed via the encoded selective ingress ports of the one or more intermediate switches.
US10200278B2	Network management system control service for VXLAN on an MLAG domain Various embodiments are described herein that provide a network system comprising a first network element coupled to a network and a second network element directly coupled to the first network element. The first network element and the second network element are to connect to form a link aggregation group. The system additionally includes a network management device including a control agent, where the control agent is configured to configure the link aggregation group as a logical virtual tunnel end point (VTEP) of a virtual local area network (VLAN).
US10200276B2	Method, apparatus and system for controlling routing information advertising The application disclose a method, an apparatus and a system for controlling routing information advertising, which relates to the field of communications and is used for reducing the configuration complexity and reinforcing the operability. The method includes: receiving, by a control device, first routing information sent by a first forwarding device; wherein the first routing information includes an identifier of the first forwarding device; determining a first routing path according to the identifier of the first forwarding device, an identifier of a second forwarding device and a routing path group; and determining an advertising range of second routing information for the second forwarding device according to the first routing path; for enabling the second forwarding device to advertise the second routing information according to the advertising range of the second routing information.
US10200274B1	Enhanced traffic flow in software-defined networking controller-based architecture In one example, a method includes by a Software Defined Networking (SDN) controller, receiving one or more virtual routes to virtual interfaces from a first virtual router agent managed by the SDN controller, the one or more virtual routes received via a messaging protocol session between the SDN controller and the first virtual router agent; storing, by the SDN controller, the one or more virtual routes to a data structure; in response to determining the messaging protocol session has closed, marking, by the SDN controller, the one or more virtual routes in the data structure as stale without deleting the one or more virtual routes from the data structure and without withdrawing the virtual routes from routing protocol peers of the SDN controller; and subsequent to marking the one or more virtual routes as stale, sending, by the SDN controller, the one or more virtual routes to a second virtual router agent.
US10200271B2	Building and testing composite virtual services using debug automation A method for testing a composite service is provided. The method may include installing a first debug probe on a first service. The method may include installing a second debug probe on a second service. The method may include executing the composite service, whereby the composite service comprises the first service and the second service. The method may include receiving a first service interaction log and a second service interaction log, whereby the first interaction log records a first plurality of I/O, and whereby the second interaction log records a second plurality of I/O. The method may include generating a global scheduling script based on the first service interaction log and the second interaction log. The method may include sending the first plurality of I/O to the first debug probe and the second plurality of I/O to the second debug probe based on the global scheduling script.
US10200270B2	Correlation of media plane and signaling plane of media services in a packet-switched network This invention relates to methods for correlating media streams and signaling sessions of services, for example, in a passive monitoring system of a packet-switched network. Furthermore, the invention also relates to an implementation of these methods in hardware and software, and provides a signaling plane probe, a media plane probe and a correlation unit. Moreover, a passive monitoring system comprising one or more of these hardware devices is provided. To correlate media streams and signaling sessions of services, the invention proposes to independently generate correlation keys in a media plane probe for monitored media streams and correlation keys for signaling sessions that are monitored by a signaling plane probe in a fashion that matching correlation keys are generated for a respective service. By identifying reports on the media streams and reports on the signaling session that contain matching correlation keys respectively, the media streams and the signaling streams are correlated in a correlation unit.
US10200268B2	Methods and systems for congestion-based content delivery Content delivery is adapted based on network congestion. A method identifies multiple types of content, including a first type and a second type. The method receives, via a network, a first upload request to upload content of the second type from a client device and a second upload request to upload content of the first type from the client device. The method also determines a degree of congestion of the network. This includes obtaining historical latency data for the network and estimating a latency of the network based at least in part on the historical latency data. The method also determines whether the degree of congestion satisfies a congestion criterion. When the degree of congestion of the network satisfies the congestion criterion, the method prioritizes the first type of content over the second type of content and delays the first upload request while granting the second upload request.
US10200264B2	Link status monitoring based on packet loss detection In exemplary embodiments of the present invention, special metadata is added to link monitoring protocol messages exchanged by pairs of adjacent nodes to allow such nodes to detect communication link failures and determine whether the failure affects an incoming communication link or an outgoing communication link. The link monitoring protocol messages may be augmented BFD messages.
US10200259B1	Systems and methods for detecting obscure cyclic application-layer message sequences in transport-layer message sequences The disclosed computer-implemented method for detecting obscure cyclic application-layer message sequences in transport-layer message sequences may include (i) collecting a composite sequence of transport-layer messages that are exchanged between a first computing device and a second computing device over a single long-standing transport-layer connection, (ii) constructing a sequence graph from the composite sequence, (iii) traversing the sequence graph to discover a first obscure cyclic sequence of application-layer messages in the composite sequence, and (iv) performing a security action using a representation of the first obscure cyclic sequence. In some examples, the composite sequence may include the first obscure cyclic sequence and a second obscure cyclic sequence of application-layer messages that were exchanged by the first computing device and the second computing device, and each message in the composite sequence may include a distinguishing feature. Various other methods, systems, and computer-readable media are also disclosed.
US10200257B2	Indirect device communication There is disclosed means for in a communications device enabling an indirect communications channel between the communications device and at least one further communications device. A data service selected from a set of data services is associated with an identity code. The identity code identifies the communications device. Data related to the identity code is transmitted to a server. The data is preferably transmitted through a radio-frequency based communications interface. The identity code is broadcasting during a predetermined period of time and intended to be received by the at least one further communications device. The broadcast is preferably transmitted through a short-range non-radio frequency based communications interface.
US10200256B2	System and method of a manipulative handle in an interactive mobile user interface System and method of a manipulative handle for revealing detail information in an interactive mobile user interface are disclosed. In one embodiment, when an activity supported by a cloud-based (e.g., online cloud-based collaboration platform) is initiated, the status of the activity is tracked and displayed using an animated user interface element. On and/or near the animated user interface element are hidden grab points that can be engaged to expand the user interface element to reveal detail relating to the activity. If the user interface element is already in an expanded state, detecting activation of hidden grab points on and/or near the user interface element causes minimization of the user interface element, thereby concealing the detail revealed earlier.
US10200255B2	Generating function model based on operator objectives It is provided a method, comprising requesting a function model based on a received objective for a network; checking if a function model is received in response to the request for the function model; setting, if the function model is received, a policy function according to the received function model.
US10200254B2	Methods and systems for improved computer network analysis A computer-implemented method for determining service flow rank based on service flow dependency is provided. The method includes receiving a plurality of data flow information for a plurality of data flows. Each data flow of the plurality of data flows includes a source, a destination, a start time, and an associated service. The method also includes determining a plurality of dependency sets based on the plurality of data flow information. Each dependency set of the plurality of dependency sets includes at least a first data flow and a second data flow. The method further includes calculating a plurality of dependency strengths based on the plurality of dependency sets, calculating a plurality of total service scores based on the first data flows of the plurality of dependency sets, and calculating a plurality of service flow ranks based on the plurality of dependency strengths and the plurality of total service scores.
US10200252B1	Systems and methods for integrated modeling of monitored virtual desktop infrastructure systems In one embodiment, a method is performed by a computer system. The method includes, responsive to deployment of at least one component of a virtual desktop infrastructure (VDI) in a multilayer VDI architecture, creating an integrated topology model (ITM) instance of interconnected topology objects, the ITM instance comprising: a physical-and-virtual infrastructure topology model (PVI-TM) instance comprising first interconnected topology objects; a VDI topology model (VDI-TM) instance comprising second interconnected topology objects; and an access gateway topology model (AG-TM) instance comprising third interconnected topology objects. The method further includes generating dependencies between the interconnected topology objects of the ITM instance, wherein the dependencies comprise. In addition, the method includes generating a dependency graph for the multilayer VDI architecture based, at least in part, on the dependencies. Also, the method includes outputting at least a portion of the dependency graph for presentation to a user.
US10200250B2	Distribution of a virtual network operator subscription in a satellite spot-beam network A system and method for bandwidth management for a Host Network Operator (HNO) is disclosed. The method including: providing shared beams shared by two or more of a plurality of Virtual Network Operators (VNOs), wherein each VNO has a subscription including a global bandwidth limit applicable for a flow control epoch for each VNO and a terminal subscription for each terminal associated with the respective VNO; aggregating, in the current flow control epoch, a demand and the terminal subscriptions of active terminals per shared beam per VNO; distributing, for each shared beam per VNO, the aggregated demand and active terminal subscriptions into a distribution bandwidth per shared beam per VNO, wherein the distribution bandwidth is based on the respective global bandwidth limit of the respective VNO; and proportionally balancing, for each shared beam, an oversubscription of the distribution bandwidths per shared beam per VNO based on the proportionalities of the global bandwidth limit of each VNO subscribing to the shared beam, to provide a proportional distribution bandwidth per shared beam per VNO.
US10200249B1	Network traffic management for virtualized graphics devices A determination is made that network access between a virtualized graphics device and a compute instance of a client is to be enabled. A source network address for graphics-related traffic of the compute instance is identified. From a range of source port numbers associated with the source network address, a particular source port number which is unused is found. Routing metadata is transmitted to one or more routing devices indicating that a key based at least in part on (a) the source network address and (b) the particular source port number is to be used to identify a route for network packets from the first application compute instance to a virtualized graphics device.
US10200248B1	Translating high-level configuration instructions to low-level device configuration In one example, a network management system (NMS) device manages a plurality of network devices including first and second network devices. Initially the first and second network devices are configured according to a first high-level configuration. The NMS is configured to determine a difference between the first high-level configuration and a second high-level configuration, apply a first transformation function, specific to the first network device, to the difference to generate a first low-level configuration change specific to the first device, apply a second transformation function, specific to the second network device, to the difference to generate a second low-level configuration change specific to the second device, configure the first device with the first low-level configuration change, and configure the second device with the second low-level configuration change.
US10200247B2	First-class component extensions for multi-tenant environments A system, apparatuses, and methods for enabling management of customizations/extensions to the functionality of a multi-tenant computing platform. In some embodiments, an extended or customized entity, such as a function, operation, process, module, sub-routine, data item, etc. is represented as a record. That record is then associated with an underlying record by means of a tenant specific mapping or equivalent structure. This enables the tenant to utilize the extended or customized entity in place of the underlying record in situations in which the underlying record would typically be used. This also provides a way of isolating the extensions or customizations on the multi-tenant platform so that they are associated with specific tenants and not with other tenants who may still access the underlying or un-extended versions of the entity.
US10200245B2	Adjustable data rates Adjustable data rate data communications may be provided. First, a plurality of remote data rates at which a remote device is configured to operate may be received. Then, a plurality of local data rates at which a local device is configured to operate may be received. A greatest one of the plurality of local data rates may comprise a cable data rate comprising a greatest rate supported by a length of cable connecting the local device and the remote device. Next, an operating data rate may be determined. The operating data rate may comprise a highest one of the plurality of local data rates that has a corresponding equivalent within the plurality of remote data rates. The local device may then be operated at the operating data rate.
US10200242B2	System and method to replicate server configurations across systems using sticky attributions An information handling system includes a memory to store a configuration file, a provisioning server, and a server. The provisioning server detects a new server within the information handling system, and provides the configuration file new server. The server includes a controller to communication with the provisioning server, the controller to receive the configuration file from the provisioning server, to resolve a sticky attribute in the configuration file based on a type of the sticky attribute, to update the configuration file in response to resolving the sticky attribute, and to apply the updated configuration file to the server to configure components within the server.
US10200239B2	Normalized management network An apparatus obtains one or more management logical network properties. The apparatus determines one or more management logical network properties to be instantiated. The apparatus performs, in accordance with the determined properties, management logical network configuration.
US10200234B2	Multi-level self-organizing network coordination There are provided measures for realizing multi-level self-organizing network coordination, including self-organizing network coordination procedures. Such measures exemplarily comprise communication of a notification for self-organizing network coordination, which notifies an action of at least one self-organizing network function at a lower management level, from the lower management level of a self-organizing network to a higher management level of the self-organizing network, either before the action is actually performed or after the action has actually been performed, and coordination of the notified action in terms of self-organizing network coordination at the higher management level.
US10200231B1	Partial probabilistic signal shaping A communication system in which probabilistic signal shaping and FEC coding are jointly applied using a partial amplitude-shaping scheme, under which bit-words representing binary labels of the transmitted amplitudes may have (i) a fixed number of amplitude most-significant bits (MSBs) generated using a shaping code and (ii) a fixed number of amplitude least-significant bits (LSBs) generated using an FEC code, e.g., without the shaping code being applied thereto. In various embodiments, the transmitted constellation symbols can carry, as sign bits, some original information bits and/or the parity bits generated by FEC-encoding some combination of the MSBs, the LSBs, and said some original information bits. Some embodiments are compatible with convolutional FEC codes, such as the trellis-coded modulation. Some embodiments can be used in communication systems relying on discrete multi-tone modulation, such as the systems providing DSL access over subscriber lines.
US10200229B2	Method and apparatus for extracting resource block from signal The embodiments disclose a method in a base station for extracting a resource block at a frequency band from a signal received from a terminal device in a radio communication system employing OFDM. The method comprising: removing a CP portion corresponding to the resource block from the signal; for each of a predetermined number of successive symbols in the signal after the CP portion corresponding to the resource block has been removed, performing a FFT of the symbol, extracting a frequency domain signal corresponding to the frequency band from the FFT of the symbol, performing an IFFT on the extracted frequency domain signal to yield a time domain signal, and storing the time domain signal to form a time sequence by concatenation; performing a FFT of the stored time sequence; and extracting subcarriers corresponding to the resource block from the FFT of the stored time sequence.
US10200228B2	Interleaver design for dual sub-carrier modulation in WLAN A method of interleaver design for dual carrier modulation (DCM) is proposed in a wireless network. For HE PPDU transmission with DCM, information bits are first encoded by a BCC encoder. The BCC encoded bit streams are then interleaved by a BCC interleaver. More specifically, the BCC interleaved bits are repeated on two halves of a given resource unit (RU). The BCC interleaver parameters are defined based on half of the total number of the data tones of the RU if DCM is applied. The BCC interleaved bits are then modulated and mapped to two halves of the RU by a DCM constellation mapper.
US10200226B2	Pilot symbol patterns for transmission through a plurality of antennas A method and apparatus for improving channel estimation within an OFDM communication system. Channel estimation in OFDM is usually performed with the aid of pilot symbols. The pilot symbols are typically spaced in time and frequency. The set of frequencies and times at which pilot symbols are inserted is referred to as a pilot pattern. In some cases, the pilot pattern is a diagonal-shaped lattice, either regular or irregular. The method first interpolates in the direction of larger coherence (time or frequency). Using these measurements, the density of pilot symbols in the direction of faster change will be increased thereby improving channel estimation without increasing overhead. As such, the results of the first interpolating step can then be used to assist the interpolation in the dimension of smaller coherence (time or frequency).
US10200224B2	Method and apparatus for transmitting data in non-licensed band Disclosed is a method and apparatus for transmitting data in a non-licensed band. The method of transmitting downlink data in the non-licensed band may comprise the steps of: generating, by a base station, downlink data and transmitting the downlink data to a terminal through a downlink subframe. The downlink data may comprise wireless LAN preamble, PDCCH data, and PDSCH data. The wireless LAN preamble may comprise information on time resources for communication between the base station and the terminal, and the PDCCH data may comprise control data for the terminal. Also, the PDSCH data may comprise traffic data for the terminal.
US10200223B2	Automatic gain control (AGC) for multichannel/wideband communications system Automatic Gain Control (AGC) system for multi-channel signals attenuates an incoming multi-channel signal by providing a gain. The system further adjusts each individual channel, of the multi-channel signal, by supplying a second gain if needed. The AGC system is designed to ensure a received signal power is at an optimal level for analog to digital conversion or any other form of signal processing. The system also enables elimination of mid-packet gain adjustments.
US10200222B2	Low cost and low frequency baseband two-tone test set using direct digital synthesizers as signal generators and a fully differential amplifier as the power combiner A test set system and related method are provided comprise a first direct digital synthesizer (DDS) having a balanced output configured to produce a first signal, and a second DDS having a balanced output signal configured to produce a second signal that differs from the first signal. The test set system also comprises a fully differential amplifier (FDA) having a balanced input that is connected to the balanced output of the first DDS and the balanced output of the second DDS, and a balanced output at which a combination of the first signal and the second signal is provided that suppresses even-order intermodulation products.
US10200221B2	Method and apparatus for selecting codebook index Provided are a method for a user equipment to select a codebook index in a wireless communication system and an apparatus supporting the method. The method performed by the user equipment comprises performing zero padding for a first vector, wherein the first vector represents a channel state measured by a receive antenna for a first transmit antenna; performing IFFT for a second vector, wherein the second vector is obtained by performing the zero padding for the first vector; performing receive antenna combining for a third vector, wherein the third vector is obtained by performing IFFT for the second vector; and detecting a maximum element from a fourth vector, wherein the fourth vector is obtained by performing the receive antenna combining for the third vector.
US10200220B2	Equalizing transmitter and method of operation A transmitter for providing channel equalization that includes a first driver and second driver having a high pass filter. The first driver generates a first output signal representing a digital input signal. The second driver generates a second output signal representing a high pass filtered version of the digital input signal. The first and second output signals are summed to provide a third output signal that is channel equalized for transmission over a channel.
US10200207B2	Method and device for receiving physical multicast channel in wireless access system supporting 256QAM The present invention relates to a wireless access system supporting 256-ary Quadrature Amplitude Modulation (256QAM), and more particularly, to methods and apparatuses for transmitting and receiving a Physical Multicast Channel (PMCH) to provide Multimedia Broadcast and Multicast Service (MBMS). According to an embodiment of the present invention, a method for receiving a Physical Multicast Channel (PMCH) by a User Equipment (UE) in a wireless access system supporting 256QAM includes receiving a System Information Block (SIB) including information for acquiring a Multicast Control Channel (MCCH), receiving a PMCH carrying an MCCH including Multimedia Broadcast and Multicast Service (MBMS) control information, and receiving a PMCH carrying a Multicast Traffic Channel (MTCH) including MBMS data based on the MBMS control information. 256QAM is not applied to the PMCH carrying the MCCH, and the UE determines a Modulation and Coding Scheme (MCS) and a Transport Block Size (TBS) using a second table supporting 256QAM to receive and demodulate the PMCH carrying the MTCH.
US10200204B2	Link state information advertisement method and device The present application discloses a link state information advertisement method and device, including: receiving, by a first network device, network topology information sent by a control device, where the network topology information includes link state information, which is generated by the control device, between the first network device and a second network device, the first network device supports an IGP, and the second network device does not support the IGP; and advertising the link state information between the first network device and the second network device. The first network device advertises the link state information to other network devices supporting the IGP, therefore implementing that a network device supporting the IGP in multiple network devices controlled by one control device accesses a network device not supporting the IGP, thereby optimizing routing between multiple network devices controlled by the control device.
US10200197B1	Scalable crash fault-tolerance consensus protocol with efficient message aggregation Methods and systems for encrypting and aggregating data in a network are provided. The method includes performing synchronization, by a leader node. Synchronization includes the following steps: transmitting a prepare message, receiving a promise message, transmitting an accept message, and receiving an accepted message. The method further includes performing a steady state phase, by the leader node. The steady state phase includes the following steps: transmitting a second accept message and receiving a second accepted message.
US10200196B1	Cryptographic ASIC with autonomous onboard permanent storage A cryptographic ASIC and method for autonomously storing data into a one-time programmable memory in isolation. Internal circuitry provides programming pulses of a given voltage magnitude and duration for changing the state of selected memory elements. Use of internal circuitry reduces pin count and increases reliability and security over devices relying on external circuitry to provide programming pulses. In one embodiment, the stored data comprises cryptographic data for enforcing a derivative key hierarchy for managing an information stream, such as a blockchain.
US10200195B2	Method for leveraging a secure telecommunication session A method for leveraging a first secure channel of communication between a first agent and a second agent to create a second secure channel of communication between the first agent and a third agent. The method includes creating the first secure channel of communication between the first agent and the second agent using a configurable data-driven initial process on a first computing device. Responsive to the first agent receiving a request from the third agent to establish the second secure channel of communication, the method further includes retrieving identifying information from the third agent. The method further includes ending the identifying information from the third agent to the second agent over the first secure channel of communication. Responsive to receiving approval of the third agent's request from the second agent, the method further includes establishing the second secure channel of communication.
US10200185B2	Method for monitoring PDCCH in FDD half-duplex communication and terminal thereof One embodiment of the present description provides a method for monitoring a physical downlink control channel (PDCCH). The method for monitoring a PDCCH can comprise the steps of: performing a frequency division duplex (FDD) half-duplex operation; and determining whether to monitor the PDCCH if discontinuous reception (DRX) is set. Here, when a downlink subframe of a downlink carrier is positioned immediately before an uplink subframe of an uplink carrier, the PDCCH can be monitored in the downlink subframe during an active time.
US10200178B2	Communications device, infrastructure equipment, mobile communications network and methods In an infrastructure equipment forming part of a mobile communications network, a controller is configured in combination with a receiver and transmitter to receive from one or more communications devices a channel state report for each of one or more predefined candidate channels within a frequency range, each of the candidate channels representing a minimum unit of communications resource usable to receive data on a downlink. The controller is configured to select, from the one or more candidate carriers, one or more component carriers for use in transmitting signals to the communications devices within the second frequency range to form a downlink providing a secondary cell, based on the received channel state reports, and to transmit an indication identifying the selected one or more component carriers to the one or more communications devices for use in transmitting signals to the one or more communications devices via the frequency range.
US10200176B2	Method and apparatus for reducing inter-cell interference in radio communication system A method of a first cell for supporting a downlink channel demodulation at a user equipment, the method includes transmitting, by the first cell to the user equipment via a higher layer signaling, information on a Cell-specific Reference Signal (CRS) of a second cell including Multicast/Broadcast over Single Frequency Network (MBSFN) subframe configuration information of the second cell; and transmitting, by the first cell to the user equipment, a downlink signal on the downlink channel, wherein the information on the CRS of the second cell is used by the user equipment to demodulate the downlink channel from the first cell.
US10200175B2	Multiuser transreceiving method in wireless communication system and device for same A method for transmitting data from a station (STA) device in a wireless LAN (WLAN) system, according to one embodiment of the present invention, comprises the steps of: generating a physical protocol data unit (PPDU) including a physical preamble and a data field; and transmitting the PPDU, wherein when the data field is transmitted by using a 106-tone resource unit including first to fourth pilot tones, the positions of the first to the fourth pilot tones may be identical to the positions of four pilot tones from among eight pilot tones included in four 26-tone resource units, which are present at a position corresponding to the 106-tone resource unit, or identical to the positions of four pilot tones from among eight pilot tones included in two 52-tone resource units, which are present at a position corresponding to the 106-tone resource unit.
US10200172B2	System and method for an adaptive frame structure with filtered OFDM Different filtered-orthogonal frequency division multiplexing (f-OFDM) frame formats may be used to achieve the spectrum flexibility. F-OFDM waveforms are generated by applying a pulse shaping digital filter to an orthogonal frequency division multiplexed (OFDM) signal. Different frame formats may be used to carry different traffic types as well as to adapt to characteristics of the channel, transmitter, receiver, or serving cell. The different frame formats may utilize different sub-carrier (SC) spacings and/or cyclic prefix (CP) lengths. In some embodiments, the different frame formats also utilize different symbol durations and/or transmission time interval (TTI) lengths.
US10200169B2	Narrowband wireless communications cell search Methods, systems, and devices for wireless communication are described. A base station may broadcast a synchronization signal using a narrowband portion of a bandwidth of a cell. The synchronization signal may include a sequence repeated over several symbol periods using a cover code to support power-efficient cell acquisition. A user equipment (UE) receiving the synchronization signal may determine frequency and timing information for a cell by performing a weighted combination and accumulation of low complexity autocorrelation and cross-correlation procedures on the synchronization signal. The reduced complexity correlation procedures may be enabled based on the use of the cover code and a base sequence. In some cases, the cross-correlation may be performed at multiple sampling rates. The use of the cover code within the synchronization signal may also support correlation procedures that use recursive or repeated updates, which may allow for further reduced computational complexity relative to other cell search procedures.
US10200168B2	Systems and methods for adaptation in a wireless network An embodiment method of network node operation includes indicating, by a first network node, to a first UE, a first number of REs in a first set of RBs for a first reference signal, transmitting, by the first network node, to the first UE, the first reference signal in accordance with the first number of REs and a first precoding in a first subframe, receiving, by the first network node, from the first UE, a report indicating a first MCS in accordance with a level of signal and interference measured by the first UE, wherein the measurement is restricted to the first reference signal, and transmitting, by the first network node, a first data with the indicated first MCS and the first precoding in a second subframe, the first data being transmitted on a second number of REs in the first set of RBs in the second subframe.
US10200161B2	Method and apparatus for processing reverse transmission resources in a mobile communication system The present invention relates to a method and apparatus for processing reverse transmission resources of a user terminal in a mobile communication system. When receiving a plurality of grants, the method and apparatus sum resources allocated by the grants, distribute the summed resources to logical channels, map the resources distributed by the logical channels and the logical channels to MAC PDUs according to the data sizes of the MAC PDUs, and allocate the resources distributed by the mapped logical channels.
US10200160B2	Method for transmitting multiplexed HARQ feedbacks in a carrier aggregation system and a device therefor The present invention relates to a wireless communication system. More specifically, the present invention relates to a method and a device for transmitting multiplexed HARQ feedbacks in a carrier aggregation system, the method comprising: configuring a first Physical Uplink Control Channel (PUCCH) group and a second PUCCH group, wherein at least two cells are configured with PUCCH resources in each of the first PUCCH group and the second PUCCH group; generating a first Hybrid-ARQ (HARQ) feedback by multiplexing HARQ feedbacks of all HARQ processes of all cells belonging to the first PUCCH group; generating a second HARQ feedback by multiplexing HARQ feedbacks of all HARQ processes of all cells belonging to the second PUCCH group; selecting a first cell among the at least two cells with PUCCH resources in the first PUCCH group; selecting a second cell among the at least two cells with PUCCH resources in the second PUCCH group; and transmitting the first HARQ feedback on the first cell and the second HARQ feedback on the second cell.
US10200159B2	Method and system for configuring device-to-device communication A method and system for use in an advanced wireless communication network is provided. The method comprises: providing, to a group of UEs, a resource multiplexing configuration defining resource multiplexing for cellular and non-cellular communication; and allocating resources to the group of UEs for cellular communication, according to the resource multiplexing configuration. Advantageously, the method enables collisions and interference between D2D and cellular transmissions to be reduced or avoided.
US10200158B2	Method and device for operating under extremely low signal-to-noise ratio A method and a device are provided for use at one or more links of a communication network along which communications are exchanged under extremely low SNR conditions. The method comprises a step of transmitting an extended communication frame, which comprises a plurality of basic frames, wherein each of the plurality of basic frames included in the extended frame, comprises the same payload as all other basic frames included in the plurality of basic frames.
US10200154B2	System and method for early packet header verification A receiver, transmitter and method for early packet header verification are provided. In one embodiment, the method includes: (1) receiving a payload flit of a preceding packet and a header flit of a current packet; and (2) using a Cyclic Redundancy Check (CRC) in the header flit to verify the payload flit of the preceding packet and the header flit of the current packet.
US10200152B2	Method and device for transmitting data using LDPC code The present disclosure provides a method and a device for transmitting data using a LDPC code. The method for transmitting data using a LDPC code includes: determining a check code length according to a current LDPC code rate; informing a receiving end about the current LDPC code rate and the check code length, adding a check code with the check code length to data to be sent, and implementing a LDPC encoding using the current LDPC code rate, so as to obtain LDPC code data; and sending the LDPC code data to a receiving end. The method and the device of the present disclosure can improve spectrum effectiveness of transmitting data using LDPC code.
US10200146B2	Data transmission method, apparatus, and system The present disclosure provides a data transmission method including: receiving a first-mode optical signal from a first port corresponding to a first port number; converting, according to a correspondence between the first port number and a first mode group number, the received first-mode optical signal into a second-mode optical signal carried in a first mode group identified by the first mode group number, where the second-mode optical signal carried in the first mode group identified by the first mode group number includes an optical signal in one or more modes; and outputting the second-mode optical signal obtained by means of conversion.
US10200144B1	Communication system for connecting network hosts A communication system that can be used, e.g., to provide high-speed access to the servers of a data center. In an example embodiment, the communication system transports data using WDM optical signals. The downlink WDM signals have some WDM components that are modulated with data and some WDM components that are not modulated with data. The uplink WDM signals are generated at the server end of the system by modulating with data the unmodulated WDM components received through the downlink. Appropriately connected wavelength multiplexers, wavelength demultiplexers, and/or optical filters can be used to properly apply the various modulated WDM components to the corresponding optical receivers and the unmodulated WDM components to the corresponding optical transmitters. The resulting system architecture advantageously enables, e.g., the use of a single, conveniently located multi-wavelength light source to provide carrier wavelengths for both uplink and downlink optical traffic.
US10200143B2	Operation and stabilization of Mod-MUX WDM transmitters based on silicon microrings A transmitter comprising a plurality of modulator and multiplexer (Mod-MUX) units, each Mod-MUX unit operating at an optical wavelength different from the other Mod-MUX units. The transmitter can additional include in each Mod-MUX unit two optical taps and three photodetectors that are configured to allow the respective Mod-MUX unit to be tuned to achieve thermal stabilization and achieve effective modulation and WDM operation across a range of temperatures. The Mod-MUX transmitter avoids the use of a frequency comb. The Mod-MUX transmitter avoids cross-modulation between different modulators for different laser signals.
US10200140B2	Techniques and apparatuses for reducing inter-cell interference with low-latency traffic in new radio A method, an apparatus, and a non-transitory computer-readable medium for wireless communication are provided. The apparatus, which is associated with a first cell, may receive communication information of a second cell, wherein the communication information is associated with a transmission, of a base station associated with the second cell, to an ultra-reliable low latency communication (URLLC) user equipment (UE) located in the second cell; and/or reduce transmission power of the apparatus associated with the first cell, in at least one resource, to reduce interference with the transmission by the base station to the URLLC UE.
US10200139B2	Method and apparatus for performing interference coordination in wireless communication system A method for and apparatus for performing interference coordination in a wireless communication system is provided. A wireless device may transmit measurement results on neighboring cells; receive information of grouping of the neighboring cells based on the measurement results; and receive a signal to be applied with a different sub-band, a subframe shift, or a Orthogonal frequency division multiplexing (OFDM) symbol shift according to the information of grouping from each cell of the neighboring cells.
US10200135B2	Over the air measurement module An over the air measurement module comprises an antenna, adapted to receive a first measuring signal from a device under test or to transmit a second measuring signal to the device under test. It also comprises an analog signal processor, directly connected to said antenna, adapted to reduce a frequency of the received first measuring signal, resulting in a frequency reduced first measuring signal, or adapted to increase a frequency of a frequency reduced second measuring signal, resulting in the second measuring signal. It also has a connector connected to said analog signal processor and is adapted to output the first frequency reduced measuring signal or is adapted to receive the second frequency reduced measuring signal.
US10200133B2	Touch screen interface and infrared communication system integrated into a battery Apparatuses and methods relating to interfacing and controlling external batteries are described. In one embodiment, an external battery is integrated with a touch screen display. In one embodiment, the external battery provides an infrared communication link with a detachable device or system controller. In one embodiment, the external battery touch screen interface provides data received from a detachable device or system controller.
US10200132B2	Optical communication system, transmission station, and method of optical communication An optical communication system includes an optical transmitter, a plurality of optical receivers, and a splitter that splits light transmitted by the optical transmitter to the plurality of optical receivers. The optical transmitter includes a variable-wavelength light source capable of transmitting light of a first wavelength and light of a third wavelength between the first wavelength and a second wavelength. A first optical receiver of the plurality of optical receivers includes a first optical filter having a first transmission band including the first and third wavelengths, and a first receiving unit that receives light having passed through the first optical filter. A second optical receiver of the plurality of optical receivers includes a second optical filter having a second transmission band including the second and third wavelengths, and a second receiving unit that receives light having passed through the second optical filter.
US10200131B2	Method and system for the monolithic integration of circuits for monitoring and control of RF signals A method of operating a BPSK modulator includes receiving an RF signal at the BPSK modulator and splitting the RF signal into a first portion and a second portion that is inverted with respect to the first portion. The method also includes receiving the first portion at a first arm of the BPSK modulator, receiving the second portion at a second arm of the BPSK modulator, applying a first tone to the first arm of the BPSK modulator, and applying a second tone to the second arm of the BPSK modulator. The method further includes measuring a power associated with an output of the BPSK modulator and adjusting a phase applied to at least one of the first arm of the BPSK modulator or the second arm of the BPSK modulator in response to the measured power.
US10200130B2	Optical transmitter An optical transmitter includes: a splitter; a first optical modulator and a second optical modulator that modulate each of light beams split by the splitter; a first semiconductor optical amplifier (SOA) and a second SOA that are connected to a subsequent stage of the first optical modulator and a subsequent stage of the second optical modulator, respectively; a first detector and a second detector that detect light output intensity of the first SOA and light output intensity of the second SOA, respectively; a controller that sets gains of the first and second SOAs such that the first and second SOAs are equal in the light output intensity based on detection values of the first and second detectors; and a combiner that combines an output light beam of the first SOA and an output light beam of the second SOA.
US10200124B2	Unified optical fiber-based distributed antenna systems (DASs) for supporting small cell communications deployment from multiple small cell service providers, and related devices and methods Unified optical fiber-based distributed antenna systems (DASs) for supporting small cell communications deployment from multiple small cell service providers are disclosed. The unified optical fiber-based DASs disclosed herein are configured to receive multiple small cell communications from different small cell service providers to be deployed over optical fiber to small cells in the DAS. In this manner, the same DAS architecture can be employed to distribute different small cell communications from different small cell service providers to small cells. Use of optical fiber for delivering small cell communications can reduce the risk of having to deploy new cabling if bandwidth needs for future small cell communication services exceeds conductive wiring capabilities. Optical fiber cabling can also allow for higher distance cable runs to the small cells due to the lower loss of optical fiber, which can provide for enhanced centralization services.
US10200123B2	System and methods for distribution of heterogeneous wavelength multiplexed signals over optical access network An optical network communication system includes an optical hub, an optical distribution center, at least one fiber segment, and at least two end users. The optical hub includes an intelligent configuration unit configured to monitor and multiplex at least two different optical signals into a single multiplexed heterogeneous signal. The optical distribution center is configured to individually separate the at least two different optical signals from the multiplexed heterogeneous signal. The at least one fiber segment connects the optical hub and the optical distribution center, and is configured to receive the multiplexed heterogeneous signal from the optical hub and distribute the multiplexed heterogeneous signal to the optical distribution center. The at least two end users each include a downstream receiver configured to receive one of the respective separated optical signals from the optical distribution center.
US10200119B2	Optical splitter assembly having tuned output pigtails The present disclosure relates to a method for testing a fiber optic network including a fiber distribution hub. The method includes providing a test splitter within the fiber distribution hub to provide optical connectivity between an F1 fiber and at least a portion of an F2 fiber network. The method also includes testing sending a test signal from the F1 fiber through the test splitter to the F2 fiber network, and replacing the test splitter after testing has been completed.
US10200117B2	Optical communication device, optical communication system, and optical communication method To provide an optical communication technology that brings flexibility to ROADM systems.An optical communication device according to the present invention drops and adds an optical signal from and to wavelength-division multiplexed optical signals that are transmitted on a main path between network terminal stations, the device including: first means and second means capable of selecting an optical signal of a predetermined wavelength from inputted optical signals and of outputting the selected optical signal; third means for splitting optical signals inputted from a first terminal station on the main path into the first means and the second means; fourth means for splitting optical signals inputted from a branch path in the network into the first means and the second means; and fifth means capable of selectively outputting to a second terminal station on the main path either an optical signal outputted by the first means or an optical signal outputted by the second means.
US10200112B2	Servicing cell selection in air to ground communication systems Selecting serving cells in air to ground communication systems efficiently and with maximum knowledge of forward and return link channel conditions allows maximum throughput available to a user at any point in time, particularly in the presence of high interference. Airborne based and ground based systems may collect forward and return link channel conditions and develop user capacity estimates to be used by aircraft and ground based transceivers. Such user capacity estimates may be shared among distributed air-to-ground networks to ensure the latest channel conditions are available for serving cell selection decisions.
US10200111B2	System for managing mobile internet protocol addresses in an airborne wireless cellular network The Aircraft Mobile IP Address System provides wireless communication services to passengers who are located onboard an aircraft by storing data indicative of the individually identified wireless devices located onboard the aircraft. The System assigns a single IP address to each Point-to-Point Protocol link which connects the aircraft network to the ground-based communication network but also creates an IP subnet onboard the aircraft. The IP subnet utilizes a plurality of IP addresses for each Point-to-Point link thereby to enable each passenger wireless device to be uniquely identified with their own IP address. This is enabled since both Point-to-Point Protocol IPCP endpoints have pre-defined IP address pools and/or topology configured; each Point-to-Point Protocol endpoint can utilize a greater number of IP addresses than one per link. Such an approach does not change IPCP or other EVDO protocols/messaging but does allow this address to be directly visible to the ground-based communication network.
US10200106B1	Analog surface wave multipoint repeater and methods for use therewith In accordance with one or more embodiments, an analog surface wave multi-point repeater includes a first launcher configured to transmit and receive first guided electromagnetic waves that propagate on an outer surface of a first segment of a transmission medium without requiring an electrical return path. A transceiver includes a splitter coupled to a second launcher and the third launcher and a low noise amplifier configured to receive a second microwave signal from the second launcher and the third launcher via the splitter. A directional coupler is configured to couple the second microwave signal from the second launcher and the first microwave signal to the splitter to facilitate transmission of the second guided electromagnetic waves by the second launcher on the second segment of the transmission medium and to further facilitate transmission of the third guided electromagnetic waves by the third launcher on the third segment of the transmission medium.
US10200102B2	Channel station information reporting and transmission mode for enhanced machine type communication Methods, systems, and devices for wireless communication are described. A wireless device may identify a transmission mode that specifies a rank indicator (RI) feedback parameter for channel state indicator (CSI) reporting, and may determine that the appropriate CSI configuration excludes an RI. The device may then send CSI reports with a precoding matrix indicator (PMI) and without the RI, and it may communicate using the transmission mode. In some cases, the PMI may be based on a default rank (e.g., rank of 1 for device with single antenna). In some cases, a category or capability of the device may be identified, and the determination that the CSI configuration excludes the RI may be based on the category or capability. In other cases, the CSI configuration may be based on channel conditions. In some cases, a reference signal (e.g., a CRS) may be used as feedback depending on the device's capabilities.
US10200096B2	Beamforming using predefined spatial mapping matrices In one or more aspects data packets are transmitted to a receiver using predefined spatial mapping matrices, a quality of reception is received from the receiver for each of the predefined spatial mapping matrices, and one of the predefined spatial mapping matrices is selected for transmitting additional data packets to the receiver based on a highest quality of reception.
US10200095B2	Data transmission method, apparatus and antenna array Disclosed in the present invention are a data transmission method, an apparatus and an antenna array, in order to realize wide bandwidth data transmission of massive antenna array. The data transmission method comprises: baseband IQ data of multiple CA is grouped via IR data interface module to obtain baseband IQ data of each CA group; for baseband IQ data of each CA group: the baseband IQ data with enhanced data rate of the CA group is up-converted to digital intermediate frequency band by a digital up-conversion module; the digital intermediate frequency signals of the CA group are superposed by a combiner to form a multi-carrier digital intermediate frequency signal; in accordance with the amplitude and phase requirements of each antenna in a group of antenna sharing the multi-carrier digital intermediate frequency signal, the amplitude and phase of the multi-carrier digital intermediate frequency signal are respectively adjusted and transmitted to a digital to analog converter of a corresponding antenna channel; a multi-carrier analog intermediate frequency signal is generated by the digital to analog converter of each antenna channel, and then is transmitted to the corresponding antenna channel.
US10200094B2	Interference management, handoff, power control and link adaptation in distributed-input distributed-output (DIDO) communication systems A system and method are described herein employing a plurality of distributed transmitting antennas to create locations in space with zero RF energy. In one embodiment, when M transmit antennas are employed, it is possible to create up to (M−1) points of zero RF energy in predefined locations. In one embodiment of the invention, the points of zero RF energy are wireless devices and the transmit antennas are aware of the channel state information (CSI) between the transmitters and the receivers. In one embodiment, the CSI is computed at the receivers and fed back to the transmitters. In another embodiment, the CSI is computed at the transmitter via training from the receivers, assuming channel reciprocity is exploited. The transmitters may utilize the CSI to determine the interfering signals to be simultaneously transmitted. In one embodiment, block diagonalization (BD) precoding is employed at the transmit antennas to generate points of zero RF energy.
US10200093B2	Beamforming method of millimeter wave communication and base station and user equipment using the same A beamforming method of millimeter wave communication is introduced herein. the beamforming method is adapted to a base station and includes following steps. A plurality of periodic signals are transmitted by using a frame header of M radio frames via Q base station beams designated as Q scan beams while performing a network entry, wherein M≥1 and Q≥1. Data packets are transceived by using a payload region of the M radio frames via at least one scheduled beam while a user equipment connection is performed via the scheduled beam selected from the Q base station beams.
US10200090B2	Method and apparatus for operating near field communication function in a portable terminal A method of operating a Near Field Communication (NFC) function in a portable terminal is provided. The method includes detecting an NFC tag during execution of a particular mode, comparing the NFC tag with preset lists, omitting a reading operation of the NFC tag if the NFC tag is an NFC tag which is included in a blocking list, and reading the NFC tag if the NFC tag is an NFC tag which is included in an application mapping list.
US10200088B2	Antenna for short-range applications and utilization of such an antenna An antenna for short-range applications, including an elongate two-pole conductor structure with an internal conductor and a sheath conductor coaxially surrounding the internal conductor, and a terminal structure connected to the conductor structure. The terminal structure includes an electrically insulating carrier plate, an electrically conductive sheath conductor connection surface that extends over a first region of the carrier plate on the upper side of the carrier plate and is connected to the sheath conductor, an electrically conductive internal conductor connection surface that extends over a second region of the carrier plate, which is spaced apart from the first region of the carrier plate, on the upper side of the carrier plate and is connected to the internal conductor, an electrically conductive coupling conductor surface that extends over a third region of the carrier plate on the underside of the carrier plate. The antenna provides reliable transmission of information over short distances.
US10200084B2	Electronic device and cable and method of driving the same An electronic device, a cable, and a method of driving the same are provided. The cable that transmits data and power includes a notification device comprising notification circuitry configured to output a notification when the power is transmitted, a first connector positioned at one end of the cable, a second connector positioned at an other end of the cable, a wire connecting the first and second connectors and including a data line that transmits the data and a power line that transmits the power, and a cable controller connected to the power line and configured to identify a characteristic of power transmitted through the power line and to change a form of the notification output from the notification device based on the identified power characteristic.
US10200080B2	Self-interference cancellation for full-duplex communication using a phase and gain adjusted transmit signal The present disclosure is directed to an apparatus and method for cancelling self-interference caused by full-duplex communication. In a full-duplex communication device, the receiver will generally experience significant self-interference from the full-duplex communication device's own transmitter transmitting a strong outbound signal over the same channel that the receiver is to receive a weak inbound signal. The apparatus and method are configured to adjust a phase and gain of the outbound signal provided at the output of a power amplifier (PA) and inject the phase and gain adjusted outbound signal at the input of a low-noise amplifier (LNA) to cancel the interference from the outbound signal in the inbound signal.
US10200075B2	Discrete time analog signal processing for simultaneous transmit and receive A reconfigurable discrete time analog signal processor includes a finite impulse response (FIR) filter configured to receive a portion of an RF transmit signal, to receive FIR coefficients, and to generate a leakage cancellation signal based on the portion of the RF transmit signal and the FIR coefficients, the FIR filter including sample and hold (SH) circuits configured to receive the portion of the RF transmit signal, to sample the portion of the RF transmit signal at successive sample times according to a sample clock, and to generate sampled analog voltage signals, and analog multipliers coupled to the SH circuits and configured to multiply the sampled analog voltage signals by binary multiplication factors to generate the leakage cancellation signal.
US10200072B2	Portable device There is provided a portable device (2) for wirelessly communicating with a remote further device (4). The portable device comprises a power source (6) chargeable by a power supply (8) separate from the portable device. The portable device is configured to have a plurality of coupling states associated with the power supply. The power supply is separate from the device and remote from the further device. The portable device also comprises communication apparatus (10) wirelessly connectable to the further device and configured to enable the portable device to have a wireless connection state associated with the further device. A processor (12) is configured to monitor a change between a first and a second of the said coupling states; and, output data for changing the connection state based upon the change from the first coupling state to the second coupling state.
US10200071B1	System and method for interference reduction in radio communications This disclosure provides a system and method for separating a first signal from a second signal of a plurality of constituent signals within a composite signal. The method can include receiving a first portion of the composite signal at a first clock rate and exponentiating it to detect the first signal and the second signal within the composite signal and determine modulation estimates of the first and second signals and at least one symbol rate. The method can also include resampling the first portion based on the modulation estimates at x-times the at least one symbol rate to determine symbol trajectory, modulation type, and offset information between the first signal and the second signal. The method can include determining a synthesized first signal and a synthesized second signal representing the first signal and the second signal within the first period of time at a second clock rate that is a multiple of the first clock rate.
US10200070B2	Spur cancellation system for modems A modem includes a modulator and a demodulator. The demodulator includes a direct current removing (DCR) circuit to transition between an acquisition mode, where the DCR circuit operates with a first loop gain; and a tracking mode, where the DCR circuit operates with a second loop gain. The second loop gain is smaller than the first loop gain, and the timing of the transition between the acquisition mode and tracking mode is programmable.
US10200067B1	Radio frequency transceiver front-end systems and methods Systems and methods for improving operational efficiency of a radio frequency system, which includes a low noise amplifier coupled to an antenna that generates an analog electrical signal based on received electromagnetic waves. The low noise amplifier includes a positive input transistor with a first drain, a negative input transistor with a second drain, a first data branch coupled between the first and second drains, and a second data branch coupled between the first drain and second drains. The first data branch supplies a first current modulated signal generated based on the analog electrical signal when the radio frequency system expects the received electromagnetic waves to include data indicated using a first communication protocol. The second data branch supplies a second current modulated signal generated based on the analog electrical signal when the radio frequency system expects the received electromagnetic waves to include data indicated using a second communication protocol.
US10200065B2	Apparatus and method for correcting at least one bit error within a coded bit sequence An apparatus for correcting at least one bit error within a coded bit sequence includes an error syndrome generator and a bit error corrector. The error syndrome generator determines the error syndrome of a coded bit sequence derived by a multiplication of a check matrix with a coded bit sequence.
US10200064B1	Systems and method for bit-flipping decoders with partial-column processing, ordering and scheduling Systems and methods for performing a parity check on encoded data are disclosed. Encoded data is received. A parity check is performed based on a parity check matrix. In response to determining the first parity check is successful, a parity check number is incremented. Additional parity checks are selectively performed on subsequent portions of the array based on comparing the incremented parity check number to a threshold.
US10200063B2	Memory controller, semiconductor memory system and operating method thereof An operation method of a memory controller includes: reading a second data from memory cells when a hard decision error correction decoding operation based on a first data read from the memory cells fails; calculating a LLR of each bit-data included in the first data by using the first and second data; and performing a soft decision error correction decoding operation based on the LLR, wherein the memory cells include a first and second memory cell, wherein the first data includes first-bit-data read from the first and second memory cell, wherein the second data includes second-bit-data read from the first and second memory cell, wherein the LLR is a LLR of the first-bit-data read from the first memory cell calculated based on the first bit and a second bit read from the first memory cell and a first bit and a second bit read from the second memory cell.
US10200061B2	System and method for maximal code polarization An apparatus and a method. The apparatus includes a plurality of polarization processors, including n inputs and n outputs, where n is an integer, wherein the plurality of polarization processors is configured to polarize channels with different bit-channel reliability; and at least one permutation processor, including n inputs and n outputs, wherein each of the at least one permutation processor is connected between two of the plurality of polarization processors, and connects the n outputs of a first of the two of the plurality of polarizations processors to the n inputs of a second of the two of the plurality of polarization processors between which each of the at least one permutation processor is connected in a permutation pattern, wherein at least one permutation processor is configured to not further polarize a bit channel.
US10200056B2	Method and apparatus for analog to digital error conversion with multiple symmetric transfer functions An analog-to-digital conversion (ADC) block includes: an amplifier block configured to receive two analog input signals and a primary-precision configuration signal and generate a first pair of differential signals by amplifying the two analog input signals according to a primary-precision gain that is programmably set by the primary-precision configuration signal; a configuration block configured to receive a fractional-precision configuration signal and generate a second pair of differential signals by amplifying the first pair of differential signals according to a fractional-precision gain that is programmably set by the fractional-precision configuration signal; and a differential analog-to-digital converter (ADC) including a voltage-controlled oscillator (VCO), two counters, and an error generator block. The VCO receives the second pair of differential signals and generates two pulse signals having frequencies that vary depending on a difference between the second pair of differential signals. Each of the two counters receives a respective pulse signal from the VCO and generate a digital counter value. The error generator block receives digital counter values from the two digital counters generates a digital conversion code corresponding to a difference between the digital counter values.
US10200054B1	Adaptive dynamic element matching of circuit components In a general aspect, an apparatus can include a signal analyzer configured to analyze a signal associated with a processing pipeline, and a dynamic element matching (DEM) selection module configured to select a DEM algorithm from a plurality of DEM algorithms based on the analysis performed by the signal analyzer. The apparatus can include a set of circuit elements where each circuit element from the set of circuit elements has the same logical configuration, and a circuit element selection module configured to select a subset of the set of circuit elements based on the selected DEM algorithm.
US10200053B2	Magnitude compensation technique for processing single-bit wide data Droop caused by a filter may be compensated by applying a pre-filter to the audio signal that cancels out, at least in part, the droop caused by the filter. The pre-filter may implement magnitude compensation that causes an approximately flat passband response when the pre-filtered signal is passed through the filter. The pre-filter may be applied to one-bit wide data streams, such as high-fidelity direct stream digital (DSD) audio data or other one-bit wide data such as pulse-density modulation (PDM) encoded data. The pre-filtering and filtering may be implemented in components of an audio processor, such as in a digital-to-analog converter (DAC). The pre-filtering may include upsampling the one-bit wide data to form symbols and substituting an eighth bit of the symbol with an inverted version of an earlier-received bit.
US10200050B1	Auto-phase-shifting and dynamic on time control current balancing multi-phase constant on time buck converter An apparatus including a first circuit and a second circuit. The first circuit may generate an output signal with a regulated voltage and maintain a constant switch frequency having a first on time and a first off time. The second circuit may generate a shifted signal based on a phase delay with respect to the output signal and maintain a shifted frequency having a second on time and a second off time. The second on time may follow the first on time by the phase delay. The second on time may be based on the first on time and transient conditions of a load. The apparatus may implement an automatic phase shift adjustment. A current sensing comparison may implement a cycle-by-cycle comparison between the output signal and the shifted signal to determine the second on time and perform a tuning operation to achieve inductor current balancing.
US10200045B2	Spread spectrum clock generator circuit A spread spectrum clock generator circuit includes a phase comparator; an oscillator to output an output clock signal; a phase selector to select one of phases equally dividing one cycle of the output clock signal, and to generate a phase shift clock signal having a rising edge in the selected phase; and a phase shift controller to control the phase selector. The phase shift controller generates a variable phase shift amount; determines the phase of the rising edge so that the cycle of the phase shift clock signal has a length changed from the cycle of the output clock signal by the variable phase shift amount added with a fixed phase shift amount; and changes a setting of an SS modulation profile if the selected phase exceeds an upper limit, falls below a lower limit, or is within the upper and lower limits.
US10200041B2	Analog multiplexer An analog multiplexer may be used for sampling an input voltage that is capable of having a higher voltage level than an upper supply voltage. The analog multiplexer includes a plurality of input switch circuits and a shorting switch circuit. The plurality of input switch circuits include n-type or p-type laterally diffused field effect transistors (NLDFETs or PLDFETs). At least one of the input switch circuits includes a level shifting switch circuit that is able to sample an input voltage that is greater than the upper supply voltage for the multiplexer. A shorting switch circuit, at an output of the multiplexer, includes a capacitively coupled gate drive circuit and is configured to short a first differential output to a second differential output after the input voltage is sampled.
US10200037B2	Apparatus and methods for on-die temperature sensing to improve FPGA performance A field programmable gate array (FPGA) includes a temperature sensor array. The FPGA also includes a supply voltage modulation circuit. The supply voltage modulation circuit is coupled to the temperature sensor array.
US10200036B1	Radiation-hard precision voltage reference Provided is a Precision Voltage Reference (PVR). In one example, the PVR includes a resonator having an oscillation frequency, the resonator including a first proof-mass, a first forcer located adjacent a first side of the first proof-mass, and a second forcer located adjacent a second side of the first proof-mass. The PVR may include control circuitry configured to generate a reference voltage based on the oscillation frequency of the resonator, at least one converter configured to receive the reference voltage from the control circuitry, provide a first bias voltage to the first forcer based on the reference voltage, provide a second bias voltage to the second forcer based on the reference voltage, and periodically alter a polarity of the first and second bias voltages to drive the oscillation frequency to match a reference frequency, and an output configured to provide the reference voltage as a voltage reference signal.
US10200035B2	Sound/silent switchable photoelectric switch A photoelectric switch, including: a main body, an upper cover, an infrared tube, an elastic shading mechanism, a bridge piece, a slidable switch member, a key, a sound mode trigger block, a silent mode trigger block, and an accommodating space. The slidable switch member is transversely slidable between the main body and the upper cover. The handle of the slidable switch member protrudes out of the main body. Both the sound mode trigger block and the silent mode trigger block are up-down movably disposed on the slidable switch member and move along with the slidable switch member. When the slidable switch member is slid to one side, the sound mode trigger block is disposed right beneath the key; and when the slidable switch member is slid to the other side, the silent mode trigger block is disposed right beneath the key.
US10200034B2	Photoelectric switch A photoelectric switch, including: a base, an infrared tube, a keycap, a balance frame, a resetting mechanism, and a light-blocking member. The light-blocking member is configured to change the propagation direction of light emitted from the infrared tube to allow or block the light propagation in the infrared tube. The infrared tube is disposed on the base. The infrared tube includes a light-emitting end and a light-receiving end. The infrared tube, the balance frame, and the resetting mechanism are disposed beneath and covered by the keycap. In operation, upon being pressed by an external force, the balance frame leads the keycap to move downwards smoothly; the light-blocking member moves upwards or downwards along with the motion of the keycap and the balance frame or the resetting mechanism. The resetting mechanism is configured to reset the keycap or the balance frame.
US10200032B2	Optoelectronic safety device An optoelectronic safety device for monitoring a machine movement includes an emitter/receiver device, control electronics, an electric line which includes at least two wires to transmit a supply voltage and a control signal, and a device provided so that the supply voltage and the control signal can be transmitted where the at least two wires is a two-wire electric line or, alternatively, a three-wire electric line.
US10200028B2	Electric assembly including a reverse conducting switching device and a rectifying device An electric assembly includes a reverse conducting switching device and a rectifying device. The reverse conducting switching device includes transistor cells for desaturation configured to be, under reverse bias, turned on in a desaturation mode and to be turned off in a saturation mode. The rectifying device is electrically connected anti-parallel to the switching device. In a range of a diode forward current from half of a maximum rating diode current of the switching device to the maximum rating diode current, a diode I/V characteristic of the rectifying device shows a voltage drop across the rectifying device higher than a saturation I/V characteristic of the switching device with the transistor cells for desaturation turned off and lower than a desaturation I/V characteristic of the switching device with the transistor cells for desaturation turned on.
US10200026B1	High power handling switch using reduced operating impedance An architecture that increases the power that handling capability of the switches within a transceiver is disclosed. An impedance transformation network is introduced at each of the terminals of a transmit/receive switch. Each impedance transformation network transforms the impedance external to the transmit/receive switch to a lower impedance internal to the switch to increase the power handling capability of the transmit/receive switch.
US10200023B2	Switch control circuit A switch control circuit includes: a clock generating circuit that generates one or more periodic signals having a predetermined cycle; a clock adjusting circuit that generates one or more control signals by adjusting a bias voltage of the one or more periodic signals and changing an ON period of the one or more periodic signals; and at least one switching circuit including one or more switches that are switched to ON if respective amplitudes of the generated one or more control signals is equal to or higher than a threshold value and that are switched to OFF if the respective amplitudes of the generated one or more control signals is less than the threshold value.
US10200022B2	Integrated voltage regulator with in-built process, temperature and aging compensation A method for regulating voltage for a processor is disclosed. The method comprises requesting a target frequency value, wherein the target frequency value determines a target clock frequency for clocking the processor. The method also comprises comparing the target clock frequency to a first signal to generate an error signal. Further, the method comprises using the error signal to generate a duty cycle control signal, wherein the duty cycle control signal is operable to generate a periodic waveform. Finally, the method comprises generating an output regulator voltage using the periodic waveform, wherein the output voltage is operable to provide power to the processor.
US10200016B2	Contactless readable programmable transponder to monitor chip join A contactless readable programmable transponder to monitor chip join and method of use are disclosed. The method includes reading a frequency of an oscillator associated with a chip module. The method further includes correlating the frequency with a bond quality of the chip module.
US10200003B1	Dynamically extending loudspeaker capabilities The present disclosure provides systems and methods to dynamically extend loudspeaker capabilities. In particular, a system comprising a loudspeaker can receive an electronic audio signal. Responsive to a change in available headroom, one or more parameters of an equalizer being applied to at least a portion of the signal in order to extend a physical low-frequency response of the loudspeaker can be modified based on the change in available headroom. Additionally or alternatively, responsive to the change in available headroom, a bandwidth of low-frequency content of the signal that is being synthesized by the system to extend low-frequency capability of the system beyond physical capabilities of the system can be adjusted based on the change in available headroom.
US10200001B2	Methods and devices for automatic gain control At least one example embodiment provides a controller to sample a first signal. The first signal indicates an initial amplitude of an output signal of an oscillator circuit. The controller selects a step amount based on the first signal and a target amplitude of the output signal. The controller generates a control signal for the oscillator circuit based on the selected step amount. The control signal indicates a change in gain for the oscillator circuit according to the selected step amount.
US10199998B2	Method and system for a pseudo-differential low-noise amplifier at Ku-band Methods and systems for a pseudo-differential low-noise amplifier at Ku-band may comprise a low-noise amplifier (LNA) integrated on a semiconductor die, where the LNA includes first and second differential pair transistors with an embedded inductor tail integrated on the semiconductor die. The embedded inductor tail may include: a first inductor with a first terminal capacitively-coupled to a gate terminal of the first differential pair transistor and a second terminal of the first inductor coupled to second, third, and fourth inductors. The second inductor may be coupled to a source terminal of the first differential pair transistor, the fourth inductor may be coupled to a source terminal of the second differential pair transistor, and the third inductor may be capacitively-coupled to a gate terminal of the second differential pair transistor and also to ground. The second inductor may be embedded within the first inductor.
US10199993B2	Stabilization of direct learning algorithm for wideband signals The present invention addresses method, apparatus and computer program product for stabilization of the direct learning algorithm for wideband signals. Thereby, a signal to be amplified is input to a pre-distorter provided for compensating for non-linearity of the power amplifier, and the pre-distorted output signal from the pre-distorter is forwarded to the power amplifier. Parameters of the pre-distorter are adapted based on an error between the linearized signal output from the power amplifier and the signal to be amplified using an adaptive direct learning algorithm, and the linear system of equations formed by the direct learning algorithm are solved using a conjugate gradient algorithm, wherein, once per direct learning algorithm adaptation, at least one of the initial residual and the initial direction of the conjugate gradient algorithm are set based on the result of the previous adaptation.
US10199991B2	RF power transistor circuits A radio frequency (RF) power transistor circuit includes a power transistor and a decoupling circuit. The power transistor has a control electrode coupled to an input terminal for receiving an RF input signal, a first current electrode for providing an RF output signal at an output terminal, and a second current electrode coupled to a voltage reference. The decoupling circuit includes a first inductive element, a first resistor, and a first capacitor coupled together in series between the first current electrode of the power transistor and the voltage reference. The decoupling circuit is for dampening a resonance at a frequency lower than an RF frequency.
US10199990B2	High dynamic range device for integrating an electrical current A device for integrating an electric current during a period Tint, including an operational amplifier and a capacitor connected between a first input and an output of the amplifier, a second input of the amplifier being taken to a voltage VBUS, output voltage Vout of the amplifier being saturated at a high voltage VsatH and a low voltage VsatH according to the charge quantity in the capacitor. The device also includes: a circuit for switching the terminals of the capacitor; and a circuit for triggering the circuit at least once during period Tint when voltage Vout both grows and is substantially equal to a reference voltage VREF, the voltage VREF being smaller than or equal to voltage VsatH, and reference voltage VREF and voltage VBUS being selected to comply with relation 2·VBUS−VREF≥VsatL; and a storage circuit for storing the number of triggerings having occurred between the initial time and the end time of the integration period.
US10199986B2	Controlled muting and power ramping of a voltage-controlled oscillator Systems and methods are provided in which a voltage-controlled oscillator for a radio transmitter includes a LC tank circuit, and a muting circuit. The LC tank circuit includes an inductive element and a capacitive element; wherein the inductive element of the LC tank circuit includes the antenna of the transmitter. The muting circuit can include a variable resistor connected in parallel with the LC tank circuit.
US10199980B2	Electric power control method and electric power control device An electric power control method includes determining whether to change an operation period within which the operating is performed so as to be longer than one cycle of the carrier wave or not; reducing the switching operation of the switching elements in a first half cycle of the carrier wave; changing a slope of the carrier wave in an intermediate period between the first half cycle of the carrier wave and a last half cycle of the carrier wave in the operation period after the change to compare the carrier wave with the duty command value in magnitude; performing the switching operation of the switching elements according to a result of the comparison; and reducing the switching operation of the switching elements in the last half cycle of the carrier wave.
US10199974B2	Motor driving circuit and motor driving method When a motor is started up, an initial position detection circuit detects the initial position of a rotor using an inductive sensing method. An automatic parameter generating circuit determines a parameter to be used by the initial position detection circuit. The automatic parameter generating circuit measures: (i) a first time period τ+ required for a coil current to reach a threshold after a first polarity voltage is applied across an electrode pair of the motor; and (ii) a second time period τ− required for the coil current to reach a threshold after a second polarity voltage is applied across the electrode pair, for each threshold value, while the threshold value used in the measurement is changed. The threshold that provides a maximum difference between the first time period τ+ and the second time period τ− is held as the parameter to be used by the initial position detection circuit.
US10199970B2	Method for handling an over voltage ride through event The present invention relates to a method for operating a doubly fed induction generator wind power facility during an OVRT event, said the wind turbine facility being adapted to inject active and/or reactive current into an associated grid, the method comprising the steps of determining the occurrence of an over voltage grid event, and maintaining a grid-side inverter of the doubly fed induction generator wind power facility fully operable during the over voltage ride though event so as to maintain a controllable active and/or reactive current capability during the over voltage grid event.
US10199965B2	Magnetic sensor integrated circuit, motor assembly and application apparatus A magnetic sensor integrated circuit, a motor and an application apparatus. The magnetic sensor includes a magnetic sensor, a signal processing unit, an output control circuit and an output port. The magnetic sensor receives a constant current sense a magnetic polarity of an external magnetic field and output a differential signal. The signal processing unit amplifies the differential signal and eliminates an offset of the differential signal to obtain a magnetic field detection signal. The output control circuit control, at least based on the magnetic field detection signal, the magnetic sensor integrated circuit to operate in at least one a first state in which a current flows from the output port to the outside and a second state in which a current flows from the outside into the output port.
US10199962B2	Plug and play universal input actuator An actuator in a HVAC system includes a motor and a drive device driven by the motor. The drive device is coupled to a movable HVAC component for driving the movable HVAC component between multiple positions. The actuator includes an input connection configured to receive an input signal and a processing circuit coupled to the motor. The processing circuit is configured to determine whether the input signal is an AC voltage signal or a DC voltage signal. The processing circuit is configured to operate the motor using an AC motor control technique in response to determining that the input signal is an AC voltage signal and configured to operate the motor using a DC motor control technique in response to determining that the input signal is a DC voltage signal.
US10199961B2	Control method for breaking an electric motor A control method brakes an electric motor connected to a voltage source. The method involves, in each cycle, the supply of current to the motor, with a delay tret, at an angle α. The method includes a sequence such that, for every n cycle, the following steps are executed: a) determining the value of a variation in the resistance of the motor during the preceding n cycles of the voltage, b) comparing the value of the variation in resistance with a threshold resistance value Rt, c) increasing in the delay tret if the value of the variation in resistance is lower than the threshold resistance value. The increase in the delay tret is executed in accordance with a gamma command, where the angle α lies between 50° and 80°.
US10199960B2	Vibration wave motor A vibration wave motor includes: a vibrator including a vibration plate and a piezoelectric element; a friction member frictionally contacting the vibrator; a pressing member generating a pressing force to bring the vibrator in frictional contact with the friction member; and a pressing force transmitting member between the vibrator and the pressing member to transmit the pressing force to the vibrator. The vibrator and the friction member move in a relative movement direction by an elliptical vibration, and the pressing force transmitting member includes: an engagement portion formed near a contact portion with the pressing member and engaged with the pressing member; a first restricting portion restricting movement in the relative movement direction; and a second restricting portion. restricting movement in a direction perpendicular to a pressing direction by the pressing member and the direction. The pressing force transmitting member is rotatably held with respect to the pressing member.
US10199956B2	Power supply system, apparatus, and control method combining a first control signal and a second control signal A power supply system includes a power supply, a converter, and a processor. The converter converts voltage of the electric power supplied from the power supply. The processor is configured to generate a first control signal to control the converter to output a target voltage or a target current via a feedback control based on the first control signal. The processor is configured to generate a second control signal to detect a state of the power supply. The processor is configured to combine the first control signal and the second control signal to control the converter.
US10199949B1	Active-clamp flyback circuit and control method thereof The present invention provides an active-clamp flyback circuit and a control method thereof. The active-clamp flyback circuit includes a flyback switching power supply, and further includes a first capacitor and a first switch tube. One end of the first capacitor is connected with a high potential end of an input power supply, the other end is connected with a first end of the first switch tube, and a second end of the first switch tube is connected with a common end of the main power switch tube and the primary winding. A turn-off moment of the first switch tube is adjusted according to time when the main power switch tube is turned on and the first switch tube is turned off and voltages at both ends of the magnetizing inductor. The present invention can reduce the turn-on loss of the main power switch tube.
US10199947B2	Isolated partial power processing power converters In an Input-Series-Output-Parallel (ISOP)-type power converter circuit, a DC-to-DC converter has a positive input coupled to a DC power source and a negative input connected to a negative output. A plurality of capacitors are coupled in series between a positive output of the converter and a circuit ground, the negative output of the converter coupled to a common node of first and second capacitors. A half-bridge inverter network is coupled between the positive output and a circuit ground, each inverter having an input respectively coupled to the first capacitor and the second capacitor. A plurality of resonant tanks are coupled to an output of a respective one of first and second half-bridge inverters. A transformer is coupled to outputs of the plurality of resonant tanks. A rectifier circuit is coupled to a secondary winding of the transformer to provide a DC output voltage.
US10199943B2	Systems and methods for voltage regulation of primary side regulated power conversion systems with compensation mechanisms Systems and methods are provided for voltage regulation of power conversion systems. An example system controller includes: a first sampling component configured to sample a sensing signal and determine a compensation signal based on at least in part on the sensing signal, the sensing signal being associated with a first current flowing through a primary winding of a power conversion system; a signal processing component configured to receive a feedback signal and the compensation signal and generate a first signal based at least in part on the feedback signal and the compensation signal, the feedback signal being associated with an auxiliary winding coupled with a secondary winding of the power conversion system; an error amplifier configured to receive the first signal and a reference signal and generate an amplified signal based at least in part on the first signal and the reference signal.
US10199935B2	Hybrid boosting converters Various examples are provided for hybrid boosting converters (HBCs). In one example, a HBC includes an inductive switching core and a bipolar voltage multiplier (BVM) coupled to the inductive switching core. In another example, a HBC micro-inverter includes an inductive switching core coupled to an input voltage; a BVM comprising a positive branch and a negative branch coupled to the inductive switching core; and a switched bridge coupled across the positive and negative branches of the BVM. In another example, a 3D HBC includes a common axis comprising a series of capacitors; and a plurality of parallel wings coupled to the common axis. The parallel wings form a BVM when coupled to the common axis and include an inductive switching core that is coupled to an input voltage. The common axis can include a single input voltage or multiple input voltages can be coupled through the wings.
US10199934B2	Systems and methods for output current regulation in power conversion systems Systems and methods are provided for regulating a power converter. An example system controller includes: a driver configured to output a drive signal to a switch to affect a current flowing through an inductive winding of a power converter, the drive signal being associated with a switching period including an on-time period and an off-time period. The switch is closed in response to the drive signal during the on-time period. The switch is opened in response to the drive signal during the off-time period. A duty cycle is equal to a duration of the on-time period divided by a duration of the switching period. One minus the duty cycle is equal to a parameter. The system controller is configured to keep a multiplication product of the duty cycle, the parameter and the duration of the on-time period approximately constant.
US10199930B2	Frequency modulation based voltage controller configuration A voltage converter can be switched among two or more modes to produce an output voltage tracking a reference voltage that can be of an intermediate level between discrete levels corresponding to the modes. One or more voltages generated from a power supply voltage, such as a battery voltage, can be compared with the reference voltage to determine whether to adjust the mode. The reference voltage can be independent of the power supply voltage. Further, the voltage converter may implement frequency modulation and a pulse skipping mode to improve the efficiency of switching operational states of the voltage converter.
US10199929B2	Transient event detector circuit and method Disclosed examples include a transient event detector circuit to detect transient events in a switching converter, including a DLL circuit to detect changes in a duty cycle of a pulse width modulation signal used to operate a switching converter, and an output circuit to provide a status output signal in a first state when no transient event is detected, and to provide the status output signal in a second state indicating a transient event in the switching converter in response to a detected change in the duty cycle of the pulse width modulation signal.
US10199928B1	Soft start of switched capacitor converters by reducing voltage provided by initial power switch Circuits and methods are provided for soft-starting a switched-capacitor converter (SCC), so as to limit inrush current at the start-up of the SCC. This is accomplished by using the first power switch of the SCC, i.e., the switch coupled to the input of the SCC, to reduce the voltage provided at the SCC input, such that the full input voltage is not directly applied to the SCC circuitry downstream from the first power switch during the SCC start-up. The reduced voltage provided to the SCC circuitry (other than the first power switch) serves to limit the current drawn by the remainder of the SCC circuit during the SCC start-up. This reduced voltage begins at zero and ramps to the voltage provided at the SCC input. Once the reduced voltage reaches the input voltage level, steady-state operation of the SCC may begin.
US10199927B2	PWM scheme based on space vector modulation for three-phase rectifier converters A matrix rectifier includes a bridge x defined by phases A and B and a bridge y defined by phases A and C, in which each input phases A, B, and C includes two bi-directional switches connected in series. A method of operating the matrix rectifier includes operating the bridges x and y as independent full-bridge phase-shifted converters in each 60° interval between two successive zero-voltage crossings of the input phases A, B, and C. In a first 30° sector of each 60° interval, the bridges x and y are operated in a first vector sequence in every switching period, and the first vector sequence is divided into a sequence of x+, y+, 0, x−, y−, 0.
US10199919B2	Zero dead time control circuit A circuit and method for controlling a power converter having a high-side and a low-side switch are provided. The circuit may include a comparator configured to receive a reference voltage at a first input and a ramp voltage at a second output, and to output a delay signal based on a comparison of the reference voltage and the ramp voltage. The delay signal may be configured to turn on one or more of the high-side switch and the low-side switch. The circuit may increase or decrease the reference voltage based on a dead time, which equals an amount of time when the high-side switch and the low-side switch are turned off. The circuit may include a first switch that is controlled to lower the reference voltage if a dead time exceeds a first threshold, and a second switch that is controlled to raise the reference voltage if the dead time delay signal is below a second threshold.
US10199918B2	Method of forming a semiconductor device In one embodiment, a controller for a power supply may be configured to operate as a quasi-resonant controller while operating in a discontinuous current mode and to operate as one of a pulse width or pulse frequency modulation controller while operating in a continuous current mode. The controller may have an embodiment that varies a frequency of the switching drive signal around a center frequency while operating in the continuous current mode, and varies a value of a current sense signal but not vary the frequency of the switching drive signal around a center frequency while operating in the discontinuous current mode.
US10199915B2	Networked control of a modular multi-level converter A method for controlling a modular multi-level converter comprises the steps of: collecting control input variables from the converter; transmitting the control input variables to a controller of the converter via a first communication medium; determining, in the controller, and actual state of the converter and at least one control output variable based on a model of the converter; and transmitting the control output variable to the converter for controlling the converter via a second communication medium. The model of the converter accounts for the first and/or the second communication medium.
US10199912B2	Torque motor with mechanical flexures establishing armature-to-field gaps A torque motor has a mechanical reference member, an armature, and a field assembly. The field assembly includes field pole pieces defining a pole opening, and the armature is mounted to the mechanical reference member for rotation about a motor axis and extends into the pole opening with respective gaps to the field pole pieces. The field assembly is secured to the mechanical reference member and spaced therefrom by elastically deformable flexures, deformed sufficiently to locate the armature at a predetermined position within the pole openings with corresponding lengths of the gaps. During manufacture, a load can be applied to move the field assembly relative to the mechanical reference member against the deformation force of the flexures to locate the pole opening relative to the armature pole piece such that the gaps of desired lengths are formed.
US10199911B2	Orientation magnetization device and magnet-embedded rotor An orientation magnetization device includes plural orientation magnetization yokes and plural orientation magnetization magnets, and molds field magnets while a rotor core is disposed in a magnetic circuit that is formed by assembling the orientation magnetization yokes and the orientation magnetization magnets into an annular shape. When the rotor core is disposed in the magnetic circuit, protruding portions are disposed at portions of the respective orientation magnetization yokes facing the rotor core. Auxiliary magnets are disposed in gaps between the respective orientation magnetization magnets and the rotor core, on opposite sides of each protruding portion in a circumferential direction of the orientation magnetization device. Each protruding portion and each auxiliary magnet extend in an axial direction of the orientation magnetization device, and are skewed with respect to the axial direction of the orientation magnetization device.
US10199909B2	Isostatic brush holder for rotating electrical slip ring assemblies An isostatic brush holder (10) comprises a central body (12), one or more arms (14, 14′) rotationally disposed in proximity of the opposite ends of said central body (12), and defining a first and a second end (16, 16′), and a plurality of brushes (20) cooperating with at least one elastic element (22), where said arms (14, 14′) define the respective first ends (16) of quick release snap catches (24, 24′), said arms being pivoted to each other at the second ends (16′), said arms being further connected in a swivelling manner and in proximity to said second ends (16′) at the opposite ends of said central body (12).
US10199905B2	Cooling medium supply/discharge device and superconducting rotary machine including cooling medium supply/discharge device A cooling medium supply/discharge device includes a cylindrical rotary casing which is rotatable with a rotary shaft of the rotor; a cylindrical stationary casing fixed such that the stationary casing extends inward relative to the rotary casing and coaxially with the rotary casing, the stationary and rotary casings being relatively rotatable; a first stationary cylindrical body which is inserted into the stationary casing such that the first stationary cylindrical body is not rotatable; a first rotary cylindrical body which is inserted into the first stationary cylindrical body with a gap such that the first rotary cylindrical body is rotatable together with the rotary shaft; a second stationary cylindrical body which is inserted into the first stationary cylindrical body such that the second stationary cylindrical body is not rotatable; and a second rotary cylindrical body which is inserted into the first rotary cylindrical body and rotatable together with the rotary shaft.
US10199899B2	Internal pressure attenuator device for rotating electrical machines able to operate in explosive atmospheres Disclosed herein are pressure attenuator devices for rotating electrical machines, The pressure attenuation device contains a screen with a plurality of openings, wherein the screen is positioned within the internal cavity and configured to segregate a flame front propagating from an ignition source formed by a combustion process originated in the cavity. Thus, with the use of the pressure attenuation device, an expressive reduction of pressure inside the cavity of the rotating electrical machine is obtained.
US10199897B2	Very high temperature stator construction A stator has a field winding, the winding comprising a plurality of axial conductors connected at their ends to form at least one circuit with a number of turns. Each axial conductor is disposed within a tubular axial insulation member, the tubular axial insulation members being disposed within a stack of laminations. The axial conductors and the tubular insulation members are radially distributed at equal angles. The position of the axial conductors and the tubular insulation members is predetermined.
US10199884B2	Spinal cord stimulator system A wireless charger for automatically tuning an optimum frequency to inductively charge a rechargeable battery of an implantable pulse generator (IPG) that generates spinal cord stimulation signals for a human body is provided. The charging coil in the charger is wirelessly coupled to a receiving coil of the IPG to charge the rechargeable battery. An optimization circuit detects a reflected impedance of the charging coil through a reflected impedance sensor, and select an optimum frequency of a charging signal supplied to the charging coil based on the detected reflected impedances of a plurality of charging frequencies in a selected frequency range. Advantageously, the optimum charging frequency provides a more efficient way to charge the IPG's rechargeable battery.
US10199875B2	Wireless power transfer system A transmitter for transmitting wireless power according to an embodiment of the present invention includes a transmission side communication unit, wherein the transmission side communication unit transmits a first control signal to a reception side communication unit, then receives a second control signal including information about an amount of power of the first control signal from the reception side communication unit, and controls the amount of power of the first control signal by comparing the amount of power of the first control signal with a predetermined range based on the second control signal.
US10199872B2	Electronic device and method for wired and wireless charging in electronic device An apparatus for wired and wireless charging of an electronic device are provided. The electronic device includes a housing, a display on a surface of the housing, a battery mounted in the housing, a circuit electrically connected with the battery, a conductive pattern positioned in the housing, electrically connected with the circuit, and configured to wirelessly transmit power to an external device, a connector on another surface of the housing and electrically connected with the circuit, a memory, and a processor electrically connected with the display, the battery, the circuit, the connector, and/or the memory. The circuit is configured to electrically connect the battery with the conductive pattern to wirelessly transmit power to the external device and electrically connect the battery with the connector to transmit power to the external device by wire, simultaneously or selectively, with wirelessly transmitting power to the external device.
US10199871B2	Apparatus and method for wireless power charging of subsequent receiver An apparatus and method for transmission of wireless power to a plurality of chargeable devices. The apparatus and method include and provide for a wireless power transmitter including a power transmitting element configured to use a current at a first level to wirelessly transmit power sufficient to provide power to one or more chargeable devices positioned within a charging region. The apparatus and method further include and provide for a controller to detect a subsequent chargeable device positioned within the charging region and to adjust the current from the first level to a default level prior to communication with the subsequent chargeable device.
US10199870B2	Home appliance A home appliance is disclosed, including a motor, a drive unit configured to drive the motor, a first circuit unit including a main controller configured to control the drive unit, a display unit, and a second circuit unit including a display controller configured to control the display unit. The first circuit unit transmits wireless power to the second circuit unit, using a first frequency, and the second circuit unit transmits data to the first circuit unit, using a second frequency different from the first frequency. Thereby, wireless power transmission and bidirectional communication are performed between the first and second circuit units.
US10199864B2	Multilingual power system protection device A multilingual power system protection device to facilitate communications in different human languages over different communication ports is described herein. In one embodiment, an electric power system device may include communication ports configured to receive inputs in different human languages and a monitored equipment interface in communication with a component of an electric power system. The electric power system device may receive an input on one of the communication ports and may associate the input with a function implemented by the component of the electric power system. The electric power system device may further generate a response in a pre-selected human language, and may transmit the response using the communication ports.
US10199862B2	Emergency dimming apparatus An emergency dimming apparatus. The emergency dimming apparatus includes an input, a charger, an energy storage device, a power conversion device, an emergency control output, and a controller. The input is configured to receive a line voltage. The charger is configured to receive the line voltage and generate a charging voltage. The energy storage device is configured to receive the charging voltage and selectively output a stored voltage. The power conversion device is configured to convert the stored voltage to an output voltage. The emergency control output is configured to output an emergency control signal. The controller includes a processor and a memory. The controller is configured to monitor the line voltage, determine if the line voltage has crossed a threshold, output the output voltage when the line voltage has crossed the threshold, and output an emergency control signal when the line voltage has crossed the threshold.
US10199861B2	Isolated parallel UPS system with choke bypass switch An uninterruptible power supply (UPS) system is provided. The UPS system includes a plurality of UPSs, a ring bus coupled to the UPSs, a plurality of chokes, and at least one static switch coupled between an associated UPS of the UPSs and the ring bus. Each choke electrically couples an associated UPS to the ring bus. The static switch is switchable to selectively bypass at least one choke.
US10199860B2	Power supply recovery current history-based limitation A power supply unit (PSU) dynamically limits total recovery current. The PSU includes at least a power input, a power output, a historic maximum power draw memory, an update logic, and a recovery current limiting logic. Some implementations include a latest power measurement register, an hourly max power register, and a rolling max register, and controlling firmware. The update logic monitors a power level. The update logic updates the historic maximum power draw memory to match the monitored level. After a power interruption, the recovery current permitted to flow into the PSU is limited based on the historic usage. The recovery current may be limited in a constant, stepped, or ramped manner. The PSU may also provide power distribution. Multiple PSUs may be treated as a group, allowing an individual PSU to exceed its historic usage while the group's recovery currents are limited to the sum of historic usage levels.
US10199852B2	Charging systems for devices related to dialysis treatments In one aspect of the invention, a method of charging a medical device includes receiving radiofrequency signals from a remote machine remote from the medical device via a receiver of the medical device. The method includes converting the radiofrequency signals into electrical energy via a generator of the medical device. The method includes storing the electrical energy in an energy cell of the medical device. The method also includes powering a power consumption component of the medical device by transmitting the energy from the energy cell to the power consumption component.
US10199851B2	Power supply belt containing flexible battery and power generation means for supplying power to portable electronic devices, including wearable devices A secondary battery module capable of feeding power to a wearable device in a non-contact manner is provided. A power feeding system for an electronic device is provided. The power feeding system includes a secondary battery module and an electronic device. The secondary battery module includes a flexible secondary battery, a power sending portion for non-contact power transmission, a flexible thermoelectric power generating device, and a belt portion storing the flexible secondary battery and the flexible thermoelectric power generating device. The electronic device includes a power receiving portion for non-contact power transmission and is capable of power transmission from the power sending portion for non-contact power transmission which is included in the secondary battery module to the power receiving portion for non-contact power transmission which is included in the electronic device.
US10199848B2	Apparatuses, methods, and systems for enabling higher current charging of Universal Serial Bus (USB) specification revision 2.0 (USB 2.0) portable electronic devices from USB 3.X hosts Apparatuses, methods, and systems for enabling higher current charging of Universal Serial Bus (USB) Specification Revision 2.0 (USB 2.0) portable electronic devices from USB 3.x hosts are disclosed. In one aspect, a USB 2.0 controller is provided in a USB 2.0 portable device. A USB 3.x controller is provided in a USB 3.x host. The USB 2.0 controller is configured to draw a higher charging current than specified in USB 2.0 for the USB 2.0 portable device over a USB 2.0 cable. In order to draw the higher charging current without violating USB 2.0, the USB 2.0 controller is configured to use one or more reserved elements in an existing USB 2.0 descriptor(s) or bitmap(s) to indicate a higher charging current request from the USB 2.0 controller.
US10199847B2	Battery including programmable components Techniques for a smart battery are described. In at least some implementations, a smart battery includes internal components that enable the smart battery to perform various actions, such as communicating with a remote device, tracking power usage, controlling power output, and so forth. In at least some implementations, a smart battery includes in internal charge circuit that enables the smart battery to be recharged via an externally-supplied charging current without damaging internal components of the smart battery. In at least some implementations, a battery application enables operational parameters of a smart battery to be configured by a remote device.
US10199843B2	Connect/disconnect module for use with a battery pack There are disclosed herein various implementations of a connect/disconnect module for use with a battery pack. The connect/disconnect module includes a charge/discharge current path including multiple transistors having a first safe operating area (SOA), and a pre-charge current path coupled across the charge/discharge current path. The pre-charge current path includes multiple transistors having a second SOA that is significantly greater than the first SOA.
US10199839B2	Battery pack A battery pack includes one or more battery cells including at one side electrode tabs of different polarities, the electrode tabs distanced from each other in a first direction and each protruding in a second direction transverse to the first direction; and a protective circuit module connected to the one side of the one or more battery cells to control charging/discharging of the one or more battery cells, and the protective circuit module is arranged to be superposed on the one or more battery cells.
US10199838B2	Battery module having holder An exemplary embodiment of the present invention provides a battery module including a plurality of rechargeable batteries, a holder defining a plurality of storage spaces for holding the rechargeable batteries in a stacked configuration, a housing for enclosing the holder, and including a first cover and a second cover that face each other and press the holder, and a protective circuit module in the housing and configured to control charging and discharging operations of the rechargeable batteries.
US10199835B2	Radar motion detection using stepped frequency in wireless power transmission system An example method of wireless power transmission includes generating, by a receiver, location data associated with one or more objects based upon one or more object detection signals reflected from the one or more objects and indicating a location of each respective object in relation to the receiver. The method also includes transmitting, by the receiver, one or more communications signals containing the location data to the transmitter. The method further includes receiving, by the receiver, from one or more antennas of the transmitter one or more power waves having one or more waveform characteristics, wherein the characteristics are based on the location data generated for each respective object.
US10199832B2	Photovoltaic DC power distribution system A photovoltaic DC power distribution system provides a DC-DC converter having an output serially connected between a photovoltaic module array and a power converter, such as an inverter, in which the input voltage to the power converter is the sum of the voltage from the array and a voltage output of the DC-DC converter. The DC-DC converter only handles a portion of the power transferred from the array to the power converter.
US10199831B2	Circuit arrangement for inline voltage supply, use of such a circuit arrangement and device having such a circuit arrangement In a circuit arrangement for in-line supply of voltage to an electrical or electronic apparatus located in the region of a DC line, a parallel circuit of two diodes oriented in anti-parallel is arranged in the line. When a direct current is flowing between terminals of the circuit arrangement, the anti-parallel diodes permit a small voltage drop between the terminals, irrespective of the direction of flow of the current, which voltage drop is limited to the forward voltage of the diode that is currently forward biased. The voltage drop across the anti-parallel diodes is tapped by a supply subcircuit. A semiconductor switch can be connected in parallel with the anti-parallel diodes, which switch is controlled by a voltage-reduction subcircuit to minimize the power dissipation of the circuit arrangement.
US10199829B2	Microgrid system and control method for the same This microgrid system (100) includes: a generator device (111) for outputting power; a plurality of sub-microgrids (110) that include utility customers (112) who consume power; a shared unit (120) connected to the plurality of sub-microgrids (110), and provided with a plurality of energy storage devices (121) for storing power; and a control device (130) that, when power outputted by the generator device (111) is to be stored in the energy storage devices (121), selects an energy storage device (121) as the storage destination for the power outputted by the generator device (111), in accordance with the respective status of the plurality of energy storage devices (121), and when power is to be supplied to utility customers (112), selects an energy storage device (121) as the supply source for supplying power to the utility customers (112), in accordance with the respective status of the plurality of energy storage devices (121).
US10199828B2	Phase compensation system Systems and methods are provided for a three-phase compensation system, whereby an electric circuit is configured to be connected with three input phases of a power source and to supply three respective output phases, said electric circuit further configured to compensate for one or two malfunctioning input phases of said three input phases by supplying current from a functioning input phase of said three input phases to replace a malfunctioning input phase.
US10199823B2	Chain-link converter system with different DC-sources and method for operation An electrical chain-link converter system includes a converter phase leg for converting a plurality of DC electrical currents from a plurality of DC power sources to an AC current of an electrical power distribution network. The phase leg includes a plurality of serially connected converter cells each of which is connected to a respective power source of the plurality of DC power sources. The system also includes a control unit associated with the phase leg, the control unit including a processor; and a storage unit storing instructions that, when executed by the processor, cause the control unit to, for each of the converter cells: obtain a dedicated voltage reference for the converter cell; and transmit the voltage reference to the converter cell.
US10199822B2	Voltage balance control device and voltage balance control method for flying-capacitor multilevel converter A voltage balance control device and a voltage balance control method for a flying-capacitor multilevel converter are provided. A current direction forecasting unit acquires a voltage change amount of any selected flying capacitor of the flying-capacitor multilevel converter, and receives a feedback signal of two adjacent switch elements corresponding to the selected flying capacitor. A computing result is generated according to an average value or a cumulative value of the feedback signal in the adjusting period. After multiplication and/or division is performed on the voltage change amount and the computing result, the current direction can be forecasted according to the obtained sign. Consequently, the voltage balance of the flying capacitor of the flying-capacitor multilevel converter can be achieved.
US10199818B2	System and method for wireless power transfer using over-voltage protection A system and method of over-voltage protection includes a switch coupled between a power source and a load, a detection circuit configured to detect an onset of an over-voltage event at the load; and a driver circuit coupled to the switch and the detection circuit. The driver circuit includes a boost sub-circuit that provides a low-resistance path for opening the switch in a boost mode, the boost mode being triggered by the onset of the over-voltage event and having a predetermined duration and a steady state sub-circuit that provides a high-resistance path for holding the switch open during steady state operation when the boost mode.
US10199817B2	Variable diameter core termination with variable diameter housing A variable diameter termination includes an elastomeric tubular housing having a first portion with a first inner diameter, a second portion with a second inner diameter, and a third portion disposed between the first portion and the second portion and with a transition inner diameter. The elastomeric tubular housing is disposed on a tubular core that includes a first portion with a third outer diameter, a second portion with a fourth outer diameter, and a third portion disposed between the first portion and the second portion and with a transition outer diameter. The first portion of the elastomeric tubular housing is disposed over the first portion of the tubular core, the second portion of the elastomeric tubular housing is disposed over the second portion of the tubular core, and the third portion of the elastomeric tubular housing is disposed over the third portion of the tubular core.
US10199815B2	Watertight electrical compartment for use in irrigation devices and methods of use A watertight electrical compartment for use in an irrigation device can include a compartment body having a chamber and a sealing section configured to mate with one or more sealing rings. A sealing cap can mate with the sealing section and/or the sealing rings to seal the chamber. A cap retainer can be advanced over at least a portion of the sealing cap. One of the compartment body and cap retainer can have internal threads to be screwed onto external threads of the other one of the compartment body and cap retainer. The cap retainer can also have a stopping feature to keep the sealing cap in its sealed position. The watertight electrical compartment can be used in a wireless flow sensor assembly, a battery operated irrigation controller, and/or a battery-operated central controller device, to provide irrigation control, and/or sensor information, without the need for AC power.
US10199810B2	Rejuvenation of subsea electrical cable insulation Described is a rejuvenation method for a cable used in a subsea environment. The method includes applying a bias signal to a conducting element of the cable, the bias signal being selected to improve the insulation properties of the cable. The bias signal is selected such that, in the event of an electrical leakage current of predetermined magnitude flowing between the conducting element and a salt containing liquid of the subsea environment at a fault location. The bias signal can be a voltage which promotes an electrochemical reaction between the conducting element and the liquid resulting in the formation of a barrier material at the fault location restricting further leakage current flow and enhancing the insulation resistance of the cable. The bias signal is selected such that the electrochemical reaction promoted by the bias signal maintains the presence of the barrier material at the fault location.
US10199809B2	Holdout supports and pre-expanded units and methods including same An integral, unitary pre-expanded cover assembly unit for covering an electrical connection between first and second electrical cables each having a primary conductor and a neutral conductor includes a cover assembly, a holdout and a holdout support. The cover assembly includes an elastomeric sleeve and a duct. The elastomeric sleeve defines a cable passage to receive the electrical connection and the primary conductors of the first and second cables. The duct overlies the elastomeric sleeve. The duct defines a duct passage configured to receive at least one of the neutral conductors therethrough. The holdout is removably mounted within the cable passage of the elastomeric sleeve. The holdout defines a holdout passage. The holdout maintains the elastomeric sleeve in an expanded state. The holdout support is removably mounted within the holdout passage. The holdout support reinforces the holdout.
US10199802B1	Magnesium based gettering regions for gallium and nitrogen containing laser diode devices In an example, the present invention provides a gallium and nitrogen containing laser diode device. The device has a gallium and nitrogen containing substrate material comprising a surface region, which is configured on either a ({10-10}) crystal orientation or a {10-10} crystal orientation configured with an offcut at an angle toward or away from the [0001] direction. The device also has a GaN region formed overlying the surface region, an active region formed overlying the surface region, and a gettering region comprising a magnesium species overlying the surface region. The device has a p-type cladding region comprising an (InAl)GaN material doped with a plurality of magnesium species formed overlying the active region.
US10199796B2	Semiconductor laser device A semiconductor laser device includes a base; a heat sink protruding upward from the base and including an upper surface and a lateral surface extending from the base to the upper surface; a plurality of lead electrodes separated from the heat sink; a submount including: a first main surface fixed to the lateral surface of the heat sink, and a second main surface including a first fixing part, an upper second fixing part, and a lower second fixing part; a protective element fixed to the upper second fixing part; and a wire connecting the protective element and one of the plurality of lead electrodes.
US10199792B2	RJ-45 extraction tool An RJ-45 insertion and extraction tool is disclosed that allows a user to plug and unplug an RJ-45 connector from an RJ-45 socket in a quick and easy way that does not disturb other cables plugged into adjacent sockets.
US10199791B2	Method for connecting two devices and having a fastening device Embodiments of the present disclosure include an apparatus and a method for connecting a first device and second device. An apparatus includes an angled connector configured to connect to a first device to a second device, the first device and the second device configured to communicate through signal paths in the connector, the signal paths configured to pass digital data signals, a fastening device configured to secure the angled connector to the first device.
US10199790B2	Brush holder apparatus, brush assembly, and method Devices and methods of use for brush holder assemblies are disclosed. Brush holder assemblies including a mounting block and a brush holder are disclosed. Also illustrated is a brush holder assembly including a first portion in sliding engagement with a second portion. In some embodiments the brush holder includes a channel, such that at least a portion of the mounting block is disposed within the channel of the brush holder.
US10199783B2	Extendable modular power strip system and method of use A flexible, extendable power strip with multiple modular components linked together along a flexible wire which allows each modular unit of the power strip to be placed remote from the next to power multiple devices from the same wall power outlet. The cord may retract within the modular units when the units are connected together by any suitable means. Power outlets may be on one or more faces of each of the modular units, and additional outlets including USB outlets may also be included in each modular unit.
US10199782B1	Mounting systems for electronic devices Mounting systems can couple an electronic device to a wall. Mounting systems can include a first cavity configured to hold a power adapter of the electronic device. Mounting systems can include a channel that wraps around the first cavity. The channel can be configured to store a cable that is coupled to the power adapter and wound around the channel. A sleeve can cover the cable stored in the cable storage area of the mounting system.
US10199778B2	High-speed connector inserts and cables High speed connector inserts and cables having improved heat conduction, high strength, and may be manufactured in a reliable manner. One example may provide a connector insert having several paths by which heat may be removed from circuitry in the cable insert. In one example, heat may be removed from one or more circuits by forming a thermal path between a circuit and a shield of the connector insert. Another path may include one or more pads on a side of an integrated circuit board that are soldered directly to the shield. A braiding surrounding a cable may be soldered or otherwise thermally connected to the shield. Another example may provide a cable having a braiding that includes one or more types of fibers, such as aramid fibers. Another example may provide for increased manufacturability by using a wire comb and a solder bar.
US10199776B2	Electrical connector with improved shielding plate An electrical connector includes a terminal module including an insulating housing, a plurality of terminals and a shielding plate. The insulating housing defines a base and a mating tongue extending from the base, the mating tongue defines opposite mating surfaces, a front face and opposite side faces connecting with the mating surfaces and the front face. The terminals include contacting sections exposed upon the mating surfaces and leg sections out of the base. The shielding plate is embedded in the insulating housing and includes a main portion disposed between the mating surfaces and two thickened side portions, the side portions enclose opposite side faces of the mating tongue and each provides a side latch at an outer side face thereof. The side portions extend forward to the front face of the mating tongue and rearward to the base.
US10199775B2	Electrical connector with device securing shielding plate and insulator together before molding An electrical connector includes an insulative housing, upper and lower contacts disposed in the housing, a metallic shielding plate, and a metallic shield enclosing the housing. The insulative housing includes a first insulator with a first mating tongue thereof, and a second insulator with a second mating tongue thereof wherein the shielding plate is sandwiched between the first insulator and the second insulator. The shielding plate forms a cutout with side edges in two opposite lateral sides. The second insulator forms a pair of pressing parts extending toward the shielding plate with a hook at the end. When the shielding plate is assembled to the second insulator, the hook engages the side edge of the cutout so as to secure the shielding plate to the second insulator in the vertical direction.
US10199772B2	Power distribution apparatus with rotary opening/closing type plug fixing means for communications equipment rack A power distribution apparatus with a rotary-opening/closing type plug fixing device for a communication equipment rack is provided. The power distribution apparatus prevents poor connection resulting from accidentally touching other power plugs by fixing the power plug with the plug fixing device which rotates in one direction, and allows the separation of the plug fixing device with only one hand when separating the power plug, thereby enabling users to conveniently separate the power plug even in a narrow space.
US10199770B2	Connector A connector includes a base member having a first surface facing a rear surface of a flexible substrate and a projection projecting from the first surface, and a contact which has a second surface facing a flexible conductor exposed on a front surface of the flexible substrate and a projection accommodating portion disposed in the second surface, the first surface of the base member coming into contact with the rear surface of the flexible substrate and the second surface of the contact coming into contact with the front surface of the flexible substrate, the projection being inserted into the projection accommodating portion with the flexible substrate being sandwiched therebetween, and an inner peripheral surface of the projection accommodating portion coming into contact with the flexible conductor in a direction parallel to the second surface to electrically connect the contact to the flexible conductor.
US10199768B2	Connector A connector comprises a housing and a lock connected to the housing. The lock has a base extending in a mating direction, a bend extending continuously from a rear end of the base in the mating direction and formed in a U-shape, and a press-fitting protrusion extending from an end of the bend opposite the base. The bend has a bend face facing in the mating direction and is separated from the housing by a bend gap. The press-fitting protrusion is press-fitted in the housing.
US10199766B2	Breakaway railcar power connector A railcar power connector includes a connector body defining a central opening configured to receive a portion of a cable, and a spring member having a protrusion moveable relative to the connector body between a locked position where the protrusion is configured to be secured to a mating connector and a released position where the protrusion is configured to be released from a corresponding recess of a mating connector. The protrusion moveable from the locked position to the released position upon a predetermined axial force applied to the spring member.
US10199763B2	Electrical connector having excellent waterproof property An electrical connector includes a terminal module and a shielding shell surrounding the terminal module. The terminal module has an insulative housing and a plurality of conductive terminals retained in the insulative housing. The shielding shell has a metallic shell and a waterproof shell insert molded on an outer side of the metallic shell. The metallic shell surrounds the insulative housing to form a mating cavity opening forwardly. The shielding shell has a sealing member disposed between the metallic shell and the waterproof shell and a retaining member disposed at a rear side of the waterproof shell. The retaining member is separate from the sealing member. The metallic shell defines an opening slot going therethrough. The sealing member covers the opening slot. The retaining member defines a mounting leg.
US10199761B1	Signal transmission assembly and floating connector A floating connector includes an insulating housing, a plurality of conductive terminals installed on the insulating housing, and two soldering members. The insulating housing includes an inserting portion, two extending portions respectively connected to two opposite ends of the inserting portion, and two covering portions respectively located at the two extending portions. The inner walls of each covering portion and the corresponding extending portion co-define a limiting slot having a limiting wall and two limiting holes arranged facing the limiting wall. The two soldering members are respectively and movably arranged in the two limiting slots. Each soldering member includes a beam facing the corresponding limiting wall, two elastic arms connected to the beam and respectively arranged in the two corresponding limiting holes, and two soldering tails respectively connected to two opposite ends of the beam and passing through the corresponding limiting slot.
US10199758B2	Contact A contact includes a contact unit in contact with a terminal of a circuit board, to establish electric connection; and a barrel unit to contain the contact unit. The contact unit has a first contact point to come into contact with the terminal in an early stage of a relative slide operation in a connection direction when connected to the circuit board, and to be inclined according to the slide operation; a second contact point to swing toward the circuit board according to the inclination of the first contact point, and to be brought into contact with the terminal after a delay from the contact of the first contact point against the terminal; and a contact fulcrum portion. The barrel unit has protrusion support portions to support the contact fulcrum portion. Contact surfaces between the contact fulcrum portion and the protrusion support portions are each a rolled surface.
US10199757B2	Electronic control connector, electronic control for driving a hermetic compressor and hermetic compressor An electronic control connector (30) including at least an input orifice (32a), at least a fixing leg (33) and at least a terminal (34), the terminal (34) being inserted inside the input orifice (32a), the electronic control connector (30) being fixed to a printed circuit board (10) of an electronic control (50), by a fixing between the fixing leg (33) and a fixing orifice (16) disposed on the printed circuit board (10) of the electronic control (50), the fixing of the electronic control connector (30) to the printed circuit board (10) also establishing an electrical connection between the terminal (34) of the electronic control connector (30) and the tracks of the printed circuit board (10) of the electronic control (50).
US10199754B2	Connector and connector-equipped cable A connector for being arranged at an end of a cable includes a paddle card substrate for electrically connecting the cable to a connected device, plural device-side electrodes that are formed at an end portion of the paddle card substrate in plural rows in an insertion direction into the device and are to be electrically connected to the device, and a protective portion formed between the device-side electrodes adjacent in the insertion direction into the device to protect a surface of the paddle card substrate. The protective portion includes plural metal protective pads that are spaced from each other at a predetermined distance in the insertion direction.
US10199742B2	Passive frequency multiplexer A passive frequency multiplexer includes a beam forming network lens including a plurality of input terminals and a plurality of output terminals; a transmission line for transmitting a signal to the beam forming lens; and a plurality of couplers arranged in series along the transmission line, each of the plurality of couplers comprising an input terminal, an output terminal, and a coupled output terminal, each of the coupled output terminals of the plurality of couplers being coupled to a respective one of the input terminals of the beam forming network lens.
US10199740B2	Lens design method and radiation source substrate A lens design method is disclosed for designing a lens to reshape an actual far-field radiation pattern of a radiation source, such as a spiral antenna, to a preferred far-field radiation pattern. The method comprises:—determining a preferred far-field radiation pattern of the radiation source;—deriving a corresponding near-field radiation pattern from the preferred far-field radiation pattern;—determining an actual near-field pattern of the radiation source;—mapping an electric field and a magnetic field of the actual near-field radiation pattern to the derived near-field radiation pattern using a transfer relationship, the transfer relationship comprising material parameters which characterize the lens; and,—determining the material parameters.
US10199738B2	Anisotropic metamaterials for electromagnetic compatibility An electromagnetic device includes: a first medium having a first material having a first dielectric constant, the first medium having a plurality of spaces filled with a second material having a second dielectric constant that is different from the first dielectric constant; and a plurality of antennas disposed proximate the first medium; wherein adjacent ones of the plurality of spaces of the first medium have an average spacing therebetween of less than one quarter of an operating wavelength of at least one of the plurality of antennas.
US10199737B2	Magneto-dielectric material with low dielectric losses Materials that exhibit magneto-dielectric effects with high local order in the form of distinct basic units with a defined geometry that provides orientation and spacing that prevents contact between conductive components of a basic unit are disclosed. Use of multiple basic units arranged, for example by embedment, in essentially random orientation relative to one another provides a composite material with magneto-dielectric effects that isotropic and homogeneous. Such basic units are readily manufacturable using conventional techniques.
US10199735B2	TEM line to double-ridged waveguide launcher A TEM line to double-ridged waveguide launcher and horn antenna are disclosed. The launcher uses multiple probes or one or more wide-aspect probes across the ridge gap to minimize spreading inductance and a TEM combiner or matching taper to match the impedance of the probes over a broad bandwidth. The horn uses a power-law scaling of gap height relative to the other dimensions of the horn's taper in order to provide a monotonic decrease of cutoff frequencies in all high-order modes. Both of these techniques permit the implementation of ultra-wideband designs at high frequencies where fabrication tolerances are most difficult to meet.
US10199729B2	Lens based antenna for super high capacity wireless communications systems An antenna includes a stack of cylindrical lenses combined with feed elements to provide multi-beam coverage for a given wireless communication sector. Each cylindrical lens disc has approximately the same height as the feed elements being used with the lens. To overcome the problem of interference from cables and opposing feeds, feed elements are placed around the lens. The cylindrical lenses are stacked such that a small gap exists between each pair of adjacent cylindrical lenses, allowing for cable lines to pass through between the pair of the cylindrical lenses, and thus removing interference for 360 degree coverage. Cable lines are arranged such that they only traverse the portion of the circumferential surfaces of the cylindrical lenses that do not interfere with the field of view of the RF signals generated by the corresponding feed elements.
US10199725B2	Methods and devices for reducing passive intermodulation in RF antennas Systems and related methods for reducing passive intermodulation (PIM) include a combination of an antenna control unit (ACU) and a remote electrical tilt (RET) system. The ACU may be used to generate rotational motion of an output drive shaft in response to an input tilt control signal. The RET system couples to the output drive shaft of the ACU and may be used to convert the rotational motion into translational motion for modifying a phase shift of an antenna beam. PIM may be substantially eliminated by providing electrical isolation between the ACU and RET system in the form of a non-conductive connector that engages the draft shaft of the ACU.
US10199724B2	Antenna An in-vehicle antenna is disclosed. The in-vehicle antenna is configured to be installed with an installation counterpart having a ground surface. The in-vehicle antenna has an element part, a ground part integrally connected to the element part, and a clamping part configured to clamp the installation counterpart together with the ground part with elastic force.
US10199723B2	Inflatable radome The invention relates to an inflatable radome containing a flexible radome wall, said radome wall comprising high strength polymeric fibers and further containing a plastomer wherein said plastomer is a semi-crystalline copolymer of ethylene or propylene and one or more C2 to C12 a-olefin co-monomers and wherein said plastomer having a density as measured according to IS01183 of between 860 and 930 kg/m3.
US10199722B2	Systems and techniques for radome-antenna configuration A radome structure of an antenna system is provided having a plurality of switchable antenna elements disposed around a perimeter of the radome structure that can simultaneously track multiple targets and be implemented in a variety of different applications. Each of the switchable antenna elements can be individually switched between different radiation patterns to support different applications. The antenna system may include an infrared (IR) sensor pedestal, an IR sensor disposed on the IR pedestal and a plurality of switchable radio frequency (RF) antenna elements disposed in a circumferential direction around the IR sensor pedestal. In an embodiment, each of the plurality of switchable RF antenna elements can be switched from a first radiation pattern to a second radiation pattern to change an array radiation pattern of the antenna.
US10199721B2	Vehicle antenna Embodiments of the present invention provide an aerodynamic device for a vehicle, comprising one or more antenna elements arranged to extend from a surface of the aerodynamic device.
US10199719B2	Antenna and electronic device having the same An antenna of an electronic device is provided. The antenna includes a substrate including a ground portion, an external metallic frame of the electronic device, a float ground portion arranged to be connected to the external metallic frame in a state of being disconnected from the substrate, and at least one radiator electrically connected to the float ground portion. Upon being fed with power, the at least one radiator may operate as an antenna radiator, or a section of the external metallic frame may operate as the antenna radiator.
US10199718B2	Electronic device antenna feed and return path structures An antenna may be formed from a peripheral conductive housing structure in an electronic device that is separated from an antenna ground by a gap. An antenna feed may be formed from a metal trace on a flexible printed circuit that spans the gap. The metal trace may have a line segment that joins a wider pad portion of the trace at a junction. A stiffener on the flexible printed circuit may have a protrusion that overlaps the junction. A metal bracket attached to the peripheral housing structure may be soldered to the pad. A metal member with meandering paths may form a return path in the antenna. The meandering path may have parallel segments that extend along an inner surface of the peripheral conductive housing structure to prevent the metal member from rotating when a screw is used to screw the metal member to the peripheral conductive housing structure.
US10199717B2	Phased array antenna panel having reduced passive loss of received signals A phased array antenna panel includes a first plurality of antennas, a first radio frequency (RF) front end chip, a second plurality of antennas, a second RF front end chip, and a combiner RF chip. The first and second RF front end chips receive respective first and second input signals from the first and second pluralities of antennas, and produce respective first and second output signals based on the respective first and second input signals. The combiner RF chip can receive the first and second output signals and produce a power combined output signal that is a combination of powers of the first and second output signals. Alternatively, a power combiner can receive the first and second output signals and produce a power combined output signal, and the combiner RF chip can receive the power combined output signal.
US10199715B2	Systems and methods for locating rack-based assets A system includes a central server; a reader in communication with the central server; and a set of equipment racks. Each equipment rack of the set of equipment racks defines a face. The each equipment rack includes an observer device and at least two antenna arrays. At least one of the at least two antennas is in communication with the observer device. The system further including a set of tags attached to assets disposed within the set of equipment racks. Each tag of the set of tags is to transmit a beacon signal including a tag identifier of the each tag. The at least one antenna is to receive the beacon signal. The observer device is to communicate the tag identifier and the characteristics of the beacon signal to the reader and central server. The central server determines a rack location based on the characteristics of the beacon signal.
US10199714B2	Wireless LED tube lamp device A wireless LED tube lamp device (100) comprises: an at least partially transparent tube (7); at least one LED (1) arranged within said tube; at least one LED driver (4); a LED controller (5); an RF antenna (30; 40) coupled to the controller for receiving and sending wireless commands. The RF antenna is a curved antenna having antenna elements (31, 32, 33; 41, 42, 43) located in a common curved plane wherein said antenna comprises an array of half-loop wire antenna, and said array of half-loop wire antenna comprises a plurality of coils of line.
US10199713B2	Systems, devices, and methods for orienting an antenna mast An antenna mast assembly with an alignment plumb is provided which allows for increased speed and accuracy in aligning antenna masts. The antenna mast assembly includes an antenna mast. An upper end of the mast extends in a first direction and a lower end of the mast extends in a second direction with an angle between the first and second directions. The bend in the mast creates the angle between the upper and lower ends. The upper end of the mast is connected to an antenna. The mast also includes an orientation indicator near its lower end and aligned with the first direction. The mast assembly also includes a foot configured to couple the lower end of the mast to a mounting surface and a plumb coupled to the foot. The plumb includes a plumb indicator that aligns with the mast orientation indicator and indicates that the upper end of the mast is orientated vertically.
US10199712B1	Apparatus, method, and system for factory wiring and/or aiming of devices on dual purpose monopoles Disclosed herein are means and methods by which unrelated or outside entities may add value to strategic partnerships with mobile network service providers—beyond providing preexisting elevating structures. In the state of the art, mobile network service providers must rely upon multiple technicians using multiple tools to pinpoint where a tower or pole exists, and must perform precise horizontal and vertical aiming of each mobile network device when elevated and mounted at a particular position on said tower or pole. Said means and methods are directed to reducing the time and cost associated with this onsite commissioning of mobile network devices by factory wiring and factory aiming at least some of these devices in a commensurate fashion to factory wiring and factory aiming of disparate devices such as lighting fixtures.
US10199702B2	Phase shifter comprising a cavity having first and second fixed transmission lines with slots therein that engage a slidable transmission line A phase shifter includes a cavity (100) and a first fixed transmission line (301), a second fixed transmission line (302), and a slidable transmission line (201) that are located in the cavity (100). The first fixed transmission line (301) is provided with a first open slot (3011), the second fixed transmission line (302) is provided with a second open slot (3021), and opening directions of the first open slot (3011) and the second open slot (3021) are opposite to each other. Two ends of the slidable transmission line (201) are respectively clamped in the first open slot (3011) and the second open slot (3021), so that the slidable transmission line (201) is electrically connected to the first fixed transmission line (301) and the second fixed transmission line (302). The slidable transmission line (201) slides relative to the first fixed transmission line (301) and the second fixed transmission line (302).
US10199701B2	Cathode for lithium air batter, lithium air battery including the same, and method of manufacturing cathode for lithium air battery A cathode for a lithium air battery includes a carbonaceous material, the carbonaceous material including: a carbonaceous core; and a coating layer on the carbonaceous core, wherein the coating layer includes an amorphous polysilsesquioxane ionic liquid having a viscosity of at least 0.2 milliPascal-seconds as measured as a 10 weight percent solution in acetone at 30° C. at 30° C. Also a lithium air battery including the cathode, and a method of manufacturing the cathode.
US10199700B2	Temperature adjusting structure and temperature adjusting method for electric power storage device In a temperature adjusting structure for an electric power storage device as well as in a temperature adjusting method for an electric power storage device, a temperature adjusting air that exchanges heat with a case in which an electric power generation element is housed is guided in a longitudinal direction of a circulation path. Then, a vortex flow that swirls with the longitudinal direction being a rotational axis is generated in the air that flows through the circulation path, and the vortex flow is brought into contact with a lateral surface of the case.
US10199698B2	Method for the production of a cooling plate for a cooling device of a battery A method for producing a cooling plate may include the steps of: providing a pressing tool including a die and a stamp, wherein the die and the stamp define a negative shaped profile of the cooling plate to be produced; arranging at least one of a fiber woven fabric and a fiber scrim in the die; at least one of applying and introducing a melt of a thermoplastic plastic on the at least one of the fiber woven fabric and the fiber scrim to form an organic sheet; and shaping the organic sheet into a cooling plate shaped part via pressing the stamp onto the organic sheet arranged in the die.
US10199694B2	Power storage system A power storage system includes an AC/DC converter, a first control device, a power storage device, and a load. The first control device includes a measuring portion that measures the amount of power consumed by the load, a predicting portion that predicts the demand for power consumed by the load on the basis of the amount of power consumed by the load, and a planning portion that makes a charge and discharge plan of the power storage device on the basis of the demand for power predicted by the predicting portion. The power storage device includes a second control device, a DC/DC converter, a first battery cell group, and a second battery cell group. The power storage device is placed in an underfloor space surrounded by a base and a floor of a building.
US10199692B2	Covalently cross-linked gel electrolytes Proton-conducting gel electrolytes with acid immobilized within a covalently cross-linked polymer network and composites containing the gel electrolytes provide low ionic resistance, minimize acid stratification, and prevent dendrite growth. The gel electrolytes can be formed from monomers dissolved in concentrated sulfuric acid and subsequently covalently cross-linked between the battery electrodes, or the covalently cross-linked gel electrolytes can be formed in water and subsequently exchanged into sulfuric acid. The mechanical properties of these gels can often be enhanced with the addition of silica powder, silica fiber, or other additives. In some cases, the covalently cross-linked gel electrolytes are formed in the presence of a conventional silica-filled polyethylene separator or within a low density fiber mat to provide mechanical reinforcement and controlled spacing between the battery electrodes. The covalently cross-linked gel electrolytes provide low ionic resistance, and increased power capacity of the battery, because the polymer networks can be formed at low concentrations (<20% solids).
US10199690B2	Electrode assembly of novel structure and battery cell comprising the same Disclosed herein is an electrode assembly configured to have a structure in which one bi-cell and at least one monocell are folded in a state in which the bi-cell and the monocell are arranged on a continuous separation film.
US10199689B2	Nonaqueous electrolyte secondary battery The present invention provides a nonaqueous electrolyte secondary battery configured such that a positive electrode, a negative electrode, and a nonaqueous electrolyte are accommodated in a battery case. The battery includes lithium bis(oxalato)borate (LiBOB) at least at the time of assembly of the battery. The negative electrode includes a film derived from the LiBOB and containing a boron atom (B) and a carbonate ion (CO32−). A ratio (mc/mb) of a molar content mc of the carbonate ion to a molar content mb of the boron atom is 4.89 or less. In a preferred aspect, when a molar content A of the LiBOB is A (mmol) and a remaining space volume in the battery case is V (cm3) at the time of the assembly, a ratio A/V is 0.053 or less.
US10199688B2	One step synthesis of non-chlorinated magnesium electrolytes A one-step method to prepare a magnesium electrolyte salt is provided. According to the method, the magnesium electrolyte is obtained by reacting a Grignard reagent and a fluorinated aryl borane. In addition, formation of monomeric or dimeric magnesium ion is determined by the choice of the Grignard reagent. The magnesium electrolyte may be non-chlorinated and non-corrosive. A magnesium battery containing the magnesium electrolyte is also provided.
US10199687B2	Electrolyte formulations for electrochemical cells containing a silicon electrode Additives to electrolytes that enable the formation of comparatively more robust SEI films on silicon anodes. The SEI films in these embodiments are seen to be more robust in part because the batteries containing these materials have higher coulombic efficiency and longer cycle life than comparable batteries without such additives. The additives preferably contain a dicarbonate group or are an organo-metallic hydride.
US10199685B2	Electrolyte solution, electrochemical device, lithium ion secondary battery, and module An electrolyte solution including a solvent, an electrolyte salt, and at least one compound (α) selected from an amine (A) represented by the formula (A): (wherein R1 and R2 may be the same as or different from each other, and individually represent a C1-C7 alkyl group; Rf1 represents a C1-C7 fluorinated alkyl group), and an amide (B) represented by the formula (B): (wherein R3, R4, and R5 may be the same as or different from each other, and individually represent a C1-C7 alkyl group). The amount of the compound (α) is 0.001 to 20 ppm in the electrolyte solution.
US10199681B2	Sulfide solid electrolyte material, lithium solid battery and method of preparing sulfide solid electrolyte material A sulfide solid electrolyte material exhibiting Li ion conductivity contains an organic compound having a molecular weight within a range of 30 to 300, wherein the organic compound has a content of 0.8 wt % or less.
US10199680B2	Electric device An electric device having a power generating element contains a positive electrode with a positive electrode active material formed on a surface of a positive electrode current collector, a negative electrode, and a separator containing an electrolyte. The positive electrode active material contains a lithium nickel-based composite oxide having a layered crystal structure capable of insertion and desorption of lithium ions, the composition represented by: [LiαNiβ]3a[NixMny-rMrCOz]3bO2, wherein M is at least one selected from the group consisting of Ti, Zr, Nb, W, P, Al, Mg, V, Ca, Sr, Cr, Fe, B, Ga, In, Si, Mo, Y, Sn, V, Cu, Ag, and Zn, and x+y+z≤1, β≤0.032, 0.9≤α+β≤1.2, 0
US10199679B2	Battery protection integrated circuit, battery protection apparatus and battery pack A battery protection integrated circuit for protecting a secondary battery by controlling a charge or discharge operation of the secondary battery includes a power supply terminal connected to a positive electrode of the secondary battery; a ground terminal connected to a negative electrode of the secondary battery; an input terminal connected to a negative terminal coupled to ground of a load; a control terminal at which a control signal is input, wherein the control signal has a voltage level with reference to a potential at the negative terminal; a signal detection circuit configured to detect a relative voltage level of the control signal input at the control terminal with reference to a potential at the input terminal; and a control circuit configured to control open/close of a switching circuit connected to a charge or discharge path between the negative electrode and the negative terminal based on the control signal.
US10199677B2	Electrolytes for lithium ion batteries Electrolytes, lithium ion cells and corresponding methods are provided, for extending the cycle life of fast charging lithium ion batteries. The electrolytes are based on fluoroethylene carbonate (FEC) and/or vinylene carbonate (VC) as the cyclic carbonate component, and possibly on ethyl acetate (EA) and/or ethyl methyl carbonate (EMC) as the linear component. Proposed electrolytes extend the cycle life by factors of two or more, as indicated by several complementary measurements.
US10199673B2	Fuel cell stack having an end plate assembly with a tapered spring plate An end plate assembly (38) includes a current collector (40), an electrically non-conductive pressure plate (42), and a tapered spring plate (72). The tapered spring plate (72) includes a thick mid-section (96) and tapered, thin tie rod extensions (74, 76) that extend from the mid-section (96) over deflection cavities (50, 52) in the pressure plate (42). Tie rod nut assemblies (90, 94) apply a load follow-up through the tie-rod extensions (74, 76) to permit limited expansion and contraction of the fuel cells (32). A mid-section of (96) of the spring plate (72) overlies a substantial portion of an upper surface (46) of the pressure plate (42). Because the mid-section (96) is large and thick and because the tie-rod extensions (74,76) are tapered and thin, the entire end plate assembly (38) may be efficiently thin and apply an even load follow-up to the fuel cell stack (30).
US10199671B2	Apparatus for cleaning catalyst of a power cell A method of cleaning power cells in an array of power cells, comprising coupling at least one first power cell to second power cells in an array of power cells and causing the second power cells to drive the at least one first power cell with a voltage to clean catalyst on the at least one first power cell.
US10199668B2	Fuel cell system and performance improvement method of fuel cell system A fuel cell system includes: a processing unit configured to perform an activation process of temporarily reducing a cathode potential of a single fuel cell to a target potential for a duration time at a processing frequency; a cationic impurity amount estimating unit configured to estimate an amount of cationic impurities included in an electrolyte membrane of the single fuel cell; and a process degree determining unit configured to determine, when the amount of cationic impurities is large, a degree of the activation process which is higher than that determined when the amount of cationic impurities is small by performing at least one action among actions of changing conditions of the activation process, the actions including an action of reducing the target potential, an action of increasing the duration time, and an action of increasing the processing frequency. The processing unit performs the activation process to the determined degree.
US10199664B2	Frame body, cell frame, cell stack, and redox flow battery A frame body, which is provided around a bipolar plate disposed between a positive electrode and a negative electrode of a redox flow battery, includes a positive electrode liquid supply slit and a positive electrode liquid discharge slit for supplying and discharging a positive electrode electrolyte to and from the positive electrode, the slits being provided on the one surface side of the frame body; and a negative electrode liquid supply slit and a negative electrode liquid discharge slit for supplying and discharging a negative electrode electrolyte to and from the negative electrode, the slits being provided on the other surface side of the frame body. At least one pair among a pair of inlets of the positive electrode liquid supply slit and the negative electrode liquid supply slit and a pair of outlets of the positive electrode liquid discharge slit and the negative electrode liquid discharge slit are provided so as to partly overlap each other in the thickness direction of the frame body.
US10199663B2	Cell structure for fuel cell stack A cell structure for a fuel cell stack that is formed by stacking unit cells C each including a membrane electrode assembly 1 and a pair of separators 2 holding the membrane electrode assembly 1 therebetween. The membrane electrode assembly 1 includes a frame 3 in the periphery having such a size as to extend outward over the edges of the separators 2. Communication holes 21, 22 in communication with the front and back sides are formed in the frame 3 in an area from a sealing part 11 between frames 3 adjacent in the cell stacking direction to a sealing parts 12 between the membrane electrode assembly 1 and the separators 2. The air in a space Q formed between the inner and outer sealing parts 11, 12 is allowed to be released to the outside through the communication holes 21, 22, and a breakage of the adhesive of the sealing parts 11, 12 is thereby prevented.
US10199662B2	Bipolar plate, fuel cell, and fuel cell stack A bipolar plate, a fuel cell, and a fuel cell stack are provided. The bipolar plate includes a first flow-field plate and a second flow-field plate. The first flow-field plate and the second flow-field plate are stacked, and the edges of the first and second flow-field plates have a continuous welding portion to seal the periphery of the bipolar plate by a welding method.
US10199661B2	Fuel cell separator and manufacturing method of fuel cell separator A manufacturing method of a fuel cell separator is provided, whereby the adhesion of a carbon film against a titanium base substrate can be improved and favorable corrosion resistance can be obtained at the same time. A fuel cell separator having such improved adhesion and favorable corrosion resistance is also provided. The method for manufacturing a fuel cell separator according to an embodiment of the invention includes the steps of: forming a TiOx (1
US10199655B2	Electrode structure having structured conductive buffer layer An electrode comprises a current collector, a conductive buffer layer formed on the current collector that has at least one geometrically configured region and an active material layer formed on the conductive buffer layer. The geometrically configured conductive buffer region can expand and contract between the non-lithiated and lithiated states.
US10199653B2	Three dimensional electrode having electron directing members and method of making the same A battery has a three dimensional electrode including a current collector, electron directing members, each electron directing member having a perimeter edge attached to a surface of the current collector with a polymer binder, the electron directing members extending from the surface of the current collector and configured to direct electron flow along a layered direction of the electrode, an active material layer on the current collector and a separator. The electron directing members extend into the active material layer and having a free end in spaced relation to the separator.
US10199650B2	Lithium secondary battery and method of fabricating the same A lithium secondary battery includes a cathode formed from a cathode active material including a first cathode active material particle and a second cathode active material particle, an anode and a separator interposed between the cathode and the anode. The first cathode active material particle includes a lithium metal oxide including a continuous concentration gradient in at least one region between a central portion and a surface portion. The second cathode active material particle includes a lithium metal oxide including at least two metals except for lithium which have constant concentrations from a central portion to a surface, and the second cathode active material particle includes an excess amount of nickel among the metals except for lithium.
US10199647B2	Oxyfluoride compounds for lithium-cells and batteries The present invention concerns specific new compounds of formula Li(2−x)Na(x)MO(2−y/2)F(1+y) (where 0≤x≤0.2 and −0.6≤y≤0,8 and M is a transition metal), cathode material comprising the new compounds, batteries and lithium-cells comprising said new compound or cathode material, a process for the production of the new compound and their use.
US10199639B2	Mixed material cathode for secondary alkaline batteries A secondary alkaline battery using manganese dioxide is described. The battery includes a mixed cathode material with birnessite-phase manganese dioxide or electrolytic manganese dioxide (EMD), a bismuth compound and a copper compound selected from the group consisting of elemental copper and a copper salt. In some embodiments, a conductive carbon and/or a binder may also be included.
US10199637B2	Graphene-metal hybrid foam-based electrode for an alkali metal battery Provided is a lithium or sodium metal battery having an anode, a cathode, and a porous separator and/or an electrolyte, wherein the anode contains a graphene-metal hybrid foam composed of multiple pores, pore walls, and a lithium- or sodium-attracting metal residing in the pores; wherein the metal is selected from Au, Ag, Mg, Zn, Ti, Na (or Li), K, Al, Fe, Mn, Co, Ni, Sn, V, Cr, or an alloy thereof and is in an amount of 0.1% to 90% of the total hybrid foam weight or volume, and the pore walls contain single-layer or few-layer graphene sheets, wherein graphene sheets contain a pristine graphene or non-pristine graphene selected from graphene oxide, reduced graphene oxide, graphene fluoride, graphene chloride, graphene bromide, graphene iodide, hydrogenated graphene, nitrogenated graphene, doped graphene, chemically functionalized graphene, or a combination thereof.
US10199636B2	Electrode, nonaqueous electrolyte battery, battery pack, automobile, and vehicle According to one embodiment, an electrode is provided. The electrode includes an active material containing-layer. The active material containing-layer includes active material particles containing at least one selected from a niobium titanium composite oxide and a composite oxide which is expressed by the general formula LixM11-yM2yTi6-zM3zO14+δ. The active material particles include primary particles having an average particle diameter of 0.1 to 10 μm and secondary particles having an average particle diameter of 1 to 30 μm. A pore diameter distribution of the active material containing-layer which is obtained by mercury porosimetry has a first peak which has a maximum value within a range of 0.01 to 2 μm and a second peak which has a maximum value within a range of exceeding 6 μm and equal to or smaller than 20 μm. An intensity of the second peak is 1/10 to ⅕ of an intensity of the first peak.
US10199635B2	Method of drying electrode assemblies Provided herein is a method of drying electrode assembly of lithium-ion battery, comprising the steps of vacuum drying the electrode assembly in an oven at elevated temperature; filling the oven with hot, dry air or inert gas; repeating the steps of vacuum drying and gas filling 2 or more times. The method disclosed herein can provide the electrode assembly having a water content of less than 20 ppm.
US10199634B2	Method for preparing an amorphous film made from lithiated metal sulfide or oxysulfide A method of preparing an amorphous film of lithiated metal sulfide or oxysulfide of formula LiαM(O1-βSβ)γ using a lithiated target material: M being advantageously selected from the group comprising Al, Ti, V, Cr, Mn, Fe, Co, Ni, Cu, Zn, Ge, Zr, Nb, Mo, Ag, Cd, In, Sn, Sb, Ta, W, Pb, Bi, and mixtures thereof; and α≥0.5; 1≥β≥⅔; 2≥α/γ≥⅓.
US10199632B2	Interconnect for battery pack protection A method of protecting a battery pack in which first and second battery cells, each having a positive electrode, a negative electrode, and an edge are aligned so that the positive electrodes of the first and second battery cells are adjacent. An electrically conductive busbar configured to be positioned on an edge of the first and second battery cells electrically connects the positive electrode of the first battery cell to a first protection device, the positive electrode of the second battery cell to a second protection device, the first protection device to the second protection device, and the negative electrode of the first battery cell to the negative electrode of the second battery cell. Also provided is a battery pack protection assembly.
US10199631B2	Biasing features for a battery module The present disclosure relates to a battery module having a housing and a stack of battery cells disposed in a receptacle area of the housing, where each battery cell has a top having a battery cell terminal and a bottom, where the top of the battery cells face outwardly away from the receptacle area. The battery module includes an integrated sensing and bus bar subassembly positioned against the stack of battery cells and has a carrier, a bus bar integrated onto the carrier, and a biasing member integrated onto the carrier. The bus bar electrically couples battery cells in an electrical arrangement, and the biasing member is between the top of each battery cell and the carrier, where the biasing member has a first material, more compliant than a second material of the carrier, and the biasing member biases the stack of battery cells inwardly toward the housing.
US10199629B2	Secondary battery with terminal pin A secondary battery, including an electrode assembly; a case accommodating the electrode assembly; a cap plate sealing the case; at least one electrode terminal including a terminal plate on the cap plate and a terminal pin passing through the cap plate and the terminal plate and electrically connected to the electrode assembly; and at least one groove on a top surface of the terminal plate; a top portion of the terminal pin is bent for insertion into the at least one groove.
US10199627B2	Secondary battery The invention provides a secondary battery which comprises a cap plate and at least one cell. The secondary battery further comprises connecting pieces, each connecting piece is parallel to the cap plate and positioned at an inside of the cap plate in a thickness direction of the cap plate, a longitudinal direction of each connecting piece is parallel to a length direction of the cap plate, a transverse direction of each connecting piece is parallel to a width direction of the cap plate. Each connecting piece has: a tab welding portion for being welded to the corresponding tab of each cell; and an electrode terminal welding portion connected to the tab welding portion along the longitudinal direction of each connecting piece for being welded to the corresponding electrode terminal of the cap plate so as to electrically connect the corresponding electrode terminal and the corresponding tab of each cell.
US10199625B2	Bus bar including thick portion connected to thin portion by bend portions and battery module including the same A bus bar according to an embodiment includes a block-shape thick portion, two thin portions provided along the thick portion on both sides, and two bend portions that connect the thick portion and the thin portions, the connected thick portion and the thin portions being elastically deformable.
US10199623B2	Separator for nonaqueous secondary battery, and nonaqueous secondary battery A separator for a nonaqueous secondary battery, including a porous substrate and an adhesive porous layer that is formed on at least one side of the porous substrate and contains a carbon material and a polyvinylidene fluoride resin. The separator has an initial static voltage of 0 V as measured in accordance with JIS L1094.
US10199619B2	Secondary battery with frame unit Provided is a secondary battery, including a battery cell; a frame unit surrounding the battery cell; an adhesive portion overlapping the battery cell and the frame unit and attached to the battery cell; and a label unit covering at least portions of the battery cell and the frame unit, at least a portion of the label unit overlapping the adhesive portion.
US10199618B2	Battery assembly for a hearing device A battery assembly for an electronic device such as a hearing aid is disclosed. The battery assembly includes; a compartment having a longitudinal axis and a transversal axis and being configured to receive and contain a battery; at least one electrical connection member for establishing electrical connection to a negative pole of the battery; at least one electrical connection member for establishing electrical connection to a positive pole of the battery; a guide structure configured to guide the battery into a predefined position in the compartment. The guide structure guides the battery into electrical connection with a first electrical connection member. A second electrical connection member when the battery is in a first configuration. The guide structure guides the battery into electrical connection with the first electrical connection member and a third electrical connection member when the battery has a reversed orientation.
US10199617B2	Assembled-battery stacker and assembled battery This assembled-battery stacker includes: a pair of end plates which is formed from a first steel sheet and is arranged at both ends of a battery block in the thickness direction; a connecting member which is formed from a second steel sheet and mutually connects the pair of the end plates; wherein the end plate includes: a bottom wall part that faces an end face of the battery block in the thickness direction; and a side wall part that extends from both sides of the bottom wall part to the thickness direction and covers a part of a lateral face of the battery block; and wherein the connecting member is arranged in order for the connecting member to overlap at least a part of the side wall part.
US10199611B2	Organic light-emitting display apparatus and method of manufacturing the same An organic light-emitting display apparatus including: a substrate; a plurality of pixels that are formed on the substrate and each have a light emission area from which visible rays are emitted and a transmission area through which external light is transmitted; a pixel circuit portion disposed in each light emission area of the plurality of pixels; a first electrode that is disposed in each light emission area and is electrically connected to the pixel circuit portion; an intermediate layer that is formed on the first electrode and includes an organic emissive layer; a second electrode formed on the intermediate layer; and a capping layer that is disposed on the second electrode and includes a first capping layer corresponding to the light emission area and a second capping layer corresponding to the transmission area. Accordingly, electrical characteristics and image quality of the organic light-emitting display apparatus may be improved.
US10199608B2	Organic electroluminescence display with first electrode with a curved portion below light blocking layer An organic electroluminescence display apparatus includes an insulating layer including a concave portion having a concave first upper surface, a first electrode including a curved electrode portion having a concave second upper surface overlapped with the concave portion, a pixel definition layer including a first opening defined therethrough to expose the second upper surface, an organic layer disposed on the first electrode, a second electrode disposed on the organic layer, and a light blocking layer including a second opening defined therethrough. The second opening has a width smaller than the first opening and overlaps with the first opening.
US10199607B2	Organic light-emitting display device An organic light-emitting display device including a substrate including a display area and a non-display area; a thin film transistor disposed on the substrate in the non-display area; an electroluminescent device disposed in the display area; and an overcoat layer disposed on the substrate and including two or more concave portions and two or more convex portions in the display area. Further, the two or more concave portions and the two or more convex portions form a linear pattern in a plan view. In addition, the electroluminescent device includes a first electrode disposed on the overcoat layer and connecting the electroluminescent device to the thin film transistor; an organic light-emitting layer disposed on the first electrode and configured to emit light; and a second electrode disposed on the organic light-emitting layer. Also, the linear pattern of the two or more concave portions and the two or more convex portions comprise one of a zigzag pattern, a streamlined pattern, and combinations thereof.
US10199606B2	Display unit and electronic apparatus A display unit of the present disclosure includes: a plurality of pixels that are disposed in a regular manner; a plurality of first openings that are provided in each of the plurality of pixels; and one or more second openings that are provided in at least a portion of a peripheral edge of each of the plurality of pixels that are disposed in a regular manner.
US10199602B2	Organic light-emitting display apparatus and method of manufacturing the same An organic light-emitting display apparatus includes a substrate, a display on the substrate, a dam outside the display and spaced from the display, the dam having a stacked multi-layer structure and having a first side surface that faces the display, a second side surface opposite to the display, and a top, a groove in a separation area between the display and the dam, and an encapsulation layer that includes a first inorganic layer and an organic layer on the first inorganic layer, the first inorganic layer covering the display and extending along an inner surface of the groove, and an end of the organic layer being contained in the groove.
US10199601B2	Thin film transistor element substrate, method of producing the substrate, and organic EL display device including the thin film transistor element substrate The thin film transistor element substrate of the present disclosure includes a first moisture barrier layer covering the gate insulating layer and the gate electrode, covering the contact regions of the oxide semiconductor layer other than the connecting portion of the contact region connected to the source electrode and the connecting portion of the contact region connected to the drain electrode, and covering an surface of the substrate on which the oxide semiconductor layer is not disposed. The first moisture barrier layer includes a metal oxide and is formed by atomic layer deposition. The first moisture barrier layer formed by atomic layer deposition is in contact with a pair of contact regions.
US10199599B2	Organic light emitting diode device and manufacturing method thereof An organic light emitting diode device can have an enhanced thin film encapsulation layer for preventing moisture from permeating from the outside. The thin film encapsulation layer can have a multilayered structure in which one or more inorganic layers and one or more organic layers are alternately laminated. A barrier can be formed outside of a portion of the substrate on which the organic light emitting diode is formed. The organic layers of the thin film encapsulation layer can be formed inside an area defined by the barrier.
US10199595B2	Display device and automobile including the same A display device for a vehicle and an automobile including the same are disclosed. In one aspect, the display device includes a display unit including an display area on which a plurality of pixels are disposed and a non-display area adjacent to the display area and bent with respect to the display area, wherein a light from the plurality of pixels emits in a front direction, and a heat radiation member adjacent to a rear surface of the display unit and including a first plate facing the rear surface of the display unit, a plurality of first heat radiation pins protruding from the first plate, a first opposite plate parallel to the first plate, and a pair of first side plates at opposite sides of the first plate.
US10199590B2	Photovoltaic cell module In accordance with one embodiment, there is provided a photovoltaic cell module including a plurality of photovoltaic cell structures including a hole transport layer and an electron transport layer which are disposed on a common photoelectric conversion layer so that electromotive force polarities are alternately different, wherein the photovoltaic cell structures are electrically connected in series.
US10199584B2	Organometallic compound and organic light-emitting device including the same A silyl group-containing compound represented by Formula 1: wherein, in Formula 1, groups and variables are the same as described in the specification.
US10199582B2	Organic electroluminescent materials and devices A compound comprising a ligand LA according to formula (I) as well as, a first device and a formulation including the same are disclosed. In the structure of formula (I): ring A is a 5- or 6-membered heteroaryl ring; X1 is C or N; RA is mono-, bi-, tri-, tetradentate, or unsubstituted; RA, R10, R11, R12, R13, R14, R15, R16, and R17 are independently selected from the group consisting of hydrogen, deuterium, halide, alkyl, cycloalkyl, heteroalkyl, arylalkyl, alkoxy, aryloxy, amino, silyl, alkenyl, cycloalkenyl, heteroalkenyl, alkynyl, aryl, heteroaryl, acyl, carbonyl, carboxylic acids, ester, nitrile, isonitrile, sulfanyl, sulfinyl, sulfonyl, phosphino, and combinations thereof, any adjacent substituents of RA, R10, R11, R12, R13, R14, R15, R16, and R17 are optionally joined to form a fused ring; the dashed lines represent bonds to a metal M; and metal M has an atomic number greater than 40.
US10199576B2	Display panel and fabricating method thereof, and display device The present disclosure provides a display panel and a fabricating method thereof, and a display device. The fabricating method for the display panel includes forming a glass adhesive layer on a packaging region of a first substrate, forming an OLED device on a display region of the first substrate, and aligning the first substrate with a second substrate, and forming a sealing structure between the first substrate and the second substrate by irradiating the packaging region with laser. The fabricating method for the display panel according to an embodiment of the present disclosure avoids the occurrence of the phenomenon that the coated glass adhesive layer and the evaporated organic light emitting layer are offset during the subsequent packaging process, by fabricating the glass adhesive layer on the substrate for forming the OLED device, thereby the production efficiency of the overall packaging process is enhanced.
US10199558B2	Piezoelectric power generator In accordance with the present application, a high density, low impedance piezoelectric power generator is provided. In an example embodiment, the piezoelectric power generator has a plurality of piezoelectric elements arranged in a first predefined pattern; a plurality of actuators arranged in a second predefined pattern operably positioned to excite one or more of the plurality of the piezoelectric elements simultaneously within at least a first subset; and an electrical conduction system connected to sum the electrical power produced by the simultaneously excited piezoelectric elements within the first subset and for conducting an electrical current.
US10199557B2	Piezoelectric film, piezoelectric film element, piezoelectric actuator, piezoelectric sensor, hard-disk drive and ink jet printer head A piezoelectric film containing (K,Na)NbO3 as the main component, wherein, when a surface of the piezoelectric film was observed in a field view within a specified range, a plurality of first crystals and a plurality of second crystals are arranged in the surface of the piezoelectric film, wherein, the first crystal has a slender shape orientating toward the first orientation along the surface, and the second crystal has a slender shape orientating toward the second orientation which crosses with the first orientation along the surface.
US10199555B2	Driver for a high voltage capacitive actuator A driver for a circuit with a capacitive load, is disclosed, including an input stage, a bi-directional power converter, and a controller to control the driver. The power converter includes an inductive device and two switches configured to receive a DC input voltage vin from the input stage and generate an analog output waveform having an amplitude greater than vin providing an output distortion below 5% without an output low-pass filter.
US10199553B1	Shielded through via structures and methods for fabricating shielded through via structures Described are concepts, systems, circuits and techniques related to shielded through via structures and methods for fabricating such shielded through via structures. The described shielded through via structures and techniques allow for assembly of multi-layer semiconductor structures including one or more superconducting semiconductor structures (or integrated circuits).
US10199551B2	Semiconductor light-emitting device A semiconductor light-emitting device includes a light-emitting structure including a first semiconductor layer, an active layer and a second semiconductor layer sequentially stacked. A connection electrode is positioned above the light-emitting structure. The connection electrode includes a connection metal layer electrically connected to at least one of the first and second semiconductor layers. A UBM pattern is on the connection electrode. A connection terminal is on the UBM pattern. The connection metal layer includes a first metal element. A heat conductivity of the first metal element is higher than that of gold (Au). The connection terminal includes a second metal element. A first reactivity of the first metal element with the second metal element is lower than a second reactivity of gold (Au) with the second metal element.
US10199550B2	Light-emitting device A light-emitting device includes: a resin package including: a first lead, a second lead, and a resin portion, wherein each of the first lead and the second lead has a top surface and a bottom surface and comprises a metal layer formed at least at the top surfaces; a light-emitting element electrically connected to the first lead and the second lead; and a protection element located on a first surface portion of the top surface of the first lead. The first lead includes: a first lateral portion and at least one second lateral portion. A second surface portion is formed at the top surface of the first lead between the protection element and at least one of the first lateral portion and the at least one second lateral portion, the second surface portion being embedded in the resin portion and extending in a height direction.
US10199549B2	Light emitting device with an optical element and a reflector A structure according to embodiments of the invention includes a semiconductor light emitting device and an optical element disposed over the semiconductor light emitting device. The semiconductor light emitting device is disposed in a recess in the optical element. A reflector is disposed on a bottom surface of the optical element. A method according to embodiments of the invention includes disposing a semiconductor light emitting device on a substrate and forming a reflector adjacent the semiconductor light emitting device. An optical element is formed over the semiconductor light emitting device. The semiconductor light emitting device is removed from the substrate.
US10199544B2	Light emitting device A light-emitting device comprises a semiconductor stack comprising a first semiconductor layer, a second semiconductor layer, and an active layer formed between the first semiconductor layer and the second semiconductor layer; a first pad on the semiconductor stack; a second pad on the semiconductor stack, wherein the first pad and the second pad are separated from each other with a distance, which define a region between the first pad and the second pad on the semiconductor stack; and multiple vias penetrating the active layer to expose the first semiconductor layer, wherein the first pad and the second pad are formed on regions other than the multiple vias.
US10199536B2	Patterned layer design for group III nitride layer growth A method of fabricating a device using a layer with a patterned surface for improving the growth of semiconductor layers, such as group III nitride-based semiconductor layers with a high concentration of aluminum, is provided. The patterned surface can include a substantially flat top surface and a plurality of stress reducing regions, such as openings. The substantially flat top surface can have a root mean square roughness less than approximately 0.5 nanometers, and the stress reducing regions can have a characteristic size between approximately 0.1 microns and approximately five microns and a depth of at least 0.2 microns. A layer of group-III nitride material can be grown on the first layer and have a thickness at least twice the characteristic size of the stress reducing regions. A device including one or more of these features also is provided.
US10199533B2	Method of manufacturing light emitting device A method for manufacturing a light emitting device includes providing an intermediate member including: at least one light emitting element that includes a plurality of electrodes arranged at a same surface side thereof, and a covering member covering the at least on light emitting element such that at least a portion of a surface of each of the plurality of electrodes is exposed; forming a metal layer that continuously covers the exposed portion of each of the electrodes and the covering member; and removing a portion of the metal layer by irradiating the metal layer with laser light to form a plurality of external connection electrodes that are spaced apart from each other, each of the plurality of external connection electrodes having an area larger than an area of respective one of the plurality of electrodes.
US10199532B1	Light-emitting diode and method for manufacturing the same A light-emitting diode (LED) includes a first type semiconductor layer, a second type semiconductor layer, and an active layer. The first type semiconductor layer includes a low resistance portion and a high resistance portion. The low resistance portion is separated from at least one edge of the first type semiconductor layer by the high resistance portion, and the resistivity of the first type semiconductor layer is increased from the low resistance portion toward the high resistance portion. The active layer is disposed between the first type semiconductor layer and the second type semiconductor layer. The active layer has a first region and a second region, in which the first region has a threading dislocation density greater than that of the second region, and a vertical projection of the low resistance portion on the active layer at least partially overlaps with the second region.
US10199520B2	Reduced junction area barrier-based photodetector A photodetector structure having a barrier layer disposed between a pair of like-conductively doped semiconductor layers, the barriers layer having a surface area smaller than the surface area of the upper one of the pair of semiconductor layers. A fill material is disposed between outer peripheral edges of the barrier layer and a region between outer peripheral edges of the first and second layers.
US10199519B2	Method of making a sensor package with cooling feature A sensor device includes a first substrate of semiconductor material having opposing first and second surfaces, photodetectors configured to receive light impinging on the first surface, and first contact pads each exposed at both the first and second surfaces and electrically coupled to at least one of the photodetectors. A second substrate comprises opposing first and second surfaces, electrical circuits, a second contact pads each disposed at the first surface of the second substrate and electrically coupled to at least one of the electrical circuits, and a plurality of cooling channels formed as first trenches extending into the second surface of the second substrate but not reaching the first surface of the second substrate. The first substrate second surface is mounted to the second substrate first surface such that each of the first contact pads is electrically coupled to at least one of the second contact pads.
US10199516B2	Method for fabricating a photovoltaic device by uniform plating on dielectric passivated through-wafer vias and interconnects Photovoltaic devices are formed by laser drilling vias through silicon substrates and, following surface preparation of the via sidewalls, plating a continuous, electrically conductive layer on the via sidewalls to electrically connect the emitter side of the cell with the back side of the cell. The electrically conductive layer can be formed on portions of a base emitter within the vias and on the back side of the substrate. Alternatively, the electrically conductive layer can be formed on a passivation layer on the via sidewalls and back side of the cell.
US10199514B2	Methods for manufacturing a semiconductor device having a non-ohmic contact formed between a semiconductor material and an electrically conductive contact layer An embodiment of a method of manufacturing a semiconductor device includes providing a semiconductor material that comprises SiC and forming an electrically conductive contact layer on the semiconductor material. A non-ohmic contact is formed between the semiconductor material and the electrically conductive contact layer. The electrically conductive contact layer comprises a metal nitride with a nitrogen content between 10 to 50 atomic %. Additional embodiments of manufacturing a semiconductor device are described.
US10199510B2	Thin film transistor, thin film transistor manufacturing method and array substrate The present disclosure relates to a thin film transistor, a method for manufacturing a thin film transistor and an array substrate. The thin film transistor comprises an active layer, a source and a drain, the source comprising a source first conductive layer and a source first buffer layer, the drain comprising a drain first conductive layer and a drain first buffer layer; at least a part of an upper surface of the source first buffer layer and at least a part of an upper surface of the drain first buffer layer being in contact with a lower surface of the active layer, at least a part of a side wall of the source first conductive layer and at least a part of a side wall of the drain first conductive layer being in contact with the active layer, the side wall of the source first conductive layer and the side wall of the drain first conductive layer in contact with the active layer being formed with an oxide layer. The composition of the active layer of the above thin film transistor would not be damaged by the source first conductive layer and the drain first conductive layer, in which way higher electron mobility can be guaranteed for the thin film transistor, and the thin film transistor is maintained in a good electric property and stability.
US10199509B2	Semiconductor device A high-performance semiconductor device with high reliability is provided. The semiconductor device includes a first transistor, a second transistor, a first metal oxide covering at least part of the first transistor, an insulating film over the first transistor and the second transistor, and a second metal oxide over the insulating film. The first transistor includes a first gate electrode, a first gate insulating film, a first oxide, a first source electrode, a first drain electrode, a second gate insulating film, and a second gate electrode. The second transistor includes a third gate electrode, a third gate insulating film, a second oxide, a second source electrode, a second drain electrode, a fourth gate insulating film, and a fourth gate electrode. The first gate insulating film and the second gate insulating film are in contact with the first metal oxide.
US10199497B2	Semiconductor devices including vertical channel transistors A semiconductor device includes an active pillar that protrudes above a substrate, the active pillar including a pair of vertical sections and a body interconnection between the pair of vertical sections, and each of the pair of vertical sections having a channel body and a lower impurity region below the channel body, word lines coupled to respective channel bodies, and buried bit lines in contact with respective lower impurity regions, wherein the channel bodies are connected to the substrate through the body interconnection.
US10199494B2	Laterally diffused metal-oxide-semiconductor devices and fabrication methods thereof The present disclosure provides a laterally diffused metal-oxide-semiconductor (LDMOS) device. The LDMOS device includes a plurality of fin structures formed on a substrate including a first device region, a second device region, and an isolation region sandwiched between the two regions. An opening is formed in the fin structures in the isolation region. The LDMOS device further includes an isolation layer formed in the opening and covering the sidewall of the opening formed by a portion of each fin structure in the first device region. The isolation layer exposes top surfaces of the plurality of fin structures. Moreover, the LDMOS device also includes a gate structure formed across each fin structure in the first device region. The gate structure covers a portion of the sidewall and the top surfaces of the fin structure formed in the first device region and also covers the top surface of the isolation layer.
US10199492B2	Folded channel trench MOSFET A trench MOSFET device includes a body, region and source region that undulate along a channel width direction of the MOSFET device such that the body region and source region have variations in depth along the channel width direction. The undulations increase a channel width of the MOSFET device.
US10199490B2	Semiconductor device with a guard structure and corresponding methods of manufacture A semiconductor device includes a guard structure located laterally between a first active area of a semiconductor substrate and a second active area of the semiconductor substrate. The guard structure includes a first doping region located at a front side surface of the semiconductor substrate, and a wiring structure electrically connecting the first doping region to a highly doped portion of a common doping region. The common doping region extends from a backside surface of the semiconductor substrate to at least a part of the front side surface of the semiconductor substrate in contact with the wiring structure of the guard structure. Corresponding methods for forming the semiconductor device are also described.
US10199487B1	Multi-drain gallium-nitride module with multiple voltage ratings A multi-drain power module can include: a plurality of gallium-nitride (GaN) transistor dies connected to each other in series; a plurality of drain terminals, each drain terminal being respectively connected to the drain of a GaN transistor die; a series-switch-driver (SSD) connected to the gate of each GaN transistor die; a gate terminal connected to the SSD; a source terminal connected to a first source of a first GaN transistor die of the plurality of GaN transistor dies; a package encapsulating the plurality of GaN transistor dies and the SSD, and exposing the plurality of drain terminals, the gate terminal, and the source terminal.
US10199481B2	Method for manufacturing semiconductor device A method for manufacturing a semiconductor device includes carrying out a first heat treatment accompanied by nitration on a first insulating film and a silicon carbide substrate in a first gas atmosphere, after the carrying out of the first heat treatment and after a temperature of the silicon carbide substrate has become 700° C. or less, removing the silicon carbide substrate from a processing apparatus and exposing the silicon carbide substrate to air in an atmosphere outside of the processing apparatus, and after the exposing of the silicon carbide substrate to air in the atmosphere, carrying out a second heat treatment on the first insulating film and the silicon carbide substrate in a second gas atmosphere which is an inert gas.
US10199480B2	Controlling self-aligned gate length in vertical transistor replacement gate flow A semiconductor structure includes a semiconductor substrate, a bottom source/drain layer for a first vertical transistor over the semiconductor substrate, a vertical channel over the source/drain layer, and a metal gate wrapped around the vertical channel, the vertical channel having a fixed height relative to the metal gate at an interface therebetween. The semiconductor structure further includes a top source/drain layer over the vertical channel, and a self-aligned contact to each of the top and bottom source/drain layer and the gate. The semiconductor structure can be realized by providing a semiconductor substrate with a bottom source/drain layer thereover, forming a vertical channel over the bottom source/drain layer, forming a dummy gate wrapped around the vertical channel, and forming a bottom spacer layer and a top spacer layer around a top portion and a bottom portion, respectively, of the vertical channel, a remaining center portion of the vertical channel defining a fixed vertical channel height. The method further includes forming a top source/drain layer over the vertical channel, replacing the dummy gate with a metal gate, and forming self-aligned source, drain and gate contacts.
US10199478B2	Transistor and method for forming the same The present disclosure provides a method for forming a transistor, including: forming a base structure, containing a first gate structure, an active layer covering the first gate structure, and an insulating structure in the active layer; forming a second gate structure on the active layer; forming a source-drain region, including a source region and a drain region in the active layer each on a different side of the second gate structure; and forming a first interlayer dielectric layer covering the base structure and the second gate structure. The method also includes: forming a first contact hole that exposes the first gate structure by etching the first interlayer dielectric layer and the insulating structure; and forming a second contact hole that exposes the second gate structure and a third contact hole that exposes the drain region by etching the first interlayer dielectric layer.
US10199475B2	LDMOS transistors and associated systems and methods A lateral double-diffused metal-oxide-semiconductor field effect (LDMOS) transistor includes a silicon semiconductor structure, a dielectric layer at least partially disposed in a trench of the silicon semiconductor structure in a thickness direction, and a gate conductor embedded in the dielectric layer and extending into the trench in the thickness direction. The dielectric layer and the gate conductor are at least substantially symmetric with respect to a center axis of the trench extending in the thickness direction, as seen when the LDMOS transistor is viewed cross-sectionally in a direction orthogonal to the lateral and thickness directions.
US10199463B2	Nanowire-based vertical memory cell array having a metal layer interposed between a common back plate and the nanowires The present disclosure relates to semiconductor structures and, more particularly, to vertical memory cell structures and methods of manufacture. The vertical memory cell includes a vertical nanowire capacitor and vertical pass gate transistor. The vertical nanowire capacitor composes of: a plurality of vertical nanowires extending from an insulator layer; a dielectric material on vertical sidewalls of the plurality of vertical nanowires; doped material provided between the plurality of vertical nanowire; the pass gate transistor composes of: high-k dielectric on top part of the nanowire, metal layer surrounding high-k material as all-around gate. And there is dielectric layer in between vertical nanowire capacitor and vertical nanowire transistor as insulator. At least one bitline extending on a top of the plurality of vertical nanowires and in electrical contact therewith; and at least one wordline formed on vertical sidewalls of the plurality of vertical nanowires and separated therefrom by the dielectric material.
US10199459B2	Superjunction with surrounding lightly doped drain region A semiconductor device has a substrate and a lightly doped drain (LDD) region formed in the substrate. A superjunction is formed in the LDD region.
US10199457B2	Silicon carbide semiconductor device A silicon carbide semiconductor device includes a silicon carbide drift layer formed on an upper surface of a silicon carbide semiconductor substrate having an off angle, a body region, a source region, a plurality of trenches, a gate insulating film, a gate electrode, a source electrode, a drain electrode, and a depletion suppressing layer. The depletion suppressing layer is positioned to be sandwiched between the plurality of trenches in a plan view, and in a direction with the off angle of the silicon carbide semiconductor substrate, a distance between the depletion suppressing layer and one of the trenches adjacent to the depletion suppressing layer is different from another distance between the depletion suppressing layer and the other one of the trenches adjacent to the depletion suppressing layer.
US10199453B2	Semiconductor device and method for producing semiconductor device Proton irradiation is performed a plurality of times from rear surface of an n-type semiconductor substrate, which is an n− drift layer, forming an n-type FS layer having lower resistance than the n-type semiconductor substrate in the rear surface of the n− drift layer. When the proton irradiation is performed a plurality of times, the next proton irradiation is performed to as to compensate for a reduction in mobility due to disorder which remains after the previous proton irradiation. In this case, the second or subsequent proton irradiation is performed at the position of the disorder which is formed by the previous proton irradiation. In this way, even after proton irradiation and a heat treatment, the disorder is reduced and it is possible to prevent deterioration of characteristics, such as increase in leakage current. It is possible to form an n-type FS layer including a high-concentration hydrogen-related donor layer.
US10199452B2	Semiconductor device A semiconductor device according to an embodiment includes a semiconductor substrate, source electrodes, drain electrodes provided between the source electrodes, gate electrodes provided between the source electrodes and the drain electrodes, first p-type region in the semiconductor substrate, n-type source regions in the semiconductor substrate extending in a first direction and electrically connected to the source electrodes, n-type drain regions in the semiconductor substrate extending in the first direction and electrically connected to the drain electrodes, and first n-type regions extending in the first direction, the first p-type region interposed between the first n-type regions and the n-type source regions, the first p-type region interposed between the first n-type regions and the n-type drain regions. A distance between one first n-type region among the first n-type regions and the source electrodes is less than a distance between the one first n-type region and the drain electrodes.
US10199451B2	Lower electrode of DRAM capacitor and manufacturing method thereof A lower electrode is made of a TiN-based material and provided at a base of a dielectric film in a DRAM capacitor. The lower electrode includes first TiON films provided at opposite outer sides, the first TiON films having a relatively low oxygen concentration, and a second TiON film provided between the first TiON films, the second TiON film having a relatively high oxygen concentration.
US10199450B2	Circuit for preventing static electricity and display device having the same A static electricity prevention circuit of a display device including: a driving circuit configured to drive a display unit that displays an image, at least one clock signal wire configured to transmit a clock signal to the driving circuit, at least one transistor electrically coupled to the clock signal wire, and at least one capacitor including a first electrode coupled to a source electrode and to a drain electrode of the transistor, and a second electrode configured to be maintained at a voltage.
US10199447B2	Display device A display device is disclosed. The display device includes a plurality of subpixels formed on a first substrate, each subpixel having an emission area, in which an emission element is disposed to emit light, and a circuit area, in which a circuit for driving the emission element is disposed, a sensing line disposed between the subpixels in a first direction, and a sensing connection line disposed in the circuit area in a second direction, that is transverse to the first direction, and made of an electrode layer positioned above the sensing line, the sensing connection line electrically connecting the subpixels to the sensing line.
US10199446B2	Transparent display device and method for manufacturing the same Disclosed are a display device and a method of manufacturing the same. The display device includes a light emitting device including an anode electrode, a light emitting layer, and a cathode electrode, a driving transistor configured to supply a driving current to the light emitting device, and a capacitor including one electrode and other electrode each formed of a transparent conductive material. The one electrode and the other electrode of the capacitor overlap each other with at least one insulation layer therebetween.
US10199444B2	Display device A display device includes a substrate including a display area and a non-display area, a plurality of pixels provided in the display area, lines respectively connected to the plurality of pixels, the lines applying a signal to the plurality of pixels, the lines each including a first metal layer including a first metal and a second metal layer that is provided on the first metal layer and includes a second metal, an insulating layer provided at a least one portion between the substrate and the lines, the insulating layer including an inorganic insulating layer and an organic insulating layer, and a barrier layer provided between the organic insulating layer and the first metal layer, the barrier layer including an oxide of the first metal.
US10199443B2	Display device and fabricating method thereof A display device including a first substrate, an organic light emitting layer on the first substrate and including a protrusion, and a pixel circuit including a passivation film having a recess engaged with the protrusion, wherein the protrusion is located at a position corresponding to the recess and adhered to the pixel circuit in the recess by a conductive adhesive.
US10199442B1	Organic light-emitting display panel, method for preparing the same, and organic light-emitting display device Provided is an organic light-emitting display panel, including: an array substrate, an organic light-emitting element arranged on the array substrate, and an encapsulation portion; the organic light-emitting element includes a reflective layer, a pixel definition layer including pixel definition parts, a light-emitting pixel layer including light-emitting pixel parts each arranged between the pixel definition parts, a cathode layer arranged on a side of the light-emitting pixel layer away from the reflective layer, and a support layer arranged between at least one pair of adjacent light-emitting pixel parts of the light-emitting pixel layer; the support layer includes a metal part and an annular organic part placed on a side of the metal part away from the array substrate; the encapsulation portion includes at least one organic encapsulation layer and at least one inorganic encapsulation layer; and the encapsulation portion covers the organic light-emitting element.
US10199441B2	Pixel structure and display panel A display panel includes a first substrate, a plurality of first signal lines, a plurality of second signal lines, and a plurality of pixel electrodes. The first substrate has at least one bendable area and two non-bendable areas. The at least one bendable area is located between the two non-bendable areas. One of the first signal lines and one of the second signal lines are electrically connected to at least one subpixel. Each of the a subpixels includes a control unit, and the control units are provided only in the non-bendable areas and are not provided in the bendable area. The pixel electrodes are provided in the bendable area and the non-bendable areas. Each of the controls units is electrically connected to one of the pixel electrodes.
US10199440B2	Display device The display device may include a first substrate including a plurality of pixel areas; a plurality of display elements arranged in the plurality of pixel areas on the first substrate; a second substrate facing the first substrate; a plurality of spacers arranged between the plurality of pixel areas and maintaining a constant space between the first substrate and the second substrate; and a plurality of touch sensing electrodes arranged on a surface of the second substrate which faces the first substrate. Here, each touch sensing electrode may include at least one first area and at least one second area that is electrically separated from the first area. The plurality of spacers may be arranged to correspond to the first area.
US10199435B2	Light emitting element and display device A light emitting element and display device are disclosed. In one example, a light emitting element includes a first electrode formed on a base body. A first insulation layer is formed on the base body and the first electrode and has an aperture portion in which a part of the first electrode is exposed. A second insulation layer is formed on the first insulation layer and has a protruding end portion protruding from the aperture portion. A third insulation layer is formed on the second insulation layer and has an end portion recessed from the protruding end portion. A charge injection/transport layer is formed over the second insulation layer and the third insulation layer. An organic layer includes a light emitting layer, and a second electrode formed on the organic layer. At least a part of the charge injection/transport layer is discontinuous at the protruding end portion.
US10199430B2	Monolithic integrated device Monolithic integrated device having an architecture that allows an acoustic device to transduce either surface acoustic waves or bulk acoustic waves, comprising: a substrate layer being the base of the device; an inter-layer dielectric disposed on top of the substrate layer; an electronic circuitry substantially formed in the inter-layer dielectric and supported by the substrate layer, the electronic circuitry comprises a plurality of metal layers; and a piezoelectric layer being sandwiched between a top electrode and a bottom electrode within the inter-layer dielectric. The top electrode is an upper metal layer belonging to the electronic circuitry and the bottom electrode is a lower metal layer belonging to the electronic circuitry. To transduce the bulk acoustic waves, the inter-layer dielectric is formed with a top cavity above the top electrode and a bottom cavity below the bottom electrode.
US10199427B2	Solid-state imaging device, drive method thereof and electronic apparatus A solid-state imaging device includes: plural photodiodes formed in different depths in a unit pixel area of a substrate; and plural vertical transistors formed in the depth direction from one face side of the substrate so that gate portions for reading signal charges obtained by photoelectric conversion in the plural photodiodes are formed in depths corresponding to the respective photodiodes.
US10199419B2	Semiconductor device and manufacturing method, and electronic appliance There is provided a semiconductor device including: a plurality of bumps (13) on a first semiconductor substrate (11); and a lens material (57) in a region other than the plurality of bumps on the first semiconductor substrate, wherein a distance between a side of a bump closest to the lens material and a side of the lens material closest to the bump is greater than twice a diameter of the bump closest to the lens material, and wherein the distance between the side of the bump closest to the lens material and the side of the lens material closest to the bump is greater a minimum pitch of the bumps.
US10199416B2	Stacked image sensor and system including the same A stacked image sensor includes a first semiconductor die and a second semiconductor die. The first semiconductor die includes a pixel array of rows and columns of pixels, a first column interlayer-connection unit extending in the row direction and disposed adjacent the top or bottom of the pixel array and column routing wires extending in a diagonal direction and connecting the pixel columns and the first column interlayer-connection unit. The second semiconductor die is stacked with the first semiconductor die. The second semiconductor die includes a second column interlayer-connection unit extending in the row direction and disposed at a location corresponding to the first column interlayer-connection unit and connected to the first column interlayer-connection unit, and a column control circuit connected to the second column interlayer-connection unit.
US10199415B2	Fabrication of optical metasurfaces The method is provided for fabricating an optical metasurface. The method may include depositing a conductive layer over a holographic region of a wafer and depositing a dielectric layer over the conducting layer. The method may also include patterning a hard mask on the dielectric layer. The method may further include etching the dielectric layer to form a plurality of dielectric pillars with a plurality of nano-scale gaps between the pillars.
US10199414B2	Semiconductor device and electronic equipment The present technology relates to a semiconductor device and electronic equipment in which a semiconductor device that suppresses the occurrence of noise by a leakage of light can be provided.A semiconductor device is configured which includes a light-receiving element 34, an active element for signal processing, and a light shielding structure 40 which is between the light-receiving element 34 and the active element to cover the active element and is formed of wirings 45 and 46. The semiconductor device further includes a first substrate on which the light-receiving element is formed, a second substrate on which the active element is formed, and a wiring layer which has a light shielding structure by the wirings which is formed on the second substrate, and in which the second substrate can be bonded to the first substrate through the wiring layer.
US10199412B2	Optoelectronic modules including an image sensor having regions optically separated from one another This disclosure describes optoelectronic modules that include an image sensor having at least two regions separated optically from one another by a wall. The wall can include a bridge portion that extends over the image sensor and further can include a cured adhesive portion, part of which is disposed between a lower surface of the bridge portion and an upper surface of the image sensor. Various techniques are described for fabricating the modules so as to help prevent the adhesive from contaminating sensitive regions of the image sensor. The wall can be substantially light-tight so as to prevent undesired optical cross-talk, for example, between a light emitter located to one side of the wall and a light sensitive region of the image sensor located to the other side of the wall.
US10199406B2	Array substrate and manufacturing method thereof, display panel and display device An array substrate and a manufacturing method thereof, a display panel and a display device are provided. The array substrate manufacturing method comprises: forming a source electrode and a drain electrode on a gate insulating layer; forming photoresist above the gate insulating layer and the source electrode and the drain electrode; etching the photoresist to form an opening region so as to expose the gate insulating layer between the source electrode and the drain electrode, and a part of the source electrode and a part of the drain electrode; and forming an active layer in the opening region, the active layer covering the exposed gate insulating layer, the part of the source electrode and the part of the drain electrode.
US10199405B2	Transistor display panel and manufacturing method thereof A method of manufacturing a transistor display panel and a transistor display panel, the method including forming a polycrystalline silicon layer on a substrate; forming an active layer by patterning the polycrystalline silicon layer; forming a first insulating layer covering the substrate and the active layer; exposing the active layer by polishing the first insulating layer using a polishing apparatus; and forming a second insulating layer that contacts the first insulating layer and the active layer, wherein exposing the active layer by polishing the first insulating layer includes coating a first slurry on a surface of the first insulating layer, the first slurry reducing a polishing rate of the active layer.
US10199400B2	Array substrate, display panel and display device The present disclosure provides an array substrate, a display panel and a display device. The array substrate includes a first conductive pattern and a second conductive pattern forming a ground (GND) protection circuit. The first conductive pattern includes a plurality of first conductive segments spaced apart from each other, and adjacent first conductive segments are connected to each other by the second conductive pattern, an insulating layer is arranged between the first conductive segments and the second conductive pattern, and the first conductive segments are connected to the second conductive pattern through via holes penetrating through the insulating layer. In addition, the present disclosure provides a display panel including the above array substrate. Furthermore, the present disclosure provides a display device including the above array substrate.
US10199397B2	Electrical connection structure, array substrate and display device An electrical connection structure, an array substrate and a display device. The electrical connection structure includes a first electrical connection component, which includes: a conductive structure; an insulating layer covering the conductive structure, where at least one first via hole and at least one second via hole are disposed separately in the insulating layer, each first via hole and each second via hole expose a respective part of a surface of the conductive structure; and a conductive connection layer disposed on the insulating layer and covering the at least one first via hole and the at least one second via hole, where the conductive connection layer and the conductive structure are electrically connected with each other through the at least one first via hole and the at least one second via hole. The electrical connection structure can reduce undercut phenomena that occur at via holes in the insulating layer.
US10199395B2	Metal oxide thin film transistor and manufacturing method thereof, display substrate and display device The present disclosure provides a metal oxide thin film transistor, wherein an oxygen deficiency adsorptive removal layer comprising an oxygen deficiency adsorptive removal material is provided between an active layer and a source, and/or between the active layer and a drain. The standard Gibbs free energy of formation of an oxide of the oxygen deficiency adsorptive removal material in a unit volume is larger than that of a metal oxide in the active layer. The present disclosure further provides a display substrate comprising the metal oxide thin film transistor and a display device comprising the display substrate.
US10199392B2	FinFET device having a partially dielectric isolated fin structure A semiconductor material is patterned to define elongated fins insulated from an underlying substrate. A polysilicon semiconductor material is deposited over and in between the elongated fins, and is patterned to define elongated gates extending to perpendicularly cross over the elongated fins at a transistor channel. Sidewall spacers are formed on side walls of the elongated gates. Portions of the elongated fins located between the elongated gates are removed, along with the underlying insulation, to expose the underlying substrate. One or more semiconductor material layers are then epitaxially grown from the underlying substrate at locations between the elongated gates. The one or more semiconductor material layers may include an undoped epi-layer and an overlying doped epi-layer. The epitaxial material defines a source or drain of the transistor.
US10199387B2	Semiconductor memory A semiconductor memory includes a memory cell region that includes multiple memory cells stacked above a semiconductor substrate, first and second dummy regions on opposite sides of the memory cell region, each dummy region including multiple dummy cells stacked above the semiconductor substrate, and a wiring that electrically connects dummy cells of the first and second dummy regions that are at a same level above the semiconductor substrate.
US10199383B2	Semiconductor structure and fabrication method thereof Semiconductor structures and fabrication methods thereof are provided. An exemplary fabrication method includes providing a base substrate having an N-type logic region including a first and a second N-type threshold voltage region, a P-type logic region including a first and a second P-type threshold voltage region, a pull-up transistor region and an adjacent pull-down transistor region; forming a gate dielectric layer; forming a first work function layer on the gate dielectric layer; removing portions of the first work function layer; forming a second work function layer on remaining first work function layer and exposed portions of the gate dielectric layer; removing a portion of the second work function layer; forming an N-type work function layer on remaining second work function layer and exposed portion of the gate dielectric layer in the second N-type threshold voltage region; and forming a gate electrode layer on the N-type work function layer.
US10199382B2	Semiconductor structures and fabrication methods thereof A method for fabricating a semiconductor device includes forming a gate dielectric layer on a base substrate including an N-type logic region, a P-type logic region, a first pull down transistor (PDT) region, a second PDT region, and a pass gate transistor (PGT) region, forming a first work function layer (WFL) in the first N-type threshold-voltage (TV) region, the P-type logic region, the second PDT region, and the PGT region, forming a second WFL on the first WFL in the first P-type TV region, and forming a third WFL on the second WFL in the first P-type TV region, the first WFL in the second P-type TV region, and the gate dielectric layer in the second N-type TV region and the first PDT region. The thickness of the third WFL is smaller than the thickness of the first WFL. The method further includes forming a fourth WFL on the substrate.
US10199380B2	SRAM cell with T-shaped contact An integrated circuit containing an array of SRAM cells with T-shaped contacts in the inverters, in which drain connecting segments may extend beyond gate connecting segments by a distance greater than 10 percent of a separation distance between ends of opposite drain connecting segments. The drain connecting segments may also extend beyond gate connecting segments by a distance greater than one-third of the width of the gate connecting segments. A process of forming an integrated circuit containing an array of SRAM cells with T-shaped contacts in which drain connecting segments may extend beyond gate connecting segments by a distance greater than 10 percent of a separation distance between ends of opposite drain connecting segments. A process may also form the drain connecting segments to extend beyond gate connecting segments by greater than one-third of the width of the gate connecting segments.
US10199378B2	Special construct for continuous non-uniform active region FinFET standard cells Methods for abutting two cells with different sized diffusion regions and the resulting devices are provided. Embodiments include abutting a first cell having first drain and source diffusion regions and a second cell having second drain and source diffusion regions, larger than the first diffusion regions, by: forming a dummy gate at a boundary between the two cells; forming a continuous drain diffusion region having an upper portion crossing the dummy gate and encompassing the entire first drain diffusion region and part of the second drain diffusion region and having a lower portion beginning over the dummy gate and encompassing a remainder of the second drain diffusion region; forming a continuous source diffusion region that is the mirror image of the continuous drain diffusion region; and forming a poly-cut mask over the dummy gate between, but separated from, the continuous drain and source diffusion regions.
US10199376B2	Monolithic cell for an integrated circuit and especially a monolithic switching cell A cell includes at least two semiconductor structures of the same nature, these two structures both employing voltages and currents that are unidirectional, each structure having an anode (10), a cathode (14) and optionally a gate (16). The structures are integrated into the volume of one and the same semiconductor substrate (4). The cathodes (14), and possibly the gates (16), are arranged on a first side of the semiconductor substrate (4). The anodes (10) are each arranged on a second side of the semiconductor substrate (4), which side is opposite the first side, facing the cathodes and possibly the corresponding gates. Two electrodes, anodes or cathodes, of two separate structures, are electrically connected to each other.
US10199375B2	Storage device and capacitor A capacitor includes a plurality of first electrode layers stacked in a first direction, a first conductor extending in the first direction through the plurality of first electrode layers, and a first insulating layer extending in the first direction along the first conductor and located between the first conductor and the plurality of first electrode layers. The capacitor includes a first capacitance provided between the first conductor and the plurality of first electrode layers.
US10199371B2	Semiconductor device and semiconductor module The semiconductor device of the present invention includes a semiconductor substrate, a switching element which is defined on the semiconductor substrate, and a temperature sense element which is provided on the surface of the semiconductor substrate independently from the switching element and characterized by being dependent on a temperature.
US10199370B2	Electronic device with integrated galvanic isolation, and manufacturing method of the same A method of manufacturing an electronic device for providing galvanic isolation includes forming a dielectric layer on a semiconductor body and integrating, in the dielectric layer, a galvanic isolation module, the integrating including forming a first metal region at a first height of the dielectric layer. A second metal region is formed at a second height greater than the first height of the dielectric layer, the first and second metal regions being at least one of capacitively and magnetically coupleable together. Forming the second metal region includes etching selective portions of the dielectric layer to form at least one trench having a side wall coupled to a bottom wall through rounded surface portions, and filling each trench with metal material to form the second metal region having rounded edges.
US10199369B2	Apparatus and methods for actively-controlled transient overstress protection with false condition shutdown Apparatus and methods for transient overstress protection with false condition shutdown are provided herein. In certain configurations, a high-voltage tolerant actively-controlled protection circuit includes a transient overstress detection circuit, a clamp circuit electrically connected between a first node and a second node, a bias circuit that biases the clamp circuit, and a false condition shutdown circuit. The transient overstress detection circuit generates a detection signal indicating whether or not a transient overstress event is detected between the first and second nodes. Additionally, the false condition shutdown circuit generates a false condition shutdown signal based on low pass filtering a voltage difference between the first and second nodes, thereby determining independently whether or not power is present. The bias circuit controls operation of the clamp circuit in an on state or an off state based on the detection signal and the false condition shutdown signal.
US10199368B2	Stucture for protecting an integrated circuit against electrostatic discharges An integrated circuit includes at least one input-output pad and a terminal intended to be connected to a source of a reference potential and further including a protection structure including a thyristor forward-connected between the pad and the terminal. The thyristor includes a first resistor between its cathode gate and the terminal. At least one Zener diode is disposed between the thyristor and the pad. The anode of the Zener diode is connected to the cathode gate of the thyristor and the cathode of the Zener diode is connected to the pad via at least one second resistor. The junction of the Zener diode is different from the junctions of the PNPN structure of the thyristor.
US10199367B2	Semiconductor device A semiconductor device includes a semiconductor body having opposite first and second surfaces. The semiconductor device further includes a transistor structure in the semiconductor body and a source contact structure overlapping the transistor structure. The source contact structure is electrically connected to source regions of the transistor structure. A gate contact structure is further provided, which has a part separated from the source contact structure by a longitudinal gap within a lateral plane. Gate interconnecting structures bridge the longitudinal gap and are electrically coupled between the gate contact structure and a gate electrode of the transistor structure. Electrostatic discharge protection structures bridge the longitudinal gap and are electrically coupled between the gate contact structure and the source contact structure. At least one of the gate interconnecting structures is between two of the electrostatic discharge protection structures along a length direction of the longitudinal gap.
US10199366B2	Methods of manufacturing semiconductor packages A method of manufacturing a semiconductor package, the method including forming a hole that penetrates an interconnect substrate; providing a first carrier substrate below the interconnect substrate; providing a semiconductor chip in the hole; forming a molding layer by coating a molding composition on the semiconductor chip and the interconnect substrate; adhering a second carrier substrate onto the molding layer with an adhesive layer; removing the first carrier substrate to expose a bottom surface of the semiconductor chip and a bottom surface of the interconnect substrate; forming a redistribution substrate below the semiconductor chip and the interconnect substrate; detaching the second carrier substrate from the adhesive layer; and removing the adhesive layer.
US10199365B2	Semiconductor module According to one embodiment, a semiconductor module includes a first circuit component, a first connection member, and a first wire. The first circuit component includes a first substrate, a first conductive layer, a first switching device, and a first diode. The first substrate has an insulation property. The first connection member is provided on a first electrode of the first switching device and the fourth electrode of the first diode, and has a conductive property. The first wire connects the first conductive layer and the first connection member.
US10199362B1	MicroLED display panel A microLED display panel includes a substrate being divided into a plurality of sub-regions for supporting microLEDs, and a plurality of drivers being correspondingly disposed on surfaces of the sub-regions respectively. In one embodiment, a top surface of the substrate has a recess for accommodating the driver.
US10199359B1	Three-dimensional memory device employing direct source contact and hole current detection and method of making the same A three-dimensional memory device includes a p-doped source semiconductor layer located over a substrate, a p-doped strap semiconductor layer located over the p-doped source semiconductor layer, an alternating stack of electrically conductive layers and insulating layers located over the p-doped strap semiconductor layer, and memory stack structures that extend through the alternating stack and into an upper portion of the p-doped source semiconductor layer. Each memory stack structure includes a p-doped vertical semiconductor channel and a memory film laterally surrounding the p-doped vertical semiconductor channel. A top surface of each p-doped vertical semiconductor channel contacts a bottom surface of a respective n-doped region. A sidewall of a bottom portion of each p-doped vertical semiconductor channel contacts a respective sidewall of the p-doped strap semiconductor layer.
US10199353B2	Microelectronic interposer for a microelectronic package A microelectronic interposer for a microelectronic package may be fabricated, wherein a first microelectronic device within the microelectronic package is in electronic communication with at least one second microelectronic device through the microelectronic interposer which positions the at least one second microelectronic device outside a periphery of the first microelectronic device. The microelectronic interposer may further include at least one recess for achieving a desired height and/or enabling various configurations for the microelectronic package.
US10199348B2	Plastic-packaged semiconductor device having wires with polymerized insulating layer The assembly of a chip (101) attached to a substrate (103) with wires (201) spanning from the chip to the substrate is loaded in a heated cavity (402) of a mold; the wire surfaces are coated with an adsorbed layer of molecules of a heterocyclic compound (302); a pressure chamber (404) of the mold is loaded with a solid pellet (410) of a packaging material including a polymerizable resin, the chamber being connected to the cavity; the vapor of resin molecules is allowed to spread from the chamber to the assembly inside the cavity during the time interval needed to heat the solid pellet for rendering it semi-liquid and to pressurize it through runners (403) before filling the mold cavity, whereby the resin molecules arriving in the cavity are cross-linked by the adsorbed heterocyclic compound molecules into an electrically insulating at least one monolayer of polymeric structures on the wire surfaces.
US10199345B2	Method of fabricating substrate structure A substrate structure is provided, which includes: a substrate body having a plurality of conductive pads; an insulating layer formed on the substrate body and exposing the conductive pads; a plurality of conductive vias formed in the insulating layer and electrically connected to the conductive pads; a plurality of circuits formed on the conductive vias and in the insulating layer, wherein the circuits are greater in width than the conductive vias; and a plurality of conductive posts formed on the circuits and the insulating layer, wherein each of the conductive posts has a width greater than or equal to that of each of the circuits. The conductive vias, the circuits and the conductive posts are integrally formed. As such, micro-chips or fine-pitch conductive pads can be electrically connected to the substrate structure in a flip-chip manner.
US10199342B2	Reliable pad interconnects A device and methods of forming the device are disclosed. A substrate with a circuits component and a dielectric layer with interconnects is provided. A pad level dielectric layer is formed over the dielectric layer. A primary passivation layer is formed over the pad level dielectric layer with pad interconnects. The substrate is subjected to an alloying process. During the alloying process, the primary passivation layer prevents or reduces formation of hillocks on surfaces of the pad interconnects to improve surface smoothness of the pad interconnects. Pad openings are formed in the pad level dielectric layer to expose top surfaces of the pad interconnects. A cap dielectric layer is formed on the substrate and lines the primary passivation layer as well as the exposed top surfaces of the pad interconnects. A final passivation layer is formed on the substrate and covers the cap dielectric layer. The final passivation layer is patterned to form final passivation openings corresponding to the pad openings.
US10199340B2	Signal transmission insulative device and power semiconductor module A signal transmission insulating device includes: a first coil; a second coil opposing the first coil to form a transformer together with the first coil; a first insulating film provided between the opposing first coil and second coil and made of a first dielectric material; a second insulating film surrounding the first coil and made of a second dielectric material having a lower resistivity or a higher permittivity than the first dielectric material; and a third insulating film surrounding the second coil and made of a third dielectric material having a lower resistivity or a higher permittivity than the first dielectric material.
US10199330B2	Alignment mark arrangement, semiconductor workpiece, and method for aligning a wafer In various embodiments, an alignment mark arrangement may include a plurality of alignment marks disposed next to each other in a row, wherein at least one of the following holds true: a first alignment mark of the plurality of alignment marks has a first width and a second alignment mark of the plurality of alignment marks has a second width that is different from the first width; a first pair of neighboring alignment marks of the plurality of alignment marks is arranged at a first pitch and a second pair of neighboring alignment marks of the plurality of alignment marks is arranged at a second pitch that is different from the first pitch.
US10199329B2	Fan-out semiconductor package A fan-out semiconductor package includes: a first connection member having a through-hole; a semiconductor chip disposed in the through-hole of the first connection member and having an active surface having connection pads disposed thereon and an inactive surface opposing the active surface; an encapsulant encapsulating at least portions of the first connection member and the inactive surface of the semiconductor chip; a pattern layer disposed on the encapsulant and covering at least portions of the encapsulant adjacent to the inactive surface of the semiconductor chip; vias penetrating through the encapsulant and connecting the pattern layer and the inactive surface of the semiconductor chip to each other; and a second connection member disposed on the first connection member and the active surface of the semiconductor chip and including a redistribution layer electrically connected to the connection pads of the semiconductor chip.
US10199326B1	Three-dimensional memory device with driver circuitry on the backside of a substrate and method of making thereof A three-dimensional memory device includes an alternating stack of insulating layers and word lines located over a front side surface of a semiconductor substrate, memory stack structures extending through the alternating stack, in which each of the memory stack structures includes a memory film and a vertical semiconductor channel contacting an inner sidewall of the memory film, drain regions contacting a respective vertical semiconductor channel, bit lines electrically connected to the respective drain regions, driver circuitry for the memory stack structures located on a backside of the semiconductor substrate, and electrically conductive paths vertically extending through the semiconductor substrate and electrically connecting nodes of the driver circuitry to respective word lines or bit lines.
US10199324B1	Low cost metallization during fabrication of an integrated circuit (IC) A method for metallization during fabrication of an Integrated Circuit (IC). The IC includes a semiconductor wafer having a back surface and a front surface. The method includes etching a via hole through the semiconductor wafer. After this, a seed metal layer is deposited on the back surface of the semiconductor wafer. Thereafter, a photoresist layer is deposited on the back surface of the semiconductor wafer such that the via hole remains uncovered. After depositing the photoresist layer, a metal layer is formed along the walls of the via hole to electrically connect the back surface and the front surface of the semiconductor wafer. Finally, the photoresist layer is removed subsequent to forming the metal layer.
US10199316B2	Semiconductor device and method of aligning semiconductor wafers for bonding A semiconductor device has a first semiconductor wafer. The first semiconductor wafer is singulated to provide a first wafer section including at least one first semiconductor die or a plurality of first semiconductor die. The first wafer section is a fractional portion of the first semiconductor wafer. An edge support structure is formed around the first wafer section. A second wafer section includes at least one second semiconductor die. The second wafer section can be an entire second semiconductor wafer. The first semiconductor die is a first type of semiconductor device and the second semiconductor die is a second type of semiconductor device. An alignment opening is formed through the first wafer section and second wafer section with a light source projected through the opening. The first wafer section is bonded to the second wafer section with the first semiconductor die aligned with the second semiconductor die.
US10199315B2	Post zero via layer keep out zone over through silicon via reducing BEOL pumping effects An IC structure and related method are provided. The IC structure includes: a semiconductor substrate and a TSV disposed within the semiconductor substrate. A first interconnect layer includes a plurality of V0 vias disposed on the TSV, where the plurality of V0 vias are positioned laterally within an upper surface area of the TSV. At least one second interconnect layer disposed over the first interconnect layer includes a plurality of vias laterally positioned outside of a keep out zone positioned over the TSV. The method includes forming a first interconnect layer including a plurality of V0 vias disposed on a TSV, the V0 vias positioned laterally within an upper surface area of the TSV, and forming at least one second interconnect layer disposed over the first interconnect layer and including a plurality of vias laterally positioned outside of a keep out zone positioned over the TSV.
US10199313B2	Ring-frame power package The present disclosure relates to a ring-frame power package that includes a thermal carrier, a spacer ring residing on the thermal carrier, and a ring structure residing on the spacer ring. The ring structure includes a ring body and a number of interconnect tabs that protrude from an outer periphery of the ring body. Herein, a portion of the carrier surface of the thermal carrier is exposed through an interior opening of the spacer ring and an interior opening of the ring body. The spacer ring is not electronically conductive and prevents the interconnect tabs from electrically coupling to the thermal carrier. Each interconnect tab includes a top plated area and a bottom plated area, which is electrically coupled to the top plated area.
US10199292B2	Semiconductor device, semiconductor chip, and test method for semiconductor chip A semiconductor device includes a signal processing circuit configured to generate an output signal, an output pad, an output line connecting the signal processing circuit to the output pad, the output signal from the signal processing circuit being output from the output pad through the output line, a shorting pad formed in the output line, a switch connected between the shorting pad and the output pad, and configured to connect the signal processing circuit to the output pad when the switch is on, and disconnect the signal processing circuit from the output pad when the switch is off, and a wiring line connecting the shorting pad to the output pad.
US10199290B1	Method for processing a semiconductor wafer using non-contact electrical measurements indicative of at least one tip-to-tip short or leakage, at least one tip-to-side short or leakage, and at least one side-to-side short or leakage, where such measurements are obtained from cells with respective tip-to-tip short, tip-to-side short, and side-to-side short test areas, using a charged particle-beam inspector with beam deflection to account for motion of the stage A method for processing a semiconductor wafer uses non-contact electrical measurements indicative of at least one tip-to-tip short or leakage, at least one tip-to-side short or leakage, and at least one side-to-side short or leakage, where such measurements are obtained from cells with respective tip-to-tip short, tip-to-side short, and side-to-side short test areas, using a charged particle-beam inspector with a moving stage and beam deflection to account for motion of the stage.
US10199283B1	Method for processing a semiconductor wager using non-contact electrical measurements indicative of a resistance through a stitch, where such measurements are obtained by scanning a pad comprised of at least three parallel conductive stripes using a moving stage with beam deflection to account for motion of the stage A method for processing a semiconductor wafer uses non-contact electrical measurements indicative of a resistance through a stitch, where such measurements are obtained by scanning a pad comprised of at least three electrically connected, parallel conductive stripes using a moving stage with beam deflection to account for motion of the stage.
US10199278B2	Vertical field effect transistor (FET) with controllable gate length A method for manufacturing a semiconductor device includes forming a plurality of fins on a substrate, wherein a hardmask is formed on each of the plurality of fins, forming a gate structure around the plurality of fins, selectively depositing a dummy dielectric on the hardmask on each of the plurality of fins, depositing a dielectric layer on the gate structure and around the dummy dielectrics, selectively removing the dummy dielectrics and the hardmasks with respect to the dielectric layer and the gate structure to create a plurality of openings exposing portions of the gate structure, and selectively removing the exposed portions of the gate structure through the plurality of the openings.
US10199275B2	Systems and methods for producing flat surfaces in interconnect structures In interconnect fabrication (e.g. a damascene process), a conductive layer is formed over a substrate with holes, and is polished to provide interconnect features in the holes. To prevent erosion/dishing of the conductive layer at the holes, the conductive layer is covered by a sacrificial layer (possibly conformal) before polishing; then both layers are polished. Initially, before polishing, the conductive layer and the sacrificial layer are recessed over the holes, but the sacrificial layer is polished at a lower rate to result in a protrusion of the conductive layer at a location of each hole. The polishing can continue to remove the protrusions and provide a planar surface.
US10199271B1	Self-aligned metal wire on contact structure and method for forming same A structure and method for forming a self-aligned metal wire on a contact structure. The method for forming the self-aligned metal wire and contact structure may include, among other things, forming an initial contact structure above a substrate; forming a patterned mask on the initial contact structure, the mask including an opening; using the patterned mask to form an opening through the initial contact structure; forming a dielectric layer in the openings; removing the patterned mask to expose a remaining portion of the initial contact structure; and forming the metal wire on the remaining portion of the initial contact structure. The contact structure may include a vertical cross-sectional geometry including one of a trapezoid wherein a bottommost surface of the first contact structure is wider than an uppermost surface of the first contact structure, and a parallelogram. The metal wire may completely contact an uppermost surface of the contact structure.
US10199270B2	Multi-directional self-aligned multiple patterning Interconnect structures and methods of fabricating an interconnect structure. First and second non-mandrel interconnects are formed in an interlayer dielectric layer. The first non-mandrel interconnect and the second non-mandrel interconnect have respective side surfaces that extend in a first direction. The connector interconnect extends in a second direction transverse to the first direction from the side surface of the first non-mandrel interconnect to the side surface of the second non-mandrel interconnect.
US10199265B2	Variable space mandrel cut for self aligned double patterning The present disclosure relates to semiconductor structures and, more particularly, to variable space mandrel cut for self-aligned double patterning and methods of manufacture. The method includes: forming a plurality of mandrels on a substrate; forming spacers about the plurality of mandrels and exposed portions of the substrate; removing a portion of at least one of the plurality of mandrels to form an opening; and filling in the opening with material.
US10199263B2	Semiconductor devices and methods of manufacturing the same A semiconductor device includes a first insulating interlayer on a first region of a substrate and a second insulating interlayer on a second region of the substrate, a plurality of first wiring structures on the first insulating interlayer, the first wiring structures being spaced apart from each other, a plurality of second wiring structures filling a plurality of trenches on the second insulating interlayer, respectively, an insulation capping structure selectively on a surface of the first insulating interlayer between the first wiring structures and on a sidewall and an upper surface of each of the first wiring structures, the insulation capping structure including an insulating material, a third insulating interlayer on the first and second wiring structures, and an air gap among the first wiring structures under the third insulating interlayer.
US10199262B2	MEMS grid for manipulating structural parameters of MEMS devices A system and method for manipulating the structural characteristics of a MEMS device include etching a plurality of holes into the surface of a MEMS device, wherein the plurality of holes comprise one or more geometric shapes determined to provide specific structural characteristics desired in the MEMS device.
US10199260B1	Contact hole structure and method of fabricating the same A method of fabricating a contact hole structure includes providing a substrate with an epitaxial layer embedded therein. Next, an interlayer dielectric is formed to cover the substrate. After that, a first hole is formed in the interlayer dielectric and the epitaxial layer. Later, a mask layer is formed to cover a sidewall of the first hole and expose a bottom of the first hole. Subsequently, a second hole is formed by etching the epitaxial layer at the bottom of the first hole and taking the mask layer and the interlayer dielectric as a mask, wherein the first hole and the second hole form a contact hole. Then, the mask layer is removed. Finally, a silicide layer is formed to cover the contact hole.
US10199259B1	Technique for defining active regions of semiconductor devices with reduced lithography effort In semiconductor devices requiring the formation of fully depleted SOI transistor elements in combination with non-FET elements, such as substrate diodes and the like, the patterning of the active regions may be accomplished on the basis of deep isolation trenches, which may be formed first on the basis of immersion-based lithography, followed by formation of shallow isolation trenches also formed on the basis of immersion lithography. Thereafter, respective openings connecting to the substrate materials may be formed, possibly in combination with isolation trenches of reduced depth compared to the deep isolation trenches, on the basis of non-immersion lithography techniques. In this manner, device scaling for semiconductor devices requiring critical dimensions of 26 nm and less in a planar transistor architecture may be accomplished.
US10199258B2	Method of fabricating isolation structure A method of fabricating an isolation structure is provided. A first oxide layer and a first, second, and third hard mask layers are formed on a substrate. A patterned third hard mask layer is formed. Second oxide layers are formed on sidewalls of the patterned third hard mask layer and a fourth hard mask layer is formed between the second oxide layers. The second oxide layers and the second hard mask layer are removed using the patterned third hard mask layer and the fourth hard mask layer as a mask, to form a patterned second hard mask layer. The patterned third hard mask layer and the fourth hard mask layer are removed. A portion of the patterned second hard mask layer is removed to form trench patterns. A patterned first hard mask layer and first oxide layer, and trenches located in the substrate are defined. An isolation material is formed.
US10199256B2	Methods and systems for improved mask processing In some embodiments, methods and systems are provided for improved handling of lithography masks including loading a mask via a first load port from a first carrier; inverting the mask using a first contact pad; cleaning the mask; inverting the mask using a second contact pad; and unloading the mask via a second load port into a second carrier. Numerous other aspects are provided.
US10199255B2	Method for providing a planarizable workpiece support, a workpiece planarization arrangement, and a chuck According to various embodiments, a workpiece planarization arrangement may include: a chuck including at least one portion configured to support one or more workpieces; and a planarization tool configured to planarize the at least one portion of the chuck and to planarize one or more workpieces on the at least one portion of the chuck; wherein the at least one portion of the chuck includes at least one of particles, pores and/or a polymer.
US10199254B2	Method and system for transferring semiconductor devices from a wafer to a carrier structure Embodiments of methods and system for transferring semiconductor devices from a wafer to a carrier structure are described. In one embodiment, a method for transferring semiconductor devices from a wafer to a carrier structure involves positioning a carrier structure with a bond surface extending in a first plane and transferring a semiconductor device from a wafer onto the bond surface of the carrier structure using a plurality of rotatable transfer assemblies. Centers of the rotatable transfer assemblies are positioned in parallel with the first plane.
US10199253B2	Method for manufacturing semiconductor devices through peeling using UV-ray A method of manufacturing a semiconductor device includes disposing a peel-off layer on the second surface of the first substrate, wherein the second surface of the first substrate comprises semiconductor integrated circuits, and the peel-off layer does not extend to an outer peripheral portion of the first substrate, bonding a second substrate to the peel-off layer via a bonding layer, attaching a tape onto the first surface of the first substrate, wherein the tape comprises an adhesive agent having an adhesive strength capable of being lowered by UV irradiation, irradiating a portion of the adhesive agent provided at the outer peripheral portion with UV rays directed toward the first surface, and separating the first substrate from the second substrate at the adhesive agent portion and the peel-off layer portion.
US10199249B2	Transfer unit, apparatus for treating substrate, and method for treating substrate An apparatus for treating a substrate, an apparatus for transferring a substrate and a method for transferring a substrate are provided. The substrate treating apparatus comprises a receiving unit having a plurality of vertically arranged substrate supporting members and a transferring unit having an upper transfer member transferring a substrate to the receiving unit. The upper transfer member comprises a first arm and a second that are vertically spaced apart from each other and are independently driven to extend horizontally. A plurality of vertically arranged first hands is connected to the first arm and a single hand is connected to the second arm. According to an embodiment, a plurality of substrates can be transferred to a right position.
US10199247B2	Directed self-assembly of electronic components using diamagnetic levitation Embodiments of the invention relate generally to directed self-assembly (DSA) and, more particularly, to the DSA of electronic components using diamagnetic levitation.
US10199246B2	Temperature control mechanism, temperature control method and substrate processing apparatus There is provided a temperature control mechanism comprising: a plurality of combinations of a heater and a thyristor, wherein at least one combination of the heater and the thyristor is provided on a zone-by-zone basis, and wherein an area of an electrostatic chuck for mounting a substrate is divided into a plurality of zones; a power supply configured to supply current to heaters of the plurality of combinations respectively through the thyristors of the plurality of combinations; a pair of filters disposed at a power supply line for supplying electric power from the power supply to the heaters and configured to eliminate high frequency power applied to the power supply.
US10199241B2	Gas supply device and substrate processing apparatus A gas supply device of supplying a gas into a processing space from a gas supply source includes a facing plate that faces the processing space and includes multiple through holes; multiple gas distribution plates; and a cover plate. The facing plate, the gas distribution plates, and the cover plate are stacked in sequence. In a surface, which faces the facing plate, of the gas distribution plate closest to the facing plate, multiple gas diffusion spaces including a first gas diffusion space and a second gas diffusion space are formed, and in each of the gas distribution plates, a first gas supply path through which a processing gas or an additional gas is supplied into the first gas diffusion space and a second gas supply path through which the processing gas or the additional gas is supplied into the second gas diffusion space are formed.
US10199238B2	Semiconductor module cooling system A cooling apparatus includes a discrete module and a plastic housing. The discrete module includes a semiconductor die encapsulated by a mold compound, a plurality of leads electrically connected to the semiconductor die and protruding out of the mold compound and a first cooling plate at least partly uncovered by the mold compound. The plastic housing surrounds the periphery of the discrete module. The plastic housing includes a first singular plastic part which receives the discrete module and a second singular plastic part attached to a periphery of the first plastic part. The second plastic part has a cutout which exposes at least part of the first cooling plate and a sealing structure containing a sealing material which forms a water-tight seal around the periphery of the discrete module at a side of the discrete module with the first cooling plate.
US10199233B2	Active matrix substrate An active matrix substrate includes a substrate 31; gate lines arranged on the substrate 31 and extend in a first direction; source lines Si arranged on the substrate 31 and extend in a second direction that is different from the first direction; transistors 2 arranged in correspondence to points of intersection between the gate lines and the source lines, respectively, and are connected with the gate lines and the source lines; and an insulating layer. At least either the gate lines and the source lines are connected with electrodes of the transistors via contact holes in the insulating layer, and are formed to satisfy at least either i) having a greater film thickness or ii) being formed with a material having a smaller specific resistance, as compared with the electrodes of the transistors to which the lines are connected via the contact holes in the insulating layer.
US10199231B2	Substrate processing apparatus and substrate processing method A substrate processing apparatus includes: a substrate holder to hold a substrate in a horizontal posture while rotating the substrate about a vertical rotary axis passing through the center of a plane of the substrate; a guard member having a shape extending along at least part of a surface peripheral area of the substrate, the guard member being placed in a position close to the surface peripheral area of the substrate held by the substrate holder in a noncontact manner; a cup being a tubular member with an open top end, the cup being provided so as to surround the substrate held by the substrate holder and the guard member together; and a nozzle from which a processing liquid is discharged to the surface peripheral area of the substrate held by the substrate holder. The nozzle is placed on a side opposite the cup with respect to at least part of the guard member.
US10199230B2	Methods for selective deposition of metal silicides via atomic layer deposition cycles Methods for selectively depositing a metal silicide layer are provided herein. In some embodiments, a method of selectively depositing a metal silicide layer includes: (a) providing a substrate having a first layer to a process chamber, wherein the first layer comprises a first surface and a feature formed in the first surface comprising an opening defined by one or more sidewalls and a bottom surface wherein the sidewalls comprise one of silicon oxide or silicon nitride and wherein the bottom surface comprises at least one of silicon or germanium; (b) exposing the substrate to a precursor gas comprising a metal halide; (c) purging the precursor gas from the process chamber using an inert gas; (d) exposing the substrate to a silicon containing gas; (e) purging the silicon containing gas from the process chamber using an inert gas; (f) repeating (b)-(e) to selectively deposit a metal silicide along the bottom surface to a predetermined thickness; and (g) annealing the substrate after depositing the metal silicide layer.
US10199228B2	Manufacturing method of metal gate structure A manufacturing method of a metal gate structure includes the following steps. First, a substrate covered by an interlayer dielectric is provided. A gate trench is formed in the interlayer dielectric, wherein a gate dielectric layer is formed in the gate trench. A silicon-containing work function layer is formed on the gate dielectric layer in the gate trench. The silicon-containing work function layer includes a vertical portion and a horizontal portion. Finally, the gate trench is filled up with a conductive metal layer.
US10199227B2	Method for fabricating a metal high-k gate stack for a buried recessed access device A method for fabricated a buried recessed access device comprising etching a plurality of gate trenches in a substrate, implanting and activating a source/drain region in the substrate, depositing a dummy gate in each of the plurality of gate trenches, filling the plurality of gate trenches with an oxide layer, removing each dummy gate and depositing a high-K dielectric in the plurality of gate trenches, depositing a metal gate on the high-K dielectric in each of the plurality of gate trenches, depositing a second oxide layer on the metal gate and forming a contact on the source/drain.
US10199224B2	Method for improving CD micro-loading in photomask plasma etching Embodiments of the present invention provides methods to etching a mask layer, e.g., an absorber layer, disposed in a film stack for manufacturing a photomask in EUV applications and phase shift and binary photomask applications. In one embodiment, a method of etching an absorber layer disposed on a photomask includes transferring a film stack into an etching chamber, the film stack having a chromium containing layer partially exposed through a patterned photoresist layer, providing an etching gas mixture including Cl2, O2 and at least one hydrocarbon gas in to a processing chamber, wherein the Cl2 and O2 is supplied at a Cl2:O2 ratio greater than about 9, supplying a RF source power to form a plasma from the etching gas mixture, and etching the chromium containing layer through the patterned photoresist layer in the presence of the plasma.
US10199219B2	Method of manufacturing semiconductor device, substrate processing apparatus, and recording medium There is provided a method of manufacturing a semiconductor device, which includes: forming a first seed layer containing silicon and germanium on a substrate by performing, a predetermined number of times, a cycle which includes supplying a first process gas containing silicon or germanium and containing a halogen element to the substrate, supplying a second process gas containing silicon and not containing a halogen element to the substrate, and supplying a third process gas containing germanium and not containing a halogen element to the substrate; and forming a germanium-containing film on the first seed layer by supplying a fourth process gas containing germanium and not containing a halogen element to the substrate.
US10199218B2	Method for manufacturing group III-V nitride semiconductor epitaxial wafer A Ga source gas and a nitrogen source gas are supplied to form a GaN channel layer on a semiconductor substrate. Next, a temperature is lowered while supplying at least the nitrogen source gas. Next, the Ga source gas is not supplied and an Al source gas and the nitrogen source gas are supplied. Next, the temperature is raised while not supplying the Al source gas and the Ga source gas and supplying the nitrogen source gas. Next, the Al source gas and the nitrogen source gas are supplied and at least one of the Ga source gas and an In source gas is supplied to form a AlxGayInzN barrier layer (x+y+z=1, x>0, y≥0, z≥0, y+z>0).
US10199217B2	Methods of forming reverse side engineered III-nitride devices Group III-nitride devices are described that include a stack of III-nitride layers, passivation layers, and conductive contacts. The stack includes a channel layer with a 2DEG channel, a barrier layer and a spacer layer. One passivation layer directly contacts a surface of the spacer layer on a side opposite to the channel layer and is an electrical insulator. The stack of III-nitride layers and the first passivation layer form a structure with a reverse side proximate to the first passivation layer and an obverse side proximate to the barrier layer. Another passivation layer is on the obverse side of the structure. Defected nucleation and stress management layers that form a buffer layer during the formation process can be partially or entirely removed.
US10199211B2	Atomic layer deposition of silicon carbon nitride based materials A process for depositing a silicon carbon nitride film on a substrate can include a plurality of complete deposition cycles, each complete deposition cycle having a SiN sub-cycle and a SiCN sub-cycle. The SiN sub-cycle can include alternately and sequentially contacting the substrate with a silicon precursor and a SiN sub-cycle nitrogen precursor. The SiCN sub-cycle can include alternately and sequentially contacting the substrate with carbon-containing precursor and a SiCN sub-cycle nitrogen precursor. The SiN sub-cycle and the SiCN sub-cycle can include atomic layer deposition (ALD). The process for depositing the silicon carbon nitride film can include a plasma treatment. The plasma treatment can follow a completed plurality of complete deposition cycles.
US10199207B1	Determining isotope ratios using mass spectrometry The present inventive concepts relate to determining an isotope ratio using mass spectrometry. Mass spectra of ions are obtained by generating ions, guiding the ions through a device having a mass transfer function that varies with ion current, providing at least some of the ions to a mass analyzer and obtaining a mass spectrum of the ions and determining the ion current of the ions provided to the mass analyzer. An isotope ratio of the ions is determined for each mass spectrum. Using the determined isotope ratio and determined ion current for each mass spectrum, a calibration relationship is determined that characterizes the variation of the determined isotope ratios and the measured ion currents across the mass spectra. Then, a measured isotope ratio obtained at a determined ion current is adjusted using the calibration relationship to adjust the measured isotope ratio to an adjusted isotope ratio corresponding to a selected ion current.
US10199204B2	Target retaining apparatus Embodiments of target retaining apparatus and substrate processing chambers incorporating same are provided herein. In some embodiments, a target retaining apparatus includes a housing including a first slot and a second slot; a cam movably disposed in the housing, wherein movement of the cam is constrained along the first slot; a retaining arm movably coupled to the cam, wherein movement of the retaining arm is constrained along the second slot; a linking member including a first end rotatably coupled to the cam and a second end rotatably coupled to the retaining arm; and a biasing element biasing the cam towards a first position in which the retaining arm extends away from the housing.
US10199199B2	Drawing data creation method and charged particle beam drawing apparatus In one embodiment, a drawing data creation method includes inputting correction-map-including drawing data having a correction map to a converter, the correction map including dose amount information for each mesh area obtained by dividing a drawing area on a target drawn by a charged particle beam drawing apparatus, the drawing area being divided in a mesh shape, converting dose amount information in a second mesh area adjacent to a first mesh area to a representation based on dose amount information in the first mesh area to compress data of the dose amount information in the second mesh area, and outputting compressed-correction-map-including drawing data having a compressed correction map to a controller, the compressed correction map including dose amount information in which data in each of the plurality of mesh areas has been compressed.
US10199197B2	Photocathode including silicon substrate with boron layer A photocathode is formed on a monocrystalline silicon substrate having opposing illuminated (top) and output (bottom) surfaces. To prevent oxidation of the silicon, a thin (e.g., 1-5 nm) boron layer is disposed directly on the output surface using a process that minimizes oxidation and defects. An optional second boron layer is formed on the illuminated (top) surface, and an optional anti-reflective material layer is formed on the second boron layer to enhance entry of photons into the silicon substrate. An optional external potential is generated between the opposing illuminated (top) and output (bottom) surfaces. The photocathode forms part of novel electron-bombarded charge-coupled device (EBCCD) sensors and inspection systems.
US10199196B2	Two-level latch mechanism for operation mechanism of circuit breaker A two-level latch mechanism for an operation mechanism of a circuit breaker is provided. The operation mechanism includes: a tripping component, a left side plate, a right side plate, a latch, a half shaft, a lever, and a main shaft. The tripping component, the latch and the lever are mounted between the left side plate and the right side plate. The half shaft and the main shaft penetrate through the left side plate and the right side plate, and extend out of the left side plate and the right side plate. The tripping component, the latch, the half shaft, the lever, and the main shaft move in linkage. The tripping component includes a tripping buckle and a latch surface is disposed on a second end of the tripping buckle. The tripping component, the latch component and the half shaft component form a two-level latch.
US10199193B2	Electromagnetic relay An electromagnetic relay includes an electromagnet device, an armature and a fixed terminal. By coil current through a coil, the electromagnet device generates first magnetic flux that forces the armature and the electromagnet device together or apart in a first end in a first direction of the armature. The armature is connected with a movable contact at a second end of the first direction and forces the movable contact and a fixed contact together or apart according to coil current. The fixed terminal is electrically connected with the fixed contact, and provided around the armature so as to cross the armature as seen from a second direction perpendicular to the first direction with the armature closing the fixed and movable contacts. Electric current through the fixed terminal generates a second magnetic flux in the armature, a direction of which is opposite to that of the first magnetic flux.
US10199192B2	Bi-stable electrical solenoid switch An improved bi-stable electrical solenoid switch comprising a solenoid being wound with coil windings. The solenoid having a central aperture defined therein, and the coil windings, which when engaged by a power source, generates a magnetic field. A magnetic coupling member mounted on the solenoid. A plunger partially disposed in the central aperture for movement into and out of the central aperture. A conductive plate coupled to the plunger and provided with contacts on each end of the conductive plate. The conductive plate configured to electrically engage and disengage the solenoid upon respective application of power to the solenoid. The magnetic coupling member configured to reduce the force needed by the solenoid to remain in an open position when selectively energized for moving and retaining the conductive plate of the plunger against the solenoid for allowing wide operating voltage and reduced operating power.
US10199183B2	Vacuum-insulated switch enabling testing of the vacuum, switch assembly, and testing method A medium- or high-voltage switch (10), comprising a high-vacuum enclosure (111); first and second contacts (121, 122) that are mounted to be movable in translation relative to each other inside the enclosure (111) between an open position in which the first and second contacts (121, 122) are spaced apart; and a closed position in which the first and second contacts (121, 122) are in electrical contact. The switch (10) further comprises a conductor (210, 220, 230) arranged inside the enclosure (111) in such a manner that there exists a pressure threshold inside the enclosure (111) from which partial discharges are generated by said conductor, at least when the first and second contacts (121, 122) are in the closed position and the medium or high voltage is applied to the switch (10). The invention further relates to a switch assembly and to a method of testing such a switch.
US10199181B2	Holding device for receiving switching elements for a command and alert device A holding device for receiving switching elements for a command and alert device, with a first housing portion in which a recess for receiving an actuator of a command and alert device is arranged, and with a second housing portion arranged on the first housing portion and which continues the recess of the first housing portion, where guide rails for guiding transmission elements are formed in the housing portions, and where the transmission elements transmit an actuation of the actuator to a switching element.
US10199176B2	Electrolytic capacitor and method for manufacturing same An electrolytic capacitor includes an anode body, a dielectric layer formed on the anode body, and a solid electrolyte layer covering at least a portion of the dielectric layer. The solid electrolyte layer includes a first conductive polymer layer covering at least a portion of the dielectric layer, and a second conductive polymer layer covering at least a portion of the first conductive polymer layer. The second conductive polymer layer includes a second conductive polymer and a water-soluble polymer. The water-soluble polymer is a copolymer including a hydrophilic monomer unit having a hydrophilic group. The hydrophilic group is at least one group selected from the group consisting of a carboxyl group, an acid anhydride group, a phenolic hydroxyl group, and a C2-3 alkylene oxide group.
US10199172B2	Self shielding coaxial capacitor structures Methods and devices related to fabrication and utilization of multilayer capacitors presenting coaxially arranged electrode layers. The capacitors may be self-shielded against electromagnetic interference with neighboring components. The capacitors may have reduced losses from fringing effects when compared to conventional capacitors. The coaxial capacitors may be two-terminal multilayer ceramic capacitors (MLCC). The design of the capacitors may facilitate an improved relationship between the electric and magnetic fields generated by the capacitor within the dielectric in some embodiments. In some embodiments, the placement of the terminals may lead to a cancelation of mutual inductances between the electrodes. Terminations that facilitate the coupling of the capacitor to a circuit board, as well as methods for fabrication of the capacitors are also discussed.
US10199170B2	Multilayer ceramic capacitor In an embodiment, a multilayer ceramic capacitor 20 has a first external electrode 22 having a second part 22b, and a second external electrode 23 having a second part 23b, and each second part have an external shape where length L21 becomes the largest at a width-direction center portion 22b1 or 23b1 and length L22 becomes the smallest at a width-direction edge 22b3 or 23b3, with the length decreasing gradually from the width-direction center portion 22b1 or 23b1 to the width-direction edge 22b3 or 23b3.
US10199168B2	Laminated ceramic electronic component A laminated ceramic electronic component provided with a component main body formed by alternatively laminating multiple dielectric ceramic layers and multiple internal electrode layers, and external electrodes disposed on the end faces where the internal electrode layers of the component main body are exposed, wherein at least a part of the multiple internal electrode layers exposed on the end faces of the component main body are provided with end-face electrode portions that connect the adjacent internal electrode layers, the connecting portions are present between the end-face electrode portions and the dielectric ceramic layers that contact with the end-face electrode portions, and the external electrodes are disposed so that the end-face electrode portions are covered.
US10199166B2	Capacitor A capacitor includes: a substrate including a plurality of trenches and a capacitance formation portion, and a margin portion disposed around the capacitance formation portion; dielectric layers disposed on one surface of the substrate and filling the trenches; a plurality of first electrode layers each disposed on one surface of the dielectric layer and each including a first lead portion led out from the capacitance formation portion to the margin portion; and a plurality of second electrode layers each disposed on one surface of the dielectric layer to face the first electrode layer with each of the dielectric layers interposed therebetween, and each including a second lead portion led out from the capacitance formation portion to the margin portion, wherein the first and second lead portions of the plurality of first and second electrode layers are stacked in a stepped shape inclined in a direction from the margin portion to the capacitance formation portion.
US10199163B2	Ground-side coil unit A ground-side coil unit is provided with: a magnetic material plate disposed adjacent to a power transmission coil that transmits electric power to a power reception coil in a wireless manner; and a first filter coil disposed facing the power transmission coil with the magnetic material plate interposed therebetween. The first filter coil is disposed in a position where a magnetic flux generated by the first filter coil cancels out a magnetic flux generated by the power transmission coil in the magnetic material plate.
US10199162B2	Ignition coil for internal-combustion engine An ignition coil includes primary and secondary coils, a center core inserted into a center hole of the primary coil and a center hole of the secondary coil, an annular side core that forms a magnetic circuit through which a first magnetic flux A generated by the primary coil by being joined to the center core permeates, and a permanent magnet that is disposed between the center core and the side core and that emits a second magnetic flux B directed opposite to the first magnetic flux A to apply a magnetic bias. The side core includes protruded portions that protrude towards lateral sides of a T-shaped horizontal portion of the center core, and gaps are provided between the lateral sides of the T-shaped horizontal portion of the center core and the protruded portions of the side core.
US10199157B2	Stacked metal inductor An inductor has a conductor layer formed by multiple concentric co-planar turns of ultra-thick metal (UTM) adapted to receive current at a frequency of at least one gigahertz. The multiple turns of UTM proceed from an innermost turn to an outermost turn, and aluminum stacking is provided over all of the UTM turns except at least the innermost turn, thereby optimizing the Q of the inductor.
US10199154B2	Coil component and method of manufacturing the same A coil component and a method of manufacturing the coil component are provided. The coil component includes a coil part, a body, and an electrode. The coil part includes a support member, a first coil layer disposed on one surface of the support member, and a second coil layer disposed on the first coil layer. The body includes a magnetic material covering the coil part. The electrode is disposed on the body and is connected to the coil part. The first and second coil layers may each include an insulating layer having a pattern in a planar coil shape and a conductor layer disposed in the pattern and including a seed layer and a plating layer. Additionally, seed layers of the first and second coil layers may be disposed differently in the conductor layers of the first and second coil layers.
US10199153B2	PCB inter-layer conductive structure applicable to large-current PCB For producing an inter-layer conductive structure of a circuit board, an insulating layer, a first conductive layer, a second conductive layer and an electric contact material are provided, wherein the insulating layer includes at least a conductive hole therein. The electric contact material is inserted into the conductive hole of the insulating layer to form a conductive plug, and the first and second conductive layers are laminated to opposite surfaces of the insulating layer, respectively. After lamination, the conductive plug has two ends thereof in electric contact with the first conductive layer and the second conductive layer, respectively.
US10199150B2	Power transmission tower mounted series injection transformer The power transmission tower mounted series injection transformer (TMIT) injects impedance and/or voltage on a transmission tower power line. A tension bearing tower uses vertical and horizontal insulators to support and stabilize the TMIT. The TMIT can be much heavier than a transformer device clamped to the high-voltage transmission line. The TMIT is connected in series with the tension bearing tower's jumper allowing it to use a multi-turn transformer. By operating at the line voltage potential, the TMIT does not require the large bushings and oil drums used by sub-station injection transformers.
US10199148B2	Particle beam irradiation equipment In particle beam irradiation equipment, a control unit causes a storage unit to store, as position information of reference positions, position information of electromagnets that is acquired at the time of their first alignment, by cameras, and then acquires displacement amounts, based on the position information of the reference positions stored in the storage unit and from position information of the electromagnets acquired at the time of their realignment, by the cameras.
US10199147B2	Omnidirectional electromagnet An omnidirectional electromagnet (100) is disclosed. The omnidirectional electromagnet (100) comprises a ferromagnetic core (110) and three orthogonal solenoids (120, 130, 140) disposed about the core (110). Each solenoid (120, 130, 140) is adapted to receive a current from a current source to control an orientation and a magnitude of a magnetic field generated by the omnidirectional electromagnet (100). One or more omnidirectional electromagnets (100) can be used as a single magnetic manipulation system. The magnetic field generated by the omnidirectional electromagnet system can be used to control at least one of a force, a torque, an orientation, and a position of an adjacent magnetic object.
US10199142B2	Insulated wire An insulated wire that has a stranded wire conductor, and an insulator that covers an outer circumference of the stranded wire conductor. The stranded wire conductor is made up of at least a plurality of copper-based element wires twisted together, and has been heat-treated after circular compression. The copper-based element wire(s) has (have) an Ni-based plated layer on the surface. The Ni-based plated later has been compressed by the circular compression. The insulator is composed of a cross-linked ethylene-tetrafluoroethylene based copolymer, and has a heating deformation rate in the range of 65% or more, as determined under predetermined conditions using predetermined formulae in conformity with ISO6722.
US10199139B2	Insulated wire, motor coil, electric/electronic equipment and method of producing insulated wire An insulated wire containing: at least one thermosetting resin layer; and at least one thermoplastic resin layer, provided in this order on a conductor having a rectangular cross-section, a curvature radius r of corner portions at both edges of at least one short side of the conductor being 0.6 mm or less, in which thickness t1 of the corner portion of the thermosetting resin layer and thickness t2 of the corner portion of the thermoplastic resin layer satisfy a relation expressed by the following Formula 1: t2/t1<1; Formula 1: and a method of producing thereof, a motor coil, and an electric/electronic equipment.
US10199137B2	Insulated wire and coil using the same An insulated wire includes a conductor, and a polyimide insulation layer formed on an outer periphery of the conductor. The insulation layer includes a polyimide including a repeating unit represented by formula (1) and a repeating unit represented by formula (2). A first acid component in the repeating unit represented by the formula (1) and a second acid component in the repeating unit represented by the formula (2) are mixed in a molar ratio range of 85:15 to 40:60 as expressed by a molar ratio (the first acid component:the second acid component). R as a residue of a diamine component in the formulas (1) and (2) includes a residue of 4,4′-diaminodiphenyl ether and a residue of one selected from a group of diamines represented by the formulas (3) to (8). A storage elastic modulus of the polyimide at 325° C. is not less than 50 MPa.
US10199136B2	Insulating tape and production method thereof, stator coil and production method thereof, and rotating electric machine An insulating tape having a mica layer, a reinforcing layer having a filler and a fiber reinforcing material laminated on the mica layer, and a cellulose derivative layer laminated on the reinforcing layer is provided. One or more hydroxyl groups in the glucose units of the cellulose derivative are substituted with a functional group such as —CH2CH2OH or —(CH2CH2O)pH (where p is any repeating number up to 50). The weight per unit area of the mica ranges from 100 g/m2 to 200 g/m2. The filler has a maximum particle size of 100 μm or smaller and a weight per unit area ranging from 10 g/m2 to 50 g/m2. The insulating tape is useful to form a stator coil insulating layer with high thermal conductivity, with no outflow of a filler to the exterior during production of the stator coil, and with enhanced bonding strength.
US10199135B2	Stable compositions of carbon nanotubes-electrolytic polymers The invention relates to stable compositions of carbon nanotubes and of electrolytic polymers, these electrolytic polymers being characterized by the presence of phosphonyl imide or sulfonyl imide functions or alternatively phosphoric acid functions. The invention also relates to the manufacture of transparent electrodes comprising these compositions of carbon nanotubes and of electrolytic polymers.
US10199133B2	Conductive resin composition and multilayer ceramic capacitor having the same There is provided a conductive resin composition including epoxy resin, copper powder particles, and non-nitrogen-based hardeners.
US10199129B1	Method for radionuclide contaminatecontaminant mitigation The method and system disclosed provides radionuclide contamination mitigation by applying an aqueous carrier solution comprising a cation to a surface bearing a radionuclide contaminant to cause the radionuclide contaminant to enter solution forming a laden solution, then contacting the laden solution with a sequestering agent to bind to the radionuclide contaminant to form a laden sequestering agent. The removal and sequestration of the radionuclide contaminant from the contaminated surface leads directly to a reduction in the amount of radiologically-impacted critical infrastructure and the environment. The method and system are able to be performed or utilized economically with materials quickly available in the event of a radiological dispersion event.
US10199126B2	Systems and methods for developing individualized health improvement plans Embodiments of the invention include systems and methods for developing individualized health improvement plans including a system for data mining personal health data, structured health related information and unstructured medical narratives and storytelling to identify treatment plans and general techniques that individuals with chronic diseases/symptoms can use to improve their general health and well being.
US10199124B2	Methods and apparatus for generating clinical reports Techniques for documenting a clinical procedure involve transcribing audio data comprising audio of one or more clinical personnel speaking while performing the clinical procedure. Examples of applicable clinical procedures include sterile procedures such as surgical procedures, as well as non-sterile procedures such as those conventionally involving a core code reporter. The transcribed audio data may be analyzed to identify relevant information for documenting the clinical procedure, and a text report including the relevant information documenting the clinical procedure may be automatically generated.
US10199123B2	Generation and data management of a medical study using instruments in an integrated media and medical system In general, a computer-implemented method is described for receiving one or more requests to generate a medical study, retrieving from one or more data repositories one or more medical study instruments, receiving a selection of a particular medical study instrument to use in the medical study, generating by one or more computers a list of one or more research collaborators invited to review the medical study, and generating by one or more computers a list of one of more participants invited to join the medical study. Additionally, the computer-implemented method generates by one or more computer systems a data filter to format medical data from a first data format to a second data format, wherein the second data format complies with a third data format associated with one or more medical study instruments.
US10199116B2	Non-volatile memory devices, operating methods thereof and memory systems including the same Nonvolatile memory devices, operating methods thereof, and memory systems including the same. A nonvolatile memory device may include a memory cell array and a word line driver. The memory cell array may include a plurality of memory cells. The word line driver may be configured to apply word line voltages to a plurality of word lines connected to the plurality of memory cells, respectively. Magnitudes of the word line voltages may be determined according to locations of the plurality of word lines.
US10199112B1	Sense amplifier circuit for reading data in a flash memory cell Numerous embodiments for an improved sense amplifier circuit for reading data in a flash memory cell are disclosed. The embodiments each compare current or voltage measurements from a data block with a reference block to determine the value stored in the selected memory cell in the data block. The use of one or more localized boost circuits allow the embodiments to utilize lower operating voltages than prior art sense amplifier circuits, resulting in reduced power consumption.
US10199105B2	Non-volatile resistive memory configuration cell for field programmable gate array Providing for a configuration cells for junction nodes of a field programmable gate array (FPGA) is described herein. By way of example, a configuration cell can comprise non-volatile resistive switching memory to facilitate programmable storage of data as an input to a control circuit of a junction node. The control circuit can activate or deactivate a junction node of the FPGA in response to a value of the data stored in the non-volatile resistive switching memory. The control circuit can comprise an SRAM circuit for fast operation of the junction node. Moreover, the non-volatile memory of the configuration cell facilitates fast power-up of the control circuit utilizing data stored in the resistive switching memory, and minimizes power consumption associated with storing the data.
US10199100B1	Sensing circuit and memory using thereof A sensing circuit includes a first sensing terminal, a second sensing terminal, a second grounding terminal, and a second grounding terminal. The first sensing terminal is connected to a source electrode of a transistor of a memory macro through a bit line. The second sensing terminal is electrically connected to a drain electrode of the transistor of the memory marco through a resistive memory device to a source line, and is not continuously connected to the grounding voltage. The first grounding terminal is used as a reference voltage of a voltage of the first sensing terminal. The second grounding terminal is used as a reference voltage of a voltage of the second sensing terminal. The sensing circuit outputs a sensing signal according to a voltage difference between the first sensing terminal and the second sensing terminal.
US10199094B2	Write operation scheme for SRAM A circuit includes a memory cell with a bitline. A pulldown nMOSFET has a gate terminal connected to an output port of a logic gate, and a drain terminal connected to the first bitline. A write select line is connected to a second input port of the logic gate. A pullup pMOSFET has a gate terminal connected to the write select line, and a drain terminal connected to the bitline.
US10199093B1	State change detection for two-terminal memory utilizing current mirroring circuitry A detection circuit that can detect a two-terminal memory cell changing state. For example, in response to electrical stimuli, a memory cell will change state, e.g., to a defined higher resistance state or a defined lower resistance state. Other, techniques do not detect this state change until after the stimuli is completed and a subsequent sensing operation (e.g., read pulse) is performed. The detection circuit can detect the state change during application of the electrical stimuli that cause the state change and can do so by comparing the magnitudes or values of two particular current parameters.
US10199090B2	Low active power write driver with reduced-power boost circuit Techniques for implementing a storage array write driver with a reduced-power boost circuit. An apparatus may include a bit cell configured to store data, a bit line circuit coupled to convey data to the bit cell, a write driver circuit configured to transmit write data to the bit cell via the bit line circuit, and a boost circuit that is distinct from the write driver circuit. The boost circuit may be selectively coupled to drive the bit line circuit below a ground voltage dependent on activation of a boost signal and the write data being in a logic low state. The boost circuit may also be coupled to the bit line circuit at a location that is closer to the bit cell than to the write driver circuit, and may be sized to discharge the bit line circuit without being sized to discharge internal capacitance of the write driver.
US10199087B2	Signal timing alignment based on a common data strobe in memory devices configured for stacked arrangements Disclosed are various embodiments related to stacked memory devices, such as DRAMs, SRAMs, EEPROMs, ReRAMs, and CAMs. For example, stack position identifiers (SPIDs) are assigned or otherwise determined, and are used by each memory device to make a number of adjustments. In one embodiment, a self-refresh rate of a DRAM is adjusted based on the SPID of that device. In another embodiment, a latency of a DRAM or SRAM is adjusted based on the SPID. In another embodiment, internal regulation signals are shared with other devices via TSVs. In another embodiment, adjustments to internally regulated signals are made based on the SPID of a particular device. In another embodiment, serially connected signals can be controlled based on a chip SPID (e.g., an even or odd stack position), and whether the signal is an upstream or a downstream type of signal.
US10199084B2	Techniques to use chip select signals for a dual in-line memory module Examples may include techniques to use chip select signals for a dual in-line memory module (DIMM). In some examples, the chip select signals are used with either a first encoding scheme for clock enable (CKE) functionality or a second encoding scheme for on-die termination (ODT) functionality to enable memory devices on the DIMM to be accessed or controlled according to commands received with the chip select signals.
US10199078B2	Sense amplifier with offset compensation An amplifier circuit is disclosed having an amplifier with first and second input terminals. The amplifier circuit includes a first compensation capacitor coupled to the first input terminal and having a first capacitance, a second compensation capacitor coupled to the second input terminal and having a second capacitance, a first transistor coupled between the first compensation capacitor and a reference voltage and having a gate terminal that receives a first control signal, and a second transistor coupled between the second compensation capacitor and the reference voltage and having a gate terminal for receiving a second control signal. The amplifier circuit includes a programmable latch circuit arranged to provide the first and second control signals, wherein the first and second transistors are of the same conductivity type, and the first control signal and the second control signal are complementary signals with respect to each other.
US10199076B2	Cavity sealing apparatus Certain exemplary aspects of the present disclosure are directed towards a manufacturing apparatus including a first chamber having a first cavity, and a first actuator. The first actuator aligns the opening of the first chamber to an opening in a second chamber having a second cavity, sealing the first cavity to the second cavity. The manufacturing apparatus further includes gas flow componentry that in conjunction with the first actuator and first chamber evacuate the second cavity by drawing a vacuum in the first cavity. After the second cavity is evacuated, the gas flow componentry fills the second cavity filled with a gas by introducing the gas to the first cavity. A second actuator seals the gas in the second cavity by applying a seal that covers the opening in the second chamber while the first and second cavity remains sealed to one another via the first actuator.
US10199075B2	Method and playback device for controlling working state of mobile terminal, and storage medium A method and playback device for controlling a working state of a mobile terminal, and a storage medium are provided. The mobile terminal is communicated with a playback device, and the playback device includes a sensor, a detector and a transmitter. The method includes: determining, by the sensor, that a current state of the playback device is in an inactive state; detecting, by the detector, whether the mobile terminal is in a working state; and sending, by the transmitter, to the mobile terminal an instruction for instructing the mobile terminal to shift into a standby state when the mobile terminal is in the working state.
US10199074B2	Techniques for selecting frames for decode in media player Techniques are disclosed for selecting frames for decode and display during different playback modes of a media player. Prediction dependencies may be estimated among frames from a sample table of a media item identifying dependency state among frames in the media item. Based on a playback rate of a media player, a collection of frames may be identified from the media item that have presentation times within a display refresh time of the player. A frame may be selected for decode and display during the display refresh time based on the estimated prediction dependencies. The selected frame may be decoded for display during the player display refresh time.
US10199073B2	Content reproduction method and apparatus The content reproduction method includes receiving a select signal for selecting one or more pieces of content; and reproducing the selected pieces of content and one or more pieces of content which were generated or reproduced together with the selected pieces of content in a temporal space within a range.
US10199071B1	Computing system with DVE template selection and video content item generation feature In one aspect, an example method includes (i) receiving a first group of video content items; (ii) identifying from among the first group of video content items, a second group of video content items having a threshold extent of similarity with each other; (iii) determining a quality score for each video content item of the second group; (iv) identifying from among the second group of video content items, a third group of video content items each having a quality score that exceeds a quality score threshold; and (v) based on the identifying of the third group, transmitting at least a portion of at least one video content item of the identified third group to a digital video-effect (DVE) system, wherein the system is configured for using the at least the portion of the at least one video content item of the identified third group to generate a video content item.
US10199068B2	High resolution tape directory (HRTD) stored at end of data in an index partition In one embodiment, a method includes writing a file into a data partition of a tape medium. The method also includes storing a high resolution tape directory (HRTD) having location information of data in the data partition as part of end of data (EOD) of the index partition. The storing the HRTD as part of the EOD of the index partition includes requesting movement of the tape medium to the index partition in order to update an index file after changes have occurred to data in the data partition, and writing an updated index file into the index partition concurrent to writing an updated HRTD into the EOD of the index partition.
US10199066B1	Write management of physically coupled storage areas A method for managing data bands within an interlaced magnetic recording (IMR) architecture includes transmitting read/write characteristics of a logical block address space, the read/write characteristics including coupling information characterizing a physical arrangement of data blocks associated with different logical zones in the logical block address space, where each of the logical zones spans a continuous range of logical block addresses mapped to a series of data blocks physically interlaced with another series of data blocks corresponding to another one of the logical zones. The method further provides for executing a write command instructing a data write to a target logical zone of the logical zones, the write command being generated based on the transmitted coupling information.
US10199065B2	Fluid bearing apparatus, motor, and disk drive apparatus A fluid bearing apparatus according to a preferred embodiment of the present invention includes a shaft arranged to extend along a central axis extending in a vertical direction; a rotating portion arranged opposite to an outer circumferential surface of the shaft, and arranged to be capable of rotating about the central axis with respect to the shaft; a lubricating oil arranged in a gap between the rotating portion and each of upper and lower outer circumferential surfaces of the shaft; a first groove defined in at least one of a middle outer circumferential surface of the shaft and a portion of an inner circumferential surface of the rotating portion, the portion being opposite to the middle outer circumferential surface, the first groove being arranged to extend along a circumferential direction; a plurality of second grooves each of which is defined in an upper surface of the rotating portion; and a plurality of communicating holes each of which is defined in the rotating portion, and is in communication with the first groove and a corresponding one of the second grooves.
US10199064B2	Magnetic recording medium, and magnetic recording and reproducing apparatus A magnetic recording medium which is capable of effectively preventing a surface thereof from being contaminated, and is capable of preventing a contaminant thereon from adhering (being transferred) to a magnetic head, and a magnetic recording and reproducing apparatus including the magnetic recording medium are provided,A carbon protective layer of the magnetic recording medium is nitrided, and as a lubricant a compound A expressed by the following General Formula (1) and a compound B expressed by the following General Formula (2) are mixed and used. R1—C6H4OCH2CH(OH)CH2OCH2—R2—CH2OCH2CH(OH)CH2OH (1) CH2(OH)CH(OH)CH2OCH2CF2CF2(OCF2CF2CF2)mOCF2CF2CH2OCH2CH(OH)CH2OH (2)
US10199062B2	Balanced delay and resolution for high density servo systems A tape drive-implemented method, according to one embodiment, includes: determining a length of a window of a servo pattern to use for calculating a lateral position estimate, and determining a number of the windows of the servo pattern to use for calculating a lateral position value. A lateral position estimate is calculated for each of the number of the windows of the servo pattern using signals which correspond to each of the number of the windows. Moreover, the lateral position value is calculated by using the lateral position estimates. The lateral position value is used to control a tape head actuator. Other systems, methods, and computer program products are described in additional embodiments.
US10199060B2	Magnetic recording head having longitudinally spaced offset arrays An apparatus according to one embodiment includes a head having at least two modules, each of the modules having an array of transducers and at least one servo transducer. An axis of each array is defined between opposite ends thereof. The axes of the arrays are oriented about parallel to each other. The axes of the arrays are spaced from one another in an intended direction of tape travel thereacross. The array of a first of the modules is offset from the array of a second of the modules in a first direction parallel to the axis of the array of the second module. All of the transducers of the first module are positioned on a first side of an imaginary line oriented in the intended direction of tape travel, wherein all of the transducers of the second module are positioned on a second side of the imaginary line.
US10199057B1	Independent shunting of data and servo heads to allow a single sensor deposition on tape wafers Embodiments of the present disclosure generally relate to tape heads used for magnetic recording on tapes, and more specifically to tape heads including servo and data head structures. In one embodiment, a tape head includes two servo head structures and a plurality of data head structures. Each servo head structure includes a sensor, and each sensor is electrically coupled to two bonding pads. Each data head structure includes a sensor, and each sensor is electrically coupled to two bonding pads. A resistive shunt is disposed between the two bonding pads electrically coupled to the sensor of each data head structure. The resistive shunt decreases the electrical resistance of the sensor of the data head structure to a target resistance that is similar to the resistance of the sensor of the servo head structure.
US10199055B1	Magnetic disk device and read processing method According to one embodiment, a magnetic disk device including a disk, a head that writes data in the disk, and reads data from the disk, and a controller that generates second data of when first data is written in the disk based on the first data read from the disk, generates third data indicating change in an amplitude of the first data due to thermal fluctuation based on the second data, and adjusts the first data based on the third data.
US10199050B2	Signal codec device and method in communication system The present invention relates to a codec device and method for encoding/decoding voice and audio signals in a communication system, wherein: a fixed codebook excited signal is generated by using a pulse index for a voice signal; a first adaptive codebook excited signal is generated by using a pitch index for the voice signal; a fixed codebook signal is generated by multiplying the fixed codebook excited signal by a fixed codebook gain; a first adaptive codebook signal is generated by multiplying the first adaptive codebook excited signal by a first adaptive codebook gain; and a synthesized filter excited signal is generated by adding the fixed codebook signal and the first adaptive codebook signal.
US10199046B2	Encoder, decoder, coding method, decoding method, coding program, decoding program and recording medium An encoder includes a periodic-combined-envelope generating part and a variable-length coding part. The periodic-combined-envelope generating part generates a periodic combined envelope sequence which is a frequency-domain sequence based on a spectral envelope sequence which is a frequency-domain sequence corresponding to a linear predictive coefficient code obtained from an input audio signal and on a frequency-domain period. The variable-length coding part encodes a frequency-domain sequence derived from the input audio signal. A decoder includes a periodic-combined-envelope generating part and a variable-length decoding part. The periodic-combined-envelope generating part generates a periodic combined envelope sequence which is a frequency-domain sequence based on a spectral envelope sequence which is a frequency-domain sequence corresponding to a linear predictive coefficient code and on a frequency-domain period. The variable-length decoding part decodes a variable-length code to obtain a frequency-domain sequence.
US10199040B2	Method and apparatus for automatic speech recognition A method of automatic speech recognition, the method comprising the steps of receiving a speech signal, dividing the speech signal into time windows, for each time window, determining acoustic parameters of the speech signal within that window, and identifying speech features from the acoustic parameters, such that a sequence of speech features are generated for the speech signal, separating the sequence of speech features into a sequence of phonological segments, and comparing the sequential phonological segments to a stored lexicon to identify one or more words in the speech signal.
US10199034B2	System and method for unified normalization in text-to-speech and automatic speech recognition A system, method and computer-readable storage devices are for using a single set of normalization protocols and a single language lexica (or dictionary) for both TTS and ASR. The system receives input (which is either text to be converted to speech or ASR training text), then normalizes the input. The system produces, using the normalized input and a dictionary configured for both automatic speech recognition and text-to-speech processing, output which is either phonemes corresponding to the input or text corresponding to the input for training the ASR system. When the output is phonemes corresponding to the input, the system generates speech by performing prosody generation and unit selection synthesis using the phonemes. When the output is text corresponding to the input, the system trains both an acoustic model and a language model for use in future speech recognition.
US10199032B2	Adaptive reverberation cancellation system A signal processor for determining a plurality of drive signals for driving a plurality of loudspeakers to cancel a reverberation effect in a listening area, wherein the signal processor is configured to determine from one or more measured audio signals a plurality of measured physical coefficients in a basis of physical sound functions, such that a sum of the physical sound functions, weighted with the plurality of measured physical coefficients approximates the one or more measured audio signals, wherein at least half of the plurality of measured physical coefficients are zero, determine a residual error between the plurality of measured physical coefficients and a plurality of desired physical coefficients, estimate a transfer function describing a transformation from the plurality of desired physical coefficients to the plurality of measured physical coefficients, based on the determined residual error, and update the plurality of drive signals based on the estimated transfer function.
US10199029B2	Speech enhancement for headsets with in-ear microphones An earpiece of a headset uses a first signal and a second signal received from an in-ear microphone and an outside microphone, respectively, to enhance microphone signals. The in-ear microphone is positioned at a proximal side of the earpiece with respect to an ear canal of a user, and the outside microphone is positioned at a distal side of the earpiece with respect to the ear canal. A processing unit includes a filter, which digitally filters out in-ear noise from the first signal using the second signal as a reference to produce a de-noised signal to thereby enhance the microphone signals.
US10199026B1	Real-time jamming assistance for groups of musicians Real-time jamming is automatically assisted for musicians. A real-time audio signal is received of played music that is played by at least one person. Beat is tracked of the played music from the real-time audio signal and accordingly a time of a next beat is predicted. At least one of chords; notes; and drum sounds is recognized from the real-time audio signal and repetitions in the played music are accordingly detected. A next development is predicted in the played music, based on the detected repetitions, including at least one of chords; notes; and drum sounds that will be played next, and respective timing based on the predicted time of the next beat. A real-time output is produced based on the predicted next development in the played music.
US10199025B2	Image capturing device and electronic keyboard using the image capturing device An electronic keyboard using a camera, and more particularly, to an electronic keyboard using a camera, which includes a retroreflective film, a light source for irradiating light on to the retroreflective film, a camera for capturing light of a light source retroreflected from the retroreflective film, and an image processing means that analyzes the captured image to track the position of the reflected light source, to find a depressed state of the keyboard, and to generate a sound of an instrument corresponding to the depressed state.
US10199022B1	Touchless signal modifier and method of use A signal processing system, machine, and method of use to dynamically vary the power supplied to a signal processing circuit, imparting the processed output signal of the signal processing circuit with alterations substantially beyond the alterations typically produced by the signal processing circuit.
US10199019B2	Acoustic drum shell including inserts A metal shell and metal inserts of an acoustic drum. In some examples, an acoustic drum having a metal shell can include one or more metal inserts configured to control the tone of the drum. In some configurations, the one or more inserts can form a portion of a bearing edge at one or more openings of the shell. Moreover, in some examples the inserts can be fitted to be in contact with the shell. The shape and configuration of the metal inserts can therefore control and refine the tone of the drum, allowing, for example, a drum with a metal shell to have a tone resembling that of a wooden drum with the sensitivity and power of a metal drum.
US10199016B2	Elements to improve the sound quality of stringed musical instruments The present invention concerns modifications intended to improve the sound quality of stringed musical-instruments through modification of stiffness/flexibility, vibration/resonance-transmitting properties and weight-reduction of the fingerboard, neck, tailpiece, the upper- and lower block, sound post or sound pegs, bass bar or sound bars, and the upper and lower saddle rod using combined lightweight materials and specific construction principles.
US10199013B2	Digital image comparison A method for digital image comparison includes, by a computer executing a single instance of an application program stored in a memory of the computer, receiving a first input from a user of the computer, identifying related portions of a first digital image and a second digital image. The method also includes receiving user interactions to view portions of the first digital image. The method also includes, responsive to the user interactions, changing a view of portions of the second digital image that are related to the first digital image.
US10199012B2	Adjustment of display parameters Parameters of a display may be adjusted in response to accessing a time value corresponding to an electronic device that includes the display. A brightness value of the display may be adjusted based on the time value to maintain a display characteristic value within a predefined range and below a threshold. The display characteristic value may be independently controllable by one of the brightness or the color temperature of the display. A set of red green blue (RGB) color values of the display may be adjusted independent of the adjustment to the brightness value to maintain the display characteristic value within the predefined range and below the threshold while maintaining the brightness value of the display. In some examples, the RGB color values of the display may be adjusted at approximately the same time as the adjustment of the set of RGB color values of the display is performed.
US10199009B2	Display adjusting system and display adjusting method A display adjusting system and a display adjusting method thereof are provided. These technical solutions relate to the field of display technology, may reduce power consumption of a portable electronic device, and may improve endurance ability of the portable electronic device. The display adjusting system comprises: a distance measuring module configured to measure a viewing distance, the viewing distance being a vertical distance from a viewing point to a display screen; and a resolution adjusting unit connected with the distance measuring module, the resolution adjusting unit being configured to set a matching resolution based on the measured viewing distance and a resolution power of a human's eye under the measured viewing distance and to adjust a resolution of the display screen to the matching resolution. The display adjusting system may be used to adjust a resolution of a display screen.
US10199003B2	Gate driving unit and driving method thereof, gate driving circuit and display device The present disclosure relates to a gate driving unit and a driving method thereof, a gate driving circuit and a display device. The gate driving unit used for providing a gate driving signal for a gate line comprises a driving signal output unit and an output compensation unit. The driving signal output unit and the output compensation unit are respectively connected to two input terminals of a load. The output compensation unit is configured to compensate for level jumping of a gate driving signal outputted from the driving signal output unit.
US10198999B2	Organic light emitting display device and method of compensating for image quality of organic light emitting display device Disclosed is an organic light emitting display device. In a sensing mode of sensing a threshold voltage of a driving transistor, when ripple occurs in a driving voltage applied to a drain of the driving transistor, an error may occur in the sensed threshold voltage. Therefore, when sensing a threshold voltage of a driving transistor, the display device corrects a threshold voltage of a driving transistor of each pixel included in a horizontal line having an error caused by a ripple of a driving voltage, to a threshold voltage of each pixel included in another horizontal line.
US10198994B2	Organic light emitting diode display device and driving method thereof An organic light emitting diode (OLED) display device includes a display panel including a pixel that includes a driving transistor and a light emitting diode; a timing control circuit including a compensation value calculation portion that calculates a compensation value (β) of the light emitting diode using a first correlation equation having a threshold voltage change quantity (ΔVth) of the driving transistor as a variable, and a data compensation portion that applies the calculated compensation value to an input image data to produce a compensation data; and a data driver receiving the compensation data and supplying the compensation data to the pixel, wherein the first correlation equation is β=a*ΔVth+b, where a is a first gradient constant, and b is a first intersect constant.
US10198991B2	Compression techniques for burn-in statistics of organic light emitting diode (OLED) displays Disclosed herein are techniques for pre-processing image data for compression, e.g., image data that represents burn-in statistics for a display device. The techniques can involve receiving the image data, where the image data comprises a plurality of pixels, and each pixel of the plurality of pixels comprises at least two sub-pixel values. Next, each pixel of the plurality of pixels is quantized to produce a plurality of modified pixels. Subsequently, a series of operations are performed against each modified pixel of the plurality of modified pixels, including (1) applying an invertible transformation against the modified pixel, (2) applying a predictive coding against the modified pixel, and (3) applying an encoding of the modified pixel into a buffer as a data stream. The buffer is then compressed (as the modified pixels are serially encoded into the buffer) to produce compressed outputs that are joined together to produce a compressed image.
US10198988B2	Dynamic merchandising communication system Provided herein are display systems and units, including those configured for dynamic communication in a physical location, such as in retail settings. Also included herein are methods for dynamically displaying product information in a physical location, such as a retail setting.
US10198985B2	Liquid crystal drive apparatus, image display apparatus and storage medium storing liquid crystal drive program The liquid crystal drive apparatus controls application of a first or second voltage to each pixel of a liquid crystal element in respective multiple sub-frame periods included in one frame period to cause that pixel to form a tone. The sub-frame period where the first voltage is applied to the pixel is referred to as an ON period, and the sub-frame period where the second voltage is applied to the pixel is referred to as an OFF period. The apparatus provide, when causing the pixel to form the tone using the ON period, multiple ON period sets separately from each other in the one frame period. Each ON period set includes one or more ON periods. The apparatus sets a temporal interval between temporal centers of the respective ON period sets to 60% or less of the one frame period or to 5.0 ms or less.
US10198984B2	Display panel calibration using detector array measurement A system calibrates luminance of an electronic display panel. The system includes a luminance detection device, an actuator and a computing device. The luminance detection device comprises a plurality of detectors arranged along a width or length of the electronic display panel to simultaneously measure luminance parameters of at least one row or column of areas in the electronic display panel. Each of the plurality of detectors covers an area in the at least one row or column of the electronic display panel. The actuator is configured to cause a relative translational movement in a length direction or a width direction of the electronic display panel. The computing device is coupled to the luminance detection device to receive the measured luminance parameters, and the computing device is configured to generate calibration data for adjusting brightness of areas of the electronic display panel by processing the measured luminance parameters.
US10198978B2	Viewing optics test subsystem for head mounted displays An optical evaluation workstation evaluates quality metrics (e.g., optical contrast) of optical elements of a HMD. The workstation includes a test pattern, an optical element feed assembly, a light source, a camera and a control module. The light source backlights the test pattern with diffuse light. The optical element feed assembly receives an optical element of a HMD and places the optical element at a first distance from the test pattern corresponding to a distance between the optics block in the HMD and an exit pupil of the HMD. The camera images the test pattern through the optical element and the camera is positioned at a second distance from the test pattern corresponding to a distance between the exit pupil and an electronic display in the HMD. The control module generates a test report for presentation to a user based on the evaluation of the optical element.
US10198977B2	Display panel A display panel is disclosed. In one aspect, the display panel includes a display unit including a plurality of pixels, an inspection circuit configured to apply a first inspection voltage to the display unit based on a first control signal, a pad portion electrically connected to the inspection circuit and configured to supply the first inspection voltage and the first control signal to the inspection circuit, and at least one external inspection line electrically connected between the inspection circuit and the pad portion. The external inspection line includes a plurality of transistors.
US10198973B2	Numerical configuration apparatus A Numerical Configuration Apparatus comprises a frame structure means and a numeric display means. The frame structure means may be comprised mainly of a base frame member and a display securing member. Use display securing member is coupled to the base frame member so that it may be moved towards and away from the base frame member in a controlled manner. Use numeric display means has multiple component members which are pivotally mounted to the frame structure means, and secured in place by the display securing member. Each component has at least two sides, with one side having a different feature, such as color, to distinguish between the two sides. Preferably, the non-distinguishing side should have the same feature, such as color, of the display securing member. Some of the component members are mounted in a generally horizontal position upon the frame structure means, while others are mounted in a generally vertical position.
US10198966B2	Advanced first entry model for surgical simulation The present invention provides a surgical training device for training laparoscopic first entry surgical techniques. The training device includes a simulated abdominal wall that is penetrable with an optical trocar. A receptacle containing a tissue simulation is located inside the receptacle. The tissue simulation is observable via scope placed inside the optical trocar. Upon penetration of the one or more of the simulated abdominal wall and receptacle, the tissue simulation appears to translate distally relative to the simulated abdominal wall. The distal translation is effected by a variety of ways including the release of negative pressure inside the receptacle upon penetration and the expansion of an elastic wall of the receptacle with the introduction of fluid under pressure into the receptacle.
US10198963B2	Secure computerized system, method and computer program product for children and/or pre-literate/illiterate users A secured computerized social networking system for pupils including a mail server operative to interface with a secured parent environment; and a secured pupil environment, the system comprising a computerized environment secured to prevent access thereto, other than by end-users who have passed a what-you-know authentication test; a what-you-know testing functionality; and a graphic what-you-know test-configuring functionality, the system being operative to perform a plurality of selectable system-actions responsive to user input, the system being accessible to non-literate users via a touch screen defining a plurality of touch screen locations respectively corresponding to the plurality of selectable system-actions, the touch screen being operative to detect and distinguish between first and second gestures, the system comprising: a processor-controlled touch-triggered actor; and a processor-controlled touch-triggered oral presenter.
US10198962B2	Learning management system for a real-time simulated virtual reality welding training environment A learning management system (LMS) for tracking student progress as students learn how to weld in a real-time, simulated, virtual reality welding training environment. Systems and methods to help welding instructors and students manage the data associated with instruction and learning in a virtual reality welding environment are provided. Welding student training data generated by students while using virtual reality welding systems is stored in a centralized database. The centralized database is accessible by a user (e.g., a welding instructor) using a personal computer having a learning management software application (LMSA) installed thereon. The LMSA is configured to allow the user to access at least a portion of the student training data for one or more of viewing, analysis, grading, and reporting.
US10198961B2	Bayesian regression techniques for determining true measurements Techniques for estimating a true measurement from a Bayesian regression on an observed measurement of received responses.
US10198959B2	Apparatus for use in a lecture environment A system for use in a lecture environment in which a lecturer delivers a lecture to students. The lecturer can broadcast questions to the students to test their understanding of the subject matter of the lecture, and the students' answers to those question are made available to the lecturer in real time. This makes it possible for the lecturer to adapt the lecture to the students' level of understanding of the subject matter of the lecture.
US10198958B2	Method and apparatus for training a team by employing brainwave monitoring and synchronized attention levels of team trainees Training methods and apparatus wherein a training environment is activated only when a trainee is in a focused attention state. A brainwave monitor is employed for determining level of attention. The training environment is activated when the level of attention of the trainee is at or above a predetermined attention threshold. Activation of the training environment provides feedback to the trainee that he or she is in a focused attention state, and at the same time provides the incentive to remain in the focused attention state. A focused attention state is important if not required for training/learning success. The method and apparatus may be employed for training individual trainees, as well as for training team member trainees.
US10198956B2	Unmanned aerial vehicle collision avoidance system An automatic system to detect and avoid collisions between piloted aircraft operating at low altitudes and unmanned aerial vehicles (UAV). UAV's are typically remote controlled helicopters, quad-copters, airplanes and other airborne vehicles (e.g., Drones). Aircraft operating at low altitudes are subject to interference (accidental or purposefully) by those on the ground operating said UAV's, which is likely to cause great injury or death to the aircraft and its occupants.
US10198955B1	Drone marker and landing zone verification Techniques for verifying a location and identification of a landing marker to aid an unmanned aerial vehicle (UAV) to deliver a payload to a location may be provided. For example, upon receiving an indication that a UAV has arrived to a delivery location, a server computer may process one or more images of an area that are provided by the UAV and/or a user interacting with a user device. A landing marker may be identified in the image and a representation of the landing marker along with instructions to guide the UAV to deliver the payload to the landing marker may be transmitted to the UAV and implemented by the UAV.
US10198951B2	Models of the surroundings for vehicles A method for providing a model of surroundings for a vehicle includes providing a model of the surroundings based on sensor measurements by sensors of the vehicle, wherein the model of the surroundings provides information relating to an occupation of the surroundings by one or more objects, including information regarding a type of object in the surroundings of the vehicle. The method includes determining a region of the surroundings for which no information relating to occupation by objects is provided by the model of the surroundings, wherein the region is within a distance limit for which the sensors can provide sensor measurements relating to the occupation by objects, and checking whether a phantom object is to be added to the model of the surroundings in the region based on the type of object and predefined regulations, wherein the phantom object is an object which was not determined on the basis of sensor measurements. In the event the phantom object is determined to be added, the method further includes determining the occupation by the phantom object in the region of the surroundings, and generating an extended model of the surroundings by adding information relating to the occupation by the phantom object to the model of the surroundings, and then providing the extended model of the surroundings.
US10198950B2	Parking support method and parking support device A parking assist method for assisting parking of a subject vehicle uses a parking assist apparatus comprising a controller that guides the subject vehicle to a parking space and a display that displays the parking space. The parking assist method comprises: specifying an available parking space into which the subject vehicle can be parked; displaying the available parking space on the display; when the available parking space is in a parking-unavailable state that represents a state in which the subject vehicle cannot be parked into the available parking space, determining whether or not the parking-unavailable state is canceled; and when the parking-unavailable state is canceled before a first time passes, maintaining a display form of the available parking space on the display.
US10198949B2	Method and system for parking verification via blockchain A method for distributing parking availability data via blockchain includes: storing a blockchain comprised of a plurality of blocks, each block having a block header including a timestamp; receiving spot availability notifications including a common spot identifier and availability data; generating a transaction value including the common spot identifier and availability data; generating a new block header including i) a current timestamp, ii) a reference hash value generated via hashing of the block header included in a most recent block identified via the timestamp, and iii) a transaction hash value generated via hashing of the new transaction value; generating a new block comprised of the new block header and the new transaction value; and transmitting the generated new block.
US10198948B2	Low power sensor system A low power sensor system and protocol are provided. Particular embodiments of the invention include a sensor controlled switch that senses conditions. While the sensor controlled switch is sensing conditions and the switch that it controls is open, power is conserved. When a valid condition is sensed, the switch is closed which enables a sensor system to receive power. The powered sensor system can then perform tasks such as listen for radio transmissions from a human interface device and respond to these. In another embodiment of the invention a delayed shutdown is executed, wherein the sensor system is put in a low power state for a period of time before responding to further conditions sensed by the sensor controlled switch. An example application is in a battery powered vehicle camera system.
US10198943B2	Self-configuring traffic signal controller Embodiments describe new mechanisms for signalized intersection control. Embodiments expand inputs beyond traditional traffic control methods to include awareness of agency policies for signalized control, industry standardized calculations for traffic control parameters, geometric awareness of the roadway and/or intersection, and/or input of vehicle trajectory data relative to this intersection geometry. In certain embodiments, these new inputs facilitate a real-time, future-state trajectory modeling of the phase timing and sequencing options for signalized intersection control. Phase selection and timing can be improved or otherwise optimized based upon modeling the signal's future state impact on arriving vehicle trajectories. This improvement or optimization can be performed to reduce or minimize the cost basis of a user definable objective function.
US10198942B2	Traffic routing display system with multiple signal lookahead A traffic routing display system provides a visual display of a speed or series of speeds suggested to the driver such that the driver may pass through multiple consecutive traffic signal devices without stopping at a red light. In one aspect, the display depicts the expected state of an upcoming traffic light. In another aspect, the display is an icon colored to correspond to the expected state. In another aspect, the time remaining before the state of a traffic light changes is displayed. The effect that an indicator has on driver behavior is used to determine the type of indicator to provide to the driver. Certain indicators may not be displayed by the system depending on the effect they have on the driver.
US10198939B1	Process automation device An analog output stage of a field device employed in process automation is provided. The analog output stage regulates an analog output, for example, a loop current flowing in a two wire current loop, based on an input, for example, a process variable such as temperature, pressure, etc., detected by the field device. The analog output stage includes a regulator module and a switching module. The switching module, via a switching pulse width modulated signal, alternately applies to the regulator module, a first analog value associated with the input detected by the field device and a predefined analog output, and a second analog value associated with the analog output. The regulator module includes an integrator and a differential amplifier. The regulator module generates a differential analog output based on the first analog value and the second analog value and regulates the analog output based on the differential analog output.
US10198938B2	Wireless trainable transceiver device with integrated interface and GPS modules A trainable transceiver is provided having an integrated interface connections with various vehicle modules for use with various remote electronic devices and a method of programming and using the same. The wireless trainable transceiver is in a vehicle with an integrated interface allowing connection to a human-to-machine interface and vehicle position determination device, such a navigation system and compass and the wireless trainable transceiver has the ability to change functions associated with preset buttons on the trainable transceiver, depending upon the location of the vehicle.
US10198937B2	Systems, devices, and methods for remotely interrogated chemosensor electronics Systems, devices and methods for remotely interrogating sensor electronics are described. In one embodiment, a system for detecting and localizing chemical analytes is described. This system includes a plurality of chemosensor electronic devices for detecting the presence of chemical analytes. Each of these devices includes a chemosensor for sensing chemical analytes, a transponder, and an electronic circuit for activating the transponder based on an output of the chemosensor. These devices may have a cross-section area of less than 1 square micrometer. The system also includes an interrogation device for interrogating the plurality of devices and for receiving information on the detected chemical analytes from devices with activated transponders, and a processor for determining the locations of the devices with activated transponders. These locations may be forwarded to a third party.
US10198936B2	Control of electronic components A central control box utilizes a receiving element configured to receive an input command, a processor configured to receive a first data signal from a first component, receive state information regarding a second component, and process the received input command based on the state information regarding the second component. The central control box further utilizes a transmitter configured to transmit the first data signal, and a storage device connected to the processor. The storage device is configured to store the state information regarding the second component. Other embodiments include a system and a method for routing a first data signal between a first component and a second component.
US10198935B2	System and method for simplified activity based setup of a controlling device A controlling device having an activity mode corresponding to a controllable activity in which activation of a command key within a logical group of command keys of the controlling device causes a transmission of command data to control one or more functional operations of an intended target appliance. For a controllable activity the controlling device has a memory in which is stored a plurality of predetermined appliance to logical group of command keys mappings. To configure the controlling device for the controllable activity one or more predetermined keys of the controlling device are activated to thereby designate one or more intended target appliances for the controllable activity. When the controlling device is then placed into the activity mode corresponding to the controllable activity, the controlling device will use the configuration to select one of the plurality of predetermined appliance to logical group of command keys mappings to determine which appliance command data to transmit in response to an activation of a command key within a logical group of command keys.
US10198933B2	Dynamic determination of a geographically dispersed group for alert resolution Described herein are techniques for receiving an alert associated with an entity and dynamically determining, based on the alert and on substantially real-time attributes for the entity, a geographically dispersed group in which each member of the geographically dispersed group either is a device associated with the entity or shares at least one attribute with the entity. The techniques further include requesting information about the entity from the geographically dispersed group, receiving information from at least a subset of the group, and taking action responsive to the alert based on the received information.
US10198932B2	Wearing compliance of personal emergency response system help button In a personal emergency response system (PERS), a personal help button (PHB) (10) includes a call button (12), a motion sensor (22), and a transmitter or transceiver (24) for transmitting a wireless call signal responsive to pressing the call button. An electronic processor (28) performs a compliance monitoring process (42) at successive compliance check times, each including: acquiring motion sensor data over a compliance data acquisition time interval; determining whether the PHB has moved since the last compliance check time; and assessing compliance based at least in part on the determination of whether the PHB has moved. The determining may include determining an orientation change of the PHB since the last check time. Alternatively, compliance may be monitored by detecting and logging wake-up interrupt events that cause the motion sensor to switch from a low-power mode to an operational mode.
US10198930B2	Systems and methods for improved monitor attachment The present invention is related to monitoring movement, and in particular to systems and methods for securing a monitoring device to a monitor target.
US10198929B2	Water safety monitoring systems and related methods A system for reducing a risk of drowning in a pool includes a pool monitoring unit and a swim monitoring station. The pool monitoring unit is switchable between an activated state and a deactivated state. The pool monitoring unit is configured to detect entrance into the pool and/or movement in the pool and to output an alarm signal in response a detected entrance into the pool and/or movement in the pool when in the activated state. The swim monitoring station is configured to wirelessly communicate with one or more wearable alarm devices and the swim monitoring station is in wireless communication with the pool monitoring unit. The swim monitoring station is switchable between an off state and an on state. In the on state, the swim monitoring station is configured send a wireless signal to the pool monitoring unit to deactivate the pool monitoring unit.
US10198928B1	Fall detection system A system used to detect a fall and to provide data has a wearable device that includes a pre-filter, an accelerometer and a transmitter. The pre-filter includes buffers, a low pass filter, a flag, and a measuring device. The pre-filter receives data points transmitted by the accelerometer. The pre-filter generates a magnitude value, and calculates a jerk value in relation to the magnitude value. The pre-filter appends the jerk value to one of the buffers and provides the jerk value to the measuring device. The pre-filter further transmits the magnitude value to a neural network.

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