Document Document Title
US09941884B2 AC coupled level shifting circuit
A level shifting circuit can be used to adjust the level of the input signal to a desired output level while maintaining the duty cycle of the input signal. The level shifting circuit can include a capacitor to AC couple the input signal to an inverter that is self-biased at the threshold voltage for the inverter. The AC coupling of the input signal permits the input signal to “ride on” the threshold voltage and transition the inverter between states depending on the value of the input signal. The inverter can be biased at the threshold voltage by connecting the output of the inverter in feedback with the input of the inverter using one or more resistors.
US09941881B1 Apparatus and method for latching data including AND-NOR or OR-NAND gate and feedback paths
A latch circuit includes an AND-NOR gate, a NAND gate, and a NOR gate. The AND-NOR gate includes a first AND-input configured to receive input data and a second AND-input coupled to an output of the NAND gate. The AND-NOR gate includes a NOR-input coupled to an output of the NOR gate, and an output configured to generate output data. The NAND gate includes a first input coupled to the output of the AND-NOR gate and a second input configured to receive a clock signal. The NOR gate includes a first input coupled to the output of the AND-NOR gate and a second input configured to receive a complementary clock signal. During a first half clock cycle, the AND-NOR gate passes the data from the input to the output. During a second half clock cycle, the feedback configuration of the AND-NOR gate and the NOR gate latches the data.
US09941880B1 Secure voltage regulator
A system includes an integrated circuit (IC) chip with connections to plurality of external pins. An integrated voltage regulator circuit is configured to provide an internal supply voltage to the IC chip. Isolation circuitry is configured to inhibit tampering of the internal supply voltage through the external pins. An analog to digital converter (ADC) circuit is configured to monitor parameters of the internal supply voltage. Security circuitry is configured to detect, using the monitored parameters, indications of tampering and to generate an error signal in response to detecting an indication of tampering.
US09941878B2 Methods and apparatus for capacitively detecting key motion and finger presence on a magnetic keyboard key
Devices and methods for capacitively sensing key cap position during the initial and latter stages of a keystroke. A key assembly includes a stationary key guide magnet, a movable key cap magnet, and a transmitter/receiver electrode pair. One or both of the electrodes underlies the key cap. The capacitance change between the electrodes during a keystroke includes the capacitance change between the key cap and the electrode pair, and the change in capacitance between the key cap and the key guide. Key cap position may thus be accurately detected throughout the entire keystroke.
US09941877B2 Electrode pattern of touch panel
Provided is an electrode pattern of a touch panel, including: a plurality of conductive pattern cells which are formed to be spaced apart from each other on a substrate; and an insulating layer which is formed on the conductive pattern cells; and a plurality of metal bridge line electrodes which are formed on the insulating layer so that the conductive pattern cells are connected to each other.
US09941875B2 Testing of power on reset (POR) and unmaskable voltage monitors
A power management circuit includes both a power on reset (POR) circuit and a voltage monitoring circuit. Explicit testing of these circuits is accomplished by controlling voltages applied to the circuits and monitoring an output signal responsive to a logical combination of outputs from the POR circuit and voltage monitoring circuit. The applied voltages are controlled with respect to timing of application, fixing of voltages and varying of voltages in a manner where a certain one of the circuits for explicit test is isolated with change in logic state of the output signal being indicative of operation of that isolated circuit.
US09941873B2 Method and apparatus for balancing currents
A method and apparatus are provided for balancing currents of two or more parallel-connected power semiconductor switches during an on-state of the switches. A control terminal of each switch is driven by a driver unit. The method includes determining ratios between the currents through the switches. For each switch, the method includes controlling the voltage at the control terminal on the basis of the ratios by controlling a level of a supply voltage of the driver unit of the switch, and after a turn-on commutation transient, modulating the output of the driver unit. The duty cycle of the modulation is controlled to minimize the time required for the transition of the voltage at the control terminal from the one voltage level to another.
US09941872B2 Self resetting latch
An apparatus includes first and second input transistors receiving respective first and second input signals, and a feedback circuit coupled to the first and second input transistors. The first and second input transistors provide first and second nodes with first and second currents according to values of the first and second input signals, respectively, when the feedback circuit is turned on. The first and second input transistors produce a reset value on the nodes when the feedback circuit is turned off. A method includes resetting, using first and second input transistors, respectively, values of first and second nodes to a reset value, providing first and second currents to the nodes using the first and second input transistors according to values of first and second input signals, and determining the values of the nodes according to the values of the first and second input signals.
US09941870B2 Adjustable delay circuit for optimizing timing margin
The present invention relates to timing margin adjustment circuits using adjustable delay circuits. An example adjustable delay circuit may include a signal line, an output circuit, and a plurality of delay circuits. Each of the plurality of delay circuits may be configured to provide respective delay amounts that are different from each other, and where a first one of the plurality of delay circuits, which may be arranged most adjacently to the output circuit, being smaller in delay amount than other ones of the plurality of delay circuits. Each of the plurality of delay circuits may include an input node and an output node, and a selected one of the plurality of delay circuits connected at its input node to the signal line and at its output node to the output circuit, the rest of the plurality of delay circuits being disconnected from the signal line and the output circuit.
US09941868B1 Buffer circuit, receiver and system using the same
A buffer circuit may include an amplification circuit, a main load circuit, and a sub-load circuit. The amplification circuit and the main load circuit may generate first and second output signals by amplifying first and second input signals. The sub-load circuit may compensate mismatch between rising timing and falling timing of the first output signal based on the first input signal.
US09941865B2 Method and circuitry for generating trigger signal and associated non-transitory computer program product
A method and circuitry for generating a trigger signal based on an oscillation signal and associated non-transitory computer program product are provided. The method includes following steps. Firstly, a calibration value is obtained according to a reference frequency and a frequency of the oscillation signal, and a counting value is gradually altered from a first initial value to a breakpoint value. Secondly, the counting value is updated to a second initial value when the counting value is equal to the breakpoint value. Then, the counting value is gradually altered from the second initial value to a final value, and the trigger signal is generated when the counting value is equal to the final value.
US09941864B2 Integrated power supply for fiber optic communication devices and subsystems
An example embodiment includes a fiber optic integrated circuit (IC). The fiber optic IC includes an integrated power supply. The integrated power supply includes a filter, an active switch, and a pulse width modulator (“PWM”). The filter is configured to convert a signal to an output signal of the integrated power supply. The active switch is configured to control introduction of the signal to the filter. The PWM is configured to generate a PWM output signal that triggers the active switch.
US09941863B2 Power gating control circuit for stably controlling data restoring
Provided is a power gating control circuit for stably controlling data restoring. The power gating control circuit includes a retention circuit and a non-retention circuit. The retention circuit includes a first flip-flop, which stores or restores data of the first flip-flop in a power gating mode. The non-retention circuit includes a second flip-flop and a third flip-flop. The power gating control circuit performs initialization of data of the second flip-flop and the third flip-flop in the power gating mode, and an initialization operation of the non-retention circuit is controlled to be performed before data of the retention circuit is restored.
US09941861B2 Wireless communication apparatus
[Object] To propose a wireless communication apparatus capable of realizing separation of transmission signals and reception signals with a low power consumption and a small size.[Solution] Provided is a wireless communication apparatus including: a gyrator that includes at least four terminals; a single-phase differential converter that mutually converts single-phase signals and differential signals; a low-noise differential amplifier that amplifies reception signals that the gyrator outputs; and a differential power amplifier that amplifies transmission signals to be output to the gyrator. The gyrator transmits signals from a first terminal and a second terminal in the direction of a third terminal and a fourth terminal. Any of the single-phase differential converter, the low-noise amplifier, and the power amplifier are connected to the first terminal and second terminal, the third terminal and fourth terminal, the first terminal and third terminal, and the second terminal and fourth terminal of the gyrator.
US09941860B1 Filter circuit for noise cancellation earphones
The invention is a filter circuit for noise cancelling earphones wherein one end of the filter circuit for noise cancelling earphones is connected to the circuit for noise cancelling microphones. In the circuit starting from one end of the said noise cancelling microphones circuit connected to the resistor R0 set the first current node. The other end of the said noise cancelling microphones circuit is connected to the ground while the other end of the said resistor R0 is connected to the high level. Lead a circuit from the first current node connected to the input end of high pass circuit, the output end of the said high pass circuit is connected to the input end of gain amplifier circuit, the output end of the said gain amplifier circuit is connected to the input end of trap circuit, the output end of the said trap circuit is connected to the input end of gain feedback amplifier circuit through the resistor R7, the output end of the said gain feedback amplifier circuit is connected to the positive electrode of the speaker circuit while the negative electrode is connected to the ground.
US09941857B1 Attenuation of spurious responses in electromechanical filters
A spur cancelling, electromechanical filter includes a first resonator having a first resonant frequency and one or more first spurious responses, and it also includes, electrically connected to the first resonator, a second resonator having a second resonant frequency and one or more second spurious responses. The first and second resonant frequencies are approximately identical, but the first resonator is physically non-identical to the second resonator. The difference between the resonators makes the respective spurious responses different. This allows for filters constructed from a cascade of these resonators to exhibit reduced spurious responses.
US09941856B2 Apparatus for reconfigurable directional couplers in an RF transceiver with selectable phase shifters
Provided herein are apparatus and methods for reconfigurable directional couplers in an RF transceiver. Reconfigurable directional couplers can be reconfigured and designed to provide high directivity using configurable capacitors to effect a mutual coupling and using lumped components or delay lines to effect a phase shift. Depending on the embodiment, the reconfigurable directional coupler can include capacitors, inductors, and switching components. The coupler can be designed for multi-band operation with an adjustable coupling factor conducive to semiconductor process integration. The coupler can have variable phase shifters to achieve a desired level of directivity in the coupler.
US09941854B2 Music reproducing device
A music reproducing device has a controller configured to perform volume control on audio data; a digital-to-analog (D/A) converter operatively coupled to the controller and configured to convert the audio data from digital audio data to analog audio data, and to perform volume control on the audio data; and a plurality of different types of audio outputs, including at least one headphone output for outputting the audio data from the D/A converter to one or more headphones; the controller and the D/A converter configured to perform different types of volume control on the audio data, the controller performing all volume control except the volume control related to only the at least one headphone output among the multiple volume control, and the D/A converter performing one or more types of volume control which relate only to the at least one headphone output.
US09941849B1 Programmable optimized band switching LNA for operation in multiple narrow-band frequency ranges
An front end module (FEM) integrated circuit (IC) architecture that uses the same LNA in each of several frequency bands extending over a wide frequency range. In some embodiments, switched impedance circuits distributed throughout the FEM IC allow selection of the frequency response and impedances that are optimized for particular performance parameters targeted for a desired device characteristic. Such switched impedance circuits tune the output and input impedance match and adjust the gain of the LNA for specific operating frequencies and gain targets. In addition, adjustments to the bias of the LNA can be used to optimize performance trade-offs between the total direct current (DC) power dissipated versus radio frequency (RF) performance. By selecting appropriate impedances throughout the circuit using switched impedance circuits, the LNA can be selectively tuned to operate optimally at a selected bias for operation within selected frequency bands.
US09941848B1 Transconductance with capacitances feedback compensation amplifier
In accordance with embodiments of the present disclosure, a transconductance with capacitances feedback compensation amplifier may include a capacitor in parallel with an inner feedback loop of the amplifier for providing cascade compensation to the amplifier.
US09941847B2 Speaker driver
A speaker driver comprising an amplifier, configured to receive a test signal that comprises a plurality of equivalent test-blocks, and provide measurement-signalling for a speaker at the amplifier output. The measurement-signalling comprising a plurality of measurement-blocks, wherein each of the measurement-blocks corresponds to the output of the amplifier for one of the plurality of test-blocks. The speaker driver also includes an output-current-sensor configured to: measure a current level of the measurement-signalling, and provide sensed-signalling that comprises a plurality of sensed-blocks, wherein each of the plurality of sensed-blocks corresponds to one of the plurality of measurement-blocks of the measurement-signalling. The speaker driver further includes a processor configured to either: (a) combine the plurality of sensed-blocks to provide a time-averaged-block; and determine a frequency-spectrum of the time-averaged-block; or (b) determine a frequency-spectrum of each of the plurality of sensed-blocks to provide a plurality of frequency-spectrum-sensed-blocks; and combine the plurality of frequency-spectrum-sensed-blocks to provide a time-averaged-frequency-spectrum-block.
US09941845B2 Amplifiers and related integrated circuits
Apparatus are provided for amplifier systems and related circuits are provided. An exemplary circuit includes a main amplifier arrangement, first impedance matching circuitry coupled between the output of the main amplifier arrangement and a first output of the circuit, a peaking amplifier arrangement, and second impedance matching circuitry coupled between the output of the peaking amplifier arrangement and a second output of the circuit. In one exemplary embodiment, the first impedance matching circuitry and the second impedance matching circuitry have different circuit topologies and different physical topologies.
US09941844B2 Dual-mode envelope tracking power converter circuitry
Envelope tracking power converter circuitry is configured to receive a supply voltage and simultaneously provide a first envelope tracking power supply signal for amplifying a first RF input signal and a second envelope tracking signal for amplifying a second RF input signal.
US09941837B2 Combinatorial flux adder for determining photovoltaic cell nonlinearity
A process for determining a nonlinear response of a photovoltaic cell that includes: producing a first set of first light pulses including a first light that includes a first photon flux; and different first magnitudes of first photon flux; producing a second set of second light pulses that include: a second light including a second photon flux; and different second magnitudes of second photon flux; repeating the first light pulses in a selected combination with the second light pulses to produce a combinatorial set of combinatorial light pulses including: a combinatorial light comprising a combinatorial photon flux and different combinatorial magnitudes; irradiating a photovoltaic cell separately with the first set, second set, and the combinatorial set; separately producing, a first, second, and combinatorial photovoltaic output; and solving a system of linear equations to determine the nonlinear relationship between the photovoltaic output and the magnitude of flux.
US09941832B2 Semiconductor device
A semiconductor device includes an H-Bridge driver. The H-Bridge driver includes a first island on which a first power transistor and a second power transistor are mounted; a second island on which a third power transistor and a fourth power transistor are mounted; a third island on which a control circuit and a protection power transistor are mounted, the control circuit being configured to control the first, second, third and fourth power transistors, wherein the third island is allocated between the first island and the second island.
US09941830B2 Linear vibration modules and linear-resonant vibration modules
The current application is directed to various types of linear vibrational modules, including linear-resonant vibration modules that can be incorporated in a wide variety of appliances, devices, and systems to provide vibrational forces. The vibrational forces are produced by linear oscillation of a weight or member, in turn produced by rapidly alternating the polarity of one or more driving electromagnets. Feedback control is used to maintain the vibrational frequency of linear-resonant vibration module at or near the resonant frequency for the linear-resonant vibration module. Both linear vibration modules and linear-resonant vibration modules can be designed to produce vibrational amplitude/frequency combinations throughout a large region of amplitude/frequency space.
US09941829B2 Method for controlling operating speed and torque of electric motor
Systems and methods for controlling the operating speed and the torque of an electric motor using an operational model are described. An operational model for the electric motor, including a plot of engine performance parameters, is used for reference, and a most efficient output path, which may pass through an optimal operation region in the operational model, is selected. The most efficient output path may be determined, for example, according to locations of a current output state and a to-be-reached target state in the operational model, enabling the operating state of the motor to reach the target state from the current operating state. By selecting a more efficient output path, the operating efficiency of the motor may be optimized, the life of a battery improved and/or the operating mileage of the vehicle may be increased, without significantly reducing the driving experience.
US09941825B2 Motor control system and method with adaptive flux linkage estimation
A chiller system includes a compressor configured to circulate a refrigerant between an evaporator and a condenser in a closed refrigerant loop and a synchronous motor configured to drive the compressor. The motor includes a stator winding and a rotor. The chiller system includes a controller configured to estimate a flux linkage of the rotor and generate a control signal for the motor based on the estimated flux linkage. Estimating the flux linkage includes applying a voltage of the stator winding to a transfer function having an error correction variable, using a first value of the error correction variable in the transfer function to obtain convergence of the flux linkage over an initial motor starting interval, and using a second value of the error correction variable after the initial motor starting interval to reduce an error in estimating the flux linkage.
US09941822B2 Generator and method for converting vibrational energy into electrical energy
Disclosed is an electromechanical generator for converting mechanical vibrational energy into electrical energy, the electromechanical generator comprising: a mass resiliently connected to a body by a biasing device and adapted to oscillate about an equilibrium point relative to the body with an oscillation amplitude, a transducer configured to convert oscillations of the mass about the equilibrium point relative to the body into electrical energy, and a resilient device disposed between the biasing device and one of the mass and the body, wherein the resilient device is configured to be deformed between the biasing device and the one of the mass and the body only when the oscillation amplitude exceeds a predetermined non-zero threshold amplitude. The resilient device may comprise one of a helical spring, an O-ring and a spring washer, such as a Belleville washer, a curved disc spring, a wave washer, and a split washer.
US09941819B2 Piezoelectric motor, drive circuit, and drive method
A piezoelectric motor includes a rotating body, a piezoelectric actuator including a protruding section having contact with the rotating body, and adapted to rotate the rotating body due to a motion of the protruding section when driving a piezoelectric element, and a drive circuit adapted to drive the piezoelectric element, and the drive circuit includes a drive signal generation section adapted to output a drive signal with a predetermined frequency, and an LC filter adapted to block a frequency higher than the predetermined frequency, and applies the drive signal to the piezoelectric element via the LC filter.
US09941815B2 Power conversion apparatus with overcurrent simulating circuit
An object of the invention is to diagnose whether an overcurrent detecting function with respect to a power semiconductor element of a power conversion apparatus is normal. The power conversion apparatus of the invention is provided with IGBTs as the power semiconductor element which performs a switching operation to convert DC power supplied from a DC power source into AC power, an overcurrent detecting circuit, and an overcurrent simulating circuit. The IGBTs include an emitter sensing terminal which outputs a sense current according to a current flowing to an emitter electrode. The overcurrent detecting circuit detects the overcurrent flowing to the IGBTs on the basis of the sense current output from the emitter sensing terminal. The overcurrent simulating circuit outputs a simulation signal which simulates the overcurrent flowing to the IGBTs and toward the overcurrent detecting circuit.
US09941813B2 High frequency multi-level inverter
A multi-level inverter having at least two banks, each bank containing a plurality of low voltage MOSFET transistors. A processor configured to switch the plurality of low voltage MOSFET transistors in each bank to switch at multiple times during each cycle.
US09941812B2 Power conversion apparatus
A power conversion apparatus can receive an alternating current (AC) signal at an input and provide in dependence thereon a low voltage direct current (DC) signal from an output stage. The apparatus comprises a main path comprising a capacitor in series with the input. The apparatus comprises a first path to carry current carried by the main path in at least one of a positive going part and a negative going part of the AC signal and a second path to carry current carried by the main path in a positive going part and a negative going part of the AC signal. The apparatus further comprises switches operative to determine when one of the first and second paths carries current. The output stage receives current flowing in the first path and at least one of the switches operates based on a control signal derived from the DC signal.
US09941808B2 Smart power delivery system and related method
According to one disclosed embodiment, a smart power delivery system includes a power conversion unit having a communication module and a power management module that can convert mains power into an optimized voltage and limited current used to power an electronic device. In one embodiment, a power conversion unit can optimize an output voltage by communicating with a connected electronic device and exchanging parameters representing desired characteristics of the output voltage. In one embodiment, an electronic device receives power from a power conversion unit through a wired power conduit. In another embodiment, an electronic device receives power from a power conversion unit through a wireless power conduit. In one embodiment, an optimal voltage is selected after negotiation between multiple electronic devices and a power conversion unit.
US09941803B1 Controller IC device for a switched mode power converter and method for operating a controller IC device of a switched mode power converter
Embodiments of a controller integrated circuit (IC) device for a switched mode power converter and a method of operating a controller IC device of a switched mode power converter are described. In one embodiment, a controller IC device for a switched mode power converter an input/output unit connected to an input/output node of the controller IC device and a controller unit. The input/output unit is configured to receive an input current from the input/output node and output an output voltage through the input/output node in response to an input voltage received at the input/output unit. The controller unit is configured to control voltage regulation of the switched mode power converter in response to the input current received from the input/output unit and generate the input voltage for the input/output unit. Other embodiments are also described.
US09941802B2 Insulated DC/DC converter
A primary-side controller comprises a feedback (FB) terminal coupled to a light-receiving element of a photocoupler so as to receive a feedback signal from the photocoupler, and a current detection (CS) terminal that receives a current detection signal that corresponds to a voltage drop across a sense resistor RS. The primary-side controller includes a current mode modulator that generates a control pulse based on the voltage at the FB terminal and the voltage at the CS terminal. The primary-side controller is configured to be switchable between a normal mode and a burst mode. When the electrical state of the DC/DC converter satisfies a predetermined condition, a burst mode adjustment circuit inhibits transition to the burst mode, or otherwise forces transition from the burst mode to the normal mode.
US09941797B2 Switch control circuit and power supply device including the same
The power supply device includes a power switch, a rectification diode which rectifies a supplied current in accordance with a switching operation of the power switch to generate an output current, and a switch control circuit which averages a detected sensing voltage corresponding to a sensing voltage which follows a current which flows through the power switch to generate an output current estimating voltage corresponding to the output current.
US09941796B2 Control circuit for an interleaved switching power supply
In one embodiment, a control circuit configured for an interleaved switching power supply having first and second voltage conversion circuits, can include: a feedback compensation signal generation circuit that generates a feedback compensation signal; a first power switch control circuit that activates a first on signal when a first voltage signal that represents an inductor current of the first voltage conversion circuit is less than the feedback compensation signal, a first power switch of the first voltage conversion circuit being turned on based on the first on signal, and turned off after a predetermined time; and a second power switch control circuit that activates a second on signal after half of a switching period from a rising edge of the first on signal, and a second power switch control signal to turn on a second power switch of the second voltage conversion circuit based on the second on signal.
US09941786B2 Polarity correction circuit
A power unbalance mitigating polarity correction circuit is presented comprising a first and a second polarity correction circuit, each comprising: an input for receiving an input current, an output for providing a rectified output current, at least a first current path, for conducting the received current when the received current is of a first polarity, and a second current path, for conducting the received current when the received current is of a second polarity, wherein the first current path comprises a passive rectification component as an asymmetric conductance component of a first type and the second current path comprises an active rectification component as an asymmetric conductance component of a second type different from the first type; the power unbalance mitigating polarity correction circuit further comprising a controller, wherein the controller is arranged for controlling the active rectification component to operate in a power unbalance mitigation mode when the current received by the first polarity correction circuit is conducted over the first current path of the first polarity correction circuit and the current received by the second polarity correction circuit is conducted over the second current path of the second polarity correction circuit.
US09941780B2 Power conversion device with correction of reactor inductance based on detected current
A power converting apparatus includes a rectifier converting alternating-current power from an alternating-current power supply into direct-current power; a short-circuit unit short-circuiting the alternating-current power supply via a reactor; and a controlling unit controlling the short-circuit unit in a half cycle of the alternating-current power supply. A correction amount using inductance of the reactor is set in the controlling unit, and the controlling unit changes, using at least a detection value of a power supply current and the correction amount, an ON time and an OFF time of a plurality of switching pulses, and controls, using changed switching pulses, an ON/OFF operation of the short-circuit unit.
US09941779B2 Linear or rotary actuator using electromagnetic driven hammer as prime mover
We claim a hammer driven actuator that uses the fast-motion, low-force characteristics of an electro-magnetic or similar prime mover to develop kinetic energy that can be transformed via a friction interface to produce a higher-force, lower-speed linear or rotary actuator by using a hammering process to produce a series of individual steps. Such a system can be implemented using a voice-coil, electro-mechanical solenoid or similar prime mover. Where a typical actuator provides limited range of motion or low force, the range of motion of a linear or rotary impact driven motor can be configured to provide large displacements which are not limited by the characteristic dimensions of the prime mover.
US09941778B2 Periodic magnetic field generator and actuator equipped with same
The periodic magnetic field generator includes a flat-shaped first yoke, and a plurality of main permanent magnets, an auxiliary permanent magnet, and a side permanent magnet on the first yoke. The plurality of main permanent magnets are magnetized in a first direction of generating magnetic fields, the direction being perpendicular to the first yoke, and disposed such that orientations of the magnetization become opposite alternately in the first direction. The auxiliary permanent magnet is magnetized in a second direction perpendicular to side faces of the plurality of main permanent magnets, and placed between the side faces of the main permanent magnets. The side permanent magnet is magnetized in a third direction perpendicular to the first direction, and disposed so as to cover end faces of the main permanent magnets and the auxiliary permanent magnet, the end faces being perpendicular to the side faces of the main permanent magnets.
US09941777B2 Electrical rotating machines
An electrical rotating machine comprises a stator including armature pole coils 14 capable of generating magnetic flux when energized, an inner rotor driven to rotate when the magnetic flux passes therethough, and an outer rotor driven to rotate in a magnetic path of the magnetic flux that passes through the first rotor, the outer rotor having portions of different materials, in permeability, which are situated along the periphery of the outer rotor, the inner rotor having a plurality of salient poles situated along the periphery of the inner rotor and wound by wound coils 34 which induce induced current when linked by the magnetic flux generated by the armature pole coils, the stator including a plurality of wound coils 51, 52, 53 winding around each of poles to constitute the armature pole coil for each of the plurality of salient poles.
US09941774B2 Controlling fan motors using capacitive sensing
A motor having a rotor, the rotor including a first metal plate having a first size and a second metal plate having a second size arranged on a first surface associated with the rotor. The first metal plate and the second metal plate are arranged adjacent to each other at a predetermined distance from an axis of rotation of the rotor. The first surface rotates perpendicularly about the axis in response to the rotor being rotated about the axis. A stator includes a third metal plate arranged on a second surface associated with the stator. The third metal plate is arranged on the second surface at the predetermined distance from the axis. The second surface is parallel to the first surface and faces the first surface.
US09941770B2 Radial bearing thrust washer arrangement for submersible pump motor
An electrical submersible pump assembly has a motor that drives the pump. The motor has a stator having a bore, a shaft extending through the stator, and rotor sections mounted to the shaft, each of the rotor sections having first and second end rings. A non rotating bearing body has a periphery retained in non rotating engagement with the bore of the stator. The bearing body has a first end axially spaced from the first end ring, defining a first gap, and a second end axially spaced from the second rotor ring, defining a second gap. A first thrust washer is located in the first gap. Each thrust washer has a metal or carbide thrust surface for contact with the bearing body and an elastomeric thrust surface for contact with one of the end rings.
US09941764B2 Electric machine with a stator and a rotor
The invention concerns an electric machine with a stator and a rotor, comprising a plate stack with a plurality of superposed plates with windings which can be energized. Disposed at at least one end of the plate stack is an insulating plate. Furthermore, insulating strips are provided on the plate stack, between adjacent windings, which are supported on radially protruding shoulders on the insulating plate.
US09941762B2 Stator of rotating electric machine
In a stator of a rotating electric machine, an annular stator core has slots. A stator winding includes phase windings of three phases of differing electrical phases that are housed in the slots and wound around the stator core. Three phase bus bars electrically connect the respective phase windings to an external apparatus. Each of the phase windings are configured by multiple parallel windings. The phase bus bars are integrated with a fixing member to form a bus bar module. Each of the phase bus bars include branch portions and a trunk portion. The branch portions are electrically connected to the respective phase windings. The trunk portion electrically connects together the branch portions, and is configured that a cross-sectional area of an end portion closest to the phase winding is smaller than a cross-sectional area of an end portion closest to the external apparatus.
US09941760B2 Rotary electric machine
Conductor terminals of a plurality of conductor wires that constitute a stator winding each extend outward at a first axial end of a stator core, and among the conductor terminals, conductor terminals through which same-phase electric power flows are respectively connected by crossover wires, and circumferential regions that are occupied by the crossover wires are separated from each other in a circumferential direction.
US09941757B2 Flux concentrator for ironless motor
In one possible embodiment, a magnet array for a motor is provided which has an array of permanent magnets being arranged such that flux from the permanent magnets reinforce on one side of the array and substantially cancel on an opposite side of the array, the array further includes flux concentrators located at poles on the reinforcing side of the array.
US09941756B2 Rotor for an electric machine, an electric machine and method for manufacturing an electric machine
A rotor for an electric machine includes a rotor core having a plurality of rotor sheets (RS1), each of the plurality of rotor sheets including a plurality of flux guide sections, each of the plurality of flux guide sections having a plurality of flux paths and a plurality of flux barriers. The plurality of flux guide sections having a first flux guide section in which a first number of the plurality of flux barriers has a bridge interrupting the flux barrier, and a second flux guide section in which a second number of the plurality of flux barriers has a bridge interrupting the flux barrier. Each bridge is made of a material of high permeance, and the first number of the first flux guide section is different than the second number of the second flux guide section.
US09941754B2 Wireless power transmission with selective range
The embodiments described herein include a transmitter that transmits a power transmission signal (e.g., radio frequency (RF) signal waves) to create a three-dimensional pocket of energy. At least one receiver can be connected to or integrated into electronic devices and receive power from the pocket of energy. The transmitter can locate the at least one receiver in a three-dimensional space using a communication medium (e.g., Bluetooth technology). The transmitter generates a waveform to create a pocket of energy around each of the at least one receiver. The transmitter uses an algorithm to direct, focus, and control the waveform in three dimensions. The receiver can convert the transmission signals (e.g., RF signals) into electricity for powering an electronic device. Accordingly, the embodiments for wireless power transmission can allow powering and charging a plurality of electrical devices without wires.
US09941750B2 Power transmitting apparatus, control method for power transmitting apparatus, and recording medium storing program
The present invention relates to improvement of usability in the case of detecting a second power receiving apparatus during transmission of power to a first power receiving apparatus.A power transmitting apparatus includes a power transmitting unit that transmits power to a plurality of power receiving apparatuses by radio, and a switching unit that controls, in a case where power is being transmitted to a first power receiving apparatus by the power transmitting unit, a power transmission mode for transmitting power to the first power receiving apparatus, and a detection mode for detecting a second power receiving apparatus that is different from the first power receiving apparatus. The resolution for detecting the second power receiving apparatus in the detection mode is higher than the resolution for detecting the second power receiving apparatus in the power transmission mode.
US09941748B2 Optical communication and charging device and method of use
Techniques for remote interactions with devices, such as charging, communications, and user interaction, are provided. Specifically, systems and methods to provide charging of devices, such as, remote charging by photovoltaic (PV) cells, infrared (IR) illumination, audio signals, and LEDs such as laser LEDs to charge devices such as watches, jewelry, car panels, headphones and phones, are presented.
US09941746B2 Power transmitting device, power feeding system, and power feeding method
Provided is a power transmitting device, a power feeding system, and a power feeding method in which power loss is cut by increasing power use efficiency and power can be supplied to a power feeding user (a power receiving device) with high power transmission efficiency. Depending on a power feeding state (e.g., resonant frequency of a power transmitting resonance coil is not the same as that of a power receiving resonance coil, or the influence of their positional relation), power transmitted from a power source portion of the power transmitting device is reflected to the power transmitting coil side by the power transmitting resonance coil. Further, a power recovering function (circulation function) for power reflected to the power transmitting device is provided to recover the power reflected to the power transmitting coil side and to reuse it for power transmission.
US09941745B2 Resonant type power transmission system and resonance type power transmission device
A second resonant type transmission power supply device 1b includes a transmission power state detecting circuit 11b that detects a transmission power state of a second transmission antenna 2b, a foreign object detecting circuit 124b that detects the presence or absence of a foreign object in an overlapping range of electromagnetic fields on the basis of a detection result acquired by the transmission power state detecting circuit 11b, and a power control circuit 125b that, when a foreign object is detected by the foreign object detecting circuit 124b, controls a first resonant type transmission power supply device 1a in such a way as to reduce or stop the supply of electric power to a first transmission antenna 2a.
US09941743B2 Single structure multi mode antenna having a unitary body construction for wireless power transmission using magnetic field coupling
A single structure multiple mode antenna having a unitary body construction is described. The antenna is preferably constructed having a first inductor coil portion that is electrically connected in series with a second inductor coil portion. The antenna is constructed having a plurality of electrical connections positioned along the first and second inductor coils. A plurality of terminals facilitates connection of the electrical connections having numerous electrical connection configurations and enables the antenna to be selectively tuned to various frequencies and frequency bands.
US09941742B2 Wireless power transmission apparatus and wireless power transmission method
A wireless power transmission apparatus for wirelessly transmitting power to a wireless power reception apparatus includes a first wireless power transmission module configured to wirelessly transmit power using a first method, a second wireless power transmission module configured to wirelessly transmit power using a second method, and a controller configured to control the first wireless power transmission module and the second wireless power transmission module. The first wireless power transmission module includes a first signal transmission unit configured to transmit a first signal for detecting the wireless power reception apparatus, a second signal transmission unit configured to transmit a second signal for determining whether the detected wireless power reception apparatus is capable of receiving power transmitted using the first method and a reception unit configured to receive a signal from the wireless power reception apparatus.
US09941740B2 Systems, apparatus and methods for quantifying and identifying diversion of electrical energy
Systems, apparatus and methods for quantifying and identifying diversion of electrical energy are provided. Bypass and tap diversions may be identified in an electric utility power distribution inventory zone having both bypass and tap diversions. Bypass diversion factors for consumer nodes in an inventory zone are determined by finding a solution to a system of load balance equations having slack variables representing aggregate tap loads for the inventory zone and in which consumer load profile data is scaled by the bypass diversion factors, which solution minimizes an objective function whose value is positively related to the sum of the slack variables representing the aggregate tap loads. Tap loads are correlated with nodes in an inventory zone by solving a first system of power flow equations not having variables representing tap loads, and then solving a second system of power flow equations having variables representing tap loads using an iterative numerical solution technique initialized based on the solution to the first system of power flow equations.
US09941738B2 Dynamic DC link voltage control
According to one aspect, embodiments of the invention provide a UPS system comprising an input configured to receive input AC power, an output configured to provide output AC power to a load, a converter coupled to the input and configured to convert the input AC power into DC power, a DC bus configured to receive the DC power, an inverter configured to convert the DC power from the DC bus into output AC power and provide the output AC Power to the output, and a controller configured to receive an output AC output voltage level selection from a user, operate the inverter to generate the output AC power having an AC voltage level based on the output AC output voltage level selection, and operate the converter to generate the DC power having a DC voltage level based on the output AC output voltage level selection.
US09941733B2 Electronic device, communication system, and method of controlling electronic device
An electronic device includes a solar cell, a secondary battery that is charged by the solar cell, and a control circuit that switches between a charging period during which the charging of the secondary battery from the solar cell is performed and a communication period during which an optical signal is received by the solar cell. The optical signal includes a synchronization signal indicating the transmission of data and the data, and the communication period is configured to detect the synchronization signal. The control circuit extends the communication period to enable the solar cell to receive the whole data included in the optical signal.
US09941732B2 Controlling charging and/or discharging of batteries within a user device
A user device can include a first battery to power the user device, a second battery to power the user device, and a switching logic controller. The switching logic controller can be configured to at least one of control simultaneous charging of the first and second batteries based on a temperature of at least one of the first and second batteries and control individual discharging of the first and second batteries based on the temperature of at least one of the first and second batteries.
US09941731B1 Carry bag or purse with remote charging and illumination features
A bag device that includes a shell having an interior surface and an exterior surface in which the interior surface having at least a first side wall and a second side wall and a bottom wall. The bag device also has a power element positioned proximate to the interior surface, the power element including a body member that has a first face, an opposed second face and an outer perimeter defined by an outer edge surface of the body member. The power element also includes a power storage unit connected to the body member and at least one power outlet in electrical communication with the power storage unit. The at least one power outlet configured to releasibly and operatively receive a power cord associated with a personal electronic device. Also disclosed is a power element device configured to be releasibly inserted in the a carry bag that includes a body member that has a first face and an opposed second face as well as an outer perimeter defined by the body member. The power element device also includes at least one rechargaeable power storage unit attached to the first face of the body member as well as at least one power outlet in electrical communication with the at least one rechargeable power storage unit.
US09941727B2 Electric power control system, battery control system, battery control device, battery control method, and recording medium
A battery control system that communicates by way of a communication network with a plurality of batteries that are connected to an electric power system includes a communication characteristics detection unit that, for each of the plurality of batteries, detects characteristics of communication paths between the batteries and the battery control system within the communication network. The battery control system includes a selection unit which selects, from among the plurality of batteries, each battery that has characteristics of communication paths within a predetermined communication characteristics range, as a regulating battery that is to be used for regulating electric power of the electric power system. The battery control system includes a control unit that supplies operation instructions that instructs the regulating batteries that were selected in the selection unit to perform a charging or discharging operation.
US09941723B2 Power management system that changes the operating conditions of a battery charger
Some embodiments relate to a power management system. The power management system includes a generator that provides a voltage output to a bus. The bus is adapted to be connected to a load. The power management system further includes a battery charger that is adapted to charge a battery. A generator controller operates the generator and also adjusts operating conditions of the battery charger. In some embodiments, the generator includes an internal combustion engine that drives an alternator. Embodiments are contemplated where the battery charger is adapted to receive power from a primary power source. As an example, the primary power source may be utility power or some other form of generator power.
US09941722B2 Converter and method for extracting maximum power from piezo vibration harvester
A system (1-2) for efficiently transferring harvested vibration energy to a battery (6) includes a piezo harvester (2) generating an AC output voltage (VP(t)) and current (IPZ(t)) and an active rectifier (3) to produce a harvested DC voltage (Vhrv) and current (Ihrv) which charge a capacitance (C0). An enable circuit (17) causes a DC-DC converter (4) to be enabled, thereby discharging the capacitance into the converter, when a comparator (A0,A1) of the rectifier which controls switches (S1-S4) thereof detects a direction reversal of the AC output current (IPZ(t)). Another comparator (13) causes the enable circuit (17) to disable the converter (4) when the DC voltage exceeds a threshold (VREF), thereby causing the capacitance be recharged.
US09941719B2 Wireless charging surface
A surface with various layers that provide wireless charging may include at least one of a top surface layer, a second layer, comprising a plurality of lights and a power grid, disposed under the top surface layer, a charging pad disposed on a portion of the power grid, and a third layer, comprising a power supply which provides power to the plurality of lights and the power grid, disposed under the second layer.
US09941718B2 Lithium-based battery pack for a hand held power tool
A method for conducting an operation including a power tool battery pack. The battery pack can include a housing, a first cell supported by the housing and having a voltage, and a second cell supported by the housing and having a voltage. The battery pack also can be connectable to a power tool and be operable to supply power to operate the power tool. The method can include discharging one of the first cell and the second cell until the voltage of the one of the first cell and the second cell is substantially equal to the voltage of the other of the first cell and the second cell.
US09941715B2 Charging system for self-propelled apparatus
A charging station includes a main body, a central emission module, a supersonic receiver, a controller, and a lateral emission module having a left infrared emitter and a right infrared emitter. The controller drives the left infrared emitter and the right infrared emitter to emit alternatively infrared signals to a first signal area and a second signal area, respectively. When the supersonic receiver receives a supersonic signal from the self-propelled apparatus, the controller drives the central emission module to emit another infrared signal to a third signal area so as to guide the self-propelled apparatus to enter the third signal area. When a distance between the self-propelled apparatus and the charging port is smaller than a predetermined distance, the self-propelled apparatus turns to have a charging-input unit thereof to face the charging port. In addition, a charging system including the charging station and the self-propelled apparatus is also provided.
US09941711B2 Method for managing the level of charge of at least two batteries, corresponding device and computer program
A method is provided for managing the level of charge of at least two batteries respectively powering a first and a second device. The devices are able to cooperate physically with one another via a modular interface, and the method includes a step of transferring energy from one of the batteries to the other of the batteries, the transferring step being implemented as a function of a level of charge of at least one of the batteries.
US09941707B1 Home base station for multiple room coverage with multiple transmitters
The embodiments described herein include a transmitter that transmits a power transmission signal (e.g., radio frequency (RF) signal waves) to create a three-dimensional pocket of energy. At least one receiver can be connected to or integrated into electronic devices and receive power from the pocket of energy. The transmitter can locate the at least one receiver in a three-dimensional space using a communication medium (e.g., Bluetooth technology). The transmitter generates a waveform to create a pocket of energy around each of the at least one receiver. The transmitter uses an algorithm to direct, focus, and control the waveform in three dimensions. The receiver can convert the transmission signals (e.g., RF signals) into electricity for powering an electronic device. Accordingly, the embodiments for wireless power transmission can allow powering and charging a plurality of electrical devices without wires.
US09941704B2 Autonomous power system with variable sources and loads and associated methods
A number of load units are connected to receive power from a number of power supply units. A potential load bus is connected to have a voltage level representative of both a total potential power requirement of the number of load units and a total potential power supply capability of the number of power supply units. A first control circuit enables operation of the number of load units when the voltage level on the potential load bus indicates that a sufficient supply of power is available. An actual load bus is connected to have a voltage level representative of both an actual total power consumption of the number of load units and an actual total power supply available from of the number of power supply units. A second control circuit signals an impending loss of sufficient power supply based on the monitored voltage level on the actual load bus.
US09941703B2 Solar power generation system having a backup inverter
A solar power generation system having a backup inverter, the solar power generation system has N number of solar panels, N number of inverters, at least one backup inverter and at least one AC (Alternating Current) wiring box; each inverter and the backup inverter are parallel connected to the AC wiring box; the AC wiring box can be connected to a utility grid; when each inverter is normally operated, each solar panel can supply power to each inverter; when the X-th inverter is faulted, the X-th solar panel can supply power to the backup inverter, therefore reduce the interruption time of power generation.
US09941701B2 Photovoltaic voltage regulation
A photovoltaic system includes: a photovoltaic generator comprising strings that each includes one or more photovoltaic cells; a power converter; switches; and a controller. The power converter is configured to convert direct current (DC) power provided by the photovoltaic generator into alternating current (AC) power, and to output the AC power. Each switch is associated with one of the strings and is configured to connect the associated string to the power converter when set to a first setting, such that power generated by the first string can flow to the power converter. Each switch is also configured to disconnect the string from the power converter when set to a second setting. The controller is configured to control the power provided by the photovoltaic generator by selectively connecting the strings of the photovoltaic generator to the power converter by controlling the settings of the switches.
US09941700B2 Utility scale renewable energy system controls for ramp-rate, voltage, and frequency management
An energy system includes renewable energy sources each including an inverter. The renewable source inverters are coupled to a distribution line in a manner wherein power combines additively. The system also includes an energy storage source including an energy storage inverter coupled to the distribution line between the point of interconnection and the renewable source inverters. Finally, a control system is structured to: (i) control a voltage at the point of interconnection by controlling a renewable source reactive power output by the renewable source inverters and an energy storage reactive power output by the energy storage inverter, and (ii) provide power ramp rate control for the renewable energy system by controlling at least one of a renewable source real power output by each of the renewable source inverters and a first energy storage real power output by the energy storage inverter.
US09941698B2 Fast response active reactive power (KVAR) compensator
Legacy automatic variable capacitor KVAR compensation systems typically use either electromechanical devices such as relays or contactors of various forms and types to switch the selected capacitors in and out of the electrical system under some form of electronic control. These systems are slow and discontinuous in their ability to closely regulate the exact value of compensatory capacitance needed to compensate the variable and rapidly changing reactive power KVAR in the electrical power transmission and distribution networks. The present invention provides a fast response active KVAR compensator based on a variable transimpedance topology.
US09941695B2 Fault diagnosis method, grid interconnection apparatus, and controller
A fault diagnosis method of diagnosing a fault related to a PV PCS 150, configured to perform an interconnected operation in which a PV 100 is interconnected to a grid 10: supplies power from independent operation output of the PV PCS 150 to a storage PCS 250 by an independent operation that does not interconnect the PV 100 to the grid 10 after the grid interconnection apparatus stops the interconnected operation by detecting abnormality; measures an output power state of the PV 100 and/or the PV PCS 150 when power is supplied to the storage PCS 250; and determines that the fault occurs and performs an error process for notification to a user when the measured output power state does not satisfy a predetermined condition.
US09941692B2 Overvoltage protection for a multivoltage vehicle electrical system
An overvoltage protection circuit for a first subsystem of a multivoltage vehicle electrical system, in which the first subsystem having a first vehicle electrical system voltage, a second subsystem having a second vehicle electrical system voltage, and an electric machine for supplying the second subsystem. The first system voltage is less than the second system voltage. The overvoltage protection circuit includes a first ground connection for connecting a shared ground potential of the first subsystem, the second subsystem, and the electric machine, an additional second ground connection for connecting a reference ground potential, and a control connection for controlling the electric machine. The overvoltage protection circuit checks whether a ground differential voltage between the first and second ground connections reaches a threshold value, and for reducing the second vehicle electrical system voltage when the ground differential voltage between the first and second ground connections reaches the threshold value.
US09941688B2 Compressor protection and grid fault detection device
A method of operating a refrigeration system that receives power from an electrical grid includes selectively operating at least one component of the refrigeration system in a first state. The method includes selectively detecting a fault event of the electrical grid in response to a concurrent (i) increase in amount of current drawn by the component and (ii) decrease in voltage of power received by the component. The method includes, in response to detecting the fault event, switching the component from the first state to a second state. The component consumes less power in the second state than in the first state. The method includes determining a first delay period. The method includes identifying a conclusion of the fault event. The method includes, in response to the conclusion of the fault event, waiting for the first delay period before switching the component back to the first state.
US09941683B2 Device for protecting electrical networks
The device comprises at least a first part intended to detect an electrical fault occurring in a network and a second part comprising at least one switch connecting the network to a power supply source, the first part comprising at least one reflectometry detection system capable of being coupled with the network, the system detecting and analyzing the impedance changes occurring in the network, a signal being sent by the system to trigger the opening of the switch when a detected impedance change is considered by the system to be an electrical fault.
US09941679B1 Interlocking floor box with extended locking conduit hubs
An interlocking floor box assembly including one or more electrical boxes which may be securely ganged together to form a multi-gang floor box for mounting one or more electrical components, such as duplex outlets, directly in a concrete pour area or in a floor above a concrete base. Opposing side walls include an internal hub and an external hub respectively for interlocking two or more electrical boxes together. Other embodiments may include a tab and a corresponding slot on opposing walls on the electrical boxes to enable interlocking two or more boxes. The interlocking floor box assembly enables secure side to side interlocking of two or more boxes to form a multi-gang floor box. A cover plate and a lid assembly enable plug in of electrical cords into the duplex outlets with the plug ends of the cords recessed below the floor level.
US09941673B2 Arrangement comprising a switch for switching powers
An arrangement includes a switch including a plurality of connectable modules. A first module is a connection module, electrical connections running into an interior, starting from the connection module for connection purposes. A second module is a manual plug module, connectable via its second contacts to the connection module, electrical connections passing external to the switch starting from the manual plug module for connection purposes. A third module is a communication module including a communication electronics system and including second contacts and first contacts, the communication module being connectable via its second contacts to the connection module and the manual plug module being connectable via its second contacts to the communication module. Second contacts of the communication module are electrically connectable to first contacts of the communication module or to the communication electronics system. The communication module is a communication adapter and the communication electronics system is connectable thereto.
US09941672B2 Corona ignition device and method for the production thereof
This disclosure relates to a corona ignition device having: an insulator, which bears an electrically conductive coating, which forms a tubular face; a central electrode, which sits in the insulator and leads to at least one ignition tip; and a holder, in which the insulator sits. According to this disclosure, the insulator has an annular shoulder, on which is situated the end of the tubular face of the coating that faces away from the at least one ignition tip. A method for producing a corona ignition device is also described.
US09941662B2 Light-emitting element and method for manufacturing the same
A light-emitting element includes a mesa structure in which a first compound semiconductor layer of a first conductivity type, an active layer, and a second compound semiconductor layer of a second conductivity type are disposed in that order, wherein at least one of the first compound semiconductor layer and the second compound semiconductor layer has a current constriction region surrounded by an insulation region extending inward from a sidewall portion of the mesa structure; a wall structure disposed so as to surround the mesa structure; at least one bridge structure connecting the mesa structure and the wall structure, the wall structure and the bridge structure each having the same layer structure as the portion of the mesa structure in which the insulation region is provided; a first electrode; and a second electrode disposed on a top face of the wall structure.
US09941659B2 Optical module for ultrahigh-speed communication
A TO can-type optical module for ultrahigh-speed communication including a laser diode chip for at least 5 Gbps. A substrate for transmitting a signal to a laser diode chip is formed by coupling an upper substrate (210) on which line patterns for transmission are formed, to a lower substrate (220) of which an upper surface has conductivity with the upper substrate (210) such that the optical module for ultrahigh-speed communication has single ended impedance of 25 ohms or differential ended impedance of 50 ohms. The substrate has a height of about 0.4 mm to which a laser diode chip, for ultrahigh-speed communication, is attached to enable an optical coupling between the laser diode chip, the lens, and the like, and may implement a hight-speed transmission line using a width of 0.6 mm or less thereby providing a substrate which is effectively embedded ina TO can-type package with a narrow mounting area.
US09941655B2 High power broadband light source
A system for generating high power broadband light includes multiple light-sustained plasma light sources. Each one of the light-sustained sources includes a pumping source, a gas containment structure for containing gas and configured to receive pumping illumination from the pumping source and a parabolic reflector element arranged to collect at least a portion of the broadband radiation emitted by the generated plasma and form a collimated broadband radiation output. The system also including a set of optical elements configured to combine the collimated broadband outputs from the parabolic reflector elements of the multiple light-sustained plasma light sources into an aggregated broadband beam.
US09941652B2 Space transformer with perforated metallic plate for electrical die test
Space transformer including a substrate and a perforated plate disposed on the substrate. The substrate includes conductive traces and an array of conductive probe pins extend outwardly from anchor points on the substrate. The pins are electrically coupled to at least one of the conductive traces on the substrate as an interface between an E-testing apparatus and a DUT. The perforated plate may be affixed to a surface of the substrate and includes an array of perforations through which the conductive pins may pass. The perforated plate may provide one or more of lateral pin support and protection to the underlying substrate and/or traces. The perforated plate may include a metal sheet. A polymeric material may be disposed on at least a sidewall of the perforations to electrically isolate the metal sheet from the conductive probe pins.
US09941649B2 Interboard connection connector with battery connector
A connector includes a plurality of contacts each including first and second contact pieces provided with first and second contact portions at distal end sides, respectively, that come into contact with conductor portions of two insertable/removable connection objects when the connection objects are inserted, and a connection portion to be connected and secured to a board. The connector further includes a housing that holds the contacts in an array and includes an insertion opening of a shape that allows insertion of the connection objects and a battery from a same direction, and a terminal is arranged in the housing and spaced apart from the contacts in a width direction of the housing, the terminal including third and fourth contact pieces provided with third and fourth contact portions on distal end sides, respectively, configured to come into contact with the conductor portion of one of the connection objects and the battery.
US09941646B1 Coaxial cable connector and method of use thereof
A coaxial cable connector comprises a signal contact member having an inner conductor connecting portion, a grounding contact member, and an insulating housing for supporting the signal contact member and the grounding contact member in a condition of mutual isolation, wherein the insulating housing is provided with first and second holes opposite to each other across the inner conductor connecting portion of the signal contact member with which an inner conductor of a coaxial cable is in contact, the first hole is operative to allow an ultrasonic vibration horn to be put into the first hole for contacting with the inner conductor of the coaxial cable and applying ultrasonic vibrations to the same and the second hole is operative to allow an anvil to be put into the second hole for coming into contact with the inner conductor connecting portion of the signal contact member.
US09941643B2 Connectors with switchable terminal loads
Switchable grounded terminal loads are built into, or otherwise coupled to, connectors on motherboards and control devices. The terminal loads are coupled to the bus termination at the connector when the connector is “stuffed” (connected to a mating connector). The switchable grounded terminal loads replace dummy connectors in preventing empty “unstuffed” connectors from increasing error risks on active channels.
US09941642B1 Electrical outlet cover with excess cord storage
A receptacle cover plate assembly for an all-in-one receptacle with one or more electrical outlets and USB ports. A flange plate has rearward angular flanges which project back toward the wall of a structure. The flange plate conceals cord wrapped around a spool plate. The spool plate is provided as part of a combined receptacle, receptacle cover plate and spool plate where a spool cover is offset from a receptacle cover plate face.
US09941634B1 Safety hook system to prevent premature separation of connected device
Some embodiments of the present disclosure include a safety hook attachment for preventing the premature disconnect of a device from a cord. The safety hook attachment may include a fastening body configured to attach to the cord; a tail extending from the fastening body; and a connector attached to an end of the tail distal from the fastening body, wherein the connector may be configured to attach to the device to be connected to the cord.
US09941632B2 Card holder
A card holder includes a card locker, a connector, and a card tray. The card locker includes a control button, a card fastener, and a housing having an opening. The connector includes a card-seat spring. The card tray is configured to be inserted into the connector through the opening. When the card fastener and the card tray are engaged with each other in a locked state, the card tray is pressed against the card-seat spring to cause the card-seat spring to be in a compressed state. When the control button controls the card fastener to move away from the card tray such that the card fastener and the card tray are in an unlocked state, the card-seat spring ejects the card tray through the opening by recovering from the compressed state to a normal state.
US09941623B2 Flat ethernet cables and associated systems, devices, and methods
Flat Ethernet cables and associated systems, devices, and methods are disclosed, particularly as applied to home security system implementations. For example, disclosed herein is a flat Ethernet cable that includes an interior, female connection end, an exterior, female connection end, opposite the interior end, and including a weather-proofing clamshell enclosing the female connection end, and a flat cable portion that runs between the interior end and the exterior end. The flat Ethernet cable is configured as a PoE cable.
US09941622B1 Connector with sealing boot and moveable shuttle
Various connectors are disclosed. The connectors include a sealing assembly for providing a seal around a cable extending through the connector. The sealing assembly can include a moveable shuttle, a sleeve, a stop component and a sealing boot. The sealing boot can be compressed between the sleeve and the shuttle as the shuttle moves towards the stop component. The sealing boot can be configured to change shape (e.g., buckle) around the cable in response to movement of the shuttle. The change in shape of the sealing boot can facilitate sealing around the cable. The connector can be configured to inhibit or prevent the sealing boot from being extruded of out of position in response to a pressure gradient between first and second ends of the connector.
US09941621B2 Card edge connector having wiping dummy contact
A card edge connector includes an insulative elongated housing and a plurality of contacts disposed in the housing. The housing includes a pair of side walls extending along a longitudinal direction with a central slot therebetween in a transverse direction perpendicular to the longitudinal direction. Each side wall includes a plurality of passageways to receive the corresponding contacts, respectively. Each contact has the retaining section, a contacting section extending from one side of the retaining section, and a tail section extending from the other side of the retaining section. Each contact at a lower position is associated with a corresponding wiping terminal at an upper position in the same passageway.
US09941619B2 Connector
A connector includes a housing and a front holder. The front holder includes an arm portion to be exposed at a side surface of the housing. The housing includes a pair of extension walls on the side surface of the housing to cover the arm portion. The pair of extension walls has a first part and a second part. In the first part, a distance between the extension ends of the extension walls is constant. In the second part, the distance increases gradually as they extend away from the first part in the attaching direction. A distal end of the arm portion is in a position corresponding to the second part when the front holder is in a final lock position, and the distal end of the arm portion is in a position corresponding to the first part when the front holder is in a preliminary lock position.
US09941618B2 Electrical connector
Having an advantage in user convenience, an electrical connector for connecting with an electrical cable under a do-it-yourself scenario is provided, where the cable has a knot at a cable end. The connector comprises a connector body and a cover. The connector body has an internal space for housing the knot, an opening for allowing the cable end to access the internal space, and an outlet for allowing the cable to run from the internal space to outside the connector body. The cover has a top plate for covering the opening. In particular, the cover includes two wings protruded from the top plate collectively for claiming the knot to secure the knot inside the internal space. A separation of the two wings is advantageously selected to be 2 times to 3 times of a cross-sectional width of the outlet for producing a clamping effect on the knot.
US09941617B2 Damping element for providing axial damping in a plug-in connector
A damping element for a plug-in connector is described, the plug-in connector comprising a socket and a connector pin pluggable into the socket. The damping element is configured to be disposed inside of the socket and comprises a first bearing face adapted for lying flat against the bottom of the socket and a second bearing face adapted for lying flat against the front face of the connector pin. Either a first shaft is attached at or integrally molded with the first bearing face or a second shaft is attached at or integrally molded with the second bearing face. The damping element is adapted for providing a damping effective in the axial direction between the connector pin and the socket.
US09941616B2 Multi-piece jacket for separable connectors
A jacket assembly for a separable connector includes multiple pieces joined by an overlapping or interference fit. The multiple pieces include a body segment between a cable entrance segment and a bushing interface segment. The cable entrance segment includes a bore that extends axially through the cable entrance segment and is sized to receive an insulated power cable. The bushing interface segment includes a lug portion with another bore that is sized to receive a portion of an insulative inner housing and a portion of a conductive insert for accepting a compression lug. The bushing may also be configured to receive another portion of the insulative inner housing and another portion of a conductive insert for accepting a probe or bushing insert from another device. The body segment includes still another bore extending axially from a first end of the body segment to a second end of the body segment.
US09941614B2 Connection structure of connector capable of managing a large electric current
A socket connector includes a housing mounted on a substrate, a plurality of socket terminals that is held by the housing. The plurality of socket terminals is, on one end side thereof, conductively connected to a single connection pad provided in a circuit pattern of the substrate, and is, on the other end side thereof, conductively connected to a plug terminal that is to be a connection mate. Each of the socket terminals includes a substrate connection portion that is fixed to a connection pad, a contact portion that comes into conductive contact with the substrate, and a connection piece portion that connects the contact portion and the substrate connection portion to each other. The connection piece portion including a plurality of branched pieces forming conductive paths that connect, in a parallel manner, the contact portion and the substrate connection portion splits an electric current in a parallel manner.
US09941613B2 Electrical connector for a bus bar
An electrical connector is disclosed. The electrical connector has an insulating housing extending in a longitudinal direction and having a first insertion slot and a second insertion slot parallel to the first insertion slot, a plurality of first terminals disposed separately on an upper portion of the first insertion slot along the longitudinal direction, a plurality of second terminals disposed on the upper portion of the first insertion slot and spaced apart from the plurality of first terminals, a plurality of third terminals disposed separately on a lower portion of the first insertion slot along the longitudinal direction, a plurality of fourth terminals disposed separately on an upper portion of the second insertion slot along the longitudinal direction, and a balance structure disposed on an end of the insulating housing in the longitudinal direction.
US09941612B2 Power cable splice sleeve and method of installation
A connector permitting the surface splicing of two electric power cables in adverse weather conditions provides a sufficient dielectric cover to prevent shorting or grounding out of the connection. A dielectric tube or sleeve having means for either a threaded or snapping connection with a cap, which is fitted over one or two electric power cables. The body after being filled with dielectric grease or silicone provides a radiused surface at each end to permit the cables to be inserted or removed quickly and efficiently. The capped end or ends can then be further weatherproofed with an additional exterior cap over the tube.
US09941610B1 Expandable distribution block
A distribution block element having dual-level opposed input and output couplings and integral mechanical connectors to additional adjacent distribution block elements, allowing expansion by addition of distribution block elements. First levels of the couplings are spaced apart for a fuse of a first size and the second, lower levels of the couplings are spaced apart for a fuse of a second size, and for direct flat plate conductors. When two elements are connected adjacently, the spacing between the second level of adjacent couplings is the same as the spacing between the second level of opposed couplings in each element. Thus, the flat plate conductors can be used both for electrically connecting opposed input and output couplings and for electrically connecting input couplings of adjacent elements. Notches in the flat plate connectors receive fasteners and two flat plate connectors can be juxtaposed to receive the same fastener without stacking.
US09941603B2 Notched contact for a modular plug
A metallic contact for insertion into a modular telecommunications plug includes a generally planar body defining a top end, a bottom end, a front end, a rear end, and a length extending from the front end to the rear end. The bottom end is at least partially defined by a blade for piercing an insulation of a wire positioned within the plug. At least a portion of the top end is configured to electrically contact a conductor of a jack that receives the plug. The top end is defined at least in part by a first engagement surface that is separated from a second engagement surface by a notch. An uppermost portion of the first engagement surface defines a first push surface that is generally at the same height as a second push surface defined by an uppermost portion of the second engagement surface. The notch is defined by a front vertical wall spaced from a rear vertical wall, wherein the front vertical wall is positioned at a distance of at least half the length of the contact from the front end of the contact.
US09941599B2 Three band whip antenna
A three band whip antenna has a base where the whip antenna along its whole length or part of its length, has a lowest frequency band antenna element and an intermediate frequency band antenna element, wherein a highest frequency band antenna is included in the whip antenna at a position closer to base than the intermediate frequency band antenna element.
US09941597B2 Antenna arrangement
Antenna arrangement for a multi-radiator base station antenna, the antenna having a feeding network based on air filled coaxial lines (1, 2, 3), wherein each coaxial line comprises an outer conductor (8) and an inner conductor (4, 5, 6), wherein an adjustable differential phase shifter including a dielectric part (9) is arranged in the antenna and said dielectric part being movable longitudinally in relation to at least one coaxial line (1, 2, 3).
US09941594B2 Inscribed polarizer array for polarization diverse application
An antenna system includes an antenna having an aperture, and a polarizer array. The polarizer array includes a support structure, at least two polarizer elements arranged relative to the support structure, each of the at least two polarizer elements rotatable about a separate axis, and an actuator coupled to the at least two polarizer elements, the actuator operative to effect common rotation of the at least two polarizer elements. The polarizer array is arranged to at least partially cover the antenna aperture.
US09941591B2 Antenna arrangement
An antenna arrangement comprises a casing comprising a flange and a collar extending upwards from the flange. A magnetic loop antenna coil covers an outer surface of at least one of the flange and the collar at least partly. A magnetic material layer is arranged between the magnetic loop antenna coil and the outer surface of the flange and the collar to guide the magnetic flux generated by the magnetic loop antenna coil, the magnetic material layer covering both the flange and the collar at least partly.
US09941581B2 Antenna window and antenna pattern for electronic devices and methods of manufacturing the same
A housing for an electronic device, including an aluminum layer enclosing a volume that includes a radio-frequency (RF) antenna is provided. The housing includes a window aligned with the RF antenna; the window including a non-conductive material filling a cavity in the aluminum layer; and a thin aluminum oxide layer adjacent to the aluminum layer and to the non-conductive material; wherein the non-conductive material and the thin aluminum oxide layer form an RF-transparent path through the window. A housing for an electronic device including an integrated RF-antenna is also provided. A method of manufacturing a housing for an electronic device as described above is provided.
US09941580B2 Antenna and complex antenna
An antenna for receiving and transmitting radio signals, including a reflective unit, comprising a central reflective element; and a plurality of peripheral reflective elements, enclosing the central reflective element to form a frustum structure; and at least one radiation unit, disposed above the central reflective element; where the reflective unit is electrically isolated from the at least one radiation unit.
US09941579B2 Equipment mounting device
A mounting device including a top surface, an opening, a plurality of mounting units, and a reinforced portion extending along the bottom of the top surface in the areas between the openings and the mounting units.
US09941576B2 Antenna device and electronic device
An antenna device includes a power supply coil to which a near field communication circuit is connected, a near field communication coil that is coupled to an antenna coil of a communication target and the power supply coil via a magnetic field and that resonates at the frequency of a near field communication signal, and a non-contact charging coil that is connected to a non-contact charging control circuit and that is coupled to a target coil for non-contact charging. The power supply coil and the non-contact charging coil are provided on the same plane or on planes that are close to each other. The non-contact charging coil is superposed with the near field communication coil when viewed in plan view, and the shortest distance between the power supply coil and the NFC coil is smaller than the shortest distance between the power supply coil and the non-contact charging coil.
US09941574B2 Television receiver and electronic apparatus
According to one embodiment, an electronic apparatus includes a housing having a conductive portion in at least a part of the housing, a component which is accommodated in the housing and emits noise, an antenna which overlaps the component in a thickness direction of the housing, and a conductive member which electrically connects a ground of the antenna and the conductive portion of the housing.
US09941573B2 Article management system
A problem with conventional article management systems has been that the management scheme for articles. The present invention addresses this problem by providing an article management system comprising: a transmitting antenna for transmitting a radio signal; a receiving antenna for receiving a radio signal; a article to be managed positioning region whereat articles to be managed are placed; an RF tag provided with a tag transmitting unit which electromagnetically couples with the transmitting antenna and the receiving antenna; and an RFID reader which sends a transmission signal to the RF tag via the transmitting antenna and receives a response signal outputted by the tag transmitting unit via the receiving antenna. The RFID reader detects whether or not a article to be managed is present by detecting for changes in the operation characteristics of the tag transmitting unit due to the article to be managed according to changes in either the strength or phase of the response signal from the RF tag.
US09941571B2 Radiating element clamp with integrated cable guide
Aspects of the present disclosure are directed a single clamp for securing one or more radiating elements to a reflector or similar component.
US09941568B2 Transition device between a printed transmission line and a dielectric waveguide, where a cavity that increases in width and height is formed in the waveguide
The invention relates to a transition device between a printed transmission line on a dielectric substrate and a rectangular waveguide including a front face forming an inlet of the waveguide, a rear face parallel to the front face and forming an outlet of the waveguide, a lower face, an upper face parallel to the lower face, the upper and lower faces extending between the front and rear faces, the waveguide being a block of dielectric material whereof the faces are fully metallized except for the front face and the rear face, the transition device including: a three-dimensional cavity formed in the volume of the waveguide between the inlet of the waveguide, further forming the inlet of the cavity, and the rear face widening, the cavity being at an inlet height of the lower face of the waveguide and ending at a distance from the inlet of the cavity at an outlet height greater than the inlet height; an electrical connection extending from the transmission line along the front face of the waveguide up to the inlet of the three-dimensional cavity.
US09941567B2 Integrated PCB interconnect system
An electronic assembly and device are provided. The electronic assembly includes a first circuit board, with PCB pads located adjacent to an edge of the circuit board, and a corresponding plurality of contacts, each contact soldered to one of the PCB pads. Each contact has a first portion, soldered to the PCB pad, and a second portion that extends past the edge of the circuit board and forms a leaf spring. The leaf spring compresses when placed in contact with a PCB pad of a second circuit board, where the PCB pad is substantially coplanar with a surface of the second circuit board. A restoring force of the second portion maintains contact between the second portion and the PCB pad of the second circuit board. The contact forms an electrical connection between the PCB pad of the first circuit board and the PCB pad of the second circuit board.
US09941565B2 Isolator and method of forming an isolator
An isolator device and a corresponding method of forming the isolator device to include first and second electrodes, a layer of first dielectric material between the first and second electrodes, and at least one region of second dielectric material between the layer of first dielectric material and at least one of the first and second electrodes. The second dielectric material has a higher relative permittivity than the first dielectric material.
US09941564B2 Dielectric resonator, assembly method therefor, and dielectric filter
A dielectric resonator includes: two dielectric resonant cylinders and a metal cavity, wherein the dielectric resonant cylinders are located within the metal cavity; and it also includes: a fastener and a connector, wherein bottoms of the dielectric resonant cylinders are connected via the connector to form a U-shaped structure, and the connector is fixed on the metal cavity via the fastener. With the dielectric resonator of the embodiments of the present invention, a good close contact between the dielectric resonant cylinders and the metal cavity can be guaranteed, thereby improving the resonant performance of the dielectric resonator.
US09941562B2 Microwave-frequency filtering structures
A microwave-frequency filtering structure includes two dielectric layers separated by a conducting layer that is etched in the pattern of a filter, the upper and lower exterior faces of the stack being covered over the larger part of their surface by a conducting plane constituting ground planes of the structure, which are interlinked by a metallization of the periphery of the structure; two identical devices, an input and an output transition device, each allowing the passage from a microstrip mode to a stripline mode and vice versa, configured so that the geometry of the transition device is optimized to minimize the standing wave ratios at the ports of the filter, and to minimize the excitation and the coupling of the TE10 mode, two conducting pillars perpendicular to the plane of the structure and situated close to its principal axis, without being coupled with the filter, and linking the upper and lower ground planes.
US09941559B2 Water enhanced ionic liquid electrolytes for metal-air batteries
A metal-air battery comprising an emulsified or dispersed aqueous/ionic liquid two phase electrolyte system is provided. The two phase electrolyte system contains an aqueous phase and an ionic liquid phase wherein an amount of water exceeds the aqueous solubility of the ionic liquid. In one embodiment the metal-air battery is a lithium-air battery.
US09941556B2 Supply unit
The supply unit (1) for an electric motorbike (2) comprises at least two electric batteries (6, 7, 8, 9) and at least a protection container (10, 11, 12) which contains the batteries (6, 7, 8, 9) and which comprises: a cooling plate (12) placed in contact with the batteries (6, 7, 8, 9) and having: a plurality of through holes (13) which communicate with the outside and which cross the cooling plate (12) in the direction of its width and/or its length, each of the holes (13) having an access on a first perimeter side (12a) of the cooling plate (12) and an exit on an opposite second perimeter side (12b) of the cooling plate (12); and two opposite transmission faces (17, 18) in contact with which are placed one or more batteries (6, 7, 8, 9), between the faces (17, 18) being obtained the through holes (13); two cooling half-shells (10, 11), each containing at least one of the batteries (6, 7, 8, 9) and placed in contact with the batteries (6, 7, 8, 9), the half-shells (10, 11) being separated from the cooling plate (12) and joined thereto in correspondence of the transmission faces (17, 18).
US09941555B2 Perforation apparatus and method for electric vehicle battery enclosure
A perforation tool for a battery enclosure system of a vehicle battery pack, comprising: an engaging tip configured to mechanically breach a thermal-control-agent-retaining enclosure of a traction battery pack including a plurality of interconnected batteries with the enclosure reinforced for mechanical protection of the batteries when installed in an electric vehicle; a port for receiving a thermal-control agent having a pressure in a range of about 5-100 psi; and a housing, coupled to the tip and to the port, wherein the tip includes an aperture and wherein the housing includes a channel communicating the port to the aperture wherein the pressurized thermal-control agent is produced at the tip at about the pressure.
US09941552B2 Electrochemical energy generation system having individually controllable cells
Described embodiments include a system and a method. A system includes at least two individually controllable electrochemical cells configured to output electric power. Each individually controllable cell includes an electrolyte, and a first working electrode configured to transfer electrons to or from the electrolyte. Each individually controllable cell includes a second working electrode configured to transfer electrons to or from the electrolyte. Each individually controllable cell includes a gating electrode spaced-apart from the second working electrode and configured if biased relative to the second working electrode to modify an electric charge, field, or potential in the space between the electrolyte and the second working electrode. The system includes a control circuit coupled to apply a respective biasing signal to each gating electrode of each controllable cell of the at least two controllable cells.
US09941550B2 Battery field disconnect method
Embodiments are directed to an apparatus comprising terminals providing a voltage, a monitor configured to receive an input from an entity external to the apparatus indicating that energy associated with the apparatus is to be selectively coupled to, or isolated from the terminals, and a protection mechanism coupled to the monitor and configured to be selectively turned on and turned off based on the input received from the external entity.
US09941545B2 Electrolyte solution for secondary batteries, and secondary battery using same
Disclosed is an electrolyte solution for lithium secondary batteries, including a cyclic sulfonic acid ester represented by the general formula (1): wherein, in the general formula (1), R1 and R2 each independently represent a hydrogen atom, an alkyl group having 1 to 5 carbon atoms, halogen or an amino group with the proviso that R1 and R2 do not represent hydrogen atoms at the same time; and R3 represents methylene which may be substituted with fluorine. Batteries using this electrolyte solution are excellent in battery properties and storage characteristics.
US09941544B2 Nonaqueous electrolytic solution and nonaqueous electrolyte secondary battery
A nonaqueous electrolytic solution that can provide a high energy density nonaqueous electrolyte secondary battery having a high capacity, excellent storage characteristics, and excellent cycle characteristics and suppressing the decomposition of an electrolytic solution and the deterioration thereof when used in a high-temperature environment includes an electrolyte, a nonaqueous solvent, and a compound represented by general formula (1): wherein R1, R2, and R3 each independently represent a hydrogen atom, a cyano group, or an optionally halogen atom-substituted hydrogen group having 1 to 10 carbon atoms, with the proviso that R1 and R2 do not simultaneously represent hydrogen atoms.
US09941543B2 Non-aqueous liquid electrolyte for secondary battery and secondary battery
A non-aqueous liquid electrolyte for a secondary battery, containing: a compound represented by formula (I); an electrolyte; and an organic solvent, in which the non-aqueous liquid electrolyte has a viscosity of 20 mPa·s at 25° C. or less, wherein Ra, Re and Rf each represent an organic group, and Re and Rf may be bonded with each other to form a ring; Xa represents a substituent represented by formula (a) or (b); Rb and Rc each represent a hydrogen atom or a substituent; and Rd represents a hydrogen atom or an organic group.
US09941541B2 Fuel cell stack
In a fuel cell stack, voltage detecting terminals are disposed on a second separator and a third separator of a power generation unit, whereas a voltage detecting terminal is not disposed on a first separator of the power generation unit. Among terminal plates of the fuel cell stack, another voltage detecting terminal is disposed only on the terminal plate that is in contact with the first separator.
US09941539B2 Highly conductive polymer electrolyte membrane comprising ionic liquid
The present invention relates to a highly conductive electrolyte comprising an ionic liquid and to a polymer electrolyte membrane using same, and more particularly, to a highly conductive polymer electrolyte membrane impregnated with a heterocyclic diazole-based ionic liquid and to a method for manufacturing same. The present invention relates to a polymer electrolyte thin film comprising an ionic liquid based on an imidazole compound represented by chemical formula (1), wherein R1 is an alkyl having a carbon number of 1 to 8 and R2 is hydrogen or an alkyl having a carbon number of 1 to 8:
US09941537B2 Fuel cell module and fuel cell device
Problem: To provide a fuel cell module and a fuel cell device with improved power output.Resolution means: A fuel cell module (27) according to the present invention includes: a housing (2); a plurality of cell stack devices (1) arranged inside the housing (2), each cell stack device (1) including a cell stack (3) in which a plurality of fuel cells (2) that generate power using fuel gas and oxygen-containing gas are arranged; and exhaust gas discharge paths (39, 40) formed between the cell stack devices (1) for discharging the exhaust gas from the fuel cells. Consequently, the exhaust gases can be efficiently discharged, thereby improving the power output. A fuel cell device (52) can have improved power output by being provided with the above-described fuel cell module (27).
US09941533B2 Method for generating injection current for fuel cell stack and apparatus for performing the same
An apparatus for generating injection current for a fuel cell stack includes a first converter configured to convert direct current of a voltage corresponding to a battery for a vehicle, into direct current of a predetermined voltage; a second converter configured to convert the converted direct current into alternating current; a filter configured to filter a signal of a predetermined frequency band from the converted alternating current; and a control unit configured to perform a feedback control to allow the filtered alternating current to be injected without being distorted when injecting the filtered alternating current into the fuel cell stack.
US09941532B2 Fuel cell system and control method of fuel cell system
An objection is to provide a technology by which a decline in the starting performance of a fuel cell system may be controlled in a low-temperature environment. A control method of a fuel cell system includes a temperature acquisition step of acquiring a temperature of the fuel cell at start-up of the fuel cell; and an exhaust gas control step of restricting, when the temperature of the fuel cell is below a predetermined value, a flow rate of an exhaust gas flowing into a flow path configuring portion that configures at least a part of a flow path of the exhaust gas of the fuel cell as compared to the flow rate of the exhaust gas flowing into the flow path configuring portion when the temperature of the fuel cell is equal to or less than the predetermined value.
US09941530B2 Fuel cell system including water content estimation
An object is to provide a technique of enhancing the accuracy of estimation of the water content of a fuel cell on the occurrence of localized drying of an electrolyte membrane. In a fuel cell system, until satisfaction of a second condition indicating that localized drying of the electrolyte membrane is eliminated after satisfaction of a first condition indicating that localized drying of the electrolyte membrane occurs, a water content estimator performs a second water content estimation process that estimates the water content of the fuel cell based on an output current value of the fuel cell, in place of a first water content estimation process that estimates the water content of the fuel cell based on an impedance of the fuel cell. The first condition is that an oxidizing gas stoichiometric ratio is equal to or higher than a predetermined reference value and that a first elapsed time has elapsed since the oxidizing gas stoichiometric ratio becomes equal to or higher than the predetermined reference value. The second condition is that an accumulated current value by accumulation of the output current value for a second elapsed time since satisfaction of the first condition is equal to or greater than a reference value of accumulated current value or that the oxidizing gas stoichiometric ratio is lower than the predetermined reference value and that a third elapsed time has elapsed since the oxidizing gas stoichiometric ratio becomes lower than the predetermined reference value.
US09941524B2 Interconnector material, intercellular separation structure, and solid electrolyte fuel cell
Provided is an interconnector material which is chemically stable in both oxidation atmospheres and reduction atmospheres, has a high electron conductivity (electric conductivity), a low ionic conductivity, does not contain Cr, and enables a reduction in sintering temperature. The interconnector material is arranged between a plurality of cells each composed of an anode layer, a solid electrolyte layer, and a cathode layer stacked sequentially, and electrically connects the plurality of cells to each other in series in a solid electrolyte fuel cell. The interconnector is formed of a ceramic composition represented by the composition formula La(Fe1-xAlx)O3 in which 0
US09941523B2 Bilayer cathode catalyst structure for solid polymer electrolyte fuel cell
Use of noble metal alloy catalysts, such as PtCo, as the cathode catalyst in solid polymer electrolyte fuel cells can provide enhanced performance at low current densities over that obtained from the noble metal itself. Unfortunately, the performance at high current densities has been relatively poor. However, using a specific bilayer cathode construction, in which a noble metal/non-noble metal alloy layer is located adjacent the cathode gas diffusion layer and a noble metal layer is located adjacent the membrane electrolyte, can provide superior performance at all current densities.
US09941520B2 Negative electrode for secondary battery and secondary battery including the negative electrode
A negative electrode for a secondary battery, the negative electrode including: a current collector; an interlayer on the current collector and consisting of at least one first polymer selected from a cation-substituted polycarboxylic acid and a copolymer thereof; a negative electrode active material layer on the interlayer and which includes a negative electrode active material and a binder.
US09941517B2 Electrode for lithium battery and production process thereof, and lithium battery
Provided are an electrode for a lithium battery that is capable of providing a lithium battery having both high stability and high battery properties; a process for producing an electrode for a lithium battery, in which a positive electrode plate and/or a negative electrode plate, even when coated with a thermal activation material dissolved in an organic solvent such as a pyrrolidone-based solvent, is prevented from swelling; and a lithium battery including said electrode for a lithium battery. The electrode for a lithium battery includes an electrode plate, a mix layer and a heat insulating layer in this order, wherein the mix layer includes at least an aqueous adhesive and an active material; the heat insulating layer includes at least a thermal activation material; and at least part of the mix layer is in contact with at least part of the heat insulating layer.
US09941516B2 Porous clusters of silver powder comprising zirconium oxide for use in gas diffusion electrodes, and methods of production thereof
This invention provides a rechargeable cell comprising an electrode including: a plurality of porous clusters of silver particles, wherein each cluster includes: (a) a plurality of silver particles, and (b) crystalline particles of zirconium oxide (ZrO2), wherein at least a portion of the crystalline particles of ZrO2 is located in pores formed by a surface of the plurality of silver particles. Electrodes of the present invention catalyze the reduction of oxygen in alkaline solution. When the cell is charged, the silver in the electrodes can be oxidized to Ag2O and further to AgO. Upon discharge, the reduction of the oxidized silver results in additional available energy. This invention provides electrodes for use in rechargeable cells or batteries and methods of making thereof.
US09941514B2 Cathode active material layer, all solid lithium battery, and method of manufacturing cathode active material layer
A cathode active material layer used for an all solid lithium battery, comprising a flat cathode active material with a hollowness in a range of more than 0% to 10%, and a solid electrolyte material, characterized in that the flat cathode active material has an aspect ratio (long axis length/short axis length) of 1.5 or more in a section in a thickness direction of the cathode active material layer, and a ratio of the flat cathode active material of which the short axis direction corresponds to a thickness direction of the cathode active material layer is 30% or more with respect to the whole cathode active material.
US09941510B2 Electrode material, electrode, and lithium ion battery
An electrode material is provided in which a carbon coating film containing an ion-conductive material is formed on surfaces of electrode-active material particles, and at least a portion of a surface of the ion-conductive material is exposed without being coated with the carbon coating film or the ion-conductive material is surrounded by the carbon coating film.
US09941509B2 Silicon particles for battery electrodes
Silicon particles for active materials and electro-chemical cells are provided. The active materials comprising silicon particles described herein can be utilized as an electrode material for a battery. In certain embodiments, the composite material includes greater than 0% and less than about 90% by weight of silicon particles. The silicon particles have an average particle size between about 0.1 μm and about 30 μm and a surface including nanometer-sized features. The composite material also includes greater than 0% and less than about 90% by weight of one or more types of carbon phases. At least one of the one or more types of carbon phases is a substantially continuous phase.
US09941508B2 Cathode active material for secondary battery, method of manufacturing the same, and cathode for lithium secondary battery including the cathode active material
The present invention relates to a cathode active material including a lithium-containing transition metal oxide and two or more metal composite oxide layers selected from the group consisting of Chemical Formulae 1 to 3 which are coated on the surface of the lithium-containing transition metal oxide, a method of manufacturing the same, and a cathode for a secondary battery including the cathode active material, M(C2H5O2)n  [Chemical Formula 1] M(C6H(8-n)O7)  [Chemical Formula 2] M(C6H(8-n)O7)(C2H5O2)  [Chemical Formula 3] (where M, as a metal desorbed from a metal precursor, represents at least one metal selected from the group consisting of Mg, Ca, Sr, Ba, Y, Ti, Zr, V, Nb, Ta, Cr, Mo, W, Mn, Fe, Co, Ir, Ni, Zn, Al, Ga, In, Si, Ge, Sn, La, and Ce, and n is an integer between 1 and 4).
US09941505B2 Battery
A battery includes a shell, a core and a protection component received in the shell. The core includes a first electrode tab connected to a first current collector and a second electrode tab connected to a second current collector of the core. The protection component includes two insulating layers and a conducting layer disposed between two insulating layers. The conducting layer defines a first end electrically connected to the first electrode tab and a second end configured as a free end, and an outmost current collector of the core is configured by the second current collector.
US09941498B2 Polyolefin-based porous film and method for producing the same
A method for producing a polyolefin-based porous film includes an (A) step: a raw fabric forming step for forming a non-porous raw fabric from a polyolefin-based resin composition, a (B) step: an MD cold stretching step for cold stretching the non-porous raw fabric obtained in the (A) step at a temperature of −20° C. to (Tm−30)° C. (Tm is a melting point (° C.) of the non-porous raw fabric) in an extruding direction (MD) of the raw fabric to make the raw fabric porous; a (D) step: a TD cold stretching step for cold stretching a film processed in the (B) step in a direction (TD) perpendicular to the MD, and an (H) step: a thermal fixing step, in the above order.
US09941493B2 Power storage device package material and storage device using the same
A power storage device packaging material includes: a base material layer; a metal foil layer formed on one surface of the base material layer via an adhesive layer; and a sealant layer arranged on a surface of the metal foil layer, the surface of the metal foil layer being on the opposite side to the base material layer, wherein the base material layer contains a polyester resin that contains a polyester elastomer and/or an amorphous polyester.
US09941491B2 Method of manufacturing display device
A manufacturing method of a display device is provided including forming a first insulation film above a region including a display region of a substrate, adsorbing organic molecules to approximately the entire first surface on the opposite side to the substrate of the first insulation film, removing the organic molecules adsorbed to a first region defined as an inner side region not reaching an end part of the first insulation film including the display region on the first surface of the first insulation film, forming a second insulation film in the first region removed of the organic molecules on the first insulation film, removing the organic molecules adsorbed in regions apart from the first region of the first insulation film, and forming a third insulation film contacting the first insulation film at an outer side of the second insulation film above the first insulation film and the second insulation film.
US09941490B1 Manufacture method of quantum dot light-emitting diode display and quantum dot light-emitting diode display
The disclosure provides a manufacture method of a quantum dot light-emitting diode display and a quantum dot light-emitting diode display. The manufacture method of a quantum dot light-emitting diode display provided by the disclosure forms a light-emitting layer by a quantum dot thin film prepared by filming a metal complex solution, compared with a conventional ink jet printing method with quantum dot ink, process parameters can be adjusted easily, a process can be simple, costs can be reduced, three primary colors R, G, B can be adjusted by precisely controlling sub pixel levels, a color film can be omitted, which can be a better industrial design in weight and thickness. According to the quantum dot light-emitting diode display provided by the disclosure, the light-emitting layer is formed by a quantum dot thin film, which can offer the quantum dot light-emitting diode display excellent quality in display, the process is simple.
US09941489B2 Organic light emitting diode display device and manufacturing method thereof
An organic light emitting diode display device includes a first driving voltage line including a first portion extending in a first direction and a second portion having a larger width than the first portion in a second direction perpendicular to the first direction. The second portion overlaps a gate electrode of a driving thin film transistor, an interlayer insulating layer is between the second portion and the gate electrode of the driving thin film transistor.
US09941488B2 Method of manufacturing an organic light emitting display panel
An organic light emitting display panel includes a base substrate, a pixel defining layer disposed on the base substrate, a light emitting structure disposed in an opening of the pixel defining layer, and a mirror pattern disposed on an upper surface of the pixel defining layer. The pixel defining layer defines the opening and includes the upper surface that is in parallel with a surface of the base substrate and a side surface that is connected to the upper surface. The mirror pattern makes contact with the pixel defining layer, and entirely covers the upper surface of the pixel defining layer.
US09941486B2 Component and method for producing a component
Various embodiments may relate to a component. The component includes an optically active region designed for electrically controllably transmitting, reflecting, absorbing, emitting and/or converting an electromagnetic radiation, and an optically inactive region formed alongside the optically active region, wherein the optically inactive region and/or the optically active region have/has an adaptation structure designed to adapt the value of an optical variable in the optically inactive region to a value of the optical variable in the optically active region.
US09941481B2 Light-emitting element, display device, electronic device, and lighting device
A light-emitting element containing a fluorescent material and having high emission efficiency is provided. The light-emitting element contains the fluorescent material and a host material. The host material contains a first organic compound and a second organic compound. The first organic compound and the second organic compound can form an exciplex. The minimum value of a distance between centroids of the fluorescent material and at least one of the first organic compound and the second organic compound is 0.7 nm or more and 5 nm or less.
US09941477B2 Compound for organic photoelectric device and organic photoelectric device, image sensor and electronic device including the same
A compound for an organic photoelectric device is represented by Chemical Formula 1, and an organic photoelectric device, an image sensor and an electronic device include the same.
US09941470B2 RRAM device with data storage layer having increased height
The present disclosure relates to an integrated circuit, which includes a semiconductor substrate and an interconnect structure disposed over the semiconductor substrate. The interconnect structure includes a lower metal layer, an intermediate metal layer disposed over the lower metal layer, and an upper metal layer disposed over the intermediate metal layer. An upper surface of the lower metal layer and a lower surface of the intermediate metal layer are spaced vertically apart by a first distance. A resistive random access memory (RRAM) cell is arranged between the lower metal layer and the upper metal layer. The RRAM cell includes a bottom electrode and a top electrode which are separated by a data storage layer having a variable resistance. The data storage layer vertically spans a second distance that is greater than the first distance.
US09941466B2 Magnetic tunnel junctions, methods used while forming magnetic tunnel junctions, and methods of forming magnetic tunnel junctions
A method used while forming a magnetic tunnel junction comprises forming non-magnetic tunnel insulator material over magnetic electrode material. The tunnel insulator material comprises MgO and the magnetic electrode material comprises Co and Fe. B is proximate opposing facing surfaces of the tunnel insulator material and the magnetic electrode material. B-absorbing material is formed over a sidewall of at least one of the magnetic electrode material and the tunnel insulator material. B is absorbed from proximate the opposing facing surfaces laterally into the B-absorbing material. Other embodiments are disclosed, including magnetic tunnel junctions independent of method of manufacture.
US09941463B2 Magnetic field sensor based on topological insulator and insulating coupler materials
Embodiments are directed to a sensor having a first electrode, a second electrode and a detector region electrically coupled between the first electrode region and the second electrode region. The detector region includes a first layer having a topological insulator. The topological insulator includes a conducting path along a surface of the topological insulator, and the detector region further includes a second layer having a first insulating magnetic coupler, wherein a magnetic field applied to the detector region changes a resistance of the conducting path.
US09941459B2 High fidelity and high efficiency qubit readout scheme
A technique relates to a qubit readout system. A cavity-qubit system has a qubit and a readout resonator and outputs a readout signal. A lossless superconducting circulator is configured to receive the microwave readout signal from the cavity-qubit system and transmit the microwave readout signal according to a rotation. A quantum limited directional amplifier amplifies the readout signal. A directional coupler is connected to and biases the amplifier to set a working point. A microwave bandpass filter transmits in a microwave frequency band by passing the readout signal while blocking electromagnetic radiation outside of the microwave frequency band. A low-loss infrared filter has a distributed Bragg reflector integrated into a transmission line. The low-loss filter is configured to block infrared electromagnetic radiation while passing the microwave readout signal. The low-loss infrared filter is connected to the microwave bandpass filter to receive input of the microwave readout signal.
US09941458B2 Integrated circuit cooling using embedded peltier micro-vias in substrate
A semiconductor device package and method for manufacturing the same, includes a semiconductor substrate including a plurality of embedded thermoelectric couples. The embedded thermoelectric couples can be in trenches and extend partially into the substrate from the handle side of the substrate. An n-type pillar and a p-type pillar are electrically connected using a conducting contact plate to form each of the partially embedded thermoelectric couples. A series connection layer electrically connects the plurality of thermoelectric couples on the handle side. A power source provides electrical current to the series connection layer allowing current to flow through the plurality of the series connected thermoelectric couples. A heat sink is positioned adjacent to the connected thermoelectric couples for transferring heat away from the device side to the heat sink using the thermoelectric couples.
US09941451B2 Light emitting device and method of manufacturing light emitting module
A light emitting device includes a wiring board, a light emitting element, and a protection film. The wiring board includes a base member, and positive and negative wiring layer parts. The positive and negative wiring layer parts are arranged on or above the upper surface of the base member. The light emitting element is mounted on the wiring layer parts in a flip-chip manner. The protection film covers the base member, the wiring layer parts and the light emitting element, and is formed of an inorganic material for serving as the exterior surface of the light emitting device. Each of the wiring layer parts has a curved outer-side edge. The curvature of the outer-side edge is substantially constant.
US09941450B2 Roll-to-roll fabricated light sheet and encapsulated semiconductor device
A bottom electrically conductive surface is disposed on the top surface of a substrate and a top electrically conductive surface disposed on the bottom surface of a superstrate. A bare die electronic device is disposed with at least one of its top conductor in direct electrical communication with the bottom electrically conductive surface and/or its bottom conductor in direct electrical communication with the top conductive surface. A non-conductive adhesive secures the substrate to the superstrate so that the bare die electronic device is retained in direct electrical communication. The non-conductive adhesive has a melting point temperature at least greater than a minimum operating temperature of the operating temperature range of the bare die, so that the non-conductive adhesive does not melt and flow thereby preventing a separation or degradation of the direct electrical connection of the bare die electronic device.
US09941445B2 Method for randomly texturing a semiconductor substrate
The invention relates to a method for texturing a semiconductor substrate (1), comprising steps consisting in forming a plurality of cavities of random shapes, depths and distribution, in an etch mask (2), by means of non-homogeneous reactive-ion etching, forming a first rough random design, and etching the substrate using the etch mask, by means of reactive-ion etching, in such a way as to transfer the first rough random design into the substrate and to produce a second rough random design (200), comprising cavities (20) of random shapes, depths (d2r) and distribution, on the surface of the substrate.
US09941444B2 Light emitting diode with structured substrate
Embodiments of the invention include a semiconductor light emitting device. The device includes a substrate having a first surface and a second surface opposite the first surface. The device further includes a semiconductor structure disposed on the first surface of the substrate. A cavity is disposed within the substrate. The cavity extends from the second surface of the substrate. The cavity has a sloped side wall.
US09941437B2 Solar cell
A solar cell has a condenser lens and a solar cell element, the solar cell element including an n-type InGaAs layer, an n-type GaAs layer, an n-type InGaP layer, the first InGaAs peripheral part having a thickness (d2), and a width (w2), the second InGaAs peripheral part having a thickness (d3), and a width (w3), the first GaAs peripheral part having a thickness (d5), and a width (w4), the second GaAs peripheral part a thickness (d6), and a width (w5), the first InGaP peripheral part having a thickness (d8), and a width (w6), the second InGaP peripheral part having a thickness (d9), and a width (w7), the following inequation set being satisfied: 1 nm≤(d2, d3, d5, and d6)≤4 nm, 1 nm≤(d8 and d9)≤5 nm, 100 nm≤(w2, w3, w4, w5, w6, and w7), the InGaAs center part having a thickness (w1), a window layer has a range S irradiated by sunlight having a width (w8); w8≤w1.
US09941425B2 Photoactive devices and materials
Deposition processes are disclosed herein for depositing thin films comprising a dielectric transition metal compound phase and a conductive or semiconducting transition metal compound phase on a substrate in a reaction space. Deposition processes can include a plurality of super-cycles. Each super-cycle may include a dielectric transition metal compound sub-cycle and a reducing sub-cycle. The dielectric transition metal compound sub-cycle may include contacting the substrate with a dielectric transition metal compound. The reducing sub-cycle may include alternately and sequentially contacting the substrate with a reducing agent and a nitrogen reactant. The thin film may comprise a dielectric transition metal compound phase embedded in a conductive or semiconducting transition metal compound phase.
US09941424B2 Solar cell
A solar cell according to the embodiment includes a substrate; a first electrode layer on a substrate; a light absorbing layer on the first electrode layer; a second electrode layer including a transmissive conductive material on the light absorbing layer; and a grid electrode including a transmissive conductive material on the second electrode layer.
US09941423B2 Method for manufacturing thin film solar cell
A method for manufacturing a thin film solar cell includes: depositing a transparent first rear electrode on a first surface of a transparent substrate; depositing a second rear electrode having a high-conductive metal on the first rear electrode; performing a first laser scribing process to separate a double layer of the first and second rear electrodes; depositing a light absorption layer having selenium (Se) or sulfur (S) on the second rear electrode; performing a second laser scribing process by inputting a laser to a second surface of the transparent substrate to separate the light absorption layer; depositing a transparent electrode on the light absorption layer; and performing a third laser scribing process by inputting a laser to the second surface to separate the transparent electrode. Accordingly, patterning may be performed in a substrate-incident laser manner to improve price, productivity and precision of the patterning process.
US09941416B2 MOS transistor and method of manufacturing the same
A MOS transistor includes a semiconductor layer resting on an insulator and having a substantially planar upper surface. The semiconductor layer extends down to a first depth in the channel region, and down to a second depth, greater than the first depth, in the source and drain regions. In the channel region, the semiconductor layer is formed from a portion of an upper semiconductor layer of a silicon on insulator substrate. In the source and drain regions, the semiconductor layer is formed by epitaxially grown semiconductor material.
US09941412B2 Display device
According to one embodiment, a display device includes a first scanning line, a signal line, a second pixel electrode, a first pixel electrode, a second thin-film transistor, a first line and a second line. The first line is connected to the second pixel electrode, and extends through a region facing the first pixel electrode to the first scanning line side. The first line and a second semiconductor layer of the second thin-film transistor are provided on a first insulating film and are formed of a same material. The second line connects the first line and a fourth electrode of the second thin-film transistor.
US09941410B2 Oxide thin film transistor and method of fabricating the same
The present disclosure relates to an oxide thin film transistor and a fabricating method thereof. In the oxide thin film transistor, which uses amorphous zinc oxide (ZnO) semiconductor as an active layer, damage to the oxide semiconductor due to dry etching may be minimized by forming source and drain electrodes in a multilayered structure having at least two layers, and improving stability and reliability of a device by employing a dual passivation layer structure, which includes a lower layer for overcoming an oxygen deficiency and an upper layer to minimize effects of an external environment on the multilayered source and drain electrodes.
US09941407B2 Method of forming FinFET
A method of forming a FinFET is provided. A gate oxide layer and a dummy poly layer are substantially simultaneously etched using an etchant having a higher selectivity on the gate oxide layer than on the dummy poly layer. The gate oxide layer and the dummy poly layer are intersected with the gate oxide layer over a fin layer of the FinFET.
US09941389B2 Fabricating large area multi-tier nanostructures
Methods for fabricating and replicating self-aligned multi-tier nanoscale structures for a variety of cross-sectional geometries. These methods can utilize a single lithography step whereby the need for alignment and overlay in the process is completely eliminated thereby enabling near-zero overlay error. Furthermore, techniques are developed to use these methods to fabricate self-aligned nanoscale multi-level/multi-height patterns with various shapes for master templates, replica templates and nanoimprint based pattern replication. Furthermore, the templates can be used to pattern multiple levels in a sacrificial polymer resist and achieve pattern transfer of the levels into a variety of substrates to form completed large area nanoelectronic and nanophotonic devices using only one patterning step.
US09941387B2 FinFET having a gate electrode with sidewall spacers having asymmetric dielectric constants and method of manufacturing
A semiconductor device may include the following elements: a fin member including a first doped portion, a second doped portion, and a semiconductor portion positioned between the first doped portion and the second doped portion; a composite structure including a conductor and an insulator positioned between the conductor and the semiconductor portion in a first direction; a first spacer having a first dielectric constant and positioned close to the second doped portion; a second spacer having a second dielectric constant and positioned close to the first doped portion; and a third spacer having a third dielectric constant. The second spacer is positioned between the third spacer and the fin member in the first direction. The composite structure is positioned between the first spacer and the second spacer. The first dielectric constant is less than at least one of the second dielectric constant and the third dielectric constant.
US09941384B2 Semiconductor device and method for fabricating the same
A semiconductor device includes a first III-V compound layer on a substrate, a second III-V compound layer on the first III-V compound layer, in which a material of the first III-V compound layer is different from that of the second III-V compound layer, a gate metal stack disposed on the second III-V compound layer, a source contact and a drain contact disposed at opposite sides of the gate metal stack, a gate field plate disposed between the gate metal stack and the drain contact, an anti-reflective coating (ARC) layer formed on the source contact and the drain contact, and an etch stop layer formed on the ARC layer.
US09941382B2 Metal-semiconductor-metal (MSM) heterojunction diode
In one aspect, a diode comprises: a semiconductor layer having a first side and a second side opposite the first side, the semiconductor layer having a thickness between the first side and the second side, the thickness of the semiconductor layer being based on a mean free path of a charge carrier emitted into the semiconductor layer; a first metal layer deposited on the first side of the semiconductor layer; and a second metal layer deposited on the second side of the semiconductor layer.
US09941377B2 Semiconductor devices with wider field gates for reduced gate resistance
Semiconductor devices with wider field gates for reduced gate resistance are disclosed. In one aspect, a semiconductor device is provided that employs a gate. The gate is a conductive line disposed above the semiconductor device to form transistors corresponding to active semiconductor regions. Each active semiconductor region has a corresponding channel region. Portions of the gate disposed over each channel region are active gates, and portions not disposed over the channel region, but that are disposed over field oxide regions, are field gates. A voltage differential between each active gate and a source of each corresponding transistor causes current flow in a channel region when the voltage differential exceeds a threshold voltage. The width of each field gate is a larger width than each active gate. The larger width of the field gates results in reduced gate resistance compared to devices with narrower field gates.
US09941375B2 Method for manufacturing a semiconductor device having silicide layers
A method for manufacturing a semiconductor device includes providing a semiconductor substrate having a first side. A trench having a bottom is formed. The trench separates a first mesa region from a second mesa region formed in the semiconductor substrate. The trench is filled with an insulating material, and the second mesa region is removed relative to the insulating material filled in the trench to form a recess in the semiconductor substrate. In a common process, a first silicide layer is formed on and in contact with a top region of the first mesa region at the first side of the semiconductor substrate and a second silicide layer is formed on and in contact with the bottom of the recess.
US09941374B2 Contacts for highly scaled transistors
A semiconductor device and methods of forming the same are disclosed. The semiconductor device includes a substrate, first and second source/drain (S/D) regions, a channel between the first and second S/D regions, a gate engaging the channel, and a contact feature connecting to the first S/D region. The contact feature includes first and second contact layers. The first contact layer has a conformal cross-sectional profile and is in contact with the first S/D region on at least two sides thereof. In embodiments, the first contact layer is in direct contact with three or four sides of the first S/D region so as to increase the contact area. The first contact layer includes one of a semiconductor-metal alloy, an III-V semiconductor, and germanium.
US09941373B2 Metal gate structure
A device comprises a metal gate structure over a substrate, wherein the metal gate structure comprises a first metal sidewall, a metal bottom layer, a first corner portion between the first metal sidewall and the metal bottom layer, wherein the first corner portion comprises a first step and a first ramp, a second metal sidewall and a second corner portion between the second metal sidewall and the metal bottom layer, wherein the second corner portion comprises a second step and a second ramp.
US09941372B2 Semiconductor device having electrode and manufacturing method thereof
The invention relates to integrated circuit fabrication, and more particularly to a semiconductor device with an electrode. An exemplary structure for a semiconductor device comprises a semiconductor substrate; an electrode over the semiconductor substrate, wherein the electrode comprises a trench in an upper portion of the electrode; and a dielectric feature in the trench.
US09941367B2 Wrap-around contact on FinFET
A fin structure is on a substrate. The fin structure includes an epitaxial region having an upper surface and an under-surface. A contact structure on the epitaxial region includes an upper contact portion and a lower contact portion. The upper contact portion includes a metal layer over the upper surface and a barrier layer over the metal layer. The lower contact portion includes a metal-insulator-semiconductor (MIS) contact along the under-surface. The MIS contact includes a dielectric layer on the under-surface and the barrier layer on the dielectric layer.
US09941364B2 High voltage semiconductor device and method of manufacturing the same
In embodiments, a high voltage semiconductor device includes a gate structure disposed on a substrate, a source region disposed at a surface portion of the substrate adjacent to one side of the gate structure, a drift region disposed at a surface portion of the substrate adjacent to another side of the gate structure, a drain region disposed at a surface portion of the drift region spaced from the gate structure, and an electrode structure disposed on the drift region to generate a vertical electric field between the gate structure and the drain region.
US09941363B2 III-V transistor device with self-aligned doped bottom barrier
A semiconductor device comprises a first layer of a substrate arranged on a second layer of the substrate the second layer of the substrate including a doped III-V semiconductor material barrier layer, a gate stack arranged on a channel region of the first layer of a substrate, a spacer arranged adjacent to the gate stack on the first layer of the substrate, an undoped epitaxially grown III-V semiconductor material region arranged on the second layer of the substrate, and an epitaxially grown source/drain region arranged on the undoped epitaxially grown III-V semiconductor material region, and a portion of the first layer of the substrate.
US09941356B1 JFET and method for fabricating the same
A junction field effect transistor includes a substrate and a gate region having a first conductive type in the substrate. Source/drain regions of a second conductive type opposite to the first conductive type are disposed in the substrate on opposite sides of the gate region. A pair of high-voltage well regions of the second conductive type are disposed beneath the source/drain regions. A channel region is provided beneath the gate region and between the pair of high-voltage well regions. The channel region is of the second conductive type and has a dopant concentration lower than that of the pair of high-voltage well regions.
US09941354B2 Semiconductor device comprising a first gate trench and a second gate trench
A semiconductor device includes a first gate trench and a second gate trench in a first main surface of a semiconductor substrate. A mesa is arranged between the first gate trench and the second gate trench. The mesa separates the first gate trench from the second gate trench. Each of the first and second gate trenches includes first sections extending in a first direction and second sections connecting adjacent ones of the first sections. The second sections of the first gate trench are disposed opposite to the second sections of the second gate trench with respect to a plane perpendicular to the first direction.
US09941349B2 Superjunction semiconductor device with oppositely doped semiconductor regions formed in trenches
A trench etch mask is formed on a process surface of a semiconductor layer. By using the trench etch mask, both first trenches and second trenches are formed that extend from the process surface into the semiconductor layer. The first and second trenches alternate along at least one horizontal direction parallel to the process surface. First semiconductor regions of a first conductivity type are formed in the first trenches. Second semiconductor regions of a second, opposite conductivity type are formed in the second trenches.
US09941346B2 Display device and semiconductor device
An object is to provide a display device with a high aperture ratio or a semiconductor device in which the area of an element is large. A channel formation region of a TFT with a multi-gate structure is provided under a wiring that is provided between adjacent pixel electrodes (or electrodes of an element). In addition, a channel width direction of each of a plurality of channel formation regions is parallel to a longitudinal direction of the pixel electrode. In addition, when a channel width is longer than a channel length, the area of the channel formation region can be increased.
US09941344B2 Organic light emitting display device
Embodiments relate to an organic light emitting display device according to the present disclosure including: a plurality of pixels which includes red, white, blue, and green sub-pixels; driving transistor, each of which is disposed in each sub-pixel; and organic light emitting diodes, each of which is disposed corresponding to each sub-pixel, wherein a first step portion, first and second bank layers, and a first step compensation portion are disposed between the white sub-pixel and a sub-pixel adjacent thereto, thereby having an effect of suppressing a short circuit defect and a light leakage defect. In addition, an organic light emitting display device according to the present disclosure includes: red, white, blue, and green sub-pixels; at least one step portion between the sub-pixels; first and second bank layers; and a step compensation portion, thereby having an effect of suppressing a short circuit defect and a light leakage defect.
US09941343B2 Area sensor and display apparatus provided with an area sensor
An area sensor of the present invention has a function of displaying an image in a sensor portion by using light-emitting elements and a reading function using photoelectric conversion devices. Therefore, an image read in the sensor portion can be displayed thereon without separately providing an electronic display on the area sensor. Furthermore, a photoelectric conversion layer of a photodiode according to the present invention is made of an amorphous silicon film and an N-type semiconductor layer and a P-type semiconductor layer are made of a polycrystalline silicon film. The amorphous silicon film is formed to be thicker than the polycrystalline silicon film. As a result, the photodiode according to the present invention can receive more light.
US09941342B2 Organic light emitting diode display
An organic light emitting diode display includes: a substrate; a substrate insulating layer on the substrate; a capacitor on the substrate insulating layer; a driving thin film transistor including a driving gate electrode connected to the capacitor; and an organic light emitting element connected to the driving thin film transistor, where the capacitor includes: a first capacitor electrode on the substrate insulating layer; a second capacitor electrode on the first capacitor electrode; a capacitor insulating layer between the first capacitor electrode and the second capacitor electrode and contacting the first capacitor electrode and the second capacitor electrode, the capacitor insulating layer having a higher dielectric constant than the substrate insulating layer; and an auxiliary electrode contacting at least one of the first capacitor electrode or the second capacitor electrode.
US09941338B2 Organic light-emitting diode display and method of manufacturing the same
An organic light-emitting diode display and a method of manufacturing the same are disclosed. In one aspect, the display includes a substrate including a display area configured to display an image and a peripheral area surrounding the display area. The display also includes a thin film transistor formed in the display area over the substrate, a first planarization layer covering the TFT in the display area, and an OLED formed over the first planarization layer and electrically connected to the TFT. The display also includes a second planarization layer formed in the peripheral area, the second planarization layer including a plurality of out-gassing holes formed therein, and at least a portion of the second planarization layer thinner than the first planarization layer.
US09941337B2 Flexible display device with wire having reinforced portion
There is provided a flexible display having a plurality of innovations configured to allow bending of a portion or portions to reduce apparent border size and/or utilize the side surface of an assembled flexible display.
US09941335B2 Display device
A display device is provided. A display panel includes a display area and a pad area. A connector is connected to the pad area. A PCB is connected to the connector. A filling member is disposed between a side surface of the display panel and the connector.
US09941332B2 Semiconductor memory device and structure
A semiconductor memory, including: a first memory cell including a first transistor; a second memory cell including a second transistor; and a memory peripherals transistor overlaying the second transistor or underneath the first transistor, where the second memory cell overlays the first memory cell, and where the first memory cell and the second memory cell have both been processed following a lithography step and accordingly are precisely aligned, and where the memory peripherals transistor is part of a peripherals circuit controlling the memory.
US09941331B1 Device with sub-minimum pitch and method of making
A method is provided that includes forming a first level above a substrate, forming a second level above the first level, and forming a third level above the second level. The first level includes a plurality of first elements having a first minimum pitch, the second level includes a plurality of second elements having a second minimum pitch greater than the first minimum pitch, and the third level includes a plurality of third elements having a third minimum pitch greater than the first minimum pitch. The second elements are disposed above and aligned with a first plurality of the first elements, and the third elements are disposed above and aligned with a second plurality of the first elements.
US09941326B2 Method of manufacturing an image sensor by joining a pixel circuit substrate and a logic circuit substrate and thereafter thinning the pixel circuit substrate
The present technology includes: bonding a device formation side of a first substrate having a first device and a device formation side of a second substrate having a second device in opposition to each other; forming a protective film on at least an edge of the second substrate having the second device; and reducing a thickness of the first substrate.
US09941324B2 Semiconductor device, method of manufacturing semiconductor device, photodiode array, and imaging apparatus
A semiconductor device includes: a thin film transistor including an oxide semiconductor layer that is formed in an island shape and contains at least one or more elements among indium, gallium, zinc, and tin and oxygen, a source and a drain that are connected to the oxide semiconductor layer; a protective film of at least one or more layers that is formed in an upper layer of the oxide semiconductor layer, and an opening portion that is disposed in the protective film and has a position and a size for including a channel region or a back channel region of the oxide semiconductor layer; and a photodiode that is disposed in an upper layer upper than the oxide semiconductor layer of the thin film transistor and includes a hydrogenated amorphous silicon layer.
US09941323B2 Semiconductor device and method for production of semiconductor device
A semiconductor device with a connection pad in a substrate, the connection pad having an exposed surface made of a metallic material that diffuses less readily into a dielectric layer than does a metal of a wiring layer connected thereto.
US09941322B2 Through electrode of a device substrate
A semiconductor unit includes: a first device substrate including a first semiconductor substrate and a first wiring layer, in which the first wiring layer is provided on one surface side of the first semiconductor substrate; a second device substrate including a second semiconductor substrate and a second wiring layer, in which the second device substrate is bonded to the first device substrate, and the second wiring layer is provided on one surface side of the second semiconductor substrate; a through-electrode penetrating the first device substrate and a part or all of the second device substrate, and electrically connecting the first wiring layer and the second wiring layer to each other; and an insulating layer provided in opposition to the through-electrode, and penetrating one of the first semiconductor substrate and the second semiconductor substrate.
US09941316B2 Multi-terminal optoelectronic devices for light detection
Various embodiments include methods and apparatuses for forming and using pixels for image sensors. In one embodiment, an image sensor is disclosed. The image sensor includes an optically sensitive material; a plurality of electrodes proximate the optically sensitive material, including at least a first electrode, a second electrode and a third electrode; and a charge store. The first electrode is coupled to the charge store, and the first electrode and the second electrode are configured to provide a bias to the optically sensitive material to direct photocarriers to the charge store. Other methods and apparatuses are disclosed.
US09941315B2 Photoelectric conversion device and imaging system
A photoelectric conversion device includes a photoelectric conversion unit including a first and second electrodes, a photoelectric conversion layer between the first and second electrodes, and an insulating layer between the photoelectric conversion layer and the second electrodes, an amplifier unit connected to the second electrode and outputs a signal generated in the photoelectric conversion unit, and a reset unit for resetting a voltage of the second electrode. An accumulating operation for accumulating signal charges in the photoelectric conversion unit and a charge removing operation for removing the signal charges from the photoelectric conversion unit are alternately executed in accordance with a voltage applied between the first and second electrodes, and the charge removing operation is executed multiple times between a first accumulating operation and a second accumulating operation which is executed after the first accumulating operation.
US09941310B2 Driver circuit with oxide semiconductor layers having varying hydrogen concentrations
The silicon nitride layer 910 formed by plasma CVD using a gas containing a hydrogen compound such as silane (SiH4) and ammonia (NH3) is provided on and in direct contact with the oxide semiconductor layer 905 used for the resistor 354, and the silicon nitride layer 910 is provided over the oxide semiconductor layer 906 used for the thin film transistor 355 with the silicon oxide layer 909 serving as a barrier layer interposed therebetween. Therefore, a higher concentration of hydrogen is introduced into the oxide semiconductor layer 905 than into the oxide semiconductor layer 906. As a result, the resistance of the oxide semiconductor layer 905 used for the resistor 354 is made lower than that of the oxide semiconductor layer 906 used for the thin film transistor 355.
US09941306B2 Display device
To make the dimension of an electrostatic protection circuit small with the same maintained high in sensitivity. The electrostatic protection circuit is of the configuration that a first diode and a second diode are connected in series, wherein a semiconductor layer owned by each diode is configured to be sandwiched between a gate electrode and a conductive light shielding film. The light shielding film is formed to overlap with the semiconductor layer and has a wider area than the semiconductor layer. This results in having a gate covering the semiconductor layer from an upper side and a back gate covering the semiconductor layer from a lower side, so that the sensitivity can be maintained high irrespective of decreasing the electrostatic protection circuit in dimension.
US09941305B2 Pixel structure and fabrication method thereof
A pixel structure and a fabrication method thereof are provided, and the fabrication method includes steps as follows. A gate and a scan line connected to the gate electrode are formed on a substrate. An insulation layer is formed on the substrate and is patterned to form an opening corresponding to the gate electrode. A gate insulation layer is formed to cover the gate electrode and the scan line. A channel layer is formed on the gate insulation layer and is located in the opening. A first ohmic contact layer and a second ohmic contact layer are formed on the channel layer and are located in the opening. A source electrode, a drain electrode and a data line connected to the source electrode are formed on the first ohmic contact layer and the second ohmic contact layer. A first electrode is formed and is electrically connected to the drain electrode.
US09941298B2 Methods of forming integrated structures comprising vertical channel material and having conductively-doped semiconductor material directly against lower sidewalls of the channel material
Some embodiments include an integrated structure having vertically-stacked conductive levels. Upper conductive levels are memory cell levels, and a lower conductive level is a select device level. Conductively-doped semiconductor material is under the select device level. Channel material extends along the memory cell levels and the select device level, and extends into the conductively-doped semiconductor material. A region of the channel material that extends into the conductively-doped semiconductor material is a lower region of the channel material and has a vertical sidewall. Tunneling material, charge-storage material and charge-blocking material extend along the channel material and are between the channel material and the conductive levels. The tunneling material, charge-storage material and charge-blocking material are not along at least a portion of the vertical sidewall of the lower region of the channel material, and the conductively-doped semiconductor material is directly against such portion. Some embodiments include methods of forming integrated structures.
US09941289B2 Anti-fuse type nonvolatile memory cells, arrays thereof, and methods of operating the same
An anti-fuse type nonvolatile memory cell includes a semiconductor layer having a first conductivity type, a junction region having a second conductivity type and a trench isolation layer disposed in an upper portion of the semiconductor layer spaced apart from each other by a channel region, an anti-fuse insulation pattern disposed on the channel region, a gate electrode disposed on the anti-fuse insulation pattern, a gate spacer disposed on sidewalls of the anti-fuse insulation pattern and the gate electrode, a word line connected to the gate electrode, and a bit line connected to the junction region. The anti-fuse insulation pattern is broken if a first bias voltage and a second bias voltage are applied to the word line and the bit line, respectively.
US09941288B2 Static random-access memory (SRAM) cell array
A static random-access memory (SRAM) cell array forming method includes the following steps. A plurality of fin structures are formed on a substrate, wherein the fin structures include a plurality of active fins and a plurality of dummy fins, each PG (pass-gate) FinFET shares at least one of the active fins with a PD (pull-down) FinFET, and at least one dummy fin is disposed between the two active fins having two adjacent pull-up FinFETs thereover in a static random-access memory cell. At least a part of the dummy fins are removed. The present invention also provides a static random-access memory (SRAM) cell array formed by said method.
US09941286B2 Semiconductor devices and methods for manufacturing the same
A method for manufacturing a semiconductor device includes forming first and second lower structures including selection elements on first and second chip regions of a substrate, respectively, forming first and second mold layers on the first and second lower structures, respectively, forming first and second support layers on the first and second mold layers, respectively, patterning the first support layer and the first mold layer to form first holes exposing the first lower structure, forming first lower electrodes in the first holes, forming a support pattern including at least one opening by selectively patterning the first support layer while leaving the second support layer, and removing the first mold layer through the opening. A top surface of the support pattern is disposed at a substantially same level as a top surface of the second support layer.
US09941285B2 Pattern forming method and semiconductor device manufacturing method using the same
A method for forming patterns includes forming an etch target layer; etching the etch target layer to form a pre-pattern having a line forming portion and a plurality of pad portions; forming a plurality of spacers which extend across the pad portions and the line forming portion; forming, over the spacers, a blocking layer having an opening which blocks the pad portions and exposes the line forming portion; and etching the line forming portion by using the blocking layer and the spacers as a barrier, to form a plurality of line portions.
US09941284B2 Semiconductor device
A semiconductor device aims to prevent a leak current from flowing between a well and a corner of an active region formed on an upper surface of another well in an SRAM. In a memory cell of the SRAM, a load MOSFET is formed. An end of an active region extending in y-direction is arranged to gradually go away from a p-well as it goes from a gate electrode G2 side to a gate electrode G4 side in such a manner that a distance in x-direction between the end of the active region and the p-well is larger than a shortest distance in the x-direction between the p-well and the active region.
US09941282B2 Integrated metal gate CMOS devices
A semiconductor device comprises a first semiconductor fin arranged on a substrate, the first semiconductor fin having a first channel region, and a second semiconductor fin arranged on the substrate, the second semiconductor fin having a second channel region. A first gate stack is arranged on the first channel region. The first gate stack comprises a first metal layer arranged on the first channel region, a work function metal layer arranged on the first metal layer, and a work function metal arranged on the work function metal layer. A second gate stack is arranged on the second channel region, the second gate stack comprising a work function metal arranged on the second channel region.
US09941273B2 Semiconductor device and method of manufacturing the semiconductor device
A semiconductor device includes: a semiconductor substrate including a trench provided in a surface of the semiconductor substrate; a trench electrode provided in the trench; an interlayer insulating film covering a surface of the trench electrode and protruding from the surface of the semiconductor substrate; a Schottky electrode provided on the surface of the semiconductor substrate, provided in a position separated from the interlayer insulating film, and being in Schottky contact with the semiconductor substrate; an embedded electrode provided in a concave portion between the interlayer insulating film and the Schottky electrode and made of a metal different from a metal of the Schottky electrode; and a surface electrode covering the interlayer insulating film, the embedded electrode, and the Schottky electrode.
US09941271B2 Fin-shaped field effect transistor and capacitor structures
A fin-shaped field-effect transistor device is provided. The fin-shaped field effect transistor device may include a semiconductor substrate having a top and a bottom surface. The fin-shaped field effect transistor device may also include a fin structure disposed on the top surface of the semiconductor substrate, where the fin structure includes a first sidewall and a second sidewall opposite of the first sidewall. The first sidewall is adjacent to a first region of the top surface of the semiconductor substrate and the second sidewall is adjacent to a second region of the top surface of the semiconductor substrate. The fin-shaped field effect transistor device may also include an insulation layer disposed above the fin structure and the first and second regions of the top surface. The fin-shaped field effect transistor device may also include a conductor structure disposed above and adjacent to the insulation layer.
US09941269B2 Power semiconductor device including well extension region and field-limiting rings
A drift region has a first conductivity type. A well region is at least partially included in an interface area, has an end portion between the interface area and an edge termination area, and has a second conductivity type. An extension region extends outward from the well region, is shallower than the well region, and has the second conductivity type. A plurality of field-limiting rings are provided outside the extension region in the edge termination area. Each of the field-limiting rings together with the drift region located on the inner side forms a unit structure. The field-limiting ring located closer to the outside has a lower proportion of a width to a width of the unit structure. The unit structure located closer to the outside has a lower average dose.
US09941268B2 Series resistor over drain region in high voltage device
Some embodiments relate to a semiconductor device. The semiconductor device includes a drain region and a channel region surrounding the drain region. A source region surrounds the channel region such that the channel region separates the drain region from the source region. A gate electrode is arranged over the channel region and has an inner edge proximate to the drain. A resistor structure, which is made up of a curved or polygonal path of resistive material, is arranged over the drain and is coupled to the drain. The resistor structure is perimeterally bounded by the inner edge of the gate electrode.
US09941265B2 Circuitry with voltage limiting and capactive enhancement
Aspects of the present disclosure are directed to circuitry operable with enhanced capacitance and mitigation of avalanche breakdown. As may be implemented in accordance with one or more embodiments, an apparatus and/or method involves respective transistors of a cascode circuit, one of which controls the other in an off state by applying a voltage to a gate thereof. A plurality of doped regions are separated by trenches, with the conductive trenches being configured and arranged with the doped regions to provide capacitance across the source and the drain of the second transistor, and restricting voltage at one of the source and the drain of the second transistor, therein mitigating avalanche breakdown of the second transistor.
US09941263B2 Semiconductor integrated circuit device
Disclosed herein is a semiconductor integrated circuit device which includes a standard cell with a plurality of fins extending in a first direction and arranged in a second direction that is perpendicular to the first direction. An active fin of the fins forms part of an active transistor. A dummy fin of the fins is disposed between the active fin and an end of the standard cell.
US09941258B2 LED lead frame array for general illumination
An LED lead frame assembly includes a circuit strip assembly, a plastic dam member overmolded onto the circuit strip assembly and a LED chip assembly disposed in a pocket of the plastic dam member. The LED chip assembly is electrically coupled to the circuit strip assembly to power the LED chip assembly.
US09941257B2 Embedded stacked die packages and related methods
Forming a semiconductor package includes coupling electrically conductive elements with a substrate, coupling a first die with one or more of the electrically conductive elements, and at least partially encapsulating the first die and electrically conductive elements in a first mold layer. A first redistribution layer (RDL) is placed over the first mold layer and electrically coupled with the first die. A second die is coupled with the first RDL, and the second die and first RDL are at least partially encapsulated in a second mold layer. A second RDL is formed over the second mold layer and is electrically coupled with the second die. A third mold layer at least partially encapsulates the second RDL. A portion of the substrate is removed to expose (and a solder mask is applied to) surfaces of the electrically conductive elements and of the first mold layer to form a stacked embedded package.
US09941256B1 Inverse diode stack
A packaged inverse diode device exhibits superior commutation robustness. The device includes a stack of inverse diodes disposed within a housing. Each adjacent pair of inverse diodes is bonded together by an intervening DMB (Direct Metal Bonded) substrate structure. At one end of the stack of diode dice and DMB substrate structures is attached a first metal terminal. A second metal terminal is attached to the other end of the stack. The two terminals serve as package terminals of the overall device. In a novel method, the device undergoes severe commutation. A large forward current is made to flow through the diode stack, followed by a rapid reversal of the voltage across the stack to a large reverse polarity voltage. Despite a substantial rate of change of the commutation current at the onset of the reverse voltage condition, the inverse diode device is not damaged.
US09941255B2 Power semiconductor module
A power semiconductor module includes: a positive arm and a negative arm that are formed by series connection of self-arc-extinguishing type semiconductor elements and that are connected at a connection point between the self-arc-extinguishing type semiconductor elements; a positive-side DC electrode, a negative-side DC electrode, and an AC electrode that are connected to the positive arm and the negative arm; and a substrate on which a wiring pattern is formed, the wiring pattern connecting the self-arc-extinguishing type semiconductor elements of the positive arm and the negative arm to the positive-side DC electrode, the negative-side DC electrode and the AC electrode. The positive-side DC electrode, the negative-side DC electrode, and the AC electrode are insulated from one another and arranged such that one of the electrodes faces each of the other two electrodes.
US09941252B2 Semiconductor package
A semiconductor package includes a first semiconductor chip including a through silicon via in the first semiconductor chip and a first trench portion in an upper portion of the first semiconductor chip, a second semiconductor chip on an upper surface of the first semiconductor chip and being electrically connected to the first semiconductor chip through the through silicon via of the first semiconductor chip, and an insulating bonding layer between the first semiconductor chip and the second semiconductor chip. The insulating bonding layer fills the first trench portion.
US09941249B2 Multi-wafer stacking by Ox-Ox bonding
A stacked semiconductor device and a method of forming the stacked semiconductor device are provided. A plurality of integrated circuits are bonded to one another to form the stacked semiconductor device. After each bonding step to bond an additional integrated circuit to a stacked semiconductor device formed at the previous bonding step, a plurality of conductive plugs are formed to electrically interconnect the additional integrated circuit to the stacked semiconductor device formed at the previous bonding step.
US09941245B2 Integrated circuit packages including high density bump-less build up layers and a lesser density core or coreless substrate
In some embodiments, integrated circuit packages including high density bump-less build up layers and a lesser density core or coreless substrate are presented. In this regard, an apparatus is introduced having a first element including a microelectronic die having an active surface and at least one side, an encapsulation material adjacent said at least one microelectronic die side, wherein said encapsulation material includes at least one surface substantially planar to said microelectronic die active surface, a first dielectric material layer disposed on at least a portion of said microelectronic die active surface and said encapsulation material surface, a plurality of build-up layers disposed on said first dielectric material layer, and a plurality of conductive traces disposed on said first dielectric material layer and said build-up layers and in electrical contact with said microelectronic die active surface; and a second element coupled to the first element, the second element including a substrate having a plurality of dielectric material layers and conductive traces to conductively couple conductive contacts on a top surface with conductive contacts on a bottom surface, said conductive contacts on said top surface conductively coupled with said conductive traces of said first element. Other embodiments are also disclosed and claimed.
US09941244B2 Protective layer for contact pads in fan-out interconnect structure and method of forming same
In accordance with a method embodiment includes providing a die having a contact pad on a top surface and forming a conductive protective layer over the die and covering the contact pad. A molding compound is formed over the die and the conductive protective layer. The conductive protective layer is exposed using a laser drilling process. A redistribution layer (RDL) is formed over the die. The RDL is electrically connected to the contact pad through the conductive protective layer.
US09941242B2 Unpacked structure for power device of radio frequency power amplification module and assembly method therefor
A power device without a package structure in a radio frequency power amplifier module and an assembly method for a radio frequency power amplifier module are provided. The radio frequency power amplification module includes the power device, a heat dissipating plate and a printed circuit board. The power device includes a carrier flange, a plurality of electronic elements and bond-wires, and the electronic elements are adhered to the carrier flange, the power device and the printed circuit board are fixed on the heat dissipating plate, the electronic elements of the power device are connected with each other through the bond-wires, and the electronic elements are directly connected to the printed circuit board through the bond-wires. The electronic elements include at least one passive device, a decoupling capacitor is disposed on the printed circuit board, and the decoupling capacitor is connected to the passive device through the bond-wires.
US09941241B2 Method for wafer-wafer bonding
A first semiconductor structure including a first bonding oxide layer having a first metallic bonding structure embedded therein and a second semiconductor structure including a second bonding oxide layer having a second metallic bonding structure embedded therein are provided. A nitride surface treatment process is performed to provide a nitrided surface layer to each structure. Each nitrided surface layer includes nitridized oxide regions located in an upper portion of the bonding oxide layer and nitridized metallic regions located in an upper portion of the metallic bonding structures. The nitrogen within the nitridized metallic regions is then removed to restore the upper portion of the metallic bonding structures to its original composition. Bonding is performed to form a dielectric bonding interface between the nitridized oxide regions present in the first and second structures, and a metallic bonding interface between the first and second metallic bonding structures.
US09941239B2 Electrostatic discharge protection apparatus and process
In a process, at least one circuit element is formed in a substrate. A conductive layer is formed over the substrate and in electrical contact with the at least one circuit element. Electrostatic charges are discharged from the substrate via the conductive layer.
US09941236B2 Semiconductor device having wire bonding connection and method for manufacturing the same
To prevent cracks of an interlayer insulation film at the time of wire bonding while maintaining adhesion of an aluminum pad electrode and the interlayer insulation film in a semiconductor device in which the aluminum pad electrode and a lead frame are connected with bonding wire by a ball bonding technology. In a bonding pad that is configured to have multiple pad electrodes each with two or more layers, the pad electrodes being electrically connected with one another through vias, the vias are not arranged under an area to which a capillary end of a wire bonder contacts at the time of the wire bonding.
US09941231B2 Semiconductor device
A semiconductor chip includes a substrate, an electrode pad formed on the substrate, an insulating layer covering the substrate and the electrode pad, and having an opening exposing a portion of a surface of the electrode pad, a first conductive layer formed on the exposed portion of the surface of the electrode pad and extending to a surface of the insulating layer, and a second conductive layer formed on the first conductive layer, covering the first conductive layer in a plan view, and having an outer edge portion which is located further out than an outer edge of the first conductive layer in a plan view. The outer edge portion of the second conductive layer has at least one curved portion. At least one portion of the curved portion is located between the outer edge of the first conductive layer and an outer edge of the second conductive layer in a plan view.
US09941213B2 Nitridized ruthenium layer for formation of cobalt interconnects
An advanced metal conductor structure is described. An integrated circuit device including a substrate having a dielectric layer is patterned. The pattern includes a set of features in the dielectric for a set of metal conductor structures. An adhesion promoting layer is disposed over the set of features in the patterned dielectric. A nitridized ruthenium layer is disposed over the adhesion promoting layer. A cobalt layer disposed over the nitridized ruthenium layer filling the set of features, wherein the cobalt layer is formed using a physical vapor deposition process.
US09941211B1 Reducing metallic interconnect resistivity through application of mechanical strain
Methods are provided for fabricating metallic interconnect structures having reduced electrical resistivity that is obtained by applying mechanical strain to the metallic interconnect structures, as well as semiconductor structures having metallic interconnect structures formed with permanent mechanical strain to provide reduced electrical resistivity. For example, a method includes forming a metallic interconnect structure in an interlevel dielectric (ILD) layer of a back-end-of-line (BEOL) structure of a semiconductor structure, and forming a stress layer in contact with the metallic interconnect structure. A thermal anneal process is performed to cause the stress layer to expand and apply compressive strain to the metallic interconnect structure and permanently deform at least a portion of the metallic interconnect structure into a stress memorized state of compressive strain.
US09941210B1 Semiconductor devices with protruding conductive vias and methods of making such devices
An embodiment of a semiconductor die includes a base semiconductor substrate and an electrically conductive through substrate via (TSV) extending between the surfaces of the base semiconductor substrate. The bottom surface of the base semiconductor substrate includes a recessed region proximate to the TSV so that an end of the TSV protrudes from the bottom surface, and so that the TSV sidewall has an exposed portion at the protruding end of the TSV. Back metal, consisting of one or more metallic layers, is deposited on the bottom surface of the base semiconductor substrate and in contact with the TSV. The back metal can include a gold layer, a sintered metallic layer, and/or a plurality of other conductive layers. The die may be attached to a substrate using solder, another sintered metallic layer, or other materials.
US09941208B1 Substrate structure and manufacturing method thereof
A substrate structure includes a metal substrate, a first connection layer, a second connection layer, a dielectric material layer, a metal core layer and an internal component. The first and second connection layers are disposed on a surface of the metal substrate. The metal core layer having an opening is disposed on a surface of the first connection layer. The internal component having a plurality of electrode pads is disposed on a surface of the second connection layer and in the opening of the metal core layer. The dielectric material layer is disposed on the surface of the metal substrate. The first and second connection layers, the metal core layer and the internal component are partially covered with the dielectric material layer. The metal core layer is electrically connected to one of the electrode pads via the first and second connection layers and the metal core layer.
US09941207B2 Semiconductor device and method of fabricating 3D package with short cycle time and high yield
A method of making a semiconductor device comprising the steps of providing a first manufacturing line, providing a second manufacturing line, and forming a first redistribution interconnect structure using the first manufacturing line while forming a second redistribution interconnect structure using the second manufacturing line. The method further includes the steps of testing a first unit of the first redistribution interconnect structure to determine a first known good unit (KGU), disposing a known good semiconductor die (KGD) over the first KGU of the first redistribution interconnect structure, and dicing the first KGU and KGD from the first redistribution interconnect structure. The method further includes the steps of testing a unit of the second redistribution interconnect structure to determine a second KGU of the second redistribution interconnect structure and disposing first KGU of the first redistribution interconnect structure and the KGD over the second KGU of the second redistribution interconnect structure.
US09941205B2 Electrical fuse and/or resistor structures
Electrical fuse (eFuse) and resistor structures and methods of manufacture are provided. The method includes forming metal gates having a capping material on a top surface thereof. The method further includes protecting the metal gates and the capping material during an etching process which forms a recess in a dielectric material. The method further includes forming an insulator material and metal material within the recess. The method further includes forming a contact in direct electrical contact with the metal material.
US09941201B1 Magnetically decoupled inductor structures
In one embodiment, an integrated circuit die includes first and second inductor structures, a first ground conductor, a second ground conductor and a conductive trace. The first ground conductor provides a first ground pathway for the first inductor structure. The second ground conductor provides a second ground pathway for the second inductor structure. The conductive trace coupled between the first and second ground conductors may magnetically decouple the first and second inductor structures. In addition, the integrated circuit die may also include conductive guard ring structures that surround the first and second inductor structures. One of the conductive guard ring structures may be connected to the first grounding pathway and the other conductive guard ring structure may be connected to the second grounding pathway. The conductive guard ring structures may further magnetically decouple the first and second inductor structures.
US09941200B1 Contact trench between stacked semiconductor substrates
A first semiconductor substrate layer supports a first transistor including a first source-drain formed by a doped region of the substrate layer. A second semiconductor substrate layer supports a second transistor including a second source-drain formed by a doped region of the substrate layer. The second semiconductor substrate layer is stacked over the first semiconductor substrate layer and separated therefrom by an insulating layer. A metal wiring extends from an electrical contact with the doped region for the first source-drain, through the insulating layer and passing through an electrical isolation structure in the second semiconductor substrate layer to make an electrical contact with the doped region for the second source-drain. The electrical isolation structure is formed by one of a trench isolation or the doped region of the second source-drain itself. The isolation structure has a thickness equal to a thickness of the second semiconductor substrate layer.
US09941198B2 Method of manufacturing a flexible substrate with carbon nanotube vias and corresponding flexible substrate
There is provided a method for manufacturing a flexible film comprising carbon nanotube interconnects, the method comprising: providing a first substrate; forming and patterning a catalyst layer on the substrate; forming vertically aligned electrically conducting carbon nanotube bundles from the catalyst; providing a second substrate opposite the first substrate and in contact with the carbon nanotube bundles such that a gap is formed between the first and second substrates; providing a flowing curable polymer in the gap between the first substrate and the second substrate such that the gap is filled by the polymer; curing the polymer to form a flexible solid; and removing the first substrate and the second substrate to provide a flexible polymer film comprising carbon nanotube interconnects connectable on respective sides of the film.
US09941195B2 Vertical metal insulator metal capacitor
A semiconductor device and a method are disclosed herein. The semiconductor device includes a device die, a molding layer surrounding the device die, a plurality of first vertical conductive structures formed within the molding layer, and a plurality of second vertical conductive structures formed within the molding layer. The first vertical conductive structures and the second vertical conductive structures are interlaced with each other, and an insulating structure is formed between the first vertical conductive structures and the second vertical conductive structures.
US09941193B1 Semiconductor device package having solder-mounted conductive clip on leadframe
A conductive clip for a semiconductor device package. In one example, the conductive clip may include a number of protrusions that extend from a surface of the conductive clip that in practice is solder-mounted to a leadframe of the semiconductor device package. In another example, the conductive clip may include the number of protrusions that each extend from the surface of the conductive clip that in practice is solder-mounted to the leadframe of the semiconductor device package, and may also include a number of protrusions that each extend from a surface of the conductive clip that in practice is solder-mounted to at least one electrical component that in turn is solder-mounted to the leadframe of the semiconductor device package.
US09941192B2 Semiconductor device having repairable penetration electrode
A semiconductor device having a repairable penetration electrode is provided. The semiconductor device having the repairable penetration electrode includes first and second signal transfer regions including main penetration electrodes penetrating a substrate, and a repair region including a spare penetration electrode penetrating the substrate. The first and second signal transfer regions are spaced apart from each other. The repair region is disposed between the first and second signal transfer regions. The first and second signal transfer regions share the repair region such that the spare penetration electrode of the repair region is substituted for a defective main penetration electrode of the first and second signal transfer regions.
US09941191B2 Non-bridging contact via structures in proximity
A first photoresist layer is patterned with a first pattern that includes an opening in a region between areas of two adjacent via holes to be formed. The opening in the first photoresist is transferred into a template layer to form a line trench therein. The lateral dimension of the trench is reduced by depositing a contiguous spacer layer that does not fill the trench completely. An etch-resistant material layer is conformally deposited and fills the trench, and is subsequently recessed to form an etch-resistant material portion filling the trench. A second photoresist layer is applied and patterned with a second pattern, which includes an opening that includes areas of two via holes and an area therebetween. A composite pattern of an intersection of the second pattern and the complement of the pattern of the etch-resistant material portion is transferred through the template layer.
US09941189B2 Counter-flow expanding channels for enhanced two-phase heat removal
A structure for cooling an integrated circuit. The structure may include; an interposer cold plate having at least two expanding channels, each expanding channel having a flow direction from a channel inlet to a channel outlet, the flow direction having different directions for at least two of the at least two expanding channels, the channel inlet having an inlet width and the channel outlet having an outlet width, wherein the inlet width is less than the outlet width.
US09941186B2 Method for manufacturing semiconductor structure
A method for manufacturing a semiconductor structure is disclosed. The method includes: providing a semiconductor substrate having a plurality of dies thereon; dispensing an underfill material and a molding compound to fill spaces beneath and between the dies; disposing a temporary carrier over the dies; thinning a thickness of the semiconductor substrate; performing back side metallization upon the thinned semiconductor substrate; removing the temporary carrier; and attaching a plate over the dies. An associated semiconductor structure is also disclosed.
US09941182B2 Electronic device and method for manufacturing same
In a substrate, at least one lateral surface between one surface and another surface is a cut surface that is cut together with mold resin. The mold resin, which is cut together with the substrate, is provided with a surface that is flush with the cut surface. A portion of the mold resin constituting the surface flush with the cut surface has a surface that is joined to the surface flush with the cut surface and parallel to the one surface of the substrate; this portion is thinner than a portion that seals electronic parts. Consequently, the mold resin is cut with a dicing blade brought into contact with a surface parallel to the one surface of the substrate.
US09941178B2 Methods for detecting endpoint for through-silicon via reveal applications
Systems and methods for processing a semiconductor wafer includes a plasma processing chamber. The plasma processing chamber includes an exterior, an interior region with a wafer receiving mechanism and a viewport disposed on a sidewall of the plasma processing chamber providing visual access from the exterior to the wafer received on the wafer receiving mechanism. A camera is mounted to the viewport of the plasma processing chamber on the exterior and coupled to an image processor. The image processor includes pattern recognition logic to match images of emerging pattern captured and transmitted by the camera, to a reference pattern and to generate signal defining an endpoint when a match is detected. A system process controller coupled to the image processor and the plasma processing chamber receives the signal from the image processor and adjusts controls of one or more resources to stop the etching operation.
US09941177B2 Pattern accuracy detecting apparatus and processing system
A pattern accuracy detecting apparatus includes a stage for supporting a substrate, an optical warpage detecting unit that measures a shape of a substrate disposed on the stage, an optical pattern detection unit that detects a position of a pattern on the substrate, and a processing unit that corrects the detected pattern position based on the measured shape of the substrate.
US09941170B2 PNP-type bipolar transistor manufacturing method
A PNP transistor is manufactured in parallel with the manufacture of NPN, NMOS, and PMOS transistors. A first semiconductor layer is deposited on a P-type doped semiconductor substrate and divided into first, second, and third regions, with the third region forming the base. An insulating well is deeply implanted into the substrate. First and second third wells, respectively of N-type and P-type are formed to extend between the second region and third region and the insulating well. A third well of P-type is formed below the third region to provide the collector. Insulating layers are deposited over the third region and patterned to form an opening. Epitaxial growth of a second P-type doped semiconductor layer is performed in the opening to provide the emitter.
US09941165B2 Semiconductor manufacturing method
A semiconductor manufacturing method includes forming a first metal film on a semiconductor wafer by plating, ejecting liquid from a washer bar spaced from the wafer while rotating at least one of the washer and the semiconductor, and forming a second metal film on the first metal film. A plurality of nozzles are located on the washer bar and displaced from the position of the washer bar opposed to the center of the wafer, and a greater number of nozzles are adjacent the peripheral area of the semiconductor wafer than the central area of the semiconductor wafer. The nozzles in the peripheral area of the wafer eject the washing liquid in a direction inclined from the direction of the washer bar, and a nozzle arranged on the central area of the one main surface of the semiconductor wafer ejects the washing liquid towards the center position of the semiconductor wafer.
US09941162B1 Self-aligned middle of the line (MOL) contacts
Disclosed are methods and integrated circuit (IC) structures. The methods enable formation of a gate contact on a gate above (or close thereto) an active region of a field effect transistor (FET) and provide protection against shorts between the gate contact and metal plugs on source/drain regions and between the gate and source/drain contacts to the metal plugs. A gate with a dielectric cap and dielectric sidewall spacer is formed on a FET channel region. Metal plugs with additional dielectric caps are formed on the FET source/drain regions such that the dielectric sidewall spacer is between the gate and the metal plugs and between the dielectric cap and the additional dielectric caps. The dielectric cap, dielectric sidewall spacer and additional dielectric caps are different materials preselected to be selectively etchable, allowing for misalignment of a contact opening to the gate without risking exposure of any metal plugs and vice versa.
US09941159B2 Method of manufacturing a semiconductor device
A method of making a semiconductor device includes forming a first opening in an insulating layer, forming a second opening in the insulating layer, forming a third opening in the insulating layer and filling the first opening, the second opening and the third opening with a conductive material. The first opening has a width and a length. The second opening has a width less than the length of the first opening, and is electrically connected to the first opening. The third opening has a width less than the width of the second opening, and is electrically connected to the second opening.
US09941158B2 Integrated circuit and process for fabricating thereof
A process for fabricating an Integrated Circuit (IC) and the IC formed thereby is disclosed. The process comprises providing a substrate. The process further comprises forming a plurality of longitudinal trenches in the substrate and depositing a layer of a first conductive material on at least one longitudinal trench of the plurality of longitudinal trenches. A first layer of a second conductive material is deposited on the layer of the first conductive material. Thereafter, the process includes depositing a second layer of the second conductive material on the first layer of the second conductive material. The second layer of the second conductive material at least partially fills the at least one longitudinal trench. The first conductive material is selected such that a reduction potential of the first conductive material is less than a reduction potential of the second conductive material.
US09941155B2 Methods for isolating portions of a loop of pitch-multiplied material and related structures
Different portions of a continuous loop of semiconductor material are electrically isolated from one another. In some embodiments, the end of the loop is electrically isolated from mid-portions of the loop. In some embodiments, loops of semiconductor material, having two legs connected together at their ends, are formed by a pitch multiplication process in which loops of spacers are formed on sidewalls of mandrels. The mandrels are removed and a block of masking material is overlaid on at least one end of the spacer loops. In some embodiments, the blocks of masking material overlay each end of the spacer loops. The pattern defined by the spacers and the blocks are transferred to a layer of semiconductor material. The blocks electrically connect together all the loops. A select gate is formed along each leg of the loops. The blocks serve as sources/drains. The select gates are biased in the off state to prevent current flow from the mid-portion of the loop's legs to the blocks, thereby electrically isolating the mid-portions from the ends of the loops and also electrically isolating different legs of a loop from each other.
US09941150B1 Method and structure for minimizing fin reveal variation in FinFET transistor
A method for manufacturing a semiconductor device includes forming a plurality of stacked portions spaced apart from each other on a substrate, each of the plurality of stacked portions including a semiconductor fin, a dielectric layer on the semiconductor fin, and a polymer layer on the dielectric layer. The method also includes forming an inter-level dielectric layer on the substrate between the plurality of stacked portions, forming a doped region in the inter-level dielectric layer at a depth below a top surface of the inter-level dielectric layer, and recessing the inter-level dielectric layer down to the doped region to form a plurality of isolation regions between the plurality of stacked portions.
US09941146B2 Semiconductor device and method
Disclosed herein is a semiconductor device that includes a semiconductor die and a substrate having a first surface and a second surface. The semiconductor die is attached to the second surface. The substrate includes a layer of insulative material and at least a portion of an embedded conductive circuit in the layer of insulative material. The substrate includes an etched layer of a conductive material attached to the portion of the conductive circuit, the etched layer of the conductive material located on the first surface of the substrate.
US09941144B2 Substrate breakage detection in a thermal processing system
Apparatus, systems, and processes for substrate breakage detection in a thermal processing system are provided. In one example implementation, a process can include: accessing data indicative of a plurality of temperature measurements for a substrate, the plurality of measurements obtained during a cool down period of a thermal process; estimating one or more metrics associated with a cooling model based at least in part on the data indicative of the plurality of temperature measurements; and determining a breakage detection signal based at least in part on the one or more metrics associated with the cooling model. The breakage detection signal is indicative of whether the substrate has broken during thermal processing.
US09941142B1 Tunable TiOxNy hardmask for multilayer patterning
Lithographic multilayer structures are disclosed that generally include an organic planarizing layer and a tunable titanium oxynitride layer on the organic planarizing layer, wherein the titanium oxynitride includes TiOxNy, and wherein x is from 2.5 to 3.5 and y is from 0.75 to 1.25. The lithographic multilayer structure further includes a photosensitive resist layer on the titanium oxynitride layer. The tunable titanium oxynitride is configured to function as a hard mask and as an antireflective coating. Also disclosed are methods for patterning the lithographic multilayer structures.
US09941138B2 Method for exposing polysilicon gates
A method for exposing polysilicon gate electrodes is disclose. The method comprises planarizing a pre-metal dielectric on a wafer surface; performing a selective etching process to the planarized pre-metal dielectric and a multi-layer dielectric which covers polysilicon gates in the wafer according to pre-set etching parameters to expose the polysilicon gates in the wafer. The selective etching process effectively control the amount of etching, which ensures high surface flatness when exposing the polysilicon gates without affecting the subsequent film deposition process. Therefore, wafer surface defects, gate stack damages, and polysilicon gate deformation caused by the conventional CMP process or the shear stress generated during the CMP process can be avoided, and then product yield can be enhanced.
US09941120B2 Process and system for uniformly crystallizing amorphous silicon substrate by fiber laser
The inventive system for crystallizing an amorphous silicon (a-Si) film is configured with a quasi-continuous wave fiber laser source operative to emit a film irradiating pulsed beam. The fiber laser source is operative to emit a plurality of non-repetitive pulses incident on the a-Si. In particular, the fiber laser is operative to emit multiple discrete packets of film irradiating light at a burst repetition rate (BRR), and a plurality of pulses within each packet emitted at a pulse repetition rate (PRR) which is higher than the BRR. The pulse energy, pulse duration of each pulse and the PRR are controlled so that each packet has a desired packet temporal power profile (W/cm2) and packet energy sufficient to provide transformation of a-Si to polysilicon (p-Si) at each location of the film which is exposed to at least one packets.
US09941118B2 Dense vertical nanosheet
After forming a sacrificial mandrel located over a substrate, alternating channel layer portions and sacrificial layer portions are formed on sidewalls of the sacrificial mandrel by epitaxial growth of alternating layers of a channel material and a sacrificial material followed by planarization. The sacrificial mandrel and the sacrificial layer portions are sequentially removed, leaving channel layer portions extending upwards from the substrate.
US09941111B2 Method for processing a semiconductor layer, method for processing a silicon substrate, and method for processing a silicon layer
According to various embodiments, a method for processing a semiconductor layer may include: generating an etch plasma in a plasma chamber of a remote plasma source, wherein the plasma chamber of the remote plasma source is coupled to a processing chamber for processing the semiconductor layer; introducing the etch plasma into the processing chamber to remove a native oxide layer from a surface of the semiconductor layer and at most a negligible amount of semiconductor material of the semiconductor layer; and, subsequently, depositing a dielectric layer directly on the surface of the semiconductor layer.
US09941110B2 Manufacturing method and fluid supply system for treating substrate
A method of manufacture and fluid supply system for treating a substrate is provided. The fluid supply system for treating a substrate may include a substrate dry part supplying a dry fluid to dry a rinse solution doped on a substrate; a dry fluid separation part retrieving a mixed fluid that the dry fluid and the rinse solution are mixed with each other during a dry process of the substrate from the substrate dry part and separating the dry fluid from the mixed fluid; and a dry fluid supply part resupplying the dry fluid separated from the dry fluid separation part to the substrate dry part.
US09941108B2 High dose implantation strip (HDIS) in H2 base chemistry
Plasma is generated using elemental hydrogen, a weak oxidizing agent, and a fluorine containing gas. An inert gas is introduced to the plasma downstream of the plasma source and upstream of a showerhead that directs gas mixture into the reaction chamber where the mixture reacts with the high-dose implant resist. The process removes both the crust and bulk resist layers at a high strip rate, and leaves the work piece surface substantially residue free with low silicon loss.
US09941104B2 Systems and methods for delivering liquid to an ion source
Methods and systems for delivering a liquid sample to an ion source are provided herein: In various aspects, the methods and systems described herein can utilize the flow provided by an LC pump(s) to drive a calibration fluid to an ion source of a mass spectrometer system. In various aspects, methods and systems described herein can additionally or alternatively be placed upstream of an LC column for providing an elution gradient of a plurality of solvents, without requiring a plurality of pumps and/or separate mixing elements.
US09941103B2 Bias-variant photomultiplier tube
A bias-variant photomultiplier tube (PMT) includes a photocathode that when operating absorbs photons and emits photoelectrons responsive to the absorbed photons. The bias-variant PMTO also includes a plurality of dynodes that receive the photoelectrons emitted by the photocathode. The plurality of dynodes include a first pair of dynodes having a first bias difference and at least a second pair of dynodes having a second bias difference. The second bias difference is greater than the first bias difference. The bias-variant PMTO also includes an anode to receive photoelectrons directed from the plurality of dynodes.
US09941102B2 Apparatus for processing work piece by pulsed electric discharges in solid-gas plasma
Work piece processing is performed by pulsed discharges between an anode (2) and a magnetron sputtering cathode (1) in solid-gas plasmas using a chamber (2) containing the work piece (7). A system (12) maintains a vacuum in the chamber and another system (14) provides sputtering and reactive gases. The pulses are produced in a plasma pulser circuit including the anode and the cathode, the discharges creating gas and partially ionized solid plasma blobs (3) moving or spreading from a region at a surface of the cathode towards the work piece and the anode. A pulsed current comprising biasing pulses arises between the second electrodes. Biasing discharges are produced between the anode and the work piece when said plasma blobs have spread to regions at the anode and at the work piece so that the pulsed current is the current of these biasing discharges.
US09941099B2 Plasma treatment of an elastomeric material for adhesion
Elastomeric components, such as a shoe outsole, are treated with a plasma application to clean and activate the elastomeric component. The application of plasma is controlled to achieve a sufficient surface composition change to enhance adhesion characteristics while not adversely physically deforming the elastomeric component. The plasma treatment is applied to increase carbonyl functional group concentrations within an altered region of the elastomeric component to within at least a range of 2%-15% of carbon atomic percentage composition. The cleaning and activation is controlled, in part, by ensuring a defined height offset range is maintained between the elastomeric component and the plasma source by a generated tool path. The elastomeric component may then be adhered, with an adhesive, to another component.
US09941095B2 Charged particle beam apparatus
An object of the invention is to provide a charged particle beam apparatus which can perform optimized adjustment of a focusing condition of a charged particle beam focused on a sample and optimized adjustment of an orbit of a charged particle emitted from the sample. In order to achieve the above-described object, there is provided a charged particle beam apparatus including a passage restriction member that partially restricts passage of a charged particle emitted from a sample, a first lens that is arranged between the passage restriction member and the sample, and that controls an orbit of the charged particle emitted from the sample, and a second lens that is arranged between the passage restriction member and the charged particle source, and that changes a focusing condition of the charged particle beam in accordance with a control condition of the first lens.
US09941093B2 Target processing unit
The invention relates to a target processing unit (10) comprising a vacuum chamber (30) for accommodating a target to be processed, a projection column (46) within the vacuum chamber for generating a beam and projecting the beam towards the target, and a first conduit arrangement (26,36,37,60) for connecting the projection column to external equipment (22). The vacuum chamber can comprise a positioning system (114) for supporting the target, and a second conduit arrangement (110) distinct from the first conduit arrangement for connecting the positioning system to external equipment, wherein the positioning system is moveably arranged with respect to the projection column, and wherein the positioning system and the projection column occupy spatially distinct portions of the vacuum chamber. The first conduit arrangement extends through an upper side of the vacuum chamber, and the second conduit arrangement extends through a lower side of the vacuum chamber.
US09941079B2 Handle switch for vehicle
A handle switch for use on a vehicle includes a plurality of switches for operating electric devices on a vehicle. The handle switch is mounted on a switch case fixed to a handlebar of the motorcycle, wherein the plurality of switches include a composite switch having a plurality of operating directions and other switches having less operating directions than the composite switch. The composite switch is disposed on the switch in a position closer to a center of a vehicle body, and the other switches are disposed in a position between a handle grip fixed to an end of the handlebar and the composite switch. The composite switch has an operating portion is directed rearwardly of the vehicle body. The operating portion of the composite switch includes a four-way switch as a plural-direction operator projects rearwardly of the vehicle body.
US09941077B2 Computer thin film switch keyboard
The present invention discloses a computer thin film switch keyboard, wherein the keyboard comprises keys/keycaps, a light guide film, a fixing film/air hole layer, metal domes, an air slot layer, a conductive film/PCB and a key plate, the key plate is disposed at the lowest layer, the conductive film/PCB is disposed above the key plate, the air slot layer is disposed above the conductive film/PCB, the metal domes are disposed on the conductive film/PCB, more than one metal dome is disposed corresponding to key configurations on the keyboard, the fixing film/air hole layer is disposed above the metal domes, and the keys/keycaps are disposed above the fixing film/air hole layer. The present invention has characteristics of being light, thin, and easy to carry, and having a Bluetooth function, a short stroke, and lower noises, etc.
US09941076B2 Illuminated keyboard device
An illuminated keyboard device includes plural keys, plural light-emitting elements and a membrane switch circuit module. Each key includes a keycap and an elastic element. Each elastic element has a protrusion. The plural elastic elements are located over plural contacts of the membrane switch circuit module and connected with the plural keycaps. The plural light-emitting elements are located under the corresponding elastic elements. Moreover, the protrusions within the elastic elements and the contacts of the membrane switch circuit module are all ring-shaped structures, and each light-emitting element is aligned with the center region of the corresponding contact of the membrane switch circuit module. Consequently, while the protrusion is moved downwardly to push the corresponding contact, a corresponding key signal is generated.
US09941072B1 Keyboard device
A keyboard device includes a key structure, a switch circuit board, a base plate, a soft covering element and a buffering pad. The key structure includes a keycap and a stabilizer bar. The stabilizer bar is connected with the keycap and the soft covering element. The soft covering element is disposed on the base plate. An accommodation space is defined by the soft covering element and the base plate collaboratively. The stabilizer bar is inserted into the accommodation space, so that the stabilizer bar is connected with the base plate. The buffering pad is disposed on the base plate and partially received within the accommodation space. The stabilizer bar and the base plate are made of metallic material. Since the stabilizer bar and the base plate are separated by the soft covering element and the buffering pad, the keyboard device is capable of reducing noise.
US09941071B1 Key structure
A key structure includes a circuit board, a housing, a first metallic element, a second metallic element, a keycap and a conductive strip. The conductive strip is disposed within the housing. The first metallic element and the second metallic element are electrically connected with the circuit board. The housing is disposed on the circuit board. The keycap is fixed on the housing. While the keycap is depressed, a first end of the conductive strip is pressed by the triggering part and the conductive strip is swung relative to the housing. Moreover, a second end of the conductive strip collides with the second metallic element. Consequently, the key structure is triggered. When the second end of the conductive strip collides with the second metallic element, a click sound is generated.
US09941062B2 Key switch structure
To provide a key switch structure where the outline of a key top becomes well-defined. A reflection sheet is adhered on top of a membrane sheet, so that light reflected by a back surface of a key top is reflected by the reflection sheet and emitted toward the outer side of the outer periphery of the key top. Because of this, the outer side of the key top is lighted up and the outline of the key top becomes well-defined.
US09941059B2 Low resistance ultracapacitor electrode and manufacturing method thereof
A carbon-based electrode includes activated carbon, carbon black, and a binder. The binder is fluoropolymer having a molecular weight of at least 500,000 and a fluorine content of 40 to 70 wt. %. A method of forming the carbon-based electrode includes providing a binder-less conductive carbon-coated current collector, pre-treating the carbon coating with a sodium napthalenide-based solution, and depositing onto the treated carbon coating a slurry containing activated carbon, carbon black and binder.
US09941056B2 Solid electrolytic capacitor and method
An improved capacitor is provided with at least one anode having a dielectric on the anode and an anode lead extending from the anode. A conductive cathode layer is on the dielectric. An anode leadframe is electrically connected to the anode and a cathode leadframe is electrically connected to the cathode. An encapsulant encases the anode, a portion of the anode leadframe and a portion of the cathode leadframe such that the anode leadframe extends from the encapsulant to form an external anode leadframe and the cathode leadframe extends from the encapsulant to form an external cathode leadframe. At least one secondary electrical connection is provided wherein the secondary electrical connection is in electrical contact with the cathode and extends through the encapsulant to the external cathode leadframe or the secondary electrical contact is in electrical contact with the anode and extends through the encapsulant to the external anode leadframe.
US09941051B2 Coiled capacitor
The present disclosure provides a coiled capacitor comprising a coil formed by a flexible multilayered tape, and a first terminating electrode (a first contact layer) and a second terminating electrode (a second contact layer) which are located on butts of the coil. The flexible multilayered tape contains the following sequence of layers: first metal layer, a layer of a plastic, second metal layer, a layer of energy storage material. The first metal layer forms ohmic contact with the first terminating electrode (the first contact layer) and the second metal layer (the second contact layer) forms ohmic contact with the second terminating electrode.
US09941049B2 Multilayer ceramic electronic component
A multilayer ceramic capacitor includes a ceramic element body including internal electrodes therein. External electrodes are provided on end surfaces of the ceramic element body and electrically connected to exposed portions of respective ones of the internal electrodes. Each of the external electrodes includes a sintered metal layer, a conductive resin layer, and a plating layer. In a cross section including a first interface between the sintered metal layer and the conductive resin layer, the sintered metal layer includes a plurality of recesses each including an inlet extending along the first interface and an inner portion extending from the first interface into the sintered metal layer, each of the recesses having a shape in which a dimension of the inner portion is larger than a dimension of the inlet measured along the first interface, and in a cross section including a second interface between the conductive resin layer and the plating layer, a number of the metal particles exposed from the conductive resin layer in a portion of the second interface with a length of about 1 mm is 50 to 250.
US09941047B2 Shield for toroidal core electromagnetic device, and toroidal core electromagnetic devices utilizing such shields
A shield for a toroidal transformer that includes a toroidal assembly that comprises a toroidal magnetic core and a first winding includes a sheet of flexible non-magnetic conductive material. The sheet of flexible non-magnetic conductive material comprises a trunk portion extending along a longest dimension of the sheet of flexible non-magnetic conductive material and configured to wrap along an outer dimension of the toroidal assembly, and a plurality of fingers extending outwardly from the trunk portion and configured to wrap around portions of the first winding along portions of sides of the toroidal assembly in a direction towards the center of the toroidal magnetic core and folding into an inner dimension of the toroidal assembly.
US09941042B2 Electromagnetic actuating apparatus
An electromagnetic actuating apparatus, in particular a proportional magnet or switching magnet, includes a magnet armature (4) guided for axial movement in a pole tube (2). The pole tube is at least partially surrounded by a coil winding and is adjoined by a pole core (10) via a separating region (20) forming a magnetic decoupling. On energization of the coil winding (52), a magnetic force acts on the armature (4) to move the armature (4) in the direction of the pole core (10) within a travel area. At least one insert (28) of ferromagnetic material with a preset axial thickness is between the armature (4) and the pole core (10) to shorten, as desired, the axial length of the travel area.
US09941038B2 Method for producing semi-processed non-oriented electrical steel sheet having excellent magnetic properties
A steel slab having a chemical composition including C: not more than 0.005 mass %, Si: not more than 4 mass %, Mn: 0.03-2 mass %, P: not more than 0.2 mass %, S: not more than 0.004 mass %, Al: not more than 2 mass %, N: not more than 0.004 mass %, Se: not more than 0.0010 mass % and the balance being Fe and inevitable impurities is subjected to hot rolling, cold rolling and recrystallization annealing up to 740° C. at an average heating rate of not less than 100° C./s to produce a semi-processed non-oriented electrical steel sheet being high in the magnetic flux density and low in the iron loss after stress relief annealing.
US09941037B2 Magnetocaloric material based on NdPrFe17 with improved properties
The instant invention relates to a magnetocaloric material based on NdPrFe17 melt-spun ribbons. This material has improved properties when compared with other similar magnetocaloric (MC) materials since it has an enhanced refrigeration capacity in the room temperature range due to its broader magnetic entropy change as function of the temperature curve. This material is useful as magnetic refrigerant as a part of magnetocaloric refrigerators.
US09941036B2 Modular, high density, low inductance, media cooled resistor
A resistor includes a first resistor element. The first resistor element is connected to at least a first electrical terminal and a second electrical terminal. The first resistor element is configured to directly contact cooling media on at least two surfaces of the first resistor element in order to transfer heat away from the first resistor element. The resistor may also include a second resistor element connected to at least the first electrical terminal and the second electrical terminal, where the second resistor element is configured to directly contact the cooling media on at least two surfaces of the second resistor element in order to transfer heat away from the second resistor element.
US09941035B2 Insulating support for electric device
An insulating support includes a pillar-shaped portion made of resin, a metal insert buried in one end surface of the pillar-shaped portion in an axial direction, a metal insert buried in the other end surface of the pillar-shaped portion in the axial direction, and one protrusion made of the resin and provided in a ring shape and integrally with the pillar-shaped portion on an outer circumferential surface of the pillar-shaped portion on a side of the metal insert. The metal insert includes a first cylindrical base portion and a first distal end portion. The metal insert includes a second cylindrical base portion and a second distal end portion. A whole of the first distal end portion is disposed within an extended range of the protrusion in the axial direction.
US09941033B2 Methods and systems for preparing superconductors for reaction and integration
A method and system for manufacturing a superconducting material is described. In one embodiment, a layer of refractory cushion is placed over a spool. A first layer of superconducting cable is wound over the first layer of refractory cloth. The superconducting cable is reaction heat-treated on the spool. A first layer of refractory fabric can be placed over the layer of refractory cushion. One or more adjustment mechanisms can be disposed between the first layer of the superconducting cable and the spool.
US09941032B2 Low-resistance connection body for high-temperature superconducting wire material and connection method
Provided is a low-resistance connection body for a high-temperature superconducting wire, in which a high-temperature superconducting bulk body and a high-temperature superconducting wire including a high-temperature superconducting layer are connected to each other, wherein a melting point of the high-temperature superconducting layer is higher than a melting point of the high-temperature superconducting bulk body; the high-temperature superconducting layer and the high-temperature superconducting bulk body are in contact at a connection site of the high-temperature superconducting wire and the high-temperature superconducting bulk body; and a surface of the high-temperature superconducting bulk body that is in contact with the high-temperature superconducting layer is crystallized due to crystal growth. Two high-temperature superconducting wires can be connected, with low resistance, through connection of the two high-temperature superconducting wires to one high-temperature superconducting bulk.
US09941028B2 Electrical conductor for aeronautical applications
An electrical conductor has at least one conducting strand made up at least of a layer of copper and of a layer of silvered copper alloy, in which the silver content by mass is between 0.1% and 0.5%.
US09941021B2 Plate defect mitigation techniques
Methods, systems, techniques, and devices for operating a ferroelectric memory cell or cells are described. Groups of cells may be operated in different ways depending, for example, on a relationship between cell plates of the group of cells. Cells may be selected in pairs in order to accommodate an electric current relationship, such as a short, between cells that make up the pair. Cells may be arranged in cell plate groups, and a pair of cells may include a first cell plate from one cell plate group and a second cell plate from the same cell plate group or from another, adjacent cell plate group. So a pair of cell plates may include cell plates from different cell plate groups. The first and second cell plates may be selected as a pair or a group based at least in part on the electric current relationship between the cell plates.
US09941020B2 Semiconductor system and method for testing semiconductor device
A semiconductor device includes a plurality of first input pins; a parity check unit suitable for performing a parity check for command/address signals inputted to the plurality of first input pins, and determining the parity check result as a pass or fail; and one or more registers suitable for storing the inputted command/address signals when the parity check result is determined as the fail, wherein during a test operation, the number of signals having a first logic value among the command/address signals inputted to the plurality of first input pins does not correspond to the logic value of a parity bit.
US09941019B2 TFT-LCD, driving device and manufacturing method thereof
An embodiment of the disclosed technology provides a driving device for a thin film transistor liquid crystal display (TFT-LCD) and a method for manufacturing the same. The driving device comprises at least one first TFT and at least one second TFT formed a base substrate, wherein load of the first TFT is larger than load of the second TFT, the first TFT is of a top-gate configuration, and the second TFT is of a bottom-gate configuration.
US09941018B2 Gate driving circuit and display device using the same
A gate driving circuit and a display device using the same are discussed. The gate driving circuit according to an embodiment includes a first shift register configured to sequentially shift a gate start pulse in response to a gate shift clock and output a gate pulse shifted on a per block basis, each block including a plurality of gate lines, a second shift register configured to sequentially shift the gate start pulse in response to the gate shift clock and output a gate pulse shifted on a per gate line basis, and a controller configured to supply the gate shift clock to one of the first and second shift registers.
US09941009B2 Memory device having vertical structure and memory system including the same
A memory device has a vertical structure in which a row decoder, a page buffer, and a peripheral circuit are disposed under a memory cell array. The row decoder and the page buffer may be asymmetrically disposed. The peripheral circuit is disposed in an area where the row decoder and the page buffer are not disposed. The row decoder and the page buffer may be symmetrically disposed with respect to an interface of planes. The peripheral circuit may be disposed in an area including a part of the interface of the planes.
US09940998B2 Memory cell, memory device, and electronic device having the same
A memory device includes a memory cell array including a plurality of memory cells, a plurality of word lines connected to the plurality of memory cells, a plurality of bit lines connected to the plurality of memory cells, a plurality of complementary bit lines connected to the plurality of memory cells, a plurality of auxiliary bit lines, a plurality of auxiliary complementary bit lines, and a switch circuit. The switch circuit electrically connects the plurality of auxiliary bit lines to the plurality of bit lines during a write operation, electrically connects the plurality of auxiliary complementary bit lines to the plurality of complementary bit lines during the write operation, electrically disconnects the plurality of auxiliary bit lines from the plurality of bit lines during a read operation, and electrically disconnects the plurality of auxiliary complementary bit lines from the plurality of complementary bit lines during the read operation.
US09940995B1 Methods and apparatus for reusing lookup table random-access memory (LUTRAM) elements as configuration random-access memory (CRAM) elements
A programmable integrated circuit may include configuration random-access memory (CRAM) cells and lookup table random-access memory (LUTRAM) cells. The programmable integrated circuit may include a CRAM column and at least two LUTRAM columns, a first portion of which is operable as LUTRAM cells and a second portion of which is reused as CRAM cells. Each of the memory cells have a configuration write port and a read port. The configuration write ports of the first portion may be gated, whereas the configuration write ports of the second portion lack gating logic. The read port of the memory cells in the LUTRAM columns may be masked only when the first portion of cells are operated in RAM mode and are currently being accessed.
US09940993B2 Storage bitcell with isolation
A storage bitcell comprising a first inverter cross-coupled with a second inverter, both the first and second inverter being in a path between a first potential and a second potential; wherein a first isolator is connected in the path between the first inverter and the first potential. The storage bitcell has particular application as Static Random-Access Memory (SRAM) circuitry.
US09940992B2 Leakage-aware activation control of a delayed keeper circuit for a dynamic read operation in a memory bit cell
Leakage-aware activation control of a delayed keeper circuit for a dynamic read operation in a memory bit cell is disclosed. In one aspect, a leakage-aware activation control circuit is provided for a dynamic read circuit configured to perform read operations on a memory bit cell. To prevent or mitigate contention between the delayed keeper circuit and a read port circuit in the dynamic read circuit pulling a dynamic node to opposite voltage levels when a read operation is initiated, the leakage-aware activation control circuit is configured to adaptively control activation timing of the delayed keeper circuit based on a comparison of N-type Field-Effect Transistor (NFET) leakage current to P-type FET (PFET) leakage current. In this manner, the leakage-aware activation control circuit can adaptively adjust the activation timing of the delayed keeper circuit based on the actual relative strengths of NFETs and PFETs.
US09940991B2 Memory device and memory system performing request-based refresh, and operating method of the memory device
Provided are a memory device and a memory system performing request-based refresh, and an operating method of the memory device. The operating method includes: determining a weak row by counting an activated number of at least one row; requesting for refresh on the weak row based on a result of the determining; and performing target refresh on the weak row upon receiving a refresh command according to the requesting.
US09940990B1 Data shift apparatuses and methods
The present disclosure includes data shift apparatuses and methods. An example apparatus includes a memory device. The example memory device includes an array of memory cells and sensing circuitry coupled to the array via a plurality of sense lines. A first shared input/output (I/O) line is configured to selectably couple a first subset of the plurality of sense lines and a second shared I/O line is configured to selectably couple a second subset of the plurality of sense lines. A shift element is configured to selectably couple the first shared I/O line to the second shared I/O line to enable a data shift operation. A controller is configured to direct selectable coupling of the array, the sensing circuitry, and the shift element to enable a shift of a data value from the first shared I/O line to the second shared I/O line.
US09940986B2 Electrostatic discharge protection structures for eFuses
The present disclosure relates to semiconductor structures and, more particularly, to electrostatic discharge (ESD) protection structures for eFuses. The structure includes an electrostatic discharge (ESD) protection structure operatively coupled to an eFuse, which is structured to prevent unintentional programming of the eFuse due to an ESD event originating at a source.
US09940985B2 Comparison operations in memory
The present disclosure includes apparatuses and methods related to performing comparison operations in memory. An example apparatus can include a first group of memory cells coupled to a first access line and configured to store a plurality of first elements, and a second group of memory cells coupled to a second access line and configured to store a plurality of second elements. The apparatus can include a controller configured to cause the plurality of first elements to be compared with the plurality of second elements by controlling sensing circuitry to perform a number of operations without transferring data via an input/output (I/O) line, and the plurality of first elements and the plurality of second elements can be compared in parallel.
US09940982B2 Memory device having bank interleaving access
A memory device includes: a plurality of bank groups each comprising one or more banks; a first bus coupled to the plurality of bank groups; a second bus coupled to the plurality of bank groups; a toggle signal generation unit suitable for generating a first signal which toggles in response to a column command signal and a second signal having the opposite logic value of the first signal; a column command transmission unit suitable for transmitting a read command signal or write command signal to the first bus when the first signal is activated, and transmitting the read command signal or write command signal to the second bus when the second signal is activated; and a column address transmission unit suitable for transmitting one or more column address signals corresponding to the read command signal or write command signal to a bus to which the read command signal or write command signal is transmitted, between the first and second buses.
US09940981B2 Division operations in memory
Examples of the present disclosure provide apparatuses and methods related to performing division operations in memory. An example apparatus might include a first group of memory cells coupled to a first access line and configured to store a dividend element. An example apparatus might include a second group of memory cells coupled to a second access line and configured to store a divisor element. An example apparatus might also include a controller configured to cause the dividend element to be divided by the divisor element by controlling sensing circuitry to perform a number of operations without transferring data via an input/output (I/O) line.
US09940980B2 Hybrid LPDDR4-DRAM with cached NVM and flash-nand in multi-chip packages for mobile devices
An apparatus comprises a hybrid-memory multi-chip package (MCP) including a non-volatile memory (NVM) in an NVM die; a dynamic random access memory (DRAM) in two or more DRAM die, wherein a portion of the DRAM is allocated as a cache memory for the NVM; and a hybrid controller for the NVM and DRAM. The hybrid controller includes an NVM interface to the NVM; a DRAM interface to the cache memory; a host interface to communicate data with a host processor, wherein the host interface includes a parallel data bus for reading and writing data directly with both of the DRAM and the NVM; and logic circuitry configured to interleave access by the host processor and hybrid controller to the DRAM and NVM.
US09940975B2 System and method for automatically displaying variable image content in an image product
A computer-implemented method for automatically displaying variable image content in an image product includes automatically obtaining markers in photos or videos in a user account which includes detecting features in image content of the photos or the video frames and obtaining a marker for one of the photos or the video frames, automatically identifying a sequence of similar photos or videos if the markers detected in the photos or the associated video frames include more than a predetermined number or percentage of common features, detecting a marker in a photo product by a user device when the photo product is viewed by the user device, identifying a marked photo incorporated in the photo product based on the marker detected in the photo product, and enabling photos or videos in a sequence photos or videos associated with the marked photo to be displayed on the user device.
US09940973B2 Synthesizing a presentation of a multimedia event
Example embodiments of a media synchronization system and method for synthesizing a presentation of a multimedia event are generally described herein. In some example embodiments, the media synchronization system includes a media ingestion module to access a plurality of media clips received from a plurality of client devices, a media analysis module to determine a temporal relation between a first media clip from the plurality of media clips and a second media clip from the plurality of media clips, and a content creation module to align the first media clip and the second media clip based on the temporal relation, and to combine the first media clip and the second media clip to generate the presentation.
US09940970B2 Video remixing system
A method comprising obtaining, by an automatic video media remixing service, at least one source of media content to be used as a reference media content; analysing the at least one reference media content according to at least one stylistic parameter; and determining, on the basis of the at least one stylistic parameter, at least one editing rule or parameter for controlling creation of an automatic media remix.
US09940958B1 Data storage device employing delayed braking to unload multiple voice coil motors
A data storage device is disclosed wherein multiple voice coil motors (VCMs) are unloaded using a back electromotive force (BEMF) voltage generated by a spindle motor. A velocity and position of each VCM is measured, and a priority assigned to each VCM based on the measured velocity and position. During a delay interval, the BEMF voltage is used to apply a first brake voltage to a high priority VCM and to apply a second brake voltage to a low priority VCM, wherein the second brake voltage is lower than the first brake voltage. After the delay interval, the BEMF voltage is used to apply the first brake voltage to the high priority VCM and to apply a third brake voltage to the low priority VCM, wherein the third brake voltage is higher than the second brake voltage.
US09940954B2 Mass production of multichannel current perpendicular to plane head modules via preferred milling
A process according to one embodiment includes milling a media facing surface of a module having an array of sensors at a first angle, and milling the media facing surface of the magnetic head module at a second angle, not necessarily in that order. After the milling at the first and second angles, the media facing surface of the module is milled at a third angle between 55 degrees and 65 degrees from normal. An apparatus according to one embodiment includes a tape head module having an array of at least eight current perpendicular to plane sensors, wherein none of the sensors has a resistance more than about 10% away from the resistances of its nearest neighbors.
US09940950B2 Methods for improving adhesion on dielectric substrates
Various embodiments described herein provide for substrate structures including uniform plating seed layers, and that provide favorable adhesion on dielectric substrate layers. According to some embodiments, a methods for forming a magnetic recording pole is provided comprising: forming an insulator layer; forming a trench in the insulator layer; forming an amorphous seed layer over the insulator layer; forming an adhesion layer over the amorphous seed layer, the adhesion layer comprising a physical vapor deposited (PVD) noble metal; forming a plating seed layer over the adhesion layer, the plating seed layer comprising chemical vapor deposited (CVD) Ru; and forming a magnetic material layer over the plating seed layer.
US09940947B2 Automatic rate control for improved audio time scaling
Input media data with an input playing speed is received and divided into input media data subsets. A first rate of audio utterance is determined for a first input media data subset in the media data subsets. A second different rate of audio utterance is determined for a second input media data subset in the media data subsets. Audio output media data is generated with an output playing speed at which audio utterance in the audio output media data is played at a preferred rate of audio utterance. The audio output media data comprises (a) a first output audio media data subset generated based on the preferred rate, the first rate, and the first input media data subset and (b) a second output audio media data subset generated based on the preferred rate, the second rate, and the second input media data subset.
US09940944B2 Smart mute for a communication device
Methods, systems, and devices enable recovery of words spoken while a communication device is on mute during a voice call. A processor of the communication device or a network server may buffer audio segment in memory when the mute function is turned on. If the mute function is turned off soon after the input audio segment begins, or the processor recognizes from the spoken words that the speaker does not intend to be on mute, the processor may transmit to the third party participant a playback of at least one portion of the buffer in conjunction with turning off the mute function. Playback of the buffered audio segment may be sped up so that the playback catches up to current speech of the speaker. Buffering and playback of an input audio segment may be accomplished at the speaker's communication device or in a server within the communication network.
US09940943B2 Resampling of an audio signal interrupted with a variable sampling frequency according to the frame
A method for resampling an audio-frequency signal with an output sampling frequency, for a current signal frame. The method is used when the preceding frame is sampled at a first sampling frequency which is different from a second sampling frequency of the current frame. The method includes: determining a first and second segments of the signal by adding samples at zero at the end of stored samples of the preceding frame and at the start of samples of the current frame, respectively; obtaining the first resampled segment and the second resampled segment by applying at least one resampling filter respectively to the first segment resampling the first frequency at the output frequency, and to the second segment resampling the second frequency at the output frequency; and combining the overlapping portion of the first and second resampled segments to obtain at least one portion of the resampled current frame.
US09940941B2 Cross product enhanced subband block based harmonic transposition
The invention provides an efficient implementation of cross-product enhanced high-frequency reconstruction (HFR), wherein a new component at frequency QΩ+rΩ0 is generated on the basis of existing components at Ω and Ω+Ω0. The invention provides a block-based harmonic transposition, wherein a time block of complex subband samples is processed with a common phase modification. Superposition of several modified samples has the net effect of limiting undesirable intermodulation products, thereby enabling a coarser frequency resolution and/or lower degree of oversampling to be used. In one embodiment, the invention further includes a window function suitable for use with block-based cross-product enhanced HFR. A hardware embodiment of the invention may include an analysis filter bank, a subband processing unit configurable by control data and a synthesis filter bank.
US09940937B2 Screen related adaptation of HOA content
This disclosure describes techniques for coding of higher-order ambisonics audio data comprising at least one higher-order ambisonic (HOA) coefficient corresponding to a spherical harmonic basis function having an order greater than one. This disclosure describes techniques for adjusting HOA soundfields to potentially improve spatial alignment of the acoustic elements to the visual component in a mixed audio/video reproduction scenario. In one example, a device for rendering an HOA audio signal includes one or more processors configured to render the HOA audio signal over one or more speakers based on one or more field of view (FOV) parameters of a reference screen and one or more FOV parameters of a viewing window.
US09940932B2 System and method for speech-to-text conversion
This disclosure relates generally to speech recognition, and more particularly to system and method for speech-to-text conversion using audio as well as video input. In one embodiment, a method is provided for performing speech to text conversion. The method comprises receiving an audio data and a video data of a user while the user is speaking, generating a first raw text based on the audio data via one or more audio-to-text conversion algorithms, generating a second raw text based on the video data via one or more video-to-text conversion algorithms, determining one or more errors by comparing the first raw text and the second raw text, and correcting the one or more errors by applying one or more rules. The one or more rules employ at least one of a domain specific word database, a context of conversation, and a prior communication history.
US09940930B1 Securing audio data
Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for securing audio data. In one aspect, a method includes restricting access by the device to audio information detected by a microphone, receiving data indicating that the device is authorized to access audio information detected by the microphone during a limited period of time, and in response to receiving data indicating that the device is authorized to access audio information detected by the microphone during the limited period of time, providing audio information to the device. The method also includes monitoring audio information detected by the microphone during the limited period of time for the presence of a hotword and after the end of the limited period of time, restricting access by the device to audio information detected by the microphone.
US09940929B2 Extending the period of voice recognition
One embodiment provides a method, including: receiving, at an audio capture device, an activation cue; receiving, at the audio capture device, at least one command after the activation cue; performing, using a processor, an action based on the at least one command; receiving, at the audio capture device, at least one other command; and performing, using the processor, another action based on the another command without requiring another activation cue. Other aspects are described and claimed.
US09940928B2 Method and apparatus for using hearing assistance device as voice controller
A system for communication between one or more remotely controllable devices and a hearing assistance device includes a gateway device. The hearing assistance device detects voice commands issued by its wearer. The gateway device wirelessly communicates with the hearing assistance device, produces one or more control signals based on the voice commands, and routes the one or more control signals to one or more devices selected from the one or more remotely controllable devices according to the voice command.
US09940920B2 Managing a set of devices using a set of acoustic emission data
Disclosed aspects relate to managing a set of devices using a set of acoustic emission data which indicates device-health of the set of devices. The set of devices is coupled with a set of acoustic emission sensors. Based on the set of acoustic emission data, a triggering event related to a first device of the set of devices is detected. Using the set of acoustic emission data, an event response which includes a first modification with respect to operation of the first device is determined. Establishment of the event response which includes the first modification with respect to operation of the first device is initiated.
US09940919B2 Method and device for damping or amplifying a sound introduced into a passenger compartment of a motor vehicle
The invention relates to a method (30) for damping and/or amplifying a sound introduced into a passenger compartment (10) of a motor vehicle, in particular an electrically driven motor vehicle, said sound being generated (32) by a sound source (22) arranged outside of the passenger compartment (10). A correction signal is generated (40) by means of correction signal means (16) which are paired with the sound source (22) and/or a sound-transmitting structure (20) of the motor vehicle, and the correction signal is determined (38) such that the sound is introduced into the passenger compartment (10) in a damped or amplified state.
US09940917B1 Noise generating clapper apparatus
A noise generating clapper apparatus includes a main body sheet having a plurality of foldable flaps, the plurality of flaps having a front flap attached to a rear flap along a first fold line and a joint flap attached to the rear flap along a second fold line, and a clapper member pivotably mounted to the joint flap. The joint flap folds along the second fold line and the front flap folds along the first fold line to enclose the clapper member between the front and rear flaps in a secured position. The main body sheet is maneuvered in a shaking motion to permit the clapper member to pivot between the front and rear flaps, thereby enabling the clapper member to generate noise upon contact with the first fold line of the main body sheet.
US09940916B2 Key guide structure for keyboard instrument
A key guide structure for a keyboard instrument, which is capable of stably and appropriately guiding a key pivotally moved by key depression without generating noise. The key guide structure has guide holders each erected below a guide recess of each key, and guide members mounted to tops of the guide holders, respectively, each for sliding contact with lateral inner side surfaces of the recess. Each guide member includes a body disposed between the lateral inner side surfaces of the recess with a predetermined clearance, two lateral flexible portions laterally flexible and extending from lateral ends of a front or rear surface of the body in a manner protruding in a front-rear direction, and two lateral contact portions which are provided at front ends of the flexible portions in a manner protruding sideward and are in contact with the lateral inner side surfaces of the recess.
US09940915B2 Effect unit based on dynamic circuit modeling method that can change effect wirelessly
An effect unit based on dynamic circuit modeling method that can change effect wirelessly, comprises a sound effect algorithm database, a mobile APP client and a sound effect device. The mobile APP client checks updates of the sound effect algorithm database, downloads new sound effect algorithms to the local device and displays the same in the form of a list, and the sound effect algorithms are downloaded to the sound effect device in a wireless communication mode by opening the wireless communication function of the mobile APP client; analog signals sent by an electrophone are converted into digital signals by ADC, the digital signals are processed by a DSP sound effect algorithm in the sound effect device, then the digital signals are converted into analog signals by DAC, and the analog signals are output by sound effect output equipment.
US09940905B2 Clock rate adjustment for processing unit
Techniques are described in which a processor determines an expected performance level of a graphics processing unit (GPU) based on an amount of commands the GPU is to execute. The processor outputs information indicating the performance level, and the GPU adjusts its clock rate prior to execution of the commands that were used to determine the performance level.
US09940904B2 Techniques for determining an adjustment for a visual output
Various embodiments are generally directed to an apparatus, method and other techniques for receiving image information for a current frame, determining an amount of change between the current frame and a previous based on the image information for the current frame and image information for a previous frame and determining an adjustment of a frame time based on the amount of change between the current frame and the previous frame.
US09940901B2 See-through optical image processing
Systems and methods for performing optical image processing via a transparent display are disclosed. In one example approach, a method comprises determining a position of incident light on a see-through display device, determining a direction of the incident light relative to the see-through display device, and modulating, with the see-through display device, a transmission of the incident light through the see-through display device based on the determined position and determined direction of the incident light.
US09940900B2 Peripheral electronic device and method for using same
A peripheral electronic device is described which is configured to communicate with a computing device comprising a display having a screen configured to display a virtual gaze cursor; wherein the peripheral electronic device comprises at least one user interface configured to trigger at least one operational command in response to interaction with a user, wherein the at least one operational command is associated with a current location of the virtual gaze cursor at the screen, and wherein a change at the current location of the virtual gaze cursor being displayed, is determined based on a shift of a user's gaze from a first location at said screen to a different location thereat, or based on a tilt of the user's head, or based on any combination thereof.
US09940897B2 Systems and methods for a shared mixed reality experience
A method for sharing a mixed reality experience (mixed reality content, mixed reality event) between one or more computing devices is disclosed. The method includes: determining a spatial location and a spatial orientation (spatial data) of the one or more computing devices each having a camera; mapping the (spatial) location and/or the spatial orientation (spatial data) of each of the one or more computing devices into a mixed reality manager; and presenting an event that is shared among the one or more computing devices, and, the presenting of the event is experienced simultaneously and varies among each of the one or more computing devices depending on the location or the orientation or both.
US09940894B2 Circuit of display panel
The present embodiment is provided for a circuit of display panel, wherein comprising a signal wire extending along the first direction, a public electrode wire extending along the second direction, a pixel electrode, the first discharge circuit and the second discharge circuit, each signal wire is electrical connecting with the public electrode wire with the first discharge circuit and the second discharge circuit, the first discharge circuit and the second discharge circuit is in series, the pixel electrode is connecting on the intersection point between the first discharge circuit and the second discharge circuit.
US09940889B2 Gate driving circuit and display device including the same
A gate driving circuit including a plurality of stage circuits to output a plurality of gate signals, a N-th stage circuit of the plurality of stage circuits includes: an output pull-up part including a control electrode connected to a first node, the first node being configured to have a potential increase in response to a (N−1)-th control signal received from a previous stage circuit of the N-th stage circuit, the output pull-up part to receive a clock signal to output a gate signal of the N-th stage circuit; a control node pull-up part to control the potential of the first node by using the (N−1)-th control signal; and a control node pull-down part to discharge the first node to a second low voltage according to a (N+1)-th control signal, wherein the output pull-up part is to discharge the gate signal of the N-th stage circuit in a (N+2)-th stage circuit.
US09940883B2 Display panel inspection apparatus
A vision inspection apparatus includes a tri-stimulus measuring part configured to measure gray tri-stimulus values of a sample grayscale and color tri-stimulus values of a full-grayscale, a color tri-stimulus generating part configured to generate color tri-stimulus values of the sample grayscale using the gray tri-stimulus values of the sample grayscale and the color tri-stimulus values of the full-grayscale, and a color correction value generating part configured to generate color grayscale correction value using the gray tri-stimulus values of the sample grayscale and the color tri-stimulus values of the sample grayscale.
US09940879B2 White point uniformity techniques for displays
The present disclosure generally relates to systems and techniques for calibrating displays to improve the white point uniformity between similar type devices. In one embodiment, a backlight includes multiple strings of LEDs, where each string is driven by a separate driver, or driver channel. Each string may be separately tested at a base current to determine its emitted chromaticity, and values indicative of the emitted chromaticities may be stored within the backlight as calibration values. The calibration values may then be used to determine the driving strength for each string that allows the display to produce the target white point when the light from the strings is mixed. Further, in certain embodiments, adjustments also may be made to the LCD panel based on the emitted chromaticities at the base current.
US09940877B2 Gray-scale voltage generating circuit to control luminance of the display unit
A gray-scale voltage generating circuit includes: a ladder resistor circuit including a plurality of resistors connected in series to one another, and configured to output a plurality of gray-scale voltages with different voltage values from ends of the respective resistors; and a constant current source configured to be connected in series to the ladder resistor circuit, in which the constant current source includes a current source transistor configured to be connected in series to the ladder resistor circuit, and a voltage setting section configured to select one voltage from the plurality of voltages and set the selected voltage as a voltage determining a current that is to flow through the current source transistor.
US09940875B2 Shift register unit and driving method thereof, gate driving circuit and display apparatus
Embodiments of the present disclosure provide a shift register unit and a driving method thereof, a gate driving circuit and a display apparatus. The shift register unit includes a reset signal sub-unit and a scan signal sub-unit. The reset signal sub-unit includes a first input module, a first output module, and a first control module. The scan signal sub-unit includes a second input module, a second output module, and a second control module. The first input module is connected with the first control module, the first output module, and a signal input terminal. Both the first output module and the first control are connected with the scan signal sub-unit and a reset signal terminal. The second input module is also connected with the second output module and the second control module. Both the second output module and the second control module are connected with a signal output terminal.
US09940871B2 Method of sensing degradation of pixel and organic light emitting diode display device
In a method of sensing degradation of pixels in an organic light emitting diode (OLED) display device, the method includes: generating degradation sensing data for the pixels by sensing the degradation of the pixels; generating degradation estimation data for the pixels based on input image data for the pixels; setting a degradation baseline for each sensing channel based on the degradation estimation data; and determining degrees of degradation of the pixels based on a difference between the degradation sensing data and the degradation baseline.
US09940869B2 Internal clock signal control for display device, display driver and display device system
A display device includes a display panel and a display driver driving the display panel. The display driver is connected to a host with a clock lane and at least one a data lane. The display driver includes: an interface circuit configured to receive an external clock signal from the host via the clock lane, receive a data signal from the host via the data lane, and output reception data transmitted over the data signal; a control circuit configured to output an internal clock signal synchronous with the external clock signal; and a drive circuitry configured to drive the display panel in response to image data included in the reception data in synchronization with the internal clock signal fed from the control circuit. The control circuit is configured to feed the internal clock signal in response to a type of a reception packet included in the reception data.
US09940868B2 Convergent monotonic matrix factorization based entire frame image processing
Technologies are generally described for the display of images by employing monotonic matrix factorization and sub-frame approximation image integration. In some examples, drive signals for a display device may be generated by iteratively applying a monotonic non-negative matrix factorization (NNMF) process to source image data. A given iteration of the monotonic NNMF process may result in approximation image data, partial sum image data, and residue image data, some or all of which may be further processed via subsequent iterations of the monotonic NNMF process. A generated approximation image data may then be displayed during a sub-frame time interval by selective activation of multiple row and column drivers. A series of such displayed approximation image data may effectively correspond to the original source image. In particular, the monotonic NNMF process may allow the generation of non-negative residue image data without the use of element reduction.
US09940865B2 Liquid crystal display device
A liquid crystal display device includes: an image processing circuit configured to carry out image processing on input display data input from an outside; and a timing controller configured to receive display data subjected to the image processing by the image processing circuit, to thereby generate a plurality of timing signals for defining an operation timing of a data line driving circuit and an operation timing of a gate line driving circuit, the image processing circuit being configured to receive at least one timing signal among the plurality of timing signals generated by the timing controller, to thereby carry out the image processing on the input display data based on the received at least one timing signal.
US09940862B2 Flexible display
A flexible display is disclosed. In one aspect, the flexible display includes a flexible display panel, a main support supporting a first area of the flexible display panel and first and second sub-supports respectively supporting second and third areas of the flexible display panel. The second and third areas are adjacent to the first area. The flexible display further includes first and second hinges respectively connecting the main support to the first and second sub-supports. The flexible display panel is configured to be arranged in first to third configurations respectively exposing different areas of the flexible display panel.
US09940861B2 Display systems with compensation for line propagation delay
A method for characterizing and eliminating the effect of propagation delay on data and monitor lines of AMOLED panels is introduced. A similar technique may be utilized to cancel the effect of incomplete settling of select lines that control the write and read switches of pixels on a row.
US09940856B2 Preassembled display systems and methods of installation thereof
A preassembled display system is assembled at a first location by attaching a plurality of display panels to a frame. The preassembled display system is loaded onto a transportation vehicle. Next, the preassembled display system is moved to a second location in a transportation vehicle. The display unit is installed at the second location by attaching the preassembled display system to a mounting unit. A receiver box for providing media to display at the plurality of display panels is attached. The attaching of the receiver box may be performed at the first location and/or at the second location. The plurality of display panels are electrically connected to the receiver box. Again, the electrically connecting may be performed at the first location and/or at the second location.
US09940854B2 Methods of monitoring electronic displays within a display network
Methods of monitoring one or more electronic displays are disclosed. A method may include performing at least one diagnostic operation on at least one electronic display having at least one camera, a display element, and a display server. Further, the method may include transmitting data relating to the at least one diagnostic operation to a network remote from the at least one electronic display. Additionally, the method may include displaying the data within the remote network.
US09940853B2 Label and method of manufacturing the same from recycled material
The present invention relates to brand identifiers, more particularly to woven labels used to mark, advertise or otherwise brand apparel and other consumer articles to identify the source of the particular goods. The woven labels of the present invention are preferably composed of post consumer waste or recycled materials, such as polyethylene, PET, polyester, cellulosic and other readily available materials that may be converted for the purpose of the present invention.
US09940848B1 Pre-license development tool
Methods, computer-readable media, software, and apparatuses provide a tool for use by drivers and/or coaches throughout the pre-license stage of obtaining a driver's license. A pre-license program may control a computing device to collect drive data while a driver is driving a vehicle. This drive data may be used to detect a drive event. Then, the computing device may present coaching information associated with the detected drive event. The coaching information may provide a passenger, such as a coach or parent, with real-time advice for instructing the driver how to improve his/her driving skills. Moreover, the drive data collected may be used to prepare reports providing feedback to the drivers and coaches.
US09940847B1 Virtual reality exercise device
A virtual reality exercise device including : at least one actuator; at least one of a handle, a foot stirrup, a step, and a limb strap, where the at least one actuator is coupled to the at least one of a handle, a foot stirrup, a step, and a limb strap, where the actuator is designed to provide resistance force to at least one motion carried out by the user; a computer processor; computer readable non-transitory medium coupled in communication with the computer processor; an actuator control circuit coupled in communication to the computer processor and adapted to receive signals from the computer processor and output the signals to control the at least one actuator; a software algorithm stored on the computer readable non-transitory medium, where the computer processor executes the software algorithm, where the computer processor outputs a signal that is at least partially used by the actuator control circuit to control the at least one actuator; a virtual reality display coupled in communication to the processor, wherein the virtual reality display is adapted to create a visual display for the user, wherein the communication between the processor and the virtual reality display is adapted to synchronize the force output of the at least one actuator and the virtual reality display. The virtual reality exercise device is preferably designed to provide variable, interactive, and immersive exercises that include force the follows along with either real world physical activities, or fantasy activities, while at the same time providing physical exercise for the user. There may, however, be any suitable use for the virtual reality exercise device.
US09940845B2 Electronic healthcare education system and method
A healthcare education software, which is executed by an electronic healthcare education system, incorporates a medical content authoring software platform with a medical authoring interface, a medical training, simulation, and evaluation software platform with a virtual patient examination simulator and an interactive prediction table, and a computerized medical causal concept diagram construction and evaluation software platform with corresponding interfaces for training of medical students and other healthcare professionals. Preferably, the healthcare education software is connected to a robust medical information database that contains a wealth of physiological simulation animation files, evidence-based patient diagnostic information, and other pertinent medical information, which can be readily imported and utilized by a healthcare education content creator in creating and updating medical training contents via the medial authoring interface. The healthcare education software may be executed on a CPU and a memory unit of a computer system, a portable device, or another electronic device.
US09940841B2 Method for improving a flight trajectory of an aircraft as a function of meteorological conditions
A navigation aid method to determine an improved trajectory between points of departure and arrival as a function of a trajectory cost, comprises: determining a grid of nodes, loading meteorological data at the nodes, determining for each node, an average instantaneous cost from a first instantaneous cost as a function of a ground speed taking into account meteorological data loaded at the node concerned, and from a second instantaneous cost as a function of a ground speed that does not take into account the loaded meteorological data, determining a length of a trajectory passing through the node and arriving at the point of arrival, determining a cost grid assigning, at each of the nodes of the grid, a local cost determined from the average instantaneous cost and the length, determining an improved trajectory from the cost grid, and graphically representing the improved trajectory and/or the cost grid to a crew.
US09940839B2 Emergency safety marker systems
An electronic lighted safety marker system used by emergency responders to warn motorists of the presence of an accident scene ahead on or beside the roadway is provided by the invention. Such safety marker can be deployed individually or in groups by the emergency responder along the perimeter of the accident scene and ideally ahead of it along the roadway to provide adequate warning to approaching motorists to avoid the accident scene. The safety marker contains a power source, a light panel, a protective shield for the light panel, and electronic circuitry for controlling the operation of the lights in a predetermined frequency or pattern, and may be automatically actuated and self-righting when it is dropped onto the ground or other hard surface. The safety marker further includes a transmitter for sending a signal to a receiver. Upon impact with the safety marker, the signal ceases and the receiver, equipped with an alarm, triggers either or both of an audible or visual signal. The safety marker can also contain an incursion warning system against incoming vehicles, an early warning radar transponder for sending a warning message to such incoming vehicles, a GPS location detector and transmitter for providing the location of the safety marker and its associated accident scene to a central dispatcher, and a gunshot sensor for detecting the occurrence of gunfire around the accident scene and its location to provide that information to the central dispatcher.
US09940838B2 Reference tokens for managing driverless cars
Negotiating a multi-vehicle environment using vehicle-to-vehicle network tokens for intra-vehicle communication. Preliminary routing assignments are efficiently improved by available intra-vehicle communication.
US09940837B2 Reference tokens for managing driverless cars
Negotiating a multi-vehicle environment using vehicle-to-vehicle network tokens for intra-vehicle communication. Preliminary routing assignments are efficiently improved by available intra-vehicle communication.
US09940832B2 Traffic management based on basic safety message data
The disclosure includes a system and method for managing traffic in a roadway system based on Basic Safety Message data (“BSM data”) included in a set of Basic Safety Messages (“BSMs”). The method may include wirelessly receiving a set of BSMs describing a set of vehicles traveling along the roadway system. Each BSM included in the set of BSMs may describe a specific vehicle included in the set of vehicles, including that vehicle's lane, speed and heading of travel. The method may include analyzing the BSM data to determine whether there is an imbalance of traffic flow among a first set of vehicles traveling towards a first heading and a second set of vehicles traveling towards a second heading. The method may include determining that the bidirectional lane will be reconfigured so that traffic in the bidirectional lane flows towards the second heading based on the imbalance of traffic flow.
US09940829B2 Methods and devices for binding a remote control
The present disclosure relates to methods, apparatus, and devices for binding a remote control to a remotely controllable device. In one implementation, a method is disclosed, including: acquiring, by the remote control, a binding operation instruction; sending, by the remote control, a binding request containing identification information of the remote control to a remotely controllable device with which the remote control is to be bound such that the remotely controllable device generates a binding response message in response to the binding request, wherein the binding response message comprises authentication information for binding the remote control; receiving, by the remote control, the binding response message from the remotely controllable device; and performing, by the remote control, binding with the remotely controllable device based on the binding response message, such that the remotely controllable device becomes bound to the remote control and the remote control becomes capable of controlling the bound remotely controllable device.
US09940824B2 System and method of self-monitoring notification appliances
Systems and methods of self-monitoring notification appliances are provided. A self-monitoring notification appliance can include a notification device and a monitoring sensing device. The notification device can produce one or more signals, and the monitoring device can sense a visual and/or acoustic characteristic of the one or more signals to determine successful operation thereof.
US09940823B2 System, method, and recording medium for emergency identification and management using smart devices and non-smart devices
An emergency method, system, and non-transitory computer readable medium include a detection device configured to detect an emergency situation and switch a first device to emergency mode, an emergency mode device configured to gather information regarding the emergency situation while the first device is in emergency mode, and an actuation and discovery device configured to discover a second device in a vicinity of the first device and actuate the second device to perform an action based on the emergency situation detected by the detection device.
US09940822B2 Systems and methods for analysis of subject activity
There is provided a method of detection and monitoring of at least one position based activity by a subject, comprising: providing a wearable monitoring device including at least one position tag for tracking location of the subject in a space; collecting body movement and location data of the subject within the space based on the tracked location of the position tag; providing at least one activity sensor configured to sense at least one body movement of the subject within the space; collecting body movement data based on the activity sensor; correlating the body movement data with the location data; contextually analyzing the correlation to identify at least one abnormal event or at least one normal event based on subject body movement and location where the body movement is performed; and generating an alert indicative of the abnormal event or the normal event.
US09940813B2 Abnormality reporting system and electric tool, and communication terminal
A technique capable of immediately reporting to an operator an occurrence of abnormality in an electric tool is provided. A communication terminal 100 includes a communication-terminal-side control unit that determines whether abnormality has occurred in any of electric tools 10, 200, 300, and 400 based on information acquired from the electric tools 10, 200, 300, and 400 via wireless communication. When the communication-terminal-side control unit determines the occurrence of abnormality in any one of the electric tools 10, 200, 300, and 400, the occurrence of abnormality in the electric tool 10, 200, 300, or 400 is reported by at least one of a report unit included in the electric tools 10, 200, 300, and 400 other than the electric tool 10, 200, 300, or 400 in which the occurrence of abnormality is determined and a report unit included in the communication terminal 100.
US09940811B2 System and method of biomechanical posture detection and feedback
A system and method are described herein for a sensor device which biomechanically detects in real-time a user's movement state and posture and then provides real-time feedback to the user based on the user's real-time posture. The feedback is provided through immediate sensory feedback through the sensor device (e.g., a sound or vibration) as well as through an avatar within an associated application with which the sensor device communicates.
US09940801B2 Multi-function per-room automation system
Examples are directed towards providing a set of hub devices for providing per-room monitoring of an area associated with a structure. A set of hub devices monitors movements of a user through the monitored area to generate user traffic data. A dynamic map of the monitored area is generated based on the user traffic data. The set of hub devices detects sounds occurring within the monitored area. The detected sounds are identified. Some of the detected sounds are amplified and replayed on speaker(s) within the monitored area. Notifications of some detected sounds are provided to user device(s) to notify at least one user of the occurrence of the detected sounds. If a detected sound indicates a safety issue, a safe route leading from a current location of the user to a different potentially safer location is generated and provided to the user to facilitate an evacuation.
US09940799B2 Fence monitoring
A fence alarm, having a plurality of laterally spaced electrically conductive fence elements, the fence elements electrically being connected in series with each other, a sensing arrangement electrically connected to the plurality of conductive fence elements, the sensing arrangement being calibrated to a nominal electrical value, the sensing arrangement further being operable to sense a predefined deviation from the nominal electrical value caused by a deviation in an electrical property of the conductive fence elements.
US09940796B2 Yellow fellow safety sign
A portable wet floor caution sign and attention getting warning devise that includes at least two rigid panels mounted at the top end. Audible voice box to speak multiple languages/beeping sounds, a rotating camera and visual signaling flashing lights devices can be mounted on the panels and can be activated by a motion sensor and or moister sensors circuits and therefore may include off and on sequencing switches powered by a solar charged battery pack.
US09940794B2 Gaming device with shifting replacement symbols
A video slot machine has M reels, each displaying N symbols when stopped. Above the display of the reels is a set of generally valuable replacement symbols that have been independently selected at random independent from the reel display. Each reel is associated with a particular replacement symbol in the set. If a special symbol is displayed on a reel, the replacement symbol associated with that reel substitutes for the special symbol when determining the award. Examples of the replacement symbols include wild symbols, bonus symbols, and multiplier symbols. After each game, the replacement symbols are shifted, and used replacement symbols are randomly replaced to vary the possibilities for each game. The player is incentivized to play longer due to the possibility of using valuable replacement symbols in the symbol array and the possibility of very high awards being granted by multiple special symbols being displayed.
US09940792B2 Methods and apparatus for enhanced play in lottery and gaming environments
Methods and apparatus for game play using virtual players, sometimes referred to herein as vBots, is disclosed. In one aspect, a method for game play involves the use of the system electronic system environment described herein, wherein one or more virtual players are displayed to the player of the game, preferably, the virtual players have differing play characteristics, receiving from the user association with a selection of a virtual player, displaying a simulated game using the virtual players, identifying a subset of the virtual players as being winners of the simulated game, and awarding a win to the lottery user if the selected virtual player is in the subset of virtual players.
US09940791B2 Metagame reward point system
Aspects of the present disclosure include systems and methods for instituting a metagame point system that may be integrated into an online video game network for one or more video game platforms. The metagame points system may increase or decrease a user's point total based upon user performance across a plurality of different video game titles. In some implementations, the points may be transferable between users based upon user performance during multiplayer video game play. In further implementations, the points earned by a user may be redeemable for various rewards.
US09940790B2 Assigning a secure room to a player in online poker game
Methods, systems, and computer programs are presented for selecting game servers and assigning seats to players in poker tables. One method includes an operation for receiving table parameters from a user in a poker game. The table parameters identify the characteristics of a desired table for playing poker by the user. A distance from the desired table to the available poker tables is calculated, where the distance based on the similarity between the desired table and each of the available poker tables. Each of the available poker tables is served by one of a plurality of servers. Additionally, the method includes operations for selecting candidate tables from the available poker tables based on the calculated distances, and for selecting a playing table from the candidate tables at random. The user is then connected to a server that serves the selected playing table.
US09940787B2 Nested online games for real money gambling
Software on a server and/or client device verifies a user as eligible to play an online game in which the wager and payout are made with real money. The software causes a graphical user interface (GUI) view for a first online game to be displayed to a user. The software then receives a first game input from the user. The first game input represents a wager or a play according to game mechanics of the first online game. The software causes a GUI view for a second game to be displayed to the user. And the software receives a second game input from the user. The second game input represents a play according to game mechanics for the second game. Then the software provides a payout for the first online game. The payout includes a promotional payout that depends at least in part on the second game input.
US09940782B2 Electronic gaming device
Examples disclosed herein relate to systems and methods, which may receive gaming data from one or more gaming tables. The systems and methods may obtain gaming data from one or more gaming tables via a network interface based on at least one of a searching structure and a search algorithm. The systems and methods may compare betting criterion to the gaming data. The systems and methods may initiate at least one of a wager based on a comparison of the betting criterion to the gaming data and a display of data related to a search result.
US09940781B2 Recording and reproduction of wagering game play step events occuring in multiple nested bonus games
A gaming system includes game-logic circuitry that primarily performs a casino wagering game. The casino wagering game includes gaming events (play steps) having outcomes that may trigger and perpetuate a multi-level bonus game. As the wagering game is performed, a game cycle data record is created containing game cycle data related to the outcome of the play steps. A predetermined number of the most recent game cycle data records are stored in non-volatile memory. Each game cycle data record includes a predetermined number of play step data records for the base-game, bonus-game-triggering, and bonus-game play steps, as performed in chronological order. When the predetermined number of play step data records is exceeded, the oldest non-triggering play step data record is removed from the game cycle data and accrued into summary data specific to a nested-depth of the play step for the game cycle.
US09940772B2 Payment smart cards with hierarchical session key derivation providing security against differential power analysis and other attacks
Chip cards are used to secure credit and debit payment transactions. To prevent fraudulent transactions, the card must protect cryptographic keys used to authenticate transactions. In particular, cards should resist differential power analysis and/or other attacks. To address security risks posed by leakage of partial information about keys during cryptographic transactions, cards may be configured to perform periodic cryptographic key update operations. The key update transformation prevents adversaries from exploiting partial information that may have been leaked about the card's keys. Update operations based on a hierarchical structure can enable efficient transaction verification by allowing a verifying party (e.g., an issuer) to derive a card's current state from a transaction counter and its initial state by performing one operation per level in the hierarchy, instead of progressing through all update operations performed by the card.
US09940771B2 Security apparatus for an automated teller machine
A method and associated security apparatus for providing security to an automatic teller machine (ATM) having a cash capture device in a presenter area of the ATM. The cash capture device is detected by a proximity detector in the security apparatus in the ATM. A detecting signal is generated by the proximity detector in response to the cash capture device being detected. The detecting signal is received by control circuitry in the security apparatus and in response, the control circuitry causes a dispensing shutter of the ATM to remain in an open position. Each proximity detector is electrically connected to the control circuitry. The dispensing shutter in the open position is configured, in an absence of the cash capture device in the ATM, to dispense paper currency processed and stored in the presenter area. Presenter belts in the presenter area transport the paper currency to a dispenser aperture.
US09940768B2 Access control system
Provided is a method for access control, performed by an access control apparatus, including obtaining access authorization information that is communicated to the access control apparatus having at least one access authorization parameter and first check information; using at least the communicated access authorization parameters, the communicated first check information and a second key from a key pair, which second key is stored in the access control apparatus, to perform a first check on whether the communicated first check information has been produced by performing cryptographic operations by means of access authorization parameters corresponding to the communicated access authorization parameters using at least one first key from the key pair, and deciding whether access can be granted, based on the first check delivers a positive result and it is established that at least one predefined set of the communicated access authorization parameters respectively provides access authorization.
US09940767B2 Touch pad lock assembly
A lock assembly for a closure comprises a housing, a handle and a latch plunger operably connected with the handle. A key lock has a locked and unlocked position. A lock cam is rotatably mounted in the housing and is operably connected with the key lock for rotation therewith. A link is operably connected with the crank arm and a deadbolt lock movably mounted in the housing for shifting between a locked position, wherein the closure is retained in the closed position, and an unlocked position, wherein the closure is free to be shifted between open and closed positions. The deadbolt lock is operably connected with the link to a motor. A computer input device mounted on the exterior portion of the housing is operatively connected with the motor, whereby entry of a preselected code actuates the motor and contemporaneously shifts the deadbolt lock between the locked and unlocked positions.
US09940763B2 On-vehicle apparatus control system, on-vehicle control device, and portable machine
An on-vehicle apparatus control system includes: an on-vehicle control device; and a portable machine. The on-vehicle apparatus control system includes: a mode switching unit that selects a permission mode or a prohibition mode; and an illegality recording portion that records transmission or reception of a response request signal as illegality history in a case where the response request signal is transmitted from the on-vehicle control device or is received by the portable machine during the prohibition mode. If the response request signal is received by the portable machine during the permission mode, the portable machine transmits the response signal. If the response request signal is received by the portable machine during the prohibition mode, the portable machine transmits an illegality notification signal instead of the response signal, and the on-vehicle control device does not control an on-vehicle apparatus if the illegality notification signal is received.
US09940758B2 Method for communicating vehicle data of a vehicle
A method for communicating vehicle data relating to a vehicle automatically determines whether a vehicle is in a predefined surrounding area of a service facility. If this has been detected, a predefined set of vehicle data is provided via a communication interface of the vehicle for transmission to a vehicle data collection device. The set of vehicle data received by the vehicle data collection device is at least partially made available to the service facility.
US09940755B2 Explorable augmented reality displays
Concepts and technologies are disclosed herein for explorable augmented reality displays. An augmented reality service can receive a request for augmented reality display data. The request can be associated with a device. The augmented reality service can determine a location associated with the device and identify augmented reality data associated with the location. The augmented reality service can provide augmented reality display data to the device.
US09940753B1 Real time surface augmentation using projected light
A method of augmenting a target object with projected light is disclosed. The method includes determining a blend of component attributes to define visual characteristics of the target object, modifying an input image based, at least in part, on an image of the target object, wherein the modified input image defines an augmented visual characteristic of the target object, determining a present location of one or more landmarks on the target object based, at least in part, on the image of the target object, predicting a future location of the one or more landmarks, deforming a model of the target object based on the future location of the one or more landmarks, generating an augmentation image based on the deformed model and the modified input image, and transmitting for projection the augmentation image.
US09940749B2 Method and system for generating three-dimensional garment model
The present invention provides a method and a system for generating a three-dimensional garment model, where garment component composition information and attribute information corresponding to each garment component are acquired by acquiring and processing RGBD data of a dressed human body, and then a three-dimensional garment component model corresponding to the attribute information of each garment component is selected in a three-dimensional garment component model library, that is, a three-dimensional garment model can be constructed rapidly and automatically only with RGBD data of a dressed human body, and human interactions are not necessary during the process of construction, thus the efficiency of a three-dimensional garment modeling is improved, and it has significant meaning for the development of computer-aided design, three-dimensional garment modeling and virtual garment fitting technology.
US09940746B2 Image fetching for timeline scrubbing of digital media
Disclosed are systems, methods, devices and computer-readable mediums for image fetching for timeline scrubbing of digital media. In some implementations, a method comprises: receiving at a first time prior to receiving a scrub command, a first set of scrub images associated with digital media, the first set of scrub images having a first set of positions on a timeline of the digital media; receiving a first scrub command; receiving at a second time after the first time, a second set of scrub images associated with the digital media, the second set of scrub images having a second set of positions on the timeline that fill time gaps in the first set of positions on the timeline; animating, a timeline overlay including the timeline, a playhead and a scrub image window; and selecting a scrub image from the first or second sets of scrub images for presentation in the scrub image window.
US09940743B1 Optimizing map generation by reducing redundant tiles
Systems and methods of identifying map tile nodes in a tree data structure are provided. Map tiles are generated, certain ones of which are identified as optimized based on sharing a predetermined attribute that could be redundant with that of other map tiles, eliminating the need to create selected subtrees descending from a parent node. A client device, detecting an error message indicating the absence of a tile in what would be the subtree, can request a parent node of the subtree. Also, a client device, prior to requesting a node below the default level, can consult a matrix that indicates whether the node exists and if not then select a parent node on the default level.
US09940742B2 Incremental automatic layout of graph diagram
Adding new nodes to a graph diagram. A set of one or more new nodes is identified from a graph to be added to an existing graph diagram. A set of one or more anchor candidate nodes are identified in the graph that are coupled to the nodes in the set of one or more new nodes. One of the nodes in the set of one or more anchor candidate nodes is selected as an anchor node. An automatic graph diagram layout of the anchor node and new nodes that are to be coupled to the anchor node is performed to create a disjoint graph diagram. A spatial offset from the anchor node to each of the new nodes coupled to the anchor node in the disjoint graph diagram is identified. Each of the new nodes is added to the existing graph diagram while maintaining the identified spatial offsets.
US09940740B2 Refractometer
The present invention aims to provide a refractometer that can satisfactorily observe an actual state of measurement light during a measurement with low cost. A graph 311 showing detection intensity of measurement light detected by a detector and a captured image 312 by a camera are displayed on one display screen 301 in real time. This configuration eliminates the need to separately provide a display unit for displaying the captured image 312 by the camera, thereby reducing cost. In addition, the actual state of measurement light can satisfactorily be observed during the measurement through the confirmation of the captured image 312 by the camera displayed on one display screen 301 along with the graph 311 in real time.
US09940739B2 Generating interactively mapped data visualizations
A method and systems for generating interactively mapped data visualizations are provided. The system includes geocoded data and a user interface for displaying visualized geocoded data. A visualization circuitry is configured to access the time-series geocoded data, obtain activity data, develop relationship data according to the obtained activity data to reflect relationships among the time-series geocoded data, select a data display mode and process the time-series geocoded data by receiving a selection, generating an area map, filtering the time series geocoded data, associating the relationship data with the filtered time series geocoded data, transforming the filtered time series geocoded, and generating a display of the displayable data.
US09940736B2 Medical image diagnostic apparatus
According to one embodiment, a medical image diagnostic apparatus includes a storage memory, processing circuitry, and a display. The storage memory stores data of a plurality of FFR distribution maps constituting a time series regarding a coronary artery, and data of a plurality of morphological images corresponding to the time series. The processing circuitry converts the plurality of FFR distribution maps into a plurality of corresponding color maps, respectively. The display displays a plurality of superposed images obtained by superposing the plurality of color maps and the plurality of morphological images respectively corresponding in phase to the plurality of color maps. The display restricts display targets for the plurality of color maps based on the plurality of FFR distribution maps or the plurality of morphological images.
US09940735B2 System and method for generating a CT slice image
The present invention provides a system and method for generating a CT slice image. The system comprises an MIP image generation module, a region of interest determination module, an angle setting module, a curve determination module, a match module and a slice generation module. The MIP image generation module generates MIP images of a reconstructed image; the region of interest determination module determines an image range in an original slice, and determines the parts of the MIP images within the image range as regions of interest; the angle setting module rotates the regions of interest to a plurality of specific angles for a plurality of times; the curve determination module generates a plurality of two-dimensional projected curves of the regions of interest for the plurality of specific angles; the match module selects a two-dimensional projected curve matching with a part to be diagnosed based on features of the plurality of two-dimensional projected curves; the slice generation module determines a slice position range and a slice angle based on the features of the matched curve and the corresponding specific angle.
US09940728B2 Computer vision assisted item search
System and techniques for computer vision assisted item search are described herein. A composite image, including visual data and depth data, may be obtained. The composite image may be filtered to isolate a clothing article represented in the composite image. A classifier may be applied to the depth data to produce a set of clothing attributes for the clothing article. The clothing attributes may then be provided to a remote device.
US09940724B2 Method and system for detecting multiple moving objects from real-time aerial images
In accordance with various embodiments of the disclosed subject matter, a method and a system for detecting multiple objects from real-time images are provided. The method comprises: performing, using a CPU host, an image segmentation process to divide real-time input images into a plurality of image partitions; performing, by multiple GPUs, a fast block-wise registration process, a mark setting process, a background generation process, a foreground generation process based on a Hyper-Q computation infrastructure, and a support vector machine classification process; and generating, by the CPU host, visualization classification images.
US09940719B2 Alignment of an ordered stack of images from a specimen
A method and apparatus include and aligner configured to align an ordered stack of images by successively determining, for at least two already aligned images of the ordered stack, the respective misalignments with an unaligned image which is to be aligned next, and a selector configured to select from the at least two aligned images as a reference image that aligned image with which the unaligned image has the smallest amount of misalignment. The unaligned image is then aligned with the selected reference image.
US09940716B2 Method for processing local information
A method for processing local information acquired by a virtual representation and a device having an inertial unit and an image sensor. At least one image of a real environment of the device is captured. The localization of the device in the virtual representation, corresponding to the localization of the device in the real environment, is obtained by correlating the portions of the captured image and portions of the virtual representation, The inertial unit determines the displacement of the device. The localization of the device in the virtual representation is modified as a function of the displacement so that the real position of the device corresponds, during the displacement, to the localization of the device in the virtual representation.
US09940715B2 Diagnosis support apparatus, method for the same, and non-transitory computer-readable storage medium
A diagnosis support apparatus obtains a plurality of images as interpretation targets, selects one item of a plurality of image finding items, sequentially assigns evaluations for the selected image finding item to the plurality of images in accordance with an operation input by a user, and displays an image for which an evaluation is assigned, in accordance with the operation input, in a display area, of a plurality of display areas corresponding to evaluations configured to be assigned for the selected image finding item, which corresponds to the evaluation assigned for the image.
US09940714B2 Image analyzing device, image analyzing method, and computer program product
According to an embodiment, an image analyzing device includes a first acquirer, a constructor, a first calculator, a second calculator, and a third calculator. The first acquirer is configured to acquire image information on a joint of a subject and bones connected to the joint. The constructor is configured to construct a three-dimensional shape of the bones and the joint, and relation characteristics between a load and deformation in the bones and the joint from the image information. The first calculator is configured to calculate a positional relation between the bones connected to the joint. The second calculator is configured to calculate acting force of a muscle acting on the bones connected to the joint based on the positional relation. The third calculator is configured to calculate first stress acting on the joint based on the three-dimensional shape, the relation characteristics, and the acting force.
US09940711B2 Systems and methods for detecting a fatty liver from a computed tomography (CT) scan
There is provided a computer-implemented method for detecting a fatty liver, comprising: receiving imaging data of a computed tomography (CT) scan performed using a single source CT Scanner with settings selected for imaging of non-fatty-liver pathology, segmenting a region of the liver by creating a binary image by applying binary segmentation to a sub-set of pixels of the imaging data according to a first set-of-rules, and mapping the region of liver of the binary image to the segmented region of the portion of the liver of the imaging data, calculating liver parameter(s) for the segmented region of the liver from Hounsfield unit (HU) value(s), and detecting the presence of a fatty liver by analyzing the calculated liver parameter(s) according to a second set-of-rules.
US09940705B2 System, method and computer program product for detecting defects in a fabricated target component using consistent modulation for the target and reference components
A fabricated device having consistent modulation between target and reference components is provided. The fabricated device includes a target component having a first modulation. The fabricated device further includes at least two reference components for the target component including a first reference component and a second reference component, where the first reference component and the second reference component each have the first modulation. Further, a system, method, and computer program product are provided for detecting defects in a fabricated target component using consistent modulation for the target and reference components.
US09940701B2 Device and method for depth image dequantization
A mechanism is described for facilitating depth image dequantization at computing devices according to one embodiment. A method of embodiments, as described herein, includes detecting a digital image of an object, the digital image including pixels having associated pixel values contaminated by noise, and side information pertaining to confidence of a value acquired in each pixel. The method may further include measuring characteristics of noise in each pixel of the digital image, and a plurality of weights relating to one or more of the pixel values, the side information, and the noise characteristics. The method may further include computing a smart filter based on a combination of the plurality of weights, applying the smart filter to filter the digital image by reducing the noise in the digital image, and outputting the filtered digital image.
US09940700B2 Information processing apparatus, information processing method, information processing system, and non-transitory computer readable medium
An information processing apparatus for producing combined image data includes an image data acquiring unit that acquires two image data items a difference obtaining unit that obtains a difference in brightness between the data items a difference area identifying unit that identifies a difference area a surrounding brightness difference obtaining unit that obtains a difference between a brightness of the difference area and a brightness of an area located around the difference area a correction target area information producing unit that produces correction target area information which indicates a correction target area, in which one of the data items, having a greater difference obtained by the surrounding brightness difference obtaining unit, is used as the correction target area and a combined image data producing unit that produces the combined image data, based on the data items and the correction target area information.
US09940697B2 Systems and methods for combined pipeline processing of panoramic images
Systems and methods for capturing and/or processing of panoramic imaging content using spatial redundancy-based mapping. Panoramic imaging content may be processed using a processing pipeline that may operate on a portion of the image. Images may be transformed prior to processing. Image transformation may introduce distortion and/or data redundancy. Image partitioning for the pipeline processing may be configured based on spatial redundancy associated with the transformation. Windowing operation may include partitioning an image using non-rectangular and/or non-equal windows.
US09940694B2 Resolution enhancement techniques based on holographic imaging technology
Systems and techniques for performing resolution enhancement on target patterns based on holographic imaging technique (HIT) are described. During operation, an electronic design automation (EDA) tool can compute an in-line hologram of the target patterns based on parameters associated with a photolithography process that is used in a semiconductor manufacturing process, wherein the semiconductor manufacturing process is to be used for printing the target patterns on a semiconductor wafer. Next, the EDA tool can determine the mask patterns based on the in-line hologram.
US09940685B2 Digital watermarking in data representing color channels
The present disclosure relates to digital watermarking. One claim recites a method to detect two or more different digital watermarks in media. The method includes: receiving captured imagery of the media, the captured imagery comprising a plurality of image frames; for a first image frame applying a first watermark detector to search for a first digital watermark hidden within the first image frame, in which an electronic processor is programmed as the first watermark detector; and for a second image frame applying a second, different watermark detector to search for a second, different watermark hidden within the second image frame, in which an electronic processor is programmed as the second watermark detector. Other claims and combinations are provided too.
US09940682B2 Athletic activity user experience and environment
User activity including both athletic activity (e.g., running, walking, etc.) and non-athletic activity (shopping, reading articles, etc.) may be monitored and tracked by an athletic monitoring and tracking device and service. The user activity may be used to award a user with an amount of virtual currency to encourage the user to continue various activities. In one example, users may use the virtual currency to purchase or otherwise acquire various products, services, discounts and the like. A user may track an amount currency earned and/or needed relative to an amount required to acquire a desired product or service. Additionally or alternatively, a visual appearance of a user device (e.g., a watch or athletic activity band) may change based on the user's activity level, an amount of virtual currency earned and the like.
US09940674B2 System and method for providing insurance coverage recommendations
A dynamic computer system assists users in selecting insurance coverage types and levels appropriate for their present financial circumstances. The computer system includes a graphical user interface (GUI) representative of a user's financial data and coverage recommendations. The system may further access third party data to validate and enrich coverage determinations.
US09940673B2 Systems and methods for measuring relationships between investments and other variables
The systems and methods described herein can identify meaningful relationships between variables, such as particular investments or general asset classes. Unlike conventional correlation analysis, these systems and methods provide an improved technique of comovement analysis that implements a threshold to eliminate data “noise” and then discretizes the remaining observations to normalize any outliers. Such comovement analysis has numerous advantages over known techniques for characterizing relationships between variables. In some embodiments, this improved comovement analysis can be used to calculate a covariance matrix for purposes of mean-variance optimized portfolio construction.
US09940671B2 Dataset intersection determination
An item is determined to exist in a dataset by arranging the dataset into a plurality of subsets, each bounded by the minimum amount of memory that may be transferred between levels of memory in a memory configuration. The item and the subsets have attributes that allow for a determination of which subset the item would exist in if the item were in the dataset. A singular subset is transferred between levels of memory to determine whether the item exists in the transferred subset. If the item does not exist in the transferred subset, it is determined that the item does not exist in the dataset.
US09940670B2 Synchronized processing of data by networked computing resources
Systems 100, 1000, methods, and machine-interpretable programming or other instruction products for the management of data transmission by multiple networked computing resources 106, 1106. In particular, the disclosure relates to the synchronization of related requests for transmitting data using distributed network resources.
US09940669B2 Flexible open origination
The disclosure extends to computer-implemented personal financial management tools, methods and systems for providing financial transaction data to users and attracting origination customers to a financial institution within a financial business computing environment. The disclosure also extends to a flexible Open Origination that allows any type of mobile, internet, online, personal financial management software, finance tool, or other useful function, device or software, that a bank or financial institution provides to account holders, and offers that same functionality to all users, regardless of their account status. Non-account holders can download and utilize the Banking Software in question in order to enjoy its features, and to become familiar with the experience of doing business with the bank or financial institution that provides the software. This method, system and software allows any user, regardless of where his/her accounts are located, to use the financial software and benefit from its functionality.
US09940666B1 Electronic withdrawal and/or exit price requests for computer-based auctioning of basic generation services
A system and method of conducting a computer-based, simultaneous, multiple round, descending clock auction for basic generation services (BGS) includes receiving bids by an application server host application for processing bids according to auction rules, for tranche units of BGS products, calculating next round prices, and sending round results to bidders, the subsequent round prices and a notice of the number of tranches bid during the previous round and/or the amount of excess supply offered. Subsequently, an electronic withdrawal request to remove tranches from a product and reduce a maximum number bids the bidder can make in future rounds, and/or bidder exit price, is received, but may be partially or fully refused. When the number of tranches bid are equal to or less than a certain threshold for each of the products, the auction may end and bidders are awarded an ending price for each of the products won.
US09940661B2 Method and apparatus for recommending a food item
A method, non-transitory computer readable medium, and apparatus for recommending a food item are disclosed. For example, the method receives one or more food item data communications over a short range communications protocol that are pushed to a mobile endpoint device, filters the one or more food item data communications in accordance with a food item filter pre-defined by a user to identify an acceptable food item to recommend to the user and recommends the acceptable food item to the user.
US09940658B2 Cross border transaction machine translation
A user query for items is received in a first language and translated from the first language to a second language. A result set in the second language that meets the query is obtained and is translated into the first language for presentation to the user. User feedback is used to build an ontology for optimizing the translation from the first language to the second language based on query context and the feedback. Query context may include information determined by learning semantic relationships between keywords in the query. Optimizing may include building an ontology used by a machine translator to translate key words from the first language to the second language. The number of items in the result set are measured or information is abstracted from the feedback and correlated to ontological information of the result set. The system adapts to changes in meanings in the first language over time.
US09940657B2 Dynamically created network sites
Disclosed are various embodiments for dynamically generating a network site for a topic. A set of search terms that are associated with one or more search engines are obtained. A respective set of items in an item catalog that are relevant for each of the search terms are identified. A respective network site is established for each of the search terms when the respective set of items includes at least a predefined number of items. The respective network site offers at least some of the respective items for sale.
US09940656B1 Smart demonstration device
A smart demonstration apparatus that enhances the experience of customers, merchants, and others with electronic devices is described herein. The smart demonstration apparatus may include components that assist merchants in demonstrating and selling electronic devices, assist customers in acquiring and using electronic devices and assist service providers in managing the demonstration, acquisition and use of electronic devices. The smart demonstration apparatus may also include other components that provide a variety of other functionality. The smart demonstration apparatus may be placed at a merchant's location where an electronic device is offered for acquisition or may be placed at other locations. A service provider may communicate with the smart demonstration apparatus to enhance the experience of customers, merchants, and others with electronic devices.
US09940650B2 Equipment unit, information processing system, information processing method, and program
An equipment unit is disclosed, including a first obtaining unit which obtains first identification information for a parameter set for calculating a use amount of the equipment unit; a comparison unit which compares the first identification information and second identification information for a parameter set for calculating a use amount of the equipment unit; a second obtaining unit which obtains information on a difference between the parameter set related to the first identification information and the parameter set stored in the equipment unit when the first identification information and the second identification information differ; and a control unit which calculates an amount of use of the equipment unit based on the parameter set stored in the equipment unit, and the information on the difference and controls the use of the equipment unit by the user.
US09940647B2 Qualified video delivery advertisement
A video server is configured to provide streaming video to players of computer games over a computing network. The video server can provided video of different games to different players simultaneously. This is accomplished by rendering several video streams in parallel using a single GPU. The output of the GPU is provided to graphics processing pipelines that are each associated with a specific client/player and are dynamically allocated as needed. A client qualifier may be used to assure that only clients capable of presenting the streaming video to a player at a minimum level of quality receive the video stream.
US09940643B2 Method and apparatus for advertising on a mobile gaming device
In various embodiments, promotions are featured on mobile gaming devices. Data based on which a first promotion associated with a first advertiser may be displayed on a mobile gaming device. The data may include a first set of criteria identifying when the first promotion should be displayed.
US09940641B2 System for serving data that matches content related to a search results page
A system is described for serving data matching content in a search engine marketing system. The system may include a processor, an interface and a memory. The memory may be operatively connected to the processor and may store a page, a content related to the page, a set of terms and a data. The interface may be operatively connected to the memory and the processor and may be used to communicate with a user. The processor may identify a page and a content, perform a semantic analysis on the content to generate a set of terms, match the set of terms to a data, add the data to the page, and the serve the page to a user via the interface.
US09940636B2 Reverse couponing
Embodiments of the invention are directed to systems, methods and computer program products for reverse couponing. An exemplary apparatus is configured to determine user information and account information associated with a user; adjust offer information associated with an offer based on the user information and the account information, wherein the offer enables the user to receive at least one of a discount or a rebate on a purchase from a merchant; and transmit the adjusted offer to the user.
US09940635B1 Method, apparatus, and computer program product for calculating a supply based on travel propensity
Provided herein are systems, methods and computer readable media for managing a sales pipeline, and in some embodiments, calculating supply based on travel propensity. An example method comprises identifying a total demand for a promotion tuple at a geographic location, determining, using a processor, a promotion area for the promotion tuple, the promotion tuple comprising at least a category, price information and a geographic area, identifying one or more promotions offered by a promotion and marketing service that comprise at least the category and the price information of the promotion tuple, determining whether the total demand for the promotion tuple at the geographic location is satisfied, wherein the total demand is satisfied in an instance in which the geographic location is within the promotion area for the one or more promotions, and identifying a demand gap in an instance in which the total demand for the promotion tuple at the geographic location is not satisfied.
US09940628B2 Systems and methods for determining ad impression utility
Various systems and methods for measuring ad impression effectiveness are provided. A method is provided comprising selecting, by an ad impression processor, a target consumer for an ad impression, delivering the ad impression to the target consumer, determining, by the processor, a behavior of the target consumer after a time period elapses, wherein the determining comprises analyzing internal data relating to the target consumer.
US09940627B2 Mobile coupon method and system
A system and a method for using a portable consumer device such as a mobile phone are disclosed. In one embodiment, a method according to the present invention comprises referencing data regarding an individual consumer stored as part of a payment processing network to generate an electronic coupon targeted to the individual consumer. The electronic coupon is transmitted to a mobile device of the individual consumer over a communications network, and purchase transaction utilizing the electronic coupon is processed over the payment processing network. In certain embodiments, the electronic coupon may be generated based upon temporal and/or geographic information of a prior purchase transaction conducted using the payment processing network.
US09940622B2 Method and system for facilitating online payments based on an established payment agreement
A method and system for facilitating online payments are disclosed. According to one aspect of the present invention, a payment agreement is established at a payment service provider that defines terms of a payment relationship between a merchant and a user. The establishing of the payment agreement includes linking the payment agreement with a payment account of the merchant or user stored at the payment service provider. After establishing the payment agreement, a payment request associated with a transaction is received, whereby the payment request includes a unique identifier to identify the payment agreement stored at the payment service provider. Based on a verification that the payment request complies with terms of the payment agreement, the payment request is processed.
US09940607B2 Method for recording electronic attendance
A system and method for recording electronic attendance, comprising the steps of: establishing, by a mobile device, a communication link between a server and the mobile device; activating, an application of the mobile device via an verification process; upon activation of the application, detecting and identifying, by the application, a checkpoint station carrying information relating to a checkpoint identifier; establishing, by the mobile device, a communication link between the checkpoint station and the mobile device for data transmission; reading, by the application, information relating to the checkpoint identifier from the checkpoint station; generating, by the application, an encrypted attendance record; transmitting, by the application, the encrypted attendance record to the server via the communication network; decrypting, by a decoder of the server, the encrypted attendance record; and updating, by the server, the record to an attendance report of an account.
US09940605B2 Inferring web preferences from mobile
In one embodiment, a server providing an on-line service identifies a change associated with a mobile computing device of a user of the on-line service, the on-line service being accessible to the user through a website hosted by the system; the server also in response to the change and without manual user input from the user, modifies aspects of web pages of the website that are associated with use of the on-line service by the user.
US09940601B2 Remote signing for a delivery from anywhere
A system may obtain courier location information associated with a package to be delivered, by a courier, to a delivery location associated with a customer. The courier location information may indicate that the customer is not available at the delivery location. The system may obtain delivery location information associated with the delivery location. The system may determine that the courier location information matches the delivery location information. The system may provide, to a customer device associated with the customer, a delivery notification based on determining that the courier location information matches the delivery location information. The system may receive a customer signature based on providing the delivery notification. The customer signature may be associated with the customer. The system may provide the customer signature. The customer signature being provided to inform the courier to deliver the package while the customer is not available at the delivery location.
US09940600B2 Data processing inside gaming device
A computer-implemented method is disclosed that includes capturing data about motion of a sports object caused by one or more athletes manipulating the sports object, transmitting the captured data out of the sports object wirelessly in real time while the one or more athletes are still manipulating the sports object, and presenting information that incorporates the captured data about motion of the sports objects with one or more wearable devices.
US09940596B1 Roadside assistance management
Methods, computer-readable media, software, and apparatuses provide a system for establishing base stations and allocating service vehicles to the base stations in order to provide roadside assistance. The system may include computing devices associated with customer vehicles and service vehicles as well as network computing devices. The system may receive a service request from a customer regarding a disabled vehicle. The system may then identify an appropriate service vehicle to assist the customer and assign the service request to the identified service vehicle. The system may select the appropriate service vehicle based on a location of the disabled vehicle. In an example, the system may choose a service vehicle from a base station closest to or within the shortest driving time to the disabled vehicle. By setting-up base stations in advance of service requests, service vehicles may reach disabled vehicles within a predetermined period of time.
US09940595B2 Policy-based scaling of computing resources in a networked computing environment
Embodiments of the present invention provide an approach for policy-driven (e.g., price-sensitive) scaling of computing resources in a networked computing environment (e.g., a cloud computing environment). In a typical embodiment, a workload request for a customer will be received and a set of computing resources available to process the workload request will be identified. It will then be determined whether the set of computing resources are sufficient to process the workload request. If the set of computing resources are under-allocated (or are over-allocated), a resource scaling policy may be accessed. The set of computing resources may then be scaled based on the resource scaling policy, so that the workload request can be efficiently processed while maintaining compliance with the resource scaling policy.
US09940592B2 Leads processing engine
The present invention is directed to a system and method for generating, processing and distributing leads, the system comprising a leads processing engine for receiving customer requests, creating leads based upon the customer requests, determining a best available agent or agents for each lead from a pool of available agents based upon one or more selected factors, and offering or sending each lead to the best available agent or agents.
US09940591B2 Customized-enterprise-software integration systems and methods
A third-party provider may integrate services with a customized enterprise-software tenancy via a tenant service context determined using an uncustomized data model and a tenant-customized data model from the enterprise-software provider. A difference map is generated for the tenant-customized data model with respect to the uncustomized data model, and is used to determine a mapped integrated-service data model, which facilitates integrating services with those of the enterprise-software provider. The mapped integrated-service data model is merged with the tenant-customized data model to obtain the tenant service context for the tenant. When a user provides an instruction to interact with the multi-tenant enterprise-software provider, the tenant service context is used to determine an action based on an interpretation of the instruction, and the enterprise-software provider is commanded to perform the action.
US09940590B2 System and method to generate a transaction count using filtering
The present disclosure relates to a system and method of generating a transaction count using filtering. Transaction data is collected for a set of transactions from an original data set. The collected transaction data is narrowed into a transaction data set by identifying a specific range of the data to be extracted. This transaction data set is filtered against one or more criteria. The transactions included in the transaction data set are then arranged into data packs in a format enabling efficient count generation. The count generation determines how many transactions meet the applied criteria. The data may then be efficiently stored in a database for later retrieval.
US09940584B2 Leveraging an external ontology for graph expansion in inference systems
A mechanism is provided in a data processing system for exploring knowledge. The mechanism receives a set of known facts. The mechanism traverses paths in an ontology for a domain of knowledge from known facts in the set of known facts to one or more hypotheses. The ontology includes a plurality of entity types and a plurality of relationships between the entity types. The mechanism presents one or more hypotheses to a user.
US09940583B1 Transmitting content to kiosk after determining future location of user
This disclosure is directed at least partly to a cloud prediction device that provides information to a kiosk. The cloud prediction device may receive information from a user device associated with a user, such as travel information, itineraries, calendar events, emails, etc, which may be used to determine the information. The information may also include user preferences, user recommendations, and/or historical data that may be used to determine content to be provided by the kiosk for the user and/or other users. The kiosk may provide innovative user interfaces to engage a user and provide high speed data transfer of content to a user device associated with the user. The kiosk may be located in frequently visited locations such as travel terminals or public spaces.
US09940581B2 Ontology-aided business rule extraction using machine learning
An approach for distinguishing a business rule from a non-business rule in a computer program is provided. A rule in the program is identified based on a conditional statement within the rule. Whether the rule performs underlying operation of the program independent of a business function of the program is determined. The rule and metadata of the rule are searched for a key word which indicates part of a business transaction. Whether a sequence of program steps in the rule matches a predetermined sequence of program steps indicative of a business rule or whether the sequence of program steps in the rule matches a predetermined sequence of program steps indicative of underlying operation of the program independent of the business function of the program is determined. If the rule is a business rule is determined based on both determining steps and both searching steps.
US09940579B2 Methods and systems for automated tagging based on software execution traces
Systems and methods for analysis of execution patterns for applications executing on remote devices. In some implementations of the system, a knowledge base stores successful traces from a plurality of instances of an application and one or more computing processors in the system receive, via a network interface, call-stack information from an instance of the application executing on a remote device, call-stack information including periodic captures of an execution status for the instance of the application, and determine whether there is a similarity between the call-stack information received from the instance of the application and the stored plurality of successful traces. Responsive to determining a similarity, the computing processors add the remote device to a population of devices likely to execute the object and facilitate further actions specific to the device population.
US09940571B1 Metal contactless transaction card
A transaction card for communicating data relating to a transaction may include a metal layer; a backing layer; and/or a radio frequency (RF) antenna layer positioned between the metal layer and the backing layer, where the RF antenna layer includes an RF antenna that may facilitate communicating the data relating to the transaction wirelessly via an RF signal, and the metal layer includes a plurality of holes to limit eddy currents in the metal layer to a threshold density, where the plurality of holes may extend from a top surface of the metal layer to a bottom surface of the metal layer, and the eddy currents may be caused by the RF signal.
US09940567B2 Process for the configuration of a smart card for a single selected application
A process is designed to configure a smart card (CP) comprising a microchip (PE) capable of participating in at least two applications, a magnetic stripe (PM) capable of storing information, action means (MA) capable of acting on the magnetic stripe (PM) to modify certain stored information, a control circuit (MC) capable of controlling the microchip (PE) and the action means (MA), and selection means (MS) capable of allowing the selection of an application. This process comprises a step wherein, if one of the applications is selected, a dedicated piece of information that is representative of that selected application is stored in a location accessible to the control circuit (MC), so that if the microchip (PE) is woken up, the microchip (PE) automatically retrieves the dedicated information in order to activate the selected application represented by it.
US09940566B2 Extracting information from surface coatings
A method and system for extracting information from a surface coated with a coating containing quantum dots are disclosed. In embodiments, the method comprises charging the quantum dots in the surface coating, scanning the surface to retrieve information from the quantum dots, and processing the retrieved information to identify data encoded in the quantum dots. In embodiments of the invention, the processing includes filtering the retrieved information to adjust the received information based on defined effects of the coating. In embodiments of the invention, the filtering includes filtering the retrieved information to account for chromatic deviation due to the color of the coated surface. In embodiments of the invention, the quantum dots include a plurality of different types of quantum dots, and the processing the retrieved information includes processing the retrieved information to distinguish between the information retrieved from the different types of quantum dots.
US09940564B2 Wireless IC device, clip-shaped RFID tag, and article having RFID tag
In a wireless IC device, a columnar body includes a metal body with an insulating film. A loop-shaped antenna conductor is provided on an upper surface of the columnar body via an insulating pedestal. The loop surface of the antenna conductor is parallel or substantially parallel to the upper surface of the columnar body. On the lower surface of a RFIC element, two terminal electrodes are provided. The RFIC element is mounted on the antenna conductor such that the two terminal electrodes are connected to both ends of the antenna conductor, respectively. One end of the connecting conductor is connected to the vicinity of one end of the antenna conductor, and the other end of the connecting conductor is connected to the upper surface of the columnar body.
US09940563B2 Systems and methods for preserving and managing document chain of custody
A computerized system for preserving and managing an audit trail associated with printing of a sensitive document, the system including: a printing device disposed on a local area network; a network-connected appliance disposed on the local area network and communicatively coupled to the printing device, the network-connected appliance configured to receive a request from a client system for printing of the sensitive document, to log information related to the received printing request and to release the sensitive document to the printing device for printing; and a server disposed outside of the local area network and configured to receive from the network-connected appliance the logged information related to the printing request and to aggregate and store the logged information on a storage device for subsequent search and retrieval. The computerized system additionally implements the enforcement side of improper document handling and enables identifications of the user(s) who mishandled the specific document(s).
US09940562B2 Control method of a printer, and printer
A printer control method prevents the user from repeatedly executing an error recovery operation when a cutter error occurs. The printer 2 has a cutter 22 that moves a movable knife 32 between a home position HP and cutting position CP and cuts recording paper 6 at the cutting position CP. When a cutter error in which the movable knife 32 does not return from the home position HP is detected (step ST5), the host device 3 reports a cutter error (step ST6). When the printer 2 executes a cutter error recovery operation (step ST9) and again detects a cutter error (step ST5), it detects a non-recoverable error as being unable to recover from the cutter error (step ST10), and reports the non-recoverable error (step ST11).
US09940561B2 Control method of an image forming apparatus that prevents paper type differences when resuming a print job on a second image forming apparatus
Providing is a control method of the image forming apparatus that can prevent, when interrupting a printing process and resuming a printing process by supplying a print sheet or switching to other apparatus, not intending to mix the paper having quality of paper is different in the bundle of the printed documents in advance. It is the control method of the image forming apparatus that interrupts a printing process for a first image forming apparatus and resumes a printing process with the second image forming apparatus. The interruption step of recording interruption information including the specification information of the print sheet at the time of a printing process being interrupted for a first image forming apparatus. It has the resumption step of resuming the printing process in the second image forming apparatus based on interruption information including the specification information of the print sheet.
US09940559B2 Label printing control device which includes a cut mark extraction section and an apex finding section, a non-transitory computer-readable storage medium storing a label printing control program, and a label printing control method
Provided are a label printing control device, a non-transitory computer-readable storage medium storing a label printing control program and a label printing control method. The label printing control device includes a cut mark extraction section that obtains print data including at least label images and corresponding cut marks and extracts the cut marks from the print data, and an end product image creation section that creates an end product image by removing the cut marks from the print data. The label printing control device further includes an apex finding section that finds apexes of the cut marks, an adjusting image creation section that creates an adjusting image including the cut marks with graduations added adjacent to each apex, and a print instruction section that instructs a label printing device to print the end product image and the adjusting image successively on pre-die-cut label material.
US09940556B2 Method of image processing that ensures effective resource data search
A method of image processing includes: reading a data file in a predetermined page description language including a search key; chaining a plurality of pieces of resource data in each of a plurality of resource dictionaries; loading the chained plurality of pieces of resource data in each of the plurality of resource dictionaries in a memory area including unique keys; searching the requested resource data from the chained pieces of resource data using the search key for matching the unique key of the requested resource data one by one along the chain in both direction from a starting piece of resource data; labeling each of the plurality of pieces of resource data based on a history of the matching. The searching includes determining the starting piece of resource data in the chained plurality of pieces of resource data based on the history.
US09940551B1 Image generation using neural networks
Methods, systems, and apparatus, including computer programs encoded on computer storage media, for image generation using neural networks. In one of the methods, an initial image is received. Data defining an objective function is received, and the objective function is dependent on processing of a neural network trained to identify features of an image. The initial image is modified to generate a modified image by iteratively performing the following: a current version of the initial image is processed using the neural network to generate a current objective score for the current version of the initial image using the objective function; and the current version of the initial image is modified to increase the current objective score by enhancing a feature detected by the processing.
US09940550B2 Model compression in binary coded image based object detection
Techniques related to object detection using binary coded images are discussed. Such techniques may include performing object detection based on multiple spatial correlation mappings between a generated binary coded image and a binary coded image based object detection model and nesting look up tables such that binary coded representations are grouped and such groups are associated with confidence values for performing object detection.
US09940548B2 Image recognition method for performing image recognition utilizing convolution filters
An image recognition method includes: receiving an image; acquiring processing result information including values of processing results of convolution processing at positions of a plurality of pixels that constitute the image by performing the convolution processing on the image by using different convolution filters; determining 1 feature for each of the positions of the plurality of pixels on the basis of the values of the processing results of the convolution processing at the positions of the plurality of pixels included in the processing result information and outputting the determined feature for each of the positions of the plurality of pixels; performing recognition processing on the basis of the determined feature for each of the positions of the plurality of pixels; and outputting recognition processing result information obtained by performing the recognition processing.
US09940543B2 Control of computer vision pre-processing based on image matching using structural similarity
A processor computes a measure of input image structural complexity of an input image, and searches a database of true positives to find one or more entries in the database that represent true positive images that are structurally similar to the input image. The processor compares a measure of signal quality of the input image and a measure of signal quality of one of the true positive images, as retrieved from the database, and based on the comparison updates a control variable that configures a signal quality conditioning process that is to be performed on the input image prior to processing of the input image by a computer vision processor thus improving performance of the computer vision task. Other embodiments are also described and claimed.
US09940536B2 Electronic apparatus and method
According to one embodiment, an electronic apparatus includes a processor and a display controller. The processor inputs handwritten strokes. The display controller displays a first and second character in a font size, the first character corresponding to a first handwritten character detected from the strokes, the second character corresponding to a second handwritten character detected from the strokes, the font size determined based on a combination of an attribute of the first character and a size of at least one stroke of the first handwritten character or a combination of an attribute of the second character and a size of at least one stroke of the second handwritten character.
US09940533B2 Scanning window for isolating pixel values in hardware for computer vision operations
An apparatus includes a hardware sensor array including a plurality of pixels arranged along at least a first dimension and a second dimension of the array, each of the pixels capable of generating a sensor reading. A hardware scanning window array includes a plurality of storage elements arranged along at least a first dimension and a second dimension of the hardware scanning window array, each of the storage elements capable of storing a pixel value based on one or more sensor readings. Peripheral circuitry for systematically transfers pixel values, based on sensor readings, into the hardware scanning window array, to cause different windows of pixel values to be stored in the hardware scanning window array at different times. Control logic coupled to the hardware sensor array, the hardware scanning window array, and the peripheral circuitry, provides control signals to the peripheral circuitry to control the transfer of pixel values.
US09940532B2 Liveness detection apparatus and liveness detection method
A liveness detection apparatus and a liveness detection method are provided. The liveness detection apparatus may comprise: a specific exhibiting device, for exhibiting a specific identification content; an image acquiring device, for acquiring image data of a target object to be recognized during the exhibition of the identification content; a processor, for determining whether there is a reflective region corresponding to the identification content in the acquired image data, determining a regional feature of the reflective region when there is the reflective region, to obtain a determination result, and recognizing whether the target object is a living body based on the determination result.
US09940531B2 Apparatus and method for setting region of interest
An apparatus and method for setting a region of interest of a vehicle that is being driven is provided. The apparatus includes an image capturing unit configured to capture a front image of the vehicle that is being driven, a memory configured to store a program for setting the region of interest of the vehicle that is being driven, and a processor. The processor obtains a current position of the vehicle and lane information corresponding to the current position based on the front image captured by the image capturing unit by executing the program, and sets the region of interest needed for recognition of a signal light based on the obtained lane information, and the processor sets a region including a lane corresponding to another vehicle driving in the same direction as the vehicle that is being driven in the front image as the region of interest.
US09940528B2 Driver assistance system for vehicle
A driver assistance system for a vehicle includes first and second cameras and a rear backup camera. A control processes image data captured by the first camera and determines that the first camera is misaligned when the first camera is disposed at the left side of the vehicle. The control, responsive to a determination of misalignment of the first camera, is operable to algorithmically at least partially compensate for misalignment of the first camera. At least in part responsive to processing of captured image data, a composite image is displayed that provides a view that approximates a view from a single virtual camera. Image data captured at least by the first camera is processed using an edge detection algorithm to detect edges of objects exterior of the vehicle. Responsive at least in part to processing of captured image data, an object of interest exterior of the vehicle is determined.
US09940527B2 Driving assist system for vehicle and method thereof
A driving assist system for a vehicle and a method thereof includes a broadband camera which photographs the surrounding area of the vehicle to create an image including four channels of light information having different wavelengths. The broadband image data and the position of the vehicle are matched so that a road and an obstacle are easily recognized using a minimal number of cameras while driving the vehicle. Recognition performance of a drivable area is significantly improved, navigation for the vehicle is easily measured, and the biometric recognizing abilities of a driver monitoring camera is improved, thereby improving the convenience of a driver by the improvement of a the performance of a driving assist device.
US09940525B2 Image capture with privacy protection
A method of providing obscurant data includes receiving image data including an image of a target and receiving a preference setting corresponding to the target. Obscurant data of at least a portion of the image data corresponding to the target are determined using the received preference setting. A method of providing surveillance image data includes capturing image data including an image of a target, querying a database to receive a preference setting corresponding to the target, determining the obscurant data of the portion of the image data, and selectively modifying the received image data according to the determined obscurant data to provide the surveillance image data.
US09940523B2 Video monitoring user interface for displaying motion events feed
A computing device with processor(s) and memory has a video monitoring user interface for displaying a video feed on a display of a client system. When events are detected in the video feed, an events feed is displayed in the video monitoring user interface to present the detected events. For each detected event, the events feed includes a visual representation of the video feed that was recorded at the time of the respective event, an event characteristic indicator indicating a characteristic of the respective event, and a time indicator indicating the time at which the event occurred. Then, in response to detecting the user selection of one of the events included in the events feed, the computing device records the recorded video feed that was recorded during the selected event is recorded, and displays the requested recorded video feed on the video monitoring user interface.
US09940521B2 Visibility enhancement devices, systems, and methods
Embodiments include systems of and methods for an electronic device having a camera configured to capture image data, a display configured to display the captured image data and content corresponding to an application of the electronic device, and a motion sensor configured to detect motion of the electronic device. The electronic device also includes circuitry configured to activate the camera when motion is detected by the motion sensor, and control the display to display at least a portion of the captured image data at a size proportional to an amount of motion as detected by an output of the motion sensor.
US09940520B2 Automatic target recognition system with online machine learning capability
A method and apparatus for real-time target recognition within a multispectral image includes generating radiance signatures from reflectance signatures, sensor information and environment information and detecting targets in the multispectral image with a sparsity-driven target recognition algorithm utilizing set of parameters tuned with a deep neural network.
US09940518B1 Reliability of gaze tracking data for left and right eye
Circuitry of a gaze/eye tracking system obtains one or more images of a left eye and one or more images a right eye, determines a gaze direction of the left eye based on at least one obtained image of the left eye, determines a gaze direction of the right eye based on at least one obtained image of the right eye, determines a first confidence value based on the one or more obtained images of the left eye, determines a second confidence value based on the one or more obtained images of the right eye, and determines a final gaze direction based at least in part on the first confidence value and the second confidence value. The first and second confidence values represent indications of the reliability of the determined gaze directions of the left eye and the right eye, respectively. Corresponding methods and computer-readable media are also provided.
US09940516B2 Mobile identity platform
The present disclosure is directed towards a compact, mobile apparatus for iris image acquisition, adapted to address effects of ocular dominance in the subject and to guide positioning of the subject's iris for the image acquisition. The apparatus may include a sensor for acquiring an iris image from a subject. A compact mirror may be oriented relative to a dominant eye of the subject, and sized to present an image of a single iris to the subject when the apparatus is positioned at a suitable distance for image acquisition. The mirror may assist the subject in positioning the iris for iris image acquisition. The mirror may be positioned between the sensor and the iris during iris image acquisition, and transmit a portion of light reflected off the iris to the sensor.
US09940513B2 Intuitive selection of a digital stroke grouping
Improved accuracy and user interaction efficiency for selecting a grouping of digital strokes is provided. In response to receiving an indication of a selection input on or in proximity to a digital stroke, a determination is made as to whether the digital stroke is part of an existing group of digital strokes. When the digital stroke is not part of an existing group, an analysis of the digital stroke and other digital strokes within a calculated boundary is performed for determining which strokes should be included in a stroke grouping. A stroke grouping is generated based on the determination. Accordingly, in response to the selection input on or in proximity to the digital stroke, the selection is expanded to the stroke grouping, thus improving the accuracy of the selection gesture and improving computer efficiency.
US09940510B2 Device for identifying digital content
Examples disclosed herein provide for the sharing of digital content stored on a device via an image that is representative of the digital content. The device, in response to selection of digital content stored on the device, extracts frames from the digital content that are representative of the digital content. In response to selection of one of the frames, the device captures digitally handwritten customizations made to the selected frame to create a customized image. The device extracts features at least from the handwritten customizations made to the selected frame to identify the customized image. The device uploads the digital content, the customized image, and the extracted features to a remote database.
US09940505B2 Method for driver face detection in videos
A method for use with a stream of images defining a video. The method includes the steps of periodically conducting a face finding operation on an image in the stream. In respect to the last image in the stream preceding the image in which one or more faces was found, a tracker based upon wavelet decomposition is used to find a face for each face found in the last image for which no counterpart was found in the image.
US09940501B2 Method and system for processing fingerprint sensing signals and fingerprint identification terminal
The present invention relates to the field of fingerprint identification technologies, and provides a method and a system for processing fingerprint sensing signals, and a fingerprint identification terminal. The method includes a frequency mixing step by mixing a collected high frequency fingerprint sensing signal with a first high frequency signal to obtain a low frequency signal; and an amplification step by amplifying the low frequency signal. By using the character that capacitance impedance is inversely proportional to signal frequency, the present invention shifts a fingerprint sensing signal with a high frequency into a signal with a low frequency through frequency spectrum shifting and performs signal amplification on the signal with a low frequency, which can overcome the difficulty in amplifying the high frequency fingerprint sensing signal and thus improves the signal-to-noise ratio SNR.
US09940498B2 Low power application access using fingerprint sensor authentication
A method includes detecting an interaction event on a display of a device in a locked mode. The interaction event originates at one of a fingerprint sensor of the device or an application icon and terminates at the other of the fingerprint sensor or the application icon. The interaction event is authenticated using the fingerprint sensor. A function associated with the application icon is activated responsive to authenticating the interaction event without unlocking the device.
US09940495B2 Optical reader device, tag for use on a disposable or replaceable component, optical data validation system and method for optical data validation
The presented principles relate to an optical reader device, to a tag for use on a disposable or replaceable component, to an optical data validation system and to a method for optical data validation. The optical reader device comprises a sensor unit and a signal processing unit. In particular, the sensor unit comprises a light source and an optical sensor arrangement. The light source comprises at least one light emitting component and is arranged for emitting light. The optical sensor arrangement is arranged for generating a first sensor signal indicative of light emitted from the light source and reflected back from a code marking of a tag to be placed in front of the light source in a determined distance. The optical sensor is further arranged for generating a second sensor signal indicative of light emitted by a photo-responsive taggant of the tag after being excited by the light emitted from the light source. The signal processing unit comprises a signal processing unit being arranged to process the first sensor signal and the second sensor signal.
US09940492B2 Band with RFID chip holder and identifying component
An apparatus is adapted to be coupled to a component of a system associated with a wellhead. The apparatus includes a band adapted to be coupled to the component; a buckle coupled to the band and located proximate to a first end of the band; a holder coupled to the band, wherein the holder is positioned, or is adapted to be positioned, proximate to the first end; an electronic identifying device attached to the holder and adapted to identify the component; and an identifying component coupled to the band. The identifying component visually conveys information about at least one of: the electronic identifying device, and the component to which the band is adapted to be coupled. In one embodiment, the system associated with the wellhead is a system for pumping fluid to the wellhead. The electronic identifying device is, or includes, an RFID chip.
US09940489B2 Radiofrequency transponder circuit
The invention relates to radiofrequency transponder circuits, and in particular to such transponder circuits having a unique identifier. Embodiments disclosed include a radiofrequency transponder circuit (100) comprising an antenna module (101), a control circuit (103) and a memory (104), the transponder circuit (100) being configured to respond to a read command received via the antenna module (101) by the control circuit (103) reading and transmitting an identifier stored in the memory (104) via the antenna module (101), wherein the control circuit (103) is configured to perform an integrity check on data stored in the memory (104) upon being powered up by a reader field a first time via the antenna module (101) and to not perform the integrity check for a predetermined time period upon being powered up by a reader field subsequent times via the antenna module (101).
US09940482B1 Electronic alerts for confidential content disclosures
A method may include receiving content included in a social media post of a user; analyzing the content included in the social media post to determine a likelihood that the social media post contains security information associated with the user; transmitting an alert to a computing device of the user, based on the analyzing, that the content includes the security information associated with the user; and presenting an option to change the security information.
US09940472B2 Edge access control in querying facts stored in graph databases
Methods and arrangements for managing user access to a graph database. Nodes are represented in a graph, along with edges which interconnect the nodes. One or more facts are associated with each of the edges, and an access control list is provided with respect to one or more facts associated with one or more of the edges. There is restricted user access to one or more facts associated with the one or more of the edges, based on the access control list. Other variants and embodiments are broadly contemplated herein.
US09940471B2 Virtual output queue authorization management method and device, and computer storage medium
The embodiments of the present disclosure disclose a VOQ authorization management method and device and a computer storage medium. The method includes that: an index of a scheduling unit at next scheduling level is determined according to a scheduling algorithm of a scheduler of a scheduling unit directly connected with a physical port and a weight and priority of the scheduling unit at the next scheduling level of the scheduling unit, scheduling linked list information of each scheduler of the scheduling unit at the next scheduling level is acquired, and an index of a scheduler to be authorized corresponding to the same service grade with a current authorization in the scheduling unit at the next scheduling level is determined according to the scheduling linked list information until an index of a VOQ to be authorized corresponding to the same service grade with the current authorization is determined.
US09940470B2 Techniques for generating a virtual private container
Techniques for generating a virtual private container (VPC) are disclosed. In one embodiment, the techniques may be realized as a virtual container defining a self-contained software environment, comprising one or more analytic components configured to carry out specified analytic functions on data within the container, wherein the one or more analytic components are isolated to run within the self-contained software environment of the container; an interface configured to identify and authenticate a particular user and provide analysis results generated by the one or more analytic components; and a gateway configured to receive data from one or more secure data sources external to the virtual container and associated with the particular user for use by the one or more analytic components.
US09940469B2 Encrypted data store for records
A method performed by a processing system includes determining a location in a metadata tree of a patient for an electronic health record, generating a record key for the electronic health record based on the location and a provider key corresponding to a provider, the provider key generated from a patient key corresponding to the patient, encrypting the electronic health record using the record key to generate a encrypted record, and providing the encrypted record to an encrypted data store.
US09940468B2 Preserving user privacy
Some embodiments of the invention provide a server apparatus, comprising: a control block comprising at least one processor; at least one data reception unit operable to receive a request to share a picture; at least one storage facility, storing programmed instructions for execution by the control block, the programmed instructions defining an image analysis engine operable to determine that the picture comprises an image of a person; and at least one data transmission unit operable to issue a request to the person, or someone associated with the person, to consent to sharing the image. Other embodiments provide a method, performed by at least one computer. The method comprises: (A) receiving a request to share a picture; (B) determining that the picture comprises an image of a person; and (C) requesting that the person, or someone associated with the person, consent to sharing the image.
US09940467B2 Systems and apparatuses for architecture assessment and policy enforcement
Example embodiments are disclosed herein for asset architecture evaluation and security enforcement within an enterprise computing platform. One example method includes receiving a proposed architecture for evaluation, wherein the proposed architecture for evaluation relates to integration of an asset into the enterprise computing platform. This example method further includes dynamically evaluating, by risk evaluation circuitry, the proposed architecture against embedded security policies, standards, baselines, or patterns established for the enterprise computing platform. In addition, the example method includes, in an instance in which dynamic evaluation of the proposed architecture identifies security gaps, determining, by the risk evaluation circuitry, changes to the proposed architecture that would remediate the identified security gaps. The example method further includes generating a report regarding the proposed architecture, wherein the report identifies any changes to the proposed architecture that would remediate the identified security gaps. Corresponding apparatuses and computer program products are also provided.
US09940466B2 Computer-implemented command control in information technology service environment
A computer-implemented agent process running on a first computer automatically intercepts a command issued from the first computer to execute on a target computer prior to invocation of the command on the target computer. A server profile built for an application running on the target computer that supports the command may be retrieved. At least based on the server profile a risk enforcement policy is dynamically constructed. Based on the risk enforcement policy, one or more computer-executable enforcement actions to perform prior to sending the command to the target computer for execution is determined. Based on executing of one or more of the computer-executable enforcement actions, the command may be transmitted to execute on the target computer or prevented from executing on the target computer.
US09940465B2 Static security analysis using a hybrid representation of string values
A hybrid string constructor includes a database configured to store a set of known concretizations. A processor is configured to compare the one or more string components to the set of known concretizations to determine string components from input string information that may be represented concretely, to abstract all string components that could not be represented concretely, and to create a hybrid string representation that includes at least one concrete string component and at least one abstracted string component. The set of known concretizations includes string configurations that cannot be interfered with by an attacker.
US09940461B2 Enabling an external operating system to access encrypted data units of a data storage system
A method for allowing an operating system (OS), to access an encrypted data storage system of a computer, wherein: the data storage system comprises: a partition; and first encrypted data units that comprise partition table data of said data storage system; and said computer is connectable to an external device comprising: a boot loader for an external OS that is not installed on the computer; and partitioning information capturing an expected location of said partition in the data storage system; and wherein second encrypted data units that comprise reference partition table data for said data storage system are available from said computer or said external device, the method comprising: upon connection of said external device to the computer, instructing to boot the computer from said boot loader; and during or after booting of the computer: comparing the first and second encrypted data units; and if the first and second encrypted data units match, allow the external OS to access, based on the partitioning information stored on the external device, one or more data units of said partition on the data storage system.
US09940460B1 Cleaning malware from backup data
Embodiments described herein perform cleanup of backup images of a storage system by applying a record of I/O operations recorded while performing anti-malware operations on the storage system. The recording of the I/O operations can be replayed to resolve malware infections in the backup images, snapshots, or replicas of the storage system without requiring a restore-cleanup cycle for each backup image.
US09940459B1 Methods and devices for detection of malware
An apparatus includes a database configured to store a collection of files. The apparatus also includes a counter module configured to calculate a frequency of a data feature in the collection of files. The apparatus also includes a signature generation module operatively coupled to the counter module. The signature generation module is configured to generate a malware signature based on the frequency of the data feature in the collection of files. The malware signature includes an indication of one or more criterion for the data feature, and the malware signature is associated with a malware. The apparatus also includes a communication module configured to receive a target file, and a detection module operatively coupled to the communication module. The detection module is configured to classify the target file as the malware when the target file meets the one or more criterion of the malware signature.
US09940455B2 Programming code execution management
In one aspect of the present description, operations are described for detecting whether programming code of a first computer program has been modified by a second computer program. In one embodiment, the modification detecting includes registering a first section of programming code of the first computer program in a first registry data structure. To detect a modification, the registered first section of programming code may be validated. In one embodiment, the validating includes comparing the section of programming code actually located at the first memory address to the registered first section of programming code. In another aspect, various selectable remedial actions may be taken upon detecting modification of programming code of the first computer program. Other features and aspects may be realized, depending upon the particular application.
US09940453B2 Method and system for securing user access, data at rest and sensitive transactions using biometrics for mobile devices with protected, local templates
Biometric data are obtained from biometric sensors on a stand-alone computing device, which may contain an ASIC, connected to or incorporated within it. The computing device and ASIC, in combination or individually, capture biometric samples, extract biometric features and match them to one or more locally stored, encrypted templates. The biometric matching may be enhanced by the use of an entered PIN. The biometric templates and other sensitive data at rest are encrypted using hardware elements of the computing device and ASIC, and/or a PIN hash. A stored obfuscated PassWord is de-obfuscated and may be released to the authentication mechanism in response to successfully decrypted templates and matching biometric samples. A different de-obfuscated password may be released to authenticate the user to a remote or local computer and to encrypt data in transit. This eliminates the need for the user to remember and enter complex passwords on the device.
US09940436B2 Method and system for updating a medical device
The present disclosure includes methods, devices and systems for determining the availability of an upgraded version of executable code for a medical device and installing the executable code on the medical device. In some embodiments, methods, devices and systems are also provided for detecting a failure of a critical component of the executable code and disabling a functionality of the medical device relating thereto.
US09940434B2 System for genome analysis and genetic disease diagnosis
The method for genome analysis translates the clinical findings in the patient into a comprehensive test order for genes that can be causative of the patient's illness, delimits analysis of variants identified in the patient's genome to those that are “on target” for the patient's illness, and provides clinical annotation of the likely causative variants for inclusion in a variant warehouse that is updated as a result of each sample that is analyzed and that, in turn, provides a source of additional annotation for variants. The method uses a genome sequence having the steps of entering at least one clinical feature of a patient by an end-user, assigning a weighted value to the term based on the probability of the presence of the term, mapping the term to at least one disease by accessing a knowledge base containing a plurality of data sets, wherein the data sets are made up of associations between (i) clinical features and diseases, (ii) diseases and genes, (iii) genes and genetic variants, and (iv) diseases and gene variants, assigning a truth value to each of the mapped terms based on the associated data sets and the weighted value, to provide a list of results of possible diagnoses prioritized based on the truth values, with continuous adjustment of the weightings of associations in the knowledge base based on updating of each discovered diagnosis and attendant clinical features, genes and gene variants. This method can be performed in fifty hours or twenty-four hours or less.
US09940431B2 Accurate statistical timing for boundary gates of hierarchical timing models
A system to improve performance of a semiconductor chip design includes a hierarchical analysis module that determines a hierarchical arrangement of the semiconductor chip design. The hierarchical arrangement includes a plurality of arcs located at different levels internal to the semiconductor chip design. The different levels include a macro level, a unit level and a core level. The system further includes a timing/load analysis module that determines first timing characteristics of at least one first arc in the macro level based on a first load applied to the at least one first arc. The system further determines second timing characteristics of at least one second arc in at least one of the unit level and the core level based on the first timing characteristics, with a portion of the second timing characteristics determined irrespective of the first load.
US09940429B2 Early overlay prediction and overlay-aware mask design
Various embodiments include computer-implemented methods, computer program products and systems for analyzing at least one feature in a layout representing an integrated circuit (IC) for an overlay effect. In some cases, approaches include a computer-implemented method including: modeling a topography of the IC by running at least one of a chemical mechanical polishing (CMP) model, a deposition model or an etch model on a data file representing the IC after formation of an uppermost layer; modeling the at least one feature in the IC for an overlay effect using the topography model of the IC; and modifying the data file representing the IC after formation of the uppermost layer in response to detecting the overlay effect in the at least one feature, the overlay effect occurring in a layer underlying the uppermost layer.
US09940428B2 Hierarchical fill in a design layout
This application discloses a computing system implementing one or more tools or mechanism configured to capture a hierarchy of a circuit design layout generated by a downstream tool. The hierarchy can include multiple cells that identify corresponding portions of the circuit design layout. The tools or mechanism can be further configured to modify the circuit design layout based, at least in part, on the captured hierarchy, which alters the portions of the circuit design layout identified by the cells separately from other portions of the circuit design layout.
US09940427B2 Lens heating aware source mask optimization for advanced lithography
A computer-implemented method for improving a lithographic process for imaging a portion of a design layout onto a substrate using a lithographic projection apparatus comprising an illumination source and projection optics, the method including computing a multi-variable cost function of a plurality of design variables that are characteristics of the lithographic process, at least some of the design variables being characteristics of the illumination source and the design layout, the computing of the multi-variable cost function accounting for lens heating effects; and reconfiguring the characteristics of the lithographic process by adjusting the design variables until a predefined termination condition is satisfied.
US09940426B2 Signal via positioning in a multi-layer circuit board
One aspect is a method that includes identifying a substantially uniform distribution of signal vias for a multi-layer circuit board based on a design file defining a layout that includes via groups in a two-to-one signal-to-ground via ratio configuration. A signal via pitch is determined as a center-to-center distance between a neighboring pair of signal vias. The signal via pitch is compared to a target minimum drilling distance. A ground via is identified proximate the neighboring pair of the signal vias. Based determining that the signal via pitch of the neighboring pair is less than the target minimum drilling distance, at least one of the signal vias is positioned closer to the ground via such that after the positioning, the signal via pitch of the neighboring pair meets or exceeds the target minimum drilling distance. The design file is modified to include the positioning of the signal vias.
US09940423B2 Editing a NoC topology on top of a floorplan
A NoC topology is represented on top of a physical view of a chip's floorplan. The NoC topology is edited, such as by adding switches, removing switches, and adding and removing switches on routes. An initial location of switches within the floorplan is automatically computed. Locations can also be edited by a user. Statistical metrics are calculated, including wire length, switch area, NoC area, and maximum signal propagation delay for logic in each of multiple clock domains. Wire density can also be overlaid on chip's floorplan on the display. The NoC topology is represented by a data structure indicating connections between initiator and target endpoints with ordered lists of switches in between. The data structures are written and read from memory or a non-transient computer readable medium. The locations of endpoint and switches are also written out, as scripts for place & route tools.
US09940418B2 Simulation of hierarchical circuit element arrays
This disclosure describes a design tool that iteratively performs simulation sets on an integrated circuit design, each corresponding to a different hierarchical level with each of the simulation sets producing a different set of simulation results. Each of the simulation sets utilizes a different set of local parameter values that include extreme instance local parameter values based on the set of simulation results of a preceding simulation set. The design tool generates a set of hierarchically aggregated simulation results based upon the last set of simulation results and global parameters, and modifies the integrated circuit design based upon a yield estimation that is determined from comparing the set of hierarchically aggregated simulation results to specification requirements that correspond to the integrated circuit design.
US09940417B2 Simulating reference voltage response in digital simulation environments
Embodiments herein describe a digital simulation environment that changes the delay of a digital signal to represent different analog reference voltages. For example, changing the length of time the digital signal is at the logical one state versus the time the digital signal is at the logical zero state may represent an analog reference voltage that is below or above an optimal value. Put differently, the digital simulation environment can insert unequal delay shifts relative to the logical one and zero states of the digital signal to represent different analog voltages. Using these unequal delay shifts, a digital simulation system can test the simulated operation of logic representing a physical system that uses an analog reference voltage as an input to determine if the logic behaves as expected.
US09940406B2 Managing database
The present invention discloses a method and system for managing a database. According to embodiments of the present invention, there is provided a method for managing a database, each item of data in the database being associated with a timestamp and a data point, the timestamps being used as row keys for rows of a table in the database, the method comprising: obtaining a behavior characteristic of a user based on a previous data access to the database by the user; partitioning columns in the table into column families based on the obtained behavior characteristic and system configuration of the database; and causing data in the database to be stored in respective column families at least in part based on the associated data point. There is further disclosed a corresponding system.
US09940397B2 Search method, apparatus, and electronic device
A method of searching content is provided. The method includes receiving, in a social media messaging program, a search request including one or more search terms from a user of a client device. The method further includes searching, among the user's contacts locally stored on the client device, for contacts matching with the one or more search terms to produce first search results displaying a least a subset of the first search results and one or more search navigation affordances. At least one of the search navigation affordances corresponds to second search results of a first content type that are shared by the user and other users and at least one of the search navigation affordances corresponds to third search results of a second content type different from the first content type that are associated with the user.
US09940396B1 Mining potential user actions from a web page
Techniques and solutions are described for detecting potential user actions from a web page. Web page resources may be received for a requested web page, and a document object model (DOM) may be maintained using from the resources. One or more interactive DOM elements may be identified using the created DOM, and the interactive DOM elements may be ranked in an order according to one or more heuristics. In response to receiving a voice command from a user of a client computing device in connection with the web page, a text string may be generated using voice-to-text recognition. The text string may be representative of the received voice command. A list of potential user actions that match the text string may be generated. The matching may be based on a comparison of the text string with at least another text string associated with the ranked interactive DOM elements.
US09940393B2 Electronic personal assistant privacy
A method comprises receiving a first user communication, accessing a directory entry associated with the user, accessing, by a processor, a database stored in a memory that includes content designated as private that is associated with the user in the directory, determining with the processor whether the first user communication includes content designated as private that is associated with the user, generating a second user communication by removing the content designated as private that is associated with the user from the first user communication, and sending the second user communication to an electronic personal assistant.
US09940391B2 System, method and computer readable medium for web crawling
In a web crawler, a URL selection module selects URLs for pages to be downloaded. The URL selection module accesses an interaction data store that stores interaction data for web pages, including interaction data that indicates human interactions with the pages. To reduce the effects of link farms, the URL selection module filters the URLs to select only those URLs that have human interaction histories and provides the selected URLs to a download module for web page downloading.
US09940386B2 Distributed model-building
In some implementations, a computer-implemented method for generating computer-readable data models includes receiving time series data; applying a plurality of variable transformations to the time series data to generate a variable matrix with first and second dimensions; partitioning the variable matrix along a first one of the first and second dimensions to generate a plurality of data sets; partitioning the plurality of data sets along a second one of the first and second dimensions to generate a plurality data subsets; providing each of the plurality of data subsets to a respective computational unit in a distributed computing environment for evaluation; receiving, from the respective computational units, scores for a plurality of variables as determined by the respective computational units from the plurality of data subsets; and selecting a portion of the plurality of variables as having at least a threshold level of accuracy in modeling the time series data.
US09940384B2 Statistical clustering inferred from natural language to drive relevant analysis and conversation with users
A mechanism is provided in a data processing system for statistical clustering inferred from natural language to drive relevant analysis. The mechanism receives a natural language text from a user and processes the natural language text to identify an entity of interest and a focus of statistical analysis. The mechanism performs a follow-up question and answer conversation with the user to receiving from the user one or more driving factor values for the one or more driving factors. The mechanism determines at least one cluster of entities matching the one or more driving factor values and generates at least one data visualization of the data in the corpus for the focus of statistical analysis having a scope that is narrowed based on the at least one cluster of entities matching the one or more driving factor values.
US09940383B2 Method, an arrangement and a computer program product for analysing a biological or medical sample
An aspect of the present invention is a computer executable method for characterizing, e.g. for diagnostic purposes, utilizing a reference database, a query sample tissue based on the gene expression data of the tissue. The method is characterized in that it comprises the steps of calculating an expression match score (EM-score) indicating the likelihood of having the gene expression level observed in the query sample in each of the tissue categories of the reference database, calculating for the genes of the sample tissue, using e.g. the EM-score, tissue specificity score (TS-score), that expresses how uniquely a gene identifies the query sample as belonging to a certain tissue category, calculating, utilizing e.g. the TS-score, overall similarity of the sample tissue in relation to a tissue category of the reference database, and storing at least some resulting characterization data to a memory device or outputting the data to an output device of a computer. An arrangement and a computer program product are also disclosed.
US09940379B2 Hybrid data replication
A system for accelerating database transaction processing by controlling data replication is provided. The system includes a first control unit configured to manage a first storage device and at least one second control unit configured to manage a second storage device. The first control unit writes first data to the first storage device and sends the first data to the second control unit in response to receiving from a host a first write command including the first data. The first control unit writes second data to the first storage device without sending the second data to the second control unit in response to receiving from the host a second write command. The second control unit writes the first data to the second storage device in response to receiving the first data. The second control unit writes the second data to the second storage device in response to receiving from the host a third write command.
US09940377B1 Instant copies of storage volumes
Techniques are described for allocating computing storage capacity to customers of a provider network. Storage capacity that is allocated to a customer is backed up with a replica of the allocated storage capacity. A request is received for a copy of contents of the allocated storage capacity. Responsive to the indication, the requested copy is provided and is configured to reference the replica when the requested copy is accessed.
US09940374B2 Providing feedback in a operating plan data aggregation system
In one embodiment, a method is provided. The method includes receiving forecast information from sales people in a computer. The method further includes receiving comments on specific entries of the forecast information from non-sales people in the computer. The method also includes receiving changes of the forecast information from the non-sales people in the computer. The method additionally includes providing a display of the comments and the changes to the sales people in an interface to the computer.
US09940372B2 Triggering method for instant search
Techniques are provided for automatically determining when to trigger instant search. In one technique, while a user is entering text to formulate a search query, and prior to receiving an indication that the user has completed formulation of the search query, a search assistant system determines the most popular queries that include the text the user has already entered. The search assistant system then determines whether to proactively provide, to the user, search results for the top-candidate of those completed queries. That determination may take into account factors such as whether the top-candidate qualifies as a dominant completed query, a richness metric determined for the search results for the particular completed query, and/or a satisfaction metric determined for the search results for the particular completed query. If the search assistant system determines to proactively provide search results for the particular completed query, the search results for the particular completed query are presented to the user prior to receiving any indication that the user has completed formulation of the search query.
US09940367B1 Scoring candidate answer passages
Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for scoring candidate answer passages. In one aspect, a method includes receiving a query determined to be a question query that seeks an answer response and data identifying resources determined to be responsive to the query; for a subset of the resources: receiving candidate answer passages; determining, for each candidate answer passage, a query term match score that is a measure of similarity of the query terms to the candidate answer passage; determining, for each candidate answer passage, an answer term match score that is a measure of similarity of answer terms to the candidate answer passage; determining, for each candidate answer passage, a query dependent score based on the query term match score and the answer term match score; and generating an answer score that is a based on the query dependent score.