Document Document Title
US09912262B2 Positioning arrangement for moving an object that is to be positioned
A positioning arrangement is provided for moving an object that is to be positioned (9) with at least one positioning axis (11), wherein at least two electric motors (6) for moving the object that is to be positioned (9) are assigned to at least one positioning axis (11). Each electric motor (6) has its own separate control circuit (2), wherein the control circuits (2) are designed in each case to receive adjustment requests for a positioning direction. The control circuits (2) are furthermore designed in each case to evaluate the adjustment request and the electric motors (6) are interconnected via a communication interface (13). The adjustment requests and the movement commands to control the electric motors (6) can be exchanged via this communication interface (13).
US09912260B2 Drive control circuit for linear vibration motor and method
A drive signal generating unit generates a drive signal used to alternately deliver a positive current and a negative current to a coil. A driver unit generates the drive current in response to the drive signal generated by the drive signal generating unit and supplies the drive current to the coil. After the drive termination of a linear vibration motor, the drive signal generating unit generates a drive signal whose phase is opposite to the phase of the drive signal generated during the motor running. The driver unit quickens the stop of the linear vibration motor by supplying to the coil the drive current of opposite phase according to the drive signal of opposite phase.
US09912258B2 Electrostatic chuck assemblies capable of bidirectional flow of coolant and semiconductor fabricating apparatus having the same
An electrostatic chuck assembly, including an electrostatic chuck on which a substrate is loaded; a channel that provides a flow passage for coolant in the electrostatic chuck, the channel having a first opening at a first end corresponding to a center of the substrate and a second opening at a second end corresponding to an edge of the substrate; and a valve box to control a flow direction of the coolant in the channel, the valve box including a first supply valve to control an introduction of the coolant into the first opening; a first return valve to control a drainage of the coolant from the second opening; a second supply valve to control an introduction of the coolant into the second opening; and a second return valve to control a drainage of the coolant from the first opening.
US09912257B2 Methods and systems for micro machines
A micro machine may be in or less than the micrometer domain. The micro machine may include a micro actuator and a micro shaft coupled to the micro actuator. The micro shaft is operable to be driven by the micro actuator. A tool is coupled to the micro shaft and is operable to perform work in response to at least motion of the micro shaft.
US09912253B2 Full bridge tunnel diode inverter
Systems and methods for electrical power conversion include the provision of a full-bridge tunnel diode inverter topology which provides a balanced push-pull drive voltage and current across the entire transformer primary. Moreover, the full-bridge tunnel diode inverter may avoid operating its tunnel diodes in a high-current/high-voltage state at light loads, unlike a single-diode inverter. The disclosed principles also allow a full-bridge tunnel diode inverter topology that may avoid RF chirps in the tunnel diodes during rising or falling device ramp currents since the primary current passes through two tunnel diodes in series.
US09912252B2 Pre-charge circuit and photovoltaic inverter
Provided is a pre-charge circuit and a photovoltaic inverter. The pre-charge circuit includes an alternating current power source, a half-bridge rectifier, an auxiliary charging capacitor, a current limiting device and a controllable switch. The pre-charge circuit is connected to a target charging capacitor to form a voltage doubling rectifier circuit. A direct current side of the half-bridge rectifier is connected in parallel to the target charging capacitor, and an alternating current side of the half-bridge rectifier is connected to one end of the alternating current power source. One end of the auxiliary charging capacitor is connected to any one end of the target charging capacitor, and the other end of the auxiliary charging capacitor is connected to the other end of the alternating current power source.
US09912251B2 Systems and methods for controlling multi-level diode-clamped inverters using space vector pulse width modulation (SVPWM)
Control systems for a multi-level diode-clamped inverter and corresponding methods include a processor and a digital logic circuit forming a hybrid controller. The processor identifies sector and region locations based on a sampled reference voltage vector V* and angle θe*. The processor then selects predefined switching sequences and pre-calculated turn-on time values based on the identified sector and region locations. The digital logic circuit generates PWM switching signals for driving power transistors of a multi-level diode-clamped inverter based on the turn-on time values and the selected switching sequences. The control system takes care of the existing capacitor voltage balancing issues of multi-level diode-clamped inverters while supplying both active and reactive power to an IT load. Using the control system, one can generate a symmetrical PWM signal that fully covers the linear under-modulation region.
US09912250B2 Inductive power transfer control
An inductive power transfer (IPT) control method is disclosed for controlling the output of an IPT pick-up. The invention involves selectively shunting first and second diodes of a diode bridge to selectively rectify an AC current input for supply to a load, or recirculate the AC current to a resonant circuit coupled to the input of the controller. By controlling the proportion of each positive-negative cycle of the AC input which is rectified/recirculated, the output is regulated. Also disclosed is an IPT controller adapted to perform the method, an IPT pick-up incorporating the IPT controller, and an IPT system incorporating at least one such IPT pick-up.
US09912249B2 Rectifying circuit with thyristors
A rectifying circuit including: between a first terminal of application of an AC voltage and a first rectified voltage delivery terminal, at least one first diode; and between a second terminal of application of the AC voltage and a second rectified voltage delivery terminal, at least one first anode-gate thyristor, the anode of the first thyristor being connected to the second rectified voltage delivery terminal; and at least one first stage for controlling the first thyristor, including: a first transistor coupling the thyristor gate to a terminal of delivery of a potential which is negative with respect to the potential of the second rectified voltage delivery terminal; and a second transistor connecting a control terminal of the first transistor to a terminal for delivering a potential which is positive with respect to the potential of the second rectified voltage delivery terminal, the anode of the first thyristor being connected to the common potential of voltages defined by said positive and negative potentials.
US09912248B2 Power module
An object of the present invention is to provide a power module having high reliability. The power module according to the present invention, includes a circuit body and a case housing the circuit body. The case has a first case member including a first base plate and a second case member including a second base plate. The first case member has a first side wall portion formed in an arrangement direction of the first base plate and the second base plate. The second case member has a second side wall portion formed in the arrangement direction, the second side wall portion coupling to the first side wall portion. The first side wall portion and the second side wall portion are formed so as to have the sum of lengths of the first side wall portion and the second side wall portion in the arrangement direction smaller than the thickness of the circuit body. The first case member has a deforming portion smaller than the first base plate and the second base plate in rigidity.
US09912246B2 Bleeder circuit for a dimmer of a light non-linear load
The invention describes a bleeder circuit (1) realized for use in a dimmer (2) comprising a main AC switch (20) for switching a supply voltage (LINE) to a light non-linear load (L), which bleeder circuit (1) comprises a bleeder load (11) realized to provide operational assistance to main AC switch (20); wherein the bleeder load (11) is enabled on the basis of a switching signal (T20) of the main AC switch (20). The invention further describes a dimmer (2) comprising such a bleeder circuit (1). The invention also describes an electrical appliance comprising a light non-linear load (L) and such a dimmer (2). The invention further describes a method of dimming a light non-linear load (L).
US09912243B2 Reducing power in a power converter when in a standby mode
Power converters typically have unique circuitry for graceful start-up and to develop correct operating voltage biases. Typically this unique circuitry is incorporated into a primary-side “start-up” controller. This start-up controller can also be the primary means of control of the power converter once started. However, a secondary-side controller is typically needed for more exact output voltage regulation, duplicating circuitry already present in the primary-side start-up controller. During light-load or no load conditions, on and off switching of the gate driver is stopped when the secondary-side controller sends a standby code inhibit (disable) command to the start-up controller. When power needs to be sent to the secondary side of the transformer to charge a secondary side capacitor, the secondary-side controller sends an enable code command to the start-up controller where it is detect to allow the start-up controller to operate in a normal fashion with the secondary side controller.
US09912242B2 Method and apparatus for sensing multiple voltage values from a single terminal of a power converter controller
A method for regulating an output of a power converter includes receiving a signal at a single terminal of an integrated circuit controller. The signal at the single terminal represents a line input voltage of the power converter during at least a portion of an on time of a power switch. The signal at the single terminal represents an output voltage of the power converter during at least a portion of an off time of the power switch. The power switch is switched in response to the signal to regulate the output of the power converter.
US09912240B1 Highly scalable multiphase power supply with constant on-time DC-DC converters
A multiphase power supply includes several constant ON-time (COT) DC-DC converter integrated circuits (ICs). One of the COT DC-DC converter ICs generates a synchronization signal, which is received in parallel by the other COT DC-DC converter ICs. Two or more COT DC-DC converter ICs are turned ON at the same time in synchronization with the synchronization signal (e.g., an edge of a pulse of the synchronization signal) that is received in parallel and with another synchronization signal that is propagated from one COT DC-DC converter IC to another.
US09912239B2 Hold up architecture for power supply with DC-DC converter
A power supply includes a DC-DC converter, a boost converter, an energy storage element; and a voltage clamping circuit. The DC-DC converter is connected to a power source with an output voltage in a first voltage range. The voltage clamper circuit is configured to discharge at least a portion of energy of the energy storage element and to produce current at a clamped output voltage range that is substantially equal to the first voltage range. The discharged energy provides hold-up time for the power supply.
US09912234B2 Systems and methods for mitigation of resistor nonlinearity errors in single or multiphase switching voltage regulators employing inductor DCR current sensing
Systems and methods for mitigation of resistor nonlinearity errors in a power converter are provided. In at least one embodiment, the power converter comprises at least one power switch coupled to an input voltage, a pulse width modulation (PWM) circuit for generating control pulses for the at least one power switch, at least one output inductor coupled to a respective one of the at least one power switches, a current sensor coupled in parallel with the at least one output inductor, and at least one circuit element. The current sensor comprises at least one capacitor, at least one resistor for each of the at least one output inductors, and is coupled to the PWM circuit at a current bleed node. The at least one circuit element is coupled to the current bleed node and bleeds a bleed current from the current bleed node when a power switch is turned on.
US09912230B2 Static VAR compensator apparatus and operating method thereof
A static Voltage Ampere Voltage Reactive (VAR) comparator including: a plurality of capacitors being in a Y-connected structure and supplying three-phase alternating current power according to a switching operation; a plurality of bidirectional thyristors connected to the plurality of capacitors in serial to open and close the plurality of capacitors; and a controller, in response to power applied to the static VAR compensator, periodically applying a firing pulse signal to the plurality of bidirectional thyristors reaching to a voltage phase on which a transient current is minimized, wherein, at a point in time when first applying the firing pulse signal to one bidirectional thyristor, the controller applies simultaneously applies the firing pulse signal to the one bidirectional thyristor and other remaining bidirectional thyristors allowing a current to flow on three phases.
US09912228B2 Start-up circuit and method using a depletion mode transistor
A start-up circuit includes an input node, an output node, a reference node, and a depletion mode field-effect transistor (FET) having a first terminal coupled to the input node, a second terminal coupled to the output node, and a gate terminal. A Zener diode has a cathode coupled to the gate terminal of the FET and an anode coupled to the reference node. A first capacitor is coupled in parallel with the Zener diode, a first resistor is coupled between the gate terminal of the FET and the input node, and a second resistor is coupled between the second terminal of the FET and the reference node. The FET and the second resistor are configured to generate an output voltage on the output node, the output voltage being based on an input voltage on the input node and capped at a value below a peak value of the input voltage.
US09912227B2 Device for operational state recovery and corresponding equipment
A device for driving a power supply start-up circuit may include a logic unit for storing an operating state of equipment, where the logic unit is activatable by a start-up signal reaching a start-up threshold. The device may also include a detector, where the detector provides a signal to the logic unit indicating a drop in the signal below a drop threshold. The detector may enable the logic unit to continue operating in the presence of a failure of a power supply to store the operating state of the equipment upon occurrence of the failure of the power supply. In addition, the device may include a start-up circuit sensitive to a power supply signal, where the start-up circuit is activatable by the power supply signal as restored after the failure, and the start-up circuit may provide the start-up signal reaching the start-up threshold upon the power supply signal being restored.
US09912222B2 Circuit configuration and system of capacitors
A circuit configuration and system of capacitors for a converter having a filter system, the circuit configuration including a converter, which has an alternating voltage connection, especially for a multiphase input- or output-side alternating voltage source, and a unipolar connection on the input or output side, especially a direct voltage connection, especially for a voltage intermediate circuit, the alternating voltage connection being connected to phase lines, especially to three phase lines, the phase lines having inductances, in particular, characterized in that first capacitances are situated between a phase line and a common star point in each case, it being the case, in particular, that one of the first capacitances is situated between a particular phase line, especially each phase line, and the common star point, it being the case, in particular, that each of the first capacitances is of equal size.
US09912217B2 Vibration motor
A vibration motor is disclosed. The vibration motor includes a housing, a substrate engaging with the housing, a vibration unit received in the housing, an elastic member suspending the vibration unit, and a coil assembly interacting with the vibration unit. The vibration motor further includes a number of dampers located between the vibration unit and the elastic members for being constantly pressed and released.
US09912214B2 Wire-wound stator having phases with difference in temperature-responsive electrical resistance
A machine includes a rotor and a stator that is situated adjacent the rotor. The stator includes a plurality of wire-wound phases. The phases include at least first and second wire-wound phases that differ in temperature-responsive electrical resistance. A controller is in electrical communication with the stator. The controller is configured to identify an over-temperature condition of the stator based upon the differing temperature-responsive electrical resistance and modify the operation of the stator in response to the over-temperature condition.
US09912207B2 Electrical machine housing and methods of assembling the same
A housing for an electrical machine includes an endshield and a cover. The electrical machine has a rotation axis, a rotor assembly including a rotor, and a controller assembly. The rotor assembly includes a bearing assembly. The endshield includes an annular center section including a bore sized to couple to the bearing assembly. The cover is coupled to the endshield. The cover includes a generally axially-extending flange wall formed about a perimeter of the cover, a volute-shaped inner chamber configured to at least partially enclose the rotor coupled to the rotor assembly of the electrical machine, and a cooling channel positioned radially outward from the inner chamber. The cooling channel is configured to at least partially enclose the controller assembly of the electrical machine.
US09912205B2 Rotor structure for rotary electric machine
A rotor structure for a rotary electric machine in which an inner surface of a hollow rotor core and an outer surface of a shaft inserted into a hole of the rotor core are fitted together by mutual engagement between a projection and a recess to compose a rotor, the rotor structure including: a first retainer brought into contact with one end of the rotor core; and a second retainer brought into contact with a surface of the first retainer opposite to a surface in contact with the rotor core so as to fix the first retainer and the rotor core to the shaft, wherein a coefficient of static friction of a first sliding surface between the first retainer and the second retainer is smaller than any other sliding surface provided in the rotor.
US09912199B2 Receivers for wireless power transmission
The present invention may provide various electric receiver arrangements which may be used to provide wireless power transmission using suitable power transmission techniques such as pocket-forming. In some embodiments, receivers may include at least one antenna connected to at least one rectifier and one power converter. In other embodiments, receivers including a plurality of antennas, a plurality of rectifiers or a plurality of power converters may be provided. In addition, receivers may include communications components which may allow for communication to various electronic equipment including transmitters, phones, computers and others. Lastly, various implementation arrangements may be provided for including receivers in electronic devices.
US09912193B2 Remote terminal unit modular equipment
Telecontrol equipment for an MV/LV substation between a medium-voltage network and a low-voltage network. The telecontrol equipment including a first device configured to power the equipment from the low-voltage network and from an auxiliary source, a second device configured to communicate information gathered by the equipment to outside, a third device configured to monitor the medium-voltage network at the substation level, and a fourth device configured to monitor the low-voltage network at the substation level.
US09912187B2 Wireless power transmission antenna with thermally conductive magnetic shield and method therefor
A carbon material and a magnetic material are incorporated at a magnetic shield included at a wireless power antenna. The magnetic shield shapes a magnetic flux field proximate to the magnetic shield. The carbon material conducts heat at the magnetic shield.
US09912175B2 Battery harvester
A universal battery harvester which harvests energy from a plurality of different batteries and stores the harvested energy in an onboard storage battery under control of a microprocessor.
US09912167B2 Device for inductively transmitting power
A system is provided for inductive power transmission. The system includes a primary unit having a primary coil and a secondary unit having a secondary coil. The primary coil generates a magnetic transmission field in a transmission area between the primary unit and the secondary unit. The system includes a metal detector, and the metal detector is suitable for the detection of a metallic object situated in the transmission area.
US09912165B2 Power receiver circuit
Systems and techniques are provided for a power receiver circuit. A power generating mechanism may include power generating elements that may generate alternating current signals. Rectifier circuit may include rectifiers that may generate a direct current signal from an alternating current signal, and diodes. Group circuits that may connect groups of rectifier circuits in electrical circuits to combine the direct current signals from the rectifier circuits in a group into a single direct current signal. A step down converter may be connected to the group circuits. The step down converter may convert a direct current signal to a direct current signal of a target voltage level. An output switch may be connected to the step down converter. A linear regulator may be connected to the step down converter. A microcontroller may be connected to the linear regulator and the output switch and may control the output switch.
US09912159B2 Method and apparatus for detection of local line phase in a multi-phase power line system
Apparatus and method for determining a phase connection for a power conditioning unit (PCU). In one embodiment, the method comprises determining, by a controller coupled to a multi-phase AC line, a reference phase stamp; determining, by the PCU, a local phase stamp, wherein the PCU is coupled to a subset of phase lines in the multi-phase AC line; determining a difference between the reference phase stamp and the local phase stamp; comparing the difference to one or more of a first range of values or at least a second range of values; and determining the phase connection for the PCU based on whether the difference is within the first range or the at least a second range.
US09912156B2 Switching apparatus and method for varying an impedance of a phase line of a segment of an electrical power line
The switching apparatus and the method are for varying the impedance of a phase line of a segment of an electrical power line. The phase line includes n conductors electrically insulated from each other and short-circuited together at two ends of the segment. The apparatus comprises a controllable interrupter connected in series for each conductor; a parameter detector; a first controller for controlling the interrupters; and a disabling unit for disabling the interrupters. The disabling unit comprises n controllable switches associated with the interrupters, position detectors for detecting which of the interrupters is closed, and a second controller having a command output to command the controllable switches and ensure that, at all operating times, at least one of the interrupters is closed and disabled.
US09912150B2 Power control system
In a power control system which connects power from the power storage device to a power grid and supplies power to a load, the power from the power storage device is connected to the load and the power grid via a DC/DC converter, a smoothing capacitor, and a DC/AC converter. By a first power control unit for controlling flow power of the power grid to be a power command value, and by a second power control unit for suppressing reverse flow power, an output power command for the DC/AC converter is generated, an output power command for the DC/DC converter is generated so that voltage of the smoothing capacitor becomes target voltage, and the output power command is corrected so as to suppress voltage variation in the smoothing capacitor.
US09912145B2 Boost converter with short-circuit protection and method thereof
A short-circuit protection method for a boost converter is disclosed. In this method, a switch of a switching circuit of the boost converter is turned on and a control voltage with a gradually increasing magnitude is supplied to control a short-circuit protection switch coupled between an input voltage and the switching circuit when the boost converter starts up. Then, a current flowing through the switch is detected and compared with a predetermined value. The switch is turned off and a preset time period is initiated if the current is higher than the predetermined value. It is detected whether a short-circuit event occurs at an output terminal of the boost converter at the end of the preset time period. If the short-circuit event occurs, the short-circuit protection switch is then turned off.
US09912130B1 Electrical device gripping tool
Embodiments disclosed herein include devices and methods for gripping electrical components. The electrical device gripping tool may include a rotating handle, a cam assembly, and a body. The rotating handle may be attached to the assembly and the cam assembly may include a cam holder that fits over the cam to connect the rotating handle to the body. Furthermore, the body may include a first body half and a second body half that are each separately coupled to the cam such that the first body half and the second body half slide towards each other and slide away from each other with respect to a rotation of the rotating handle. In addition, shields are optionally attached to the first and second body half such that they assist in the removal of the electrical device without its terminals making contact with the containment box.
US09912126B2 Spark plug insulator containing mullite and spark plug including same
An insulator is rendered less breakable. A spark plug insulator is a tube-shaped spark plug insulator having a through hole extending in a direction of an axial line. The spark plug insulator contains alumina as a main component and mullite at at least part of the insulator. Mullite is contained in only an inner circumferential surface of the tube-shaped spark plug insulator and in at least part of the inner circumferential surface of the spark plug insulator in an area extending toward a distal end from a portion having a largest outer diameter.
US09912123B2 Semiconductor light emitting device
A semiconductor light emitting device is provided which has improved light emission efficiency. The semiconductor light emitting device includes an active layer having a quantum well structure. The quantum well structure includes well and barrier layers that are alternately and repeatedly deposited on one another. The well layer is formed of a gallium nitride group semiconductor that contains In. The well layer has a profile of composition ratio of In that includes a first portion, and a second portion that is in contact with the first portion. The concentration of In in the first portion is substantially fixed or reduced along the thickness direction of the well layer from the negative side to the positive side of the piezoelectric field that is produced in the well layer. The concentration of In in the second portion is sharply reduced with respect to the first portion.
US09912121B2 Gap distributed Bragg reflectors
A device includes one or more reflector components. Each reflector component comprises layer pairs of epitaxially grown reflective layers and layers of a non-epitaxial material, such as air. Vias extend through at least some of the layers of the reflector components. The device may include a light emitting layer.
US09912117B2 Compact tunable laser device
A semiconductor laser device which comprises a laser diode chip (100) that emits laser light; a 45° reflective mirror (400) that changes laser light traveling horizontally to a package bottom into laser light traveling perpendicular to the package bottom. The 45° reflective mirror (400) is a partial reflective mirror which has a partial reflection/partial transmission characteristic. An optical feedback-partial reflective mirror (500) is disposed along a path of light passing vertically through the 45° reflective mirror (400). The optical feedback-partial reflective mirror (500) supplies some of the laser light traveling through the 45° reflective mirror (400) back to the 45° reflective mirror 400 by reflecting a first portion of the laser light while transmitting a remaining portion of the laser light.
US09912116B2 Burst optical signal transmission device and burst optical signal transmission method
A burst optical signal transmission device which includes a light source for generating and outputting burst signal light, a light source driving circuit for outputting, to the light source, a driving signal for switching between an output time and a stop time of the burst signal light, based on a burst control signal, and a pre-emphasis circuit for outputting a pre-emphasis control signal for superimposing an additional signal for charging a capacitor included in the light source, onto the driving signal, at a timing in the vicinity of the beginning of the burst control signal.
US09912115B2 Method of producing a cap substrate, and packaged radiation-emitting device
The invention relates to methods of producing a cap substrate, to methods of producing a packaged radiation-emitting device at the wafer level, and to a radiation-emitting device. By producing a cap substrate, providing a device substrate in the form of a wafer including a multitude of radiation-emitting devices, arranging the substrates one above the other such that the substrates are bonded along an intermediate bonding frame, and dicing the packaged radiation-emitting devices, improved packaged radiation-emitting devices are provided which are advantageously arranged within a cavity free from organics and can be examined, still at the wafer level, in terms of their functionalities in a simplified manner prior to being diced.
US09912111B2 Flippable electrical connector
A receptacle connector includes an insulative housing defining a base and a mating tongue extending from the base with a widen and thicken step structure formed around a root of the mating tongue near to the base, two rows of plate contacts disposed in the insulative housing with contacting sections exposed upon the mating tongue and in front of the step structure and categorized with signal contacts, power contacts and grounding contacts, and a metallic shielding plate disposed within a middle level of the mating tongue and occupying most portions of said mating tongue. The shielding plate defines a pair of immoveable and un-deflectable lateral edge sections in front of the step structure, each lateral edge section is configured to be adapted to be locked with a latch of a plug connector in a transverse direction.
US09912107B2 Plug and receptacle assembly having a thermally conductive interface
Plug assembly including a pluggable connector having a mating end and a trailing end and a central axis extending therebetween. The pluggable connector includes internal electronics that generate thermal energy within the pluggable connector. The mating end is configured to engage a data connector. The pluggable connector also includes a thermal interface region that is coupled to the pluggable connector. The thermal interface region includes a series of transfer plates that extend parallel to each other and to the central axis. The transfer plates define a series of plate-receiving slots extending parallel to the central axis. The thermal interface region transfers the thermal energy generated by the internal electronics through the transfer plates.
US09912106B2 Electrical connector having improved shielding shell
An electrical connector includes a housing defining a base portion and a tongue portion, two rows of terminals and a shielding shell. The tongue portion defines a thickened step at a root to the base portion, the base portion defines a front and a rear side, and an upper and a lower retaining slots. The shell is retained on the base portion and surrounding the tongue portion so as to define a mating cavity between the shell and the tongue portion. The shell defines an upper and a lower-front stopping portions inwardly received in corresponding retaining slots to prevent a forward movement of the housing. The upper and lower front stopping portions extend forwardly into the mating cavity across the front side of the base portion so as to prevent a mating connector from damaging the housing during the mating connector is inserted into the mating cavity.
US09912103B2 System and method for utilizing smart data connectors with built in safely remove hardware functionality
An information handling system includes a processor and receptacle module. The processor to receive a request to safely remove a hardware component coupled to the information handling system, to execute a safely remove process, and to send a latch release signal in response to the process being completed. The receptacle module including a receptacle, a latch, and a component. The latch is biased in a first position with a hook of the latch being located within a notch of the receptacle. The latch to rotate from the first position to a second position in response to a plug being inserted into the receptacle, and to snap back to the first position in response to the plug being fully inserted into the receptacle. The component to continually exert a first force on the latch to move the latch to the second position while the latch release signal is received.
US09912100B2 Low voltage buss system
An electrical buss has a carrier and at least a pair of electrically conductive elements. The at least a pair of electrically conductive elements extend linearly along a length of the carrier and at least a portion of each of the least a pair of electrically conductive elements is exposed at a surface of the carrier. A connector is releasably couplable to the electrical buss adjacent to the surface of the carrier. The connector has at least a pair of electrically conductive contacts for engaging with the electrically conductive elements at any desired location along the length of the carrier.
US09912099B2 Terminal-attached electric wire
In a terminal-attached electric wire (1), a resin portion (4) which covers a conductor-exposed portion of a terminal (3) to which a conductor is connected is formed by molding resin in the conductor-exposed portion. In the terminal-attached electric wire (1), the resin portion (4) has a peeling preventive portion (14) which prevents the resin portion (4) from peeing off in a release direction of a die when the die is released.
US09912094B2 Device and method protecting a connector from debris while validating connector position assurance engagement
A device has both a debris deflector and a built in CPA assist. The debris deflector is a (sufficiently) large shield that covers the CPA slot and the CPA in the pre-staged arrangement. The device further includes a CPA assist that is configured to engage the pre-staged CPA (now covered by the debris deflector) so that it can allow the manufacturer to engage the now protected CPA when desired.
US09912092B2 Ergonomic terminal position assurance member
An ergonomically friendly terminal position assurance device for use with an electrical connector. The device includes a terminal position assurance device for use with an electrical connector. The device includes a terminal engaging section and an engagement section. The terminal engaging section has a first end and an oppositely facing second end. The engagement section extends from the first end and has a bearing surface, the bearing surface has a surface area which is wider than the width of the terminal engaging section. The engagement section extends at least part of the length of the terminal engagement section. The bearing surface of the engagement section is configured to allow an assembler to push the terminal position assurance device during assembly of the electrical connector in an ergonomically friendly manner.
US09912084B2 High speed signal connector assembly
A connector assembly is configured to provide one or more signal paths between electrical components mounted on at least one component device. The connector assembly may include a printed circuit board (PCB) that supports one or more contacts on a first PCB surface that is opposite from a second PCB surface, a spacer secured over the first PCB surface, wherein at least portions of the one or more contacts are exposed through an opening in the spacer, and a support plate is secured to the second PCB surface. The support plate is configured to mount the connector assembly to a first device surface that is opposite from a second device surface on which at least one electrical component is mounted. The support plate may include fasteners at four corners.
US09912082B2 Electric wire connection structure
A electric wire connection structure includes a flat cable including a plurality of linear conductors and an insulator covering the linear conductors; a plurality of busbars for electrically connecting electrode terminals provided on two or more of battery cells stretched in a given direction among the plurality of battery cells stacked in the direction and included in a battery module, the electrode terminals being lined up in the direction; and connecting members provided for each combination of the linear conductors and the busbars to include a connecting member main body and a pressure welding blade portion connected to the connecting member main body, a pressure welding groove being formed on the pressure welding blade portion.
US09912077B2 Broadband polarization diversity antennas
This disclosure is directed to broadband polarization diversity antennas. In one aspect, a polarization diversity antenna includes a baseboard with a baseboard-feed line located on a first surface. The baseboard-feed line includes a serpentine meander-line portion. The antenna also includes an antenna-array board with two or more antenna elements arranged in a series. The antenna-array board is attached to the first surface with the serpentine meander-line portion located between an edge of the antenna-array board and the baseboard. Each antenna element is connected to the serpentine meander-line portion via an antenna-feed line located on the antenna-array board. The antenna array provides two dimensional polarization broadcasting and receiving of electromagnetic radiation. In another aspect, a notch antenna is formed on an opposing second surface of the baseboard opposite the antenna-array board in order to provide three-dimensional polarization broadcasting and receiver of electromagnetic radiation.
US09912075B1 Method for automatically adjusting tunable passive antennas and a tuning unit, and apparatus for radio communication using this method
The invention relates to a method for automatically adjusting a plurality of tunable passive antennas and a multiple-input-port and multiple-output-port tuning unit. The invention also relates to an apparatus for radio communication using this method. An apparatus for radio communication of the invention comprises: 4 tunable passive antennas; a multiple-input-port and multiple-output-port tuning unit having 4 input ports and 4 output ports; 4 sensing units; 4 feeders; a transmission and signal processing unit, which applies 4 excitations to the input ports, one and only one of the excitations being applied to each of the input ports, and which delivers one or more antenna adjustment instructions and one or more tuning unit adjustment instructions; and a control unit, which delivers one or more antenna control signals to the tunable passive antennas, and which delivers one or more tuning control signals to the multiple-input-port and multiple-output-port tuning unit.
US09912074B2 Congruent non-uniform antenna arrays
Systems, methods, and apparatus for forming an antenna array are disclosed. In one or more embodiments, the disclosed method involves determining at least one coprime moduli set based upon a differential phase gain requirement and a differential phase range requirement for the antenna array. The method further involves producing at least one configuration for relative spacing of antenna elements of the antenna array by using at least one coprime moduli set. Also, the method involves choosing one of configurations for the antenna array to employ by evaluating a resultant gain and an unambiguous angle of arrival (AOA) for each of the configurations. Further, the method involves determining the absolute spacing of the antenna elements of the antenna array for the chosen configuration for the antenna array according to a wavelength requirement for the antenna array.
US09912070B2 Ground-based satellite communication system for a foldable radio wave antenna
A satellite communications assembly has a foldable antenna that has a flexible reflector member and a flexible tension member. The assembly further has a feed assembly centrally disposed with respect to the foldable antenna and a plurality of reflector supports that extend radially from the feed assembly and coupled to the reflector member. Additionally, the assembly has a hub coupled to the feed assembly, the hub coupled to ends of a plurality of ground support legs.
US09912067B2 Eliminating reciprocity constraints in radiating and scattering systems with spatio temporal modulation
A non-reciprocal device using a space-time modulation scheme. By applying the space-time modulation scheme, reciprocity in radiation and scattering scenarios is prevented. Such a scheme utilizes a linear system with simple, compact and inexpensive electronic components compared to the current use of bulky duplexers and non-reciprocal magnet based phase shifters to provide non-reciprocity. One such linear system involves traveling-wave antennas loaded with voltage dependent capacitors that are modulated in space and time thereby allowing the antenna to transmit with high directivity in a certain direction and not receive from that direction. Another linear system involves a resonant metasurface characterized by transverse spatiotemporal gradients, where the spatiotemporal gradients include periodically modulated impedances thereby causing a non-reciprocal transmission response. In this manner, a signal that propagates and impinges on the surface at a given direction will be fully transmitted while a signal propagating from the complementary direction will be fully reflected.
US09912065B2 Dipole antenna module and electronic apparatus including the same
A dipole antenna module and an electronic apparatus include an antenna element, a power feeder formed at an end of the antenna element and connected to a circuit board to process an antenna signal through a cable, and a ground part to ground a ground of the cable such that the ground part keeps a preset gap from the antenna element and is grounded to a conductor of the circuit board.
US09912063B2 Antenna structure for distributed antenna system
One embodiment discloses an antenna structure. An antenna structure comprises: a transmit antenna element comprising a plurality of transmit antenna sub-elements; a receive antenna element comprising a plurality of receive antenna sub-elements, wherein the transmit antenna element and the receive antenna element are orthogonally-polarized with respect to each other; a ground plane defining a reflector for the antenna structure; at least one electronic component coupled with the ground plane, the at least one electronic component comprising: a transmit balanced to unbalanced (BALUN) circuit configured to split a transmit signal from a transmitter into two balanced transmit signals, wherein the plurality of transmit antenna sub-elements are coupled to the transmit BALUN; and a receive BALUN circuit configured to combine feeds from the plurality of receive antenna sub-elements into a receive single output to a receiver.
US09912059B2 Proximity coupled multi-band antenna
Systems and techniques are provided for proximity coupled multi-band antenna. A two-layer flex antenna includes a first element and a second element arranged with a gap between the first element and the second element. A dielectric material covers the two-layer flex antenna and the gap. A thin trace antenna is arranged on top of the dielectric material such that a first portion of the thin trace antenna is partially congruent with the first element of two-layer flex antenna, a second portion of the thin trace antenna crosses the gap between the first element and the second element of the two-layer flex antenna, and a third portion of the thin trace antenna extends away from the second element of the two-layer flex antenna.
US09912056B2 Multiband antenna and manufacturing method thereof
A multiband antenna includes a first antenna unit (10) and a second antenna unit (20). The first antenna unit (10) includes a first antenna pattern (11) formed of a conductor and a first substrate (12) formed of a dielectric, for holding the first antenna pattern (11). The second antenna unit (20) includes a second antenna pattern (21) formed of a conductor and a second substrate (22) formed of a dielectric having a dielectric constant different from the dielectric constant of the first substrate (12), for holding the second antenna pattern (21). In the multiband antenna, by injection molding the second substrate (22) with the first antenna unit (10) and the second antenna pattern (21), which being insert components, the first antenna unit (10) and the second antenna unit (20) are integrated.
US09912052B2 Near-linear drive systems for positioning reflectors
System for positioning a reflector includes a base (112), yoke (104) and a reflector in the form of a lens mirror assembly (10). A motor (120) is mounted and remains substantially stationary with respect to rotation about a first axis while the yoke rotates about the first axis. A connecting rod (152) actuated for movement by the motor is mechanically coupled to the reflector so that movement of the connecting rod in relation to the yoke imparts rotation to the reflector about the second axis when the reflector is supported by the yoke. A mechanical drive system couples an output shaft of the motor to the connecting rod. The mechanical drive system is arranged so that it varies an angular position of the reflector at a rate which is linearly related to the rotation of the output shaft.
US09912051B2 Three-axis control antenna device
A vertical axis driver drives a vertical axis for azimuth angle tracking. A horizontal axis driver drives a horizontal axis for elevation angle tracking. A cross horizontal axis driver drives a cross horizontal axis to which an antenna is attached, that is rotatable around an axis orthogonal to the horizontal axis. An arithmetic processing controller generates a drive signal of a constant azimuth angle the vertical axis when a maximum elevation angle of the antenna is greater than or equal to a set angle in a path of the target object in a single time of continuous tracking. When the maximum elevation angle of the antenna is less than the set angle in the path of the target object in the single time of continuous tracking, the controller issues a drive command of an azimuth angle direction to the vertical axis.
US09912041B1 Antenna carriers with magneto-dielectric material and beam-shaping elements for enhanced performance and radiation safety of electronic devices
Antenna carriers with magneto-dielectric material and beam-shaping elements for enhanced performance and radiation safety of electronic devices are described. One electronic device includes a housing, an antenna element disposed on an antenna carrier, and a printed circuit board (PCB) disposed within the housing, the printed circuit board including radio frequency (RF) circuitry. The antenna carrier can be made up of a plastic cap, a ground plane, and a magneto-dielectric substrate with both dielectric and magnetic properties. The plastic cap is disposed at a first side of the housing and the magneto-dielectric substrate is disposed on a top surface of the plastic cap. The antenna element is disposed on a bottom surface of the magneto-dielectric substrate and electrically coupled to the RF circuitry. The antenna element radiates electromagnetic energy in a resonant mode and the magnetic property of the magneto-dielectric material increase efficiency, frequency bandwidth, or both.
US09912040B2 Electronic device antenna carrier coupled to printed circuit and housing structures
Electronic device antenna structures may include first and second antennas. A housing may have a periphery that is surrounded by peripheral conductive structures such as a segmented peripheral metal member. A segment of the peripheral metal member may be separated from a ground by an opening. An antenna feed for the first antenna may have a positive antenna terminal coupled to the peripheral metal member and a ground terminal coupled to the ground. A return path for the first antenna may span the opening in parallel with the antenna feed. A plastic carrier may be mounted to a printed circuit and a metal housing structure using screws. The plastic carrier may support an antenna resonating element for the second antenna and may support the return path for the first antenna. The screws may short metal structures on the plastic carrier to the metal structures and traces on the printed circuit.
US09912039B2 Wireless communication device and antenna assembly
Wireless communication device includes a first device section. The first device section has a first edge. The wireless communication device also includes a second device section that has a second edge. The wireless communication device also includes a floating hinge that joins the first and second edges and permits the first and second device sections to move between a closed state and an operating state. The floating hinge and the first device section are rotatable about a first axis of rotation that extends through the floating hinge. The floating hinge and the second device section are rotatable about a second axis of rotation that extends through the floating hinge. The floating hinge includes a slot antenna that is communicatively coupled to a processor and is configured to at least one of transmit wireless signals or receive wireless signals.
US09912038B2 Pit lid antenna and casing
Disclosed is a pit lid antenna assembly including an antenna having an upper section and a lower section; and an antenna casing having a casing wall having an inner surface, the inner surface defining a first antenna slot, the first antenna slot sized to accept a portion of the lower section of the antenna.
US09912035B2 Retaining and anchoring device on a metal plate for fastening a functional support
A retaining and anchoring device forming a retaining and anchoring section on a metal plate on a reflector includes a recess provided in the metal plate. The recess has on an upper face of the metal plate a peripheral edge or edge sections spaced apart from one another. An undercut or several undercut sections are formed below the peripheral edge or the edge sections. The recess is free of bores or passages. A locking device prevents unintentional removal of a snap-on mechanism from the recess beyond an edge section or plural edge sections which cover the undercut section(s).
US09912034B2 Antenna assembly
Antenna assemblies are described herein. Any of these assemblies may include a primary feed that includes a single patterned emitting surface from which multiple different beams of RF signals are emitted corresponding to different antenna input feeds each communicating with the patterned antenna emitting surface. The antenna assembly may include a primary reflector, a secondary reflector, and a primary feed that is feed by multiple antenna input feeds so that different regions of the primary and secondary antenna correlate with different beams emitted by the primary feed. The antenna assembly is capable of emitting beams in the same direction having different polarizations using a single primary feed. Also described herein are methods of operating an antenna assembly. Access point devices that have a single primary feed configured to emit multiple beams are also described.
US09912028B2 Wide band radio frequency circulator
A wide band radio frequency (RF) circulator is presented. The RF circulator includes at least one stage having four ports, a first end, and a second end, wherein a first port and a third port are connected at the first end of the at least one stage, wherein a second port and a fourth port are connected at the second end of the at least one stage, wherein each of the at least one stage includes a pair of couplers connected through a first delay line and a second delay line, thereby forming a network of couplers in the at least one stage.
US09912023B1 Battery system housing with integrated cooling pipe
A battery pack for an electric vehicle is disclosed. The battery pack includes an upper tray, a first busbar attached to the upper tray, a lower tray, and a second busbar attached to the lower tray. The battery pack also includes a plurality of battery cells arranged in the upper and lower trays, and a cooling duct mechanically connecting the lower tray to the upper tray.
US09912021B2 Electrical storage device thermal management systems
A thermal management system for a high density power source is disclosed. The system includes a housing with an interior divided into first and second compartments. The first compartment is configured and adapted to house at least one electrical battery and the second compartment defines a coolant reservoir. A fluid release member connects the first and second compartments. Upon the first compartment reaching a temperature in excess of a predetermined limit, the fluid release member releases coolant form the second compartment into the first compartment to cool the at least one battery within the first compartment.
US09912015B2 Portable and modular energy storage with authentication protections for electric vehicles
A power system that authenticates multiple battery packs to allow for power transfer between the battery packs and an external load system may include a plurality of modular battery packs, each of which may include a first housing, a plurality of battery cells enclosed in the first housing, a first interface for authentication communication, and a second interface that transmits power from the plurality of battery cells. The power system may also include a second housing configured to removably receive the plurality of modular battery packs, and a processing system that is configured to exchange authentication information with the plurality of modular battery packs through the respective first interfaces, wherein the respective second interfaces are only enabled to transmit power when the authentication information is validated.
US09912009B2 Binders, electrolytes and separator films for energy storage and collection devices using discrete carbon nanotubes
In various embodiments an improved binder composition, electrolyte composition and a separator film composition using discrete carbon nanotubes. Their methods of production and utility for energy storage and collection devices, like batteries, capacitors and photovoltaics, is described. The binder, electrolyte, or separator composition can further comprise polymers. The discrete carbon nanotubes further comprise at least a portion of the tubes being open ended and/or functionalized. The utility of the binder, electrolyte or separator film composition includes improved capacity, power or durability in energy storage and collection devices. The utility of the electrolyte and or separator film compositions includes improved ion transport in energy storage and collection devices.
US09912005B2 Method of manufacturing curved secondary battery
A method of manufacturing a curved secondary battery, the method including preparing a flat secondary battery such that the flat secondary battery includes an electrode assembly and a pouch accommodating the electrode assembly; primary shaping the secondary battery such that the primary shaping includes disposing the flat secondary battery in a first jig, and pressing the flat secondary battery to form a primarily-shaped secondary battery such that the primarily-shaped secondary battery has a first curvature radius; secondary shaping the secondary battery such that the secondary shaping includes disposing the primarily-shaped secondary battery in a second jig, and pressing the primarily-shaped secondary battery to form a secondarily-shaped secondary battery having a second curvature radius; and maintaining the secondarily-shaped secondary battery after forming thereof in the second jig for a predetermined time period.
US09912002B2 Ion exchange membrane and method for manufacturing same
The present invention relates to: an ion exchange membrane containing, in a channel, an inorganic particle, substituted with an organic compound including SO4− group; and a method for manufacturing the ion exchange membrane. The ion exchange membrane according to the present invention can provide excellent physical properties while also maintaining ion conductivity.
US09912001B2 Extruder feed system
Extruder feed system. The system includes a pair of spaced-apart, internally and oppositely threaded rotatable elements for receiving and engaging a plastic filament material. An electric motor rotates the rotatable elements in opposite directions thereby to drive the filament into a liquefier chamber for subsequent discharge through a nozzle. The system provides very accurate layer-by-layer build up.
US09912000B2 Fuel cell, manufacturing method thereof, electronic apparatus, enzyme-immobilized electrode, manufacturing method thereof, water-repellent agent, and enzyme immobilizing material
In the case in which a fuel cell has a structure in which a cathode (2) and an anode (1) are opposed with the intermediary of an electrolyte layer (3) and the cathode (2) is formed of an electrode to which an oxygen reductase and so on is immobilized and this electrode has pores inside, at least part of the surface of this electrode is rendered water repellent. For example, the surface of the electrode is rendered water repellent by forming a water-repellent agent on the surface of this electrode. Thereby, in the case in which the cathode is formed of an electrode to which an enzyme is immobilized and this electrode has pores inside, a fuel cell that can stably achieve a high current value by optimization of the amount of water contained in the cathode and a manufacturing method thereof are provided.
US09911994B2 Piezoelectric injector for fuel cell
A fuel supply system for a fuel cell is described. One embodiment of the fuel supply system includes a fuel supply vessel; a fuel spending line in fluid communication with the fuel supply vessel and the fuel cell; a piezoelectric injector in fluid communication with the fuel spending line; and a pressure sensor connected to the fuel spending line and positioned between the fuel supply vessel and the fuel cell. A method for controlling the pressure to a fuel cell is also described.
US09911990B2 Fuel cell stack including end plate having insertion hole
A fuel cell stack includes a stack including a plurality of unit cells, which is stacked on one another in a predetermined direction, first and second end plates disposed on opposing ends of the stack, and a supply line disposed on a first surface of the first end plate to supply fuel or air to the plurality of unit cells, where an insertion hole is defined in a second surface of the first end plate to be adjacent to the supply line, and the second surface of the first end plate is substantially perpendicular to the first surface of the first end plate.
US09911988B2 Subgasket design to dissipate thermal energy generated from catalytic combustion experienced in a PEM fuel cell
A fuel cell component includes a sub-gasket including a structural component and a thermally conductive layer. The sub-gasket defines a central opening while the structural component includes a first side and a second side. The sub-gasket also has an inner portion proximate to the central opening and an outer portion. The inner portion is positioned between the cathode layer outer edge and the ion-conducting membrane outer edge or between the anode layer outer edge and the ion-conducting membrane outer edge. Finally, the thermally conductive layer contacts the second side of the structural component. Advantageously, the thermally conductive layer dissipates locally generated heat caused by unintended particles falling on the sub-gasket.
US09911987B2 Fuel cell stack
A fuel cell stack (1) includes a plurality of stacked power generation cells (3), a heat exchange unit (7) provided between adjacent two of the power generation cells, a fuel gas supply path arranged to supply the power generation cells with a fuel gas, and an oxidant gas supply path (3, 7, 33, 34, 38) arranged to supply the power generation cells with an oxidant gas, wherein the fuel gas supply path includes in series a first path (7, 31) passing through the heat exchange unit (7), a second path (3, 32, 35, 37) passing through some of the plurality of power generation cells (3) in parallel, and a third path (3, 32, 36) passing through the other power generation cells in parallel.
US09911984B2 Semi-solid electrolytes for batteries
Semi-solid electrolyte compositions are disclosed. The semi-solid electrolyte compositions contain a glyme or mixture of glymes, a lithium salt(s), and a polymeric complexing agent(s).
US09911983B2 Electrode catalyst for fuel cell, method of preparing the same, and membrane electrode assembly and fuel cell, each including the same
A fuel cell electrode catalyst including an active complex including a cerium (Ce)-nitrogen (N) bond and having an oxygen reduction activity. Also, a method of preparing a fuel cell electrode catalyst, the method including providing a pre-catalyst including a pre-active complex having a cerium-oxygen bond; and thermally treating the pre-catalyst in the presence of a nitrogen-containing material at a temperature of from about 700° C. to about 2000° C. to prepare the electrode catalyst, the electrode catalyst including an active complex comprising a cerium-nitrogen bond. Also a fuel cell membrane-electrode assembly, the membrane-electrode assembly including: a cathode; an anode disposed opposite to the cathode; and an electrolyte membrane disposed between the cathode and the anode, at least one of the anode and the cathode including the fuel cell electrode catalyst.
US09911982B2 PFCB nanometer scale fibers
A method for making a fibrous layer for fuel cell applications includes a step of combining a perfluorocyclobutyl-containing resin with a water soluble carrier resin to form a resinous mixture. The resinous mixture is then shaped to form a shaped resinous mixture. The shaped resinous mixture includes perfluorocyclobutyl-containing structures within the carrier resin. The shaped resinous mixture is contacted (i.e., washed) with water to separate the perfluorocyclobutyl-containing structures from the carrier resin. Optional protogenic groups and then a catalyst are added to the perfluorocyclobutyl-containing structures.
US09911980B2 Nanofiber electrodes for batteries and methods of making nanofiber electrodes
Provided herein is a battery and an electrode. The battery may include two electrodes; and an electrolyte, wherein at least one electrode further includes: a nano-scale coated network, which includes one or more first carbon nanotubes electrically connected to one or more second carbon nanotubes to form a nano-scale network, wherein at least one of the one or more second carbon nanotubes is in electrical contact with another of the one or more second carbon nanotubes. The battery may further include an active material coating distributed to cover portions of the one or more first carbon nanotubes and portions of the one or more second carbon nanotubes, wherein a plurality of the one or more second carbon nanotubes are in electrical communication with other second carbon nanotubes under the active material coating. Also provided herein is a method of making a battery and an electrode.
US09911975B2 Carbon nanotube-sulfur composite comprising carbon nanotube aggregates, and method for preparing same
The present application relates to a carbon nanotube-sulfur composite including a carbon nanotube aggregate, and a method for preparing the same.
US09911966B2 Battery cell
A battery cell having a first switching member switchable between a first position and a second position, wherein in the first position of the first switching member, a first electrode of the battery stack is being connected to a first terminal of the battery cell. In the second position of the first switching member the first electrode is being separated from the first terminal. The battery cell may further comprise a control unit in order to control a switching of the first switching member. Optionally there may be a second switching member providing a bypass between the second electrode and the first terminal, once the first terminal is being separated from the first electrode in response to a critical state of the battery cell.
US09911960B2 Porous membrane and multilayer porous membrane
A multilayer porous membrane comprising a porous membrane containing a polyolefin resin as a main component; and a porous layer containing an inorganic filler and a resin binder and laminated on at least one surface of the porous membrane; wherein the porous membrane has an average pore size d=0.035 to 0.060 μm, a tortuosity τa=1.1 to 1.7, and the number B of pores=100 to 500 pores/μm2, which are calculated by a gas-liquid method, and the porous membrane has a membrane thickness L=5 to 22 μm.
US09911957B2 Composite membrane, preparation method thereof, and lithium-air battery including the composite membrane
A composite membrane including ion conductive inorganic particles; and a polymer layer, wherein the ion conductive inorganic particles penetrate the polymer layer. Also, a preparation method thereof, and a lithium-air battery including the composite membrane.
US09911956B2 Polyolefin microporous film and method of producing same
A polyolefin microporous membrane includes a polyethylene composition, and 0.5% or more but less than 5% by mass of polypropylene, wherein the polyethylene composition includes polyethylene having a mass average molecular weight of 2.5×105 to 5×105 and ultrahigh molecular weight polyethylene having a mass average molecular weight of 1×106 to 3×106 in an amount of more than 5% by mass and not more than 50% by mass based on 100% by mass of polyethylene composition and has a molecular weight distribution (Mw/Mn) of 5.0 to 300, and the polyolefin microporous membrane has an injection of electrolyte of 20 seconds or less and a uniform polypropylene distribution in at least one plane perpendicular to the thickness direction.
US09911954B2 Anti-explosion package of soft-packed secondary battery
An anti-explosion package of soft-packed secondary battery, including: upper film, lower film, packaging area and anti-explosion area, an outer edge of upper film and lower film are sealed to form hollow cavity for accommodating naked battery core; packaging area is provided on at least one outer edge of upper film and lower film, anti-explosion area is arranged in packaging area, packaging areas of upper film and lower film are adhered together except location of anti-explosion area, so that upper film and lower film are sealed at this side, anti-explosion area includes opening area and transition area successively arranged in a direction from an edge of packaging area close to hollow cavity to an edge away from hollow cavity; portion of the upper film and lower film at opening area is not adhered, portion located at transition area is adhered with intensity less than transition area.
US09911953B2 Device for aiding in the fracture of a vent of an electrochemical cell
A device for aiding in the fracture of a vent of an electrochemical cell includes a main body having a first surface and a plurality of lobes extending out from the first surface of the main body such that an open space is provided between adjacent lobes. Each of the plurality of lobes are configured to make contact with the vent during deployment of the vent such that the vent completely separates from a bottom of the electrochemical cell. The open space provided between adjacent lobes is configured to allow gases from inside the electrochemical cell to pass through during deployment of the vent.
US09911951B2 Battery module compressed cell assembly
A battery module includes a housing including a first interior surface, a second interior surface opposite the first interior surface, and a compressed cell assembly disposed within an interior space of the housing between the first and second interior surfaces. The compressed cell assembly includes a plurality of prismatic battery cells arranged in a cell stack that includes a first end, a second end opposite the first end, and a retaining wall disposed between the first end of the cell stack and the first interior surface of the housing. The retaining wall includes a first surface in contact with the first end of the cell stack and a second surface opposite the first surface that contacts the first interior surface of the housing. The first and second interior surfaces are configured to maintain the compressed cell assembly in a compressed state having a compression force above a predetermined threshold.
US09911947B2 Battery cell for electronic device
A battery cell for an electronic device, and an electronic device, the battery cell including an electrode assembly; an outer case accommodating the electrode assembly, the outer case including first and second outer cases that contact each other along edges thereof, wherein the first and second outer cases include a body portion that includes a space for accommodating the electrode assembly therein, and a wing portion on at least a part of an outer circumference of the body portion, the wing portion including at least one through-hole therein; an insulating film is folded along a length direction of the wing portion to surround the wing portion, the insulating film including a hole at a position overlying the at least one through-hole of the wing portion; and a plate-shaped ring-type insulating member around a circumference of the at least one through-hole.
US09911946B2 Optoelectronic component, a method for manufacturing an optoelectronic component, and a method for processing a carrier
According to various embodiments, an optoelectronic component may be provided, the optoelectronic component including: an electrode structure disposed at least one of over and in a carrier; and a grating structure disposed over the electrode structure, the grating structure including at least a first region and a second region, wherein the first region of the grating structure includes amorphous silicon; and wherein the second region of the grating structure includes a material having a refractive index different from the refractive index of the amorphous silicon.
US09911943B2 Organic light-emitting display device including buffer layers
An organic light-emitting display device is provided. The device can include a display area having an organic light-emitting element on a lower substrate; a bezel area surrounding the display area; a transparent encapsulation unit having first and second encapsulation layers, and a first particle cover; and a first buffer layer. The first encapsulation layer can cover the display area and the bezel area. The first particle cover layer can cover the display area and a portion of the bezel area adjacent to the display area. The first buffer layer, apart from the first particle cover layer, can cover another portion of the bezel area. The second encapsulation layer, which covers the first particle cover layer and the first buffer layer, contacts the first encapsulation layer at a contact surface between the first particle cover layer and the first buffer layer.
US09911941B2 Organic light emitting display device and method of manufacturing organic light emitting display device
An organic light emitting display device may include a first auxiliary electrode, a first first-group first-color corresponding electrode, a second first-group first-color corresponding electrode, and a first group electrode. The second first-group first-color corresponding electrode is larger than the first first-group first-color corresponding electrode. The first group electrode overlaps both the first first-group first-color corresponding electrode and the second first-group first-color corresponding electrode. A first portion of the first group electrode directly contacts the first auxiliary electrode and is positioned closer to the first first-group first-color corresponding electrode than to the second first-group first-color corresponding electrode.
US09911937B2 Light-emitting element, light-emitting device, electronic device, and lighting device
A novel light-emitting element is provided. A light-emitting element that emits red light with high color purity and has high emission efficiency is provided. A full-color light-emitting device having low power consumption is provided. In the light-emitting element that exhibits white light emission, the emission wavelength range of red light is a specific range on the longer wavelength side than the conventional emission wavelength range of red light that is usually used, and an optical element having a specific transmittance in the specific wavelength range is used.
US09911936B2 Light-emitting element, display device, electronic device, and lighting device
A light-emitting element having high emission efficiency which includes a fluorescent material as a light-emitting substance is provided. A light-emitting element includes a pair of electrodes and an EL layer between the pair of electrodes. The EL layer includes a light-emitting layer. The light-emitting layer includes a host material and a guest material. The host material has a difference of more than 0 eV and less than or equal to 0.2 eV between a singlet excitation energy level and a triplet excitation energy level. The guest material is capable of emitting fluorescence. The triplet excitation energy level of the host material is higher than a triplet excitation energy level of the guest material.
US09911930B2 Organic electroluminescent materials and devices
A compound including a ligand having the formula: is disclosed. In these formulas, each R1, R2, and R3 is independently selected from hydrogen, alkyl, and aryl; at least one of R1 and R2 is a branched alkyl containing at least 4 carbon atoms, where the branching occurs at a position further than the benzylic position; where R1 and R3 are mono-, di-, tri-, tetra-, or no substitutions; and R2 is mono-, di-, or no substitutions. Heteroleptic iridium complexes including such compounds, and devices including such compounds are also disclosed.
US09911929B2 Light emitting compounds
Claimed is a cyclometallated organometallic light emitting complex having two tridentate ligand portions sharing a central heterocycle “A” providing a binding-site for each of the two metals (formula I): Formula (I): A more illustrative embodiment is formula (XII): Characterizing for the invention is that either one of XI and X2 and either one of Y1 and Y2 is carbon. The dinuclear complexes are for use in OLEDs.
US09911924B2 Material for organic optoelectronic device, organic light emitting diode including the same, and display including the organic light emitting diode
A material for an organic optoelectronic device including a first compound represented by Chemical Formula A-1 and a second compound represented by Chemical Formula B-1: wherein, variables R1-R8, Ar1, Ar2, L1, L2, X2, n1, and n2 are described in the specification.
US09911923B2 Light-emitting element, light-emitting device, electronic device, lighting device, and pyrene-based compound
A highly efficient light-emitting element capable of providing a plurality of emission colors is provided, which does not easily deteriorate and can minimize a decrease in external quantum efficiency even when a light-emitting layer has a stacked structure. A light-emitting device, an electronic device, and a lighting device which have low power consumption and long lifetime are provided. A light-emitting element includes a plurality of light-emitting layers stacked between a pair of electrodes. The light-emitting layers each contain a host material and a guest material. The guest materials of the light-emitting layers are substances which have different HOMO levels but have substantially the same LUMO levels and emit light of different colors. A light-emitting device, an electronic device, and a lighting device are fabricated using the light-emitting element.
US09911918B2 Method of manufacturing flexible display apparatus
A manufacturing method of a flexible display apparatus includes forming a sacrificial layer on a carrier, forming a flexible substrate on the sacrificial layer, forming a display element on the flexible substrate, forming a first protection layer on the display element, forming, on the first protection layer, a second protection layer, which has an opposite sign of a thermal expansion coefficient to the first protection layer, separating the flexible substrate from the carrier by removing at least a portion of the sacrificial layer, and separating the first protection layer from the first protection layer.
US09911916B2 Method for vapor-phase growth of phase-change thin film, and device for vapor-phase growth of phase-change thin film
In order to form a phase change thin film being flat in a nanometer level and having a good coverage, which is essential for realizing a three-dimensional ultra-high integrated phase change memory, an equipment for vapor phase growth of a phase change thin film is provided which form a phase change thin film at low temperature while the film is being kept in a completely amorphous state. A structure is provided in which an ammonia cracker is connected to a reactor of the equipment for vapor phase growth for a nitrogen radical obtained by decomposing ammonia gas. Consequently, low temperature decomposition of metal organic precursor and film formation on a substrate surface are realized. With the use of this equipment, it is possible to realize a completely amorphous film which has a flat surface at a low temperature of 135° C. using an amine complex as a Ge precursor.
US09911915B2 Multiphase selectors
A multiphase selector includes a first electrode, a switching layer coupled to the first electrode, a capping layer coupled to the switching layer, and a second electrode coupled to the capping layer. The switching layer may include a matrix having a first, relatively insulating phase of a transition metal oxide; a second, relatively conducting phase of the transition metal oxide dispersed in the matrix; and a catalyst, located within the matrix, to interact with the first phase of the transition metal oxide to selectively form and position the second phase of the transition metal oxide within the matrix.
US09911911B2 Multiple electrode plane wave generator
The invention may be embodied as an ultrasonic plane wave generator having a first sheet of piezoelectric material and a second sheet of piezoelectric material. A shared electrode may be between the first sheet and the second sheet. A first electrode set may have a plurality of electrodes, and these electrodes may be positioned with respect to the first sheet to form a set of wave generators. A wave generator in this first wave generator set may include the shared electrode, the first sheet, and one of the electrodes in the first electrode set. A second electrode set may have a plurality of electrodes, and these electrodes may be positioned with respect to the second sheet to form another set of wave generators. A wave generator in this second wave generator set may include the shared electrode, the second sheet, and one of the electrodes in the second electrode set.
US09911910B2 High temperature superconductor tape with alloy metal coating
In one embodiment a superconductor tape includes a substrate comprising a plurality of layers, an oriented superconductor layer disposed on the substrate, and an alloy coating disposed upon the superconductor layer, the alloy coating comprising one or more metallic layers in which at least one metallic layer comprises a metal alloy.
US09911905B2 Method of producing an optoelectronic component
A method of producing an optoelectronic component includes providing a substrate with an optoelectronic semiconductor chip arranged on a surface of the substrate; providing a mask having a lower layer and an upper layer, wherein the lower layer has a lower opening and the upper layer has an upper opening, which openings jointly form a continuous mask opening, and the lower opening has a larger area than the upper opening; arranging the mask above the surface of the substrate such that the lower layer faces the surface of the substrate and the mask opening is arranged above the optoelectronic semiconductor chip; spraying a layer onto the optoelectronic semiconductor chip through the mask opening; and removing the mask.
US09911901B2 Light emitting device having buffer layer with graded composition
A light-emitting device according to an embodiment comprises: a substrate; a first buffer layer disposed on the substrate; a second buffer layer disposed on the first buffer layer and containing Al; a first conductive type semiconductor layer disposed on the second buffer layer; an active layer disposed on the first conductive type semiconductor layer; and a second conductive type semiconductor layer disposed on the active layer, wherein the second buffer layer comprises a first layer and a second layer which are horizontally disposed, the first layer having an increased Al composition ratio as the first layer becomes closer to the first conductive type semiconductor layer, and the second layer having an decreased Al composition ratio as the second layer becomes closer to the first conductive type semiconductor layer. The embodiment configures the buffer layer by horizontally disposing the first layer of which the Al composition ratio linearly increases and the second layer of which the Al composition ratio linearly decreases, thereby having an effect of being capable of effectively controlling strain due to the lattice mismatch and the thermal expansion coefficient difference between the substrate and the first conductive type semiconductor layer.
US09911900B2 Device including transparent layer with profiled surface for improved extraction
A profiled surface for improving the propagation of radiation through an interface is provided. The profiled surface includes a set of large roughness components providing a first variation of the profiled surface having a characteristic scale approximately an order of magnitude larger than a target wavelength of the radiation. The set of large roughness components can include a series of truncated shapes. The profiled surface also includes a set of small roughness components superimposed on the set of large roughness components and providing a second variation of the profiled surface having a characteristic scale on the order of the target wavelength of the radiation.
US09911898B2 Ultraviolet light-emitting device
Disclosed is an ultraviolet light-emitting device. The light-emitting device includes: an n-type contact layer including a GaN layer; a p-type contact layer including an AlGaN or AlInGaN layer; and an active region of multiple quantum well structure positioned between the n-type contact layer and the p-type contact layer. In addition, the active region of multiple quantum well structure includes a GaN or InGaN layer with a thickness less than 2 nm, radiating an ultraviolet ray with a peak wavelength of 340 nm to 360 nm.
US09911892B2 Method for the low-temperature production of radial-junction semiconductor nanostructures, radial junction device, and solar cell including radial-junction nanostructures
A method for the low-temperature production of radial electronic junction semiconductor nanostructures on a substrate, includes: a) forming on the substrate, metal aggregates capable of electronically doping a first semiconductor material; b) growing, in the vapor phase, doped semiconductor nanowires in the presence of one or more non-dopant precursor gases of the first semiconductor material, the substrate being heated to a temperature at which the metal aggregates are in the liquid phase, the growth of the doped semiconductor nanowires in the vapor phase being catalyzed by the metal aggregates; c) rendering the residual metal aggregates inactive; and d) the chemical vapor deposition, in the presence of one or more precursor gases and a dopant gas, of at least one thin film of a second semiconductor material so as to form at least one radial electronic junction nanostructure between the nanowire and the at least one doped thin film.
US09911889B2 Method for fabricating a heterojunction schottky gate bipolar transistor
Certain embodiments of the present invention may be directed to a transistor structure. The transistor structure may include a semiconductor substrate. The semiconductor substrate may include a drift region, a collector region, an emitter region, and a lightly-doped/undoped region. The lightly-doped/undoped region may be lightly-doped and/or undoped. The transistor structure may also include a heterostructure. The heterostructure forms a heterojunction with the lightly-doped/undoped region. The transistor structure may also include a collector terminal. The collector terminal is in contact with the collector region. The transistor structure may also include a gate terminal. The gate terminal is in contact with the heterostructure. The transistor structure may also include an emitter terminal. The emitter terminal is in contact with the lightly-doped/undoped region and the emitter region.
US09911885B2 Solar cell stack
A solar cell stack having multiple semiconductor solar cells, each semiconductor solar cell having a first solar subcell with a top and a bottom and a first semiconductor solar cell, and wherein the first semiconductor solar cell has a first lattice constant, and the solar cell stack has a second solar subcell with a top and a bottom and a second semiconductor solar cell, and wherein the second semiconductor solar cell has a second lattice constant, and wherein the first solar subcell is arranged in a frictional manner with its bottom on the top of the second solar subcell, and wherein an abrupt difference is formed between the first lattice constant and the second lattice constant and the difference between the first lattice constant and the second lattice constant is at least 0.5% or an amorphous layer is formed.
US09911879B2 In situ nitrogen doping of co-evaporated copper-zinc-tin-sulfo-selenide by nitrogen plasma
A method and apparatus for manufacturing a nitrogen-doped CZTSSe layer for a solar cell is disclosed. A substrate is mounted in a vacuum chamber. A plurality of effusion cells are placed within the vacuum chamber in order to evaporate copper, zinc, tin, sulfur, and/or selenium to form elemental vapors in a region proximate the substrate. An RF-based nitrogen source delivers a nitrogen plasma in the region proximal to the substrate. The elemental vapors and the nitrogen plasma form a gas mixture in the region near the substrate, which then react at the substrate to form a CZTSSe absorber layer for a solar cell.
US09911876B2 Solar cell module
Disclosed is a solar cell module that comprises a solar cell including a first electrode and a second electrode on one main surface thereof, a wiring member electrically connected to the solar cell, and a resin adhesive layer bonding the solar cell and the wiring member to each other. Each of the first and second electrodes includes finger parts extending in one direction. The wiring member includes an insulating substrate, and a wiring disposed on the insulating substrate, and electrically connected to the finger parts of the first or second electrode. The resin adhesive layer includes an adhesive layer body made of a resin, and a conductive member disposed in the adhesive layer. A portion of the conductive member digs into at least one of the finger parts and the wiring.
US09911875B2 Solar cell metallization
An interdigitated back contact solar cell is provided. The solar cell comprises a solar cell substrate having a light receiving frontside and a backside comprising base and emitter regions. A first level metal (M1) layer is positioned on the substrate backside contacting the base and emitter regions. A second level metal (M2) layer is connected to the first level metal (M1) layer and comprises a base busbar and an emitter busbar. The first level metal comprises substantially orthogonal interdigitated metallization and substantially parallel interdigitated metallization positioned under and corresponding to the base and emitter busbars on the second level metal (M2). The substantially parallel interdigitated metallization of M1 collects carriers of opposite polarity of the corresponding busbar.
US09911874B2 Alignment free solar cell metallization
A solar cell can include a substrate and a semiconductor region disposed in or above the substrate. The solar cell can also include a contact finger coupled to the semiconductor region via a plurality of weld regions with at least one of the weld regions being a partial weld.
US09911870B2 Solid-state imaging element, method for manufacturing solid-state imaging element, and electronic device
A solid-state imaging element including: a sensor substrate in which a photoelectric conversion section is arranged and formed; a circuit substrate in which a circuit for driving the photoelectric conversion section is formed, the circuit substrate being laminated to the sensor substrate; a sensor side electrode drawn out to a surface of the sensor substrate on a side of the circuit substrate and formed as one of a projection electrode and a depression electrode; and a circuit side electrode drawn out to a surface of the circuit substrate on a side of the sensor substrate, formed as one of the depression electrode and the projection electrode, and joined to the sensor side electrode in a state of the circuit side electrode and the sensor side electrode being fitted together.
US09911864B2 Semiconductor device
Defects in an oxide semiconductor film are reduced in a semiconductor device including the oxide semiconductor film. The electrical characteristics of a semiconductor device including an oxide semiconductor film are improved. The reliability of a semiconductor device including an oxide semiconductor film is improved. A semiconductor device including an oxide semiconductor layer; a metal oxide layer in contact with the oxide semiconductor layer, the metal oxide layer including an In-M oxide (M is Ti, Ga, Y, Zr, La, Ce, Nd, or Hf); and a conductive layer in contact with the metal oxide layer, the conductive layer including copper, aluminum, gold, or silver is provided. In the semiconductor device, y/(x+y) is greater than or equal to 0.75 and less than 1 where the atomic ratio of In to M included in the metal oxide layer is In:M=x:y.
US09911863B2 Thin film transistor and manufacturing method of thin film transistor
According to one embodiment, a manufacturing method of thin film transistor includes forming an oxide semiconductor layer on a first insulating film, forming a first conductive layer formed of molybdenum or a molybdenum alloy on the oxide semiconductor layer, forming a second conductive layer on the first conductive layer, forming a resist mask on the second conductive layer, and forming a first conductive portion and a second conductive portion by performing dry etching of the second conductive layer using the resist mask.
US09911861B2 Semiconductor device, manufacturing method of the same, and electronic device
A semiconductor device in which parasitic capacitance is reduced is provided. A first insulating layer is deposited over a substrate. A first oxide insulating layer and an oxide semiconductor layer are deposited over the first insulating layer. A second oxide insulating layer is deposited over the oxide semiconductor layer and the first insulating layer. A second insulating layer and a first conductive layer are deposited over the second oxide insulating layer. A gate electrode layer, a gate insulating layer, and a third oxide insulating layer are formed by etching. A sidewall insulating layer including a region in contact with a side surface of the gate electrode layer is formed. A second conductive layer is deposited over the gate electrode layer, the sidewall insulating layer, the oxide semiconductor layer, and the first insulating layer. A third conductive layer is deposited over the second conductive layer. A low-resistance region is formed in the oxide semiconductor layer by performing heat treatment. An element contained in the second conductive layer moves from the second conductive layer to the oxide semiconductor layer side by performing the heat treatment. An element contained in the oxide semiconductor layer moves from the oxide semiconductor layer to the third conductive layer side by performing the heat treatment.
US09911859B2 Thin-film transistor and method of manufacturing the same field
According to one embodiment, a thin-film transistor and a method of manufacturing the same achieve size reduction of the thin-film transistor while using an oxide semiconductor layer. The oxide semiconductor layer includes a channel region, a source region, and a drain region. A gate electrode is arranged at a position spaced from the channel region of the oxide semiconductor layer so as to face the channel region. A source electrode is electrically connected to the source region of the oxide semiconductor layer. A drain electrode is electrically connected to the drain region of the oxide semiconductor layer. An undercoat layer adjoins the source region and the drain region of the oxide semiconductor layer. A hydrogen blocking layer has a hydrogen concentration lower than that in the undercoat layer and separates the undercoat layer and the channel region of the oxide semiconductor layer.
US09911858B2 Semiconductor device and method for manufacturing the same
A miniaturized semiconductor device including a transistor in which a channel formation region is formed using an oxide semiconductor film and variation in electric characteristics due to a short-channel effect is suppressed is provided. In addition, a semiconductor device whose on-state current is improved is provided. A semiconductor device is provided with an oxide semiconductor film including a pair of second oxide semiconductor regions which are amorphous regions and a first oxide semiconductor region located between the pair of second oxide semiconductor regions, a gate insulating film, and a gate electrode provided over the first oxide semiconductor region with the gate insulating film interposed therebetween. One or more kinds of elements selected from Group 15 elements such as nitrogen, phosphorus, and arsenic are added to the second oxide semiconductor regions.
US09911849B2 Transistor and method of forming same
A first aspect of the invention provides for a transistor. The transistor may include a gate stack on a substrate; a channel under the gate stack within the substrate; a doped source and a doped drain on opposing sides of the channel, the doped source and the doped drain each including a dopant, wherein the dopant and the channel together have a first coefficient of diffusion and the doped source and the doped drain each have a second coefficient of diffusion; and a doped extension layer substantially separating each of the doped source and the doped drain from the channel, the doped extension layer having a third coefficient of diffusion, wherein the third coefficient of diffusion is greater than the first coefficient of diffusion.
US09911846B2 Semiconductor device having a bandgap wider than that of silicon
An interlayer insulating film is formed on a gate insulating film and a gate electrode, and the interlayer insulating film is opened forming contact holes. Next, the interlayer insulating film and regions exposed by the contact holes are covered by a titanium nitride film, and the titanium nitride film is etched to remain only at portions of the gate insulating film and the interlayer insulating film exposed in the contact holes. The interlayer insulating film and the regions exposed by the contact holes are covered by a nickel film, and after the nickel film directly contacting the interlayer insulating film 8 is removed, the nickel film is heat treated and a nickel silicide layer is formed.
US09911845B2 High voltage LDMOS transistor and methods for manufacturing the same
A semiconductor device is provided. The semiconductor device comprises a substrate, a gate, a first doped region and a second doped region. The gate is over the substrate. The first doped region and the second doped region are in the substrate. The first doped region and the second doped region are of a same conductivity type and separated by the gate. The length of the first doped region is greater than a length of the second doped region in a direction substantially perpendicular to a channel length defined between the first doped region and the second doped region.
US09911838B2 IGBT die structure with auxiliary P well terminal
An IGBT die structure includes an auxiliary P well region. A terminal, that is not connected to any other IGBT terminal, is coupled to the auxiliary P well region. To accelerate IGBT turn on, a current is injected into the terminal during the turn on time. The injected current causes charge carriers to be injected into the N drift layer of the IGBT, thereby reducing turn on time. To accelerate IGBT turn off, charge carriers are removed from the N drift layer by drawing current out of the terminal. To reduce VCE(SAT), current can also be injected into the terminal during IGBT on time. An IGBT assembly involves the IGBT die structure and an associated current injection/extraction circuit. As appropriate, the circuit injects or extracts current from the terminal depending on whether the IGBT is in a turn on time or is in a turn off time.
US09911836B2 Vertical ballast technology for power HBT device
Power amplification devices are disclosed having a vertical ballast configuration to prevent thermal runaway in at least one stack of bipolar transistors formed on a semiconductor substrate. To provide a negative feedback to prevent thermal runaway in the bipolar transistors, a conductive layer is formed over and coupled to the stack. A resistivity of the conductive layer provides an effective resistance that prevents thermal runaway in the bipolar transistors. The vertical placement of the conductive layer allows for vertical heat dissipation and thus provides ballasting without concentrating heat.
US09911834B2 Integrated strained stacked nanosheet FET
Transistors include multiple stress liners. One or more channel structures are suspended at opposite ends from the plurality of stress liners. The stress liners provide a stress on the one or more channel structures. A gate is formed over and around the one or more channel structures, defining a channel region of the one or more channel structures that is covered by the gate. A source and drain region are formed on opposite sides of the gate.
US09911831B2 Spacer formation on semiconductor device
A method for forming a semiconductor device comprising forming a semiconductor fin on a substrate, forming a first sacrificial gate stack over a first channel region of the fin and forming a second sacrificial gate stack over a second channel region of the fin, forming spacers adjacent to the first sacrificial gate stack and the second sacrificial gate stack, depositing a first liner layer on the spacers, the first sacrificial gate stack and the second sacrificial gate stack, depositing a first sacrificial layer on the first liner layer, removing a portion of the first sacrificial layer over the first gate stack to expose a portion of the first liner layer on the first sacrificial gate stack, and growing a first semiconductor material on exposed portions of the fin to form a first source/drain region adjacent to the first gate sacrificial gate stack.
US09911829B2 FinFET with bottom SiGe layer in source/drain
A FinFET includes a substrate, a fin structure on the substrate, a source in the fin structure, a drain in the fin structure, a channel in the fin structure between the source and the drain, a gate dielectric layer over the channel, and a gate over the gate dielectric layer. At least one of the source and the drain includes a bottom SiGe layer.
US09911828B2 Methods of fabricating a semiconductor device
Provided are methods of fabricating a semiconductor device including a field effect transistor. Such methods may include sequentially forming lower and intermediate mold layers on a substrate, forming first upper mold patterns and first spacers on the first and second regions, respectively, of the substrate, etching the intermediate mold layer using the first upper mold patterns and the first spacers as an etch mask to form first and second intermediate mold patterns, respectively, forming second spacers to cover sidewalls of the first and second intermediate mold patterns, etching the lower mold layer using the second spacers as an etch mask to form lower mold patterns, and etching the substrate using the lower mold patterns as an etch mask to form active patterns.
US09911811B2 Method for manufacturing silicon carbide semiconductor device, method for manufacturing semiconductor base, silicon carbide semiconductor device, and device for manufacturing silicon carbide semiconductor device
A method for manufacturing a silicon carbide semiconductor device comprises: a step for forming a front-surface electrode (30) on a front surface side of a silicon carbide wafer (10); a step for thinning the silicon carbide wafer (10) by reducing a thickness of the silicon carbide wafer (10) from a back surface side thereof; a step for providing a metal layer (21) on the back surface of the thinned silicon carbide wafer (10); a step for irradiating the metal layer (21) with laser light, while applying an external force such that the silicon carbide wafer and the metal layer are planarized, to form the carbide layer (20) obtained by a reaction with carbon in the silicon carbide wafer (10), on a back surface side of the metal layer (21); and a step for forming a back-surface electrode (40) on a back surface side of the carbide layer (20).
US09911805B2 Silicon recess etch and epitaxial deposit for shallow trench isolation (STI)
Some embodiments of the present disclosure relate to a method. In this method, a semiconductor substrate, which has an active region disposed in the semiconductor substrate, is received. A shallow trench isolation (STI) structure is formed to laterally surround the active region. An upper surface of the active region bounded by the STI structure is recessed to below an upper surface of the STI structure. The recessed upper surface extends continuously between inner sidewalls of the STI structure and leaves upper portions of the inner sidewalls of the STI structure exposed. A semiconductor layer is epitaxially grown on the recessed surface of the active region between the inner sidewalls of the STI structure. A gate dielectric is formed over the epitaxially-grown semiconductor layer. A conductive gate electrode is formed over the gate dielectric.
US09911797B2 Light emitting display apparatus
There is provided a light emitting display apparatus including at least a light emitting element and a thin film transistor (TFT) for driving the light emitting element, characterized in that a mechanism is provided in which a semiconductor constituting the TFT is irradiated with at least a part of light whose wavelength is longer than a predetermined wavelength among the light emitted by the light emitting element.
US09911796B2 Display device and method of manufacturing a display device
A display device, which includes a plurality of unit pixels, includes a plurality of first electrodes respectively corresponding to the plurality of unit pixels, an insulating layer which includes a plurality of through holes, a light emitting element layer, and a second electrode. Each of the plurality of through holes have inner surfaces including a forwardly tapered surface, which is inclined in a direction of enlarging the apertures toward a light emitting direction, and a reversely tapered surface, which is inclined in a direction of reducing the apertures toward the light emitting direction. The forwardly tapered surface is formed between the unit pixels arranged side by side in the first direction. The reversely tapered surface is formed between the unit pixels arranged side by side in the second direction.
US09911793B2 Foldable display apparatus and method of manufacturing the same
A foldable display apparatus includes a flexible display panel and a case. The flexible display panel includes a protection film, and the case supports the flexible display panel. A folding portion of the protection film includes a curing zone that is hardened more than other areas of the protection film
US09911792B2 Display unit
A display unit includes a plurality of light emitting devices, each of the light emitting devices including a function layer including at least an organic layer is sandwiched between a first electrode and a second electrode, and which have a resonator structure for resonating light by using a space between the first electrode and the second electrode as a resonant section and extracting the light through the second electrode are arranged on a substrate, wherein in the respective light emitting devices, the organic layer is made of an identical layer, and a distance of the resonant section between the first electrode and the second electrode is set to a plurality of different values.
US09911791B2 Display device
In a display device, light emitting areas and colored areas each have a predetermined planar shape having no rotational symmetry so that rotation of the area by an angle greater than or equal to 0° but smaller than 360° does not produce an initial shape of the area and are so arranged as to have different types of rotation angle. The colored areas are grouped based on a set of the colored areas of colors different from one another to forma plurality of full-color pixels. The full-color pixels are so arranged that the rotation angle of the colored areas of the same color have different types. In the full-color pixels of the same type, the colored areas of the same color have the same rotation angle. In the full-color pixels of different types, the colored areas of the same color have different rotation angles.
US09911789B2 1-Selector n-Resistor memristive devices
A 1-Selector n-Resistor memristive device includes a first electrode, a selector, a plurality of memristors, and a plurality of second electrodes. The selector is coupled to the first electrode via a first interface of the selector. Each memristor is coupled to a second interface of the selector via a first interface of each memristor. Each second electrode is coupled to one of the memristors via a second interface of each memristor.
US09911787B2 Semiconductor device and method of forming the same
A semiconductor device includes an active region defining an isolation region. First and second cell interconnection structures are on the active region and the isolation region, and have line shapes that are parallel to each other. An isolation pattern is on the active region and the isolation region. The isolation pattern is between the first and second cell interconnection structures. Contact structures are between the first and second cell interconnection structures. The contact structures are at both sides of the isolation pattern and overlap the active region. Insulating patterns are between the first and second cell interconnection structures. The insulating patterns are at both sides of the isolation pattern and overlap the isolation region. Common source regions are under the first and second cell interconnection structures. The common source regions are in the active region. An isolating gate pattern that has a line shape is under the isolation pattern.
US09911786B2 Semiconductor optoelectronic device with an insulative protection layer and the manufacturing method thereof
The present disclosure is to provide an optoelectronic device. The optoelectronic device comprises a heat dispersion substrate; a first connecting layer on the heat dispersion substrate; a diode stack structure comprising a protection layer and a second connecting layer on the protection layer, wherein the protection layer is on the first connecting layer; a light-emitting structure on the diode stack structure, wherein the light-emitting structure comprises a first conductivity type semiconductor layer, a second conductivity type semiconductor layer, and an active layer between the first conductivity type semiconductor layer and the second conductivity type semiconductor layer; and a first electrode electrically connected to the diode stack structure and the light-emitting structure.
US09911785B2 Method for making a device for detecting electromagnetic radiation comprising a layer of getter material
A method makes an electromagnetic radiation detecting device including at least one thermal detector with an absorbent membrane suspended above a substrate, intended to be located in a sealed cavity. The method includes depositing, on the substrate, a gettering metallic layer including a metallic material with a gettering effect; depositing a carbonaceous sacrificial layer of amorphous carbon on the gettering metallic layer; depositing at least one sacrificial mineral layer on the carbonaceous sacrificial layer; chemical-mechanical planarization of the sacrificial mineral layer; fabricating the thermal detector so that the absorbent membrane is produced on the sacrificial mineral layer; removing the sacrificial mineral layer; and removing the carbonaceous sacrificial layer.
US09911780B1 Backside metal grid and metal pad simplification
An image sensor includes a semiconductor material including a plurality of photodiodes disposed in the semiconductor material. The image sensor also includes a first insulating material disposed proximate to a frontside of the semiconductor material, and an interconnect disposed in the first insulating material proximate to the frontside of the semiconductor material. A metal pad extends from a backside of the semiconductor material through the first insulating material and contacts the interconnect. A metal grid is disposed proximate to the backside of the semiconductor material, and the semiconductor material is disposed between the metal grid and the first insulating material disposed proximate to the frontside.
US09911778B2 Semiconductor device, fabrication method for a semiconductor device and electronic apparatus
Disclosed herein is a semiconductor device, including: a first substrate including a first electrode, and a first insulating film configured from a diffusion preventing material for the first electrode and covering a periphery of the first electrode, the first electrode and the first insulating film cooperating with each other to configure a bonding face; and a second substrate bonded to and provided on the first substrate and including a second electrode joined to the first electrode, and a second insulating film configured from a diffusion preventing material for the second electrode and covering a periphery of the second electrode, the second electrode and the second insulating film cooperating with each other to configure a bonding face to the first substrate.
US09911775B2 Image sensor and method for fabricating the same
An image sensor includes a substrate including a pixel array region and a logic region where a surface of the pixel array region is higher than a surface of the logic region, and a light shielding pattern formed over the substrate of the logic region and having a surface on substantially the same plane as a surface of the substrate.
US09911774B2 Photodiode placement for cross talk suppression
There is provided a photodiode array. The photodiode array includes a substrate that has an optical interface surface arranged for accepting external input radiation into the substrate. A plurality of photodiodes are disposed at a substrate surface opposite the optical interface surface of the substrate. Each photodiode in the plurality of photodiodes includes a photodiode material that generates light into the substrate as a result of external input radiation absorption by the photodiode. There is aperiodic photodiode placement along at least one direction of the array.
US09911773B2 Virtual high dynamic range large-small pixel image sensor
An image sensor includes photodiodes arranged in semiconductor material. Each of the photodiodes is identically sized and is fabricated in the semiconductor material with identical semiconductor processing conditions. The photodiodes are organized into virtual large-small groupings including a first photodiode and a second photodiode. Microlenses are disposed over the semiconductor material with each of microlenses disposed over a respective photodiode. A first microlens is disposed over the first photodiode, and a second microlens is disposed over the second photodiode. A mask is disposed between the first microlens and the first photodiode. The mask includes an opening through which a first portion of incident light directed through the first microlens is directed to the first photodiode. A second portion of the incident light directed through the first microlens is blocked by the mask from reaching the first photodiode. There is no mask between the second microlens and the second photodiode.
US09911772B2 Solid-state imaging device, method of manufacturing solid-state imaging device, and electronic apparatus
A solid-state imaging device according to the present disclosure includes: a semiconductor base; a photoelectric conversion element provided in the semiconductor base; a photoelectric conversion film arranged on a light receiving surface side of the semiconductor base; a contact section to which a signal charge generated in the photoelectric conversion film is read, the contact section being provided in the semiconductor base; a first film member covering the photoelectric conversion element; and a second film member provided on the contact section.
US09911770B2 Graded-semiconductor image sensor
An image sensor includes a semiconductor material having an illuminated surface and a non-illuminated surface. A plurality of photodiodes is disposed in the semiconductor material to receive image light through the illuminated surface. The semiconductor material includes silicon and germanium, and the germanium concentration increases in a direction of the non-illuminated surface. A plurality of isolation regions is disposed between individual photodiodes in the plurality of photodiodes. The plurality of isolation regions surround, at least in part, the individual photodiodes and electrically isolate the individual photodiodes.
US09911768B2 Solid state imaging device and electronic apparatus
The present disclosure relates to a solid state imaging device in which, in phase difference pixels that do not include a light blocking layer for forming a phase difference, the phase difference detection characteristics can be made uniform regardless of the image height. Provided is a solid state imaging device including a pixel array unit in which a plurality of pixels are two-dimensionally arranged in a matrix configuration. Part of the pixels in the pixel array unit include a first photoelectric conversion element and a second photoelectric conversion element configured to receive and photoelectrically convert incident light. A center position of a light receiving characteristic distribution of the first photoelectric conversion element and a center position of a light receiving characteristic distribution of the second photoelectric conversion element are configured so as to be the same between a central portion and a peripheral portion of the pixel array unit.
US09911767B2 Manufacturing method of semiconductor device comprising oxide semiconductor
A semiconductor device using an oxide semiconductor is provided with stable electric characteristics to improve the reliability. In a manufacturing process of a transistor including an oxide semiconductor film, an oxide semiconductor film containing a crystal having a c-axis which is substantially perpendicular to a top surface thereof (also called a first crystalline oxide semiconductor film) is formed; oxygen is added to the oxide semiconductor film to amorphize at least part of the oxide semiconductor film, so that an amorphous oxide semiconductor film containing an excess of oxygen is formed; an aluminum oxide film is formed over the amorphous oxide semiconductor film; and heat treatment is performed thereon to crystallize at least part of the amorphous oxide semiconductor film, so that an oxide semiconductor film containing a crystal having a c-axis which is substantially perpendicular to a top surface thereof (also called a second crystalline oxide semiconductor film) is formed.
US09911764B2 Display apparatus and method of manufacturing the same
A method of manufacturing a display apparatus includes separating a light-emitting diode (“LED”) chip from a base substrate; disposing the separated light-emitting diode chip in a solution; disposing a substrate including a first electrode thereon, in the solution; with the separated light-emitting diode chip and the substrate including the first electrode thereon in the solution, applying a negative voltage to the substrate to attract the separated light-emitting diode chip to the first electrode on the substrate; mounting the light-emitting diode chip attracted to the first electrode, on the first electrode; and removing the substrate with the light-emitting diode chip mounted on the first electrode from the solution and drying the removed substrate, to form the display apparatus.
US09911760B2 Thin film transistor substrate and manufacturing method thereof
A thin film transistor substrate including a second electrode connected to a first electrode within a shared contact hole; and a fourth electrode connected to a third electrode within the shared contact hole, wherein the shared contact hole penetrates through a plurality of stacked insulating layers, and wherein an insulating layer below at least one of a connection portion in which the first electrode and the second electrode are connected and a connection portion in which the third electrode and the fourth electrode are connected has an undercut structure within the shared contact hole.
US09911759B2 Semiconductor device and display device
According to one embodiment, a semiconductor device includes first and second gate electrodes, a semiconductor layer, an output electrode, and an insulating layer. The semiconductor layer includes first source and drain areas, a first channel area facing the first gate electrode, second source and drain areas, and a second channel area facing the second gate electrode. The output electrode outputs voltage produced in the first and second drain areas. In the semiconductor device, the first drain area is in contact with the second drain area. The insulating layer includes a hole portion communicating with one of the first and second drain areas. The output electrode is in contact with one of the first and second drain areas via the hole portion.
US09911755B2 Semiconductor device including transistor and capacitor
A semiconductor device includes a transistor including an insulating film, an oxide semiconductor film, a gate electrode overlapping with the oxide semiconductor film, and a pair of electrodes in contact with the oxide semiconductor film; a capacitor including a first light-transmitting conductive film over the insulating film, a dielectric film over the first light-transmitting conductive film, and a second light-transmitting conductive film over the dielectric film; an oxide insulating film over the pair of electrodes of the transistor; and a nitride insulating film over the oxide insulating film. The dielectric film is the nitride insulating film, the oxide insulating film has a first opening over one of the pair of electrodes, the nitride insulating film has a second opening over the one of the pair of electrodes, and the second opening is on an inner side than the first opening.
US09911748B2 Epitaxial source region for uniform threshold voltage of vertical transistors in 3D memory devices
An alternating stack of insulating layers and sacrificial material layers are formed over a substrate. Memory stack structures are formed through the alternating stack. A backside trench is formed and the sacrificial material layers are replaced with electrically conductive layers. After formation of an insulating spacer in the trench, an epitaxial pedestal structure is grown from a semiconductor portion underlying the backside trench. A source region is formed by introducing dopants into the epitaxial pedestal structure and an underlying semiconductor portion during and/or after epitaxial growth. Alternatively, the backside trench can be formed concurrently with formation of memory openings. An epitaxial pedestal structure can be formed concurrently with formation of epitaxial channel portions at the bottom of each memory opening. After formation and subsequent removal of a dummy trench fill structure in the backside trench, a source region is formed by introducing dopants into the epitaxial pedestal structure.
US09911746B1 Integration of a memory transistor into high-k, metal gate CMOS process flow
Memory cells including embedded SONOS based non-volatile memory (NVM) and MOS transistors are described. The memory cell includes a substrate having a non-volatile memory (NVM) region and a plurality of metal-oxide-semiconductor (MOS) regions. A NVM transistor in the NVM region includes a tunnel dielectric on the substrate, a charge-trapping layer on the tunnel dielectric, and a blocking dielectric comprising a high-k dielectric material over the charge-trapping layer. The plurality of MOS regions include a number of MOS transistors. At least one of the MOS transistors includes a gate dielectric comprising a high-k dielectric material over a surface of the substrate. Generally, the blocking dielectric and the gate dielectric comprise the same high-k dielectric material. Other embodiments are also described.
US09911743B2 Nonvolatile nanotube diodes and nonvolatile nanotube blocks and systems using same and methods of making same
Under one aspect, a method of making a nanotube switch includes: providing a substrate having a first conductive terminal; depositing a multilayer nanotube fabric over the first conductive terminal; and depositing a second conductive terminal over the multilayer nanotube fabric, the nanotube fabric having a thickness, density, and composition selected to prevent direct physical and electrical contact between the first and second conductive terminals. In some embodiments, the first and second conductive terminals and the multilayer nanotube fabric are lithographically patterned so as to each have substantially the same lateral dimensions, e.g., to each have a substantially circular or rectangular lateral shape. In some embodiments, the multilayer nanotube fabric has a thickness from 10 nm to 200 nm, e.g., 10 nm to 50 nm. The structure may include an addressable diode provided under the first conductive terminal or deposited over the second terminal.
US09911740B2 Method, apparatus, and system having super steep retrograde well with engineered dopant profiles
Generally, in one embodiment, the present disclosure is directed to a method for forming a transistor. The method includes: implanting a substrate to form at least one of an n and p doped region; depositing an epitaxial semiconductor layer over the substrate; forming trenches through the epitaxial layer and partially through at least one of an n and p doped region; forming dielectric isolation regions in the trenches; forming a fin in an upper portion of the epitaxial semiconductor layer by partially recessing the dielectric isolation regions; forming a gate dielectric adjacent at least two surfaces of the fin; and diffusing dopant from at least one of the n and p doped regions at least partially into the epitaxial semiconductor layer to form a diffusion doped transition region adjacent a bottom portion of the fin.
US09911738B1 Vertical-transport field-effect transistors with a damascene gate strap
Methods for forming a structure that includes vertical-transport field-effect transistors and structures that include vertical-transport field-effect transistors. A first semiconductor fin is separated from a second semiconductor fin by a gap. A gate stack is conformally deposited that extends across the first semiconductor fin, the second semiconductor fin, and the gap. A section of the gate stack is located in the gap. A gate strap layer is formed in the gap on the section of the gate stack. The gate stack is patterned to form a first gate electrode associated with the first semiconductor fin and a second gate electrode associated with the second semiconductor fin. The gate strap layer masks the section of the gate stack when the gate stack is patterned. The first gate electrode is connected with the second gate electrode by the gate strap layer and the section of the gate stack.
US09911732B2 Vertical metal insulator metal capacitor having a high-k dielectric material
A vertical metal-insulator-metal (MIM) capacitor is formed within multiple layers of a multi-level metal interconnect system of a chip. The vertical MIM capacitor has a first electrode, a second electrode, and a high-k capacitor dielectric material disposed therebetween. The dielectric constant of the capacitor dielectric material is greater than the dielectric constant of interlayer dielectric (ILD) material. After ILD is removed from between the vertically-oriented, interdigitated portions of the first and second electrodes, a capacitor dielectric material having a dielectric constant greater than the MD dielectric material is disposed therebetween.
US09911728B2 Transient voltage suppressor (TVS) with reduced breakdown voltage
A low capacitance transient voltage suppressor with snapback control and a reduced voltage punch-through breakdown mode includes an n+ type substrate, a first epitaxial layer on the substrate, a buried layer formed within the first epitaxial layer, a second epitaxial layer on the first epitaxial layer, and an implant layer formed within the first epitaxial layer below the buried layer. The implant layer extends beyond the buried layer. A set of source regions is formed within a top surface of the second epitaxial layer. Implant regions are formed in the second epitaxial layer, with a first implant region located below the first source region.
US09911724B2 Multi-chip package system and methods of forming the same
In an embodiment, a semiconductor structure includes a multi-chip package system (MCPS). The MCPS includes one or more dies, a molding compound extending along sidewalls of the one or more dies, and a redistribution layer (RDL) over the one or more dies and the molding compound. The semiconductor structure also includes at least one sensor coupled to the RDL, with the RDL interposed between the at least one sensor and the one or more dies. The semiconductor structure further includes a substrate having conductive features on a first side of the substrate. The conductive features are coupled to the RDL. The substrate has a cavity extending from the first side of the substrate to a second side of the substrate opposite the first side, and the at least one sensor is disposed in the cavity.
US09911723B2 Magnetic small footprint inductor array module for on-package voltage regulator
An apparatus comprises an inductor module including: a module substrate including a magnetic dielectric material; a plurality of inductive circuit elements arranged in the module substrate, wherein an inductive circuit element includes conductive traces arranged as a coil including a first coil end, a second coil end and a coil core, wherein the coil core includes the magnetic dielectric material; and a plurality of conductive contact pads electrically coupled to the first and second coil ends. The contact pads electrically coupled to the first coil ends are arranged on a first surface of the inductor module, and the contact pads electrically coupled to the second coil ends are arranged on a second surface of the inductor module.
US09911716B2 Polygon die packaging
A lidded or lidless flip-chip package includes two or more polygon shaped dies. The polygon dies may be interconnected to a substrate or to an interposer interconnected to a substrate. The interposer may be similarly shaped with respect to the polygon die(s). For the lidless or lidded package, the package may include underfill under the polygon dies surrounding associated interconnects. For the lidded package, the package may also include thermal interface materials, seal bands, and a lid. The polygon die package reduces shear stress between the polygon die/interposer and associated underfill as compared to square or rectangular shaped die/interposer of the same area. The polygon dies further maximize the utilization of a wafer from upon which the polygon dies are fabricated. The multi polygon die package may allow for a significant reduction of the polygon die to polygon die relative to the spacing and may reduce signal interconnect time.
US09911712B2 Clip and related methods
A clip for a semiconductor package. Implementations may include: an electrically conductive clip having a first end and a second end and a middle section between the first end and the second end. The first end may be configured to couple to a first die through a bonding material. The second end may be configured to couple to a second die through a bonding material. The middle section may be configured to couple to an emitter structure through a bonding material. The clip may include an integrally formed electrically conductive material and include an M-shape. A middle of the M-shape may be coupled to the emitter structure.
US09911711B2 Structures and methods to enable a full intermetallic interconnect
A method forming an interconnect structure includes depositing a first solder bump on a chip; depositing a second solder bump on a laminate, the second solder bump including a nickel copper colloid surrounded by a nickel or copper shell and suspended in a tin-based solder; aligning the chip with the laminate; performing a first reflow process to join the chip to the laminate; depositing an underfill material around the first solder bump and the second solder bump; and performing a second reflow process at a temperature that is lower than the first reflow process to convert the first solder bump and the second solder bump to an all intermetallic interconnect; wherein depositing the underfill material is performed before or after performing the second reflow process.
US09911710B2 Thermo-compression bonding system, subsystems, and methods of use
Co-planarity adjustment systems and methods, gantries capable of applying high force without imposing moment loads to their bearings, systems and methods for achieving rapid heating and cooling and efficient slidable seal systems capable of sealing a chamber and injecting one or more fluids into the chamber as well as actively recovering portions of such fluid which have migrated into the seal itself are disclosed in the context of thermo-compression bonding systems, apparatuses and methods, although many alternative uses will be apparent to those of skill in the art.
US09911707B2 Structure and method of forming a pad structure having enhanced reliability
An integrated circuit structure includes a substrate, and a first metal layer over the substrate. The integrated circuit structure further includes a second insulating layer over the first metal layer, the second insulating layer having a damascene opening and two via openings. The damascene opening has a first depth. The two via openings have a second depth greater than the first depth. The integrated circuit structure further includes a stress buffer having a flat upper surface extending from a first side of the stress buffer to a second side of the stress buffer, the first side and second side being parallel, the stress buffer having a thickness between the upper surface of the stress buffer and the first metal layer, the thickness being less than the second depth and greater than the first depth. The integrated circuit structure further includes a second metal layer over the stress buffer.
US09911706B2 Semiconductor device
A semiconductor device includes a main pad part and a sub pad part formed in a peripheral area of at least one side of the main pad part. The sub pad part is spaced apart from the main pad part. The sub pad part operates in a first state in which the sub pad part is short-circuited with the main pad part or in a second state in which the sub pad part is open from the main pad part.
US09911702B2 Semiconductor package structure and fabrication method thereof
A semiconductor package structure and a fabrication method thereof are provided. The fabrication method comprises: providing a substrate strip, the substrate strip comprising a plurality of substrate units; disposing a plurality of chips on the plurality of substrate units; disposing a packaging encapsulant on the substrate strip to encapsulate the chips; forming a warp-resistant layer on a top surface of the packaging encapsulant; and dividing the substrate strip to separate the plurality of substrate units to further fabricate a plurality of semiconductor package structures, wherein the warp-resistant layer is formed of a selected material with a selected thickness to make a variation of warpage of the semiconductor package structure at a temperature between 25° C. and 260° C. to be smaller than 560 μm.
US09911701B2 Mark forming method and device manufacturing method
A mark forming method includes: a step of forming, on a device layer of a wafer, an intermediate layer to which a polymer layer containing a block copolymer is adherable, the device layer including a shot area and a scribe line area; a step of removing a portion, of the intermediate layer, formed in the scribe line area; a step of exposing an image of a mark on the scribe line area and forming, based on the image of the mark, a mark including recessed portion; and a step of applying the polymer layer containing the block copolymer on the device layer of the wafer. When a circuit pattern is formed by using the self-assembly of the block copolymer, it is possible to form the mark simultaneously with the formation of the circuit pattern.
US09911696B2 Packaged semiconductor assemblies and methods for manufacturing such assemblies
Packaged semiconductor assemblies including interconnect structures and methods for forming such interconnect structures are disclosed herein. One embodiment of a packaged semiconductor assembly includes a support member having a first bond-site and a die carried by the support member having a second bond-site. An interconnect structure is connected between the first and second bond-sites and includes a wire that is coupled to at least one of the first and second bond-sites. The interconnect structure also includes a third bond-site coupled to the wire between the first and second bond-sites.
US09911694B2 Method of forming high density, high shorting margin, and low capacitance interconnects by alternating recessed trenches
Embodiments of the invention describe low capacitance interconnect structures for semiconductor devices and methods for manufacturing such devices. According to an embodiment of the invention, a low capacitance interconnect structure comprises an interlayer dielectric (ILD). First and second interconnect lines are disposed in the ILD in an alternating pattern. The top surfaces of the first interconnect lines may be recessed below the top surfaces of the second interconnect lines. Increases in the recess of the first interconnect lines decreases the line-to-line capacitance between neighboring interconnects. Further embodiments include utilizing different dielectric materials as etching caps above the first and second interconnect lines. The different materials may have a high selectivity over each other during an etching process. Accordingly, the alignment budget for contacts to individual interconnect lines is increased.
US09911692B2 Conductive structures, systems and devices including conductive structures and related methods
Conductive structures include a plurality of conductive steps and a contact extending at least partially therethrough in communication with at least one of the plurality of conductive steps and insulated from at least another one of the conductive steps. Devices may include such conductive structures. Systems may include a semiconductor device and a stair step conductive structure having a plurality of contacts extending through a step of the stair step conductive structure. Methods of forming conductive structures include forming contacts in contact holes formed through at least one conductive step of a conductive structure. Methods of forming electrical connections in stair step conductive structures include forming contacts in contact holes formed through each step of the stair step conductive structure.
US09911688B2 Semiconductor chip, semiconductor package including the same, and method of fabricating the same
A semiconductor device includes a semiconductor chip substrate with a chip region and a scribe lane region, center and boundary pads respectively provided on the chip and scribe lane regions, a lower insulating structure provided on the chip region and the scribe lane region, a first conductive pattern including a contact portion, a conductive line portion, and a bonding pad portion, and an upper insulating structure defining first and second openings formed on the bonding pad portion and the boundary pad. The lower insulating structure includes a plurality of lower insulating layers, which are sequentially stacked on the substrate, and each of which is a silicon-containing inorganic layer.
US09911685B2 Land structure for semiconductor package and method therefor
In one embodiment, a method for forming a package substrate includes selectively removing portions of a lead frame to form cavities and filling the cavities with a resin layer to define an adhesion pad and a land structure. Top portions of the lead frame are selectively removed to isolate the adhesion pad and the land structure from each other, to expose a top surface of the resin layer, and to form at least one land having a part with a relatively greater size than the size of a respective lower part.
US09911680B2 Bidirectional semiconductor package
Provided is a bidirectional semiconductor package in which the number of processes for manufacturing the bidirectional semiconductor package is reduced. According to present application, a portion between one end and the other end of the buffer wire is in contact with the lower surface of the upper DBC substrate and heat generated by the semiconductor chip is transferred to the upper DBC substrate.
US09911676B2 System and method for gas-phase passivation of a semiconductor surface
Improved methods and systems for passivating a surface of a high-mobility semiconductor and structures and devices formed using the methods are disclosed. The method includes providing a high-mobility semiconductor surface to a chamber of a reactor and exposing the high-mobility semiconductor surface to a gas-phase chalcogen precursor to passivate the high-mobility semiconductor surface.
US09911675B2 Packaged semiconductor devices and methods of packaging semiconductor devices
Packaged semiconductor devices and methods of packaging semiconductor devices are disclosed. In some embodiments, a packaged semiconductor device includes an integrated circuit die, a molding compound disposed around the integrated circuit die, and an interconnect structure disposed over the integrated circuit die and the molding compound. The molding compound is thicker than the integrated circuit die.
US09911673B2 Semiconductor device with bond pad wiring lead-out arrangement avoiding bond pad probe mark area
Provided is a semiconductor device having a pad on a semiconductor chip, a first passivation film formed over the semiconductor chip and having an opening portion on the pad of a probe region and a coupling region, a second passivation film formed over the pad and the first passivation film and having an opening portion on the pad of the coupling region, and a rewiring layer formed over the coupling region and the second passivation film and electrically coupled to the pad. The pad of the probe region placed on the periphery side of the semiconductor chip relative to the coupling region has a probe mark and the rewiring layer extends from the coupling region to the center side of the semiconductor chip. The present invention provides a technology capable of achieving size reduction, particularly pitch narrowing, of a semiconductor device.
US09911668B1 Integrated circuit including NCEM-enabled, corner gap-configured fill cells, with NCEM pads formed from at least three conductive stripes positioned between adjacent gates
An integrated circuit, in the form of a wafer, die, or chip, includes multiple standard cell-compatible fill cells, configured to enable non-contact electrical measurements. Such fill cells include mesh pads that contain at least three conductive stripes disposed between adjacent gate stripes. Such fill cells further include geometry to enable non-contact evaluation of corner shorts and/or leakages.
US09911662B2 Forming a CMOS with dual strained channels
The present invention relates generally to a semiconductor device, and more particularly, to a structure and method of forming a compressive strained layer and a tensile strained layer on the same wafer. A lower epitaxial layer may be formed adjacent to a tensile strained layer. An upper epitaxial layer may be formed over a portion of the lower epitaxial layer. Thermal oxidation may convert the upper epitaxial layer to an upper oxide layer, and thermal condensation may causes a portion of the lower epitaxial layer to become a compressive strained layer. The upper oxide layer and a remaining portion of the lower epitaxial layer may be removed, leaving the tensile strained layer and the compressive strained layer.
US09911659B2 Semiconductor devices and methods of fabricating the same
Semiconductor devices and methods of fabricating the same are provided. The semiconductor devices may include gate electrodes on a substrate. A longitudinal direction of each of the gate electrodes may extend in a first direction, and ones of the gate electrodes may be arranged in the first direction. The semiconductor devices may also include first and second gate spacers extending in the first direction and on respective sidewalls of the ones of the gate electrodes. The first and second gate spacers may be spaced apart from each other in a second direction that is different from the first direction. The semiconductor devices may further include gate separation patterns, and ones of the gate separation patterns may be between two among the ones of the gate electrodes adjacent to each other in the first direction and between the first and second gate spacers.
US09911658B2 Methods for forming a semiconductor arrangement with multiple-height fins and substrate trenches
Among other things, one or semiconductor arrangements, and techniques for forming such semiconductor arrangements are provided. An etch sequence is performed to form a first etched region over a planar region of a semiconductor arrangement. The first etched region exposes a planar structure, such as an alignment mark used for alignment during semiconductor fabrication. The etch sequence forms a second etched region over a semiconductor fin region of the semiconductor arrangement. In an embodiment, the etch sequence forms a first trench, a first fin nub and a first pillar in the semiconductor fin region, where the first trench is formed in a semiconductor substrate of the semiconductor fin region. A multi-depth STI structure is formed over at least one of the first trench, the first fin nub, or the first pillar.
US09911647B2 Self aligned conductive lines
A method for forming conductive lines on a wafer comprises forming a first hardmask, a planarizing layer, a second hardmask, a layer of sacrificial mandrel material on the second hardmask, and patterning a mask on the layer of sacrificial material. A first sacrificial mandrel and a second sacrificial mandrel and a gap are formed. A layer of spacer material is deposited in the gap. Portions of the first sacrificial mandrel and the second sacrificial mandrel are removed, and exposed portions of the second hardmask, the planarizing layer and the first hardmask are removed to expose portions of the insulator layer. The second hardmask, the spacers, and the planarizing layer are removed. Exposed portions of the insulator layer are removed to form a trench in the insulator layer, and the trench is filled with a conductive material.
US09911646B2 Self-aligned double spacer patterning process
Embodiments of the present disclosure are a method of forming a semiconductor device and methods of patterning a semiconductor device. An embodiment is a method of forming a semiconductor device, the method including forming a first hard mask layer over a semiconductor device layer, forming a set of mandrels over the first hard mask layer, and forming a first spacer layer over the set of mandrels and the first hard mask layer. The method further includes forming a second spacer layer over the first spacer layer, patterning the first spacer layer and the second spacer layer to form a mask pattern, and patterning the first hard mask layer using the mask pattern as a mask.
US09911645B2 Method for forming fin field effect transistor (FinFET) device structure with interconnect structure
A method includes a first metal layer formed over a substrate and a dielectric layer formed over the first metal layer. The method includes an adhesion layer formed in the dielectric layer and over the first metal layer, and the adhesion layer is a discontinuous layer. The method includes a second metal layer formed in the dielectric layer, and the adhesion layer is formed between the second metal layer and the dielectric layer. The second metal layer includes a via portion and a trench portion over the via portion, and the trench portion is wider than the via portion.
US09911643B2 Semiconductor constructions and methods of forming intersecting lines of material
Some embodiments include semiconductor constructions having first and second electrically conductive lines that intersect with one another at an intersection. The first line has primarily a first width, and has narrowed regions directly against the second line and on opposing sides of the second line from one another. Electrically conductive contacts are along the first line and directly electrically coupled to the first line, and one of the electrically conductive contacts is directly against the intersection. Some embodiments include methods of forming intersecting lines of material. First and second trenches are formed, and intersect with one another at an intersection. The first trench has primarily a first width, and has narrowed regions directly against the second trench and on opposing sides of the second trench from one another. Material is deposited within the first and second trenches to substantially entirely fill the first and second trenches.
US09911641B2 Process for manufacturing a semiconductor substrate, and semiconductor substrate obtained
The invention relates to a process for manufacturing a semiconductor substrate, characterized in that it comprises providing at least one donor semiconductor substrate comprising at least one useful silicon layer; inspecting the donor substrate via an inspecting machine in order to detect whether the useful layer contains emerging cavities of a size larger than or equal to a critical size, said critical size being strictly smaller than 44 nm; and manufacturing a semiconductor substrate comprising at least part of the useful layer of the donor substrate if, considering cavities of a size larger than or equal to the critical size, the density or number of cavities in the useful layer of the donor substrate is lower than or equal to a critical defect density or number.
US09911640B2 Universal gripping and suction chuck
Proposed is a universal gripping and suction chuck for use as an interchangeable end effector of a robot arm of a robotic station capable of picking up, transporting, and handling objects having colors and outlines. The chuck housing contains elements of a vacuum system for holding the object by vacuum suction force, a vortex system for holding the objects in a non-contact manner in a state of levitation, and a mechanical edge gripper. The vacuum system, the vortex system, and the mechanical edge gripper can be selectively activated by commands from the central processing system that receives a signal recognition signal, object presence/absence signal and/or object approaching signal from respective sensors and depending on the type of the object recognized by the respective sensor. As a result, the chuck can pick up and handle such different objects as solid semiconductor wafer, paper or fabric interleaves, or small-diameter rings.
US09911638B2 Plasma processing apparatus and plasma processing method
A plasma processing apparatus includes: a reaction chamber; a plasma generation unit; a stage disposed inside the reaction chamber; an electrostatic chuck mechanism including an electrode portion disposed inside the stage; a support portion which supports the conveyance carrier; and an elevation mechanism which elevates and lowers the support portion relative to the stage. In a case in which the conveyance carrier is mounted on the stage, the electrostatic chuck mechanism performs an operation of applying a voltage to the electrode portion after contact of an outer circumferential portion of a holding sheet of the conveyance carrier to the stage, the operation including a voltage varying operation of increasing and decreasing an absolute value of the voltage, and the plasma generation unit generates plasma after completion of the voltage varying operation.
US09911632B2 Multiple part decoration system and method
According to an aspect herein, there is provided a method of decorating multiple parts, the method includes: loading a plurality of parts onto a pallet; registering location of each of the plurality of parts in relation to the pallet; registering location of each of the plurality of parts with each of a plurality of templates; decorating the plurality of parts using the plurality of templates; and inspecting the decorated parts to monitor for defects. According to another aspect herein, there is provided a method of decorating a part, the method includes: positioning a part for decoration; starting a decoration process for the part; and adjusting one or more parameters of the decoration process during the decoration process based on predetermined characteristics of the part or the decoration to provide for enhanced print coverage or quality.
US09911631B2 Processing system and method for providing a heated etching solution
Embodiments of the invention provide a processing system and a method for processing with a heated etching solution. In one example, tight control over temperature and hydration level of an acidic etching solution is provided. According to one embodiment, the method includes forming the heated etching solution in a first circulation loop, providing the heated etching solution in the process chamber for treating a substrate, forming an additional heated etching solution in a second circulation loop, and supplying the additional heated etching solution to the first circulation loop. According to one embodiment, the processing system includes a process chamber for treating the substrate with the heated etching solution, a first circulation loop for providing the heated etching solution into the process chamber, and a second circulation loop for forming an additional heated etching solution and supplying the additional heated etching solution to the first circulation loop.
US09911626B2 Interposer substrate and method for fabricating the same
A method of fabricating an interposer substrate provides a carrier having a first wiring layer. The first wiring layer has a plurality of first conductive pillars. A first insulating layer is formed on the carrier. The first conductive pillars are exposed from the first insulating layer. External connection pillars are formed above the first conductive pillars and electrically connected to the first conductive pillars. Then the carrier is removed. The process of fabricating the via can be bypassed in the process by forming a coreless interposer substrate on the carrier, such that the overall cost of the process can be decreased, and the process is simple. The interposer substrate is also provided.
US09911624B2 Method for dissolving a silicon dioxide layer
This disclosure relates to a method for dissolving a silicon dioxide layer in a structure, including, from the back surface thereof to the front surface thereof, a supporting substrate, the silicon dioxide layer and a semiconductor layer, the dissolution method being implemented in a furnace in which structures are supported on a support, the dissolution method resulting in the diffusion of oxygen atoms included in the silicon dioxide layer through the semiconductor layer and generating volatile products, and the furnace including traps suitable for reacting with the volatile products, so as to reduce the concentration gradient of the volatile products parallel to the front surface of at least one structure.
US09911623B2 Via connection to a partially filled trench
A method includes forming a trench that is partially filled with a first metal material, the trench being formed within a first Interlayer Dielectric (ILD) layer, filling a remaining portion of the trench with a sacrificial material, depositing a buffer layer on the first ILD layer, patterning the buffer layer to form a hole within the buffer layer to expose the sacrificial material, and removing the sacrificial material.
US09911621B2 Method for processing target object
This method for processing a target object includes steps ST1 to ST4. The target object has an organic polymer layer and a resist mask on a substrate. In step ST1, the target object is electrostatically attached to an electrostatic chuck in a plasma processing apparatus. In step ST2, the organic polymer layer is etched through the resist mask by means of a plasma of a first gas. In step ST3, the target object is detached from the electrostatic chuck while a plasma of a second gas is generated. In step 4, the resist mask is peeled off. The second gas is either oxygen gas or a mixture of oxygen gas and a rare gas having an atomic weight lower than that of argon gas.
US09911619B1 Fin cut with alternating two color fin hardmask
Methods for a lithographic process used to pattern fins for fin-type field-effect transistors (FinFETs). A first plurality of hardmask sections may be formed, and sacrificial spacers may be formed on vertical sidewalls of the first plurality of hardmask sections. Each of the first plurality of hardmask sections is comprised of a first material. Gaps between the sacrificial spacers are filled with a second material, which is selected to etch selectively to the first material, in order to define a second plurality of hardmask sections each comprised of the second material.
US09911618B2 Low temperature poly-silicon thin film transistor, fabricating method thereof, array substrate and display device
Embodiments of the present invention disclose a low temperature poly-silicon thin film transistor and a method of fabricating the same, an array substrate, and a display device. The low temperature poly-silicon thin film transistor comprises an active layer, a source and a drain, wherein the active layer comprises a source contact region, a drain contact region, and a channel region located between the source contact region and the drain contact region, the source is provided above and connected to the source contact region, the drain being provided above and connected to the drain contact region, and thicknesses of the source contact region and the drain contact region are both larger than that of the channel region.
US09911613B2 Method of fabricating a charge-trapping gate stack using a CMOS process flow
A method of fabricating a memory device is described. Generally, the method includes forming a channel from a semiconducting material overlying a surface of a substrate, and forming dielectric stack on the channel. A first cap layer is formed over the dielectric stack, and a second cap layer including a nitride formed over the first cap layer. The first and second cap layers and the dielectric stack are then patterned to form a gate stack of a device. The second cap layer is removed and an oxidation process performed to form a blocking oxide over the dielectric stack, wherein the oxidation process consumes the first cap layer. Other embodiments are also described.
US09911611B2 Method of forming openings in a material layer
A method of fabricating a semiconductor device includes forming a hard mask (HM) mandrel along a first direction over a material layer, forming a first spacer along a sidewall of the HM mandrel, forming a second spacer along a sidewall of the first spacer and forming a patterned photoresist layer having a first line opening over the HM mandrel, the first spacer and the second spacer. First portions of the HM mandrel, the first spacer and the second spacer are exposed within the first line opening. The method also includes removing the first portion of the first spacer through the first line opening to expose a first portion of the material layer and etching the exposed first portion of the material layer to form a first opening in the material layer by using the exposed first portions of the HM mandrel and the second spacer as a sub-etch-mask.
US09911605B2 Methods of forming fine patterns
A method of forming fine patterns includes forming pillars arrayed in rows and columns on an underlying layer and forming a spacer layer on the underlying layer to cover the pillars. Portions of the spacer layer respectively covering the pillars arrayed in each row or in each column are in contact with each other to provide first interstitial spaces disposed between the pillars arrayed in a diagonal direction between a row direction and a column direction as well as to provide cleavages at corners of each of the first interstitial spaces in a plan view. A healing layer is formed on the spacer layer to fill the cleavages of the first interstitial spaces. The healing layer is formed to provide second interstitial spaces respectively located in the first interstitial spaces as well as to include a polymer material.
US09911601B2 Epitaxial silicon germanium fin formation using sacrificial silicon fin templates
A method of forming semiconductor fins includes forming a plurality of sacrificial template fins from a first semiconductor material; epitaxially growing fins of a second semiconductor material on exposed sidewall surfaces of the sacrificial template fins; and removing the plurality of sacrificial template fins.
US09911600B2 Fabrication of semiconductor device using alternating high and low temperature layers
A method for fabricating a III-nitride semiconductor body that includes high temperature and low temperature growth steps.
US09911598B2 Symmetric tunnel field effect transistor
The present disclosure relates to semiconductor structures and, more particularly, to a symmetric tunnel field effect transistor and methods of manufacture. The structure includes a gate structure including a source region and a drain region both of which comprise a doped VO2 region.
US09911596B2 Modification processing method and method of manufacturing semiconductor device
A modification processing method includes preparing a substrate having a silicon layer on which a damage layer is formed through plasma processing. The method further includes removing the damage layer formed on the silicon layer by processing the substrate with a first process gas containing a fluorine gas.
US09911595B1 Selective growth of silicon nitride
Methods and apparatuses for selectively depositing silicon nitride on silicon surfaces relative to silicon oxide surfaces and selectively depositing silicon nitride on silicon oxide surfaces relative to silicon surfaces are provided herein. Methods involve exposing the substrate to an alkene which is selectively reactive with the silicon surface to block the silicon surface by forming an organic moiety on the silicon surface prior to depositing silicon nitride selectively on silicon oxide surfaces using thermal atomic layer deposition. Methods involve exposing the substrate to an alkylsilylhalide which is selectively reactive with the silicon oxide surface to block the silicon oxide surface by forming an organic moiety on the silicon oxide surface prior to depositing silicon nitride selectively on silicon surfaces using thermal atomic layer deposition.
US09911594B2 Selective atomic layer deposition process utilizing patterned self assembled monolayers for 3D structure semiconductor applications
Methods for forming fin structure with desired materials formed on different locations of the fin structure using a selective deposition process for three dimensional (3D) stacking of fin field effect transistor (FinFET) for semiconductor chips are provided. In one embodiment, a method of forming a structure with desired materials on a substrate includes forming a patterned self-assembled monolayer on a circumference of a structure formed on a substrate, wherein the patterned self-assembled monolayer includes a treated layer formed among a self-assembled monolayer, and performing an atomic layer deposition process to form a material layer predominantly on the self-assembled monolayer from the patterned self-assembled monolayer.
US09911592B2 Method for making nanosheet CMOS device integrating atomic layer deposition process and replacement gate structure
A semiconductor device including a gate structure present on at least two suspended channel structures, and a composite spacer present on sidewalls of the gate structure. The composite spacer may include a cladding spacer present along a cap portion of the gate structure, and an inner spacer along the channel portion of the gate structure between adjacent channel semiconductor layers of the suspended channel structures. The inner spacer may include a crescent shape with a substantially central seam.
US09911589B2 Induction RF fluorescent lamp with processor-based external dimmer load control
A processor controlled induction RF fluorescent lamp, where the control processor runs a load control algorithm at least for switching the electrical load for connection to an external dimming device, the lamp comprising a vitreous envelope filled with an ionizable gas mixture; a power coupler comprising at least one winding of an electrical conductor; and an electronic ballast providing appropriate voltage and current to the power coupler.
US09911583B1 Apparatus for enhanced physical vapor deposition
An apparatus has a primary cathode configured for free space interaction with a substrate operative as an anode. A first annular cathode faces a second annular cathode. The primary cathode, the first annular cathode, the second annular cathode are axially aligned. The outer diameters of the first annular cathode and the second annular cathode correspond to the outer diameter of the primary cathode. The primary cathode provisions deposited material on the substrate with controllable plasma density to levels above 1×1018 m−3, with ignition capability above 0.05 Pa.
US09911582B2 Methods and apparatus for controlling photoresist line width roughness with enhanced electron spin control
The present disclosure provides methods and an apparatus for controlling and modifying line width roughness (LWR) of a photoresist layer with enhanced electron spinning control. In one embodiment, an apparatus for controlling a line width roughness of a photoresist layer disposed on a substrate includes a processing chamber having a chamber body having a top wall, side wall and a bottom wall defining an interior processing region, a support pedestal disposed in the interior processing region of the processing chamber, and a plasma generator source disposed in the processing chamber operable to provide predominantly an electron beam source to the interior processing region.
US09911577B2 Arrangement for plasma processing system control based on RF voltage
An arrangement for controlling a plasma processing system is provided. The arrangement includes an RF sensing mechanism for obtaining an RF voltage signal. The arrangement also includes a voltage probe coupled to the RF sensing mechanism to facilitate acquisition of the signal while reducing perturbation of RF power driving a plasma in the plasma processing system. The arrangement further includes a signal processing arrangement configured for receiving the signal, split the voltage signals into a plurality of channels, convert the signals into a plurality of direct current (DC) signals, convert the DC signals into digital signals and process the digital signal in a digital domain to generate a transfer function output. The arrangement moreover includes an ESC power supply subsystem configured to receive the transfer function output as a feedback signal to control the plasma processing system.
US09911571B2 High voltage electron beam system and method
A high voltage inspection system that includes a vacuum chamber; electron optics that is configured to direct an electron beam towards an upper surface of a substrate; a substrate support module that comprises a chuck and a housing; wherein the chuck is configured to support a substrate; wherein the housing is configured to surround the substrate without masking the electron beam, when the substrate is positioned on the chuck during a first operational mode of the high voltage inspection system; and wherein the substrate, the chuck and the housing are configured to (a) receive a high voltage bias signal of a high voltage level that exceeds ten thousand volts, and (b) to maintain at substantially the high voltage level during the first operational mode of the high voltage inspection system.
US09911569B2 X-ray tube anode arrangement
A method of manufacturing an X-ray tube component, includes diffusion bonding or brazing an anode of rhodium, molybdenum or tungsten to a heat spreader of molybdenum, tungsten, or a composite of molybdenum and/or tungsten. Suitable joint materials for diffusion bonding include gold; suitable joint materials for brazing include an alloy of silver and copper, an alloy of silver, copper and palladium, an alloy of gold and copper or an alloy of gold, copper and nickel. The resulting tube component delivers reliable behaviors and the joint can withstand high temperatures, high temperature gradients, fast temperature changes, extremely high radiation and extremely high electric field, while maintaining good high vacuum properties.
US09911568B2 Metal-jet X-ray tube
A metal jet x-ray tube is proposed, that is affected less than conventional tubes by the problem of the power density at the point of incidence of the electron beam on the anode component. To this end, the metal jet x-ray tube provides a metal jet as an anode component that is so thin that this metal jet only partly decelerates an electron beam incident thereon. Moreover, the metal jet of the anode component is at least embedded or dissolved in a single second material that passes electrons relatively well and is heat absorbing.
US09911562B2 Thomson coil based actuator
An actuator for a mechanical switch, a mechanical switch, a circuit breaker and a high voltage power transmission system including such an actuator are disclosed. The actuator includes at least one armature and a first primary coil with turns wound around a central coil axis, where the armature is movable along the central coil axis and there is a magnetic flux concentrator provided at least around the first primary coil.
US09911561B2 Solenoid current control with fault detection, override, and shutdown features
A DC solenoid coil current controller includes a rectifier, pulse width modulator, and power driver. The rectifier inputs an alternating current signal and a direct current signal, and outputs a rectified signal using at least one of the alternating current signal and the direct current signal. The pulse width modulator outputs a pulse width modulated signal in response to the rectified signal. The power driver controls a DC solenoid coil using the pulse width modulated signal, thereby enabling a direct current DC solenoid coil to be controlled in response to the alternating current signal. A method of controlling current to a DC solenoid coil is also disclosed.
US09911548B2 Electric switching apparatus
An electric switching apparatus including fixed contacts respectively supported by an upstream support and a downstream support and electrically connected to an upstream power line and to a downstream power line, respectively, the fixed contacts cooperating with respective upstream and downstream mobile contacts, each of the mobile contacts being supported by a support, the supports movable simultaneously in translation by a contact carrier controlled by an actuator. This apparatus includes a device for transforming, during a device opening operation in the presence of a microweld between one of the mobile contacts and the associated fixed contact, the movement in translation of the support associated with the mobile contact in a combined movement in translation and rotation of the mobile contact so as to exert at the points of contact between the mobile contact and the fixed contact a shear force capable of breaking the aforementioned microweld.
US09911545B2 Phenolic resin sourced carbon anode in a lithium ion capacitor
An anode in a lithium ion capacitor, including: a carbon composition comprising: a phenolic resin sourced carbon, a conductive carbon, and a binder as defined herein; and an electrically conductive substrate supporting the carbon composition, wherein the phenolic resin sourced carbon has a disorder by Raman analysis as defined herein; and a hydrogen content; a nitrogen content; an and oxygen content as defined herein. Also disclosed is a method of making the anode, a method of making the lithium ion capacitor, and methods of use thereof.
US09911543B2 Capacitor
Provided herein is a capacitor in which an electrolyte is infiltrated into a wound electrode group faster than conventionally. A negative current collecting member 9 has one slit 57 formed to extend across a protruded portion 49 and a negative current collecting member body (first welding portion) 53 and to penetrate the protruded portion 49 and the negative current collecting member body 53 in a thickness direction. The slit 57 passes through the center of the protruded portion 49, and extends entirely across the protruded portion 49 such that both ends of the slit 57 reach the negative current collecting member body 53.
US09911535B2 Electronic device
An electronic device includes a chip component and an external terminal. The external terminal includes a terminal electrode connection part, a mounting connection part, and a support part. The terminal electrode connection part is arranged to face an end surface electrode part of a terminal electrode of the chip component. The mounting connection part is connectable to a mounting surface. The support part faces one side surface of an element body of the chip component closest to the mounting surface so as to support the one side surface spaced from the mounting surface. A bonding region and a non-bonding region are formed between the terminal electrode connection part of the external terminal and the end surface electrode part of the terminal electrode. The non-bonding region is formed from the terminal electrode connection part to the support part.
US09911533B2 Capacitor with pressure interrupter
A capacitor is provided with a case having a receptacle with an expandable section that allows the receptacle to extend axially when internal pressure builds within the case as a result of a fault. Terminals are mounted on the cover and electrically connected to the electrodes of a capacitor element through an interrupter plate, via leads. The plate is attached to the section of the case that extends under pressure, whereby the plate is drawn away from the cover, thereby breaking the electrical connections to the terminal. The plate may also work in conjunction with a cover that expands outward in response to internal pressure, to provide a second pressure interrupter mechanism.
US09911531B2 Common mode filter and method of manufacturing the same
A common mode filter includes a substrate; an insulating layer disposed on the substrate and including coil patterns, the insulating layer having a cavity disposed in a central portion therein; and a magnetic particle-resin composite layer including a core part filling the cavity and a cover part covering the insulating layer. The core part contains fine magnetic particles having an average particle diameter of 30 μm or less, and the cover part contains the fine magnetic particles having the average particle diameter of 30 μm or less and coarse magnetic particles having an average particle diameter greater than that of the fine magnetic particles.
US09911528B2 Wind turbine transformer
A transformer assembly for a wind turbine is described. The transformer assembly includes a liquid-filled main transformer and an auxiliary transformer connected on the high-voltage side of the main transformer. The auxiliary transformer benefits from improved power quality in this configuration.
US09911527B2 Electromagnetic safety device
A safety system includes an electromagnet positioned in an area. A power controller is coupled to the electromagnet to supply power to the electromagnet in accordance with an event. A trigger mechanism configured to trigger the event when the area is traversed by a person with a weapon such that upon activation of the electromagnet a magnetic force is generated capable of attracting the weapon to make continued use difficult or impossible within the area.
US09911525B2 Wiring assembly and method of forming a channel in a wiring assembly for receiving conductor and providing separate regions of conductor contact with the channel
A conductor assembly and method for constructing an assembly of the type which, when conducting current, generates a magnetic field or which, in the presence of a changing magnetic field, induces a voltage. In one embodiment the method provides a first insulative layer tubular in shape and including a surface along which a conductor segment may be positioned. A channel formed in the surface of the insulative layer defines a first conductor path and includes a surface of first contour in cross section along a first plane transverse to the conductor path. A segment of conductor having a surface of second contour in cross section is positioned at least partly in the channel and extends along the conductor path. Along the first plane, contact between the conductor surface of second contour and the channel surface of first contour includes at least two separate regions of contact.
US09911523B2 Grounding body forming method
A method and system for forming ground electrodes are provided, the method includes: metal conductors are laid in grooves that are dug out on a ground surface; conductive solution is prepared, with the conductive solution consisting of 0.1%-0.5% of amylocellulose, 15%-24.9% of high conductivity carbon powders, 15%-24.9% of gel material, and 60%-70% of water, by weight percentage; and the conductive solution is poured into the grooves, wherein the conductive solution forms conductive gel after solidifying, which wraps up a part of the metal conductor contained in the groove. The system for forming grounding electrodes includes: an excavating equipment, a setup equipment, a solution preparation equipment and a pouring and molding equipment. The method and system for forming ground electrodes can make the discharging effect of lightning currents better.
US09911518B2 Cathode active material for lithium-ion battery, cathode for lithium-ion battery and lithium-ion battery
A cathode active material for lithium-ion battery is provided, which provides good battery characteristics such as cycle characteristics. The cathode active material for lithium-ion battery is expressed by the composition formula: LixNi1-yMyOα, wherein M is one or more selected from Ti, Cr, Mn, Fe, Co, Cu, Al, Sn, Mg and Zr; 0.9≦x≦1.2; 0
US09911515B2 Leidenpump
A non-mechanical fluid transfer device is disclosed herein. The device can include at least one tubular body configured to deliver a fluid, the tubular body having an interior surface, an exterior surface, a proximal end, and a distal end. Additionally, the device can include a series of ratchets disposed along an interior surface of the tubular body such that the fluid moves from the proximal end of the tubular body to the distal end of the tubular body when the interior surface of the tubular body is heated to a temperature at or above the Leidenfrost point of the fluid. Additional aspects are described herein.
US09911514B2 Nuclear reactor cavity floor passive heat removal system
A nuclear reactor includes a reactor core disposed in a reactor pressure vessel. A radiological containment contains the nuclear reactor and includes a concrete floor located underneath the nuclear reactor. An ex vessel corium retention system includes flow channels embedded in the concrete floor located underneath the nuclear reactor, an inlet in fluid communication with first ends of the flow channels, and an outlet in fluid communication with second ends of the flow channels. In some embodiments the inlet is in fluid communication with the interior of the radiological containment at a first elevation and the outlet is in fluid communication with the interior of the radiological containment at a second elevation higher than the first elevation. The radiological containment may include a reactor cavity containing a lower portion of the pressure vessel, wherein the concrete floor located underneath the nuclear reactor is the reactor cavity floor.
US09911512B2 CRDM internal electrical connector
An internal control rod drive mechanism (CRDM) including an electric motor is disposed in a nuclear reactor and further includes a support surface with sealed electrical connectors electrically connected with the electric motor power the motor. The internal CRDM is disposed on a support element secured inside the nuclear reactor. The support element includes sealed electrical connectors mating with the sealed electrical connectors on the support surface of the internal CRDM to power the electric motor. The sealed electrical connectors may be sealed glass, ceramic, or glass-ceramic connectors welded onto the ends of the MI cables extending from the motor. Springs, are disposed between the mating sealed electrical connectors of the support element and the support surface. A purge line is integrated with each mated connection.
US09911509B2 Counter to locate faulty die in a distributed codeword storage system
Methods and apparatus related to utilization of counter(s) for locating faulty die in a distributed codeword storage system are described. In one embodiment, first logic determines a plurality of values. Each of the plurality of values corresponds to a number of zeros or a number of ones in bits read from a portion of each of a plurality of memory dies. Second logic determines one or more candidates as a faulty die amongst the plurality of memory dies based at least in part on a comparison of the plurality of values for the plurality of memory dies. Other embodiments are also disclosed and claimed.
US09911507B2 Semiconductor device, semiconductor system including the same and test method thereof
A semiconductor device includes a memory region suitable for providing a plurality of read data in parallel at every read operation cycle, an output path suitable for outputting the plurality of read data at a set time in response to an internal clock and one or more internal control signals at the every read operation cycle, and an output path control unit suitable for generating the internal control signal in response to a read command and generating the internal clock in response to a system clock, wherein a shifting time of a first edge of the internal clock is adjusted by a set level at the every read operation cycle during a test mode.
US09911503B2 Shift register unit, gate drive circuit, and display device
The present application provides a shift register unit as well as a gate drive circuit and a display device using it. The shift register unit comprises an input module, an NAND gate module, an inverter module, a pull-up module and a pull-down module. The input module receives an input signal and a first clock signal, and transfers the input signal to a first input end of the NAND gate module and the pull-down module under the control of the first clock signal. A second input end of the NAND gate module receives a second clock signal input, and an output end thereof connects the inverter module. An output end of the inverter module connects the pull-up module. The pull-up module pulls up the output signal to a high level based on the output of the inverter module. The pull-down module pulls down the output signal to a low level under the control of the received input signal and the second clock signal. By arranging the inverter module, it can be ensured that no floating point exists at the gate of the output transistor so that it is not affected by leak point, thereby maintaining stable signal output and improving stable output ability of the shift register.
US09911502B2 Data storage device with nonvolatile memory
According to one embodiment, a data storage device includes a controller driven by a first power supply voltage, a nonvolatile memory controlled by the controller and driven by a second power supply voltage, and a switch element determining whether the second power supply voltage is applied to the nonvolatile memory. The controller is configured to turn off the switch element in a first mode and turn on the switch element in a second mode.
US09911497B1 Three-dimensional vertical NOR flash thin-film transistor strings
A memory structure, includes (a) active columns of polysilicon formed above a semiconductor substrate, each active column extending vertically from the substrate and including a first heavily doped region, a second heavily doped region, and one or more lightly doped regions each adjacent both the first and second heavily doped region, wherein the active columns are arranged in a two-dimensional array extending in second and third directions parallel to the planar surface of the semiconductor substrate; (b) charge-trapping material provided over one or more surfaces of each active column; and (c) conductors each extending lengthwise along the third direction. The active columns, the charge-trapping material and the conductors together form a plurality of thin film transistors, with each thin film transistor formed by one of the conductors, a portion of the lightly doped region of an active column, the charge-trapping material between the portion of the lightly doped region and the conductor, and the first and second heavily doped regions. The thin film transistors associated with each active column are organized into one or more vertical NOR strings.
US09911492B2 Writing multiple levels in a phase change memory using a write reference voltage that incrementally ramps over a write period
Structures and methods for a multi-bit phase change memory are disclosed herein. A method includes establishing a write-reference voltage that incrementally ramps over a write period. The increments of the write-reference voltage correspond to discrete resistance states of a storage cell of the multi-bit phase change memory.
US09911490B2 Memory controllers
A memory controller includes a voltage control module that operates to isolate a target memristor of a memory crossbar array. The voltage control module applies a column voltage to a column line coupled to the target memristor, applies a first row voltage to all row lines not coupled to the target memristor and a second row voltage to a row line coupled to the target memristor, and senses a current through the target memristor to determine a state of the target memristor. The memory crossbar array includes a plurality of column lines, a plurality of row lines, a plurality of memristors, and a plurality of shorting switches. Each memristor is coupled between a unique combination of one column line and one row line. Each shorting switch has a high impedance resistor and a low impedance transistor, and each shorting switch is coupled to an end of a unique row line.
US09911488B2 Three dimensional non-volatile memory with shorting source line/bit line pairs
A non-volatile storage system dedicates a subset of blocks to be used for shorting source lines to bit lines at periodic positions along the bit lines during certain memory operations.
US09911487B2 Method and system for storing and recovering data from flash memory
Embodiments of the technology relate to storing user data and metadata in persistent storage in the event of a power failure and then recovering such stored data and metadata when power is restored.
US09911485B2 Method and apparatus for refreshing a memory cell
A method includes sending a first signal from a memory device to a memory controller. The first signal indicates to the memory controller that particular memory cells of the memory device are to be refreshed by the memory device.
US09911481B1 Selection circuit with autobooting for magnetic memory and methods therefor
A selection circuit and related access circuitry that can be used for column selection in spin-torque magnetic memory is disclosed. The selection circuit can be implemented with three transistors, all of which can be NMOS transistors, thereby reducing area requirements. The selection circuit includes drive transistor that can be autobooted based on the drive voltage applied across the drive transistor. A single control signal controls the state of the selection circuit, and the selection circuits can be nested to provide multiple levels of decoding or selection.
US09911476B2 Systems and methods for voice data processing
Systems and methods are provided for voice data processing. For example, a first data packet included in voice data transmitted by a client is received; the first data packet is stored in a storage area; whether to process one or more second data packets stored in the storage area is determined based on at least information associated with a type of the first data packet and a current storage state of the storage area; in response to a determination to process the second data packets, voice resources are applied for; and the second data packets stored in the storage area are processed using the voice resources.
US09911472B1 Write bitline driver for a dual voltage domain
Systems and methods are directed to managing signals in a dual voltage domain comprising a high voltage domain and a low voltage domain. A write bitline driver circuit receives complementary global write bitline signals as input signals from a global write bitline driver in the low voltage domain, and a write enable signal as an input signal in the high voltage domain. The write bitline driver circuit generates complementary local write bitline signals as output signals in the high voltage domain for activating bitlines of a memory bank in the high voltage domain. The complementary local write bitline signals are based on the complementary global write bitline signals, voltage level shifted from the low voltage domain to the high voltage domain and gated by the write enable signal.
US09911466B2 Read threshold voltage selection
Apparatuses and methods for read threshold voltage selection are provided. One example method can include setting a first soft read threshold voltage and a second soft read threshold voltage based on a difference between a first number of memory cells that are read as being programmed to a first state when read using a first threshold voltage and a second number of memory that are read as being programmed to the first state when read using another threshold voltage.
US09911462B2 Method and apparatus for providing stream linking in audio/video disk media
A method and apparatus for providing stream linking in audio/video disk media is disclosed. The present invention sets-up an audio/video stream on a disk drive, uses read and write commands for accessing contiguous data and, given an established stream, establishes a linked stream by sending a linked stream request with the number of a primary stream to the drive. The new stream inherits the beginning and ending addresses of the primary stream. Passed pointer detection is enabled for linked stream pointers passing primary stream pointers.
US09911460B2 Fast and smart video trimming at frame accuracy on generic platform
In a computing device that implements an encoder, a method comprises receiving an encoded video sequence with a file container, receiving input to execute a trimming operation to create a frame accurate target segment of one or more desired pictures from the encoded video sequence and trimming to frame accuracy. Trimming to frame accuracy is accomplished by changing the parameter identifications of leading and trailing portions, if supported, or changing the parameters, and using the changed parameters or parameter identifications in re-encoding the leading and trailing portions, while an untouched middle portion between the leading and trailing portions is re-muxed without re-encoding.
US09911457B2 System and method for providing a secure content with revocable access
There is provided a method for use by a media player to provide access to a media content. The method comprises receiving a request from a user for playing the media content, prompting a user for an authorization code, receiving the authorization code from the user, transmitting the authorization code to an authentication server over a network, receiving a valid authentication message from the authentication server over the network if the authorization code is confirmed to be valid, transmitting the valid authentication message to a content server over the network, retrieving the media content from the content server over the network, wherein the media content incorporates an identification information associating the media content with the user.
US09911454B2 Camera array including camera modules
The disclosure includes a camera array comprising camera modules, the camera modules comprising a master camera that includes a processor, a memory, a sensor, a lens, a status indicator, and a switch, the switch configured to instruct each of the camera modules to initiate a start operation to start recording video data using the lens and the sensor in the other camera modules and the switch configured to instruct each of the camera modules to initiate a stop operation to stop recording, the status indicator configured to indicate a status of at least one of the camera modules. The camera modules of the camera array are configured to provide a 3× field of view overlap.
US09911453B2 Automated just a bunch of disks management
Embodiments of the present invention provide a drive storage system, method, and computer program process for automatically replacing drives. In one embodiment, one or more computer processors receive a request for a new drive. One or more computer processors direct an exchange robot to obtain the new drive from a drive repository and to proceed to a location of a used drive. One or more computer processors then direct the exchange robot to remove the used drive from the location and to insert the new drive into the location of the used drive.
US09911452B2 Magnetic tape winding-up method, magnetic tape winding-up apparatus, manufacturing method of magnetic tape cartridge, and magnetic tape cartridge
A winding-up method for winding up a magnetic tape, includes: winding up the magnetic tape around a takeup reel by laying turns one on top of another while causing the magnetic tape to run; and performing a tension control of maintaining tension exerted on a wound-up magnetic tape for a predetermined time.
US09911451B2 Optical recording medium having a plurality of recording layers capable of suppressing off-track
An optical recording medium includes a plurality of information signal layers on which information signals are to be optically recorded. Among the plurality of information signal layers, the information signal layer closest to the light-receiving surface has a reflectance of more than 4%.
US09911446B1 Three dimensional data storage media
A three dimensional magnetic recording media can consist of a coupling layer disposed between first and second vertically stacked recording layers. The coupling layer can provide exchange or antiferromagnetic coupling and allow the respective recording layers to be individually heat selected to different first and second coupling strengths through application of heat from a heat source.
US09911435B1 Methods and systems related to audio data processing and visual display of content
Methods and systems related to analyzing audio data and performing quantitative analysis and reporting related to the audio data. Audio data may be investigated and phrases of the audio data identified. In some implementations, phrases are identified based on the likelihood of an occurrence or non-occurrence of the phrase. In some implementations, phrases are identified based on a cost associated with a search phrase.
US09911433B2 Wireless audio synchronization
A method of synchronizing playback of audio data sent over a first wireless network from an audio source to a wireless speaker package that is adapted to play the audio data. The method includes comparing a first time period over which audio data was sent over the first wireless network to a second time period over which the audio data was received by the wireless speaker package, and playing the received audio data on the wireless speaker package over a third time period that is related to the comparison of the first and second time periods.
US09911431B2 Processing of audio signals during high frequency reconstruction
The application relates to HFR (High Frequency Reconstruction/Regeneration) of audio signals. In particular, the application relates to a method and system for performing HFR of audio signals having large variations in energy level across the low frequency range which is used to reconstruct the high frequencies of the audio signal. A system configured to generate a plurality of high frequency subband signals covering a high frequency interval from a plurality of low frequency subband signals is described. The system comprises means for receiving the plurality of low frequency subband signals; means for receiving a set of target energies, each target energy covering a different target interval within the high frequency interval and being indicative of the desired energy of one or more high frequency subband signals lying within the target interval; means for generating the plurality of high frequency subband signals from the plurality of low frequency subband signals and from a plurality of spectral gain coefficients associated with the plurality of low frequency subband signals, respectively; and means for adjusting the energy of the plurality of high frequency subband signals using the set of target energies.
US09911427B2 Gain adjustment coding for audio encoder by periodicity-based and non-periodicity-based encoding methods
In an encoding method that is expected to produce a smaller code amount out of a periodicity-based encoding method and a non-periodicity-based encoding method, the amount of code or an estimated value of the amount of code of an integer value sequence which is derived from an audio signal is obtained while adjusting gain. In the other encoding method, an integer value sequence obtained in this process is substituted to obtain the amount of code or an estimated value of the amount of code of the integer value sequence. The obtained code amounts or estimated values are compared to choose one of the encoding methods and the integer value sequence is encoded using the chosen encoding method to obtain and output an integer signal code.
US09911426B2 Audio encoder and decoder with program loudness and boundary metadata
Apparatus and methods for generating an encoded audio bitstream, including by including program loudness metadata and audio data in the bitstream, and optionally also program boundary metadata in at least one segment (e.g., frame) of the bitstream. Other aspects are apparatus and methods for decoding such a bitstream, e.g., including by performing adaptive loudness processing of the audio data of an audio program indicated by the bitstream, or authentication and/or validation of metadata and/or audio data of such an audio program. Another aspect is an audio processing unit (e.g., an encoder, decoder, or post-processor) configured (e.g., programmed) to perform any embodiment of the method or which includes a buffer memory which stores at least one frame of an audio bitstream generated in accordance with any embodiment of the method.
US09911418B2 Systems and methods for speech command processing
Methods and apparatus related to processing speech input at a wearable computing device are disclosed. Speech input can be received at the wearable computing device. Speech-related text corresponding to the speech input can be generated. A context can be determined based on database(s) and/or a history of accessed documents. An action can be determined based on an evaluation of at least a portion of the speech-related text and the context. The action can be a command or a search request. If the action is a command, then the wearable computing device can generate output for the command. If the action is a search request, then the wearable computing device can: communicate the search request to a search engine, receive search results from the search engine, and generate output based on the search results. The output can be provided using output component(s) of the wearable computing device.
US09911412B2 Evidence-based natural language input recognition
Methods, devices, and computer program products for recognizing and responding to natural language input are described herein. Natural language input is received at a natural language input interface of a computing device and transformed into computer-usable text. A natural language input recognizer obtains evidence from one or more evidence source and generates an evidence graph based on the evidence obtained. Evidence may be obtained asynchronously, and the natural language input recognizer may update the evidence graph upon receipt of additional evidence. The natural language input recognizer generates a set of recognition hypotheses based on the evidence graph and selects one of the recognition hypotheses as a recognition result for the natural language input. Semantic models, evidence models, and response models may be employed to generate the evidence graph and respond to the recognition result selected for the natural language input.
US09911411B2 Rapid speech recognition adaptation using acoustic input
A method includes the following steps. An acoustic input is obtained from a user, including issuing a verbal prompt to the user and receiving the acoustic input from the user in response to the verbal prompt. One or more acoustic representations are obtained, wherein the one or more acoustic representations are generated from a list of expected responses to the issued verbal prompt. The acoustic input from the user is compared to the one or more acoustic representations. One or more speech recognition parameters are adjusted based on the comparison.
US09911408B2 Dynamic speech system tuning
A system and method of tuning speech recognition systems includes performing text-to-speech conversion of text data; detecting the accuracy of speech converted from text data; determining that the detected accuracy is below a predetermined threshold; recording a user recitation of the text data in response to the determination; and storing the user recitation in an exception database located at a vehicle.
US09911405B2 Apparatus for controlling engine noise reflecting engine vibration and driving conditions
An apparatus for controlling engine noise reflecting engine vibration and driving conditions includes a sound generator that generates reinforcement noise in order to reinforce non-linear engine noise. The apparatus includes a vibration sensor measuring engine vibration as a noise source of the engine, a signal processing controller receiving the signal of the vibration sensor in real time and controlling the sound generator so that the engine noise may maintain linearity, and an amplifier receiving and then amplifying a control signal of the signal processing controller to transfer the amplified control signal to the sound generator.
US09911403B2 Automated generation of coordinated audiovisual work based on content captured geographically distributed performers
Vocal audio of a user together with performance synchronized video is captured and coordinated with audiovisual contributions of other users to form composite duet-style or glee club-style or window-paned music video-style audiovisual performances. In some cases, the vocal performances of individual users are captured (together with performance synchronized video) on mobile devices, television-type display and/or set-top box equipment in the context of karaoke-style presentations of lyrics in correspondence with audible renderings of a backing track. Contributions of multiple vocalists are coordinated and mixed in a manner that selects for presentation, at any given time along a given performance timeline, performance synchronized video of one or more of the contributors. Selections are in accord with a visual progression that codes a sequence of visual layouts in correspondence with other coded aspects of a performance score such as pitch tracks, backing audio, lyrics, sections and/or vocal parts.
US09911393B2 Device and method for compensating voltage of primary color subpixel, and display device
The present invention provides a device and a method for compensating a voltage of a primary color subpixel, and a display device. The voltage compensation device includes: a grayscale determination module for determining whether a display grayscale value corresponding to a data voltage of the primary color subpixel is larger than a preset grayscale value; a first compensation module for performing voltage compensation on the primary color subpixel according to primary color mura information acquired in advance in a primary color test picture, when the display grayscale value is determined to be larger than the preset grayscale value; and a second compensation module for performing voltage compensation on the primary color subpixel according to gray mura information acquired in advance in a gray test picture, when the display grayscale value is determined to be equal to or smaller than the preset grayscale value.
US09911391B2 Liquid crystal display having common voltage compensator
An embodiment of the present invention provides a liquid crystal display including a liquid crystal panel having a display area and a non-display area; left and right common voltage lines connected to common voltage lines formed in the display area and located in the non-display area on the left and right sides of the display area; and a common voltage compensator that receives feedback common voltages from the left and right common voltage lines and outputs compensated common voltages based on the feedback common voltages, wherein the common voltage compensator divides the display area into a first display area and a second display area with respect to the center of the liquid crystal panel and performs different compensation to the first display area and the second display area.
US09911384B2 Scan driver, organic light emitting diode display device and display system including the same
A scan driver of an organic light emitting diode (OLED) display device includes a plurality of sequentially-connected stages each connected to a plurality of pixels through a plurality of first-scan lines and a plurality of second-scan lines. Each stage of the sequentially-connected stages includes a common driver and a sub-driver unit. The common driver is configured to concurrently provide a common first-scan signal to the first-scan lines of the stage in response to at least a first initialization signal and a second initialization signal. The sub-driver unit is configured to serially provide second-scan signals to the second-scan lines of the stage in response to a plurality of output enable signals, the first-scan signal, and one of the first initialization signal and the second initialization signal. An order of the serial providing of the second-scan signals to the second-scan lines is dynamically configurable based on the output enable signals.
US09911380B2 Organic light emitting display device
An organic light emitting display device includes display pixels, auxiliary pixels, and a plurality of signal lines. The signal lines include data lines, auxiliary data lines, scan lines, and emission control lines. The auxiliary pixels are to be used for repairing defective ones of the display pixels. In operation, scan signals are supplied in a unit of p scan lines, A emission control signals are to be supplied in a unit of p A emission control lines, and B emission control signals are to be supplied in a unit of p B emission control lines, where p≧2.
US09911377B2 Dynamic merchandising communication system
Provided herein are display systems and units, including those configured for dynamic communication in a physical location, such as in retail settings. Also included herein are methods for dynamically displaying product information in a physical location, such as a retail setting.
US09911374B2 Display device and self-calibration method for digital data driven subframes
A display device is provided for dividing one frame period into a plurality of subframe periods, separating data of an input image on a per bit basis, mapping the data of the input image to the subframe periods, and representing gray levels of the input image. The display device includes a measurement unit configured to measure a current of a pixel; a luminance error calculation unit configured to calculate a rush current of the pixel emitting light at the measured current value, and to calculate a luminance error of the pixel based on the rush current; and a luminance error compensation unit configured to reduce an emission time of one of the subframe periods or remap the subframe periods to compensate for the luminance error.
US09911373B2 Image processing apparatus and display determination method
An image processing apparatus includes a first color gamut conversion unit that converts an input image signal in an XYZ color system into an output image signal in a linear RGB color system by using the inverse matrix of a matrix including, as its components, values obtained by normalizing XYZ values by a predetermined luminance value, the XYZ values being obtained by measuring an image for measurement displayed in a display device for which a determination is made, and a determination unit that determines, when an R, G, or B value of the output image signal is larger than a first predetermined value, that the display device cannot display an image related to the input image signal with brightness corresponding to respective luminance of the input image signal.
US09911372B2 Control device operating portion having a veneer with backlit indicia
A backlit operating portion of a control device includes a veneer having indicia defining an open portion exposing a backlit component, a floating portion, and one or more ribs that suspend the floating portion. The rib defines an upper surface recessed relative to a front surface of the veneer, and opposed sides that extend from a base of the rib to the upper surface, such opposed sides tapered between the base and the upper surface, such that the upper surface is narrower than the base.
US09911371B2 Apparatus and method for adjusting display characteristics of display device
A display panel driver includes an image data generator, a brightness correction circuit performing a correction calculation on image data, a drive section driving the display panel in response to corrected image data; and a display timing generator outputting a timing control signal. The correction calculation by the brightness correction circuit is adjustable. When the display panel driver is placed into a test mode, the display timing generator is configured to output an internally-generated timing control signal and the image data generator outputs internally-generated evaluation image data. The evaluation image data are generated so that the evaluation images are switched from one to another in response to the internally-generated timing control signal.
US09911370B2 Flag pin, flag pin kit, and methods of using the same
A flag pin is provided comprising a pin, a flag at the end of the pin, a sleeve positioned around the pin, and a flexible base receiving the tip of the pin therethrough and abutting the bottom of the sleeve. A user may insert the flag pin into the sleeve so that the tip of the pin extends from the bottom of the sleeve, and move the bottom of the pin through the flexible base so that the top of the base rests against the bottom of the cylindrical sleeve. The bottom end of the pin may then extend into a base on which the pin is to be placed, with the flexible base vertically supporting the cylindrical sleeve and the pin itself, and holding the pin in a generally vertical orientation. A kit for assembling flag pins and a related method are also provided.
US09911362B2 Method of demonstrating the cleaning performance of a cleaning composition
A method of demonstrating the cleaning performance of a cleaning composition comprises the steps of: providing a homogenous dairy-based solution on a demonstration surface; distributing oil composition on the homogenous dairy based solution to produce an oil dispersion on the demonstration surface; adding a cleaning composition onto the oil dispersion to view the displacement of the oil composition.
US09911359B2 Virtual testing and inspection of a virtual weldment
Arc welding simulations that provide simulation of virtual destructive and non-destructive testing and inspection of virtual weldments for training purposes. The virtual testing simulations may be performed on virtual weldments created using a virtual reality welding simulator system (e.g., a virtual reality arc welding (VRAW) system). The virtual inspection simulations may be performed on “pre-canned” (i.e. pre-defined) virtual weldments or using virtual weldments created using a virtual reality welding simulator system. In general, virtual testing may be performed using a virtual reality welding simulator system (e.g., a virtual reality arc welding (VRAW) system), and virtual inspection may be performed using a standalone virtual weldment inspection (VWI) system or using a virtual reality welding simulator system (e.g., a virtual reality arc welding (VRAW) system). In accordance with certain enhanced embodiments of the present invention, virtual testing may also be performed on a standalone VWI system.
US09911358B2 Wireless real-time tongue tracking for speech impairment diagnosis, speech therapy with audiovisual biofeedback, and silent speech interfaces
A real-time wireless system for recording natural tongue movements in the 3D oral space. By attaching a small magnetic tracer to the tongue, either temporarily or semi-permanently, and placing an array of magnetic sensors around the mouth, the tracer can be localized with sub-millimeter precision. The system can also combine the tracer localization with acoustic, video, and flow data via additional sensors to form a comprehensive audiovisual biofeedback mechanism for diagnosing speech impairments and improving speech therapy. Additionally, the system can record tongue trajectories and create an indexed library of such traces. The indexed library can be used as a tongue tracking silent speech interface. The library can synthesize words, phrases, or execute commands tied to the individual patterns of magnetic field variations or tongue trajectories.
US09911355B2 Comprehension in rapid serial visual presentation
Methods and a system are provided. A method includes receiving a plurality of words comprised in a Rapid Serial Visual Presentation. The method further includes determining a cognitive load of the plurality of words by using at least one metric. The cognitive load is determined on any of a word level and a word sequence level. The method also includes calculating a variable presentation rate for the plurality of words based on the cognitive load. The variable presentation rate is capable of being varied on any of the word level and the word sequence level. The method additionally includes controlling a displaying of the plurality of words on a display device in accordance with the calculated variable presentation rate.
US09911347B2 Interactive and educational containers
Interactive and educational containers that include a body and a band slidingly mounted to the body. The body defines a cylinder and an opening and includes a base and a sidewall that extends around the perimeter of the base. The sidewall includes an exterior face and a first set of indicia disposed on the exterior face of the sidewall at a plurality of radial positions around the sidewall. The band has an exterior face and a second set of indicia disposed on the exterior face of the band in a plurality of radial positions around the band. The band rotates around the sidewall to a plurality of radial positions where the first set of indicia and the second set of indicia align. The first and second sets of indicia are selected to have educational significance when aligned in selected combinations.
US09911346B2 Unmanned vehicle, system and method for correcting a trajectory of an unmanned vehicle
Some embodiments are directed to an unmanned vehicle for use with a companion unmanned vehicle. The unmanned vehicle includes a position unit that is configured to determine a current position of the unmanned vehicle. The unmanned vehicle includes a memory unit that is configured to store a planned path of the unmanned vehicle. The unmanned vehicle includes a control unit that is configured to determine that the unmanned vehicle is off-course based on the current position of the unmanned vehicle and the planned path assigned to the unmanned vehicle, generate a delay and a corrected path for the unmanned vehicle, and communicate the delay and the corrected path to the companion unmanned vehicle. The control unit is further configured to control a movement of the unmanned vehicle along the corrected path after the delay.
US09911344B2 Helicopter landing system using a camera for obstacle detection
A camera-based obstacle detection system includes a first camera, a second camera, and one or more processors configured to acquire a first image from the first camera, acquire a second image from the second camera, determine a depth of an object based on a location of the object in the first image relative to a location of the object in the second image, and in response to the depth exceeding a threshold depth value, generate an alert.
US09911343B2 Integrated landing receiver for an aircraft landing and controlling method thereof
An integrated landing receiver for landing of an aircraft and a controlling method thereof are provided, in which the integrated landing receiver includes a receiver including a plurality of signal information processors that generate landing guidance information respectively corresponding to a plurality of landing support facilities, a collector collecting the landing guidance information respectively generated at the plurality of signal information processors, and an integrator generating integrated landing guidance information by using the landing guidance information collected at the collector and outputting the result. Accordingly, when a plurality of landing support facilities are installed together at an airport, the landing guidance information provided from these landing support facilities are mixed and provided so that shortcomings that each landing supporting facility may have can be advantageously compensated, thus enabling safe and effective provision of the landing guidance information.
US09911340B2 Real-time system for multi-modal 3D geospatial mapping, object recognition, scene annotation and analytics
A multi-sensor, multi-modal data collection, analysis, recognition, and visualization platform can be embodied in a navigation capable vehicle. The platform provides an automated tool that can integrate multi-modal sensor data including two-dimensional image data, three-dimensional image data, and motion, location, or orientation data, and create a visual representation of the integrated sensor data, in a live operational environment. An illustrative platform architecture incorporates modular domain-specific business analytics “plug ins” to provide real-time annotation of the visual representation with domain-specific markups.
US09911336B2 Method for identification of vehicles for operating a car park or a parking area
A method for identification of vehicles (4) for operating a car park or a parking area is proposed in the course of which a vehicle (4) is identified at least by the sound profile emitted by the drive train of the vehicle which comprises a vehicle drive unit in the acoustic wave and/or ultrasonic range in at least one speed range.
US09911330B2 Driving assistance device and driving assistance method
A driving assistance device detects an object in front of a vehicle by an object detector, detects right/left turn information indicating that the vehicle passes across an opposite lane to turn right or left at an intersection after a predetermined period of time based on a current position and a traveling route of the vehicle included in road information, determines whether a standby vehicle waiting to turn right or left in the opposite lane is present in the intersection according to a detection result of the object detector and the road information when the right/left turn information is detected, estimates a blind spot of the object detector in the opposite lane caused by the standby vehicle, and sets a standby area in which the vehicle waits to turn right or left based on the estimated blind spot.
US09911328B2 Apparatus, system, and method for roadway monitoring
An apparatus, system, and method for monitoring traffic and roadway water conditions. Traffic flow and roadway flooding is monitored concurrently through a wireless sensor network. The apparatus and system comprises ultrasound rangefinders monitoring traffic flow, flood water conditions, or both. Routing information may be calculated from the traffic conditions, such that routes are calculated to avoid roadways that are impassable or are slow due to traffic conditions.
US09911326B2 Method and apparatus for detecting pedestrian mode from probe data
An approach is provided for processing and/or facilitating a processing of probe trace data to determine one or more mode indicators, wherein the one or more mode indicators include, at least in part, one or more attributes of the probe trace data. The approach involves causing, at least in part, a modeling of one or more statistical patterns of at least one pedestrian mode of transport, at least one non-pedestrian mode of transport, or a combination thereof based, at least in part, on determining one or more probabilities that one or more mode indicators are associated with the at least one pedestrian mode of transport, the at least one non-pedestrian mode of transport, or a combination thereof. The approach also involves causing, at least in part, a classification of other probe trace data as being associated with the at least one pedestrian mode of transport or the at least one non-pedestrian mode of transport based, at least in part, on the one or more mode indicators that are associated with the other probe trace data and the one or more statistical patterns.
US09911325B2 Relaying key code signals through a remote control device
Upon receiving a keystroke indicator signal from a remote control device, a key code generator device identifies a codeset usable to communicate with a selected consumer device. The keystroke indicator signal contains an indication of a pressed key, which corresponds to a function of the selected consumer device. Using the identified codeset and the key indication, the key code generator device generates a key code and modulates that key code onto a radio frequency carrier signal, thereby generating a first key code signal. The remote control device receives the first key code signal from the key code generator device and modulates the key code onto an infrared frequency carrier signal, thereby generating a second key code signal. The remote control device relays the key code to the selected consumer device in the second key code signal. The key code causes the selected consumer device to perform the desired function.
US09911324B2 Systems, methods and media for remote control of electronic devices using a proximity sensor
Systems, methods and media for remote control of electronic devices using a proximity sensor are provided. In some implementations, the system comprises: a proximity sensor comprising an infrared emitter and an infrared detector, wherein the proximity sensor is configured to emit infrared light having specific properties using the infrared emitter and sense reflected light having the specific properties using the infrared detector to determine proximity of the sensor to an object; and a hardware processor that is programmed to: receive a user instruction to cause a command to be issued to control an electronic device; determine a code to be transmitted that corresponds to the command from a plurality of codes associated with the electronic device; and provide at least one signal to the proximity sensor to cause the proximity sensor to emit an infrared signal corresponding to the code instead of emitting infrared light having the specific properties.
US09911323B2 Toolstring topology mapping in cable telemetry
Toolstring topology mapping systems having a downhole toolstring including a master node controller and a plurality of nodes and related methods. The methods involve querying each of the plurality of nodes in the downhole toolstring for actual topology information, receiving actual topology information from each of the plurality of nodes in the downhole toolstring in response to querying, and generating a topology map of the downhole toolstring based on the actual topology information from each of the plurality of nodes in the downhole toolstring. The methods can also involve comparing the topology map with the input topology information to identify topology mismatch and then take remedial actions if needed.
US09911317B2 Method and system for determining maintenance needs and validating the installation of an alarm system
A system and methods for determining maintenance needs of an alarm system are provided. The system may include a central monitoring station configured to receive operational measurements and apply maintenance rules to the operational measurements and a maintenance history for the alarm system to determine maintenance needs of the alarm system. Additionally, the central monitoring station may be configured to receive points, which may be modules or devices, and status updates and apply installation rules to the points and status updates to determine the maintenance needs for one or more of the points.
US09911316B2 Alarm device for feedthrough assembly and alarm method thereof
An alarm device for feedthrough assembly is proposed. The device comprises a body having a chamber, a sealing module configured on a first surface of the body for connecting to a feedthrough assembly, wherein a first surface has a hole across the chamber, and an alarm assembly configured in the chamber. In addition, if a shaft seal of the feedthrough assembly is failure, a pressure difference produced between the chamber and inner shaft seal forces the alarm assembly to move toward the feedthrough assembly.
US09911313B2 Proximity based alarm suppression
Methods, computer systems and computer readable media of proximity based alarm suppression are provided. In embodiments, a device signal emitted by a device signal transmitter associated with an infusion device is detected. A clinician signal emitted by a clinician signal transmitter associated with a clinician is detected. The device signal and the clinician signal are detected at a signal receiver having a known location. Based on the detecting of the device signal and the clinician signal, the clinician is determined to be in proximity to the infusion device. Based on the proximity of the clinician to the infusion device, an alarm associated with the infusion device is automatically suppressed.
US09911305B2 Method and apparatus for visually indicating connections between mult-wavelength interfaces and uni-wavelength interfaces
A method and apparatus for visually indicating the connections between optical interfaces is provided. The optical interfaces may include multi-wavelength optical interfaces and uni-wavelength optical interfaces. The optical interfaces may reside within optical nodes contained within an optical network.
US09911304B2 Distributed control method, distributed control system, and non-transitory computer-readable storage medium
A distributed control method in a distributed control system including a process executed by a by a first notification device, the process including notifying a detection of a first event to a second notification device, storing, in a storage device, acknowledgement information associating an event identifier indicating the first event with a device identifier indicating the second notification device when a negative acknowledgement is received from the second notification device, determining whether the event identifier indicating the first event is stored in the storage device or not when a request for a notification of the detection of the first event is received from a third notification device, and deleting, from the storage device, a device identifier associated with the event identifier indicating the first event when it is determined that the event identifier indicating the first event is stored in the storage device.
US09911303B2 System to evaluate airborne hazards
A system to evaluate airborne hazards having at least one sensor module which detects atmospheric conditions and generates output signals representative of those atmospheric conditions. A model module receives the output from the sensor and generates a model output signal representative of a calculated wind flow and plume footprint, when applicable, over an area of interest. A display module receives the model output signal and visually displays the calculated wind flow and its effect on a plume if present in near real-time. The final system output is provided to authorized end users in near real-time.
US09911302B2 Safety stairs
A stairway safety system and method including movement sensors and/or force sensors, a safety button, a central processing unit, a user notify device configured to generate audio or visual indications prompting the stairway user to engage the safety button, and a communication device configured to send a message requesting help. The central processing unit is configured to measure the length of time between detecting signals from the sensors and also to instruct the first user notify device to generate audio or visual indications when the measured time between detecting the signals is shorter or longer than a stairway user's actual or estimated typical travel time through the stairway. The central processing unit is configured to measure time and to instruct the communication device to send the message requesting help if a safety signal is not detected within a safety time period which indicates a request for help may be needed.
US09911299B2 Safety system and method
A system and method are described. The system utilizes data entry devices commonly found in some workplaces, such as warehouses, to generate an emergency signal. The emergency signal is used to generate an emergency response. In one embodiment, an emergency sign with a printed emergency symbol may be scanned using a network-connected barcode scanner to generate the emergency signal. In another embodiment, a user may utter an emergency speech input into a network-connected speech recognition device to generate the emergency signal. The system and method may expand and improve safety in a workplace by offering a more convenient way to summon help.
US09911289B2 Cash drawer
A cash drawer with an ergonomic design. In an example embodiment, the cash drawer includes a housing having an operator side, and a drawer assembly moveable from a closed position in the housing to an open position. The drawer assembly includes a drawer, a first tray in the drawer for storing bank notes, and a second tray in the first tray for storing coins. The cash drawer additional stores a removable lid with a handle. The lid includes a first side for enclosing the first tray and a second side for enclosing the second tray, thus forming a suitcase for transporting the bank notes and coins.
US09911288B2 Gaming device having multiple game play option
Embodiments of this concept are directed to gaming devices that are configured to initiate multiple gaming events in response to a player input. The gaming device may include game initiating inputs that initiate a predetermined number of gaming events in response to the player input, or the gaming device may include configurable game initiating inputs that initiate a number of gaming events specified by the player, specified the gaming device, or specified by a gaming server. The gaming device or gaming server may set the number of initiated game events in response to the occurrence of a triggering event.
US09911286B2 Electronic gaming device which determines play information
A video output signal analyzes that analyzes a video output signal to determine game play information. In video poker, card values and player strategies can be determined based on a “reverse encoding” of the video signal to determine the original video bitmap. The bitmap can then be analyzed to determine what is taking place during a game, without having to receive this information directly from the processing unit that is actually implementing the game.
US09911285B2 System for game play in electronic environment
The inventions herein relate to novel games of chance and apparatus and methods for their play. In certain embodiments, the existing lottery infrastructure is used in conjunction with electronic remote game play. A player receives a ticket identification number (TIN), optionally via lottery game play, and then plays an electronic game based upon the TIN. The remote system contains information associated with the TIN, for example, identification of which game will be played, and in a predetermined context, whether the player is to win or lose, and if they win, the form of the prize.
US09911277B2 Jackpot gaming method and system for game events with varying events probabilities
Systems, apparatuses, and methods are presented for operating a generalized progressive gaming system which offers a common progressive jackpot for a various games with different sets of winning hands and different denominations. The generalized progressive system represents a jackpot in terms of probability and adds a normalizing random event to a player's bet and the hand player receives. In order to win a jackpot the player must receive a qualified hand and a combined probability of these two events, namely a hand and a normalizing random event, must be smaller than a required value. Any qualified hand can win the jackpot. Handling of various denominations is proposed. Generalized progressive system apparatus is also provided that includes a display, a user interface, a processor and a server.
US09911271B2 Interactive gaming among a plurality of players systems and methods
A system for interactive gaming among a plurality of players includes a host computer system and a plurality of player terminals communicably coupled to the host computer system or gaming platform via a network. The plurality of player terminals may be located at a plurality of licensed gaming locations. The plurality of player terminals may be configured to engage the plurality of players in a common interactive game operated by the host computer system. The plurality of player terminals can include means for dispensing player winnings from the player terminal.
US09911268B2 System and method of allowing a player to play gaming machines having reel overlays
A game machine is provided. The machine comprises a display and a controller. The display is configured to display a plurality of symbol cells displayed in a grid. The controller is configured to: establish a first reel layout and a second reel layout, the second reel layout having a blank symbol in a plurality of consecutive symbol positions and at least one identical symbol in a plurality of consecutive symbol positions; randomly shift the second reel layout by a number of symbol positions in relation to the first reel layout; combine the second reel layout with the first reel layout to create a combined reel layout; and assign the combined reel layout to one of the reel strips.
US09911264B2 Coin counting apparatus
The present invention relates to a coin counting apparatus including: a frame in which an accommodation part is formed and a coin transfer channel connected to an outlet provided at a partition forming the accommodation part; a rotating transfer plate rotatably mounted in the accommodation part and including coin-accommodation grooves on a top surface thereof to transfer a coin; a coin-discharging roller unit configured to push the coin toward the outlet using rotational power of the coin to pass the coin through a counter sensing unit at a predetermined speed; and a coin detection unit including a light irradiation unit configured to emit a plurality of beams toward the coin transfer channel and an optical detection unit configured to detect beams reflected by coins to count the coins.
US09911258B2 Access control system and method for use by an access device
Systems and methods are provided to allow a smart phone or any terminal to activate a door lock using a web site or server computer system. An access control system is provided that includes a server and an access device. The access device includes a processor and a communication module. The process has control of a door lock and is able to receive a reservation certificate presented by a portable terminal through the communication module. The processor activates the door lock when a current reservation certificate has been presented.
US09911255B2 Car management system and method
A car management system includes, for example, a second terminal generating first and second tokens in response to a request from a first terminal to use a vehicle, and sending the first token to the first terminal; and a third terminal authorizing the first terminal to use the vehicle by generating an access key that provides authority to use the vehicle using the first token and the second token in response to a request from the first terminal for the access key, and providing the generated access key to the first terminal.
US09911254B2 Electronic lock digital keypad interface
A digital keypad interface includes a keypad having a plurality of keys, a lock status indicator, a first set of LEDs set around a periphery of the lock status indicator, an unlock status indicator, and a second set of LEDs set around a periphery of the unlock status indicator. A microprocessor is provided to sequentially light LEDs of the first set of LEDs during a locking sequence of inputs via the keypad and to sequentially light LEDs of the second set of LEDs during an unlocking sequence of inputs via the keypad.
US09911253B2 Memory management in event recording systems
A vehicle event recorder is provided that includes a camera for capturing a video as discrete image frames, and that further includes a managed loop memory and a management system for generating a virtual ‘timeline dilation’ effect. To overcome size limits in the buffer memory of the video event recorder, the maximum time extension of a video series is increased by enabling a reduction in temporal resolution in exchange for an increase in the temporal extension. Memory cells are overwritten in an ‘interleaved’ fashion to produce a reduced frame rate for the recording of certain time periods connected to an event moment. In time periods furthest from the event moment, the resulting frame rate is minimized while in time periods closest to the event moment, the resulting frame rate is maximized.
US09911251B2 Vehicle diagnostic system and method
A vehicle diagnostic system for a vehicle including an electronic control unit (ECU) and an associated diagnostic port includes a dongle, an imaging device, and a single wireless device. The dongle is configured to mate with the diagnostic port to enable the dongle to establish a wired communication link with the ECU. The imaging device is configured to generate imaging data. The single wireless device includes a display unit, an input unit, a memory storing program instructions, and a processor. The processor is configured to execute the program instructions to establish a wireless communication link with the ECU via the dongle, to receive diagnostic data from the ECU, to render the received diagnostic data on the display unit, to receive user input data from the input unit based on the rendered diagnostic data, and to transmit the user input data to the ECU.
US09911249B2 Fail operational power system diagnostics
A method for operating a diagnostic system of a vehicle including a fail operational power system (FOPS) module and a fail operational system (FOS) module includes the FOS module requesting a microcontroller of the FOPS module to generate a diagnostic control signal. The FOS module receives the diagnostic information from a component module of the FOPS module based on the diagnostic control signal generated by the microcontroller. The FOS module executes isolator diagnostics based on the received diagnostic information.
US09911248B2 Method and device for operating a hybrid drive system
A method for operating a hybrid drive system which includes ascertaining an overall cost function that takes into account the cost function, which is a function of the operating point, for minimizing an energy usage of the hybrid drive system, and that takes into account one or more partial cost functions, which are a function of the operating point, which are each assigned to a requested special function; determining an optimized operating point of the hybrid drive system corresponding to an optimization according to the ascertained overall cost function; operating of the hybrid drive system at the operating point; and executing of those of the requested special functions for which the determined operating point is within an operating range assigned to the respective special function.
US09911247B1 Aircraft requirements presentation system, device, and method
A system, device, and method for presenting aircraft requirements are disclosed. The aircraft requirements presentation system could include a source of maintenance data; an aircraft system(s); an input device; a processing unit (PU); and a display unit. The PU may be configured to acquire maintenance data; identify one or more schedule maintenance actions due at the present time; generate command data to a disable specific functionality of the aircraft system(s); provide the command data to the aircraft system(s); generate an image data set representative of one or more page images, whereon each page there may be image of at least one maintenance strip indicating a maintenance action and at least one a count for the maintenance action; and present the image(s) on the display unit. In some embodiments, a maintenance strip could include a graphical user interface through which a pilot may enable the disabled functionality.
US09911246B1 Systems and methods utilizing gravity feed for postage metering
Systems and methods which utilize gravity feed for mail item movement in postage metering operations are shown. Embodiments provide for gravity drop feeding mail items into a portion of a postage metering system for metering operations, such as to activate or apply postage indicia thereto. Embodiments provide for gravity drop exit of mail items from a portion of a postage metering system after metering operations, such as activation or application of postage indicia thereto. Postage metering operations as performed by embodiments of the invention may comprise scanning and activation of preprinted tokens. Postage metering operations according to alternative embodiments of the invention may comprise printing postage indicia. Embodiments provide processing in addition to or in the alternative to the aforementioned postage indicia activation or printing and mail item marking operations, such as weighing, sorting, etc.
US09911240B2 Systems and method of interacting with a virtual object
The technology disclosed relates to a method of interacting with a virtual object. In particular, it relates to referencing a virtual object in an augmented reality space, identifying a physical location of a device in at least one image of the augmented reality space, generating for display a control coincident with a surface of the device, sensing interactions between at least one control object and the control coincident with the surface of the device, and generating data signaling manipulations of the control coincident with the surface of the device.
US09911238B2 Virtual reality expeditions
In a general aspect, a system can include a leader device. The leader device can include an interface configured to display a plurality of preview images, each preview image corresponding with respective virtual reality (VR) content. The leader device also include a selection device configured to select a preview image of the plurality of preview images and a leader application configured to control presentation of the respective VR content associated with the selected preview image. The system can further include a plurality of participant devices that are operationally coupled with the leader device. Each participant device of the plurality of participant devices can be configured to, responsive to the leader device, display at least one image included in the respective VR content corresponding with the selected preview image.
US09911237B1 Image processing techniques for self-captured images
Image processing techniques for self-captured images are disclosed. An image can be captured during activation of an illumination element of a mobile device. Presence of a representation of the mobile device can be determined in the captured image based at least in part upon locating a reflection of an illumination produced by the illumination element. Dimensions of the representation of the mobile device can be determined and compared to actual dimensions of the mobile device to provide a scaling factor. The scaling factor can be used to determine the size of various objects, including articles of clothing, in the image.
US09911231B2 Method and computing device for providing augmented reality
A method and computing device for providing Augmented Reality (AR) is provided. The method of providing AR includes detecting at least one physical object from a real scene obtained through a camera of a computing device, rendering at least one virtual object at a desired position of the detected at least one physical object on the real scene provided on a display, enabling communication through a command for interaction between the rendered at least one virtual object, and enabling the at least one virtual object to perform an action in response to command communication between the at least one virtual object.
US09911227B2 Method and system for accessibility and control of parameters in scenegraphs
A method and system for providing access to and control of parameters within a scenegraph includes redefining components or nodes' semantic within a scenegraph. The set of components or nodes (depending on the scenegraph structure) are required to enable access from the Application User Interface to selected scenegraph information. In one embodiment, a user interface is generated for controlling the scenegraph parameters. In addition, constraints can be implemented that allow or disallow access to certain scenegraph parameters and restrict their range of values.
US09911224B2 Volume rendering apparatus and method using voxel brightness gain values and voxel selecting model
Provided is a volume rendering method including: obtaining 3-dimensional (3D) volume data of an object; setting a parameter of a first voxel included in the 3D volume data as a first value, and a parameter of a second voxel included in the 3D volume data as a second value; and performing rendering by applying the first value to the first voxel and the second value to the second voxel.
US09911222B2 Animation in threaded conversations
A method for augmenting a threaded conversation between a first device and a second device. The method includes: receiving a selection of a selectable animation, via a selection of a selectable animation representation, at the first device, wherein the selectable animation is configured for augmenting the threaded conversation; and incorporating the selection of the selectable animation into the threaded conversation such that the selectable animation appears in a conversation view of the first device and the second device.
US09911218B2 Systems and methods for speech animation using visemes with phonetic boundary context
Speech animation may be performed using visemes with phonetic boundary context. A viseme unit may comprise an animation that simulates lip movement of an animated entity. Individual ones of the viseme units may correspond to one or more complete phonemes and phoneme context of the one or more complete phonemes. Phoneme context may include a phoneme that is adjacent to the one or more complete phonemes that correspond to a given viseme unit. Potential sets of viseme units that correspond with individual phoneme string portions may be determined. One of the potential sets of viseme units may be selected for individual ones of the phoneme string portions based on a fit metric that conveys a match between individual ones of the potential sets and the corresponding phoneme string portion.
US09911217B2 Animation arrangement
An animation arrangement for a vehicle is provided. The animation arrangement has a display device, configured to display an animation based on an instruction set, a storage device configured to store a first instruction set and a second instruction set for displaying the same animation on the display device, and a calculating device configured to select one of the first and second instruction sets for displaying an animation on the display device. The calculating device is configured to select one of the first and second instruction sets for displaying an animation on the display device based on a load parameter of the calculating device.
US09911216B2 System and method for enabling mirror video chat using a wearable display device
A method of exchanging audio-visual communication information between users includes detecting using an image capturing device associated with a wearable communication device, a mirror or image reflecting surface disposed in an environment of a first user, detecting a boundary of the mirror or image reflecting surface in response to the mirror being detected in the environment of the first user, selecting a portion of a first image displayed on the mirror or image reflecting surface within the boundary of the mirror or image reflecting surface, and displaying the portion of the first image as an overlay on a second image to a second user. A corresponding system and computer-readable device are also disclosed.
US09911213B2 Panoramic image stitching using objects
A system and method that determines a seam between pairs of adjacent images for panoramic image stitching is disclosed. The method includes receiving a sequence of images, determining a pair of adjacent images in the sequence of images, matching one or more objects corresponding to a same object identifier in the pair of adjacent images, determining a seam in an overlap region between the pair of adjacent images and determining a portion of pixels from each image of the pair of adjacent images to represent in a stitched panoramic image based on the seam.
US09911205B1 Visual continuity for arbitrary length stipple patterns
An indication of a polyline having multiple vertices and a stipple pattern of a not-a-power-of-two length are received. The stipple pattern is to be repeatedly rendered along the polyline. To reduce visual discontinuity, a texture of a power-of-two length, to be repeatedly applied along the polyline, is generated. The texture is made up of several whole instances of the stipple pattern and a portion of another instance of the stipple pattern defining remainder texels. The texture is modified so that visual pattern discontinuity substantially aligns with a vertex of the polyline at which a maximum amount of change in direction of the polyline occurs.
US09911201B2 Imaging process initialization techniques
Imaging process initialization techniques are described. In an implementation, a color estimate is generated for a plurality of pixels within a region of an image. A plurality of pixels outside of the regions are first identified for each pixel of the plurality of pixels within the region. This may include identification of pixels disposed at opposing directions from the pixel being estimated. A color estimate is determined for each of the plurality of pixels based on the identified pixels. As part of this, a weighting may be employed, such as based on a respective distance of each of the pixels outside of the region to the pixel within the region, a distance along the opposing direction for corresponding pixels outside of the region (e.g., at horizontal or vertical directions), and so forth. The color estimate is then used to initialize an imaging process technique.
US09911195B2 Method of sampling colors of images of a video sequence, and application to color clustering
The method comprises the steps of, successively for each image following a preceding image based on a map of motion vectors that corresponds to the motion from said preceding image toward said following image, building a pixel mask for said following image, applying said pixel mask to the corresponding following image in order to obtain a corresponding masked image that samples the pixels of said following image. The application of this method to color clustering allows the iterative update of the colors clusters with limited computer resources.
US09911193B2 Semi-background replacement based on rough segmentation
A telecommunication device includes an image capture system that captures an image of a local participant in a telecommunication session, the image comprising foreground and background images defined by plural pixels, each of the pixels having a pixel magnitude related to a sample of the image at a spatial location of the respective pixel and a background modifier that segments plural pixels of the captured image into foreground and background sets of pixels based on spatial coordinates of the pixels, replaces the background set of pixels with a template set of pixels to form a new background set of pixels, each selected pixel in the template set of pixels having a different magnitude than a magnitude of the corresponding pixel in the background set of pixels replaced by the selected pixel, and combines the new background set of pixels with the foreground set of pixels to form modified image information for transmission to a remote endpoint.
US09911190B1 Method and computer program for generating a database for use in locating mobile devices based on imaging
Method, system and computer program for generating a database of pixel patterns includes obtaining images using an imaging system of mobile devices, each image including a pixel pattern, and determining a position of the mobile device using a positioning system at least partly situated on the mobile device when each image is obtained using the imaging system of the mobile device. Positional relationships between a size and/or angular orientation of the pattern of pixels and an associated determined position of the mobile device when the at least one image including the pattern of pixels was obtained are generated and enables retrieval of an estimation of the position of the mobile device upon input of another image including the pattern of pixels. The generated positional relationships between the size and/or angular orientation of the pattern of pixels and the associated determined position of the mobile device are stored in a database.
US09911189B1 Navigation based on downward facing sensors
A new area to search in a ground feature database is determined based on a last detected position. Information from a downward facing sensor coupled to an aircraft is obtained. The information from the downward facing sensor is compared with information associated with the new area in order to find a new position.
US09911188B1 Highly accurate alignment between three dimensional objects
A method, comprising receiving or calculating first information about a representation of a first object; receiving or calculating second information about a representation of a second object; calculating, based on the first information, an orbit-responsive representation of the first object; calculating, based on the second information, multiple intermediate representations of the second object; wherein each intermediate representation is orbit responsive and transformation responsive; wherein different intermediate representations correspond to different transformations of the octahedral group; and determining a misalignment between a preliminary representation of the first object and a preliminary representation of the second object based on a relationship between the first information and each of the intermediate representations.
US09911187B2 Determining a straight line trajectory for a medical procedure
Disclosed is a computer-implemented method for planning a trajectory (11) through an anatomical body part (1), the trajectory (11) being usable for a medical procedure and the method comprising executing on at least one processor of at least one computer, steps of: •a) acquiring (S1), at a processor, patient image data describing a medical image of a patient anatomical body part being the anatomical body part (1) in a patient's body. •b) acquiring (S2), at a processor, atlas trajectory data describing a model anatomical body part being a model of the patient anatomical body part, and describing the position of at least one predetermined trajectory through the model anatomical body part; •c) acquiring (S3), at a processor, critical structure data describing the position of at least one critical structure (5) in the model anatomical body part or in the patient anatomical body part; •d) determining (S4), by a processor and based on the patient image data and the atlas trajectory data and the critical structure, mapping data describing a mapping of the model anatomical body part, of the position of the at least one predetermined trajectory and of the position of the at least one critical structure (5) onto the medical image of the patient anatomical body part; •e) determining (S5), by a processor and based on the mapping data and the atlas trajectory data and the patient image data, analysis region data describing an analysis region in the patient image data, the analysis region (16) having a position in the patient anatomical body part fulfilling a predetermined spatial condition relative to the position of the mapped predetermined trajectory (6); •f) determining (S6), by the processor and based on the patient image data and the atlas trajectory data and the analysis region data and the critical structure data, straight trajectory data describing a straight line trajectory (11) through the patient anatomical body part having a position fulfilling a predetermined spatial condition relative to the position of at least one critical structure (5) in the patient anatomical body part.
US09911186B2 Imaging control apparatus, storage system, and storage medium
There is provided an imaging control apparatus including an imaging control section configured to control an imaging section to capture a predetermined area in a body cavity, a comparison section configured to compare a captured image captured by the imaging section with a reference image, and a storage control section configured to execute a control to store the captured image in response to a comparison result by the comparison section.
US09911184B2 Air/object determination for biometric sensors
A fingerprint sensing apparatus may include a fingerprint sensor system and a control system capable of receiving fingerprint sensor data from the fingerprint sensor system. The control system may be capable of determining fingerprint sensor data blocks for at least a portion of the fingerprint sensor data and of calculating statistical variance values for fingerprint sensor data corresponding to each of the fingerprint sensor data blocks. The control system may be capable of determining, based at least in part the statistical variance values, whether an object is positioned proximate a portion of the fingerprint sensor system.
US09911183B2 Image processing method, image processing apparatus, image pickup apparatus, and non-transitory computer-readable storage medium
An image processing method includes the steps of acquiring a first image shot by using a compound eye image pickup apparatus, acquiring image capturing condition information of the first image, acquiring, depending on the image capturing condition information, optical characteristic information of a plurality of optical systems having a plurality of focal lengths different from each other in the compound eye image pickup apparatus, correcting a deterioration of the first image caused by shooting the first image based on the optical characteristic information, and generating a second image based on information of a position and an angle of a ray obtained from the first image whose deterioration is corrected, and the optical characteristic information contains at least one of information related to aberrations and information related to peripheral illumination of the optical systems.
US09911182B2 Systems and methods for selective enhancement of a region of interest in an image
The present disclosure provides systems and methods for receiving ultrasound image data corresponding to an ultrasound image with a master dynamic range and displaying a globally tone-mapped version of the ultrasound image on an electronic display. A region of interest (ROI) within the ultrasound image may be regionally tone mapped to provide an enhanced, optimized, and/or otherwise improved image of the ROI. The regional tone mapping may allow for features within the ROI to be more easily distinguishable that are not or at least not easily distinguishable in the global tone mapping of the same region.
US09911181B2 Method for inverse tone mapping of an image
Method comprising, for each pixel, obtaining a pixel expansion exponent value (E′(p)) by low pass filtering luminance values of colors of pixels in its spatial neighborhood, obtaining a pixel luminance-enhancement value (Yenhance(p)) by extraction of high frequencies of luminance values of colors of pixels in its spatial neighborhood, and then inverse tone mapping the luminance (Y(p)) according to the equation Yexp(p)=Y(p)E′(p)×[Yenhance(p)]c.
US09911179B2 Image decontouring in high dynamic range video processing
A set of optimized operational parameter values is generated for performing decontouring operations on a predicted image. The predicted image is predicted from a first image mapped from a second image that has a higher dynamic range than the first image. Based on the set of optimized operational parameter values, smoothen operations and selection/masking based on a residual mask are performed on the predicted image. The set of optimized operational parameter values is encoded into a part of a multi-layer video signal that includes the first image, and can be used by a recipient decoder to generate a decontoured image based on the predicted image and reconstruct a version of the second image.
US09911174B2 Multi-rate processing for image data in an image processing pipeline
An image processing pipeline may process image data at multiple rates. A stream of raw pixel data collected from an image sensor for an image frame may be processed through one or more pipeline stages of an image signal processor. The stream of raw pixel data may then be converted into a full-color domain and scaled to a data size that is less than an initial data size for the image frame. The converted pixel data may be processed through one or more other pipelines stages and output for storage, further processing, or display. In some embodiments, a back-end interface may be implemented as part of the image signal processor via which image data collected from sources other than the image sensor may be received and processed through various pipeline stages at the image signal processor.
US09911169B1 Method and apparatus for sharing toll charges among several toll service subscribers
A method for apportioning a vehicular toll among toll service subscribers in a vehicle can include determining a number of occupants in the vehicle in order to determine a toll amount, and dividing the toll amount among the toll service subscribers in the vehicle. The method can also detect the number of occupants and/or toll service subscribers in the vehicle automatically, or by prompting toll service subscribers to enter the number of occupants.
US09911163B2 Systems and methods for determining energy information using an organizational model of an industrial automation system
A system may include a processor that may receive energy data associated with one or more assets in an automation system, receive organizational model data associated with the automation system, and generate one or more energy reports based on a relationship between the energy data and the organizational model data.
US09911160B2 Tax payment system and method for accurate payments
The present invention provides a tax payment system and method for accurate payments, which transfer accurate withholding tax payments from taxpayers to governments and accurate payroll payments from employers to employees with accurate employee information. Current Tax Schedules, Tax Tables and Tax Computation Worksheet are combined together for their simplification with related linear and graduate formulas. Accurate information of income tax payments, withholding tax payments and employees or businesses can be reported to the IRS or a state government by January 15 or February 15 with adjustments. Then governments can be ready to verify and/or inspect tax returns before sending out tax refunds. Therefore potential tax theft crimes could be reduced significantly or avoided to save billions of dollars. The tax payment system and method offer many taxpayers with a one-source income and certain qualifications to have an option to not file their tax returns because of accurate withholding tax payments, which reduce tax processing time and costs for governments and taxpayers significantly, which may be worth billions of dollars yearly.
US09911154B2 Apparatus and method for dynamic offline balance management for preauthorized smart cards
A smart payment device is issued to a user; the device is capable of both offline and online transactions and has a total available balance split. The split is between an available offline balance and an available online balance. It is determined whether the user has entered a primarily offline environment or will imminently enter a primarily offline environment. If this is so, the total available balance split is redistributed to favor offline transactions.
US09911150B2 Alternative email-based website checkouts
An e-commerce system and method for facilitating transactions between a customer and a vendor is disclosed. The e-commerce system includes a receiver configured to receive a request for at least one token, the request including the details of at least one transaction for the purchase of at least one product, a processor configured to generate at least one token, a transmitter configured to transmit the at least one token to a customer browser, the customer browser being used to validate the token using at least one iframe, the receiver configured to receive submission in the iframe, the processor configured to decode the token, the processor configured to perform one or more validations, and the processor configured to process the transaction, on a condition that the validations are approved.
US09911149B2 Systems and methods for online shopping cart management
Systems and methods for online shopping cart management are provided. According to an embodiment, a shopping cart system receives cart information for one or more items selected by a user on a plurality of merchant websites. The shopping cart system determines related items among the one or more items to populate different carts of the user. In response to receiving a checkout request for a cart containing an item related to other items, the shopping cart system provides an option to check out the other related items. The user may initiate, and the shopping cart system may process, a payment request for items in the checked-out cart. In some embodiments, the shopping cart system may remove items similar to the purchased items from the remaining carts. In further embodiments, the shopping cart system may automatically check out one of the carts after a predetermined amount of time.
US09911148B2 Querying for business service processing status information
Querying for business service processing status information is disclosed, including: receiving a query reference message from a server, wherein the query reference message includes information associated with a set of processing nodes associated with a business service, a sequence associated with the set of processing nodes, and a set of predicted measures of time corresponding to the set of processing nodes; determining a next information query time associated with a current processing node of the set of processing nodes based at least in part on a predicted measure of time of the set of predicted measures of time corresponding to the current processing node; in response to occurrence of the next information query time, sending an information query request to the server; and receiving an information query response from the server, wherein the information query response includes a current business service processing status information associated with the business service.
US09911145B2 Automatic sharing of a receipt with a place of employment
A method is disclosed for a customer sharing a receipt with other persons. An electronic receipt may be viewed on a mobile electronic device with electronic receipts software thereon. A customer may select the receipt for sharing as well as selecting modifications to the receipt and persons to share the receipt with. Information may be sent to a server or computer system to request that a receipt be shared. The server may then process the request and transmit receipt information to the contact person requested by the customer. The receipt may be shared via data transfer, facsimile or email, or may be shared through a receipts management software or application.
US09911144B1 System and method for targeting information based on message content in a reply
A method of presenting information to a party through a messaging application is described. Responsive to receipt of a communication from a party (e.g., the first user), a reply is sent. The communication and the reply is presented in an interface to the sender. The messaging system determines matching content that is relevant to one or both of the communication and the reply and determines a quality of the match. Determining the quality of the match may include determining a score for an advertisement based on the advertisement's responsiveness to content identified in the reply message that was sent. Based on a determination that the quality is above a threshold, the matching content is presented along with the communication and the reply.
US09911139B2 System and method for sharing quotes in a social networking environment
A first computing device operated by a first user of a social networking system sends a quote attributed to a second user of the social networking system to a server device. The server device receives input from a second computing device operated by a second user indicating the consent of the second user to sharing the quote with selected other users of the social networking system. The server device shares the quote with the selected other users of the social networking system in response to receipt of the consent of the second user.
US09911138B2 Automated limited-time retail merchandise promotion system
A computer-automated system is disclosed for promoting specifiable items of merchandise in a retail shopping facility for specifiable time periods. The automated promotion system enables a customer with an appropriately configured mobile device to avail of promotional prompts within the shopping facility electronically (i.e., within the specified time period), substantiating redemption of a related benefit at checkout (i.e., within or beyond the specified time period). The system has three principal components: a source, a node, and a checkpoint. The source enables a retailer to script the parameters of the promotion (e.g., the duration, benefit, and relevant merchandise). The node—preferably, an electronic shelf label—provides means for publishing the promotion to a customer pursuant to information entered by the retailer at the source. The checkpoint consummates the promotion.
US09911137B2 Reactive signage
According to one aspect, embodiments of the invention provide a reactive display system comprising a display channel, data storage coupled to the display and configured to store pre-determined and reactive messages, a sensor configured to monitor at least one variable of an area within which the system is located, and a controller coupled to the sensor, data storage and the display, wherein the controller is configured to operate data storage and the display channel to display at least one pre-determined message in a first mode of operation, and wherein the controller is further configured to operate data storage and the display channel to display at least one reactive message in a second mode of operation in response to an indication from the sensor that the at least one variable has changed.
US09911133B1 Customer loyalty tiers with reduced latency state updates
Systems and methods are described herein for supporting loyalty tiers. According to certain aspects, a custom number of loyalty tiers may be specified. Dynamic tier boundaries may be defined for each tier based upon a specified number of loyalty points, a percentile of total loyalty points, or a combination thereof. Periodic recomputing of tier boundary values can support dynamic loyalty tiers. According to certain other aspects, a user loyalty status may include a current tier and a pending tier. User loyalty points may be updated for a current loyalty activity. The updated user loyalty points may be compared with a point boundary for the pending tier and the user may be updated to the pending tier. Transacting the tier update with the server may be bypassed to reduce tier update latency. Also, immediate access at the client to features associated with the updated current tier may be supported.
US09911132B2 System and method for searching, organizing, exploring and relating online content
The present invention generally relates to a web-based system and method for searching, organizing, exploring and relating online content. Specifically, the present invention relates to a unique way to store and relate different types of media to each other. Embodiments of the present invention provide users the ability to identify and save content in a remote location where a remote computing device processes and uses the saved content to dynamically identify and update the content and secondary content associated with the content. Further embodiments of the present invention further allow for the organization and curation of content as well as provide a platform for searching and identifying new content based on the saved content.
US09911126B2 Refreshing advertisements in offline or virally distributed content
A method, apparatus, and system are directed towards providing advertisement insertions at a point of consumption into digital content, such as broadcast television content. A content provider may initially mark the content for advertisement insertion, and create a metadata file indicating constraints, targets, expirations, or the like. A downstream user employs a plug-in component and provides an initial user profile, in part, to access the content with advertisements. As the content is played, and an advertising marker is encountered, fast forwarding or other skipping features are disabled, and an advertisement stream is spliced into the content stream. The advertisement stream is determined based on the user profile and/or other metadata. Moreover, the advertisement stream may be obtained over a network such that advertisements may be refreshed even years after the content has been acquired by the user. In one embodiment, the advertisement consumption may be tracked and reported.
US09911125B2 Preventing contact by locking
Embodiments of the invention relate to systems, methods, and computer program products for preventing a customer communication by locking access to customer information. The system, method, and computer program product are configured to a) identify information relating to an event or condition that triggers a lock of customer information associated with a customer; b) lock at least a portion of the customer information associated with the customer based at least partially on the identifying; and c) generate a notification indicating that at least the portion of the customer information associated with the customer is locked based at least partially on the locking.
US09911123B2 User interface for payments
The present disclosure relates to making payments with a mobile device. In one example process, the mobile device receives and stores information for one or more payment accounts on the mobile device. The mobile device is used to make payments using the payment accounts. In some examples, authorization to proceed with a payment is performed before each purchase made by the user. The authorization process can include receiving a verification of the user, such as a fingerprint scan or passcode. In some examples, a payment account is selected from among available payment accounts. In some examples, an indication is displayed of a digital item associated with a purchased item. In some examples, a payment transaction is initiated with participants of an ongoing communication. In some examples, an application of a retailer is invoked based on the availability of the application. In some examples, a purchase recommendation is provided.
US09911119B2 Multi-currency cart and checkout
Example embodiments provide a multi-currency cart and checkout. In example embodiments, a currency accepted and a payment option for each item in a multi-currency cart is identified. A plurality of currency groups is generated based on the currency and payment options, whereby each currency group comprises one or more items having a same payment option and accepting a same currency. A multi-currency checkout user interface (UI) is presented on a client device that presents the plurality of currency groups and a pay selector for each of the plurality of the currency groups. An updated multi-currency checkout UI is presented in response to processing payment for a selected one of the plurality of currency groups. The updated multi-currency UI comprises a confirmation for payment for the selected one of the plurality of currency groups and remaining currency groups of the plurality of currency groups.
US09911114B2 Methods and systems for making a payment via a stored value card in a mobile environment
Methods and systems for making a financial payment to a payee via a stored value (SV) card utilizing a mobile device such as a mobile telephone (cellphone) or wireless connected personal digital assistant (PDA). The mobile device communicates wirelessly with a mobile financial transaction system (MFTS) that stores user information and transaction information. A user enters information via the mobile device identifying a payee and indicating a stored value card payment method. The mobile device generates a mobile payment instruction that includes information corresponding to the identified payee and indicating a stored value card payment method. The mobile payment instruction is wirelessly communicated to the MFTS. The MFTS generates an MFTS payment instruction to a payment instruction recipient that can issue a new stored value card and/or reload funds onto a pre-existing stored value card. The MFTS communicates the MFTS payment instruction to the payment instruction recipient, which arranges for payment to the identified payee by issuing a new stored value card or reloading funds onto a pre-existing stored value card.
US09911112B2 Continuous shrink reduction system sensitivity adjustment
Various embodiments herein each include at least one of systems, methods, software, and devices, such as product scanners (e.g., barcode scanners), that continuously adjust fraud-detection sensitivity levels of fraud-detection processes. Adjustments of fraud-detection sensitivity levels are made to maximize actual fraud detection while also minimizing false detections based on changing environmental, transaction, and customer and employee behavioral conditions and factors.
US09911110B2 Predicting approval of transactions
Method, systems, and apparatus for processing a payment transaction includes determining that a network connection between a first destination in a payment system and a second destination in a payment system does not satisfy a latency threshold; receiving data indicating a payment transaction between a customer and a merchant; determining whether the payment transaction should be stored, where the determining is based on a risk algorithm model that considers risk factors associated with data regarding the payment transaction, risk factors associated with data regarding the customer, and risk factors associated with data regarding the merchant; if the payment transaction should be stored: storing the payment transaction for future processing; displaying an indication that the payment transaction has been successfully processed; if the payment transaction should not be stored: attempting to send a request for authorization for the payment transaction at a payment service system included in the payment system.
US09911099B2 Methods and systems for managing an electronic calendar
Methods and systems for managing an electronic calendar are described. One exemplary method includes displaying a calendar on a display device, the calendar having at least one time range, and displaying an invitation, before it is accepted, on the calendar in the at least one time range with other events which are already accepted. Another exemplary method includes displaying a calendar on a display device and displaying a list of user-selectable calendars comprising an invitation calendar which presents invitations which have not yet been accepted or declined on the invitation calendar. Other methods are described, and machine readable media and systems are also described.
US09911097B2 Out of stock item tracking at retail sales facilities
In some embodiments, methods and systems of locating overstock items at a retail sales facility include receiving an indication that a product at the retail sales facility is out of stock and determining whether the product is located on a sales floor or in the stock room at the retail sales facility; then, in response to a determination that the product is not located on the sales floor or in the stock room, tracking a location of the product based on at least one inventory management factor associated with the retail sales facility and at least one worker task event associated with the product; and outputting to a worker at the retail sales facility, based on the tracking of the location of the at least one product, an indication of a perceived location of the least one product.
US09911096B2 Automated electronic management system for international trade, logistics and pre-shipment inspection
A computerized system and method are provided for managing an inventory of cargo containers through the loading and pre-shipment inspection process. The computerized system may be an in-house programmed solution for realtime exchange of information in an organized manner between exporter and importer. The data and photographic documentary are automatically compiled into a formatted property inspection report that is automatically uploaded to a cloud-based server system. The photographic documentary is combined with other essential information including booking number, container number, seal number, weight, and company reference number, and made accessible at a web-based interface for turnkey management of an inventory of cargo containers.
US09911095B2 Monitoring and reporting a liquid level of a commodity in a tank
Techniques for monitoring and reporting a liquid level of a commodity in a tank includes measuring a commodity level in the tank using a tank meter and transmitting information indicating the commodity level to a server. A user may access the information from a user interface of a device to view the commodity level of the tank, informing the user of whether the commodity level is low. A provider of the commodity may receive a notification when the tank level is low. Information about the location of the tank may be used to schedule a future delivery of the commodity to one or more tanks.
US09911087B1 System and method for efficient travel time and route computation
A system and method efficiently computes travel times between an origin and destination, minimizing expensive calls to a third party service by first geographically expanding both origin and destination and then searching a cache of previously computed or obtained travel times for any route satisfying the expanded origin and destination. A further embodiment concerns a system and method to prepare an optimized routing sequence to travel to a set of geographical task sites, in satisfaction of applicable conditions for one or more of the task sites. Advantageously, optimized routing may employ the disclosed method of computing travel times between origin and destination.
US09911086B2 System and methods for variable distribution and access control for purchased event tickets
A system and methods for providing variable distribution and access control for purchased event tickets are described. In one embodiment, a network-based system receives an order for electronic tickets purchased by a buyer, receives one or more recipients other than the buyer for one or more of the electronic tickets, receives delivery options for the recipients from the buyer, receives delivery information for the recipients from the buyer, and delivers electronic ticket information to the recipients. Other embodiments are described and claimed.
US09911083B2 Automated defect and optimization discovery
Performance information and configuration information is received for the plurality of computer systems. The computer systems are grouped into a plurality of clusters based at least in part on the performance information, where the plurality of clusters includes a first cluster and a second cluster. A system configuration associated with the first cluster is automatically identified from the configuration information and is automatically sent to the second cluster.
US09911080B2 Self-organizing logic gates and circuits and complex problem solving with self-organizing circuits
Self-organizing logic gates formed from a combination of memristor devices and dynamic correction modules configured to provide a stable operation upon application of a signal to any terminal. A SOLG of the invention can accept signals from any terminal and does not require an absence of signals at any other terminal. Terminal signals can superpose and the gate finds equilibrium, if an equilibrium exists.
US09911078B2 Card and corresponding method of manufacture
A card has: a substrate of ID-1 format according to the ISO 7810 standard; and at least one electronic component arranged on the substrate, all or part of said at least one electronic component being disposed in at least one of the two embossing regions defined in the ISO 7811-1 standard as regions in which embossed characters can be formed on the substrate; an encapsulation of the unit comprising the substrate and said at least one electronic component; such that the thickness of the card at the level of said embossing regions does not exceed 1.32 mm.
US09911076B2 Rectification circuit, power source circuit, and RFID tag
A rectification circuit has a first terminal to which an alternating-current voltage is input from an antenna, a second terminal to which a direct-current voltage is input from the antenna, a first rectification element, a second rectification element, and a voltage rectification circuit. The first rectification element is connected between the first terminal and the second terminal, causes a current to flow in a first direction from the first terminal to the second terminal, and cuts off a current in a second direction from the second terminal to the first terminal. The second rectification element is connected between the first terminal and the second terminal, causes a current to flow in the second direction, and cuts off a current in the first direction. The voltage rectification circuit outputs a rectified voltage obtained by rectifying a voltage that is input between the first terminal and the second terminal.
US09911065B2 System and method for processing image data
The PLACEMETER PLATFORM APPARATUSES, METHODS AND SYSTEMS (“PM-PLATFORM”) transform sensor data and/or feedback via PM-PLATFORM components into notifications, updates, coupons, promotions, transactions and/or activities notifications, updates, coupons, promotions, transactions and/or activities. In one implementation, the PM-PLATFORM comprises a sensor, a memory, and a processor disposed in communication with the sensor and memory, the memory storing processor-issuable instructions to receive raw environment data at a sensor for at least two discrete points in time, analyze the received raw environment data locally to determine an at least one occupancy metric, store the occupancy metric, receive further raw environment data for a further point in time, process the further raw environment data to determine a further occupancy metric, compare the further occupancy metric to at least one previous occupancy metric, and issue a notification based on the comparison.
US09911064B2 Image display device and method
Provided is a technique for reducing the amount of calculation and storage costs when an alignment process and/or an image quality correction process is performed on a plurality of radiological images in order to perform comparative reading. A correction amount calculation unit 22 calculates a correction amount for matching the position and/or image quality of radiological images other than a reference radiological image among a plurality of radiological images including the same photographic subject with the position and/or image quality of the reference radiological image for each of the other radiological images. A storage processing unit 28 stores the correction amount for each of the other radiological images so as to be associated with the reference radiological image.
US09911055B2 Method and system for detection and classification of license plates
Methods, systems, and processor-readable media for the detection and classification of license plates. In an example embodiment, an image of a vehicle can be captured with an image-capturing unit. A license plate region can then be located in the captured image of the vehicle by extracting a set of candidate regions from the image utilizing a weak classifier. A set of candidate regions can be ranked utilizing a secondary strong classifier. The captured image can then be classified according to a confidence driven classification based on classification criteria determined by the weak classifier and the secondary strong classifier.
US09911054B2 Foldable display device displaying stored image by folding or unfolding action and method of therefor
The present specification discloses a foldable display device displaying stored images by a folding or unfolding action of a foldable housing and a method of controlling therefor. The foldable display device according to the present specification includes a display unit including a first display area spatially or visually separated by the folding or unfolding action of the foldable housing. When the first display area changes a state from a state of facing a second direction (e.g., user direction) to a state of facing a first direction (e.g., third party direction), stored images are displayed on the first display area. By doing so, a third party can easily check the stored images displayed on the first display area.
US09911053B2 Information processing apparatus, method for tracking object and program storage medium
Provided is a technology which enables early removal from a tracking target of an object unnecessary to be tracked and which, together therewith, when the tracking target is temporarily in a state of being not detected, enables continuous tracking of the relevant tracking target without removing it from the tracking target.A detection unit 2 detects, as a tracking candidate, an object included in an image by using image processing. A corresponding degree calculation unit 3 calculates a corresponding degree which is index representing a probability that the detected tracking candidate corresponds to the tracking target registered as an object to be tracked. When having determined that it is unnecessary to track the tracking target based on an evaluation value calculated by using the corresponding degree, a decision unit 4 deletes the registration of the object to be tracked with respect to the relevant tracking target.
US09911052B2 System and method for superimposed handwriting recognition technology
A system and method is able to recognize a user's natural superimposed handwriting without any explicit separation between characters. The system and method is able to process single-stroke and multi-stroke characters. The system and method can also process cursive handwriting. Further, the system and method can determine the boundaries of input words either by the use of a specific user input gesture or by detecting the word boundaries based on language characteristics and properties. The system and method analyzes the handwriting input through the processes of segmentation, character recognition, and language modeling. These three processes occur concurrently through the use of dynamic programming.
US09911051B2 Method and apparatus for confirmation of relevant white inner circle in environment of circular traffic sign recognition
The present invention relates to an apparatus for confirming circular traffic sign recognition including: an image acquisition unit configured to photograph a front of a vehicle using a camera to acquire a front image; a sign recognition unit configured to detect circular shapes indicating circles of objects in the front image, classify traffic sign circles indicating a traffic sign for the circles, and recognize the circular traffic sign; and a control unit configured to confirm the circular traffic sign recognition using a white inner circle and inform a driver of contents of the confirmed circular traffic sign.
US09911044B2 Irregular event detection in push notifications
Systems and methods of detecting irregular events include the extraction of values for measure in each of a plurality of notifications. The extracted values are stored in a measures database and a distribution is calculated for the values of each of the measures. The extracted values are compared to the calculated distributions to determine if an irregular event has occurred. An irregularity alert is produced if an irregular event has occurred.
US09911042B1 Real property image analysis system to identify similar properties
Systems and methods for analyzing image data depicting properties are disclosed According to certain aspects, an electronic device may analyze image data depicting a property to identify a set of attributes of the property. The electronic device may identify, based on the set of attributes, an architectural style of the property. Further, the electronic device may identify at least one additional property having the same architectural style. Data indicative of the at least one additional property may be presented to a user for viewing and assessment.
US09911039B1 Searches over graphs representing geospatial-temporal remote sensing data
Various technologies pertaining to identifying objects of interest in remote sensing images by searching over geospatial-temporal graph representations are described herein. Graphs are constructed by representing objects in remote sensing images as nodes, and connecting nodes with undirected edges representing either distance or adjacency relationships between objects and directed edges representing changes in time. Geospatial-temporal graph searches are made computationally efficient by taking advantage of characteristics of geospatial-temporal data in remote sensing images through the application of various graph search techniques.
US09911037B2 System and method of feedback for attention and concentration
A system and method of tracking a viewer's focus and attention by displaying an object on a screen and instructing the user to look at such object. A camera captures an image of an eye of the user as he looks at the object, and then captures one or more further images of the eye of the user to determine when or if the user looked away from the object. A duration of time during which the user looked at the object may be used as a measure of focus or attention of the user.
US09911035B2 Method for evaluating a document
A method is provided for evaluating a document, including the following steps: providing an image data connection for transmitting an image signal between a second data processing device, which includes an image recording device, and a first data processing device, recording a transaction identification number associated with user data in the first data processing device, transferring user data to the first data processing device, recording a document by means of the image recording device and transmitting an image of the document to the first data processing device by means of the image data connection, evaluating the document, and storing the result of the evaluation with the transaction identification number and the user data in a database.
US09911032B2 Tracking hand/body pose
Tracking hand or body pose from image data is described, for example, to control a game system, natural user interface or for augmented reality. In various examples a prediction engine takes a single frame of image data and predicts a distribution over a pose of a hand or body depicted in the image data. In examples, a stochastic optimizer has a pool of candidate poses of the hand or body which it iteratively refines, and samples from the predicted distribution are used to replace some candidate poses in the pool. In some examples a best candidate pose from the pool is selected as the current tracked pose and the selection processes uses a 3D model of the hand or body.
US09911029B2 Underlay body for acquisition of handwriting information
An underlay body includes a surface on which a writing medium is placed, and a sensor that detects a pressure distribution on the surface.
US09911028B2 Image acquisition device and image acquisition method for image acquisition device
In this image acquisition device, a stage driving unit moves a position of a field of view of an objective lens relative to a sample at a predetermined velocity, and a two-dimensional imaging element sequentially captures an optical image of the sample at a predetermined frame rate. Therefore, time required for acquiring partial images over the entire sample is shortened. Further, in this image acquisition device, the moving velocity of the position of the field of view is a velocity set based on a frame rate of the imaging element. Therefore, the movement of the position of the field of view and the imaging of the imaging element are synchronized with each other, and it is possible to capture only necessary partial images.
US09911027B2 Fingerprint authentication system, fingerprint authentication program and fingerprint authentication method
An object of the present invention is to provide a fingerprint authentication system, a fingerprint authentication program and a fingerprint authentication method that can achieve high-speed processing.A fingerprint authentication system includes a plurality of stages (n+1 stages) of indexes, a registration part in which fingerprint data FD is registered as fingerprint data TFD according to the indexes, and a checking device that checks the fingerprint data FD against the registered fingerprint data TFD based on the indexes. The fingerprint data TFD can be classified into groups, the processing speed can be increased even if there is a large number of pieces of fingerprint data TFD registered.
US09911024B2 Systems and methods for decoding two-dimensional matrix symbols
Systems and methods for reading a two-dimensional matrix symbol or for determining if a two-dimensional matrix symbol is decodable are disclosed. The systems and methods can include a data reading algorithm that receives an image, locates at least a portion of the data modules within the image without using a fixed pattern, fits a model of the module positions from the image, extrapolates the model resulting in predicted module positions, determines module values from the image at the predicted module positions, and extracts a binary matrix from the module values.
US09911022B2 Barcode-reading system
This patent specification describes a barcode-reading system for a mobile device. The mobile device includes a camera and a white illumination source on the backside of the mobile device. The system includes a barcode reading accessory with at least one reflective surface folding both the field of view of the camera and the field of illumination of the mobile device towards a target area beyond the top side of the mobile device.
US09911015B2 Methods for prolonging battery life in toll transponders
A transponder, such as an electronic toll transponder, is configured to recognize when it is being subjected to consistent and repeated trigger signals over an extended period of time and, in response, the transponder enters a reduced-responsiveness state. In the reduced-responsiveness state, the transponder may only intermittently respond to detected trigger signals. The transponder may recognize when the repeated trigger signal situation has been resolved and then return to normal responsiveness.
US09911014B2 Method of transferring data, computer program product and tag
There is disclosed a method of transferring data using a tag, said tag comprising an RF interface unit, a host interface unit and a memory, the method comprising: the RF interface unit connects the tag to an RF device; the host interface unit connects the tag to a host device; the tag enters into a pass-through mode; in said pass-through mode, the tag transfers data, either in a first configured transfer direction, from the RF device to the host device, or, in a second configured transfer direction, from the host device to the RF device; in said pass-through mode, the tag buffers said data in the memory. Furthermore, a corresponding computer program product and a corresponding tag are disclosed.
US09911012B2 Overlapping, discrete tamper-respondent sensors
Tamper-respondent assemblies, electronic assembly packages, and methods of fabrication are provided which include multiple, discrete tamper-respondent sensors that overlap, at least in part, and facilitate defining a secure volume about one or more electronic components to be protected, such as an electronic assembly. The tamper-respondent sensors include a first tamper-respondent sensor and a second tamper-respondent sensor, which may be similarly constructed or differently constructed. In certain embodiments, the tamper-respondent sensors wrap, at least in part, over an electronic enclosure, and in other embodiments, the tamper-respondent sensors cover, at least in part, an inner surface of an electronic enclosure to facilitate defining a secure volume in association with a multilayer circuit board to which the electronic enclosure is mounted.
US09911008B2 Microprocessor with on-the-fly switching of decryption keys
A microprocessor is provided in which an encrypted program can replace the decryption keys that are used to decrypt sections of the encrypted program. The microprocessor may be decrypting and executing a first section of the encrypted program when it encounters, decrypts, and executes an encrypted store-key instruction to store a new set of decryption keys. After executing the store-key instruction, the microprocessor decrypts and executes a subsequent section of the encrypted program using the new set of decryption keys. On-the-fly key switching may occur numerous times with successive encrypted store-key instructions and successive sets of encrypted instructions.
US09911007B2 Redundant fail-safe synchronization in a data authentication infrastructure
A distributed hash tree-based authentication system for digital input records has more than one upper-level core node, each of which receives at least one uppermost value from aggregators. Communicating with each other about which aggregator values they have received, the nodes try to reach agreement as to which of these values should be included in duplicated current intra-node hash tree evaluations so as to form a consistent top-level value used as the basis for digital signatures associated with the digital input records.
US09911004B2 Cloud-based hardware architecture
A federated in-memory database system (FIMDB) and a method for operating the same. The system comprises: A plurality of interconnected computing sites (LS), each installed with a local in-memory database instance, which is configured to connect to a FIMDB landscape instance; central computing infrastructure, provided by a service provider (SP), which grants access to algorithms managed by the service provider (SP) for execution on local data of the respective consuming computing site (LS); one or more communication channels (LSG1, LSG2), which are specifically adapted for connecting local and remote computing hard- and software via a digital communication channel; and configuration adjuster (CM), which are specifically adapted for configuring local hard- and software to connect to the FIMDB system (FIMDB) and for configuring local hard- and software in order to access algorithms managed by the service provider (SP) and execute them on the local computing hardware.
US09911003B2 Dynamic data masking of post-output database data
Dynamic data masking by intercepting data derived from a database, creating a tabular representation of the data, and masking any of the data in accordance with a masking policy that specifies which of the data are to be masked if a masking condition is met, where the masking condition references the tabular representation of the data using a tabular positional reference.
US09910997B1 Secure credential storage
Securing a credential is disclosed. A reference to the credential that will provide access to a service is stored in a credential store. The credential from the credential store is provided to an application execution platform having access to the credential store. The application execution platform includes an interface to access the service using the credential. Application code that references the credential stored in the credential store is stored in a code repository.
US09910993B2 Simulation and virtual reality based cyber behavioral systems
A cybersecurity system for managing cyber behavior associated with cyber actors such that the cyber behavior can be computed and predicted and cyber interactions between the cyber actors can be created. The system includes a cyber behavioral space management module configured to receive input data, and data from the interaction engine and the analytic workflow engine, and to generate a plurality of cyber behavioral spaces based on the received data. The system includes an interaction engine configured to process cyber actor data to facilitate interactions with the cyber behavioral space, a cyber scene, a cyber map, and another cyber actor. The system includes an analytic workflow engine configured to analyze the cyber behavioral spaces and update cyber data based on the analyzed data and the interaction engine data. The system includes a visualization engine configured to compute visualizations and transmit the visualizations for display.
US09910980B2 Cyber security
Systems and methods that use probabilistic grammatical inference and statistical data analysis techniques to characterize the behavior of systems in terms of a low dimensional set of summary variables and, on the basis of these models, detect anomalous behaviors are disclosed. The disclosed information-theoretic system and method exploit the properties of information to deduce a structure for information flow and management. The properties of information can provide a fundamental basis for the decomposition of systems and hence a structure for the transmission and combination of observations at the desired levels of resolution (e.g., component, subsystem, system).
US09910979B2 Intercepting inter-process communications
Intercepting inter-process communications by determining a first computer memory location of an inter-process communications function of an instance of a virtual machine and causing an interception function at a second computer memory location to be called when a computer software application calls the inter-process communications function.
US09910971B2 System and method of interlocking to protect software-mediated program and device behaviours
Methods and devices for thwarting code and control flow based attacks on software. The source code of a subject piece of software is automatically divided into basic blocks of logic. Selected basic blocks are amended so that their outputs are extended. Similarly, other basic blocks are amended such that their inputs are correspondingly extended. The amendments increase or create dependencies between basic blocks such that tampering with one basic block's code causes other basic blocks to malfunction when executed.
US09910966B2 System and method of increasing sample throughput
Technologies for increasing sample throughput by predicting the end point response time of a sensor for the analysis of an analyte in a sample are disclosed. In one aspect, a system includes a sensor that generates data signals associated with the measurement of an analyte within the sample. A processor records appropriate data points corresponding to the signals, converts them to a logarithmic function of time scale, and plots the converted data points. The processor then determines a curve that fits the plotted data points and determines a curve fitting equation for the curve. Once the equation is determined, the processor extrapolates an end point response of the sensor using the equation. A value, such as analyte concentration, is then calculated using the extrapolated end point response.
US09910964B2 Methods and systems using mathematical analysis and machine learning to diagnose disease
Exemplified method and system facilitates monitoring and/or evaluation of disease or physiological state using mathematical analysis and machine learning analysis of a biopotential signal collected from a single electrode. The exemplified method and system creates, from data of a singularly measured biopotential signal, via a mathematical operation (i.e., via numeric fractional derivative calculation of the signal in the frequency domain), one or more mathematically-derived biopotential signals (e.g., virtual biopotential signals) that is used in combination with the measured biopotential signals to generate a multi-dimensional phase-space representation of the body (e.g., the heart). By mathematically modulating (e.g., by expanding or contracting) portions of a given biopotential signal, in the frequency domain, the numeric-based operation gives emphasis or de-emphasis to certain measured frequencies of the biopotential signals, which, when coupled with machine learning, facilitates improved diagnostics of certain pathologies.
US09910961B2 Second opinion network
Systems and methods are provided to facilitate consultations between a referral source (e.g., labs, pathologists and patients) and a consultant (e.g., pathologist, radiologist, or other digital image analyst). Links between the various referral sources and consultants are established through a scanning center via a data communication network such as the Internet. The referral source sends a slide to the scanning center where the corresponding digital slide is posted for review and analysis by the consultant. Upon completion of the analysis and report, a digital slide conference is conducted through the scanning center that provides a venue for direct communication regarding the consultation. The scanning center may also facilitate payment from the referral source to the consultant.
US09910958B2 Method and device for displaying a first image and a second image of an object
The positions of the images and a display mode of at least two images of an object are selected based on a comparison of a provided distance value between the edges of the two displayed images and a distance threshold value. By continuously varying the distance value, the corresponding images and the display mode are adapted to an actual distance value.
US09910957B2 Visualization, sharing and analysis of large data sets
Systems and methods for visualization, sharing and analysis of large data sets are described. Systems and methods may include receiving an input data set, wherein the input data set includes data that can be classified in classification dimensions wherein a first classification dimension is a linear ordering of data entries and a second classification dimension represents analysis criteria, traits of the data entries, or aspects of the data entries; obtaining an unabridged data table listing results for each combination of coordinates in the first classification dimension and the second classification dimension; and displaying contents of the unabridged data table as a visual array wherein two axes correspond to the coordinates and a third axis corresponds to a third classification dimension, wherein the third classification dimension represents an actual value of the respective data point for the coordinates. Methods may also assess the visual array, such as by identifying one or more regions of high density of signals.
US09910953B2 Metrology target identification, design and verification
A metrology design and verification framework is provided, which includes methods and systems for metrology structure identification in an integrated circuit design data block, design rule checking, hierarchal design of metrology target structures to minimize random errors, and metrology design rule verification of metrology target design files. In-die metrology targets are identified using various filtering methods and/or designed as hierarchical structure within dies or outside the dies. Particularly, metrology target design files are generated, which are hierarchical in structure and compatible with design rule checks. Design rule check takes into account the hierarchical and often repetitive target designs in the verification process. Layouts may be verified using design rule checks at different levels of design rules, which may be combined to remove rule violations and errors prior to actual target production.
US09910947B1 Methods, systems, and articles of manufacture for implementing an electronic design with solid-fluid analysis driven techniques
The described techniques implement electronic designs with thermal analyses of the electronic design and its surrounding medium by performing thermal modeling that determines at least a thermal RC network for an electronic design. These techniques further generate a thermal network for the electronic design and one or more surrounding media of the electronic design and generate or modify the electronic design with an implementation process at least by guiding the implementation process based in part or in whole upon results of performing one or more thermal analysis on the thermal network.
US09910944B2 X-propagation in emulation using efficient memory
Embodiments relate to the emulation of circuits, and representation of unknown states of signals. A disclosed system (and method and computer program product) includes an emulation environment to convert a digital signal of a DUT in a form capable of representing an unknown state. In addition, the disclosed system converts digital logic circuits such as Boolean logic, flip flops, latches, and memory circuits to be operable with signals having unknown states. Thus, an unknown state of a signal is indicated and propagated through digital logic circuits represented in a disclosed semantic to enable prompt detection of improper operation of the DUT, for example, due to power shut down or inadequate initialization.
US09910941B2 Test case generation
Embodiments of the present invention provide methods, computer program products, and systems for generating comprehensive test cases covering new events yet to be covered. Embodiments of the present invention can be used to receive a request to generate a test case, wherein the request comprises a coverage schema associated with a first set of events to be covered in the generated test case. Embodiments of the present invention includes updating the coverage schema, wherein the updating the coverage schema comprises adding a second set of events to be covered in the generated test case and generating constraints used to satisfy requirements for meeting the first set of events and the second set of events in the updated coverage schema. Embodiments of the present invention can generate a test case using the generated constraints and the updated coverage schema.
US09910939B2 Characterization of graphical representation of numerical simulation results
Methods of characterizing or classifying graphical representation of numerical simulation results are disclosed. A training database is created in a computer system by including a plurality of graphical representations of respective results obtained from a plurality of numerical simulations. Each graphical representation is associated with a textual description of a pertinent feature related to the numerical simulations by user. A quality index with respect to the associated textual description is calculated for each graphical representation by application module using an autocorrelation technique of correlating all graphical representations with one another in the training database. A new graphical representation obtained from another numerical simulation can then be characterized with one of the textual descriptions and a corresponding confidence score by comparing the new graphical representation with all graphical representations in the training database. The training database may be improved by adding or removing appropriate graphical representations in accordance with predefined criteria.
US09910935B2 System and workstation for the design, fabrication and assembly of bio-material constructs
A bioassembly system having a tissue/object modeling software component fully and seamlessly integrated with a robotic bioassembly workstation component for the computer-assisted design, fabrication and assembly of biological and non-biological constructs. The robotic bioassembly workstation includes a six-axis robot providing the capability for oblique-angle printing, printing by non-sequential planar layering, and printing on print substrates having variable surface topographies, enabling fabrication of more complex bio-constructs including tissues, organs and vascular trees.
US09910934B2 Method, apparatus and computer program product for providing an information model-based user interface
An apparatus for providing an information model-based user interface may include a processor. The processor may be configured to access, for a particular object associated with a first application, relationship data defining one or more related objects associated with the particular object on the basis of metadata, provide for a presentation of the one or more related objects, and, in response to selection of one of the related objects, enable presentation of the selected related object via execution of an application associated with the selected related object if the application is different than the first application. A corresponding computer program product, method, and user interface are also provided.
US09910932B2 System and method for completing a user query and for providing a query response
There is disclosed a method and a system for completing a search query. The method is executable at a server. The method comprises receiving a portion of the search query from an electronic device associated with a user; determining a query-completion suggestion for the received search query portion, the query-completion suggestion based on information searchable within a vertical search domain; determining the most suitable response to the query based on information maintained within the vertical search domain; causing the electronic device to display the user a suggest line, the suggest line including both: (i) the query-completion suggestion and (ii) representation of the most suitable response to the query.
US09910929B2 Web browser-based content management system
A web browser-based content management system which includes a web browser; a web server engine embedded into the web browser so that the web browser has web server functionality, the web server engine having web server, database and scripting language components; and a content management system to support the creation, collection, management and publication of digital content, the content management system deployed on the web browser embedded web server to provide a web browser-based content management system. Also included is a browser to browser content sharing system.
US09910928B2 Browser interaction for lazy loading operations
A system and method for enhancing a lazy loading operation is disclosed. The system and method, in general, retrieves a plurality of subsets of a dataset via the lazy loading operation and increments a counter for each of the plurality of subsets retrieved by the processor. Then, the system and method detects a first event that navigates away from the retrieving of the plurality of subsets and also detects a second event that navigates back to the retrieving of the plurality of subsets. Next, the system and method returns to the retrieving of the plurality of subsets in accordance with the counter in response to the detecting of the second event.
US09910925B2 Managing searches for information associated with a message
A processor executes program instructions for managing information about a product to search documents for a location of a message of the product using a set of rules that are based on instructions for generating the message. The instructions are in a resource of the product. The processor then adds the location to an index of locations of the message in the documents.
US09910922B2 Analysis of user's data to recommend connections
One or more files associated with a user are scanned. Metadata corresponding to the one or more files is determined. One or more categories based on the one or more files is determined, wherein the one or more categories is associated with the user. One or more categories are modified based on the metadata corresponding to the one or more files.
US09910920B2 Relevant multimedia advertising targeted based upon search query
A facility for processing a search query is described. The facility identifies one or more items that satisfy the query, at least one of which is a media sequence. For each identified media sequence, the facility identifies an advertising message based upon the contents of the query. In response to the query, the facility returns a search result that indicates the identified items. When one of the identified media sequences is selected in the search result, the selected media sequence is provided in conjunction with the advertising message identified for it.
US09910913B2 Ingestion planning for complex tables
Embodiments of the present invention disclose a method, computer program product, and system for generating a plan for document processing. A plurality of electronic documents are received from a data store. The plurality of electronic documents are analyzed. Textual data within the identified tabular data are identified, by performing a first natural language search of the analyzed plurality of electronic documents. Textual hints are generated, where the generated textual hints are mapped to a lookup set. References are identified, and a count of identified references are determined. A priority score is calculating based on the count of identified references. In response to receiving a priority score modifying value, a modified priority score is calculated. Ingestion plans are generated based on the modified priority score. Generated ingestion plans are communicated by the computer using the network.
US09910911B2 Computer implemented methods and apparatus for implementing a topical-based highlights filter
Disclosed are methods, apparatus, systems, and computer readable storage media for filtering content to be displayed in an online social network. Highlights from a plurality of highlight sources relevant to a first user can be received. Topics or other subject matter associated with the received highlights can be identified and social network data to be presented to the first user can be determined based on the identified subject matter. In some implementations, data indicating the determined social network data can be generated and provided to a display device associated with the first user. A presentation including a reference to the determined social network data can be displayed on the display device.
US09910910B2 Syntactic graph modeling in a functional information system
The invention relates to systems and methods using a logical data model for aggregating data entities in a functional information system supported upon a computing platform, and also for providing systems and methods for analyzing economic information using a functional coordinate system.
US09910902B1 Anonymizing user identifiable information
The disclosed techniques provide systems and methods for anonymizing various portions of information, action logs, end-user information, and/or other data sets that are stored in non-indexed storage systems. More specifically, various anonymization procedures are described for redacting UII and/or replacing UII in raw data with randomly generated information (RGI). The anonymization process is performed on a rolling basis as raw data is received. An anonymization mapping table maps (or associates) the replaced UII in the anonymized data to the RGI, and eventually all raw data can be deleted.
US09910901B2 Graphic representations of data relationships
Presenting a diagram indicating relationships among data items stored in a data management system includes: receiving a request that identifies a first data item stored in the data management system from a user interface; retrieving stored configuration information that includes a plurality of selection specifications for selecting data items in the data management system that are related to a given data item of a predetermined type, where each selection specification is associated with a different respective predetermined type; querying the data management system to identify a set of one or more data items according to a selection specification from the configuration information that is associated with a type of the first data item; for each of multiple returned data items in the identified set, querying the data management system to determine whether additional data items are identified according to a selection specification from the configuration information that is associated with a type of the returned data item; generating a diagram indicating relationships among data items identified using the configuration information; and presenting the generated diagram over the user interface.
US09910897B2 Systems and methods for color palette suggestions
A method and system for conducting image search comprising: searching a first database to locate a set of pertinent images, iteratively performing the following operations for each image in the set of pertinent images: (a) extracting the histogram of red green and blue colors (RGB colors) from a given image; (b) distilling the extracted RGB colors down to create a reduced color palette for the given image; (c) segmenting the extracted RGB colors into a set of segments representing distinct parts of the color spectrum; (d) selecting a subset of segments to assemble a color palette for the given image; and (e) updating the assembled color palette and the customer behavior score for the given image in the first database; and generating a display of suggested color palettes for the search query.
US09910895B2 Push subscriptions
Techniques are disclosed for delivering push subscription notifications in large scale distributed systems. Subscription notifications can be delivered to mobile devices of subscribing users by monitoring, at a server, an application database comprising a data record having one or more data values, detecting, at the server, in accordance with the monitoring, a changed data value, querying a subscription database for a subscription having at least one constant value to be compared to the changed data value in accordance with a trigger condition specified in a trigger template, determining whether the trigger condition is true using the changed data value and the constant value as the values of the first and second variables, respectively, in the at least one comparison; and pushing a notification from the server in response to the trigger condition being true.
US09910888B2 Map-reduce job virtualization
A method for map-reduce job virtualization is disclosed. The method includes receiving a map-reduce job written in a first map-reduce language. The map-reduce job is to be performed in parallel on a plurality of nodes of a plurality of clusters. The method also includes selecting one or more clusters to run the map-reduce job. The method further includes identifying a second map-reduce language associated with the selected clusters. The method also includes converting the first map-reduce language of the map-reduce job into the second map-reduce language. The method further causes the map-reduce job in the second map-reduce language to be run on the plurality of nodes of the selected clusters.
US09910882B2 Isolation anomaly quantification through heuristical pattern detection
In an approach for calculating a probability of a consistency violation of a transaction in a database management system, a processor receives a plurality of transactions within a predetermined time period. A processor identifies a first pattern in a first transaction of the plurality of transactions based on at least an isolation level of the transaction. A processor identifies a second pattern, wherein the second pattern is the cooperation between the first transaction and the second transaction. A processor determines that the first pattern of the first transaction substantially matches a preexisting pattern, wherein the preexisting pattern corresponds to values for a mathematical model for estimating a percentage of transactions in violation of consistency criteria. A processor extracts values from the first transaction based on the determined preexisting pattern. A processor calculates the mathematical model using the values from the first transaction and the values from the preexisting pattern.
US09910874B1 Scalable alerter for security information and event management
A methodology and related system operable to store a plurality of complex event processing (CEP) rules, the CEP rules being based on a plurality of events that are to be monitored. The CEP rules are pre-processed by, e.g., generating and storing a de-duplicated list of events from the plurality of events that are to be monitored. A received event from a received event stream is compared to events in the de-duplicated list of events and when a match between the received event (e.g., an event instance) and any one of the events in the de-duplicated list of events is detected, the received event (the event instance) is stored in an input repository. The plurality of CEP rules are then applied to the received event in the input repository, and any other previously stored events in the input repository.
US09910872B2 Grid based data mobility
A data migration system and method are disclosed for migrating data from a source server to a target server. The system includes an index containing a plurality of data migration operations in a normalized data model, each data migration operation being stored in association with an attribute, and a data mover communicably connected to the index. The data mover is adapted to move data from the source server to the target server in accordance with the data migration operations contained in the index. The data mover has an attribute corresponding to the associated attribute of at least one data migration operation contained in the index, the attribute indicating the type of data migration operations that can be performed by the data mover.
US09910870B2 System and method for creating data models from complex raw log files
According to some embodiments, a method and an apparatus of creating a data model from a log file comprises receiving a log file and determining metadata based on the received log file. A proposed data model based on the determined metadata is transmitted and the data model is saved to a database.
US09910869B2 Dropping columns from a table with minimized unavailability
Dropping of columns from a table with data availability, where the columns in the table are each associated with a column number, includes: executing a statement to drop a given column in the table and deferring an application of the statement until a reorganization of a current data set including the table. When the reorganization of the current data set is performed, the reorganization includes: updating column numbers for columns in each row of the table using a mapping data structure to remove the given column; loading the plurality of data rows with the updated column numbers into a shadow data set; applying to the shadow data set any changes to the table that are concurrent with the reorganization; updating a schema definition of the table with the updated column numbers; and switching the current data set to the shadow data set.
US09910868B1 Systems and methods for database index optimization
In one embodiment, a method includes selecting a plurality of indexes of a database table, receiving an indication of a set of index pairs in the plurality of indexes that are deemed to at least partially overlap, and determining a degree of overlap between the indexes of each index pair. The method further includes determining a suggested merge relationship between the indexes of each of the index pairs. The method also includes generating an index model comprising interconnected index objects. The interconnected index objects represent the indexes of the index pairs. Interconnections between the interconnected index objects reflect the suggested merge relationship between the indexes of each index pair. Moreover, the method includes outputting a graphical representation of the index model. Additionally, the method includes allowing a user to graphically select index pairs to merge in a system-determined order.
US09910866B2 Methods, apparatuses and computer program products for automatically generating suggested information layers in augmented reality
An apparatus for automatically suggesting information layers in augmented reality may include a processor and memory storing executable computer program code that cause the apparatus to at least perform operations including providing layers of information relating to virtual information corresponding to information indicating a current location of the apparatus. The computer program code may further cause the apparatus to determine that a layer(s) of information is enabled to provide virtual information for display. The virtual information corresponds to locations of real world objects in or proximate to the current location. The computer program code may further cause the apparatus to determine other information layers associates with content for the current location based on the number of items virtual information for the enabled layer being below a threshold and automatically suggest one or more other layers of information for selection. Corresponding methods and computer program products are also provided.
US09910863B2 Communication device for searching for predetermined external device from network, communication device control method, and recording medium
A communication device that participates in a network includes a storing control unit that stores images, a search unit that searches for a predetermined external device from the network, a transmission unit that transmits stored images to the external device via the network, a determination unit that determines the frequency of participation in the network, and a changing unit that changes the time for searching for the external device according to determination results of the determination unit.
US09910861B2 Automated information lifecycle management using low access patterns
A method, apparatus, and system for automated information lifecycle management using low access patterns in a database management system are provided. A user or the database can store policy data that defines an archiving action when meeting an activity-level condition on one or more database objects. The archiving actions may include compression, data movement, and other actions to place the database object in an appropriate storage tier for a lifecycle phase of the database object. The activity-level condition may specify the database object meeting a low access pattern, optionally for a minimum time period. Various criteria including access statistics for the database object and cost characteristics of current and target compression levels or storage tiers may be considered to determine the meeting of the activity-level condition. The policies may be evaluated on an adjustable periodic basis and may utilize a task scheduler for minimal performance impact.
US09910860B2 Split elimination in MapReduce systems
Embodiments of the present invention relate to elimination of blocks such as splits in distributed processing systems such as MapReduce systems using the Hadoop Distributed Filing System (HDFS). In one embodiment, a method of and computer program product for optimizing queries in distributed processing systems are provided. A query is received. The query includes at least one predicate. The query refers to data. The data includes a plurality of records. Each record comprises a plurality of values in a plurality of attributes. Each record is located in at least one of a plurality of blocks of a distributed file system. Each block has a unique identifier. For each block of the distributed file system, at least one value cluster is determined for an attribute of the plurality of attributes. Each value cluster has a range. The predicate of the query is compared with the at least one value cluster of each block. The query is executed against only those blocks where the predicate is met by at least one value cluster.
US09910859B2 Support for WORM cartridges realized by linear tape file system (LTFS)
When a WORM cartridge is formatted for Tape File System (LTFS) in advance, such as prior to shipment, Linear Tape File System Library Edition (LTFS LE) is expanded by software to reduce consumption of the index partition and to support elimination of the appending of unnecessary data. More specifically, instead of recording metadata in the index partition during normal unmounting, the metadata is recorded in separate local storage such as on hard disk drive (HDD), and the index partition is updated only when the cartridge is ejected from the library. In this way, the present invention is able to significantly reduce the frequency of index partition updates. Because an update occurs only when the user intentionally ejects a cartridge, overflow of the index partition before overflow of the data partition can be prevented.
US09910857B2 Data management
Methods and systems for data management are disclosed. With embodiments of the present disclosure, data files originating from the same source data can be de-duplicated. One such method comprises calculating one or more of a first characteristic value for first data in a first format, and one or more second characteristic values for one or more data in one or more second formats into which the first data can be converted, said characteristic value uniquely representing an arrangement characteristic of at least part of bits of data in a particular format. The method also includes storing one of the first data and the second data in response to one of the calculated characteristic values being the same as a stored characteristic value corresponding to a second data.
US09910856B2 Information source agent systems and methods for distributed data storage and management using content signatures
Information source agent systems and methods for distributed content storage and management using content signatures that use file identicality properties are provided. A data management system is provided that includes a content engine for managing the storage of file content, a content signature generator that generates a unique content signature for a file processed by the content engine, a content signature comparator that compares content signatures and a content signature repository that stores content signatures. Information source agents are provided that include content signature generators and content signature comparators. Methods are provided for the efficient management of files using content signatures that take advantage of file identicality properties. Content signature application modules and registries exist within information source clients and centralized servers to support the content signature methods.
US09910854B2 Managing embedded digital signature locations in a stream of data files
According to aspects of the present disclosure, archived system management facility (SMF) data may be verified against a signature, even if the data to be verified against the signature is split among two or more history files. When archiving an SMF data dump, an indication is kept that includes locations of signatures found while a system management facility (SMF) data dump is being archived. For example, the indication may be kept in metadata of the history file (e.g., in the history file itself, a status block outside the history file, a collective index, etc.). Then when extracting the archived data, if the data corresponding to a signature is in a different history file, the data corresponding to the signature from all of the history files is concatenated for verification.
US09910853B2 Dynamic language translation of web site content
A method, system and computer program product for providing translated web content is disclosed. The method includes receiving a request from a user on a web site, the web site having a first web content in a first language, wherein the request calls for a second web content in a second language. The method further includes dividing the first web content into a plurality of translatable components and generating a unique identifier for each translatable component. The method further includes identifying a plurality of translated components of the second web content using the unique identifier of each of the plurality of translatable components of the first web content and putting the plurality of translated components of the second web content to preserve a format that corresponds to the first web content. The method further includes providing the second web content in response to the request that was received.
US09910852B2 Detecting cascading sub-logograms
For detecting cascading sub-logograms, code may detect a sub-logogram from a written input to a written input device. In addition, the code may display one or more logogram hints in response to detecting the sub-logogram. Each logogram hint includes the sub-logogram and one or more subsequent sub-logograms of a logogram sequence of multiple sub-logograms.
US09910845B2 Call flow and discourse analysis
The disclosed solution uses machine learning-based methods to improve the knowledge extraction process in a specific domain or business environment. By formulizing a specific company's internal knowledge and terminology, the ontology programming accounts for linguistic meaning to surface relevant and important content for analysis. Based on the self-training mechanism developed by the inventors, the ontology programming automatically trains itself to understand the business environment by processing and analyzing a defined corpus of communication data. For example, the disclosed ontology programming adapts to the language used in a specific domain, including linguistic patterns and properties, such as word order, relationships between terms, and syntactical variations. The disclosed system and method further relates to leveraging the ontology to assess a dataset and conduct a funnel analysis to identify patterns, or sequences of events, in the dataset.
US09910843B2 Systems, methods and articles for a web-based spreadsheet application
Methods, systems and articles of manufacture for creating an electronic spreadsheet using a web-based spreadsheet application. A web-server hosting a web-based spreadsheet website comprises one or more computer(s) having at least one computer processor, memory, data storage and a network communication device (e.g. a network adapter). The web-server is configured to transmit a spreadsheet web application to a user computing device (e.g. a personal computer, smartphone, etc.) having a web-browser via the internet. The spreadsheet web application is configured to program the web-browser of the computing device to display and execute a spreadsheet web application having various features and functionality, including one or more of a separate design section and preview panel, a test data feature, line by line building of a spreadsheet without a starting grid of rows and columns, an embedded spreadsheet feature, an embedded worksheet display within a line feature, or any combination of these features.
US09910842B2 Interactively predicting fields in a form
Methods, apparatuses, and embodiments related to interactively predicting fields in a form. A computer system received an image of a form. A user moves a cursor to a first field of the form, and the computer system automatically displays a predicted location of the field, including a bounding box that represents a boundary of the field. The computer system further predicts the field name/label based on text in the document. The user clicks on the field to indicate that he wants to digitize the field. When needed, the user interactively modifies the size of the bounding box that represents the extent of the field, changes the name/label of the field. Once finalized, the user can cause the field information (e.g., the bounding box coordinate, the bounding box location, the name/label of the field, etc.) to be written to a database.
US09910838B2 Alternates of assets
Embodiments of methods to designate alternates of assets, methods to display representations of alternates, user interfaces, computer products, and digital assets are generally described herein. Other embodiments may be described and claimed.
US09910835B2 User interface for creation of content works
A system, computer-readable storage medium, and computer-implemented method for editing content works, such as publications using markup language, via a user interface having panel of patterns, are presented. The disclosure includes approaches for editing and creating patterns based on selected representations of markup elements and other content, and also features of the user interface that enable use of the patterns for modifying content works.
US09910826B2 SIMD implementation of stencil codes
Implementing a 1D stencil code via SIMD instructions on a computer with vector registers having N processing elements (PEs), among them a set of coefficient vector registers, a set of at most N data vector registers, and a set of result vector registers. The M stencil coefficients are loaded in a particular pattern into M+N−1 coefficient vector registers. Successive sets of N consecutive data values are received, and each data value of a set is loaded into all PEs of a data vector register of the set of data vector registers. The result vector registers accumulate sums of products of consecutive coefficient vector registers with corresponding data vector registers. The contents of any result vector register containing a sum of all coefficient vector register-data vector register products is output, and the result vector register is reused for accumulating.
US09910824B2 Vector processor configured to operate on variable length vectors using instructions to combine and split vectors
A computer processor is disclosed. The computer processor may comprise a vector unit comprising a vector register file comprising at least one register to hold a varying number of elements. The computer processor may further comprise processing logic configured to operate on the varying number of elements in the vector register file using one or more instructions that separate a vector or combine two vectors. The computer processor may be implemented as a monolithic integrated circuit.
US09910823B2 Stack processor using a ferroelectric random access memory (F-RAM) having an instruction set optimized to minimize memory fetch
A stack processor using a non-volatile, ferroelectric random access memory (F-RAM) for both code and data space. The stack processor is operative in response to as many as 64 possible instructions based upon a 16 bit word. Each of the instructions in the 16 bit word comprises 3 five bit instructions and a 16th bit which is applicable to each of the 3 five bit instructions thereby making each instruction effectively 6 bits wide.
US09910820B2 Electronic device, mathematical expression display control method, and storage medium which stores mathematical expression control program
An electronic device includes a display unit and a processor. The processor is configured to accept an input of numerical expression data including an input field-equipped function data with one or plural input fields; cause the display unit to display the numerical expression data and a cursor; move, upon accepting a first user operation, the cursor from one element to a next or previous element, the element being a constituent of numerical expression data; and move, upon accepting a second user operation when the cursor is present in the input fields, the cursor to an outside of the input field-equipped function data with the input fields.
US09910819B2 Two-wire serial interface and protocol
In a serial transmission method using a two-wire serial interface, a master device transmits a first synchronous serial signal via the two-wire serial interface to wake-up a slave device followed by an asynchronous data transmission on one of the two-wires of the two-wire serial interface. The asynchronous data signal directly controls a function of the slave device.
US09910817B2 Apparatus, system, and method for allowing USB devices to communicate over a network
One feature pertains to an apparatus includes a universal serial bus (USB) communication interface that communicates with at least one USB peripheral device through a USB cable connection. The apparatus also includes a network communication interface that communicates with a communication network. The apparatus also includes a processing circuit that receives USB communication signals from the USB peripheral device, generates network data packets that include USB data based on the USB communication signals, and transmits the network data packets to a receiving device associated with a USB host device through the communication network. The apparatus also serves as a proxy USB host device to the USB peripheral device. The processing circuit may also transmit polling messages to the USB peripheral device at substantially regular time intervals, and receive the USB communication signals from the USB peripheral device in response to the polling messages.
US09910816B2 Scalable direct inter-node communication over peripheral component interconnect-express (PCIe)
A method of communicating data over a Peripheral Component Interconnect Express (PCIe) Non-Transparent Bridge (NTB) comprising transmitting a first posted write message to a remote processor via the NTB, wherein the first posted write message indicates an intent to transfer data to the remote processor, and receiving a second posted write message in response to the first posted write message, wherein the second posted write message indicates a destination address list for the data. Also disclosed is a method of communicating data over a PCIe NTB comprising transmitting a first posted write message to a remote processor via the NTB, wherein the first posted write message comprises a request to read data, and receiving a data transfer message comprising at least some of the data requested by the first posted write message.
US09910809B2 High performance interconnect link state transitions
A supersequence is sent to another device to indicate a transition from a partial width link state to another active link state. The supersequence is to be sent over one or more lanes of a link and is to include at least a portion of a start of data sequence (SDS) to include a predefined sequence and a byte number value. The byte number value is to indicate a number of bytes measured from a preceding control interval.
US09910808B2 Reflective memory bridge for external computing nodes
In at least some examples, a computing node includes a processor and a local memory coupled to the processor. The computing node also includes a reflective memory bridge coupled to the processor. The reflective memory bridge maps to an incoming region of the local memory assigned to at least one external computing node and maps to an outgoing region of the local memory assigned to at least one external computing node.
US09910807B2 Ring protocol for low latency interconnect switch
Methods, systems, and apparatus for implementing low latency interconnect switches between CPU's and associated protocols. CPU's are configured to be installed on a main board including multiple CPU sockets linked in communication via CPU socket-to-socket interconnect links forming a CPU socket-to-socket ring interconnect. The CPU's are also configured to transfer data between one another by sending data via the CPU socket-to-socket interconnects. Data may be transferred using a packetized protocol, such as QPI, and the CPU's may also be configured to support coherent memory transactions across CPU's.
US09910801B2 Processor model using a single large linear registers, with new interfacing signals supporting FIFO-base I/O ports, and interrupt-driven burst transfers eliminating DMA, bridges, and external I/O bus
A processor or CPU architecture that implements many enabling technologies proven to enhance data through put supporting the synchronous burst data transfer. The Input-Output (I/O) is uniformly viewed and treated as an individual First-In-First-Out (FIFO) device. Pluralities of memory areas are implemented for user stack, kernel stack, interrupt stack and procedure call stack. Only one I/O arbiter is necessary for a CPU model that arbitrates between a plurality of FIFOs substituting data caches for on-chip implementation, thus eliminating traditional data transfer techniques using Direct-Memory-Access (DMA), bus control and lock signals leaving just the interrupt signals and the new synchronous signals for an easy and streamlined system design and CPU model. Supporting an interrupt-driven, FIFO-based I/O and synchronous burst data transfer the CPU employs a simple linear large register sets without bank switching.
US09910800B1 Utilizing remote direct memory access (‘RDMA’) for communication between controllers in a storage array
Emulating a remote direct memory access (‘RDMA’) link between controllers in a storage array, including: inserting, into a buffer utilized by a direct memory access (‘DMA’) engine of a first storage array controller, a data transfer descriptor describing data stored in memory of the first storage array controller and a location to write the data to memory of the second storage array controller; retrieving, in dependence upon the data transfer descriptor, the data stored in memory of the first storage array controller; and writing the data into the memory of the second storage array controller in dependence upon the data transfer descriptor.
US09910799B2 Interconnect distributed virtual memory (DVM) message preemptive responding
Aspects include computing devices, apparatus, and methods for accelerating distributive virtual memory (DVM) message processing in a computing device. DVM message interceptors may be positioned in various locations within a DVM network of a computing device so that DVM messages may be intercepted before reaching certain DVM destinations. A DVM message interceptor may receive a broadcast DVM message from first DVM source. The DVM message interceptor may determine whether a preemptive DVM message response should be returned to the DVM source on behalf of the DVM destination. When certain criteria are met, the DVM message interceptor may generate a preemptive DVM message response to the broadcast DVM message, and send the preemptive DVM message response to the DVM source.
US09910798B2 Storage controller cache memory operations that forego region locking
Methods and structure for managing cache memory for a storage controller. One exemplary embodiment a Redundant Array of Independent Disks (RAID) storage controller. The storage controller includes an interface operable to receive Input/Output (I/O) requests from a host, a Direct Memory Access (DMA) module, a memory comprising cache data for a logical volume, and a control unit. The control unit is able to generate Scatter Gather Lists (SGLs) that indicate the location of cache data for incoming read requests. Each SGL is stored in the memory, and at least one SGL points to cache data that is no longer indexed by the cache. The control unit is also able to service an incoming read request based on the SGL, by directing the DMA module to transfer the cache data that is no longer indexed to the host.
US09910797B2 Space efficient formats for scatter gather lists
Methods and structure for formatting and processing Scatter Gather Lists (SGLs). One exemplary embodiment is a storage controller that includes a cache memory storing data for a logical volume, and a control unit. The control unit is able to service an Input/Output (I/O) request based on a Scatter Gather List (SGL) that refers to the cache memory, the SGL comprising multiple entries that each include a flag field and an identifier (ID) field. The entries are assigned to categories that are each associated with a different set of stored processing instructions. The control unit is able to identify a category for an entry based on a combination of both flag field and ID field for the entry, and the control unit is able to process the entry using the set of instructions associated with the identified category.
US09910794B2 Processing data
A method for executing a program code is suggested, the method comprising: checking a memory access policy resource based on a trigger; and comparing a current program counter with a program counter information provided by the memory access policy resource and, in case the comparison of the current program counter and the program counter information fulfills a predefined condition, conducting a memory access policy check to allow permitted operations.
US09910793B2 Memory encryption engine integration
Memory encryption engine (MEE) integration technologies are described. A MEE system may include a MEE interface and a MEE core. The MEE interface may receive a data from an arbiter, where the data is selected by the arbiter from data at memory link queues. The MEE interface may adjust a timing rate to send the data to match a timing of a MEE core. The MEE core may be coupled to the MEE interface and may receive the data from the MEE interface.
US09910787B2 Virtual address table
The present disclosure includes apparatuses and methods related to virtual address tables. An example method comprises generating an object file that comprises: an instruction comprising a number of arguments; and an address table comprising a number of indexed address elements. Each one of the number of indexed address elements can correspond to a virtual address of a respective one of the number of arguments, wherein the address table can serves as a target for the number of arguments. The method can include storing the object file in a memory.
US09910782B2 Expedited servicing of store operations in a data processing system
In at least some embodiments, a processor core generates a store operation by executing a store instruction in an instruction sequence. The store operation is marked as a high priority store operation in response to the store instruction being marked as high priority and is not so marked otherwise. The store operation is buffered in a store queue associated with a cache memory of the processor core. Handling of the store operation in the store queue is expedited in response to the store operation being marked as a high priority store operation and not expedited otherwise.
US09910781B2 Page table including data fetch width indicator
Embodiments relate to a page table including a data fetch width indicator. An aspect includes allocating a memory page in a main memory to an application. Another aspect includes creating a page table entry corresponding to the memory page in the page table. Another aspect includes determining, by a data fetch width indicator determination logic, the data fetch width indicator for the memory page. Another aspect includes sending a notification of the data fetch width indicator from the data fetch width indicator determination logic to supervisory software. Another aspect includes setting the data fetch width indicator in the page table entry by the supervisory software based on the notification. Another aspect includes, based on a cache miss in the cache memory corresponding to an address that is located in the memory page, fetching an amount of data from the memory page based on the data fetch width indicator.
US09910780B2 Pre-loading page table cache lines of a virtual machine
Embodiments herein pre-load memory translations used to perform virtual to physical memory translations in a computing system that switches between virtual machines (VMs). Before a processor switches from executing the current VM to the new VM, a hypervisor may retrieve previously saved memory translations for the new VM and load them into cache or main memory. Thus, when the new VM begins to execute, the corresponding memory translations are in cache rather than in storage. Thus, when these memory translations are needed to perform virtual to physical address translations, the processor does not have to wait to pull the memory translations for slow storage devices (e.g., a hard disk drive).
US09910776B2 Instruction ordering for in-progress operations
Execution of the memory instructions is managed using memory management circuitry including a first cache that stores a plurality of the mappings in the page table, and a second cache that stores entries based on virtual addresses. The memory management circuitry executes operations from the one or more modules, including, in response to a first operation that invalidates at least a first virtual address, selectively ordering each of a plurality of in progress operations that were in progress when the first operation was received by the memory management circuitry, wherein a position in the ordering of a particular in progress operation depends on either or both of: (1) which of one or more modules initiated the particular in progress operation, or (2) whether or not the particular in progress operation provides results to the first cache or second cache.
US09910774B1 Spontaneous reconfiguration of data structures using balloon memory allocation
Systems for memory management in virtual machines. A method embodiment forms a reconfigurable multi-level data structure by requesting reserved memory as well as loaned-out memory. The method configures the multi-level data structure to have a first area comprising reserved memory and having a second area comprising reconfigurable memory. The reserved memory portion of the data structure is populated with pointers that address one or more portions of the second area. During operation, the method receives a request to release some or all of the reconfigurable memory. Memory address pointers in the first portion of the multi-level data structure are modified to reflect the release of the reconfigurable memory. In a hypervisor-based virtual machine environment, the first area comprising reserved memory can be allocated via a hypervisor call. The second area comprising reconfigurable memory is allocated via a balloon memory driver call.
US09910773B2 Method and system for compacting data in non-volatile memory
A system and method for compacting data in a non-volatile memory system that may reduce the need for control data updates is described. The method may include copying valid data from a source block to a destination block, and also writing new host data to the destination block, such that the offset position in the destination block of the copied data is the same as in the source block and fewer mapping table updates are needed for the copied data. The system may include a non-volatile memory system with a coarse granularity mapping table and a fine granularity mapping table where a controller in the non-volatile memory system is configured to only update the coarse granularity mapping table for compacted data written to a new block, but is configured to update both the fine and coarse granularity mapping tables for new host data written to the new block.
US09910770B2 Microcomputer having processor capable of changing endian based on endian information in memory
There is a need to provide a microcomputer capable of eliminating an external terminal for endian selection. Flash memory includes a user boot area for storing a program executed in user boot mode and corresponding endian information and a user area for storing a program executed in user mode and corresponding endian information. A data transfer circuit reads endian information stored in the user boot area or the user area in accordance with operation mode and supplies the endian information to a CPU before reset release of the CPU. Accordingly, an external terminal for endian selection can be eliminated.
US09910768B1 Method for memory management for virtual machines
A method and system for management of physical memory of Virtual Machines (VMs) using dynamic memory reallocation based on estimated usages by each of the VMs is provided. A host has different VMs with respective Guest OSs running on the host OS. The Guest OS of an exemplary VM has a balloon agent driver running on it. The balloon agent driver collects Guest OS statistics and calculates Working Set Size (WSS) of the Guest OS based on the Guest OS statistics. The WSS is provided to a Hypervisor via a Virtual Machine Monitor (VMM). The Hypervisor adjusts the size of the ballooned memory based on the calculated WSS and the virtualization statistics collected by the Hypervisor using the VMM.
US09910766B2 Whitebox network fuzzing
Software testing of networked devices using whitebox fuzzing is provided. Target network device (TC) can execute a software target that can selectively receive fuzzed data to perturb the execution of the software target. The perturbation can be correlated with the fuzzed data to detect intentional and unintentional features of the software target in. Information related to the interaction of the TC and a target network peer device (TPC) can be employed to determine a state input. Optionally, the TC can interact with the TPC normally until a determined state input, at which point, a fuzzed input can be substituted into the communication to the TC as if it were from the TPC. Resulting deviations from normal operation can then be determined and analyzed. Further optionally, a session dependent conditional and corresponding value can be determined.
US09910765B2 Providing testing environments for software applications using virtualization and a native hardware layer
Methods, systems, computer-readable media, and apparatuses for providing testing environments using virtualization are presented. In one or more embodiments, a computer system may receive, from a client computing device, a software application. Subsequently, the computer system may receive, from the client computing device, a set of one or more testing parameters for testing the software application. Then, the computer system may create, based on the set of one or more testing parameters for testing the software application, a testing environment for the software application using a native hardware layer that represents hardware on which the software application is configured to be executed. Thereafter, the computer system may initiate a testing session in which software application is executed in the testing environment. Subsequently, the computer system may provide, to the client computing device, a control interface for controlling the testing session.
US09910764B2 Automated software testing
Disclosed in some examples are systems, machine readable mediums and methods which automate testing of web-based application code by automatically generating test harnesses based on a specified configuration and test script, hosting the test harness, causing the test harness to be run to test the code, and delivering the test results to the user. In some examples, the specified conditions may specify one or more test environments corresponding to an execution environment. This allows users greater flexibility in support of testing libraries and support of testing environments. The end users of the software under test will be provided software that is better tested for many different environments.
US09910762B2 Unified sandbox
A system that manages a unified sandbox environment activates a plurality of components in the unified sandbox environment, each component being configured to manage the lifecycle of its own component data. The system orchestrates an operation across the unified sandbox environment, the orchestrating including delegating one or more operations to the components, the components being configured to wait until all delegated operations are completed successfully before committing changes based on the delegated operations. The system manages a central label repository including distributing labels to the components, the components being configured to associate the centrally managed labels with versions of their respective component data. The system then creates a unified sandbox view across the respective component data of all components based on a selection of one or more of the centrally managed labels.
US09910761B1 Visually debugging robotic processes
Methods, apparatus, systems, and computer-readable media are provided for visually debugging robotic processes. In various implementations, a graphical user interface may be rendered that includes a flowchart representing a robotic process. A plurality of different logical paths through the robotic process may be represented by a plurality of different visible paths through the flowchart. In various implementations, robot operation data indicative of one or more implementations of the robotic process may be determined. Based on the robot operation data, a first logical path through the robotic process that satisfies a criterion may be identified. In various implementations, a first visual path through the flowchart may be selected that corresponds to the identified first logical path. In various implementations, the first visible path through the flowchart may be visually distinguished from a second visible path through the flowchart.
US09910759B2 Logging framework and methods
A system comprising one or more processors executing a first process and a second process, a memory storing log information for the first process and the second process, and one or more logging components, executing on the one or more processors. The one or more logging components are configured to identify a first log event associated with the first process, generate an event identifier (ID) based on the first log event, transfer the event ID to the second process, identify a second log event associated with the second process and based on the first log event, and associate the event ID with the second log event in the memory.
US09910756B2 Response-time baselining and performance testing capability within a software product
A method of measuring performance of a computerized system is provided. A test component integrated in a client application module is configured to generate an application specific workflow to be delivered to a computing environment of one or more computing devices for measuring the performance of the computerized system. The integrated test component of the client application module is executed to deliver the application specific workflow to a server system in the computing environment. Performance data is collected based on at least one response received from the computing environment to measure the performance of the computerized system.
US09910753B1 Switchless fabric based atomics via partial-proxy
A data storage system has first and second computing nodes that are interconnected by a switchless fabric. Each storage node includes first and second paired storage directors with an interconnecting communication link. Atomic operations sent between the computing nodes are mediated by network adapters. Atomic operations sent between paired storage directors via the interconnecting communication link are provided to a network adapter via an internal port and mediated by network adapter. The interconnecting communication links can be used as a backup path for atomic operations in the event of a link failure of the switchless fabric.
US09910751B2 Adaptive handling of abnormal-condition indicator criteria
Disclosed herein are systems, devices, and methods related to assets and asset operating conditions. In particular, examples involve determining health metrics that estimate the operating health of an asset or a part thereof, analyzing health metrics to determine variables that are associated with high health metrics, and modifying the handling of operating conditions that normally result in triggering of abnormal-condition indicators, among other examples.
US09910744B1 System and method for hybrid kernel- and user-space incremental and full checkpointing
A system includes a multi-process application that runs on primary hosts and is checkpointed by a checkpointer comprised of a kernel-mode checkpointer module and one or more user-space interceptors providing at least one of barrier synchronization, checkpointing thread, resource flushing, and an application virtualization space. Checkpoints may be written to storage and the application restored from said stored checkpoint at a later time. Checkpointing may be incremental using Page Table Entry (PTE) pages and Virtual Memory Areas (VMA) information. Checkpointing is transparent to the application and requires no modification to the application, operating system, networking stack or libraries. In an alternate embodiment the kernel-mode checkpointer is built into the kernel.
US09910743B2 Method, system and device for validating repair files and repairing corrupt software
A system and method for repairing corrupt software components of a computer system. Corrupt software is detected and repaired utilizing an automated component repair service. Repair files are downloaded from an external storage location and used to repair the corruption. The downloaded files are preferably the smallest amount of data necessary to repair the identified corruption. The process of repairing corrupt files is used in conjunction with a software updating service to resolve problems that occur when corrupt software is updated by allowing a corrupt component to be repaired and then uninstalled such that an updated component can be properly installed.
US09910741B2 Non-destructive data storage
Non-destructive data storage is disclosed. An information change is stored that is associated with a business object such that tracking of the information change is enabled with respect to one a transaction time and/or an effective time. The stored information change is accessed with respect to a time.
US09910735B1 Generating an application-consistent snapshot
In one embodiment, a method includes generating a crash-consistent snapshot of a volume at a first point-in-time, mounting the snapshot to a host, running an application to access the snapshot, running an integrity tool to identify and repair a defect with the snapshot to form a modified snapshot and shutting down the application to form an application-consistent snapshot of the volume.
US09910733B2 Transaction completion in a synchronous replication environment
Systems and methods are presented for completing transactions in a synchronous replication environment. In some embodiments, a computer-implemented method can include generating in a database server, an identifier to identify a database transaction. The method can also include transmitting the identifier to a replication server; receiving acknowledgement that the identifier is acknowledged by the replication server; storing the transaction in the database server; and executing the transaction after receiving acknowledgement from the replication server and after determining the transaction is stored in the database server; wherein transmitting the identifier to the replication server occurs in parallel with storing the transaction in the database server.
US09910731B2 Resiliency to memory failures in computer systems
A resiliency system detects and corrects memory errors reported by a memory system of a computing system using previously stored error correction information. When a program stores data into a memory location, the resiliency system executing on the computing system generates and stores error correction information. When the program then executes a load instruction to retrieve the data from the memory location, the load instruction completes normally if there is no memory error. If, however, there is a memory error, the computing system passes control to the resiliency system (e.g., via a trap) to handle the memory error. The resiliency system retrieves the error correction information for the memory location and re-creates the data of the memory location. The resiliency system stores the data as if the load instruction had completed normally and passes control to the next instruction of the program.
US09910728B2 Method and apparatus for partial cache line sparing
Provided are an apparatus and method to store data from a cache line at locations having errors in a sparing directory. In response to a write operation having write data for locations in one of the cache lines, the write data for a location in the cache line having an error is written to an entry in a sparing directory including an address of the cache line.
US09910727B2 Detecting anomalous accounts using event logs
The claimed subject matter includes techniques for detecting anomalous accounts. An example method includes receiving, via a processor, a list of monitored machines and event logs including logons for the list of monitored machines for a predetermined window of time. The example method also includes generating, via the processor, a baseline based on the event logs for the predetermined window of time. The example method also includes collecting, via the processor, daily logon events after the predetermined time and comparing the daily logon events to the baseline. The method further includes detecting, via the processor, an anomalous account based on a difference of logon events of the anomalous account from the baseline. The method also includes displaying, via the processor, the detected anomalous account.
US09910717B2 Synchronization method
A synchronization method in a computer system with multiple cores, wherein a group of threads executes in parallel on a plurality of cores, the group of threads being synchronized using barrier synchronization in which each thread in the group waits for all the others at a barrier before progressing; the group of threads executes until a first thread reaches the barrier; the first thread enters a polling state, repeatedly checking for a release condition indicating the end of the barrier; subsequent threads to reach the barrier are moved to the core on which the first thread is executing; and other cores are powered down as the number of moved threads increases; and wherein when the first thread detects the release condition, the powered down cores are powered up and are available for use by the threads.
US09910709B2 Allocation control method and apparatus
An allocation control method includes: determining, for each of plural virtual machines executed on a first information processing apparatus or a second information processing apparatus, whether the virtual machine is executing a first processing that is performed in response to a request from an external apparatus; first allocating, to the first information processing apparatus, first virtual machines, which are executing the first processing, among the plural virtual machines; and second allocating, to the second information processing apparatus, second virtual machines, which are not executing the first processing, among the plural virtual machines.
US09910703B2 System and method for intelligent timer services
A method is provided for efficiently scheduling timer events within an operating system by allocating a plurality of timers, each of which has an expiry time, to a set of available timer slots. The method defines a timer spread value that denotes the allowed variance of the expiry times of each of the timers, calculates a set of available timer slots for each of the timers based on the timer spread value, and adjusts the expiry times of the timers so as to insert and evenly spread the timers across the set of available timer slots. In one implementation, the set of available timer slots is located in a timer wheel existing within the operating system, and the timer wheel uses a plurality of timer vectors arranged into successively increasing levels, beginning with level zero.