Document Document Title
US09911974B2 Composite anode for lithium ion batteries
A composite anode for a lithium-ion battery is manufactured from silicon nanoparticles having diameters mostly under 10 nm; providing an oxide layer on the silicon nanoparticles; dispersing the silicon nanoparticles in a polar liquid; providing a graphene oxide suspension; mixing the polar liquid containing the dispersed silicone nanoparticles with the graphene oxide suspension to obtain a composite mixture; probe-sonicating the mixture for a predetermined time; filtering the composite mixture to obtain a solid composite; drying the composite; and reducing the composite to obtain graphene and silicon.
US09911972B2 Non-aqueous electrolyte secondary battery and method for manufacturing negative electrode for secondary battery
The non-aqueous electrolyte secondary battery 10 provided by the present invention comprises a positive electrode 30, a negative electrode 50 and a non-aqueous electrolyte. The negative electrode 50 includes a negative electrode current collector 52 and a negative electrode active material layer 54 formed on the current collector 52, the negative electrode active material layer 54 containing a negative electrode active material 55 capable of storing and releasing charge carriers and having shape anisotropy so that the charge carriers are stored and released along a predefined direction. The negative electrode active material layer 54 includes, at a bottom thereof contacting the current collector 52, a minute conductive material 57 with granular shape and/or minute conductive material 57 with fibrous shape having an average particle diameter that is smaller than that of the negative electrode active material 55, and includes, at the bottom thereof; a part of the negative electrode active material 55. At least 50% by number of the total amount of the negative electrode active material 55 is oriented so that the direction of storage and release of the charge carriers is at an angle of 45° or more and 90° or less relative to the surface of the current collector 52.
US09911970B2 Lithium ion batteries
An improved method of making a cathode for use in a lithium ion battery is comprised of mixing a lithium metal oxide and lithium metal phosphate in a solvent, where both of these are comprised of primary particles that have been agglomerated into secondary particles of particular size and mixing is insufficient to break up the particles of the lithium metal phosphate, coating the mixture of step (A) on to a metal foil and removing the solvent to form the cathode. The lithium metal oxide is also desirably not broken either. The cathode may be one that has lithium metal oxide and a particular lithium metal phosphate wherein the majority of the metal is Mn.
US09911969B2 V2O5—LiBO2, V2O5—NiO—LiBO2 glasses and their composites obtained by nitrogen doping and reduced graphite oxide blending as cathode active materials
An electronically active glass has the composition (TxOy)z-(MuOv)w—(Na/LiBO2)t wherein T is a transition metal selected from V and Mo, M is a metal selected from Ni, Co, Na, Al, Mn, Cr, Cu, Fe, Ti and mixtures thereof, x, y, u, and v are the stoichiometric coefficients resulting in a neutral compound, i.e. x=2y/(oxidation state of T) and u=2v/(oxidation state of M), z, w and t are weight-%, wherein z is 70-80, w is 0-20 t is 10-30, and the sum of z, w and t is 100 weight-%, in particular V2O5—LiBO2 and V2O5—NiO—LiBO2.
US09911968B2 Electrode active material, method for producing same, electrode for nonaqueous secondary battery, and nonaqueous secondary battery
An electrode active material includes particles of a lithium-containing composite oxide represented by the general compositional formula: Li1+xMO2, where −0.15≦x≦0.15, and M represents an element group of three or more elements including at least Ni, Co and Mn, wherein the ratios of Ni, Co and Mn to the total elements constituting M satisfy 45≦a≦90, 5≦b≦30, 5≦c≦30 and 10≦b+c≦55, where the ratios of Ni, Co and Mn are represented by a, b and c, respectively, in units of mol %, the average valence A of Ni in the whole particles is 2.2 to 3.2, the valence B of Ni on the surface of the particles has the relationship: B
US09911967B2 Filling device for firefighters of a drive battery of an electric or hybrid vehicle
An electric or hybrid vehicle including an arrangement of mechanisms introducing an extinguishing fluid into a battery pack, especially a drive battery, of the vehicle. A first port is placed in a wall of the pack and provides access to an interior of the pack, the first port including a partial or total blocking mechanism being removable or meltable under effect of temperature. A second port is placed in an element of a body of the vehicle facing the first port. Extinguishing fluid may be introduced into the pack through two ports once the blocking mechanism of the first port has been removed or melted.
US09911965B2 Battery backup cover system
A battery backup unit (BBU) system and apparatus is provided for securing and communicating with a BBU for use with optical network terminals (ONTs) and/or residential gateways. In various aspects, the BBU system includes a battery enclosure that is configured to eliminate the unintentional reversal of the polarity for a battery enclosed therein. The BBU system also provides an integrated communication circuit for receiving a variety of connectors.
US09911963B2 Electricity storing/discharging device with multiple-layer package structure having electrode plate pair with multiple-sided electric conductive terminals converted into single input/output electric conductive interface
The present invention discloses an electricity storing/discharging device with multiple-layer package structure having electrode plate pair with multiple-sided electric conductive terminals converted into single input/output electric conductive interface, which is applied in a multiple-layer package structure with specific single-sided input/output and having electrode plate pair with multiple-sided input/output terminals, thereby allowing the electrode plate pair with multiple-sided electric conductive terminals to be structured as an input/output electric conductive interface through single-sided input/output electric conductive terminals having positive and negative polarities for the purpose of transferring electric energy to the exterior.
US09911962B2 Secondary battery
A secondary battery includes a case having an opening therein, a cap plate attached to the case, a plurality of electrode assemblies in the case, each electrode assembly including a positive electrode plate, a negative electrode plate, and a separator between the positive electrode plate and the negative electrode plate, and uncoated edges of the positive and negative electrode plates extending out of each electrode assembly defining electrodes, an electrode terminal protruding outside the cap plate, a gasket covering the electrode terminal, an electrode current collector electrically connecting the electrode assemblies and the electrode terminal, a retainer between the electrode current collector and the case, the retainer being connected to the electrode assemblies, and a damper on a front side of the retainer that faces the electrode assemblies, the damper extending to be positioned between the electrodes of adjacent electrode assemblies.
US09911959B2 Porous membrane and multilayer porous membrane
A multilayer porous membrane comprising a porous membrane containing a polyolefin resin as a main component; and a porous layer containing an inorganic filler and a resin binder and laminated on at least one surface of the porous membrane; wherein the porous membrane has an average pore size d=0.035 to 0.060 μm, a tortuosity τa=1.1 to 1.7, and the number B of pores=100 to 500 pores/μm2, which are calculated by a gas-liquid method, and the porous membrane has a membrane thickness L=5 to 22 μm.
US09911958B2 Separator with enhanced heat resistance and electrochemical device containing the same
Disclosed is a separator containing a porous polymer substrate and an inorganic particle layer formed on at least one surface of the porous polymer substrate, and the separator has increased insolubility for an electrolyte and enhanced dimensional stability at high temperatures, therefore, short circuit between a cathode and an anode may be suppressed even when an electrochemical device is overheated, and high temperature cycle characteristics of the electrochemical device are enhanced. In addition, discharge characteristics are improved due to an ion conductance enhancement, since the impregnation of the separator for the electrolyte increases. Therefore, the separator according to the present invention is suited for electrochemical devices that require heat resistance, in particular, for lithium secondary batteries for electric vehicles, since, while the separator according to the present invention has excellent heat resistance, an electrochemical device that includes the separator gives equal performance in electrochemical properties when compared to existing separators.
US09911955B2 Method for producing porous polyimide film, porous polyimide film and separator using same
A method for producing a porous polyimide film comprises: forming a first un-burned composite film wherein the first film is formed on a substrate using a first varnish that contains (A1) a polyamide acid or a polyimide and (B1) fine particles at a volume ratio (A1):(B1) of from 19:81 to 45:65; forming a second un-burned composite film wherein the second film is formed on the first film using a second varnish that contains (A2) a polyamide acid or a polyimide and (B2) fine particles at a volume ratio (A2):(B2) of from 20:80 to 50:50 and has a lower fine particle content ratio than the first varnish; burning wherein an un-burned composite film composed of the first film and the second film is burned, thereby obtaining a polyimide-fine particle composite film; and a fine particle removal step wherein the fine particles are removed from the polyimide-fine particle composite film.
US09911952B2 Battery module for a motor vehicle
A battery module (10) for a motor vehicle has at least one battery cell (12) for producing and storing electrical energy and a rigid battery frame (14) in which the at least one battery cell (12) is accommodated. An absorption element (24) is secured to the battery frame (14) by connection sections (28). The absorption element (24) is spaced apart from the battery frame (14) in such a way that a cavity (26) is formed between the absorption element (24) and the battery frame (14).
US09911950B2 Electric storage module
Provided is an electric storage module including an electric storage device and an outer package member that covers the electric storage device. The outer package member has a main body that covers the electric storage device and a cable fixing portion provided on an outer surface of the main body of the outer package member. The cable fixing portion has a plurality of insertion holes through which a binding member or a cable can be inserted.
US09911949B2 Secondary battery having pouch type exterior member with downwardly folded sealing part
There is provided a secondary battery including an electrode assembly having a stack structure of an anode/a separation film/a cathode, a pouch type exterior member configured of a lower surface in which a receiving part is formed and an upper surface covering the receiving part, a single electrode assembly or a plurality of electrode assemblies being received in the receiving part, and an electrode terminal formed outwardly of the pouch type exterior member, the secondary battery including: a sealing part formed by bonding edges of the pouch type exterior member, wherein a portion of the sealing part formed on a surface of the pouch type exterior member on which the electrode terminal is not formed outwardly of the exterior member is folded downwardly at an angle of 90 degrees.
US09911942B2 Electronic device and display module provided therein
An electronic device includes a display module, a bottom cover disposed below the display module, and a top cover disposed above the display module and overlapping at least a portion of the display module. The top cover is coupled to the display module or the bottom cover. The display module includes a display panel, a display window. The display window includes a central portion disposed above the display panel and an edge portion connected to the central portion. The edge portion overlaps the top cover and is thinner than the central portion. The bezel is disposed on a bottom surface of the display window and overlaps the edge portion.
US09911939B2 Organic light emitting display device having 2 stack structure and a metal oxide
An organic light emitting display (OLED) device can include a substrate on which first to third light emitting portions are defined, first electrodes respectively positioned on the first to third light emitting portions, a first stack formed on the first electrodes and including first, second and third light emitting layers corresponding to the first, second and third light emitting portions, respectively, an N-type charge generation layer (CGL) positioned on the first stack, a transition metal oxide layer positioned on the N-type CGL, a second stack positioned on the transition metal oxide layer and including fourth, fifth and sixth light emitting layers corresponding to the first, second and third light emitting portions, respectively, and a second electrode positioned on the second stack.
US09911934B2 OLED and method for producing an OLED
An OLED and a method for producing an OLED are disclosed. In an embodiment, the OLED includes a substrate and an organic layer stack with at least one active light-generating layer, which is suitable for generating electromagnetic radiation, wherein the organic layer stack is arranged between a first electrode and a second electrode. The OLED further includes a buffer layer arranged between the substrate and the first electrode, wherein the buffer layer includes an organic material, wherein a polymeric planarization layer is in direct contact with the substrate, wherein the buffer layer is in direct contact with the polymeric planarization layer, and wherein the first electrode is in direct contact with the buffer layer.
US09911932B2 Organic electroluminescent material and organic optoelectronic device
A compound and an organic optoelectronic device are provided. The compound has the following chemical formula (I): chemical formula (I). In the chemical formula (I), X1 to X2 are independently selected from O, S, and substituted or unsubstituted methylene, and a substituent is selected from hydrogen, deuterium, C1 to C30 alkyl, C1 to C30 heteroatom-substituted alkyl, C6 to C30 aryl, and C2 to C30 heteroaryl. X3 is selected from O, S, substituted or unsubstituted methylene, substituted or unsubstituted methylene, and substituted or unsubstituted silylene, and a substituent is selected hydrogen, deuterium, C1 to C30 alkyl, C1 to C30 heteroatom-substituted alkyl, C6 to C30 aryl, and C2 to C30 heteroaryl. R1 to R17 are independently selected from hydrogen, deuterium, C1 to C30 alkyl, C1 to C30 heteroatom-substituted alkyl, C6 to C30 aryl, and C2 to C30 heteroaryl.
US09911927B2 Compounds having semiconducting properties and related compositions and devices
Disclosed are new compounds having semiconducting properties. Such compounds can be processed in solution-phase at a temperature of less than about 50° C. into thin film semiconductors that exhibit high carrier mobility and/or good current modulation characteristics.
US09911926B2 Organic light-emitting device
An organic light-emitting device includes a first electrode, a second electrode facing the first electrode, and an organic layer between the first electrode and the second electrode, the organic layer including an emission layer. The organic layer includes a first compound represented by one of Formulae 1-1 to 1-3 below and a second compound represented by Formula 2 below: where A1 to A5, B1 to B5, D1 to D5, R1 to R5, R12, R13, R41 to R44, L11, L2, L3, and ba to bi are as defined in the specification.
US09911922B2 Organic compound for electroluminescence device
The present invention discloses an organic compound is represented by the following formula(1), the organic EL device employing the organic compound as fluorescent emitting guest shown deep blue color(CIEy=0.09˜0.12)and display good performance. wherein A, m and R1 to R3 are the same definition as described in the present invention.
US09911920B2 Compound, organic photoelectronic device and image sensor
A compound is represented by Chemical Formula 1: X1-T-X2 wherein T is a substituted or unsubstituted fused thiophene moiety, and each of X1 and X2 are independently an organic group including an alkenylene group and an electron withdrawing group.
US09911919B2 Process of manufacturing an electron transport material
A process of dissolving in a solvent to produce a first mixture. To the first mixture a reagent is added to produce a second mixture. A H—R′—R″ is then added to the second mixture to produce a third mixture. The third mixture is then refluxed to produce
US09911914B1 Sub-lithographic magnetic tunnel junctions for magnetic random access memory devices
Methods of forming the MRAM generally include forming an array of MTJ having sub-lithographic dimensions. The array can be formed by providing a substrate including a MTJ material stack including a reference ferromagnetic layer, a tunnel barrier layer, and a free ferromagnetic layer on an opposite side of the tunnel barrier layer. A hardmask layer is deposited onto the MTJ material stack. A first sidewall spacer is formed on the hardmask layer in a first direction. A second sidewall spacer is formed over the first sidewall in a second direction, wherein the first direction is orthogonal to the second direction. The second sidewall spacer intersects the first sidewall spacer. The first sidewall spacer is processed using the second sidewall spacer as mask to form a pattern of oxide pillars having sub-lithographic dimensions. The pattern of oxide pillars are transferred into the MTJ stack to form the array.
US09911913B1 Method of manufacturing piezoelectric microactuators having wrap-around electrodes
A method of manufacturing a piezoelectric microactuator having a wrap-around electrode includes forming a piezoelectric element having a large central electrode on a top face, and having a wrap-around electrode that includes the bottom face, two opposing ends of the device, and two opposing end portions of the top face. The device is then cut through the middle, separating the device into two separate piezoelectric microactuators each having a wrap-around electrode.
US09911909B2 Method for producing a thermoelectric material
A method for fabricating a thermoelectric material comprising providing an initial feedstock of silicon metal particulates, providing an extracting liquid to extract oxidants from the silicon metal particulates, combining the silicon metal particulates and the extracting liquid into a mixture and milling said mixture, withdrawing at least a portion of the milled mixture, within the withdrawn portion of the milled mixture, separating milled silicon metal particulates from the extracting liquid, and mixing the milled silicon metal particulates with a dopant to form a thermoelectric material.
US09911908B2 Light emitting apparatus
A light emitting device including a contact layer, a blocking layer over the contact layer, a protection layer adjacent the blocking layer, a light emitter over the blocking layer, and an electrode layer coupled to the light emitter. The electrode layer overlaps the blocking layer and protection layer, and the blocking layer has an electrical conductivity that substantially blocks flow of current from the light emitter in a direction towards the contact layer. In addition, the protection layer may be conductive to allow current to flow to the light emitter or non-conductive to block current from flowing from the light emitter towards the contact layer.
US09911904B2 Composite board, light-emitting device, and manufacturing method of light-emitting device
A composite board is provided with a board and a covering member. The board includes a base made of ceramics, first wiring provided on an upper surface of the base, and second wiring provided on a lower surface of the base and electrically connected to the first wiring. The covering member covers the base such that the first wiring and the second wiring are exposed.
US09911895B2 Semiconductor structure with inhomogeneous regions
A semiconductor layer including a plurality of inhomogeneous regions is provided. Each inhomogeneous region has one or more attributes that differ from a material forming the semiconductor layer. The inhomogeneous regions can include one or more regions configured based on radiation having a target wavelength. These regions can include transparent and/or reflective regions. The inhomogeneous regions also can include one or more regions having a higher conductivity than a conductivity of the radiation-based regions, e.g., at least ten percent higher.
US09911894B2 Nitride-based III-V group compound semiconductor
A method for manufacturing a light-emitting diode, which includes the steps of: providing a substrate having a plurality of protruded portions on one main surface thereof wherein the protruded portion is made of a material different in type from that of the substrate and growing a first nitride-based III-V Group compound semiconductor layer on each recess portion of the substrate through a state of making a triangle in section wherein a bottom surface of the recess portion becomes a base of the triangle; laterally growing a second nitride-based III-V Group compound semiconductor layer on the substrate from the first nitride-based III-V Group compound semiconductor layer; and successively growing, on the second nitride-based III-V Group compound semiconductor layer, a third nitride-based III-V Group compound semiconductor layer of a first conduction type, an active layer, and a fourth nitride-based III-V compound semiconductor layer of a second conduction type.
US09911891B1 Method of installing photovoltaic modules
A method of installing and connecting together one or more photovoltaic (PV) modules is disclosed. Electrically conductive contacts embedded into the surface of each of one or more photovoltaic (PV) modules provide the connection point for two PV modules to be connected together. PV modules are connected together by removing a protective backing material from an adhesive area surrounding a first set of contacts of a first PV module, and adhering to an adhesive area surrounding a second set of contacts of a second PV module, the adhesive making the connection and sealing and protecting the contact area. No external wiring, connectors or devices are required to make the electrical connection between two PV modules. Contacts are integral and embedded into the surface of each individual PV module. The PV modules have adhesive on the back to allow them to be adhesively attached to a surface without additional mounting hardware. Once the PV modules are connected together, protective spacers are adhesively attached to protect all exposed contacts. Electrical circuit connectors are adhesively attached to the contacts on one end of the series of interconnected PV modules, which then in turn electrically connects to an electrical device or load. The entire assembly of interconnected PV modules is then adhesively attached to an installation surface.
US09911888B2 Photovoltaic device having layer with varying crystallinity
A method for forming a photovoltaic device includes providing a substrate. A layer is deposited to form one or more layers of a photovoltaic stack on the substrate. The depositing of the amorphous layer includes performing a high power flash deposition for depositing a first portion of the layer. A low power deposition is performed for depositing a second portion of the layer.
US09911880B2 Method and apparatus for forming and mounting a photovoltaic array
A PV module framing and coupling system which enables the attachment of PV modules to a roof or other mounting surface without requiring the use of separate structural support members which attach directly to and span between multiple PV modules in a formed PV array and a cable management system that holds, directs, organizes, and otherwise manages cables, wires, cord, and similar components of and relating to a PV array.
US09911878B2 Metal-assisted etch combined with regularizing etch
In an aspect of the disclosure, a process for forming nanostructuring on a silicon-containing substrate is provided. The process comprises (a) performing metal-assisted chemical etching on the substrate, (b) performing a clean, including partial or total removal of the metal used to assist the chemical etch, and (c) performing an isotropic or substantially isotropic chemical etch subsequently to the metal-assisted chemical etch of step (a). In an alternative aspect of the disclosure, the process comprises (a) performing metal-assisted chemical etching on the substrate, (b) cleaning the substrate, including removal of some or all of the assisting metal, and (c) performing a chemical etch which results in regularized openings in the silicon substrate.
US09911877B2 Electronic device, package structure and method of manufacturing the same
An electronic device includes a light source, a light receiver, a first light guide structure, and a second light guide structure. The first light guide structure faces a light emitting surface of the light source and faces a lateral wall of the light receiver. The second light guide structure is disposed over the light receiver and coupled to the first light guide structure. The light receiver and the second light guide structure defines a cavity between the light receiver and the second light guide structure.
US09911869B2 Diode with reduced recovery time for applications subject to the current recirculation phenomenon and/or to fast voltage variations
A diode comprising a semiconductor body delimited by a front surface and including: a first semiconductor region having a first type of conductivity, facing at least in part the front surface; and a second semiconductor region having a second type of conductivity, the second semiconductor region facing at least in part the front surface and surrounding, at a distance, at least part of the first semiconductor region. The diode further includes: a trench, which extends in the semiconductor body starting from the front surface, for surrounding at least part of the second semiconductor region; and a lateral insulation region, which is arranged within the trench, is formed by dielectric material and contacts at least in part the second semiconductor region.
US09911867B2 Fin-based nonvolatile memory structures, integrated circuits with such structures, and methods for fabricating same
Integrated circuits, nonvolatile memory (NVM) structures, and methods for fabricating integrated circuits with NVM structures are provided. An exemplary integrated circuit includes a substrate and a dual-bit NVM structure overlying the substrate. The dual-bit NVM structure includes primary, first adjacent and second adjacent fin structures laterally extending in parallel over the substrate. The primary fin structure includes source, channel and drain regions. Each adjacent fin structure includes a program/erase gate. The dual-bit NVM structure further includes a first floating gate located between the channel region of the primary fin structure and the first adjacent fin structure and a second floating gate located between the channel region of the primary fin structure and the second adjacent fin structure. Also, the dual-bit NVM structure includes a control gate adjacent the primary fin structure.
US09911865B2 Semiconductor device and method for manufacturing the semiconductor device
An object is to provide favorable interface characteristics of a thin film transistor including an oxide semiconductor layer without mixing of an impurity such as moisture. Another object is to provide a semiconductor device including a thin film transistor having excellent electric characteristics and high reliability, and a method by which a semiconductor device can be manufactured with high productivity. A main point is to perform oxygen radical treatment on a surface of a gate insulating layer. Accordingly, there is a peak of the oxygen concentration at an interface between the gate insulating layer and a semiconductor layer, and the oxygen concentration of the gate insulating layer has a concentration gradient. The oxygen concentration is increased toward the interface between the gate insulating layer and the semiconductor layer.
US09911856B2 Semiconductor device
One of objects is to provide a semiconductor device with stable electric characteristics, in which an oxide semiconductor is used. The semiconductor device includes a thin film transistor including an oxide semiconductor layer, and a silicon oxide layer over the thin film transistor. The thin film transistor includes a gate electrode layer, a gate insulating layer whose thickness is equal to or larger than 100 nm and equal to or smaller than 350 nm, the oxide semiconductor layer, a source electrode layer and a drain electrode layer. In the thin film transistor, the difference of the threshold voltage value is 1 V or less between before and after performance of a measurement in which the voltage of 30 V or −30 V is applied to the gate electrode layer at a temperature of 85° C. for 12 hours.
US09911855B2 Top metal pads as local interconnectors of vertical transistors
An integrated circuit structure includes a first vertical transistor and a second vertical transistor. The first vertical transistor includes a first semiconductor channel, a first top source/drain region over the first semiconductor channel, and a first top source/drain pad overlapping the first top source/drain region. The second vertical transistor includes a second semiconductor channel, a second top source/drain region over the second semiconductor channel, and a second top source/drain pad overlapping the second top source/drain region. A local interconnector interconnects the first top source/drain pad and the second top source/drain pad. The first top source/drain pad, the second top source/drain pad, and the local interconnector are portions of a continuous region, with no distinguishable interfaces between the first top source/drain pad, the second top source/drain pad, and the local interconnector.
US09911851B2 Integrated circuit devices having air-gap spacers above gate electrodes
Integrated circuit devices having a cavity and methods of manufacturing the integrated circuit devices are provided. The integrated circuit devices may include a pair of spacers, which define a recess. The integrated circuit device may also include a lower conductive pattern in the recess and an upper conductive pattern on the lower conductive pattern. The upper conductive pattern may have an etch selectivity with respect to the lower conductive pattern and may expose an upper surface of the lower conductive pattern adjacent a sidewall of the upper conductive pattern. An inner sidewall of one of the pair of spacers, the upper surface of the lower conductive pattern and the sidewall of the upper conductive pattern may define a space and a capping pattern may be formed on the upper conductive pattern to seal a top portion of the space, such that a cavity is disposed under the capping pattern.
US09911847B1 Non-volatile memory device and manufacturing method thereof
A non-volatile memory device includes a substrate, a gate stack structure, an erase gate structure, and a ferroelectric layer. The gate stack structure is disposed on the substrate. The erase gate structure is disposed on the substrate and disposed at a first side of the gate stack structure. The ferroelectric layer is disposed on a sidewall of the gate stack structure, and the ferroelectric layer is disposed between the gate stack structure and the erase gate structure. The ferroelectric layer disposed between the gate stack structure and the erase gate structure may be used to forma negative capacitance effect for amplifying the voltage applied to the erase gate structure. The purpose of reducing power consumption may be achieved accordingly.
US09911843B2 Semiconductor device
A parasitic capacitance and a leak current in a nitride semiconductor device are reduced. For example, a 100 nm-thick buffer layer made of AlN, a 2 μm-thick undoped GaN layer, and 20 nm-thick undoped AlGaN having an Al composition ratio of 20% are epitaxially grown in this order on, for example, a substrate made of silicon, and a source electrode and a drain electrode are formed so as to be in ohmic contact with the undoped AlGaN layer. Further, in the undoped GaN layer and the undoped AlGaN layer immediately below a gate wire, a high resistance region, the resistance of which is increased by for example, ion implantation with Ar or the like, is formed, and a boundary between the high resistance region and an element region is positioned immediately below the gate wire.
US09911841B2 Single-electron transistor and its fabrication method
Single-electron transistor comprising at least: first semiconductor portions forming source and drain regions, a second semiconductor portion forming at least one quantum island, third semiconductor portions forming tunnel junctions between the second semiconductor portion and the first semiconductor portions, a gate and a gate dielectric located on at least the second semiconductor portion, in which a thickness of each of the first semiconductor portions is greater than the thickness of the second semiconductor portion, and in which a thickness of the second semiconductor portion is greater than the thickness of each of the third semiconductor portions.
US09911840B2 Self aligned trench MOSFET with integrated diode
A transistor device includes a doped semiconductor substrate having one or more electrically insulated gate electrodes formed in trenches in the substrate. One or more body regions are formed in a top portion of the substrate proximate each gate trench. One or more source regions are formed in a self-aligned fashion in a top portion of the body regions proximate each gate trench. One or more thick insulator portions are formed over the gate electrodes on a top surface of the substrate with spaces between adjacent thick insulator portions. A metal is formed on top of the substrate over the thick insulator portions. The metal forms a self-aligned contact to the substrate through the spaces between the thick insulator portions. An integrated diode is formed under the self-aligned contact.
US09911839B2 RB-IGBT
An RB-IGBT is provided that has a new emitter trench structure with improved breakdown voltage achieved by improving the electrical field distribution of the drift region. The RB-IGBT includes an isolation region having a first conductivity type on a side surface of a semiconductor substrate. The semiconductor substrate includes a drift region having a second conductivity type; a collector region having the first conductivity type and provided farther downward than the drift region; and an emitter trench portion provided extending to the drift region in a thickness direction from a front surface to a back surface of the semiconductor substrate. The emitter trench portion includes a trench electrode electrically connected to an emitter electrode provided above the semiconductor substrate; an upper trench insulating film directly contacting a bottom portion and side portions of the trench electrode; and a lower trench insulating film provided below the upper trench insulating film.
US09911830B2 FinFETs with contact-all-around
An integrated circuit structure includes a semiconductor substrate, a semiconductor fin over the semiconductor substrate, a gate stack on a top surface and a sidewall of the semiconductor fin, a source/drain region on a side of the gate stack, and a contact plug encircling a portion of the source/drain region.
US09911824B2 Semiconductor structure with multi spacer
A semiconductor structure and a method for forming the same are provided. The semiconductor structure includes a fin structure formed over a substrate and a gate structure formed across the fin structure. The semiconductor structure further includes a bottom spacer formed on a lower part of a sidewall of the gate structure and an upper spacer formed on an upper part of the sidewall of the gate structure. In addition, the upper spacer includes an air gap formed in a dielectric material.
US09911819B2 Circuits using gate-all-around technology
A semiconductor structure includes a first GAA transistor and a second GAA transistor. The first GAA transistor includes: a first top OD region, a first bottom OD region, and a first nanowire. A second GAA transistor includes: a second top OD region, a second bottom OD region, and a second nanowire. The first top OD region, the first bottom OD region, and the first nanowire are symmetrical with the second top OD region, the second bottom OD region, and the second nanowire respectively, the first GAA transistor is arranged to provide a first current to flow from the first top OD region to the first bottom OD region, and the second GAA transistor is arranged to provide a second current to flow from the second top OD region to the second bottom OD region.
US09911818B2 Semiconductor device
A semiconductor device includes a semiconductor region made of a material to which conductive impurities are added, an insulating film formed on a surface of the semiconductor region, and an electroconductive gate electrode formed on the insulating film. The gate electrode is made of a material whose Fermi level is closer to a Fermi level of the semiconductor region than a Fermi level of Si in at least a portion contiguous to the insulating film.
US09911817B2 Field-plate structures for semiconductor devices
Field-plate structures are disclosed for electrical field management in semiconductor devices. A field-plate semiconductor structure includes a semiconductor substrate, a source ohmic contact, a drain ohmic contact, and a gate contact disposed over a gate region between the source ohmic contact and the drain ohmic contact, and a source field plate connected to the source ohmic contact. A field-plate dielectric is disposed over the semiconductor substrate. An encapsulating dielectric is disposed over the gate contact, wherein the encapsulating dielectric covers a top surface of the gate contact. The source field plate is disposed over the field-plate dielectric in a field plate region, from which the encapsulating dielectric is absent.
US09911815B2 Extended-drain structures for high voltage field effect transistors
Planar and non-planar field effect transistors with extended-drain structures, and techniques to fabricate such structures. In an embodiment, a field plate electrode is disposed over an extended-drain, with a field plate dielectric there between. The field plate is disposed farther from the transistor drain than the transistor gate. In a further embodiment, an extended-drain transistor has source and drain contact metal at approximately twice a pitch, of the field plate and the source and/or drain contact metal. In a further embodiment, an isolation dielectric distinct from the gate dielectric is disposed between the extended-drain and the field plate. In a further embodiment, the field plate may be directly coupled to one or more of the transistor gate electrode or a dummy gate electrode without requiring upper level interconnection. In an embodiment, a deep well implant may be disposed between a lightly-doped extended-drain and a substrate to reduce drain-body junction capacitance and improve transistor performance.
US09911814B2 Semiconductor device and manufacturing method thereof
A semiconductor device includes a P-type semiconductor substrate, a plurality of N-type buried diffusion layers that are arranged in the semiconductor substrate, an N-type first semiconductor layer that is arranged in a first region on a first buried diffusion layer, an N-type second semiconductor layer that is arranged in a second region on a second buried diffusion layer, an N-type first impurity diffusion region that surrounds the first region in plan view, a P-type second impurity diffusion region that is arranged in the second semiconductor layer, an N-type third impurity diffusion region that is arranged in the second semiconductor layer, an N-type fourth impurity diffusion region that is arranged in the first semiconductor layer. The second region is a region in which an N-type impurity diffusion region that has a higher impurity concentration than the second semiconductor layer cannot be arranged.
US09911813B2 Reducing leakage current in semiconductor devices
A semiconductor device includes a first region having a first semiconductor material and a second region having a second semiconductor material. The second region is formed over the first region. The semiconductor device also includes a current blocking structure formed in the first region between first and second terminals of the semiconductor device. The current blocking structure is configured to reduce current flow in the first region between the first and second terminals.
US09911810B2 Process for manufacturing a semiconductor power device comprising charge-balance column structures and respective device
Process for manufacturing a semiconductor power device, wherein a trench is formed in a semiconductor body having a first conductivity type; the trench is annealed for shaping purpose; and the trench is filled with semiconductor material via epitaxial growth so as to obtain a first column having a second conductivity type. The epitaxial growth is performed by supplying a gas containing silicon and a gas containing dopant ions of the second conductivity type in presence of a halogenide gas and occurs with uniform distribution of the dopant ions. The flow of the gas containing dopant ions is varied according to a linear ramp during the epitaxial growth; in particular, in the case of selective growth of the semiconductor material in the presence of a hard mask, the flow decreases; in the case of non-selective growth, in the absence of hard mask, the flow increases.
US09911808B2 Method for forming a semiconductor device and a semiconductor device
A method for forming a semiconductor device includes incorporating first dopant atoms of a first conductivity type into a semiconductor substrate to form a first doping region of the first conductivity type. Further, the method includes forming an epitaxial semiconductor layer on the semiconductor substrate and incorporating second dopant atoms of a second conductivity type before or after forming the epitaxial semiconductor layer to form a second doping region including the second conductivity type adjacent to the first doping region so that a pn-junction is located between the first doping region and the second doping region. The pn-junction is located in a vertical distance of less than 5 μm to an interface between the semiconductor substrate and the epitaxial semiconductor layer. Additionally, the method includes thinning the semiconductor substrate based on a self-aligned thinning process. The self-aligned thinning process is self-controlled based on the location of the pn-junction.
US09911807B2 Strain compensation in transistors
Transistor structures having channel regions comprising alternating layers of compressively and tensilely strained epitaxial materials are provided. The alternating epitaxial layers can form channel regions in single and multigate transistor structures. In alternate embodiments, one of the two alternating layers is selectively etched away to form nanoribbons or nanowires of the remaining material. The resulting strained nanoribbons or nanowires form the channel regions of transistor structures. Also provided are computing devices comprising transistors comprising channel regions comprised of alternating compressively and tensilely strained epitaxial layers and computing devices comprising transistors comprising channel regions comprised of strained nanoribbons or nanowires.
US09911806B2 Solvent-based oxidation on germanium and III-V compound semiconductor materials
A method to provide an isolation feature over a semiconductor structure is disclosed. The method includes forming a fin structure over a semiconductor substrate, forming an oxide layer over the fin structure, wherein forming the oxide layer includes performing a wet chemical oxidation process on the fin structure with a solvent mixture, forming a dielectric layer over the oxide layer, and forming at least one isolation feature over the semiconductor structure.
US09911803B2 Semiconductor device
A semiconductor device includes a semiconductor substrate. The element region of the semiconductor substrate includes a first body region having a first conductivity type, a first drift region having a second conductivity type, and a plurality of first floating regions, each the first floating regions having the first conductivity type. The termination region includes a second drift region having the second conductivity type, and a plurality of second floating regions, each of the second floating regions having the first conductivity type. The each of the second floating regions is surrounded by the second drift region. When a depth of a center of the first drift region is taken as a reference depth, at least one of the second floating regions is placed closer to the reference depth than each of the first floating regions.
US09911801B2 Light emitting device
A light emitting device is provided which can prevent a change in gate voltage due to leakage or other causes and at the same time can prevent the aperture ratio from lowering. A capacitor storage is formed from a connection wiring line, an insulating film, and a capacitance wiring line. The connection wiring line is formed over a gate electrode and an active layer of a TFT of a pixel, and is connected to the active layer. The insulating film is formed on the connection wiring line. The capacitance wiring line is formed on the insulating film. This structure enables the capacitor storage to overlap the TFT, thereby increasing the capacity of the capacitor storage while keeping the aperture ratio from lowering. Accordingly, a change in gate voltage due to leakage or other causes can be avoided to prevent a change in luminance of an OLED and flickering of screen in analog driving.
US09911795B2 Pixel unit and method of manufacturing the same, light emitting device and display device
The present invention discloses a pixel unit, which comprises a pixel defining layer defining a pixel region, a first electrode within a central area of the pixel region, an organic-light-emitting-display-device functional layer formed within the pixel region and on the first electrode, and a second electrode formed on the organic-light-emitting-display-device functional layer, an area of a bottom plane of the organic-light-emitting-display-device functional layer being larger than that of an upper surface of the first electrode. The pixel defining layer comprises first and second pixel defining portions having ring-shaped structures, the first pixel defining portion has an inner side surface defining the pixel region, and the second pixel defining portion has an outer side surface in contact with the inner side surface of the first pixel defining portion, and is disposed around the first electrode. The first pixel defining portion has a thickness greater than the second pixel defining portion.
US09911794B2 Organic light emitting display device
The present invention provides an organic light emitting display device, belonging to the field of display technology, being capable of solving the problem, in an existing organic light emitting display device, of shortened service life of an organic light emitting diode due to moisture escape from the thin film transistor layer or the like. The organic light emitting display device of the present invention comprises a first pixel defining layer doped with a desiccant, which absorbs moisture escaping from an array substrate or the like during the use of the organic light emitting display device, thus improving the ageing and shrinkage of some pixels in the organic light emitting display device and prolonging the service life of the organic light emitting display device.
US09911790B1 Resistive RAM including air gaps between word lines and between vertical bit lines
A plurality of alternating stacks laterally spaced apart by line trenches is provided over a substrate. Each alternating stack includes respective word lines and respective dielectric material layers. An alternating sequence of vertical bit lines and inter-bit-line cavities is formed within each of the line trenches. Resistive memory material layers including resistive memory elements are provided at intersection regions between the word lines and the vertical bit lines. Air gaps are formed by removing at least a predominant portion of each of the dielectric material layers selective to the word lines, the vertical bit lines, and the resistive memory material layers, thereby forming a plurality of alternating stacks of the word lines and air gaps. A dielectric isolation layer including vertically-extending voids can be formed over the plurality of alternating stacks in the inter-bit-line cavities.
US09911788B2 Selectors with oxide-based layers
A selector with an oxide-based layer includes an oxide-based layer that has a first region and a second region. The first region contains a metal oxide in a first oxidation state, and the second region contains the metal oxide in a second oxidation state. The first region also forms a part of each of two opposite faces of the oxide-based layer.
US09911784B2 Monolithic visible-infrared focal plane array on silicon
A structure includes a silicon substrate; silicon readout circuitry disposed on a first portion of a top surface of the substrate and a radiation detecting pixel disposed on a second portion of the top surface of the substrate. The pixel has a plurality of radiation detectors connected with the readout circuitry. The plurality of radiation detectors are composed of at least one visible wavelength radiation detector containing germanium and at least one infrared wavelength radiation detector containing a Group III-V semiconductor material. A method includes providing a silicon substrate; forming silicon readout circuitry on a first portion of a top surface of the substrate and forming a radiation detecting pixel, on a second portion of the top surface of the substrate, that has a plurality of radiation detectors formed to contain a visible wavelength detector composed of germanium and an infrared wavelength detector composed of a Group III-V semiconductor material.
US09911783B2 Solid-state image pickup device
A solid-state image pickup device is provided which can inhibit degradation of image quality which may occur when a global electronic shutter operation is performed. A gate drive line for a first transistor of gate drive lines for pixel transistors is positioned in proximity to a converting unit.
US09911782B2 Semiconductor device and method for driving the same
The semiconductor device includes a plurality of pixels arranged in rows and columns, and first transistors fewer than the number of the plurality of pixels. The plurality of pixels each includes a photodiode and an amplifier circuit. The amplifier circuit holds the accumulated charge and includes at least a second transistor electrically connected to a cathode of the photodiode. The cathode of the photodiode in the pixel in an n-th row and the cathode of the photodiode in the pixel in an (n+1)-th row are electrically connected to the first transistor. The number n is a natural number. The pixel in the n-th row and the pixel in the (n+1)-th row are in an identical column.
US09911781B2 Photosensitive imaging devices and associated methods
Photosensitive devices and associated methods are provided. In one aspect, for example, a photosensitive imager device can include a semiconductor substrate having multiple doped regions forming at least one junction, a textured region coupled to the semiconductor substrate and positioned to interact with electromagnetic radiation, and an electrical transfer element coupled to the semiconductor substrate and operable to transfer an electrical signal from the at least one junction. In one aspect, the textured region is operable to facilitate generation of an electrical signal from the detection of infrared electromagnetic radiation. In another aspect, interacting with electromagnetic radiation further includes increasing the semiconductor substrate's effective absorption wavelength as compared to a semiconductor substrate lacking a textured region.
US09911777B2 Image sensors using different photoconversion region isolation structures for different types of pixel regions
An image sensor includes a semiconductor substrate, a first pair of photoelectric conversion regions in a first pixel region of the substrate and a first isolation structure between the photoelectric conversion regions of the first pair of photoelectric conversion regions. The sensor further includes a second pair of photoelectric conversion regions in a second pixel region of the substrate adjacent the first pixel region and a second isolation structure between the photoelectric conversion regions of the second pair of photoelectric conversion regions and having different optical properties than the first isolation structure. First and second different color filters (e.g., green and red) may be disposed on respective ones of the first and second pixel regions.
US09911771B2 Radiographic imaging array fabrication process for metal oxide thin-film transistors with reduced mask count
Embodiments of radiographic imaging systems; radiography detectors and methods for using the same; and/or fabrication methods therefore can include radiographic imaging array that can include a plurality of pixels that each include a photoelectric conversion element coupled to a thin-film switching element. In certain exemplary embodiments, thin-film switching element is a metal oxide (e.g., a-IGZO) TFT manufactured using a reduce photolithography mask counts. In certain exemplary embodiments, the thin-film switching element is a metal oxide (e.g., a-IGZO) TFT that includes reduced lower alignment tolerances between TFT electrodes. In certain exemplary embodiments, the thin-film switching element is a metal oxide (e.g., a-IGZO) TFT including a reduced thickness active layer.
US09911769B2 Elevated pocket pixels, imaging devices and systems including the same and method of forming the same
An elevated photosensor for image sensors and methods of forming the photosensor. The photosensor may have light sensors having indentation features including, but not limited to, v-shaped, u-shaped, or other shaped features. Light sensors having such an indentation feature can redirect incident light that is not absorbed by one portion of the photosensor to another portion of the photosensor for additional absorption. In addition, the elevated photosensors reduce the size of the pixel cells while reducing leakage, image lag, and barrier problems.
US09911766B2 Array substrate and manufacturing method thereof, and display apparatus
The present invention provides an array substrate and a manufacturing method thereof, and a display apparatus comprising the array substrate an array substrate, which can avoid poor displays due to large coupling capacitance between a data line and a pixel electrode in an array substrate in the prior art. The manufacturing method comprises the following steps: S1, forming a data line metal layer on a substrate, and forming a pattern of a data line by a patterning process; S2, forming a semiconductor layer on the substrate formed with the data line thereon, and forming a pattern of an active layer by a patterning process, wherein the data line is connected with the active layer.
US09911765B2 Thin film transistor substrate including thin film transistor formed of oxide semiconductor and method for manufacturing the same
A thin film transistor (TFT) located on a thin film transistor substrate includes a first insulating film formed so as to cover a gate electrode, a channel layer that is formed at a position on the first insulating film overlapping the gate electrode and formed of an oxide semiconductor, a second insulating film formed on the channel layer, and a third insulating film formed so as to cover the second insulating film. A source electrode and a drain electrode are formed on the third insulating film. Each of the source electrode and the drain electrode is connected to the channel layer through the corresponding one of contact holes penetrating the second insulating film and the third insulating film.
US09911763B2 Thin film transistor array substrate and display apparatus including the same
A thin film transistor array substrate comprises: a substrate; a driving thin film transistor including an active layer, a gate electrode, a source electrode, and a drain electrode; a first capacitor including a first electrode connected to the gate electrode, and a second electrode disposed at a layer different from a layer at which the first electrode is disposed and at least partially overlapping the first electrode; a first conductive layer disposed at a layer that is the same as the layer of the second electrode of the first capacitor; a second conductive layer disposed at a layer different from the layer at which the first conductive layer is disposed; and a bridge electrode disposed at a layer that is different from the first and second conductive layers, and contacting the first and second conductive layers so that the first and second conductive layers are electrically connected to each other.
US09911762B2 Display device
A display device is provided, which includes a substrate structure containing a substrate with a pixel region, and the pixel region includes an aperture region. A metal oxide semiconductor transistor is disposed over the substrate and includes a metal oxide semiconductor layer with a first channel region, a first gate electrode corresponding to the first channel region, and a silicon oxide insulating layer on the metal oxide semiconductor layer. The silicon oxide insulating layer includes an opening corresponding to the aperture region. A polysilicon transistor is disposed over the substrate. The display device also includes an opposite substrate structure, and a display medium between the substrate structure and the opposite substrate structure.
US09911761B2 Thin-film transistor array substrate and organic light-emitting diode display including the same
A thin-film transistor (TFT) array substrate and organic light-emitting diode (OLED) display are disclosed. In one aspect, the TFT array substrate includes a driving TFT including a driving gate electrode, a switching TFT including a switching gate electrode and spaced apart from the driving TFT, and a storage capacitor including a first electrode electrically connected to the driving gate electrode and a second electrode formed over and insulated from the first electrode. The TFT array substrate also includes a capacitor insulating film formed between the first and second electrodes and an interlayer insulating film covering at least part of the driving TFT, at least part of the switching TFTs, and the capacitor insulating film, wherein the switching gate electrode and the second electrode are formed of the same material.
US09911753B2 Semiconductor device and method for manufacturing semiconductor device
According to one embodiment, an insulating layer is provided above a stairstep portion of a stacked body. A first cover film is provided between the stairstep portion and the insulating layer. The first cover film is of a material different from the insulating layer. A separation portion divides the stacked body and the insulating layer. A second cover film is provided at a side surface of the insulating layer on the separation portion side. The second cover film is of a material different from the insulating layer.
US09911751B2 Manufacturing method for semiconductor device having hole penetrating stack structure
A manufacturing method for a semiconductor device includes forming a first stacked structure, forming a first hole penetrating the first stacked structure, forming a reflective metal pattern in the first hole, filling an etch stop layer in the first hole and over the reflective metal pattern, forming a second stacked structure over the first stacked structure, and forming a second hole penetrating the second stacked structure to expose the etch stop layer.
US09911749B2 Stacked 3D semiconductor memory structure
According to one embodiment, a semiconductor memory device includes a substrate; a stacked body provided on the substrate and including a plurality of electrode layers; a semiconductor film; a charge storage film; an interconnect layer provided in the stacked body, the interconnect layer; a first contact portion; a first metal layer; and a second metal layer. The interconnect layer includes: a first portion including silicon; and a second portion provided on the first portion and including metal. The first metal layer is provided on the first contact portion. The second metal layer is provided on the first metal layer, and electrically connected to the interconnect layer.
US09911742B2 Semiconductor structures
A method for forming a semiconductor structure includes sequentially providing a semiconductor substrate having NFET regions and NFET regions; forming an insulation layer on the semiconductor substrate; forming a sacrificial layer on the insulation layer; forming first trenches in the PFET regions, and second trenches in the NFET regions; forming a third trench on the bottom of each of the first trenches and the second trenches; forming a first buffer layer in each of the first trenches and the second trenches by filling the third trenches; forming a first semiconductor layer on each of the first buffer layers in the first trenches and the second teaches; removing the first semiconductor layers in the second trenches; forming a second buffer layer with a top surface lower than the insolation layer in each of second trenches; and forming a second semiconductor layer on each of the second buffer layers.
US09911741B2 Dual channel material for finFET for high performance CMOS
Silicon fins are formed in a bulk silicon substrate and thereafter trench isolation regions are formed between each silicon fin. The silicon fins in nFET and pFET device regions are then recessed. A relaxed silicon germanium alloy fin portion is formed on a topmost surface of each recessed silicon fin portion or on exposed surface of the substrate. A compressively strained silicon germanium alloy fin portion is formed on each relaxed silicon germanium alloy fin portion within the pFET device region, and a strained silicon-containing fin portion is formed on each relaxed silicon germanium alloy fin portion within the nFET device region. Sidewall surfaces of each compressively strained silicon-containing germanium alloy fin portion and each tensile strained silicon-containing fin portion are then exposed. A functional gate structure is provided on the exposed sidewall surfaces of each compressively strained silicon-containing germanium alloy fin portion and each tensile strained silicon-containing fin portion.
US09911739B2 III-V FinFET CMOS with III-V and germanium-containing channel closely spaced
Closely spaced III-V compound semiconductor fins and germanium-containing semiconductor fins are provided by utilizing mandrel structures for III-V compound semiconductor material epitaxial growth and subsequent fin formation. Mandrel structures are formed on a semiconductor material stack that includes an uppermost layer of a relaxed germanium-containing material layer. A hard mask portion is formed on a pFET device region of the semiconductor material stack, and then recessed regions are provided in the relaxed germanium-containing material layer of the material stack semiconductor and in an nFET device region. An III-V compound semiconductor material plug is then formed in each recessed region. First sacrificial spacers are formed adjacent the sidewalls of each mandrel structures, and then each mandrel structure is removed. III-V compound semiconductor fins and germanium-containing semiconductor fins are then formed in the different device regions utilizing each first sacrificial spacer as an etch mask.
US09911737B2 Integrated circuit comprising transistors with different threshold voltages
An integrated circuit includes a substrate with first and second cells having first and second FDSOI field-effect transistors. There are first and second ground planes, a buried oxide layer and first and second wells, under the ground planes. The first well and the first ground plane have the same doping and the second well and the second ground plane have the same doping. The first and second cells are adjoined and their transistors are aligned in a first direction. The wells of the first cell and the first well of the second cell are doped opposite of the second well. A control device applies a first electrical bias to the wells with the first doping and a second electrical bias to the well with the second doping. The transistors of the first cell and second cell have different threshold voltage levels.
US09911736B1 Method of forming field effect transistors with replacement metal gates and contacts and resulting structure
In a method for forming an integrated circuit (IC) structure, which incorporates multiple field effect transistors (FETs) with discrete replacement metal gates (RMGs) and replacement metal contacts (RMCs), gate cut trench(es) and contact cut trench(es) are formed at the same process level. These trench(es) are then filled at the same time with the same isolation material to form gate cut isolation region(s) for electrically isolating adjacent RMGs and contact cut isolation region(s) for electrically isolating adjacent RMCs, respectively. The selected isolation material can be a low-K isolation material for optimal performance. Furthermore, since the same process step is used to fill both types of trenches, only a single chemical mechanical polishing (CMP) process is needed to remove the isolation material from above the gate level, thereby minimizing gate height loss and process variation. Also disclosed herein is an IC structure formed according to the method.
US09911734B2 Semiconductor device containing HEMT and MISFET and method of forming the same
A semiconductor structure with a MISFET and a HEMT region includes a first III-V compound layer. A second III-V compound layer is disposed on the first III-V compound layer and is different from the first III-V compound layer in composition. A third III-V compound layer is disposed on the second III-V compound layer is different from the second III-V compound layer in composition. A source feature and a drain feature are disposed in each of the MISFET and HEMT regions on the third III-V compound layer. A gate electrode is disposed over the second III-V compound layer between the source feature and the drain feature. A gate dielectric layer is disposed under the gate electrode in the MISFET region but above the top surface of the third III-V compound layer.
US09911733B2 Semiconductor device and method of manufacturing semiconductor device
A semiconductor device, including a semiconductor substrate, a plurality of trenches formed on a front surface of the semiconductor substrate, a plurality of gate electrodes formed in the trenches, a base region and an anode region formed between adjacent trenches respectively in first and second element regions of the semiconductor substrate, a plurality of emitter regions and contact regions selectively formed in the base region, an interlayer insulating film covering the gate electrodes, first and second contact holes penetrating the interlayer insulating film, a plurality of contact plugs embedded in the first contact holes, a first electrode contacting the contact plugs and contacting the anode region via the second contact hole, a collector region and a cathode region formed on a back surface of the semiconductor substrate respectively in the first and second element regions, and a second electrode contacting the collector region and the cathode region.
US09911730B2 Transient voltage suppressor and manufacture method thereof
A transient voltage suppressor can include: a semiconductor substrate; a first buried layer of a first type formed in and on the semiconductor substrate; a second buried layer of a second type formed in a first region of the first buried layer; a first epitaxial region of the second type formed on the second buried layer and a second epitaxial region of the first type formed on a second region of the first buried layer; a first doped region of the first type formed in the first epitaxial region and a second doped region of the second type formed in the second epitaxial region; a conductive channel extending from a surface of the second epitaxial region into the first buried layer; and a first electrode connected to the conductive channel, a second electrode connected to the first doped region, and a third electrode connected to the second doped region.
US09911727B2 Strapping structure of memory circuit
A memory circuit includes a first memory cell and a second memory adjacent to the first memory cell. The first memory cell includes a first word line strapping line segment electrically coupled with a pass device of the first memory cell; and a second word line strapping line segment. The second memory cell includes a first word line strapping line segment; and a second word line strapping line segment electrically coupled with a pass device of the second memory cell. The first word line strapping line segment of the first memory cell and the first word line strapping line segment of the second memory cell are connected with each other at a first interconnection layer. The second word line strapping line segment of the first memory cell and the second word line strapping line segment of the second memory cell are connected with each other at the first interconnection layer.
US09911726B2 Method and apparatus to facilitate direct surface cooling of a chip within a 3D stack of chips using optical interconnect
In one embodiment, the disclosure relates to a system of stacked and connected layers of circuits that includes at least one pair of adjacent layers having very few physical (electrical) connections. The system includes multiple logical connections. The logical interconnections may be made with light transmission. A majority of physical connections may provide power. The physical interconnections may be sparse, periodic and regular. The exemplary system may include physical space (or gap) between the a pair of adjacent layers having few physical connections. The space may be generally set by the sizes of the connections. A constant flow of coolant (gaseous or liquid) may be maintained between the adjacent pair of layers in the space.
US09911725B2 Packaging mechanisms for dies with different sizes of connectors
Embodiments of mechanisms for forming a die package with multiple packaged dies on a package substrate use an interconnect substrate to provide electrical connections between dies and the package substrate. The usage of the interconnect substrate enables cost reduction because it is cheaper to make than an interposer with through silicon vias (TSVs). The interconnect substrate also enables dies with different sizes of bump structures to be packaged in the same die package.
US09911721B2 Semiconductor device
A semiconductor device includes a light emitting element comprising a substrate having a first and a second surface and an outer edge connecting the first and second surfaces. A light emitting layer is on a central portion of the first surface but not on a peripheral portion between the central portion and the outer edge of the substrate. A first insulating layer is disposed on the peripheral portion of the first surface, a side surface of the light emitting layer, and a third surface of the light emitting layer that is spaced from the first surface of the substrate. A first electrode is electrically contacting the third surface of the light emitting layer. A light receiving element is provided in a propagation path of light emitted from the light emitting element.
US09911717B2 Stackable microelectronic package structures
A microelectronic assembly includes a first microelectronic package having a substrate with first and second opposed surfaces and substrate contacts thereon. The first package further includes first and second microelectronic elements, each having element contacts electrically connected with the substrate contacts and being spaced apart from one another on the first surface so as to provide an interconnect area of the first surface between the first and second microelectronic elements. A plurality of package terminals at the second surface are electrically interconnected with the substrate contacts for connecting the package with a component external thereto. A plurality of stack terminals are exposed at the first surface in the interconnect area for connecting the package with a component overlying the first surface of the substrate. The assembly further includes a second microelectronic package overlying the first microelectronic package and having terminals joined to the stack terminals of the first microelectronic package.
US09911714B2 Lead frame
A lead frame includes adjacent die pads which lie adjacent to each other; grounding leads extended from the adjacent die pads; a connecting bar by which the grounding leads extended from the adjacent die pads are interconnected. The grounding leads and the connecting bar are formed to be thinner at one surface than a maximum thickness of leads of the lead frame, the grounding leads extended from the adjacent die pads are aligned on a common axis while providing the connecting bar between the grounding leads, and a support projection is provided at the one surface on the connecting bar in the common axis.
US09911713B2 Method for applying a bonding layer
A method for applying a bonding layer that is comprised of a basic layer and a protective layer on a substrate with the following method steps: application of an oxidizable basic material as a basic layer on a bonding side of the substrate, at least partial covering of the basic layer with a protective material that is at least partially dissolvable in the basic material as a protective layer. In addition, the invention relates to a corresponding substrate.
US09911709B1 Semiconductor device and semiconductor manufacturing process
A semiconductor device includes a first semiconductor die, a second semiconductor die and a plurality of supporting structures. The first semiconductor die includes a plurality of first bumps disposed adjacent to a first active surface thereof. The second semiconductor die includes a plurality of second bumps disposed adjacent to a second active surface thereof. The second bumps are bonded to the first bumps. The supporting structures are disposed between the first active surface of the first semiconductor die and the second active surface of the second semiconductor die. The supporting structures are electrically isolated and are disposed adjacent to a peripheral region of the second active surface of the second semiconductor die.
US09911703B2 Output impedance matching circuit for RF amplifier devices, and methods of manufacture thereof
A packaged RF amplifier device includes a transistor and an output circuit. The transistor includes a control terminal and first and second current carrying terminals. The output circuit is coupled between the first current carrying terminal and an output lead. The output circuit includes first and second inductive elements coupled in series. The first inductive element, which may be a first bondwire array or an integrated inductance, is coupled between the first current carrying terminal and a node. The second inductive element, which includes a second bondwire array, is coupled between the node and the output lead. The device also includes a shunt circuit with a shunt capacitor and a third bondwire array coupled between the first current carrying terminal and the shunt capacitor. The first and second inductive elements and the third bondwire array are configured to have a desired mutual inductance.
US09911699B2 Semiconductor device
A graphic data of a first wiring in a first area of a semiconductor wafer may be extracted, which may correspond to a semiconductor chip forming area. The first area may be surrounded by a scribed area of the semiconductor wafer. The first area includes a second area bounded with the scribed area. The second area has a second distance from a boundary between the semiconductor chip forming area and the scribed area to an boundary between the first area and the second area. A first dummy pattern in the first area is laid out to have at least a first distance from the first wiring. A second dummy pattern in the second area is laid out to have at least the first distance from the first wiring and at least a third distance from the first dummy pattern.
US09911693B2 Semiconductor devices including conductive lines and methods of forming the semiconductor devices
A semiconductor device including conductive lines is disclosed. First conductive lines each comprise a first portion, a second portion, and an enlarged portion, the enlarged portion connecting the first portion and the second portion of the first conductive line. The semiconductor device includes second conductive lines, at least some of the second conductive lines disposed between a pair of the first conductive lines, each second conductive line including a larger cross-sectional area at an end portion of the second conductive line than at other portions thereof. The semiconductor device includes a pad on each of the first conductive lines and the second conductive lines, wherein the pad on each of the second conductive lines is on the end portion thereof and the pad on the each of the first conductive lines is on the enlarged portion thereof.
US09911689B2 Through-body-via isolated coaxial capacitor and techniques for forming same
Techniques are disclosed for forming a through-body-via (TBV) isolated coaxial capacitor in a semiconductor die. In some embodiments, a cylindrical capacitor provided using the disclosed techniques may include, for example, a conductive TBV surrounded by a dielectric material and an outer conductor plate. The TBV and outer plate can be formed, for example, so as to be self-aligned with one another in a coaxial arrangement, in accordance with some embodiments. The disclosed capacitor may extend through the body of a host die such that its terminals are accessible on the upper and/or lower surfaces thereof. Thus, in some cases, the host die can be electrically connected with another die to provide a die stack or other three-dimensional integrated circuit (3D IC), in accordance with some embodiments. In some instances, the disclosed capacitor can be utilized, for example, to provide integrated capacitance in a switched-capacitor voltage regulator (SCVR).
US09911687B2 Molding compound structure
A device comprises a package component comprising a plurality of bumps formed on a first side of the package component, a semiconductor die mounted on the first side of the package component, a dielectric material formed over the first side of the package component, wherein four corners of the top surface of the package component are free from the dielectric material and a top package bonded on the first side of the package component, wherein the semiconductor die is located between the top package and the package component.
US09911684B1 Holes and dimples to control solder flow
A system, in some embodiments, comprises: a first surface of a lead frame; a second surface of the lead frame, opposite the first surface, said second surface having been etched; and one or more holes passing through said lead frame and coincident with the first and second surfaces, wherein said one or more holes are adapted to control fluid flow on said first surface.
US09911681B2 Silicone-based thermal interface materials
In an example, a silicone-based thermal interface material includes a thermally conductive material and a silicone-based polymeric material having a solubility parameter that is not less than 9.09 cal1/2 cm−3/2.
US09911677B2 Element chip and method for manufacturing the same
A method for manufacturing an element chip includes a protection film etching step of removing a part of the protection film which is stacked on the dividing region and the protection film which is stacked on the element region through etching the protection film anisotropically by exposing the substrate to first plasma and remaining the protection film for covering an end surface of the element region. Furthermore, the method for manufacturing an element chip includes an isotropic etching step of etching the dividing region isotropically by exposing the substrate to second plasma and a plasma dicing step of dividing the substrate to a plurality of element chips including the element region by exposing the substrate to third plasma in a state where the second main surface is supported by a supporting member.
US09911672B1 Semiconductor devices, method for fabricating integrated fan-out packages, and method for fabricating semiconductor devices
A semiconductor device including an integrated circuit, a plurality of conductive pillars, and a protection layer is provided. The integrated circuit includes a semiconductor substrate and an interconnection structure covering the semiconductor substrate, wherein the interconnection structure includes a plurality of patterned conductive layers and a plurality of inter-dielectric layers stacked alternately, the topmost patterned conductive layer of the patterned conductive layers is covered by the topmost inter-dielectric layer of the inter-dielectric layers, and the topmost patterned conductive layer is exposed by a plurality of openings of the topmost inter-dielectric layer. The conductive pillars are disposed on the topmost patterned conductive layer exposed by the openings, and the conductive pillars are electrically connected to the topmost patterned conductive layer through the openings. The protection layer covers the integrated circuit and the conductive pillars. A method for fabricating the semiconductor device and a method for fabricating integrated fan-out packages including the semiconductor device are also provided.
US09911667B2 Structure for die probing
A package includes a device die, which includes a metal pillar at a top surface of the device die, and a solder region on a sidewall of the metal pillar. A molding material encircles the device die, wherein a top surface of the molding material is substantially level with a top surface of the device die. A dielectric layer overlaps the molding material and the device die, with a bottom surface of the dielectric layer contacting a top surface of the device die and a top surface of the molding material. A redistribution line (RDL) extends into the dielectric layer to electrically couple to the metal pillar.
US09911666B2 Apparatus and method for inspecting a semiconductor package
There is provided an apparatus and method for inspecting a semiconductor package. The apparatus includes at least one 3D camera positioned at a first angle relative to a normal axis of the semiconductor package; and a light source configured to provide illumination for the at least one 3D camera, the light source being directed at the semiconductor package. The method includes casting a shadow of a bonded wire onto the semiconductor package; obtaining a 3D image of the semiconductor package; determining a distance S of the shadow and the bonded wire in the image; and obtaining a wire loop height H of the bonded wire.
US09911665B2 Integrated circuits, methods of forming the same, and methods of determining gate dielectric layer electrical thickness in integrated circuits
Integrated circuits, methods of forming integrated circuits, and methods of determining gate dielectric layer electrical thickness in integrated circuits are provided. An exemplary integrated circuit includes a semiconductor substrate including an active region and an STI structure disposed therein, adjacent to the active region. A first gate electrode structure overlies the active region and includes a first gate dielectric layer and a first gate electrode layer. A second gate electrode structure includes a second gate dielectric layer that overlies the first gate electrode layer and a second gate electrode layer that overlies the second gate dielectric layer. A source and drain region are formed in the active region, adjacent to the first gate electrode structure. First electrical interconnects are in electrical communication with the source and drain regions. A second electrical interconnect is in electrical communication with the first gate electrode layer.
US09911663B2 Preventing buried oxide gouging during planar and FinFET processing on SOI
A method for preventing damage to the insulator layer of a semiconductor device during creation of fin field effect transistor (FinFET) includes obtaining a material stack having an active semiconductor layer, an insulator layer, and an etch stop layer between the active semiconductor layer and the insulator layer; forming a fin-array from the active semiconductor layer; patterning the fin-array; and fabricating a FinFET device from the patterned fin-array; where the etch stop layer is resistant to processes the etch stop layer is exposed to during the forming, patterning, and fabricating operations, such that the etch stop layer and the insulator layer are not damaged during the forming, patterning, and fabricating operations.
US09911661B2 Nano wire structure and method for fabricating the same
A method includes depositing a sacrificial layer on a first dielectric layer over a substrate; applying a first patterning process, a second patterning process, a third patterning process to the sacrificial layer to form a first group of openings, a second group of openings and a third group of openings, respectively, in the sacrificial layer, wherein three first openings from three different patterning processes form a first side, a second side and a first angle between the first side and the second side, and three second openings from the three different patterning processes form a third side, a fourth side and a second angle between the third side and the fourth side, wherein the first angle is approximately equal to the second angle and forming nanowires based on the first group of openings, the second group of openings and the third group of openings.
US09911660B2 Methods for forming germanium and silicon germanium nanowire devices
A method for forming nanowire semiconductor devices includes a) providing a substrate including an oxide layer defining vias; and b) depositing nanowires in the vias. The nanowires are made of a material selected from a group consisting of germanium or silicon germanium. The method further includes c) selectively etching back the oxide layer relative to the nanowires to expose upper portions of the nanowires; and d) doping the exposed upper portions of the nanowires using a dopant species.
US09911656B1 Wimpy device by selective laser annealing
A method for co-integrating wimpy and nominal devices includes growing source/drain regions on semiconductor material adjacent to a gate structure to form device structures with a non-electrically active material. Selected device structures are masked with a block mask. Unmasked device structures are selectively annealed to increase electrical activity of the non-electrically active material to adjust a threshold voltage between the selected device structures and the unmasked device structures.
US09911654B2 Method and apparatus for plasma dicing a semi-conductor wafer
The present invention provides a method for plasma dicing a substrate. The method comprising providing a process chamber having a wall; providing a plasma source adjacent to the wall of the process chamber; providing a work piece support within the process chamber; placing the substrate onto a support film on a frame to form a work piece work piece; loading the work piece onto the work piece support; providing a clamping electrode for electrostatically clamping the work piece to the work piece support; providing a mechanical partition between the plasma source and the work piece; generating a plasma through the plasma source; and etching the work piece through the generated plasma.
US09911653B2 Low capacitance interconnect structures and associated systems and methods
Semiconductor device interconnect structures having low capacitance and associated systems and methods are disclosed herein. In one embodiment, a method of manufacturing an interconnect structure includes forming an opening in a surface of a semiconductor device and forming an interconnect structure at least within the opening. Forming the interconnect structure includes depositing a first insulator material on both the surface and a sidewall of the opening, selectively removing a first portion of the first insulator material on the surface over a second portion of the first insulator material on the sidewall, depositing a second insulator material on the second portion, and depositing a conductive material on the second insulator material. The method further includes selecting the thickness of the first and second insulators materials based on a threshold level of capacitance between the sidewall and the conductive material.
US09911652B1 Forming self-aligned vias and air-gaps in semiconductor fabrication
Mandrel lines non-mandrel lines, and spacers are located in a structure having several layers. A spacer in the set of spacers comprises a structure formed above the top mask layer. A first trench is etched at a first location on a mandrel line through the top mask layer and stopping at the middle mask layer. A second trench is etched at a second location on a non-mandrel line through the top mask layer and stopping at the middle mask layer. A spacer material is removed from a structure resulting from the etching the trenches. Vias are formed in the first and second trenches. An air-gap is formed at a location of the spacer. The first via structure and a first portion of the bottom mask layer under the first via structure are removed and filled with a conductive metal.
US09911651B1 Skip-vias bypassing a metallization level at minimum pitch
A method of forming a skip-via, including, forming a first dielectric layer on a first metallization layer, forming a second metallization layer on the first dielectric layer and a second dielectric layer on the second metallization layer, removing a section of the second dielectric layer to form a via to the second metallization layer, removing a portion of the second metallization layer to form an aperture, and removing an additional portion of the second metallization layer to form an exclusion zone.
US09911649B1 Process for making and using mesh-style NCEM pads
Wafers, chips, or dies that contain fill cells with structures configured to obtain in-line data via non-contact electrical measurements (“NCEM”). Such NCEM-enabled fill cells may target/expose a variety of open-circuit, short-circuit, leakage, or excessive resistance failure modes, and may include NCEM pads that comprise a mesh of GATECNT and AACNT stripes. Such wafers, chips, or dies may include Designs of Experiments (“DOEs”), comprised of multiple NCEM-enabled fill cells, in at least two variants, all targeted to the same failure mode(s).
US09911648B2 Interconnects based on subtractive etching of silver
A method for forming at least one Ag or Ag based alloy feature in an integrated circuit, including providing a blanket layer of Ag or Ag based alloy in a multi-layer structure on a substrate. The method further includes providing a hard mask layer over the blanket layer of Ag or Ag based alloy. The method further includes performing an etch of the blanket layer of Ag or Ag based alloy, wherein a portion of the blanket layer of Ag or Ag based alloy that remains after the etch forms one or more conductive lines. The method further includes forming a liner that surrounds the one or more conductive lines. The method further includes depositing a dielectric layer on the multi-layer structure.
US09911642B2 Method of manufacturing an electronic device, and electronic device manufacturing apparatus
According to this disclosure, a method of manufacturing an electronic device is provided, which includes exposing a top surface of a first electrode of a first electronic component to organic acid, irradiating the top surface of the first electrode exposed to the organic acid with ultraviolet light, and bonding the first electrode and a second electrode of a second electronic component by heating and pressing the first electrode and the second electrode each other.
US09911639B2 Composite substrate, elastic wave device, and method for producing elastic wave device
A composite substrate 10 is formed by bonding together a piezoelectric substrate 12 and a support substrate 14 that has a lower thermal expansion coefficient than the piezoelectric substrate. The support substrate 14 is formed by directly bonding together a first substrate 14a and a second substrate 14b at a strength that allows separation with a blade, the first and second substrates being formed of the same material, and a surface of the first substrate 14a is bonded to the piezoelectric substrate 12, the surface being opposite to another surface of the first substrate 14a bonded to the second substrate 14b.
US09911637B2 Overlapping device, and overlapping method
An overlapping device which is configured to detect the center positions of a substrate and a support which are held in a center position detecting portion, carry the substrate and the support from the center position detecting portion to an overlapping portion, and overlap the substrate and the support such that the detected center positions of the substrate and the support are overlapped in the overlapping portion.
US09911627B1 Method of processing a semiconductor device
A method for processing a 3D semiconductor device, the method including: processing a first layer comprising first transistors, forming a first power distribution grid to provide power to the first transistors, processing a second layer overlying the first transistors and including second transistors, where the second layer includes a through layer via with diameter of less than 150 nm, forming a second power distribution grid overlaying the second transistors, where the first power distribution grid includes first power conductors and the second power distribution grid includes second power conductors, and where the second power conductors are substantially wider or thicker than the first power conductors, and where the device includes a plurality of vias to connect the second power distribution grid to the first power distribution grid.
US09911622B2 Method of processing target object
Non-uniformity in a thickness of a silicon oxide film formed on a processing target object can be reduced even when an aspect ratio of an opening of a mask is increased. A silicon oxide film is formed by repeating a sequence including: (a) a first process of forming a reactant precursor on the processing target object by generating plasma of a first gas containing a silicon halide gas within a processing vessel of a plasma processing apparatus; (b) a second process of generating plasma of a rare gas within the processing vessel after the first process; (c) a third process of forming a silicon oxide film by generating plasma of a second gas containing an oxygen gas within the processing vessel after the second process; and (d) a fourth process of generating plasma of a rare gas within the processing vessel after the third process.
US09911615B2 Apparatus and method for etching substrate, stamp for etching substrate and method for manufacturing the same
The inventive concepts relate to an apparatus and a method for etching a substrate, a stamp for etching a substrate, and a method for manufacturing the stamp. The method for etching a substrate includes bringing a substrate into contact with a stamp including a pattern on which a metal catalyst is formed, and etching the substrate by a chemical reaction between the metal catalyst and an etching solution.
US09911614B2 Methods for activating openings for jets electroplating
One embodiment of the present invention one embodiment of the present invention is a method for electrofilling a metal or alloy inside at least one opening surrounded by a field on a front surface of a substrate, wherein at least one surface inside the at least one opening includes an exposed metallic surface, said method including steps of: (a) immersing the substrate in an activation or wetting solution; (b) applying ultrasonic or megasonic vibrations to the substrate; and, after commencing applying ultrasonic or megasonic vibrations to the substrate, (c) applying high pressure jets of an electrolyte to the substrate, said electrolyte includes metallic ions of said metal or alloy; and (d) applying an electroplating current to the substrate to electroplate said metal or alloy inside the at least one opening.
US09911610B2 Semiconductor device having a metal-semiconductor junction and manufacturing therefor
A method for manufacturing a semiconductor device includes providing a wafer having a first semiconductor layer, forming at the first semiconductor layer a contact layer which includes a metallic chemical element, and implanting ions of a first chemical element different to the metallic chemical element into the contact layer.
US09911609B2 Methods of forming nanostructures having low defect density
A method of forming a nanostructure comprises forming self-assembled nucleic acids on at least a portion of a substrate. The method further comprises contacting the self-assembled nucleic acids on the at least a portion of a substrate with a solution comprising at least one repair enzyme to repair defects in the self-assembled nucleic acids. The method may comprise repeating the repair of defects in the self-assembled nucleic acids on the at least a portion of a substrate until a desired, reduced threshold level of defect density is achieved. A semiconductor structure comprises a pattern of self-assembled nucleic acids defining a template having at least one aperture therethrough. At least one of the apertures has a dimension of less than about 50 nm.
US09911608B2 Method of forming patterns
A method of forming patterns includes the steps of providing a substrate on which a target layer and a hard mask layer are formed; forming a plurality of first resist patterns on the hard mask layer; performing a tilt-angle ion implant process to form a first doped area and a second doped area in the hard mask layer between adjacent first resist patterns; removing the first resist patterns; coating a directed self-assembly (DSA) material layer onto the hard mask layer; performing a self-assembling process of the DSA material layer to form repeatedly arranged block copolymer patterns in the DSA material layer; removing undesired portions from the DSA material layer to form second patterns on the hard mask layer; transferring the second patterns to the hard mask layer to form third patterns; and etching the target layer through the third patterns.
US09911606B2 Mandrel spacer patterning in multi-pitch integrated circuit manufacturing
A method of manufacturing an integrated circuit (IC) includes receiving a design layout of the IC, wherein the design layout includes two abutting blocks, the two blocks include target patterns, and the target patterns have different pitches in the two blocks. The method further includes generating mandrel pattern candidates in spaces between adjacent target patterns, and assigning first and second colors to the mandrel pattern candidates according to their priorities. The method further includes removing the mandrel pattern candidates assigned with the second color, and outputting a mandrel pattern in computer-readable format for mask fabrication. The mandrel pattern includes the mandrel pattern candidates that are colored with the first color.
US09911604B1 Sidewall spacer pattern formation method
Disclosed are methods of using a lithography-lithography-etch (LLE) technique to form a sidewall spacer pattern for patterning a target layer. In the methods, a photoresist layer is patterned by performing multiple lithographic processes with different photomasks, including a first photomask with a first pattern of parallel bars separated by spaces and a second photomask with a second pattern of opening(s) oriented in an essentially perpendicular direction as compared to the bar(s). The photoresist layer is then developed, creating a third pattern. The third pattern is transferred into a mandrel layer below to form mandrels of different lengths. Then, sidewall spacers are formed on the mandrels and the mandrels are selectively removed to form the sidewall spacer pattern. This sidewall spacer pattern is subsequently used in a sidewall image transfer (SIT) process to pattern a target layer below.
US09911599B2 Method of fabricating nanowire field effect transistor having a preplacement gate by using sacrificial etch layer
A device includes a substrate, a buffer layer, a nanowire, a gate structure, and a remnant of a sacrificial layer. The buffer layer is above the substrate. The nanowire is above the buffer layer and includes a pair of source/drain regions and a channel region between the source/drain regions. The gate structure surrounds the channel region. The remnant of the sacrificial layer is between the buffer layer and the nanowire and includes a group III-V semiconductor material.
US09911591B2 Selective deposition of thin film dielectrics using surface blocking chemistry
Methods of depositing a film selectively onto a first substrate surface relative to a second substrate surface. Methods include soaking a substrate surface comprising hydroxyl-terminations with a silylamine to form silyl ether-terminations and depositing a film onto a surface other than the silyl ether-terminated surface.
US09911588B1 Methods and systems for quantitative mass analysis
A method of quantitative mass analysis of precursor species of different mass-to-charge (m/z) ratios from a single or the same ion injection event is disclosed. A plurality of precursor ion species having different respective m/z ratios are introduced into a mass spectrometer at the same time. The precursor ion species are isolated. A first subset of the isolated precursor ions having a first m/z ratio is fragmented and analyzed. A second subset of the isolated precursor ions having a second m/z ratio is fragmented and analyzed. A first mass spectrum is generated for the fragment ions of the first subset of precursor ions, and a second mass spectrum is generated for the fragment ions of the second subset of precursor ions.
US09911586B2 Mass spectrometer with power supply switching and dummy load
A method of switching between two modes of power supply to a mass analyzer is provided. In a first mode of operation, operated for a first predefined time duration, a first power supply, coupled to the mass analyzer, generates a first non-zero potential, while a second power supply, disconnected from the mass analyzer, generates a second non-zero potential. In a second mode of operation, operated for a second predefined time duration, the second potential is coupled to the mass analyzer, while the first power supply, disconnected from the mass analyzer, generates the first potential. These predefined time durations are selected such that only one of: the first potential; and the second potential is coupled to the mass analyzer at any time, and such that the first and second modes of operation are carried out at least once within a predetermined length of time.
US09911585B1 Data-independent mass spectral data acquisition including data-dependent precursor-ion surveys
A mass spectrometry method comprises: acquiring a series of survey mass spectra of first-generation ions generated from a sample; acquiring a series of fragment-ion mass spectra, each being a record of a respective set of fragment-ion species generated by fragmentation of a respective subset of the first-generation ions within a respective mass-to-charge isolation range; adjusting mass spectrometer operational parameters used to acquire a later one of the survey mass spectra based on results of an earlier one of the survey mass spectra; dividing the acquired series of fragment-ion mass spectra into a first group wherein an appearance of a fragment-ion species correlates with the appearance of a first-generation ion species observed in a survey mass spectrum and a second group wherein no obvious correlation is observed between fragment-ion species and first-generation ion species; and mathematically processing the spectra of the first and second groups by different mathematical procedures.
US09911584B2 Batch production of microchannel plate photo-multipliers
In-situ methods for the batch fabrication of flat-panel micro-channel plate (MCP) photomultiplier tube (PMT) detectors (MCP-PMTs), without transporting either the window or the detector assembly inside a vacuum vessel are provided. The method allows for the synthesis of a reflection-mode photocathode on the entrance to the pores of a first MCP or the synthesis of a transmission-mode photocathode on the vacuum side of a photodetector entrance window.
US09911579B2 Showerhead having a detachable high resistivity gas distribution plate
Embodiments of showerheads having a detachable gas distribution plate are provided herein. In some embodiments, a showerhead for use in a semiconductor processing chamber may include a base having a first side and a second side opposing the first side; a gas distribution plate disposed proximate the second side of the base, wherein the gas distribution plate is formed from a material having an electrical resistivity between about 60 ohm-cm to 90 ohm-cm; a clamp disposed about a peripheral edge of the gas distribution plate to removably couple the gas distribution plate to the base; and a thermal gasket disposed in a gap between the base and gas distribution plate.
US09911576B2 Ion bombardment apparatus and method for cleaning of surface of base material using the same
In an ion bombardment apparatus of the present invention, a heating type thermal electron emission electrode formed by a filament is placed on one inner surface of a vacuum chamber, an anode for receiving a thermal electron from the thermal electron emission electrode is placed on another inner surface of the vacuum chamber, and a base material is placed between the thermal electron emission electrode and the anode. Further, the ion bombardment apparatus has a discharge power supply for generating a glow discharge upon application of a potential difference between the thermal electron emission electrode and the anode, a heating power supply for heating the thermal electron emission electrode so as to emit the thermal electron, and a bias power supply for applying negative pulse-shaped bias potential with respect to the vacuum chamber to the base material.
US09911575B2 Apparatus for charged particle lithography system
A charged particle multi-beam lithography system includes an illumination sub-system that is configured to generate a charged particle beam; and multiple plates with a first aperture through the plates. The plates and the first aperture are configured to form a charged particle doublet. The system further includes a blanker having a second aperture whose footprint is smaller than that of the first aperture. The charged particle doublet is configured to demagnify a portion of the charged particle beam passing through the first aperture, thereby producing a demagnified beamlet. The blanker is configured to receive the demagnified beamlet from the charged particle doublet, and is further configured to conditionally allow the demagnified beamlet to travel along a desired path.
US09911567B2 Disconnect switch with integrated thermal breaker
A disconnect switch is disclosed with an integrated thermal breaker that can be disposed between a source of power and a circuit to be protected. The disconnect switch can comprise a housing, a first terminal coupled to a power source and a second terminal coupled to a load. The first terminal and the second terminal can be partially included in the housing. The disconnect switch comprises a bi-metal thermal conductive element made from at least two metal sheets with different thermal expansion coefficients and having a concave shape that engages the first and second terminals. Upon occurrence of an overload condition, heat flowing through the bi-metal thermal conductive element causes the concave shape to retract to a convex shape and disengage the bi-metal thermal conductive element from the first and the second terminals.
US09911566B2 Foam fuse filler and cartridge fuse
Fuses having a melamine-coated-steatite foam filler are described. In particular, melamine-coated-steatite foam filler for use in a fuse comprising steatite coated in a melamine compound (e.g., plasticized melamine resin) and then heated to form crystalline foam filler are described. The foam filler may comprise steatite of substantially 3 times the melamine compound by weight and may be heated and then cooled to form the foam filler.
US09911559B2 Magnetically aligned circuit
Examples are disclosed that relate to magnetically aligned switching circuits. One disclosed example provides an electronic component comprising a first terminal, a second terminal, and a deformable host material arranged between the first terminal and the second terminal. Aligned magnetically within the host material is an ensemble of particles each comprising a ferromagnetic material, each particle having greater electrical conductivity than the host material. The ensemble of particles is configured to form at least one complete conduction path from the first terminal to the second terminal.
US09911553B2 Ultra low travel keyboard
A keyboard or keyboard key that has a force sensor that measures the force imparted to the key when a user presses the key or rests a finger on a key. Key embodiments may also include an actuator that excites the in order to provide feedback to the user in accordance with various feedback methods disclosed herein.
US09911552B2 Operating device
Disclosed herein is an operating device including: a circuit board; a frame arranged on top of the circuit board; a plate-shaped operating member located on top of the frame, the plate-shaped operating member including a surface touched by a user's finger and a touch sensor adapted to detect the position of the user's finger that has touched the surface, the plate-shaped operating member being arranged to be able to move up and down so that the operating member can be pressed by the user; and an elastic member arranged between the frame and operating member to bias the operating member upward.
US09911550B2 Touch sensitive device with multiple ablation fluence values
Processes for fabricating compact touch sensors for touch sensitive devices are disclosed. A process can include providing a touch sensor structure having a substrate, a first layer disposed on the substrate, and a second layer disposed on the first layer. The second layer can have an ablation fluence value that is lower than an ablation fluence value of the first layer. The process can include patterning the second layer with a laser emitting energy having a fluence value greater than or equal to the ablation fluence value of the second layer and less than the ablation fluence value of the first layer. The process can further include etching at least a portion of the first layer that was exposed during the patterning of the second layer. At least a portion of the second layer can then be removed by etching or laser ablation.
US09911547B2 Electric storage device and method for manufacturing the same
An electric storage device having a multilayer body in which a separator layer is provided between a positive or negative first electrode and a second electrode of the opposite polarity to the first electrode, an electrolyte, and a package that holds the multilayer body and the electrolyte, and includes at least two first-polarity compound sheets, each configured by integrating a first-polarity collector electrode, a first-polarity active material layer provided on one main surface of the first-polarity collector electrode, and a separator layer that covers at least part of the one main surface. Another main surface of the first-polarity collector electrode in one of the at least two first-polarity compound sheets and another main surface of the first-polarity collector electrode in another of the first-polarity compound sheets are opposed to each other and joined via a joining layer. The joining layer contains a high-polymer having imide coupling in its main chain.
US09911542B2 Capacitors having engineered electrodes with very high energy density
An apparatus and associated method for an energy-storage device (e.g., a capacitor) having a plurality of electrically conducting electrodes including a first electrode and a second electrode separated by a non-electrically conducting region, and wherein the non-electrically conducting region further includes a non-uniform permittivity (K) value. In some embodiments, the method includes providing a substrate; fabricating a first electrode on the substrate; and fabricating a second electrode such that the second electrode is separated from the first electrode by a non-electrically conducting region, wherein the non-electrically conducting region has a non-uniform permittivity (K) value. The capacitor devices will find benefit for use in electric vehicles, of all kinds, uninterruptible power supplies, wind turbines, mobile phones, and the like requiring wide temperature ranges from several hundreds of degrees C. down to absolute zero, consumer electronics operating in a temperature range of −55 degrees C. to 125 degrees C.
US09911536B2 Dielectric composition, dielectric element, electronic component and laminated electronic component
The aim of the present invention lies in providing a dielectric composition which has a relatively high dielectric constant of 800 or greater, and which has relatively low dielectric loss of 4% or less when a DC bias of at least 8 V/ym is applied, and also in providing a dielectric element employing said dielectric composition, an electronic component, and a laminated electronic component. A dielectric composition having a main component represented by (BiaNabSrcBad) (αxTi1−x)O3, characterized in that a is at least one selected from Zr and Sn; and a, b, c, d and x satisfy the following: 0.140≦a<0.390, 0.140≦b<0.390, 0.200≦c<0.700, 0.020≦d<0.240, 0.020≦x<0.240 and 0.950
US09911532B2 Forced convection liquid cooling of fluid-filled high density pulsed power capacitor with native fluid
A high density capacitor comprises a housing having a cavity, and a plurality of capacitors forming at least one capacitor bank disposed in the housing cavity. A native cooling fluid is disposed in the cavity, and a heat exchanger is coupled to the housing. A pump is configured to circulate the native cooling fluid from the cavity, through the heat exchanger, through the spacings along an outer surface of each of the capacitors to cool the capacitors using forced convection. The heat exchanger is configured to communicate a secondary fluid through the heat exchanger and draw heat from the native cooling fluid flowing through the heat exchanger. The heat exchanger may have a plenum having a plurality of openings configured to dispense the native cooling fluid from the heat exchanger proximate the at least one capacitor bank.
US09911530B2 Coil component and method of manufacturing the same
A coil component includes: a coil part including a first coil layer and a second coil layer disposed above the first coil layer, wherein the first coil layer includes a first insulating layer having a first opening pattern and a first conductive layer disposed in the first opening pattern, and the second coil layer includes a second insulating layer having a second opening pattern, a seed layer covering inner side surfaces and a lower surface of the second opening pattern, and a second conductive layer disposed in the second opening pattern.
US09911529B2 Electronic component
In an electronic component, a multilayer body is formed by a plurality of stacked insulator layers. A coil includes at least one coil conductor layer provided on at least one of the insulator layers. External electrodes are embedded in a lateral surface of the multilayer body which is formed by a series of continuous perimeter edges of the plurality of insulator layers, and includes a plurality of stacked external conductor layers provided on the plurality of insulator layers. The external electrodes have different shapes. The external conductor layers and the first coil conductor, which are provided on the same insulator layer, are simultaneously formed by photolithography or printing.
US09911526B2 Magnet unit and magnetron sputtering apparatus
A magnet unit has a first magnet element and a second magnet element. The first magnet element includes a first magnet which is provided to stand upright on a yoke plate, a second magnet which is provided to stand upright on the yoke plate and has a magnetic pole unlike the first magnet, and a third magnet which is provided with a tilt between the first magnet and the second magnet. The second magnet element includes a fourth magnet which is provided to stand upright on the yoke plate, a fifth magnet which is arranged to stand upright on the yoke plate and has a magnetic pole unlike the fourth magnet, and a sixth magnet which is provided with a tilt between the fourth magnet and the fifth magnet. The first magnet element and the second magnet element are alternately arranged in an endless shape.
US09911524B2 Chip resistor and method for manufacturing the same
A chip resistor includes: a resistor body having a front surface and a mounting surface which face in opposite directions; a pair of electrodes which are disposed on both sides of the resistor body with the resistor body sandwiched therebetween and are in electrical conduction with the resistor body; and a protective film covering a portion of the resistor body, wherein a plurality of grooves, which does not penetrate through the resistor body, is formed in the front surface of the resistor body.
US09911519B2 Paste for contacts and solar cell using the same
Provided are a paste for contacts and a solar cell using the same. The paste for contacts includes Al powder, glass frit, inorganic binder, and P-type oxidation containing I group elements.
US09911517B2 Carbon felt impregnated with inorganic particles and method for producing the same
Disclosed is a carbon felt impregnated with inorganic particles. The impregnated carbon felt can be used together with sulfur in a cathode of a sodium-sulfur (Na—S) battery. Also disclosed is a method for producing the impregnated carbon felt. According to exemplary embodiments, the problem of the prior art can be solved in which inorganic particles such as alumina particles are not directly adhered to carbon felts, thus necessitating complicated processes. In addition, a slurry including an inorganic binder and alumina particles can be used to directly coat the alumina particles on the surface of a carbon felt, making the production procedure very simple. Furthermore, the use of the carbon felt surface coated with the alumina particles in a Na—S battery increases the wicking of sodium polysulfides, suppresses the accumulation of sulfur as an insulator on the surface of beta-alumina as an electrolyte, and inhibits non-uniform aggregation of sulfur or sodium polysulfides on the carbon felt, so that the concentration polarization of charges can be reduced without a significant increase in the internal resistance of the battery, achieving high utilization efficiency of sulfur as a reactant.
US09911516B2 Cooling systems for spent nuclear fuel, casks including the cooling systems, and methods for cooling spent nuclear fuel
A cooling system for spent nuclear fuel may include a device configured to generate electricity using energy emitted from the spent nuclear fuel. The cooling system may be configured to use the electricity when cooling the spent nuclear fuel. A cask for storage, transport, or storage and transport of spent nuclear fuel may include the cooling system and a container configured to hold the spent nuclear fuel. A method for cooling spent nuclear fuel may include generating electricity using energy emitted from the spent nuclear fuel, and using the electricity in a cooling system for the spent nuclear fuel when cooling the spent nuclear fuel.
US09911513B2 Passive shutdown system and method of operating a liquid metal cooled reactor using the same
A passive shutdown system for a liquid metal cooled reactor may include a tube and a neutron absorber within the tube. The tube may be configured to extend through a core of the liquid metal cooled reactor. The tube has an upper end and a lower end. The tube defines a flow path for a liquid metal coolant. The neutron absorber is a mobile structure configured to partially obstruct a flow of the liquid metal coolant within the flow path. A method of operating a liquid metal cooled reactor may involve the use of the passive shutdown system.
US09911510B1 Redundancy schemes for memory cell repair
Various implementations described herein are directed to an integrated circuit having a memory cell array with multiple rows of memory cells including at least one redundant row of memory cells. The memory cell array may be partitioned into multiple regions of memory cells including a first region of memory cells corresponding to a first part of the redundant row of memory cells and a second region of memory cells corresponding to a second part of the redundant row of memory cells. The integrated circuit may include wordline driver circuitry coupled to the first and second regions of memory cells and their corresponding first and second parts of the redundant row of memory cells. In some instances, the integrated circuit may include row shift circuitry coupled to the first and second regions of memory cells and their corresponding first and second parts of the redundant row of memory cells.
US09911508B2 Cache memory diagnostic writeback
A processor includes a cache memory having a plurality of entries. Each of the entries holds data of a cache line, a state of the cache line and a tag of the cache line. The cache memory includes an engine comprising one or more finite state machines. The processor also includes an interface to a bus over which the processor writes back modified cache lines from the cache memory to the system memory in response to encountering an architectural writeback and invalidate instruction. The processor also invalidates the state of the entries of the cache memory in response to encountering the architectural writeback and invalidate instruction. In response to being instructed to perform a cache diagnostic operation, for each entry of the entries, the engine writes the state and the tag of the entry on the bus and does not invalidate the state of the entry.
US09911506B1 Methods for memory interface calibration
Integrated circuits with memory interface circuitry may be provided. Prior to calibration, a number of samples may be determined by computing probability density function curves as a function of timing window edge asymmetry for different degrees of oversampling. During calibration, duty cycle distortion in data strobe signals may be corrected by selectively delaying the data strobe rising or falling edges. A data clock signal that is used for generating data signals may also suffer from duty cycle distortion. The rising and falling edges of the data clock signal may be selectively delayed to correct for duty cycle distortion. The data path through which the data signals are routed may be adjusted to equalize rising and falling transitions to minimize data path duty cycle distortion. Multi-rank calibration may be performed by calibrating to an intersection of successful settings that allow each memory rank to pass memory operation tests.
US09911505B2 Cost effective semiconductor devices and semiconductor systems with reduced test time
A semiconductor system may include a first semiconductor device and a second semiconductor device. The first semiconductor device may output a clock signal, a test mode signal and command address signals. The second semiconductor device may repeatedly write and read out data into and from a plurality of memory cells sequentially selected by addresses that are sequentially counted or may repeatedly write and read out the data into and from specific memory cells selected by a specific address among the addresses, according to the clock signal and the command address signals in response to the test mode signal.
US09911501B2 Sensing amplifier comprising a built-in sensing offset for flash memory devices
The present invention relates to an improved sensing amplifier and related method for use in read operations in flash memory devices. In one embodiment, the sensing amplifier includes a built-in voltage offset. In another embodiment, a voltage offset is induced in the sensing amplifier through the use of capacitors. In another embodiment, the sensing amplifier utilizes sloped timing for the reference signal to increase the margin by which a “0” or “1” are detected from the current drawn by the selected cell compared to the reference cell. In an another embodiment, a sensing amplifier is used without any voltage offset.
US09911498B2 Semiconductor memory device and writing operation method thereof
A memory system includes a semiconductor memory device having memory cells arranged in rows and columns, and a controller configured to issue a write command with or without a partial page program command to the semiconductor memory device. The semiconductor memory device, in response to the write command issued without the partial page command, executes a first program operation on a page of memory cells and then a first verify operation on the memory cells of the page using a first verify voltage for all of the memory cells of the page, and in response to the write command issued with the partial page command, executes a second program operation on a subset of the memory cells of the page and then a second verify operation on the memory cells of the subset using one of several different second verify voltages corresponding to the subset.
US09911496B2 Associative memory for realizing a k-nearest neighbors algorithm
A k-nearest neighbors associative memory includes: a clock counting type associative memory that holds R pieces of reference data and outputs, for each of the R pieces of reference data, a match signal that becomes active when a clock count corresponding to a distance between the reference data and given search data has been reached; and a k-nearest neighbors clustering circuit that, every time at least one of the R match signals output from the clock counting type associative memory becomes active, selects a piece of class data, out of R pieces of class data representing classes of the R pieces of reference data, corresponding to each of the at least one active match signal, until k match signals out of the R match signals become active, and determines a class having a largest number of pieces of data when the selected total k pieces of class data are classified.
US09911494B1 Overlapping write schemes for cross-point non-volatile memory devices
A storage device includes an interface, NVM device, and control module. The control module may be configured to receive a first write operation and a second write operation. The first write operation comprises a SET operation configured to place a cell of the NVM device in a relatively low-resistance state. The control module may be further configured to execute the first write operation by causing an electrical pulse to be applied to a first cell of the NVM device to place the first cell in the relatively low-resistance state. The control module may be further configured to execute the second write operation by causing an electrical pulse to be applied to a second cell of the NVM device before the first electrical pulse has concluded. A single tile of the NVM device includes the first cell and the second cell.
US09911493B2 Semiconductor memory device including semi-selectable memory cells
A semiconductor memory device includes a memory cell array having first wires, a second wire, and memory cells connected to the first and second wires, and a control circuit that can apply writing voltages to the second wire. One of the memory cells connected to the selected second wire and a selected first wire is a selected memory cell. One of the memory cells connected to the selected second wire and an unselected first wire is a semi-selected memory cell. When writing data into the selected memory cell, the control circuit selects one from the writing voltages and applies the one writing voltage to a third wire connected to the selected second wire. The control circuit selects the one writing voltage, based on a first current flowing through the second wire when each of the memory cells connected to the selected second wire are set as semi-selected memory cells.
US09911486B2 Synchronous random access memory (SRAM) chip and two port SRAM array
A static random access memory (SRAM) chip includes a first and second conductor, a set of SRAM cells and a set of first and second tracking cells. The first conductor extends in a first direction, is coupled to a first supply voltage, and on a first metal layer. The second conductor extends in a second direction, is coupled to a second supply voltage, and on a second metal layer. A first cell of the set of first tracking cells includes a first tracking bit line conductor, first and second CMOS, and a first and second pass gate device. A first cell of the set of second tracking cells includes a third pass gate device, a third PU device, and a third PD device having a source configured to be electrically floating. A gate of the first PD device or the first PU device is electrically coupled to the first conductor.
US09911474B1 Feedback circuit at word line ends
Devices include an array of memory cells arranged in rows and columns. Wordlines are connected to the memory cells, and each of the wordlines is connected to a distinct row of the array of the memory cells. A wordline driver circuit is connected to a near end of the wordlines. The wordline driver circuit outputs a wordline select signal. Also, a feedback circuit is connected to a far end of each of the wordlines, opposite the near end of the wordlines. The feedback circuit includes first transistors (gated by the internal clock signal and the wordline select signal) electrically connecting a relatively lower voltage source to the far end of the wordlines; and second transistors (also gated by the internal clock signal and the wordline select signal) electrically connecting a relatively higher voltage source to the far end of the wordlines.
US09911473B1 Circuit with self-adjust pre-charged global data line
In some embodiments, a memory device includes a memory bank, a global data line, a first tri-state unit, a latch, a second tri-state unit and a pre-charge unit. The first tri-state unit is configured between the memory bank and the global data line. The latch is configured to provide a state signal based on a data signal from the memory bank. The second tri-state unit is configured between the global data line and the latch. The pre-charge unit pre-charges the global data line to a first intermediate level or a second intermediate level depending on the state signal during the global data line is caused to be electrically isolated from the memory bank by the first tri-state unit and electrically isolated from the latch by the second tri-state unit.
US09911469B1 Apparatuses and methods for power efficient driver circuits
An apparatus comprising is disclosed. The apparatus a driver circuit configured to selectively provide a first supply voltage to an output node in a first operating mode and to selectively provide a second supply voltage to the output node in a second operating mode, based on one or more enable signals.
US09911465B1 High bandwidth memory (HBM) bandwidth aggregation switch
Methods and apparatus are described for adding one or more features (e.g., HBM) to a qualified SSI technology programmable IC region by providing an interface (e.g., an HBM buffer region with a switch network) between the added feature device and the programmable IC region. One example IC package generally includes a package substrate; at least one interposer disposed above the package substrate; a programmable IC region disposed above the interposer; at least one fixed feature die disposed above the interposer; and an interface region disposed above the interposer and configured to couple the programmable IC region to the fixed feature die via a first set of interconnection lines routed through the interposer between a first plurality of ports of the interface region and the fixed feature die and a second set of interconnection lines routed between a second plurality of ports of the interface region and the programmable IC region.
US09911455B2 Spindle motor
A spindle motor is provided, the motor comprising: a base plate, a PCB on the base plate, a bearing assembly arranged on the base plate, a stator coupled to a periphery of the bearing assembly, a rotor rotationally coupled to the bearing assembly, the rotor including a yoke and a magnet, and a rotation shaft rotationally coupled to the bearing assembly. The base plate includes a planar portion and a protruding portion arranged along with a periphery of the yoke, the protruding portion being apart from the yoke. The base plate is partially covered with the PCB in a region where the stator is arranged. And, a height from the planar portion to an upper surface of the protruding portion is smaller than a height from the planar portion to a lower surface of the periphery of the yoke.
US09911449B2 Recorder and player apparatus stably keeping track of recording medium
The first, third, fourth, and seventh photosensors are disposed on one side with respect to the centerline, and the second, fifth, sixth, and eighth photosensors are disposed on another side with respect to the centerline. The first and seventh photosensors are positioned between the third and fourth photosensors in the direction parallel to the centerline. The second and eighth photosensors are positioned between the fifth and sixth photosensors in the direction parallel to the centerline. The first photosensor receives overlapped light of the 0th-order light with the +1st-order diffracted light, the second photosensor receives overlapped light of the 0th-order light with the −1st-order diffracted light, each of the third to sixth photosensors receives the 0th-order light, and does not receive the +1st-order diffracted light and the −1st-order diffracted light, and each of the seventh and eighth photosensors receives at least the 0th-order light.
US09911447B2 Fluoropolyether compound, and lubricant and magnetic disc comprising same
A compound of the formula (1), lubricant containing the compound and magnetic disk R1—C6H4O—CH2CH(OH)CH2OCH2—R2—CH2—O—CH2CH(OH)CH2—OC6H4—R1   (1) wherein R1 is alkoxyl having 1 to 4 carbon atoms, amino or amido, R2 is —CF2CF2O(CF2CF2CF2O)zCF2CF2— or —CF2CF2CF2O(CF2CF2CF2CF2O)nCF2CF2CF2—, z is a real number of 1 to 15, n is a real number of 0 to 4.
US09911445B2 Magnetic recording medium
A perpendicular magnetic recording medium includes a non-magnetic substrate; an underlayer including first and second underlayers; and a magnetic recording layer including a layer having a granular structure including grains of a magnetic crystal and grain boundary portions, wherein the first underlayer has a NaCl structure with a (001) orientation and contains a nitride or an oxide of at least one element. The first underlayer may contain a nitride of at least one of Cr, V, Ti, Sc, Mo, Nb, Zr, Y, Al, and B, and the second underlayer may include a plurality of island-shaped regions and contain at least one of Mg, Ca, Co, and Ni. The first underlayer may contains an oxide of at least one of Mg, Ca, Co, and Ni, and the second underlayer may include net-shaped regions and contain at least one of Cr, V, Ti, Sc, Mo, Nb, Zr, Y, Al, B, and C.
US09911444B1 Head and disk drive with the same
According to one embodiment, a head for a disk drive includes a slider including an air-bearing surface having a pair of side edges, a pair of side surfaces, a leading-side end surface and a trailing-side end surface, and a head section provided in the slider. The slider includes a leading step in a leading-side end portion of the air-bearing surface, a deep trench provided downstream side of the leading step, and a trailing step in a trailing side end portion of the air-bearing surface and including the head section built therein, and side trenches having a depth of 100 to 300 nm formed respectively along the pair side edges of the air-bearing surface.
US09911442B1 Feedforward compensation for multi-actuator hard drives
An apparatus includes a first controller, a second controller, and a coupling compensator. The first controller is configured to generate a first voice coil motor (VCM) control signal in response to a first position error signal. The second controller is configured to generate a second VCM control signal in response to a second position error signal. The coupling compensator is configured to generate a first feedforward correction signal in response to the first VCM control signal. The first feedforward correction signal modifies the second VCM control signal to generate a modified second VCM control signal.
US09911441B1 Magnetic recording apparatus having thermal sensor and a solid-immersion mirror
A solid-immersion mirror has two reflective portions surrounding a focal region. A thermal sensor that senses temperature as a function of resistance is proximate at least one of the two reflective portions of the solid-immersion mirror. A near-field transducer is located proximate the focal region of the solid-immersion mirror. The near-field transducer directs optical energy to a magnetic recording medium.
US09911440B2 Differing magnetic read sensors on a magnetic head
An apparatus according to one embodiment includes a magnetic head having multiple magnetic transducers, the transducers including read sensors. The read sensors are of at least two differing types selected from a group consisting of tunneling magnetoresistance (TMR), giant magnetoresistance (GMR), anisotropic magnetoresistance (AMR), and inductive sensors.
US09911438B2 Magnetic recording and reproducing device comprising a magnetic head first reproducing unit including a magnetic field generator
According to one embodiment, a magnetic recording and reproducing device includes a magnetic recording medium, and a magnetic head including a first reproducing unit. The first reproducing unit includes a first magnetic field generator separated from the magnetic recording medium in a first direction, and a first stacked body. At least a portion of the first stacked body is provided between the magnetic recording medium and the first magnetic field generator in the first direction. The first stacked body includes a first magnetic layer, a second magnetic layer separated from the first magnetic layer in a second direction crossing the first direction, and a first intermediate layer provided between the first magnetic layer and the second magnetic layer. The first stacked body performs an operation of generating a first alternating magnetic field. The first magnetic field generator generates a first magnetic field.
US09911437B2 System and method for improving speech recognition accuracy using textual context
Disclosed herein are systems, methods, and computer-readable storage media for improving speech recognition accuracy using textual context. The method includes retrieving a recorded utterance, capturing text from a device display associated with the spoken dialog and viewed by one party to the recorded utterance, and identifying words in the captured text that are relevant to the recorded utterance. The method further includes adding the identified words to a dynamic language model, and recognizing the recorded utterance using the dynamic language model. The recorded utterance can be a spoken dialog. A time stamp can be assigned to each identified word. The method can include adding identified words to and/or removing identified words from the dynamic language model based on their respective time stamps. A screen scraper can capture text from the device display associated with the recorded utterance. The device display can contain customer service data.
US09911436B2 Sound recognition apparatus, sound recognition method, and sound recognition program
A sound recognition apparatus can include a sound feature value calculating unit configured to calculate a sound feature value based on a sound signal, and a label converting unit configured to convert the sound feature value into a corresponding label with reference to label data in which sound feature values and labels indicating sound units are correlated. A sound identifying unit is configured to calculate a probability of each sound unit group sequence that a label sequence is segmented for each sound unit group with reference to segmentation data. The segmentated data indicates a probability that a sound unit sequence will be segmented into at least one sound unit group. The sound identity unit can also identify a sound event corresponding to the sound unit group sequence selected based on the calculated probability.
US09911434B2 Audio decoder utilizing sample rate conversion for audio and video frame synchronization
An audio processing system (100) accepts an audio bitstream having one of a plurality of predefined audio frame rates. The system comprises a front-end component (110), which receives a variable number of quantized spectral components, corresponding to one audio frame in any of the predefined audio frame rates, and performs an inverse quantization according to predetermined, frequency-dependent quantization levels. The front-end component may be agnostic of the audio frame rate. The audio processing system further comprises a frequency-domain processing stage (120) and a sample rate converter (130), which provide a reconstructed audio signal sampled at a target sampling frequency independent of the audio frame rate. By its frame-rate adaptability, the system can be configured to operate frame-synchronously in parallel with a video processing system that accepts plural video frame rates.
US09911430B2 Acoustic environment recognizer for optimal speech processing
A system for providing an acoustic environment recognizer for optimal speech processing is disclosed. In particular, the system may utilize metadata obtained from various acoustic environments to assist in suppressing ambient noise interfering with a desired audio signal. In order to do so, the system may receive an audio stream including an audio signal associated with a user and including ambient noise obtained from an acoustic environment of the user. The system may obtain first metadata associated with the ambient noise, and may determine if the first metadata corresponds to second metadata in a profile for the acoustic environment. If the first metadata corresponds to the second metadata, the system may select a processing scheme for suppressing the ambient noise from the audio stream, and process the audio stream using the processing scheme. Once the audio stream is processed, the system may provide the audio stream to a destination.
US09911429B2 Noise reduction device, noise reduction method, and noise reduction program
A frame generator 3 frames an input signal and generates a frame signal. A reference signal storage unit 7 stores therein a reference signal showing a periodic noise signal. A correlation value calculator 8 calculates a correlation value between the frame signal and the reference signal. A correlation candidate position decider 9 decides a plurality of correlation candidate positions serving as candidates for a signal portion of the reference signal correlated with the frame signal. A noise reduction processor 10 reduces a periodic noise signal, which is included in the frame signal, by using each signal portion of the plurality of correlation candidate positions, and generates a plurality of candidate output signals. An output signal decider 11 decides a candidate output signal, in which the periodic noise signal is reduced the most among the plurality of candidate output signals, and outputs the decided output signal.
US09911423B2 Multi-channel audio signal classifier
It is disclosed inter alia a method comprising: estimating a value of entropy for a multi-channel audio signal; determining a channel configuration of the multi-channel audio signal from the value of entropy; and encoding the multi-channel audio signal, wherein the mode of encoding is dependent on the channel configuration.
US09911421B2 Speaker identification method, speaker identification apparatus, and information management method
The speaker identification system has a voice acquisition unit that acquires voice information of a speaker, and a database management unit that determines whether or not the speaker corresponding to the acquired voice information matches a speaker corresponding to registered voice information in connection with content information on a content, that acquires content information on the content displayed on a device at the time of acquisition of the voice information and stores the acquired content information in connection with the registered voice information in a case where it is determined that the speaker corresponding to the acquired voice information matches the speaker corresponding to the registered voice information, and that stores the acquired voice information in the database as registered voice information in a case where it is determined that the speaker corresponding to the acquired voice information does not match the speaker corresponding to the registered voice information.
US09911419B2 Providing pre-computed hotword models
Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for obtaining, for each of multiple words or sub-words, audio data corresponding to multiple users speaking the word or sub-word; training, for each of the multiple words or sub-words, a pre-computed hotword model for the word or sub-word based on the audio data for the word or sub-word; receiving a candidate hotword from a computing device; identifying one or more pre-computed hotword models that correspond to the candidate hotword; and providing the identified, pre-computed hotword models to the computing device.
US09911410B2 Adaptation of speech recognition
A method, computer program product, and system for adapting speech recognition of a user's speech is provided. The method includes receiving a first utterance from a user having a duration below a predetermined threshold, identifying at least one further utterance from the user that provides additional information, generating a concatenated utterance by concatenating the first utterance with the at least one further utterance, transmitting the concatenated utterance to a speech recognition server, receiving a transcription of the concatenated utterance from the speech recognition server that includes a transcription of the first utterance, and extracting the transcription of the first utterance from the transcription of the concatenated utterance. The transcription of the first utterance is based on the additional information provided by the at least one further utterance.
US09911407B2 System and method for synthesis of speech from provided text
A system and method are presented for the synthesis of speech from provided text. Particularly, the generation of parameters within the system is performed as a continuous approximation in order to mimic the natural flow of speech as opposed to a step-wise approximation of the feature stream. Provided text may be partitioned and parameters generated using a speech model. The generated parameters from the speech model may then be used in a post-processing step to obtain a new set of parameters for application in speech synthesis.
US09911400B2 Graphical representation generation for multiple points of interest
An improve navigation application can generate and display a composite representation of multiple POIs when POI icons representing the POIs appear to be overlapping. Some embodiments display the composite representation when a certain zoom level is reached for a map including the multiple POI icons. In some embodiments, the navigation application can determine POIs that may be of interest to the user based on the user's attributes and activity history and generate the composite representation based on those attributes. The composite representation can include multiple POI icons that are displayed adjacent to each other such that a user of the navigation application can readily identify POIs that are likely to be of interest to the user within a region.
US09911398B1 Variable density content display
A video display hub is mounted in a common household area such as a kitchen or family room. The display hub is configured to display various types of information for users in the area, such as weather, traffic updates, schedules, notes, messages, lists, news, etc. When the user is at a distance from the display hub, information is presented at a relatively low density, with a low level of granularity and detail in conjunction with large fonts, graphics, and icons. When the user is close to the display hub, information is presented at a relatively high density, with a high level of granularity and detail in conjunction with small fonts, graphics, and icons.
US09911397B2 Extending the range of variable refresh rate displays
Briefly, methods and apparatus to provide image content to, and display image content on, variable refresh rate displays with reduced input lag. The methods and apparatus allow for image tearing, or the displaying of image content from more than one video frame, when the render rate of a provided video frame falls outside the display refresh rate range of a variable refresh rate display when the display is refreshing with a previous frame (e.g. the display is in active refresh), thus reducing the input lag of the content of the provided video frame. The methods and apparatus may also prevent image tearing when the render rate of provided video frames is within the display refresh rate range of a display.
US09911396B2 Multi-user interactive media wall
An interactive media wall is provided on which multiple media contents can be simultaneously displayed. Multiple users can interact with the interactive media wall such that visual portions of the multiple media contents can be presented on the interactive media wall, while audio portions of the media contents may be presented to each of the multiple users via peripheral listening devices. Users consuming the same media content can communicate via a chat session(s).
US09911394B2 Method and apparatus for controlling image display
The present disclosure discloses a method and an apparatus for controlling image display, which achieve uniformity of image display and remove the image-retention in a compensation manner of high precision, high efficiency and low cost. The method for controlling image display comprises: reading gray scales of all sub-pixels of a current frame image displayed by a display device; determining an ideal luminance corresponding to the gray scale according to a predetermined ideal corresponding relationship between the gray scales and luminance of respective sub-pixels respectively; determining an adjusted gray scale corresponding to the ideal luminance according to the predetermined original corresponding relationship between the gray scales and the luminance of respective sub-pixels respectively; driving the display device to display the current frame image according to the adjusted gray scale.
US09911392B2 Medical image diagnosis apparatus and image display apparatus
A medical image diagnosis apparatus according to an embodiment includes a controller. The controller generates a plurality of candidates for a first cross-sectional image from three-dimensional image data obtained by taking images of a heart. The controller generates, from the three-dimensional image data, one or more second cross-sectional images each of which intersects the candidates for the first cross-sectional image. The controller displays in parallel on a display, the candidates for the first cross-sectional image, as well as the second cross-sectional images on each of which information is superimposed. The information indicates positional relationships between the candidates for the first cross-sectional image and the second cross-sectional image.
US09911390B2 Liquid crystal display device
A liquid crystal display device (100) includes: a liquid crystal display panel (10); a scan line driving circuit (20) that supplies a scan signal voltage to each pixel (Px) via a corresponding scan line (11); a signal line driving circuit (30) that supplies a display signal voltage to each pixel via a corresponding signal line (12); and a display control section (40) including a polarity reversal driving switching section (41) that switches a mode of polarity reversal of the display signal voltage. In a case where the polarity reversal driving switching section switches the polarity reversal mode in transition from a first vertical scan period to a second vertical scan period immediately succeeding the first vertical scan period, the display control section is capable of making a largeness of a display signal voltage supplied in the second vertical scan period different from its original largeness only for a pixel group included in the plurality of pixels to which display signal voltages that have the same polarity in both the first and second vertical scan periods are supplied.
US09911389B2 Locally dimmed quantum dot display
Dual modulator displays are disclosed incorporating a phosphorescent plate interposed in the optical path between a light source modulation layer and a display modulation layer. Spatially modulated light output from the light source modulation layer impinges on the phosphorescent plate and excites corresponding regions of the phosphorescent plate which in turn emit light having different spectral characteristics than the light output from the light source modulation layer. Light emitted from the phosphorescent plate is received and further modulated by the display modulation layer to provide the ultimate display output.
US09911387B2 Display apparatus for adjusting backlight luminance based on color gamut boundary and driving method thereof
A display apparatus includes a display panel in which a plurality of pixel units are disposed, a backlight providing light to the display panel, and a data processing circuit receiving image signals and providing the image signals to the plurality of pixel units. The data processing circuit sets a luminance level of the backlight to a value corresponding to a color gamut boundary of the image signals adjacent to a saturation region.
US09911385B2 Organic light emitting display and driving method thereof
An organic light emitting display includes a display unit that includes pixels coupled to scan lines, control lines, and data lines; a control line driver for providing control signals to the respective pixels through the control lines; a first power driver for applying a first power to the pixels of the display unit; and a second power driver for applying a second power to the pixels of the display unit, wherein the first power and/or the second power is applied to the pixels of the display unit, having voltage values at different levels, during periods of one frame, and the control signals and the first and second powers are concurrently provided to all of the pixels.
US09911382B2 Display array substrate, compensation method, display panel and display device
The present disclosure provides a display array substrate, a compensation method, a display panel and a display device. The display array substrate includes at least one power line and a voltage application unit. The at least one power line is connected to pixels in at least one column within an effective display region on the display array substrate. The power application unit is arranged outside the effective display region and configured to apply power supply voltages to at least two power supply voltage input points on the at least one power line. An absolute value of a voltage difference between the at least two power supply voltage input points is less than a predetermined voltage threshold.
US09911381B2 Display device and display panel
There is provided a display device including a plurality of pixels. Each of the plurality of pixels may include a plurality of switching devices, at least one capacitor, and a semiconductor light-emitting device. The display device may further include a driving circuit configured to apply currents to the semiconductor light-emitting device through the plurality of switching devices and at least one capacitor. The semiconductor light-emitting device may emit red light, green light, and blue light through the currents applied by the driving circuit.
US09911379B2 Organic light-emitting diode display
An organic light-emitting diode (OLED) display is disclosed. In one aspect, the OLED display includes a substrate and an active pattern formed over the substrate and including first to fourth regions, the first and fourth regions connected to each other. The display also includes a gate insulation layer formed over the active pattern, and a first gate electrode formed over the gate insulation layer. The first gate electrode, the first region and the second region define a first transistor. The display also includes a second gate electrode formed over the gate insulation layer, and the second gate electrode, the third region and the fourth region define a second transistor. The display also includes a first insulating interlayer formed over the first and second gate electrodes and a conductive pattern formed over the first insulating interlayer. An OLED is configured to receive a driving current from the first transistor.
US09911378B2 Organic light emitting diode (OLED) display
An organic light emitting diode (OLED) display is disclosed. In one aspect the display includes a display panel having first through fourth pixels and a scan driving unit that outputs a scan signal to the display panel. The display also includes a data driving unit that alternately outputs a first data signal for the first pixels and a second data signal for the second pixels to the display panel, alternately outputs a third data signal for the third pixels and a fourth data signal for the fourth pixels to the display panel, and begins outputting the first and third data signals before one horizontal period begins The display further includes a demultiplexing unit that alternately applies the first and second data signals to the first and second pixels and the third and fourth data signals to the third and fourth pixels.
US09911375B2 Display device
A display device includes a first substrate that is non-rectangular and includes a display area having a plurality of pixels and a non-display area located around the display area, a second substrate that faces the first substrate and overlaps part of the first substrate, an integrated circuit that provides a driving signal to the pixels, and a first pad to which a flexible printed circuit board that delivers an external signal is coupled and which is electrically connected to the integrated circuit. The non-display area of the first substrate includes a first area that extends in a first direction and is exposed from the second substrate and a second area that extends in a second direction different from the first direction and is exposed from the second substrate. The integrated circuit is located in the first area. The first pad is located in the second area.
US09911369B2 Rollable display device
A rollable display device is provided. The rollable display device includes: a flexible screen display which is rolled or unrolled on both sides; at least one pair of rollable driving units where each side of the flexible screen display is rolled into or unrolled from one of the pair of rollable driving units; a link driving unit for supporting the rollable driving units to move the sides of the flexible screen display and to roll or unroll the flexible screen display; and a controller for controlling operations of the rollable driving units and the link driving unit.
US09911367B2 Thin film adhesive labels and methods of making thereof
Thin film labels, systems, and methods of making and using thereof are described. The thin film systems contain a label and a carrier film, where the label contains an overprint layer, indicia, and an adhesive layer. The carrier film may be coated on one or both sides with a release liner. The adhesive layer can be any suitable adhesive, such as a pressure sensitive adhesive, a fluid activatable adhesive, a heat activated adhesive, or a contact activated adhesive. The label is formed by printed or coating one or more layers of precursor material on the carrier film using standard printers. Suitable precursor materials include, but are not limited to epoxys, solvent cast films, polyurethane dispersions, such as acrylic-urethane hybrid polymer dispersions and polyester-polyurethane dispersions. After the overprint layer dries or is cured, the indicia are printed onto the overprint layer, then the adhesive is coated on top of the indicia.
US09911357B2 Training guidance apparatus
A solution for training guidance is provided. A method related to the solution includes acquiring, in a training guidance apparatus, cardiovascular data representing cardiovascular measurement on a user carrying out a physical exercise, wherein the acquired cardiovascular data is real-time data measured during the physical exercise. The method further includes determining exercise guidance attributes from the cardiovascular data with respect to at least one training target of the physical exercise, selecting a video clip matching with the guidance attributes, and causing display of the video clip to the user.
US09911354B2 Hands-free music notation display system
A hands-free music notation display system for playing digital sheet music. The system includes a tablet that displays digital sheet music and houses the system's operating components therein. The housing within the tablet includes a communication link connecting the tablet to one or more foot controls. The foot controls provide the ability for a user to display the next or previous page on the tablet with his or her foot, thereby permitting the user to remain hands-free to play an instrument. The tablet includes a plurality of buttons that permit a user to load and play sheet music thereon.
US09911352B2 Situated simulation for training, education, and therapy
Systems, methods, and other embodiments associated with producing an immersive training content module (ITCM) are described. One example system includes a capture logic to acquire information from which the ITCM may be produced. An ITCM may include a set of nodes, a set of measures, a logic to control transitions between nodes during a training session, and a logic to establish values for measures during the training sessions. Therefore, the example system may also include an assessment definition logic to define a set of measures to be included in the ITCM and an interaction logic to define a set of interactions to be included in the ITCM. The ITCM may be written to a computer-readable medium.
US09911350B2 Method and apparatus for training a user of a software application
A method that incorporates teachings of the subject disclosure may include, for example, detecting a game stimulus signal generated by a first gaming accessory device, determining a first game action result based on the game stimulus signal, analyzing the first game action result to provide a first coaching message to achieve a desired result, and presenting the coaching message. Additional embodiments are disclosed.
US09911345B2 System and method for detecting misaligned stationary objects
Provided is a navigation system that processes a route plan and data from the surrounding environment to identify a potential threat of undesirable contact anywhere along the route plan. The provided navigation system generates an informative, anticipative display of the vehicle's surrounding environment. When a potential threat is identified, the provided navigation system provides a visual threat alert that enables rerouting the vehicle, thereby averting the potential threat.
US09911341B2 Automated package delivery to a delivery receptacle
Improving automated package delivery to mobile delivery receptacles to allow accurate and reliable package deliveries comprises a delivery receptacle for an automated package delivery via an unmanned aerial delivery device. The delivery receptacle is notified of a pending delivery and travels to a receiving location. The delivery receptacle emits infrared (“IR”) beacons from one or more IR beacon transmitters. An aerial delivery device detects the IR beacon and uses the beacons to navigate to the delivery receptacle. The delivery receptacle receives IR beacon responses from the aerial delivery device and continually or periodically directs the IR beacons in the direction of the aerial delivery device. The aerial delivery device deposits the package in the delivery receptacle. After receiving the package, the delivery receptacle transports the package to a secure location, such as into a garage.
US09911339B2 Experimental real-time performance enhancement for aircraft
Systems and methods for enhancing aircraft performance are provided. In one example, a method can include accessing an initial model that defines operating cost of an aircraft at a series of model operating states. The method also can include identifying one or more sample operating states for analyzing aircraft cost during flight. The method also can include receiving one or more real-time flight performance parameters indicative of aircraft operating cost while the aircraft is operating at the identified sample operating states. The method also can include generating an updated model that defines operating cost of the aircraft using the initial model as well as data defined by the real-time flight performance parameters. The method also can include determining an enhanced operating state based at least in part on the updated model and outputting the enhanced operating state for control of the aircraft.
US09911337B1 Integrating information from controller to pilot data link communication (CPDLC) messages
The present invention is a flight deck situational awareness communication system for providing integrated controller to pilot data link communication (CPDLC) message function for an aircraft. The system includes a memory configured for receiving and storing a CPDLC message from a communicatively coupled remote CPDLC communication system. The flight deck system further includes a processor. The processor is communicatively coupled with the memory and configured for receiving the CPDLC message stored in the memory. The processor is further configured for generating an image including a depiction of the content of the received CPDLC message overlaid onto an application depiction. The processor is communicatively coupled with a display and provides the image to the display. The display is configured for receiving and displaying the image.
US09911335B2 Systems and methods for automatically documenting an accident
A system for documenting an accident includes a vehicle that includes a transceiver device and a processing circuit. The processing circuit is configured to receive data from a collision detection device of the vehicle, determine, based on the received data, that an accident is impending or occurring involving the vehicle, generate a request for a nearby vehicle, and transmit, via the transceiver device, the request to the nearby vehicle. The request is for the nearby vehicle to illuminate a region associated with the accident, actively acquire data related to the accident, and record actively acquired data related to the accident.
US09911334B2 Connected vehicle traffic safety system and a method of warning drivers of a wrong-way travel
A connected vehicle traffic safety system comprises a traffic signal controller and a roadside unit (RSU) located at a one-way traffic lane for avoiding crashes with vehicles of wrong-way drivers by issuing warnings for wrong-way violations. The traffic signal controller is configured to operate a traffic signal. The traffic signal is facing a wrong-way traffic and is set to dwell permanently in a RED signal phase. The one-way traffic lane is configured as a signalized intersection with a wrong-way approach that is programmed as a traffic signal phase dwelling in RED. The roadside unit (RSU) is configured to transmit a Signal Phase and Timing (SPaT) indication for the RED signal phase. A first Onboard Unit (OBU)-equipped vehicle having an Onboard Unit (OBU) that is configured to calculate a RED light violation based on at least one of vehicle location data, direction heading data, and speed data provided from the first OBU-equipped vehicle and the SPaT indication of the RED signal phase to detect the first Onboard Unit (OBU)-equipped vehicle as a wrong-way vehicle.
US09911333B2 Method for classifying a received vehicle-to-X message
A method for classifying a received vehicle-to-X message, wherein the vehicle-to-X message is sent by a sender and received by a receiver that performs the classification, wherein the vehicle-to-X message contains first information regarding the sender, and wherein first information regarding the receiver is sensorially determined, wherein a sender region is determined from the first information regarding the sender, and a receiver region is determined from the first information regarding the receiver, and the classification is determined according to an overlapping of the sender region and the receiver region.
US09911331B2 Apparatus for determining the degree of shade of a parking position for a vehicle
An apparatus for determining a degree of shade for a parking position for a vehicle having a sensor device which determines an outside temperature and an interior temperature for the vehicle. The apparatus also includes an evaluation device which takes the outside temperature and the interior temperature as a basis for determining whether the vehicle is in a shaded or sunny parking position and a transmission device which sends information about the degree of shade for the parking position of the vehicle to a processing device.
US09911329B1 Enhanced traffic sign information messaging system
An Enhanced Traffic Sign Information Messaging System (ETSIMS) that provides the methodology, functions and support equipment to provide vehicles, which might not be within sight of the traffic message sign, with all or some prioritized parts of the message displayed on the sign, or an enhanced version of the information provided on the sign, including traffic information messages inferred from the message displayed on the traffic message sign. ETSIMS may also provide messages of this type without the need for the physical presence of a sign on the roadway.
US09911327B2 Method and apparatus for identifying a split lane traffic location
A method, apparatus and computer program product are provided to identify a split lane traffic location. In a method, a distribution of speeds associated with a plurality of historical probe points representative of travel along a road segment upstream of diverging downstream road segments is determined for each of a plurality of epochs. For each epoch, the distribution is evaluated to cluster the speeds associated with the plurality of historical probe points during the respective epoch into higher and lower speed clusters. For each epoch, it is determined whether a bi-modality condition exists upstream of the diverging downstream road segments based upon a relationship between the higher speed and the lower speed during the respective epoch. A split lane traffic location is then identified based upon a bi-modality frequency with which a bi-modality condition is determined from the historical probe points associated with the plurality of epochs.
US09911321B2 Simplified adaptable controller
Systems and methods utilize a smart control hub and a relatively “dumb” remote control device that receives display information from the control hub. The remote control communicates simplified commands that are interpreted by the control hub, and translated into commands that are transmitted by the control hub to devices being controlled. Various display pages, or menus of options, may be fed to the remote control and displayed and/or updated on the remote control. A user can navigate the various pages to control various devices using a limited number of buttons and/or a limited reconfigurable input surface. The pages may be updated, for example, to reflect current state information for devices, e.g. on/off, percent power, etc., or to change available commands, e.g. alternating between “on” and “off”, “pause” and “play”, etc.
US09911320B2 Remote control system
A remote control system includes a control unit configured to send a control signal to a machine to be controlled from a position remote from the machine. A sensor system is operatively linked with the control unit, and is configured for registering a presence of an operator in a predetermined proximity to a predetermined location. Operation of the machine to be controlled is responsive to the sensor system.
US09911306B2 Hydration container with liquid volume measurement
Systems and methods for providing a smart hydration container or bottle which accurately tracks a user's liquid intake. The smart hydration container utilizes a new capacitive sensing technology which does not require a complicated design for capacitive conductive surfaces and provides accurate capacitive measurements which map to volume measurements. Through the use of calibrated data, the smart hydration container accurately measures capacitance “as a whole” of the entire container's contents even when the container is not resting upright. In some implementations, the smart hydration container utilizes a combination of capacitive sensing, motion sensing, position sensing, and/or temperature sensing to provide an accurate measure of liquid volume in the container. The capacitive sensor may be electrically shielded by a passive conductive sensor shield, a grounded conductive sensor shield, or an active conductive sensor shield.
US09911300B2 Alert management utilizing mobile devices
Methods, computer systems, and computer-storage medium are provided for managing patient alerts using a mobile device. A mobile device associated with a patient caregiver receives a critical alert related to the patient, and the alert is presented on the mobile device. The alert includes important contextual information that enables the caregiver to make a quick assessment of how to effectively address the alert. The alert includes options for accepting the alert or rejecting the alert. Acceptance of the alert enables the caregiver to communicate the alert to selected caregivers that can assist in managing the alert. Rejecting the alert causes the alert to be automatically communicated to additional caregivers associated with patient.
US09911291B2 Portable device for outputting virtual vibration using vibrators
A portable device for outputting virtual vibration is provided. The portable device includes a controller configured to generate a control signal corresponding to a detected event. The portable device also includes vibrators configured to output virtual vibration based on the control signal.
US09911284B2 System and method for play of a lottery second chance game wherein game players visit a communication-enabled location to satisfy a requirement for entry into the second chance game
A system and method are provided for play of a lottery second-chance game wherein players visit one or more physical locations to satisfy requirements for entry into the second chance game. The players are provided with the identity and location of the communication-enabled locations, and such locations are configured with a transmitter device that broadcasts an ID signal that is unique to the respective communication-enabled location. In one embodiment, the players are provided an application for download to a mobile smart device, the application enabling recognition and receipt by the device of the unique ID signals emitted by the transmitter devices. A game server is in secure communication with one or both of the player's mobile smart device or a functional component within the communication-enabled location, the game server identifying the player and the particular communication-enabled location upon receipt of a transmission that includes at least part of the unique ID signal. Receipt of the transmission by the server functions to verify that the player is within the communication-enabled location, and the server automatically credits to the player satisfaction of a requirement for entry into the second chance game.
US09911282B2 System and method for detecting inappropriate content in virtual worlds
A system for detecting inappropriate content in a virtual world environment has, and a corresponding method utilizes, a rating unit for rating each of one or more virtual objects based upon its content. The system has, and the method utilizes, a tagging unit for tagging each of the one or more virtual objects with its respective rating, an object tagging database for storing ratings of the one or more virtual objects, and a policy database for storing policies associated with the ratings and the regions. Further, the system has, and the method utilizes, an object monitor for monitoring the movement of each of the one or more virtual objects, a security scanner for scanning each of the one or more virtual objects to determine the rating of each of the one or more virtual objects, and an enforcement module to enforce the policies of the policy database based upon the rating and the respective region.
US09911281B2 Rotor-based gaming device having a secondary award system
A game system including a plurality of symbols, a rotor and an award amount. The plurality of symbols include at least one secondary award group of the symbols. A wager is placeable on the secondary award group. The rotor displays the symbols and a plurality of ball landings adjacent to the symbols. A plurality of the symbols are indicatable after multiple spins of the rotor. The game system is operable to provide a secondary award based on the indication of one or more symbols within the secondary award group.
US09911279B2 System and method wherein game players visit one or more communication-enabled locations to increase a likelihood of success or enhanced winnings in the game
A system and method are provided for play of a game of chance wherein players visit one or more physical locations to increase a likelihood of success or enhanced winnings in the game. A plurality of physical locations are designated as authorized communication-enabled locations and are configured with a transmitter device that broadcasts a unique ID signal or a receiver that receives the unique ID signal. The identity and address of the locations are published to the players. The players are provided with any one or more of: one of the unique transmitter devices; an application for download to a mobile smart device that enables receipt and recognition by the device of the unique ID signals; or a downloaded application to cause the mobile smart device to transmit a respective unique ID signal for receipt by the receiver in the communication-enabled locations. A game server is in secure communication with one or all of: the player's mobile smart device, the transmitter device at the communication-enabled location, or the receiver at the communication-enabled location. The server identifies the player and the particular location upon receipt of a transmission of the unique ID signal, and generates a personalized message to the player with instructions as to how the player can increase their likelihood of success in the game of chance by taking certain actions at the location.
US09911278B2 System for game play in an electronic environment
The inventions herein relate to novel games of chance and apparatus and methods for their play. In certain embodiments, the existing lottery infrastructure is used in conjunction with electronic remote game play. A player receives a ticket identification number (TIN), optionally via lottery game play, and then plays an electronic game based upon the TIN. The remote system contains information associated with the TIN, for example, identification of which game will be played, and in a predetermined context, whether the player is to win or lose, and if they win, the form of the prize.
US09911275B2 Multi-control stick interleaved wagering system
An electronic gaming machine is disclosed. The electronic gaming machine includes an interactive controller constructed to: determine that a user has used a power-up in a skill-based game; provide to the user an advantage in the skill-based game; communicate to an application controller, application telemetry data of the user's use of the power-up; receive from the application controller, a wager outcome; and present to the user the wager outcome. The electronic gaming machine further includes the application controller operatively connecting the interactive controller and a wager controller. The application controller is constructed to: receive the application telemetry data; determine that the user has used the power-up; generate a wager request on the determination that the user has used the power-up; communicate to the wager controller, the wager request; receive from the wager controller, a wager outcome; and communicate the wager outcome to the interactive controller for display to the user.
US09911274B2 Secure distributed gambling using stand-alone gambling platforms formed by independently operating coupled pairs of gambling microprocessors and mobile computing devices
A secure distributed gambling system and method is described. The system includes a plurality of mobile computing devices and a plurality of secure gambling microprocessors. Each of the plurality of secure gambling microprocessors is coupled with a different one of the plurality of mobile computing devices to provide a plurality of secure stand-alone gambling platforms. A gambling management system is communicatively coupled with one or more of the plurality of secure stand-alone gambling platforms to maintain gambling integrity.
US09911270B2 System, method, and non-transitory computer-readable storage media for multiple exchange of multiple iterations of the same online wager transaction
A system, method and computer product for multiple online exchanges of multiple iterations of all or part of a wager or fantasy sports entry is disclosed. A user accesses a wager exchange website. The user creates a user account and selects a ticket for partial sale. The user indicates a percentage value of the ticket that the user wishes to sell. The ticket is split into two child tickets, a first child ticket corresponding to the percentage value the user wishes to sell and a second child ticket corresponding to a percentage value the user wishes to retain. The ticket is set as inactive, and the first child ticket is set as active. The first child ticket is offered for sale on the exchange website. A second user purchases the first child ticket, and the process repeats with the first child ticket.
US09911266B2 Multimode retail system
A multimode system for receiving data in a retail environment includes: a secure input module for receiving high security input and low security input from a customer, the high security input to be communicated by the secure input module in cipher text, and the low security input to be communicated by the secure input module in plaintext. The multimode system is adapted to operate in a high security mode and a low security mode. The multimode system is adapted to enter the low security mode upon detection by the multimode system of a security breach condition. In the high security mode, the secure input module accepts low security input and high security input. In the low security mode, the secure input module accepts the low security input and does not accept the high security input.
US09911263B2 Input device with dynamic display function
An input device with a dynamic display function includes a panel, an interface unit, and a control module, with multiple buttons groups randomly mounted on the panel. Each buttons group has at least one button, and one buttons group has at least two buttons. Every button has a lighting unit placed adjacently and has a symbol marked thereon, and the buttons in the same buttons groups have an identical symbol. The control module is electrically connected with the interface unit and the lighting unit and lights up at least one lighting unit and its corresponding button in every buttons groups. The interface unit transfers a signal from the lit button when the button is triggered. The buttons are randomly lit up by the control module in every operation.
US09911262B2 Distance determination and authentication of a remote control key to a vehicle
A method for authenticating a radio key for a vehicle involving determining a distance between the radio key and the vehicle and authenticating the radio key. A character string generated by the radio key is transmitted to the vehicle to determine the distance. The character string is generated independently of an item of information transmitted by the vehicle, and the authentication is based on the character string.
US09911261B2 Secure storage device
A secure storage device includes a container having a void for external access to the interior space. A closure lid, similarly dimensioned according to the void, may be joined to the container and can be manipulated between an open or closed state. An air evacuation system is also provided including a pressure release valve, a pressure indicator, and a pressure control system, such as a pump, for providing pressure to move air through a fluid communication channel from the interior space to the exterior of the container. A lock is fixed to the closure lid to conditionally restrict a change in state of the closure lid in response to an access control system. The access control system is configured to present an input, validate user input, and permit a state change of the lock.
US09911260B2 Associating external credentials with mobile devices
A computer-implemented method includes monitoring one or more mobile devices within a venue. The computer-implemented method further includes receiving a scan event indication denoting a scan of a ticket by a scanning device. The computer-implemented method further includes, responsive to receiving a scan event indication, identifying a candidate list, wherein the candidate list includes one or more candidate mobile devices that are within a threshold distance of the scanning device. The computer-implemented method further includes associating the ticket with at least one of the one or more candidate mobile devices. A corresponding computer system and computer program product are also disclosed.
US09911259B1 Passive entry passive start (PEPS) system with integrated authorization and ranging communications
A system includes a remote controller, such as a fob, and a base station at a target device, such as a vehicle. The remote controller and the base station are configured to communicate authorization communications and time-of-flight (ToF) communications between one another over a common communications channel. The base station is further configured to confirm from the authorization communications whether the remote controller is authorized for controlling a function of the target device and to confirm from the ToF communications whether the remote controller is within a predetermined range of the target device. The base station is further configured to prevent the function from being controlled by the control unit when the control unit is not within the predetermined range of the target device.
US09911257B2 Modeled physical environment for information delivery
Systems and methods for producing an access-controlled three-dimensional environment of a facility and its assets. A method performed by an environment management system (EMS) includes receiving, from a client system, user credentials, and validating the user credentials. The method includes retrieving user-specific data corresponding to the validated user credentials and transmitting three-dimensional (3D) environment data to the client system based on the validated user credentials and the user-specific data. The method includes receiving a request for information regarding an asset of the 3D environment data and determining additional environment data on an enterprise server system (ESS) that corresponds to the received request. The method includes transmitting, to the client system, a reference to the additional environment data on the ESS. The client system can then use the reference to retrieve the additional environment data from the ESS for display on the client system.
US09911256B1 Restricting access to a building
One embodiment provides a method, including: obtaining, using a sensor, biometric data of a user; determining, using a processor, that the biometric data of the user does not match biometric data of a known user; and securing, based on the biometric data of the user, an area within a building. Other aspects are described and claimed.
US09911245B1 Method and apparatus for using a vehicle license tag number for toll payment as a backup form of account authorization
A method and apparatus for processing vehicle license tag numbers allows subscribers of a toll service to avoid additional charges normally associated with processing photographs of vehicle license tags by toll agencies to collect tolls. A subscriber can upload one or more license tag numbers to be associated with the subscriber's account with the toll service. The toll service provides a list of license tag numbers to the toll agency. If, for a given toll event, the toll agency does not receive a response to a wireless toll tag reader signal, the toll agency compares a license tag number obtained by processing a photo of the vehicle's license tag with the list provided by the toll service to find a match and process the toll.
US09911242B2 Three-dimensional model generation
A method for adjusting pixel colors between image frames includes scanning, at a processor, a first image frame of a sequence of image frames. The method also includes determining a grayscale threshold based on characteristics of the first image frame to identify gray pixel candidates in the first image frame. The method further includes adjusting a pixel value of each pixel in the first image frame based on a chromatic adaptation transform estimation. The chromatic adaptation transform estimation is based on the gray pixel candidates. The grayscale threshold may be computed for each image frame in the sequence of image frames.
US09911239B2 Augmenting a live view
Techniques for augmenting an image of an object captured and displayed in real time with associated content are disclosed. In one embodiment, the method for augmenting the image includes receiving information defining a sampled frame of a video being captured by an electronic device in substantially real time, determining information representative of an object captured in the sampled frame based on the received information, causing the determined information to match stored information defining a plurality of items to locate an item matched to the captured object, retrieving content associated with the matched item, and providing the retrieved content for display with the captured image on the electronic device. The retrieved content may be rendered in an overlay element that overlays the captured image displayed on the electronic device. The rendered content is configured to enable a user to interact with the content.
US09911236B2 Opacity filter for display device
An optical see-through head-mounted display device includes a see-through lens which combines an augmented reality image with light from a real-world scene, while an opacity filter is used to selectively block portions of the real-world scene so that the augmented reality image appears more distinctly. The opacity filter can be a see-through LCD panel, for instance, where each pixel of the LCD panel can be selectively controlled to be transmissive or opaque, based on a size, shape and position of the augmented reality image. Eye tracking can be used to adjust the position of the augmented reality image and the opaque pixels. Peripheral regions of the opacity filter, which are not behind the augmented reality image, can be activated to provide a peripheral cue or a representation of the augmented reality image. In another aspect, opaque pixels are provided at a time when an augmented reality image is not present.
US09911235B2 Spatial interaction in augmented reality
A method for spatial interaction in Augmented Reality (AR) includes displaying an AR scene that includes an image of a real-world scene, a virtual target object, and a virtual cursor. A position of the virtual cursor is provided according to a first coordinate system within the AR scene. A user device tracks a pose of the user device relative to a user hand according to a second coordinate system. The second coordinate system is mapped to the first coordinate system to control movements of the virtual cursor. In a first mapping mode, virtual cursor movement is controlled to change a distance between the virtual cursor and the virtual target object. In a second mapping mode, virtual cursor movement is controlled to manipulate the virtual target object. User input is detected to control which of the first mapping mode or the second mapping mode is used.
US09911230B2 Method and apparatus for controlling virtual monitor
An apparatus and method for controlling a virtual monitor in an augmented reality display system are provided. The method for controlling a virtual monitor in an augmented reality display system, including a camera for photographing an image for determining a location of the virtual monitor and for photographing an image of a user's finger, and a graphic device including window images, includes parallel-processing the image for determining a location of the virtual monitor and the window images and mapping the window images to a set location to create the virtual monitor, extracting a finger tip from the image of the user's finger, stencil-buffering an image of the finger tip not to render the image of the finger in the virtual monitor, determining whether the finger tip collides with the stencil-buffered virtual monitor, and controlling an operation of the virtual monitor according to the determination of the finger tip collision.
US09911229B2 Transmission and configuration of three dimensional digital content
Transmission and configuration of three dimensional digital content is described. In one or more implementations, three-dimensional digital content is received having a three-dimensional mesh of a plurality of vertices. Each vertex includes a definition of a characteristic of the three-dimensional content. The definition of the characteristic is transformed for each vertex from a floating point representation to a fixed point representation. The fixed point representation includes a plurality of values that have different amounts of significance in defining the characteristic, one to another. The plurality of values is indexed of the fixed point representation of the definition of the characteristic. The indexing is based on the different amounts of significance, one to another. Output of the three dimensional digital content is controlled based on the indexed plurality of values.
US09911228B2 Geometric correction of rough wireframe models derived from photographs
Geometric correction of rough wireframe models derived from photographs may include rectification of either a 2D or 3D original wireframe model of a roof structure, derivation of metadata from the original wireframe, in-plane normalization of the wireframe, extrusion into a “rough” 3D wireframe based on the normalized wireframe, and correction of the “rough” 3D wireframe. The correction and normalization may be an iterative process based on initial pitch values, metadata derived from the original or corrected wireframe models and defined constraints regarding relationships between roof portions or segments. The iterative process may repeat adjusting the wireframe model until the adjusting converges to a stable state according to the various defined constraints.
US09911223B2 Automatic video segment selection method and apparatus
Disclosed are systems and methods for improving interactions with and between computers in content generating, searching, hosting and/or providing systems supported by or configured with personal computing devices, servers and/or platforms. The systems interact to identify and retrieve data within or across platforms, which can be used to improve the quality of data used in processing interactions between or among processors in such systems. The disclosed systems and methods provide systems and methods for automatically extracting and creating an animated Graphics Interchange Format (GIF) file from a media file. The disclosed systems and methods identify a number of GIF candidates from a video file, and based on analysis of each candidate's attributes, features and/or qualities, at least one GIF candidate is automatically selected for rendering.
US09911220B2 Automatically determining correspondences between three-dimensional models
The present disclosure is directed to integrating external 3D models into a character creation system. In general, a character creation system imports an external 3D model by determining correspondence values for each vertex within the 3D model. Once imported, a user can customize the 3D character by adding texture to the character, adjusting character features, swapping out one or more character features, adding clothes and accessories to the character, automatically rigging the character, and/or animating the character.
US09911219B2 Detection, tracking, and pose estimation of an articulated body
Techniques related to pose estimation for an articulated body are discussed. Such techniques may include extracting, segmenting, classifying, and labeling blobs, generating initial kinematic parameters that provide spatial relationships of elements of a kinematic model representing an articulated body, and refining the kinematic parameters to provide a pose estimation for the articulated body.
US09911215B1 Systems and methods for propagating edits through a video
Systems and methods of propagating edits through a video are presented herein. Decompositions of information defining frame images of a video may be obtained. Individual decompositions may include individual sets of sinusoidal functions separated into individual frequency bands. One or more frequency bands that convey differences between an (unedited) frame image and an edited version of that frame image may be identified. A subset of the one or more frequency bands that convey motion information associated with the frame image and a subsequent frame image in the video may be identified. Using the motion information, phase information of individual sinusoidal functions of a decomposition of the edited frame image, which may be included in the subset of the one or more frequency bands, may be propagated based on the motion information.
US09911209B2 System and method for improving video and other media playback
Techniques for efficiently capturing, generating and distributing more realistic images and video are provided. Among other aspects of the invention, a system is provided that includes tags that display dynamic image elements on a display with the aid of a physics model. In other aspects, the system selects among available physics models and virtual objects that serve as potential subjects for rendering dynamic image elements, based on system resource costs and resolution standards. In still other aspects, a new image file format contains embedded physical model and virtual object data for rendering images and video.
US09911207B2 Coherent diffractive imaging with spaced-apart beams
Apparatus and methods for Coherent Diffractive Imaging with multiple, simultaneous, spatially distinct beams chosen and configured to isolate incoherent sums of beam diffraction such that interference between the multiple beams is not present in the data prior to computationally reconstructing the image. This is accomplished through selecting the multiple beams to be non-interfering modes, or through designing the apparatus such that the interference is not recorded, or through processing the collected data to filter the interference before reconstructing the image.
US09911206B2 Time efficient ASL imaging with segmented multiband acquisition
A method for generating a perfusion weighted image using ASL with segmented acquisitions includes dividing an anatomical area of interest into slices and performing an EPI acquisition process using an MRI system to acquire a control image dataset representative of the slices. An ASL preparation process is performed using the MRI system to magnetically label protons in arterial blood water upstream from the anatomical area of interest. Following a first time period, a multi-band EPI acquisition process is performed using the MRI system to acquire a first labeled image dataset representative of a first subset of the slices. Following a second time period, another multi-band EPI acquisition process is performed using the MRI system to acquire a second labeled image dataset representative of a second subset of the slices. A perfusion weighted image is generated by subtracting the first and second labeled image dataset from the control image dataset.
US09911204B2 Image processing method, image processing apparatus, and recording medium
A processor performs pattern matching on a search target image using a reference image. The processor uses the reference image to calculate a model pyramid, which has model edges and different layers, and uses the search target image to calculate the search target pyramid, which has search target edges and layers having size reduction factors which are the same as those of the model pyramid. The processor performs pattern matching on the search target pyramid using the model pyramid. Calculation of the model pyramid includes (i) extracting and calculating sizes of edges from the reference image, (ii) obtaining maximum size reduction factors of the individual edges, and (iii) setting an edge (a) which has a size reduction factor equal to or larger than a target layer size reduction factor and (b) which has been subjected to size reduction as a model edge of the target layer.
US09911202B2 Visual salience of online video as a predictor of success
Systems, methods, and computer program products to perform an operation comprising computing a saliency value for a video based on saliency values a set of pixels in each frame of the video, computing, for the video, an expected value for a metric by a predictive algorithm based on the saliency value for the video, and outputting the expected value for the metric as an indication of an expected outcome for the metric achieved by the video.
US09911200B2 Determining diffuse image component values for use in rendering an image
Relightable free-viewpoint rendering allows a novel view of a scene to be rendered and relit based on multiple views of the scene from multiple camera viewpoints. Image values from the multiple camera viewpoints can be separated into diffuse image components and specular image components, such that an intrinsic color component of a relightable texture can be determined for a specular scene, by using the separated diffuse image components. Furthermore, surface normals of geometry in the scene can be refined by constructing a height map based on a conservative component of an initial surface normal field and then determining the refined surface normals based on the constructed height map.
US09911199B2 Using different indicators for determining positional changes of a radiotherapy target
The present invention relates to a method for determining data referred to as target change data which can be used for performing radiotherapy treatment, the target change data describing information on the change of position of a target included in a body of a patient, the method being performed by a computer and comprising the following steps: acquiring determination rule data describing a rule for mapping an indicator change set to the target change data, the indicator change set being a set which comprises more than one element, the elements of the indicator change set respectively representing information on respective changes of positions of indicators, at least two of the indicators respectively indicating a change of position of different body structures referred to as indicator structures, acquiring set data describing an acquired indicator change set; and determining the target change data based on the determination rule data and the set data by applying the rule for mapping to the acquired indicator change set.
US09911198B2 Method, system and apparatus for matching moving targets between camera views
At least one method of, and at least one apparatus, system and computer readable medium for, matching moving targets between two camera views are discussed herein. The moving targets are tracked over video frames in each of the camera views and motion directions of the targets are recorded. Appearance similarities for cross-camera target pairs over synchronized ones of the video frames are determined. A joint probability model of co-occurred ones of the recorded motion directions for the camera views are determined using a weighted accumulation of the recorded motion directions of the cross-camera target pairs, where accumulation weights used in determining the joint probability model are derived from the determined appearance similarities. The moving targets between the camera views are matched using the joint probability model.
US09911197B1 Moving object spotting by forward-backward motion history accumulation
Described is a system for detecting moving objects using multi-frame motion history images. An input video sequence of consecutive registered image frames is received. The sequence of consecutive registered image frames comprises forward and backward registered image frames registered to a coordinate system of a reference image frame. Frame differences are computed between each of the consecutive registered image frames and the reference image frame. The frame differences are accumulated based on characteristics of the input video sequence to compute a corresponding motion response value. A selected threshold value is then applied to the motion response value to produce at least one binary image used for detection of moving objects in the input video sequence. Additionally, the invention includes a system for adaptive parameter optimization by input image characterization, wherein parameters that are based on characteristics of the image influence the motion detection process.
US09911194B2 Systems and methods for higher order dimensional space video segmentation
This disclosure relates to system and methods for segmenting a video in a higher order dimensional space. A video may be segmented by obtaining visual information defining an image of the video. The visual information may include pixels of the image and may be represented in a display space having a first dimensionality. A designation of a subset of the visual information represented in the display space as a part of an object portrayed in the image may be obtained. The visual information and the designation may be represented in the higher order dimensional space having a second dimensionality greater than the first dimensionality. An association of the visual information represented in the higher order dimensional space with the object may be obtained. The association may be correlated with the visual information represented in the display space. The correlation may define a location of the object in the image.
US09911185B2 Method of generating reference data for inspecting a circuit board
The present invention relates to a method of generating reference data for inspecting a circuit board. The method comprises steps of scanning a bare circuit board to obtain image information of the bare circuit board, generating a compensation matrix using pad coordinate information extracted from the image information and pad coordinate information prestored in design data, and generating, by applying the compensation matrix to the image information, a reference data including coordinate information of a distinctive object. According to the method, inspection efficiency may optimized through quickly generating reference data without CAD information necessary for circuit board inspection.
US09911177B2 Applying chroma suppression to image data in a scaler of an image processing pipeline
An image processing pipeline may apply chroma suppression to image data at a scaler implemented in the image processing pipeline. Image data collected for an image may be received at a scaler that is encoded in a color space that includes a luminance component and chrominance components. When resampling the image data to generate a different size of the image, the scaler may attenuate the chrominance components of the image data according to the luminance component of the image data. The scaler may also perform dot error correction and convert the image data from one subsampling scheme to another.
US09911176B2 System and method of processing images into sub-image portions for output to a plurality of displays such as a network video wall
A system is disclosed for improving the flexibility and performance of video walls including a method for using a primary GPU for initial rendering to a GPU frame buffer, copying of this frame buffer to system memory for processing into multiple sub-frames then outputting the sub-frames via multiple secondary graphics controllers. This system enables the video wall server to leverage performance advantages afforded by GPU acceleration and maintaining performance while providing full flexibility of the CPU and system memory to apply the required transformations to the sub-images as well as flexibility in the selection of secondary graphics controllers (including network graphics approaches where the graphics controller is connected over a network) for outputting the multiple sub-images to a plurality of displays. This has applications generally in the field of real-time multiple display graphics processing as well as specific applications in the field of video walls and network video walls. A method and computer readable medium are also disclosed that operate in accordance with the system.
US09911175B2 Modification of graphical command tokens
In one example, a method for processing video data includes receiving, by a sink device and from a source device, one or more graphical command tokens that are executable to render original video data; modifying, by the sink device, the graphical command tokens to generate modified graphical command tokens that are executable to render modified video data different from the original video data; and outputting, for presentation at a display operatively connected to the sink device, the modified video data.
US09911172B2 Content creation and licensing control
Content creation and licensing control techniques are described. In a first example, a content creation service is configured to support content creation using an image along with functionality to locate the image or a similar image that is available for licensing. In another example, previews of images are used to generate different versions of content along with an option to license images previewed in an approved version of the content. In a further example, fingerprints are used to locate images used as part of content creation by a content creation service without leaving a context of the service. In yet another example, location of licensable versions of images is based at least in part on identification of a watermark included as part of an image. In an additional example, an image itself is used as a basis to locate other images available for licensing by a content sharing service.
US09911171B2 Fingerprinting of data
A method of identifying a source of media, including: performing the following actions using at least one computer: identifying a plurality of segments arranged to form said media; generating a representative master key (RMK) of said media from the arrangement of the plurality of segments, wherein the RMK comprises a first listing of master identifiers corresponding to the plurality of segments, each master identifier of the first listing of master identifiers identifying a source master of each segment of the plurality of segments; receiving a listing of fingerprints, each fingerprint of the listing of fingerprints having a corresponding identifier that identifies the source of said media, said each fingerprint also including a second listing of master identifiers; and comparing the first listing of master identifiers in the RMK to the second listing of master identifiers in said each fingerprint in the listing of fingerprints to identify the source.
US09911170B2 Arranging a transport service for a user based on the estimated time of arrival of the user
A system and method of arranging a transport service for a user is described. The system determines a first estimated time of arrival (ETA) of a user to a specified location data point based, at least in part, on a position of a user device operated by the user. The system also determines a second ETA of a vehicle of a set of vehicles to the specified location data point. When the first ETA and the second ETA are within a predetermined amount of time of each other, the system can select a driver to provide a transport service for the user based, at least in part, on the specified location data point.
US09911164B1 System and method for managing restaurant customer data elements
This invention is a system and method for managing restaurant customer data elements.
US09911161B2 Method and server for analyzing social media content based on survey participation data related to a website
A method and survey server for analyzing social media content based on survey participation data related to a website. The survey server collects survey participation data comprising text and a metric. The survey participation data correspond to survey information received from users of a plurality of user devices in relation to a visit of the website. The survey server analyzes the text of the survey participation data, to generate a correlation between words or groups of words present in the text and the metric. Social media content comprising text and related to a visit of the website is also collected. The text of the social media content is analyzed, to identify the words or groups of words. The social media content comprising the words or groups of words is associated with the metric. The analysis of the text of the survey participation data may comprise performing a semantic categorization.
US09911159B1 Encouraging safe driving using a remote vehicle starter
A method of encouraging safe driving of a vehicle using a remote starter device installed at a vehicle is provided. The remote starter device determines whether it is in signal communication with a remote starter application operating at a mobile computing device separate from the remote starter device. When the remote starter device is in signal communication with the remote starter application, the remote starter device permits ignition of the vehicle. When the remote starter device is not in signal communication with the remote starter application, the remote starter device prevents ignition of the vehicle. The remote starter application may present to a driver of the vehicle an insurance rate for taking a trip in the vehicle.
US09911158B1 Systems and methods for providing a persistent state
Systems and methods for providing persistent state are described herein. One or more embodiments include verifying access information provided by a user of a first device in connection with a user initiated transaction session, maintaining a current state of the transaction session in a persistent store, establishing a session key corresponding to the transaction session, providing the session key to the user, and providing the user access to the current state of the transaction session via a second device in response to validation of the session key received from the second device.
US09911153B2 Data-driven color coordinator
A color selection and coordination system including a database of predetermined color relationships implementing a data-driven color model. A starting color is associated with a first color in the color database. One or more predefined color palettes associated with the first color may be retrieved, each palette including one or more coordinating colors, the coordinating colors being predetermined based on the first color and a color coordination algorithm.
US09911152B2 Distribution channel using audio/visual recognition
Systems and methods are provided for providing a platform to provide virtual storefronts to consumers. Environmental elements are associated with specific consumer services on computer server. A user in the environment takes audio or visual recordings of an environmental element and uploads the recordings to the server. The server determines the appropriate consumer service associated with the recorded environmental element and provides the user with a reference to the service. Accordingly, any space, such as a bus stop, subway or train terminal, movie theater, or airport, may be turned into a virtual store.
US09911151B1 System and method of inventory management and marketing for vehicles
A system includes location detectors and a server. The location detectors are supported by respective vehicles that are for sale on a dealership lot. Each detector detects its location and wirelessly transmits location data indicating the location. The server receives the transmitted location data from each detector, and maintains a database of each vehicle's location in accordance with associated detector's location. The server receives selection criteria from a mobile communication device. The server selects a vehicle from among the vehicles based on the selection criteria. The server transmits the location of the selected vehicle to the communication device.
US09911147B2 Systems and methods for implementing automated intelligence-based bidding for repair services for environmental control systems in monitored buildings
A system and method are provided for implementing an automated bidding process in which a preliminary system-generated diagnosis (pre-diagnosis) of a heating, ventilation and air conditioning (HVAC) system difficulty may be generated and forwarded to a plurality of available or pre-selected HVAC repair facilities or contractors for soliciting and receiving competitive bidding for repair services from those HVAC repair facilities or contractors. A system-based automated solution is provided to lessen the burden on building owners or operators in soliciting “knowledge-based” bids for undertaking repairs to correct HVAC system issues raised in an automatically-generated HVAC system pre-diagnosis. An automated platform and/or scheme allow a plurality of HAVC contractors to offer bids for the repair services based on a pre-diagnosis forwarded to the plurality of contractors as part of a bid solicitation process for the repairs.
US09911146B2 Method and system for providing online authentication utilizing biometric data
A system and method for securely authenticating a user for the purpose of accessing information, such as private financial or personal information, in an online environment are disclosed. In addition, a system and method for allowing consumers to make secure payments from an electronic wallet with biometric authentication are disclosed.
US09911141B2 Contextual advertisements within mixed-content page layout model
One or more text blocks, one or more images, and one or more contextual advertisements related to the text blocks are input into a mixed-content page layout model. One or more pages are generated by the mixed-content page layout model such that the text blocks, the images, and the contextual advertisements are displayed on the pages. For each contextual advertisement, a dynamic weight to a particular text block is determined. The mixed-content page layout model uses the dynamic weight for a contextual advertisement in determining where the advertisement is displayed within the pages in relation to the particular text block.
US09911124B2 Transaction security apparatus and method
A transaction security apparatus, including an input device or receiver for inputting or receiving transaction information regarding a transaction on or involving an account, a camera or video recording device for obtaining or recording a photograph or video clip of an individual involved in the transaction, a processing device for processing the information regarding the transaction and for generating a notification message containing information regarding the transaction, and a transmitter for transmitting the notification message to a communication device associated with an account holder independently of any processing of the transaction by a transaction authorization processing computer. The apparatus transmits the photograph or the video clip to the communication device independently of any processing of the transaction by a transaction authorization processing computer.
US09911121B2 Method and system for authorizing a transaction using a dynamic authorization code
A method and apparatus for conducting a secure transaction involving generation of a dynamic authentication code on a mobile device, based on secret data which does not identify an account. The authentication code and financial account identifying information are transmitted to a validating entity, which shares information about the secret data, to authorize the transaction.
US09911120B2 Mobile phone ATM processing methods and systems
Embodiments provide systems, methods, processes, computer program code and means for using mobile devices to conduct transactions with ATM devices.
US09911118B2 Device pairing via trusted intermediary
Embodiments are directed at systems, apparatuses, and methods for indirect device pairing through a trusted intermediary. One embodiment is directed to a method including receiving a pairing identifier associated with an untrusted device controller. The method further comprises extracting the pairing identifier from the pairing request, searching a pairing identifier database for a matching pairing identifier, determining an untrusted device controller associated with the matching pairing identifier, and sending the pairing request to the untrusted device controller. The untrusted device controller may identify the untrusted device, associate the pairing identifier with the trusted intermediary, and lock the pairing identifier. The method further comprises receiving a pairing response indicating that the untrusted device is paired with the computer. Accordingly, the trusted device is indirectly paired to the untrusted device and the trusted device is configured to complete a transaction with the untrusted device without communicating transaction information to the untrusted device.
US09911113B2 Information processing device and information processing method
An electronic money server groups a parent who owns a parent mobile phone and children who own child mobile phones to be registered as a family, and credit information of the parent is also registered. When the child accesses the electronic money server by using the child mobile phone and specifies a money amount to request family charge, the electronic money server requests the parent mobile phone for permission of the family charge. When the parent grants the family charge, the electronic money server allows the parent mobile phone to decrease a value by the money amount specified by the child and to make the family settlement, and allows the child mobile phone to increase the value by this money amount and to effect the family charge. Further, the child mobile phone can accept issue of credit from a credit server on credit of the parent, thereby effecting the family charge.
US09911111B2 Point of sale pairing
Wireless pairing is automatically performed based on purchase. By providing a unique identifier and/or account number (such as a credit card number), a wireless device is automatically paired to a wireless network. For example, when a smartphone or other mobile device is used to purchase an electronic door lock, the smartphone may be used to identify security credentials for accessing the wireless network. A cellular telephone number, for example, may reveal an SSID and/or a network password that is required to access a residential or business WI-FI network. As another example, a credit card number may also be used to identify the security credentials for the wireless network.
US09911104B2 Banking system controlled responsive to data bearing records
An apparatus that operates to cause financial transfers responsive to data read from data bearing records, includes at least one processor that is in operative connection with a card reader, a check acceptor, a cash dispenser and a display. The at least one processor causes the machine to operate to read card data from a user card, and to cause a determination to be made that the read card data corresponds to an authorized financial account. The at least one processor is operative to cause data to be read from a check and/or cash to be dispensed, and a financial transfer to or from the account corresponding to the value thereof. Machine instructions are output and user transaction inputs can be received through either a primary or an auxiliary touch screen display.
US09911103B2 Payment gateway for processing payment requests associated with a wireless users account
A Payment Gateway interfaces, in one embodiment, with a merchant's website or a payment aggregator used by the merchant's website, for facilitating purchases made at the website by a wireless user. In one embodiment, purchases at the website are paid for by charging the wireless user's prepaid account maintained in the mobile operator. The Payment Gateway accepts messages in an HTTP based message from the website or payment aggregator and provides a gateway function to the wireless user's service provider, which is accessible only using SS7 based MAP protocols. The mobile gateway ascertains the proper message syntax to use in a MAP based USSD message based on the wireless carrier. The mobile gateway also receives messages from the mobile operator, typically using a GSM MAP based protocol and initiates HTTP based messages back to the merchant's website.
US09911101B2 Duty block time control via statistical analysis
Method and apparatus for statistically determining buffers for time variances for scheduled operations. Buffers for a particular operation can be based on a statistical analysis of past instances of the specific operation, and a buffer can be applied based on a selected statistical confidence interval. The statistical analysis can include determining a Gumbel distribution for time variances for a particular operation. Once buffers have been determined for the various operations, itineraries of operations can be prepared such that the scheduled times plus the buffer times for the operations in an itinerary do not exceed personnel limits of the personnel who may be assigned to the itineraries.
US09911098B2 Dynamic notary system
A dynamic notary system having one or more processors, and one or more non-transitory computer readable medium coupled to the one or more processors with at least one of the computer readable medium being local to the one or more processors. The one or more non-transitory computer readable medium stores computer executable instructions, that when executed by the one or more processors cause the one or more processors to: (1) verify a notary with user identification information stored on the at least one computer readable medium local to the one or more processors, (2) retrieve a document to be notarized from the one or more non-transitory computer readable medium, (3) receive a signatory's electronic signature, (4) receive the notary's electronic signature, (5) apply a notary seal to the document, and (6) lock the document in an unchangeable format.
US09911094B1 Intelligent key performance indicator catalog
A system may generate and update a key performance indicator (KPI) on a KPI dash. The system may receive a request and access KPI data to generate a self-contained KPI object. The system can also use metadata associated with the KPI to generate a set of metadata objects to be included in the KPI object. The self-contained KPI object can be displayed on the dashboard, and responsive to a rating received from a user, a cumulative rating may be updated. The new rating may be displayed within the KPI on the dashboard.
US09911091B2 System and method for vendor and customer management in a supply chain
A method of managing a supply chain comprises providing at a customer interface module a plurality of order fulfillment options to a customer, and receiving from the customer a selection of a particular order fulfillment option. The method also includes receiving a first order from the customer, and receiving a first inventory status from a first distribution center. A first distribution center sends a first product to the customer in response to determining that the particular order fulfillment option comprises a fill-partial order fulfillment option, and a duration between the time that the first product is directed to be sent and the time when the first product is actually sent is determined. An alert is generated if the duration is greater than a predetermined duration.
US09911085B2 Venue seat and feature map
Methods and systems are provided for helping a customer select seats when purchasing tickets, such as from an online ticket seller. A venue map can be provided to help the customer select the seat. The venue map can show the different seating areas and their relationship to an attraction area, such as a stage, game court or field. The venue map can also show features of the venue. For example, the venue map can show wheel chair accesses, restaurants, drink stands, playgrounds, stores, parking lots, restrooms, and the like. Ticket prices for each seating area can be provided, either on the map or elsewhere. Thus, a customer can use the map to determine which seats the customer desires for a particular event.
US09911082B2 Question classification and feature mapping in a deep question answering system
System, method, and computer program product to identify relevant features in a deep question answering system, by classifying a first case received by the deep question answering system, and, while training the deep question answering system to answer the first case, identifying a first feature in the first case, computing a first feature score for the first feature, the first feature score indicating a relevance of the first feature in generating a correct response to the first case, and, identifying the first feature as relevant in answering the classified first case upon determining that the first feature score exceeds a relevance threshold.
US09911081B2 Reverse fact checking method and system
An efficient fact checking system analyzes and determines the factual accuracy of information and/or characterizes the information by comparing the information with source information. The efficient fact checking system automatically monitors information, processes the information, fact checks the information efficiently and/or provides a status of the information.
US09911079B2 Carrier tape, method for manufacturing same, and method for manufacturing RFID tag
A method for manufacturing a carrier tape housing electronic components with seal materials includes preparing a tape-shaped main body with housing holes including bottom surfaces along a longitudinal direction, providing chip-shaped electronic components respectively into the housing holes, affixing a tape-shaped seal material having an adhesive layer on one principal surface to the tape-shaped main body such that the adhesive layer covers the housing holes and adheres to the electronic components, and forming cuts in the tape-shaped seal material to separate portions defining and functioning as the seal materials including portions at least partially overlapping with the respective housing holes in a planar view from the other portions.
US09911074B2 Security element for value documents
The invention concerns a security element having a magnetic coding consisting of magnetic coding elements. At least one of the magnetic coding elements has a grid-shaped magnetic region which is formed by a plurality of mutually parallel grid strips made of magnetic material which respectively have a magnetic anisotropy. The grid strips lead, through their magnetic anisotropy, to the magnetization direction of the coding element being able to differ from the direction of the applied magnetic field. Since the resultant magnetic signals that the grid-shaped magnetic regions deliver cannot be simulated by conventional magnetic regions, said coding elements increase the anti-forgery security of the security element.
US09911073B1 Facial patterns for optical barcodes
Systems and methods for using facial patterns for information access via optical barcodes are provided. In example embodiments, a computer accesses an image, the image including a geometric shape. The computer determines, using a facial recognition module, that the accessed image includes a face inside the geometric shape. The computer determines, using the face inside the geometric shape, an orientation of the geometric shape. The computer decodes, based on the determined orientation of the geometric shape, data encoded within the geometric shape. The computer accesses, via a network, a resource that corresponds to the decoded data. The computer presents, at a display device, a graphical output corresponding to the accessed resource.
US09911072B2 Two-dimensional code, and two-dimensional-code analysis system
In this rectangular two-dimensional code, data expressed in binary code is divided into cells, and arranged as a two-dimensional matrix-like pattern. The two-dimensional code is characterized by being provided with a rectangular basic pattern section. The two-dimensional code is further characterized in that: the basic pattern section includes a plurality of position detection patterns for specifying cell positions, and version information indicating the size of the two-dimensional code; and the version information is used to enable the size of the two-dimensional code to be variably designed while the distances between the plurality of position detection patterns are in a fixed state.
US09911071B2 Method and system for controlling packaging of items on a production/distribution line
The disclosed method, and corresponding system, for controlling items on a production/distribution line relies on secure identification of items transported arranged in a given disposition along a transport path at a site of collection and packaging of the items, and association of ID data of some of the packed items with corresponding packaging ID data so as to ensure reliable identification of package content delivered on the line.
US09911070B2 Improving product packing operation efficiency
An information processing apparatus prints, when a first product is read by a reading apparatus, a first work instruction sheet including information about all products to be delivered to a first destination of the read first product, prints, if all products to be delivered to the first destination are read by the reading apparatus, a first shipping label for delivery to the first destination, determines, if a second product to be delivered to a second destination different from the first destination is read by the reading apparatus, whether any other product is to be delivered to the second destination, and prints, if it is determined that there no other product is to be delivered to the second destination, a second shipping label for delivery to the second destination.
US09911066B2 Classification system for similar objects from digital images
Aspects of the present disclosure may include a method of classifying an object that includes, receiving a set of images of an indication of an object, extracting data from the images, performing a comparison of the extracted image data to a set of comparison data associated with a set of comparative objects, determining a classification of the object based on the comparison and outputting data representative of the classification. The method may classify an object by an individual identity or by one or more group characteristics.
US09911063B1 Identifying images using pre-loaded image identifiers
In one example, a method includes sending, from a mobile device and to a remote server, a message indicating a first captured image corresponds to a first sample image in response to determining that the degree of similarity between the first captured image and the first sample image is within a first similarity interval. The method includes sending, to the remote server, a message representing at least part of a second captured image in response to determining that the degree of similarity between the second captured image and a second sample image is within a second similarity interval. The method also includes refraining from sending a message associated with a third captured image to the server in response to determining that the degree of similarity between the third captured image and a third sample image is within the first or second similarity intervals.
US09911062B1 Background phase correction for quantitative cardiovascular MRI
Systems and methods of correcting eddy current-induced background phase (EC-BP) in magnetic resonance imaging (PC-MRI) data. The method includes acquiring a slice of interest (SOI) at a first table position using a magnetic resonance imaging (MRI) scanner, the slice of interest having a predetermined imaging orientation and being acquired having predetermined gradient waveforms; acquiring at least one additional slice at a second table position using the MRI scanner, the at least one additional slice having a same imaging orientation as the slice of interest and being acquired using the same gradient waveforms as the slice of interest; determining time-averaged phase maps from the slice of interest and the at least one additional slice; determining a correction map from the time-averaged phase maps; and correcting a background phase (BP) of the slice of interest using the correction map.
US09911061B2 Fast histogram-based object tracking
Systems, methods, and computer readable media to rapidly identify and track an arbitrary sized object through a temporal sequence of frames is described. The object being tracked may initially be identified via a specified or otherwise known region-of-interest (ROI). A portion of that ROI can be used to generate an initial or reference histogram and luminosity measure, metrics that may be used to identify the ROI in a subsequent frame. For a frame subsequent to the initial or reference frame, a series of putative ROIs (each having its own location and size) may be identified and the “best” of the identified ROIs selected. As used here, the term “best” simply means that the more similar two frames' histograms and luminosity measures are, the better one is with respect to the other.
US09911060B2 Image processing apparatus, image processing method, and storage medium for reducing color noise in an image
Color noise is reduced while suppressing the occurrence of color blurring in the vicinity of an edge. An image processing apparatus including: a first determination unit configured to determine whether or not a first area consisting of a plurality of pixels including a pixel of interest is an area in a uniform color for the pixel of interest in input image data; a second determination unit configured to determine whether or not a second area, different from the first area, consisting of a plurality of pixels including the pixel of interest is an area in a uniform color; a setting unit configured to set a reference area consisting of the pixel of interest and adjacent pixels of the pixel of interest for the pixel of interest; and a first correction unit configured to correct the pixel value of the pixel of interest to a value for which noise has been reduced based on the pixel value of the pixel included in the reference area.
US09911058B2 Method, system and apparatus for updating a scene model
A method of updating a scene model for a foreground segmentation of an input image captured from a camera, is disclosed. One or more visual elements of the input image are determined. A spatial relationship between at least one of the visual elements and the scene model for a foreground segmentation of the input image is determined. The method updates the scene model for determining the foreground segmentation of the input image based on the determined spatial relationship.
US09911049B2 Lane boundary line recognition apparatus
A lane boundary line recognition apparatus acquires an image. Based on edge points extracted from the image, a lane boundary line candidate is extracted, and a lane boundary line probability thereof is calculated. A lane boundary line candidate of which the lane boundary line probability exceeds a threshold is recognized. As the threshold, a first threshold, larger than a second threshold in normal mode, is set when a first condition is met and also a second condition is met. The first condition is that a single lane boundary line is recognized on a roadside side of a lane in which the own vehicle is traveling, and a composite lane boundary line is recognized on a side opposite the roadside side. The second condition is that a state in which a lane boundary line cannot be recognized on at least the opposite side continues for a predetermined amount of time.
US09911046B1 Method and apparatus for computer vision analysis of spin rate of marked projectiles
Methods and systems for determining a spin rate of a projectile are provided. A receiving module receives a video of a launch of a projectile in which the projectile having at least one marking disposed thereon. A segmenting module segments a plurality of shapes of the projectile from the video. The segmenting module includes a sensitivity module configured to increase a sensitivity of the video to find the projectile in the video. An extraction module extracts at least one column of pixels of the at least one marking from the shapes. A generating module generates a stripe pixel column history image from the at least one column of pixels. A calculating module calculates a spin rate of the projectile from the stripe pixel column history image.
US09911045B2 Event analysis and tagging system
A system that analyzes data from sensors and video cameras to generated synchronized event videos and to automatically select or generate tags for an event. Enables creating, transferring, obtaining, and storing concise event videos generally without non-event video. Events stored in the database identifies trends, correlations, models, and patterns in event data. Tags may represent for example activity types, players, performance levels, or scoring results. The system may analyze social media postings to confirm or augment event tags. Users may filter and analyze saved events based on the assigned tags. The system may create highlight and fail reels filtered by metrics and by tags.
US09911043B2 Anomalous object interaction detection and reporting
Techniques are disclosed for analyzing a scene depicted in an input stream of video frames captured by a video camera. The techniques include evaluating sequence pairs representing segments of object trajectories. Assuming the objects interact, each of the sequences of the sequence pair may be mapped to a sequence cluster of an adaptive resonance theory (ART) network. A rareness value for the pair of sequence clusters may be determined based on learned joint probabilities of sequence cluster pairs. A statistical anomaly model, which may be specific to an interaction type or general to a plurality of interaction types, is used to determine an anomaly temperature, and alerts are issued based at least on the anomaly temperature. In addition, the ART network and the statistical anomaly model are updated based on the current interaction.
US09911041B2 Monitoring device, monitoring system and monitoring method
A monitoring device monitors facility elements in a building. Self-localization of the monitoring device is estimated by collating measured three-dimensional shapes with a map for localization including the shapes and positions of structural objects inside a building excluding the shapes and positions of facility elements. The monitoring device extracts the shape and position of a facility element candidate from the measured three-dimensional shapes; and calculates a similarity between the shape and position of each of the facility elements in the periphery of the self-localization extracted from the facility element collation map. The monitoring device identifies which of the facility elements in the periphery of the self-localization extracted from the facility element collation map is the facility element candidate extracted from the measured three-dimensional shape on the basis of the calculated similarity.
US09911034B2 Methods and systems that use hierarchically organized data structure containing standard feature symbols in order to convert document images to electronic documents
The current application is directed to methods and systems that convert document images, which contain Arabic text and text in other languages in which symbols are joined together to produce continuous words and portions of words, into corresponding electronic documents. In one implementation, a document-image-processing method and system to which the current application is directed employs numerous techniques and features that render efficiently computable an otherwise intractable or impractical document-image-to-electronic-document conversion. These techniques and features include transformation of text-image morphemes and words into feature symbols with associated parameters, efficiently identifying similar morphemes and words in an electronic store of standard-feature-symbol-encoded morphemes and words, and identifying candidate inter-character division points and corresponding traversal paths using the similar morphemes and words identified in the word store.
US09911033B1 Semi-supervised price tag detection
A method comprising: training a price tag detector, comprising a gross feature detector and a classifier, to automatically detect a price tag in an image, by: a) training the gross feature detector using supervised learning with labeled images, and b) training the classifier using a two-phase hybrid learning process comprising: c) applying an initial supervised learning using the labeled images, yielding a semi-trained version of the classifier, and d) applying a subsequent unsupervised learning using unlabeled images, yielding a fully trained version of the classifier, wherein applying the unsupervised learning comprises: for each unlabeled image: i) detecting multiple price tag hypotheses using the gross feature detector, ii) classifying each price tag hypothesis using the semi-trained classifier, ii) rating each classification based contextual data extracted from the unlabeled image, iv) retraining the semi-trained classifier with the rated classifications, and repeating steps ii) through iv) until the reclassification converges.
US09911031B2 Obtaining metrics for a position using frames classified by an associative memory
A method for identifying a motion of interest of an individual. The method includes receiving input data from a non-invasive motion sensor measuring movements of a person. The method also includes collecting motion sensor data for an interval of time. The illustrative embodiments also provide for analyzing the motion sensor input data using an analysis application having a set of classified pre-determined motions. The analysis application classifies a movement captured during the interval of time as a motion corresponding to particular a pre-determined motion among a plurality of pre-determined motions. Classification is performed based on shared relative values among the motion sensor input data and the particular pre-determined motion. The illustrative embodiments also provide for generating an output that provides a translation of the movement for identification of a predetermined motion of interest that represents an undesirable ergonomic aspect.
US09911026B2 Fingerprint sensor with force sensor
The present invention generally relates to a method for authenticating a user of an electronic device comprising a fingerprint sensor and a force sensor, the method comprising: retrieving a stored plurality of fingerprint enrollment templates comprising an enrollment representation of at least part of a user's finger and a corresponding enrollment force parameter, acquiring a first verification image of an object and determining a first verification representation, determining a first verification force parameter, performing a fingerprint authentication procedure based on the first verification template and the plurality of fingerprint enrollment templates, wherein when the first verification representation and the first verification force parameter comprised in the first verification template matches each of the enrollment representation and the enrollment force parameter comprised in the same fingerprint enrollment template providing a signal indicating successful authentication of the user. The invention also relates to a fingerprint sensing system and an electronic device.
US09911020B1 Method and apparatus for tracking via a radio frequency identification device
Aspects of the subject disclosure may include, for example, a device, including a radio frequency interface configured to receive, from a radio frequency identification device, a first wireless signal of a first carrier frequency that indicates a personal identifier. A transceiver can be configured to generate a transmission signal of second carrier frequency that indicates the personal identifier and location information associated with the device and to transmit electromagnetic waves in response to the transmission signal at a first physical interface of a transmission medium that propagate without requiring an electrical return path. The electromagnetic waves are guided by the transmission medium and are received by a receiving device at a second physical interface of the transmission medium, and the transmission signal can be extracted from the electromagnetic waves by the receiving device. Other embodiments are disclosed.
US09911019B2 Medical device identification system
Instrumentation and methods of use are provided for a medical device identification system. The application describes embodiments of a system including a medical device, and an identification tag having an RFID chip and an electrical circuit. The system defines a first configuration in which a first attachment region of the electrical circuit is in electrical communication with a second attachment region of the electrical circuit, and a second configuration in which the first attachment region is electrically isolated from the second attachment region. When the system is in the first configuration the RFID chip is in a first state, and when the system is in the second configuration the RFID chip is in a second state different than the first state.
US09911017B2 Integrated RFID antenna fabrication method and apparatus for transponder assembly
This invention presents an improved RFID method, system or apparatus which includes integrating one or more RFID elements or devices in an object, placing one or more RFID elements or devices on an object, and providing a smart placer which determines and places the RFID in the most efficient location in respect to interference, attenuation or frequency shifts that may exist, to improve the performance or efficiency of the RFID transponder and reader system ability.
US09911009B2 Device and method for providing safety of data by using multiple modes in device
A device and method for providing the security of data by using multiple modes in the device are provided. The device includes a storage unit that includes a normal mode data area and a security mode data area which is isolated from the normal mode data area and access to which is allowed only in a security mode; and a controller that processes data in the normal mode data area during a normal mode, and processes data in the security mode data area during the security mode.
US09911006B2 Securing data gathering devices of a personal computing device while performing sensitive data gathering activities to prevent the misappropriation of personal user data gathered therewith
A functional library can secure data gathering devices of a personal computing device on behalf of a secure application program to provide a more secure computing session during which sensitive data gathering activities are performed using any of those data gathering devices. The functional library, when incorporated within a personal computing device, creates a secure personal computing device on which to execute application programs such as mobile banking applications. The secure functional library acquires exclusive access to one or more of a predetermined plurality of the data gathering devices on behalf of a calling secure software application. Exclusive access is achieved by gaining access to each of the predetermined set and then locking that access throughout either the entire computing session, or at least until the execution of sensitive data gathering activities being performed during that computing session have been completed. The data gathering devices to be included in the predetermined set can be those that are deemed particularly vulnerable to exploitation in view of the types of sensitive data gathering activities to be conducted, or simply all of them for maximum security. The predetermined set can be defined and set for a particular application, or they can be defined more generally within the context of specific sensitive tasks or activities to be conducted.
US09911005B2 Protecting search privacy using policy-based search terms
A processor-implemented method for policy-based search privacy is provided, including a search privacy module and one or more privacy policy configurations. The privacy policy configurations include at least one semantic domain, at least one semantic scope, at least one semantic domain database, and at least one lexical database. A web search is intercepted. The search terms in the web search are compared to the semantic domain in the privacy policy configuration. If a match is found, a query is submitted to the semantic domain database to retrieve keywords within a number of levels of the semantic domain, as specified by the semantic scope. The search privacy module generates web searches that are semantically similar to the desired web search, using the retrieved keywords. These generated web searches are submitted to the search engine along with the desired web search.
US09911002B2 Method of modifying image including photographing restricted element, and device and system for performing the method
Provided is a user device including: a storage configured to store data; and a controller configured to recognize a person included in an image captured by the user device or received by the user device from an external source, and change a part of the image corresponding to the recognized person to be unrecognizable in response to a degree of closeness between the recognized person and a user of the user device being lower than a predetermined level based on the data stored in the storage.
US09911000B2 Implementing extent granularity authorization processing in CAPI adapters
A method, system and computer program product are provided for implementing block extent granularity authorization processing for a Coherent Accelerator Processor Interface (CAPI) adapter. An Application Client requests authorization to a File from a system processor file system. The file system validates the request, determines the location of each Extent that comprises the File, and requests authorization to each Extent from a System CAPI Authorization manager. The System CAPI Authorization manager requests the CAPI Client manager to assign a Child Client ID and CAPI Server Register range to the requesting Application Client and requests a previously authorized CAPI Parent Client to authorize the Child ID to the list of Extents. The CAPI Parent Client sends a Create Authorizations command to the CAPI Adapter via the Parent's CAPI Server Registers. The CAPI Adapter validates the Parent Authorization Handle and CPI Server Register range for the specific Extent/Command/Resource, and creates an Authorization List by assigning a new Child Authorization Handle for each requested, validated Extent/Command/Resource. The Authorization List and the Child Client ID are returned to the File System.
US09910995B2 System and method for secure file transmission
Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for file transmission. In one aspect, a system includes at least one machine control system, having access to a first data storage; at least one service computer, having access to a second data storage; and a central computer having at least one virtual machine. The machine control system is connectable to the virtual machine via a first communication connection in a manner that files between the first data storage and a data storage, to which the virtual machine has access, are transmissible. The service computer is connectable to the virtual machine via a second communication connection, in a manner that the virtual machine can access the second data storage and can store there files of a transmission via the first communication connection or can read files for a transmission via the first communication connection.
US09910992B2 Presentation of user interface elements based on rules
Example embodiments disclosed herein relate to present part of a web application with one or more user interface elements of the part highlighted based on updated rules. A web application is loaded in a browser layout engine. User actions are simulated on user interface elements of the web application to update the rules. The part of the web application is presented with one or more user interface elements highlighted.
US09910991B2 Event-based apparatus and method for securing bios in a trusted computing system during execution
An apparatus is provided for protecting a basic input/output system (BIOS) in a computing system. The apparatus includes a BIOS read only memory (ROM), an event detector, and a tamper detector. The BIOS ROM has BIOS contents that are stored as plaintext, and an encrypted message digest, where the encrypted message digest comprises an encrypted version of a first message digest that corresponds to the BIOS contents, and where and the encrypted version is generated via a symmetric key algorithm and a key. The event detector is configured to generate a BIOS check interrupt that interrupts normal operation of the computing system upon the occurrence of an event, where the event includes one or more occurrences of an operating system call. The tamper detector is operatively coupled to the BIOS ROM and is configured to access the BIOS contents and the encrypted message digest upon assertion of the BIOS check interrupt, and is configured to direct a microprocessor to generate a second message digest corresponding to the BIOS contents and a decrypted message digest corresponding to the encrypted message digest using the symmetric key algorithm and the key, and is configured to compare the second message digest with the decrypted message digest, and configured to preclude the operation of the microprocessor if the second message digest and the decrypted message digest are not equal. The microprocessor includes a dedicated crypto/hash unit disposed within execution logic, where the crypto/hash unit generates the second message digest and the decrypted message digest, and where the key is exclusively accessed by the crypto/hash unit. The microprocessor further has a random number generator disposed within the execution logic, where the random number generator generates a random number at completion of a current BIOS check, which is employed by the event detector to randomly set a number of occurrences of the event that are to occur before a following BIOS check.
US09910990B2 Security controlled multi-processor system
Embodiments of the present disclosure provide systems and methods for implementing a secure processing system having a first processor that is certified as a secure processor. The first processor only executes certified and/or secure code. An isolated second processor executes non-secure (e.g., non-certified) code within a sandbox. The boundaries of the sandbox are enforced (e.g., using a hardware boundary and/or encryption techniques) such that code executing within the sandbox cannot access secure elements of the secure processing system located outside the sandbox. The first processor manages the memory space and the applications that are permitted to run on the second processor.
US09910989B2 Malware removal method and system, and computer storage medium
A method, device, and a computer storage medium are provided. The method includes: starting a core file and building an environment after running an operation system, then loading a driver in the built environment; reading a configuration file by the driver to obtain a path of a malware; and deleting a registry and file of the malware in a kernel layer according to the path. The device includes: a start loading module configured to start a core file and build an environment after running an operation system, then load a driver in the built environment; a path reading module configured to calculate a configuration file by the driver to obtain a path of a malware; and a program deleting module configured to delete a registry and file of the malware in a kernel layer according to the path.
US09910988B1 Malware analysis in accordance with an analysis plan
Techniques for malware detection are described. Herein, a system, which detects malware in a received specimen, comprises a processor and a memory. Communicatively coupled to the processor, the memory comprises a controller that controls analysis of the specimen for malware in accordance with an analysis plan. The memory further comprises (a) a static analysis module that performs at least a first static analysis to identify a suspicious indicator of malware and at least partially determine that the specimen includes a packed object; (b) an emulation analysis module that emulates operations associated with processing of the specimen by a software application or library, including unpacking an object of the specimen when the specimen is determined by the static analysis module to include the packed object, and monitors one or more behaviors of the specimen during the emulated operations; and a classifier that determines whether the specimen should be classified as malicious.
US09910985B2 Apparatus and method for identifying similarity via dynamic decimation of token sequence N-grams
An apparatus for identifying related code variants or text samples includes processing circuitry configured to execute instructions for receiving query binary code, processing the query binary code to generate one or more query code fingerprints comprising compressed representations of respective functional components of the query binary code, generating token sequence n-grams of the fingerprints, hashing the n-grams, partitioning samples by length to compare selected samples based on length, and identifying similarity via dynamic decimation of token sequence n-grams.
US09910984B2 Methods and systems for on-device high-granularity classification of device behaviors using multi-label models
Various aspects include methods and computing devices implementing the methods for evaluating device behaviors in the computing devices. Aspect methods may include using a behavior-based machine learning technique to classify a device behavior as one of benign, suspicious, and non-benign. Aspect methods may include using one of a multi-label classification and a meta-classification technique to sub-classify the device behavior into one or more sub-categories. Aspect methods may include determining a relative importance of the device behavior based on the sub-classification, and determining whether to perform robust behavior-based operations based on the determined relative importance of the device behavior.
US09910983B2 Malware detection
A method of detecting suspicious code that has been injected into a process. The method includes identifying suspicious executable memory areas assigned to the process and, for each thread in the process, inspecting a stack associated with the thread to identify a potential return address; determining whether or not the potential return address is located within a suspicious memory area; and, if the potential return address is located within a suspicious memory area, determining whether or not the instruction at the address preceding the potential return address is a function call and, if yes, determining that the potential return address is a true return address and identifying the thread and associated code as suspicious.
US09910982B2 Large-scale, time-sensitive secure distributed control systems and methods
Large-scale, time-sensitive secure distributed control systems and methods are disclosed. According to an aspect, a method includes detecting an anomaly at a module among a plurality of modules in a network. The method also includes adjusting a reputation level of the module associated with the detected anomaly. Further, the method includes controlling interaction of the module associated with the detected anomaly within the network based on the adjusted reputation level.
US09910974B2 Method for controlling user access to an electronic device
A method and system for authenticating a user to access a computer system. The method comprises communicating security information to the computer system, and providing the computer system with an implicit input. The method further comprises determining whether the security information and implicit input match corresponding information associated with the user. The method further comprises granting the user access to the computer system in the event of a satisfactory match. When authenticating the user, the method and system consider the possibility of the user being legitimate but subject to duress or force by a computer hacker.
US09910973B2 Fingerprint gestures
User authentication for a user device can leverage one or more fingerprint sensor regions capable of detecting and/or recognizing a user's fingerprints. The user can define a fingerprint gesture or sequence of fingerprint gestures as a passcode, with access to a protected function being conditional on the user performing the defined fingerprint gesture or sequence of fingerprint gestures. Different fingerprint gestures or fingerprint gesture sequences can invoke or authorize different functions of the device. Fingerprint gestures from two or more users in the same location or in different locations can be used to unlock a protected function of a device.
US09910960B2 Methods and systems for providing the proximity of a process requirement metric to a system process requirement
Methods and systems are presented for indicating the proximity of a process requirement metric to a corresponding system process requirement in a physiological monitor. Metrics are determined based on a received physiological signal, such as a PPG signal. At least one of the metrics is compared to a corresponding system process requirement, such as a threshold, which can be used to trigger a system process, such as an alarm, a recalibration, or a measurement. The proximity of the metric to the corresponding system process requirement is calculated and indicated. Indicating the proximity to a system process requirement may provide valuable information to clinicians and allow them to manually trigger system processes, such as measurements or recalibrations, when a metric is close to a system process requirement for a significant period of time.
US09910959B2 Entry, storage and retrieval of medical information from a pharmacy
A system and method includes: a pharmacy server receiving a customer ID code to allow a customer wireless access to his medical data file stored on the server; the server receiving adherence confirmation data from the customer and storing the adherence confirmation data into the medical data file to confirm that the customer is taking a prescribed medicine according to directions; and the server receiving additional data from the customer and storing the additional data into the medical data file, whereby the customer is provided with wireless access to enter, edit and retrieve data to and from his medical data file.
US09910956B2 Sequencing using concatemers of copies of sense and antisense strands
Methods and systems for single molecule sequencing using concatemers of copies of sense and antisense strands. Concatemers are provided, for example, by carrying out rolling circle amplification on a circular molecule having sense and antisense regions to produce repeated copies of the sense and antisense regions connected by linking regions. The circular molecules can be produced by ligating hairpin adapters to each end of a double-stranded nucleic acid having a sense and antisense strand. The ligations can be carried out, for example using blunt end ligation. In some cases, a single molecule consensus sequence for a single template molecule is obtained. A single read from each template molecule can be obtained by comparing the sequence information of the sense and antisense regions.
US09910955B2 Methods for genome assembly and haplotype phasing
The disclosure provides methods to assemble genomes of eukaryotic or prokaryotic organisms. The disclosure further provides methods for haplotype phasing and meta-genomics assemblies.
US09910952B2 Hierarchically aware interior pinning for large synthesis blocks
A system and a computer implemented method for interior pinning in a macro block of an integrated circuit are provided. The method includes receiving child level information of the macro block including at least a location of a logic leaflet, receiving parent level information including at least edge direction information for pin connection and routing resource values of each slot of the macro block at each metal layer, and selecting a pin location based on the child level information and the parent level information.
US09910951B2 Mitigating wire capacitance in an integrated circuit
Systems, methods, and other embodiments associated with mitigating wire capacitance are described. In one embodiment, a method includes loading, by at least a processor into an electronic memory, an electronic data structure that includes a design of an integrated circuit. The design defines layers of the integrated circuit and connections between structures and wire interconnects in the layers. The example method may also include generating, by at least the processor, a structured topology in the design by successively routing the wire interconnects throughout the layers according to coordinates of the structures in the design and weighted values associated with each of the structures to mitigate wire capacitance of the wire interconnects.
US09910950B2 Methods for cell phasing and placement in dynamic array architecture and implementation of the same
A semiconductor chip is defined to include a logic block area having a first chip level in which layout features are placed according to a first virtual grate, and a second chip level in which layout features are placed according to a second virtual grate. A rational spatial relationship exists between the first and second virtual grates. A number of cells are placed within the logic block area. Each of the number of cells is defined according to an appropriate one of a number of cell phases. The appropriate one of the number of cell phases causes layout features in the first and second chip levels of a given placed cell to be aligned with the first and second virtual grates as positioned within the given placed cell.
US09910949B2 Synthesis tuning system for VLSI design optimization
In one aspect, a method for tuning input parameters to a synthesis program is provided which includes the steps of: (a) selecting a subset of parameter settings for the synthesis program based on a tuning optimization cost function; (b) individually running synthesis jobs in parallel for each of the parameter settings in the subset; (c) analyzing results from a current iteration and prior iterations, if any, using the cost function; (d) using the results from the current iteration and the prior iterations, if any, to create combinations of the parameter settings; (e) running synthesis jobs in parallel for the combinations of the parameter settings in a next iteration; and (f) repeating the steps (c)-(e) for one or more additional iterations or until an exit criteria has been met.
US09910948B2 Layout of large block synthesis blocks in integrated circuits
Generating a layout of an integrated circuit chip area from a description of an integrated circuit (IC). The description includes a register-transfer-level (RTL) design. The RTL design is partitioned in large blocks for synthesis of large block synthesis (LBS) blocks. The description of the IC further includes a floorplan for the IC, wherein each LBS block to be synthesized is assigned to a respective rectilinear shape in the floorplan and the rectilinear shapes do not overlap each other.
US09910946B2 Overcurrent simulation method when nail penetrates secondary battery and recording medium storing the program
Disclosed is an overcurrent simulation method when a nail penetrates a secondary battery and a recording medium storing the program. The overcurrent simulation method according to the present disclosure constructs a safety device and a secondary battery equivalent circuit, and produces a nail penetration effect by changing a resistance value. In this instance, various current simulations may be obtained by changing a first metal sheet and a second metal sheet included in the safety device, and a resistance value limiting an overcurrent may be calculated.
US09910945B2 Methods, systems, and computer-readable media for reference impedance adaptation in electromagnetic simulation and modeling
Methods, systems, and computer-readable media for reference impedance adaptation are disclosed. The method may comprise a step of providing a network model of a circuit having at least one port, wherein the network model includes at least one network parameter, the network parameter being associated with the port and being defined based on a reference impedance of the port. The method may further comprise computing an input impedance of the port based on the network parameter. The method may also include defining a new reference impedance for the port based on the input impedance. Moreover, the method may include calculating a new network parameter of the network model based on the new reference impedance.
US09910942B2 Methods and systems for specifying metal necking failure criteria in finite element analysis
Methods and systems for specifying metal necking failure criteria in FEA are disclosed. FEA model contains many finite elements representing a structure, a loading condition and a metal necking failure criteria are received in a computer system. The loading condition includes a loading direction. The metal necking failure criteria includes critical strain and fracture strain values, the neck's width, and a profile of strain values between the critical strain value and the fracture strain value within the neck's width. At each solution cycle in the time-marching simulation of the structure, each finite element is check to determine whether it experiences a metal necking failure, which occurs when each finite element's strain obtained in that solution cycle is greater than an average strain value defined in a formula according to the critical strain and fracture strain values, the neck's width and the profile of the metal necking failure criteria.
US09910937B2 Method and device for generating data representing structure of room
A method of generating data representing a structure of a room on a device, the method including: outputting an audio signal at a first position in the room; acquiring a first reflection signal of the audio signal at the first position; outputting the audio signal at a second position in the room; acquiring a second reflection signal of the audio signal at the second position; estimating distance information about the room by using the acquired first and second reflection signals; acquiring at least one angle information about the room; and generating a floor plan illustrating the structure of the room using the estimated distance information and the acquired angle information.
US09910933B2 Optimized autocompletion of search field
A computer receives event information associated with a user. The computer determines one or more social media contacts associated with the event, wherein the social media contacts are further associated with the user. The computer determines one or more terms utilized by the determined one or more social media contacts. The computer detects an input by the user, wherein the input includes one or more characters. The computer determines one or more autocomplete suggestions based on the one or more terms utilized by the determined one or more social media contacts.
US09910931B2 Suggestive input systems, methods and applications for data rule creation
The present application describes a method for improving user experience with filtering information. A free text entry is received on a user interface of a computer. A navigation key entry is also received on the user interface. Next, it is determined whether the free text entry fulfills criteria for a field input. Further, information is filtered based upon the fulfilled field criteria and the received navigation key entry. The application also is directed to a system for improving user experience on an electronic device.
US09910926B2 Managing searches for information associated with a message
A method for managing information about a product. A processor searches documents for a location of a message of the product using a set of rules that are based on instructions for generating the message. The instructions are in a resource of the product. The processor then adds the location to an index of locations of the message in the documents.
US09910924B2 Disambiguation of online social mentions
The technology disclosed relates to identifying entity reflections that refer to a same real-world entity. In particular, it relates to using statistical functions to make probabilistic deductions about entity attributes, which are used to construct optimal combinations of entity attributes. These optimal combinations of entity attributes are further used to generate search queries that return more precise search results with greater recall.
US09910923B2 Context-based queryless presentation of recommendations
Techniques for context-based queryless presentation of items are described. Without receiving an explicit query, an inferred query is determined based on a first set of context signals associated with a triggering event. Items matching the inferred query are selected based on a second set of one or more context signals associated with the triggering event. One or more results items identifying the one or more matching items are caused to display. Result items may be displayed in association with an explanation that identifies context values used to select an item or one or more attributes of the item that are relevant to a user or the inferred query.
US09910921B2 Keyword refinement in temporally evolving online media
Methods and arrangements for keyword refinement and enhancement. There is received an initial keyword list comprising one or more keywords. Information is harvested from one or more information feeds, and an item is ascertained from the harvested information. One or more keywords from the initial keyword list are associated with the item. One or more new keywords are developed based on the associating of one or more keywords from the initial keyword list with the item. Other variants and embodiments are broadly contemplated herein.
US09910919B2 Content processing device and method for transmitting segment of variable size, and computer-readable recording medium
A content processing device is provided. The content processing device includes a receiver configured to receive a content, an audio processor configured to extract an audio signal by decoding audio data included in the content, a processor configured to determine a characteristic section in the audio signal based on a ratio of music information of the audio signal, and detect a segment corresponding to the characteristic section in the audio signal; and a communicator configured to transmit the segment to a music recognition server, and a size of the segment is determined variably within a threshold range.
US09910914B1 Information retrieval based on semantics
Among other things, an information retrieval process that optimizes the retrieval of highly relevant information across dissimilar documents; information retrieval is based on information understanding, using contextual word disambiguation and sentence parsing to determine well-formed sentences, storing information according to syntactical structures; the information retrieval process finds the target of the search in the subject, subject complement, or direct object and returns maximally informative factual sentences; this search method alters the traditional user experience by presenting facts about the search topic with a link to the source document sentence, rather than presenting brief snippets of text containing the search string.
US09910912B2 Readability awareness in natural language processing systems
Electronic natural language processing in a natural language processing (NLP) system, such as a Question-Answering (QA) system. A receives electronic text input, in question form, and determines a readability level indicator in the question. The readability level indicator includes at least a grammatical error, a slang term, and a misspelling type. The computer determines a readability level for the electronic text input based on the readability level indicator, and retrieves candidate answers based on the readability level.
US09910908B2 Atomical moving data elements between or within linked data structures
A data element of a linked data structure is atomically moved without delaying lockless readers. A status-indicating entity is allocated, associated with the data element, and indicates validity of the data element with respect to the first linked data structure. A copy element, or a pointer thereto, is created from the data element. The status-indicating entity is associated with the copy element and indicates no validity of the copy element with respect to a second linked data structure. The copy element is linked to the second linked data structure. The status-indicating entity is atomically updated to indicate no validity of the data element with respect to the first linked data structure and validity of the copy element with respect to the second linked data structure. The data element is deleted and the status-indicating entity is disassociated from the copy element. Both structures may be deallocated in a deferred reader-friendly manner.
US09910907B2 Atomically moving data elements between or within linked data structures
A data element of a linked data structure is atomically moved without delaying lockless readers. A status-indicating entity is allocated, associated with the data element, and indicates validity of the data element with respect to the first linked data structure. A copy element, or a pointer thereto, is created from the data element. The status-indicating entity is associated with the copy element and indicates no validity of the copy element with respect to a second linked data structure. The copy element is linked to the second linked data structure. The status-indicating entity is atomically updated to indicate no validity of the data element with respect to the first linked data structure and validity of the copy element with respect to the second linked data structure. The data element is deleted and the status-indicating entity is disassociated from the copy element. Both structures may be deallocated in a deferred reader-friendly manner.
US09910905B2 System and method for assessing data accuracy
Data from a plurality of data sources is provided to a multi-source data management system, which stores the data and provides it to a data accuracy system for purposes of assessing the accuracy of data records and the individual fields within data records. Data accuracy scores may be stored at the data management system with the data records to which they pertain. Accuracy scores may be periodically recalculated and monitored, and alerts provided if an accuracy score changes a predetermined amount over a given period of time. Also, data records may be provided by a data user for accuracy assessment, using other data records stored at the multi-sourced data management system.
US09910904B2 Replication of data objects from a source server to a target server
Data objects are replicated from a source storage managed by a source server to a target storage managed by a target server. A source list is built of objects at the source server to replicate to the target server. The target server is queried to obtain a target list of objects at the target server. A replication list is built indicating objects on the source list not included on the target list to transfer to the target server. For each object in the replication list, data for the object not already at the target storage is sent to the target server and metadata on the object is sent to the target server to cause the target server to include the metadata in an entry for the object in a target server replication database. An entry for the object is added to a source server replication database.
US09910898B2 Smart exploration methods for mitigating item cold-start problem in collaborative filtering recommendation systems
Systems and methods for building a latent item vector and item bias for a new item in a collaborative filtering system are disclosed. The method includes dividing incoming users into intervals with each interval having a learning phase and a selection phase. The learning phase scores each incoming user according to a best estimate latent vector and bias and saves the highest score. In the selection each incoming user is scored and a user exceeding the highest score is selected. The best estimate latent vector and bias is then updated based on the user's vector and bias, and the user's interaction with the item. The updated best estimate latent vector is then used in further intervals for learning and selecting users.
US09910894B2 Data scope origination within aggregation operations
A computer-implemented method for generating a report from a report definition specifying a plurality of data scopes for a dataset includes interpreting, with a processor, a report definition for the report, the report definition comprising a calculation expression for populating a unit of the report, the calculation expression comprising a data aggregation operation, the data aggregation operation comprising an originating reference to a further data scope, accessing a memory coupled to the processor to obtain data from the dataset for respective subsets of the dataset corresponding with the further data scope, determining, with the processor, an output value for the calculation expression in accordance with the obtained data and the data aggregation operation, and rendering the report based on the output value.
US09910893B2 Failover and resume when using ordered sequences in a multi-instance database environment
An approach is disclosed for implementing failover and resume when using ordered sequences in a multi-instance database environment. The approach commences by instantiating a first database instance initially to serve as an active instance, then instantiating a second database instance to serve as an instance of one or more passive instances. The active database establishes mastership over a sequence and then processes requests for the ‘next’ symbol by accessing a shared sequence cache only after accessing a first instance semaphore. The active instance and the passive instance perform a protocol such that upon passive database detection of a failure of the active database, one of the passive database instances takes over mastership of the sequence cache, and then proceeds to satisfy sequence value requests. The particular order is observed in spite of the failure.
US09910892B2 Managing execution of database queries
One embodiment is a method to manage queries in a database. The method identifies a query that executes on the database for an elapsed time that is greater than a threshold and then implements a remedial action when the query executes on the database for an execution time that is greater than an estimated execution time.
US09910891B2 Deferring data record changes using query rewriting
Staging data record changes from a faster storage medium to a slower storage medium using data query rewriting is provided. In response to receiving a data query corresponding to a particular data record, it is determined whether the data query is one of a transactional data query or an analytical data query. In response to determining that the data query is a transactional data query, the transactional data query is rewritten to apply transactional delta changes to the particular data record on a storage-class memory of a computer. In response to determining that the data query is an analytical data query, the analytical data query is rewritten to select and reconcile each data record corresponding to the particular data record stored on the storage-class memory with the particular data record stored on a persistent data storage device of the computer.
US09910890B2 Synthetic events to chain queries against structured data
An approach is provided in which a knowledge manager analyzes parent/child hierarchies between semi-structured items included in a semi-structured resource. The knowledge manager generates synthetic events based upon the parent/child hierarchy analysis and creates a structured resource utilizing the synthetic events. In one embodiment, the structured resource includes structured resource entries, which include a first semi-structured item, a second semi-structured item, and one of the synthetic events. In turn, the knowledge manager queries the structured resource based upon a question received from a user interface.
US09910889B2 Rapid searching and matching of data to a dynamic set of signatures facilitating parallel processing and hardware acceleration
A mechanism is provided in a data processing system for matching data to a dynamic set of signatures. The mechanism creates a state transition, result, and mask (STR&M) table based on a set of signatures. The mechanism executes scanner code in each of a plurality of hardware devices in parallel to form a plurality of matching engines. The mechanism loads the STR&M table into each of the plurality of matching engines. Responsive to receiving a plurality of input records, the mechanism distributes input strings from the plurality of input records among the plurality of matching engines and receiving signature set match results from the plurality of matching engines.
US09910886B2 Visual representation of question quality
Aspects of the present disclosure, in certain embodiments, are directed toward providing a visual representation of question quality in a question answering system. More particularly, aspects are directed toward receiving, by a question answering system, an input question having a set of query attributes. The set of query attributes may be user-influenced characteristics of the input question. Aspects of the present disclosure are also directed toward evaluating, by comparing the set of query attributes to a set of assessment criteria, the quality of the input question. Aspects of the present disclosure are also directed toward assigning, in response to evaluating the quality of the input question, a set of quality values to the set of query attributes. Using the assigned set of quality values and the set of query attributes, an icon that indicates a visual representation of the quality of the input question may be generated.
US09910885B1 Automatic continued search
Methods and apparatus for providing travel-related information for a location to a user based on activity indications of the user that are related to the location. The location may be determined based on a set of one or more related activity indications and a travel-related score may be determined for the location that is indicative of likelihood that the user has interest in travelling to the location. The user may be provided the travel-related information for the location based on the travel-related score.
US09910884B2 Resuming items in their last-used presentation modes
Functionality is described herein for presenting representations of the z most recently presented items. The functionality also presents indicators which convey the presentation modes that were last used to present the z items. When the user selects one of the z items, the functionality presents it, as a default, using the last-used presentation mode, as conveyed by the indicator associated with this item. In one particular case, the last-used presentation mode corresponds to a full mode or a snap mode.
US09910881B1 Maintaining versions of control plane data for a network-based service control plane
A system may implement maintaining control plane data versions for a network-based service control plane. Various control plane actions may be performed which create new versions of control plane data that may be maintained for the control plane in a database. Some of these actions may be performed by multiple actors creating new versions of the same control plane data. For a particular control plane action, a new version number may be obtained to include in a new version of control plane data, and a conditional write request may be performed to insert the new version of control plane data at the database as part of an optimistic concurrency technique in order to maintain consistency for control plane data.
US09910878B2 Methods for processing within-distance queries
Techniques and systems for processing within-distance queries are provided. A query for geometry objects within a query distance of a query geometry is received. An in-memory R-tree (IMR-tree) is generated for the query geometry. The IMR-tree includes nodes corresponding to edges of the query geometry. An R-tree index for a plurality of candidate geometries is accessed. At least one node of the R-tree index is processed by: generating an expanded bounding geometry based on the query distance, and using the IMR-tree to determine a topological relationship between the expanded bounding geometry and the query geometry. When the expanded bounding geometry intersects the query geometry, if at least one within-distance test is satisfied, the candidate geometries associated with the selected node are added to a result set. Otherwise, if the selected node is a non-leaf node of the R-tree index, child nodes of the selected node are processed.
US09910876B2 Query handling in a columnar database
According to one embodiment of the present invention, a method for processing a query in a column database is provided. The method for analyzing test results may include a computer, associating a first set of metadata values with a set of records in a table, wherein each record has an associated state indicated by a metadata value. The method may further include the computer receiving a query to return one or more records of the set of records. The method may further include the computer determining that one or more records in the set of records satisfies the query. The method may further include the computer determining whether at least a first record in the one or more records that satisfies the query is in a returnable state based, at least in part, on the metadata value.
US09910867B2 Dynamic definitive image service
A representative image system is described herein that provides a representative image for any given search query. Upon receiving a search for a term (or terms), the system accesses an inverted index to identify images associated with that term. The system then receives a ranked list of images. The ranked list includes image identifiers, and once an item in the list is selected the system can use the associated image identifier to retrieve the image from a thumbnail or other server. If an editor has overridden the default image for the present search query, then the system returns the image identifier for the overridden image, which can be used to access the image from the thumbnail or other server. Thus, the representative image system provides a reliable and universal mechanism for retrieving representative images for any given topic dynamically in real time.
US09910865B2 Method for capturing the moment of the photo capture
A method for storing digital images is presented. The method includes capturing an image using a digital camera system. It also comprises capturing metadata associated with the image or a moment of capture of the image. Further, it comprises storing the metadata in at least one field within a file format, wherein the file format defines a structure for the image, and wherein the at least one field is located within an extensible segment of the file format. In one embodiment, the metadata is selected from a group that comprises audio data, GPS data, time data, related image information, heat sensor data, gyroscope data, annotated text, and annotated audio.
US09910864B2 Method for object recognition, corresponding system, apparatus and computer program product
Searches performed in a data base using image descriptors of query images are managed via a mobile communication device, such as a smartphone, a tablet, etc., by: extracting at the mobile device grayscale and color descriptors of query images, sending the grayscale descriptors as compressed grayscale descriptors of query images from the mobile device to a server for searching in the data base, receiving at the mobile device results of the search, using color descriptors of query images in disambiguating the results by: i) sending the color descriptors as compressed color descriptors of query images from the mobile device to the server and receiving at the mobile device disambiguated search results from the server, or ii) receiving at the mobile device non-disambiguated search results from the server and disambiguating the search results by means of the color descriptors extracted at the mobile device to produce disambiguated search results.
US09910862B2 System and method for processing location data
A novel system and method for processing location data are disclosed. An exemplary method includes receiving location data from a remote device, associating the location data with a particular subscriber, augmenting the location data in one of a plurality of predetermined ways based on information associated with the particular subscriber to produce augmented location data, and providing the augmented location data to the subscriber. In a more particular embodiment, the step of augmenting the location data includes retrieving a subscriber file associated with the subscriber and performing one or more augmentation processes on the location data based at least in part on the subscriber file. An example system includes both a remote device operative to transmit location data and a central station for performing the methods of the present invention.
US09910858B2 System and method for providing contextual analytics data
A system and method for providing contextual analytics data receives display entity data into a first virtual container, the display entity data including one or more instructions of the first virtual container. Instructions performing process operations are present within a second virtual container isolated from the first virtual container. The display entity data is analyzed to identify a webpage, for example, associated with the display entity data. If necessary, executable code is injected into the first virtual container in order to expose data of the first virtual container to the operations of the second virtual container so that further identification of the display entity may be made. A request is made by the second virtual container to one or more computing systems to provide available analytics data pertaining to the display entity data, after which the available analytics data is displayed for a user.
US09910851B2 On-line voice translation method and device
Disclosed are on-line voice translation method and device. The method comprises: conducting voice recognition on first voice information input by a first user, so as to obtain first recognition information; prompting the first user to confirm the first recognition information; translating the confirmed first recognition information to obtain and output first translation information; extracting, according to second information which is fed back by a second user, associated information corresponding to the second information; and correcting the first translation information according to the associated information and outputting the corrected translation information. By means of the on-line voice translation method and device, smooth communication can be ensured in cross-language exchanges.
US09910849B2 System and method for mixed-language support for applications
A system and method for providing multilingual support to users communicating in an computing environment. The system and method may receive communications from a user in a first language. The system and method may store the communication in the first language. If the first language does not match a standard language of the environment, the system and method may translate the communication to the standard language and store the translation. If the system and method receives a subsequent request to access the stored user communication, the system and method may determine whether a language associated with the request matches the standard language or the first language. If there is a match, the system and method may return the stored original user communication or the stored standard language version of the user communication. If the access request language does not match either language, the system and method may translate the user communication to the request's language. The system and method may perform all translations directly from the stored original user communication, rather than from a previous translation, to reduce cumulative translation inaccuracies.
US09910848B2 Generating semantic variants of natural language expressions using type-specific templates
A mechanism is provided in a data processing system having a processor and a memory storing instructions for implementing a natural language processing engine, a store of semantic types, and a store of units, conversions among units, and variants of unit names, for generating semantically equivalent variants of a natural language term. The mechanism receives an input term for variant analysis. The natural language processing engine executing on the data processing system identifies a semantic type of the input term based on the store of semantic types. The natural language processing engine extracts a quantity and a unit from the input term based on the store of units, conversions among units, and variants of unit names. The natural language processing engine populates type-specific templates at a level of specificity based on the input term based on the identified semantic type of the input term and the extracted quantity and unit to form a set of semantically equivalent variants of the input term. The natural language processing engine performs a natural language processing operation using the input term and the set of semantically equivalent variants of the input term.
US09910846B2 Conversion device and conversion method
A conversion device includes an input unit configured to input position information of a user's line of sight on a screen; an acquiring unit configured to acquire, a character string included in a predetermined range from a position indicated by the position information, among character strings displayed on the screen; and a display control unit configured to display a list of character strings corresponding to readings including an input character as conversion candidates of the input character, among stored character strings, the list being displayed in response to the input character being input by the user. The display control unit increases a priority in a display order in the list for a character string that matches any of the acquired character strings, such that the priority is higher than that of a case where the character string does not match any of the character strings acquired by the acquiring unit.
US09910841B2 Annotation data generation and overlay for enhancing readability on electronic book image stream service
Provided are techniques for receiving a scanned image corresponding to a page; analyzing the scanned image to identify a set of characters (Ci) and corresponding positions (Pi) of each character of Ci on the page; applying natural language processing (NPL) and an analytic analysis algorithm to determine a semantic analysis relationship of phrases formed by Ci to determine meanings for the phrases; generating a plurality of annotations (Ai) indicating the determined meanings of the phrases, wherein each annotation is assigned a corresponding position (Qi) on the page based upon the Pi of the corresponding characters on the page; and storing, in a non-transitory computer-readable medium, the scanned image in conjunction with the plurality of annotations and the corresponding Qi.
US09910840B2 Annotating notes from passive recording with categories
Systems and methods, and computer-readable media bearing instructions for carrying out methods of capturing notes from passive recording of an ongoing content stream and annotating the note with a category are presented. Passive recording comprises temporarily recording the most recent content of the ongoing content stream. An ongoing content stream is passively recorded in a passive recording buffer. The passive recording buffer is configured to store a limited amount of recorded content corresponding to the most recently recorded content of the ongoing content stream. Upon indication by the user, a note is generated from the recorded content in the passive recording, annotated with a category, and stored in a note file for the user.
US09910839B1 Device and method for image search using one or more selected words
A user terminal device is provided that includes a display part configured to display a document preparation window, an input part configured to receive a selection command for selecting a text in a document displayed in the document preparation window, a communication part configured to connect to a server, and a controller configured to control displaying of an activated search button in a region of the document preparation window when the text is selected, and to search for, when the search button is selected, at least one image corresponding to the selected text using the communication part, wherein the controller is further configured to control displaying of images searched for from at least one of the server and a storage part of the user terminal device, and to, when one of the searched images is selected, insert the selected image at a predetermined position of the document preparation window.
US09910837B2 Controlling generation of change notifications in a collaborative authoring environment
Methods, systems and computer program products are disclosed for controlling generation of change notifications to the one or more users in a collaborative authoring environment.An automated mechanism is provided to detect the change performed in the artifact. The one or more users who performed changes in the past with the changed artifact are identified. One or more pre-defined parameters, such as contribution, ownership, recency, and longevity, may be used to compute relevancy of the changes made in the changed artifact to determine the qualifying one or more users to be notified. Notifications are generated and delivered to the one or more qualifying other users assessed on the one or more pre-defined parameters.
US09910836B2 Construction of phonetic representation of a string of characters
Provided are methods, devices, and computer-readable media for accessing a string of characters; parsing the string of characters into string of graphemes; determining one or more phonetic representations for one or more graphemes in the string of graphemes based on a first data structure; determining at least one grapheme representation for one or more of the one or more phonetic representations based on a second data structure; and constructing the phonetic representation of the string of characters based on the grapheme representation that was determined.
US09910832B2 Selecting user interface elements to display linked documents with a linking document
An electronic device and a method of displaying electronic documents linked with link objects therefor are provided. The method includes displaying a first electronic document having at least one link object on the screen of an electronic device, receiving an input signal for selecting a link object, determining the position on the screen at which a second electronic document linked with the selected link object is to be displayed, changing the layout of the first electronic document according to the determined position, and displaying the first electronic document and the second electronic document together on the screen according to the changed layout and the determined position.
US09910831B2 Display apparatus and method for providing font effect thereof
A display apparatus and a method for providing a font effect thereof are provided. The method includes obtaining character information and font information of a character; determining an attribute value of a font effect according to at least one of characteristics of the character and characteristics of the display apparatus; rendering the font effect based on the determined attribute value and applying the rendered font effect to the character; and outputting the character to which the font effect is applied.
US09910830B2 Edition grid layout
A system, computer-implemented method and computer-readable medium for displaying content are provided. In an embodiment, content for display within a tiled interface and a screen size for display of the tiled interface are determined. Grid segments of the tiled interface are determined based on the content and the screen size. The grid segments are grouped into tiles of the tiled interface based on a relative importance of the articles. The content is displayed on the tiled interface within the tiles of the tiled interface.
US09910829B2 Automatic document separation
A method and system for delineating document and/or subdocument boundaries and identifying document and/or subdocument types, the method comprising: automatically generating at least one identifier for identifying which of a plurality of document and/or subdocument images belongs to which of a plurality of categories. The method and/or system optionally may include automatically categorizing a plurality of document and/or subdocument images into a plurality of predetermined categories in accordance with classification rules for said categories.
US09910825B1 Secondary search based on user selection of a first search result
Various embodiments of the present invention relate to systems and methods used to search for information (e.g., from multiple sources). In one example (which example is intended to be illustrative and not restrictive), such systems and methods may select a subset of available relevant Internet information sources, such as suppliers and/or purchasers of goods, services, and/or commodities. In another example (which example is intended to be illustrative and not restrictive), a system and method are provided for determining when to launch an information search and for determining the set of information sources to search.
US09910818B2 Serdes interface architecture for multi-processor systems
A local device, such as a field-programmable gate array, has a local state machine and a local interface component for communicating with a remote device that implements a remote state machine. The local interface component receives a new set of incoming data from the remote device and determines whether the new set is good data or bad data. If good data, then the local interface component causes the new set of data to transmitted internally for use by the local state machine. If bad data, then the local interface component does not forward the new set of data to the local state machine, which instead continues to use a previously received set of good data. Although the clock rate of the local and remote state machines may differ from the frame rate of the local interface component, their operations are nevertheless synchronized.
US09910815B2 IO-Link adapter
An IO-Link adapter (200) for connecting a field device to a master unit having an IO-Link interface (210), a field device interface (220) and a circuit arrangement (230) for converting the field device interface data into IO-Link interface data is characterized in that the IO-Link adapter (200) has fastening elements (240) for detachably fastening to the field device, wherein by fastening the IO-Link adapter (200) to the field device, coupling of the field device interface (220) of the IO-Link adapter (200) to an interface of the field device (120) simultaneously takes place.
US09910804B2 Input/output method in virtual machine environments
A input/output method is disclosed for performing communications in a virtual machine (VM) environment between a host operating system (OS) and a guest OS. The input/output method includes performing request polling (RP) on an input/output event generated by a guest OS which is driven by a virtual machine (VM), sending an input/output request to a host OS, on which the VM runs. The input/output method further includes performing response waiting polling (RWP) on an input/output completion message generated by the host OS when the input/output event is detected through the RP, and sending an input/output response to the guest OS when the input/output completion message is detected through the RWP. In the method, the RP and the RWP are performed by multiple threads executed on the VM.
US09910796B2 Programmable event driven yield mechanism which may activate other threads
Method, apparatus, and program means for a programmable event driven yield mechanism that may activate other threads. In one embodiment, an apparatus includes execution resources to execute a plurality of instructions and a monitor to detect a condition indicating a low level of progress. The monitor can disrupt processing of a program by transferring to a handler in response to detecting the condition indicating a low level of progress. In another embodiment, thread switch logic may be coupled to a plurality of event monitors which monitor events within the multithreading execution logic. The thread switch logic switches threads based at least partially on a programmable condition of one or more of the performance monitors.
US09910791B1 Managing system-wide encryption keys for data storage systems
The techniques presented herein provide for initializing and upgrading data encryption capability in a data storage system. The data storage system in initialized to encrypt data writes using a system wide encryption key. A request is received to upgrade the encryption functionality in the data storage system. A data slice is identified for encryption, wherein the data slice is stored in a RAID group in the data storage system. The data slice is pinned in a first cache memory of a first storage processor and persisted in a second cache memory of a second storage processor. The data slice encrypted and a write operation is initiated to write the encrypted data slice back to the RAID group. If the write operation was successful, the data slice is unpinned the first and second cache memory associated with the data slice is freed, else if the write operation was unsuccessful, the data slice is unpinned and the first and second cache memory associated with the data slice are flushed.
US09910790B2 Using a memory address to form a tweak key to use to encrypt and decrypt data
Provided are a memory system, memory controller, and method for using a memory address to form a tweak key to use to encrypt and decrypt data. A base tweak co is generated as a function of an address of a block of data in the memory storage. For each sub-block of the block, performing: processing the base tweak to determine a sub-block tweak; combining the sub-block tweak with the sub-block to produce a modified sub-block; and performing an encryption operation comprising one of encryption or decryption on the modified sub-block to produce sub-block output comprising one of encrypted data and unencrypted data for the sub-block.
US09910786B2 Efficient redundant array of independent disks (RAID) write hole solutions
Disclosed are solutions for resolving a redundant array of independent disks (RAID) write hole, or a parity-based fault scenario that occurs when a power failure and a drive failure occur at or close to the same time. Drive array controller logic assigns a sequence number to write operations received from a computing system and converts respective write operations, including corresponding sequence numbers, to a multiple-drive write to a series of RAID drives. A microcontroller at each drive writes, to a history log (HLOG) on the drive, a logical-to-physical address mapping of a prior sector of the drive that was written along with a corresponding sequence number. Upon receipt of a new write to the mapped logical address, the microcontroller removes the HLOG entry for the logical address, and writes a new entry to the HLOG with a new physical address mapping to the logical address with a new sequence number.
US09910785B2 Cache memory budgeted by ways based on memory access type
A set associative cache memory, comprising: an array of storage elements arranged as N ways; an allocation unit that allocates the storage elements of the array in response to memory accesses that miss in the cache memory; wherein each of the memory accesses has an associated memory access type (MAT) of a plurality of predetermined MATs, wherein the MAT is received by the cache memory; a mapping that, for each MAT of the plurality of predetermined MATs, associates the MAT with a subset of one or more ways of the N ways; wherein for each memory access of the memory accesses, the allocation unit allocates into a way of the subset of one or more ways that the mapping associates with the MAT of the memory access; and wherein the mapping is dynamically updatable during operation of the cache memory.
US09910783B2 Implementing selective cache injection
A method, system and memory controller for implementing memory hierarchy placement decisions in a memory system including direct routing of arriving data into a main memory system and selective injection of the data or computed results into a processor cache in a computer system. A memory controller, or a processing element in a memory system, selectively drives placement of data into other levels of the memory hierarchy. The decision to inject into the hierarchy can be triggered by the arrival of data from an input output (IO) device, from computation, or from a directive of an in-memory processing element.
US09910779B2 Arithmetic processing apparatus and control method therefor
An arithmetic processing apparatus has OS arithmetic processing unit executing instruction of OS, general-purpose arithmetic processing units each executing an instruction other than OS, a shared cache unit including a shared cache memory, a cache control unit and a request selection circuit which selects a memory access request from the arithmetic processing units, and a data buffer temporarily storing data of the memory access request, and a memory access control unit controlling a memory access to a main memory. The shared cache unit has a memory access band control register to which either one or both of a first set value, which includes an entry criterion for the request selection circuit to enter the memory access request from OS arithmetic processing unit, and a second set value which sets a capacity of a storage area in the data buffer for storing the data are set.
US09910778B2 Operation processing apparatus and control method of operation processing apparatus
An operation processing apparatus includes: processor cores configured to perform an operation processing; cache memories each provided for the respective processor cores; and a controller configured to perform a coherency control between the cache memories, wherein, the controller, in the coherency control, in a case where one or more shared cache memories which share a target data block for a store request are present in the cache memories when the store request is received from a request cache memory included in the cache memories: controls one cache memory of the one or more shared cache memories such that the target data block is transferred to the request cache memory; receives an exclusive right acquisition response from another operation processing apparatus which manages a state of the target data block; and transmits the exclusive right acquisition response to the request cache memory.
US09910772B2 Flash memory apparatus and storage management method for flash memory
A flash memory storage management method includes: providing a flash memory module including single-level-cell (SLC) blocks and at least one multiple-level-cell block such as MLC block, TLC block, or QLC block; classifying data to be programmed into groups of data; respectively executing SLC programming and RAID-like error code encoding to generate corresponding parity check codes, to program the groups of data and corresponding parity check codes to the SLC blocks; when completing program of the SLC blocks, performing an internal copy to program the at least one multiple-level-cell block by sequentially reading and writing the groups of data and corresponding parity check codes from the SLC blocks to the multiple-level-cell block according to a storage order of the SLC blocks.
US09910769B2 Alignment based block concurrency for accessing memory
Embodiments relate to accessing data in a memory. A method for accessing data in a memory coupled to a processor is provided. The method receives a memory reference instruction for accessing data of a first size at an address in the memory. The method determines an alignment size of the address in the memory. The method accesses the data of the first size in one or more groups of data by accessing each group of data block concurrently. The groups of data have sizes that are multiples of the alignment size.
US09910763B1 Test case reduction in application binary interface (ABI) compatibility testing
A method and a system of test case reduction in application binary interface (ABI) compatibility testing are provided. The computer-implemented method includes generating test cases consisting of called functions with random numbers and types of arguments, validating that the arguments are correctly passed to the called functions, and, where it is found that arguments are not correctly passed, iteratively narrowing down the set of arguments required to find the minimal number and types of arguments to demonstrate an error in the ABI implementation.
US09910758B2 Computer flight recorder with active error detection
A method, apparatus and program product utilize a flight recorder having active error detection functionality to proactively detect errors in a computer or a sub-system or component thereof. The active error detection may be based on one or more trends detected in the trace data logged by the flight recorder and reflective of particular types of errors that may be present in a computer during operation, such that an error may be logged, and in some instances, an exception may be triggered.
US09910755B2 Retrieval of authoritative measurement data from in-memory datastores
A computing resource monitoring service receives a request to retrieve measurement data for a metric. The computing resource monitoring service determines, based at least in part on information included in the request, one or more in-memory datastores where the measurement data is stored. If the information indicates that the computing resource monitoring service is to provide an authoritative subset of the measurement data, the computing resource monitoring service limits the data provided in response to the request to the authoritative subset of the measurement data. Otherwise, if the information does not specify this indication, the computing resource monitoring service will provide the measurement data that is available.
US09910754B2 Duplexed control system and control method thereof
A duplexed control system comprises: two control devices, whereof one is set to operate as a reserve system and the other is set to operate as a regular system; a tracking bus that connects the two control devices to enable these to exchange tracking signals; and a control transmission channel that transmits computational information of these two control devices; wherein: the control devices respectively have: an own-system state evaluation section that transmits the result of state evaluation of its own system as a tracking signal through the tracking bus to the other system; an other-system signal confirmation section that receives the tracking signal through the tracking bus from the control device of the other system and thus performs state confirmation; and a transmission channel changeover section that, if the tracking signal cannot be received through the tracking bus, effects transmission of the tracking signal to the other-system signal confirmation section of the other system, through the control transmission channel.
US09910749B2 Non-volatile memory with dynamic repurpose of word line
A non-volatile memory system includes a plurality of non-volatile data memory cells arranged into groups of data memory cells, a plurality of select devices connected to the groups of data memory cells, a selection line connected to the select devices, a plurality of data word lines connected to the data memory cells, and one or more control circuits connected to the selection line and the data word lines. The one or more control circuits are configured to determine whether the select devices are corrupted. If the select devices are corrupted, then the one or more control circuits repurpose one of the word lines (e.g., the first data word line closet to the select devices) to be another selection line, thus operating the memory cells connected to the repurposed word line as select devices.
US09910745B1 Unified data layer backup system
A primary system is established at a first site. The primary system hosts an application and a primary database for remote users that use the application to manage data of the primary database. A unified data layer is established at a remote site. The unified data layer provides access to data of the primary database without providing access to the primary database. A triggering event that impairs the ability of the primary system to host the application is detected. A recovery system is instantiated in response to detecting the triggering event. The recovery system includes both a recovery instance of the application and a recovery database for the data of the application. The recovery database is populated using the unified data layer. The recovery system is activated such that remote users can access the recovery instance of the application to manage data of the recovery database.
US09910739B1 Inverse star replication
A method, system and computer program product for enabling a virtual service layer to consume a storage medium at a first site and map the storage medium as one or more virtual storage volumes, enabling the virtual service layer to present the one or more virtual storage volumes for consumption at the first site, enabling a splitter of the virtual service layer to intercept I/O written to the one or more virtual storage volumes, splitting intercepted I/O to a journal based replication appliance, enabling the virtual storage volumes to be accessible at a second site, wherein the one or more the virtual storage volume are mirrored at the second site by the virtual service layer; and replicating IO from either the first site or the second site to a third site.
US09910738B2 Data mining systems and methods for heterogeneous data sources
Systems and methods integrate disparate backup devices with a unified interface. In certain examples, a management console manages data from various backup devices, while retaining such data in its native format. The management console can display a hierarchical view of the client devices and/or their data and can further provide utilities for processing the various data formats. A data structure including fields for storing both metadata common to the client device data and value-added metadata can be used to mine or process the data of the disparate client devices. The unified single platform and interface reduces the need for multiple data management products and/or customized data utilities for each individual client device and provides a single pane of glass view into data management operations. Integrating the various types of storage formats and media allows a user to retain existing storage infrastructures and further facilitates scaling to meet long-term management needs.
US09910736B2 Virtual full backups
According to embodiments described herein, a backup server maintains backup data for a set of data, which includes data for a first block and a second block. Backup data for the first and second block include backup data for a plurality of versions of the first and second block. A distinct watermark is stored for each version of the first block and each version of the second block. In response to a request to perform a restoration operation on the set of data, a particular version of the first block and a particular version of the second block are selected to use in the restoration operation by comparing a restoration target with the watermarks of the version of the first block and second block. The selected version of the first block has a different watermark than the selected version of the second block.
US09910729B1 Restoring ECC syndrome in non-volatile memory devices
A method of restoring an ECC syndrome in a non-volatile memory device having memory cells arranged in a plurality of sectors within a memory cell array, the method comprising identifying a first sector including at least one page having a disabled ECC (error correction code) flag; reading the value of all data bits in said at least one page; calculating values for ECC bits in said at least one page; and writing said data bit values and said calculated ECC bit values to a second sector in the memory cell array.
US09910724B2 Fast and accurate identification of message-based API calls in application binaries
Disclosed are various embodiments for fast and accurate identification of message-based application programming interface (API) calls in applications. A set of compliance rules is obtained from a compliance rule store. A request to analyze an application is received. An application analysis is performed by scanning the application to identify one or more public APIs invoked by the application. The set of compliance rules are enforced on the application based at least in part on the application analysis.
US09910722B2 Generic callback handling
A framework for generically handling callbacks is described herein. In accordance with one aspect, multiple components or data objects are registered. The registration of a component includes providing a context name and one or more callbacks. A callback of each registered component references to the component and is registered under a context. A trigger may be invoked in response to receiving an event, where a context is provided to the trigger based on the event. A set of callbacks that are registered under the context are then triggered. The triggered callbacks reference to components registered under the context.
US09910719B2 High performance locks
Systems and methods of enhancing computing performance may provide for detecting a request to acquire a lock associated with a shared resource in a multi-threaded execution environment. A determination may be made as to whether to grant the request based on a context-based lock condition. In one example, the context-based lock condition includes a lock redundancy component and an execution context component.
US09910713B2 Code execution request routing
A system for providing low-latency compute capacity is provided. The system may be configured to route incoming code execution requests based on user indications to use specific containers running on a plurality of virtual machine instances. The system may be configured to process a code execution request, identify, based on the user indication that a specific container previously used to handle a request of similar type is to be used for handling the code execution request, and cause the code execution request to be handled using the specific container.
US09910708B2 Promotion of calculations to cloud-based computation resources
Embodiments relate to systems and methods for the promotion of calculations to cloud-based computation resources. One or more applications, such as spreadsheet applications, can prepare the calculation of a relatively large-scale computation, such as running statistical reports on large (e.g., greater than 1000 by 1000 cell) spreadsheets or other data objects. If the pending calculation is determined to be greater than a computation threshold for instance in computation intensity or data size, a computation request can be sent to a promotion engine. The promotion engine can identify a set of computation resources located in a cloud or other network and transmit the data request and subject data to the set of computation resources, which afford greater computation speed than the local machine hosting the requesting application. A set of results is returned from the cloud to the requesting application, thereby creating higher bandwidth and faster calculation times for the user.
US09910707B2 Interface for orchestration and analysis of a computer environment
A host server is configured to receive information related to metrics and configurations associated with computer resources of a computer infrastructure, derive and resolve the information into capacity, performance, reliability, and efficiency, as related to attributes associated with the computer resources, including compute attributes such as application, virtual machine (VM) attributes, storage attributes, and network attributes. The host server provides the metrics and attributes in a matrix configuration as a graphical user interface (GUI) on an output device, such as a display. The GUI is configured to provide a user with a single point of view into the computer infrastructure by converging application, compute, storage, and network attributes into capacity, performance, reliability, and efficiency concepts. With such a configuration, the GUI allows the end user to readily review the environments for potential issues in a time efficient manner, as well as solutions provided by the GUI.
US09910705B1 Modular offloading for computationally intensive tasks
Systems and methods are provided for configuring a programmable integrated circuit device. A hard processor region of the programmable integrated circuit device includes a processor that identifies one or more tasks for assigning to an offload region of the programmable integrated circuit. The processor in the hard processor region transmits an instruction to the offload region. The plurality of offload nodes in the offload region are configured to perform the one or more tasks.
US09910704B1 Run time task scheduling based on metrics calculated by micro code engine in a socket
A scheduler allocating a task to a socket, where the socket comprises a plurality of processor cores and a micro code engine. The scheduler receives metrics from the micro code engine, where the metrics are calculated by the micro code engine based on data receive from an event counter located on each of the plurality of processor cores. The scheduler determines whether a socket level load is below a socket threshold. Based on determining that the socket level load is below the socket threshold value, the scheduler determines whether a core level load is below a core threshold value. Based on determining that the core level load is below the core threshold value, the scheduler determines whether there is an available thread and based on determining that there is an available thread, the scheduler assigns the task to the available thread.
US09910700B2 Migration between CPU cores
A method for migration of operations between CPU cores, the method includes: processing, by a source core, one or more tasks and one or more interrupt service routines; accessing a mapping corresponding to a task of the one or more tasks and an interrupt service routine of the one or more interrupt service routines; identifying, based on the mapping, a target core that corresponds to the task and the interrupt service routine; blocking the task from being processed by the source core in response to identifying the target core; in response to identifying the target core, disabling an interrupt corresponding to the interrupt service routine; in response to identifying the target core, assigning the task and the interrupt to the target core; after assigning the interrupt to the target core, enabling the interrupt; and after assigning the task to the target core, processing the task by the target core.
US09910694B2 Providing a custom virtual appliance
A method, system, and/or computer program product provide a custom virtual appliance. One or more processors generate a description file of a custom virtual appliance based on a user requirement. The processor(s) acquire configuration metadata of the custom virtual appliance from the description file. The processor(s) create a list of candidate virtual appliances based on the configuration metadata. The processor(s) acquire a disk size of the custom virtual appliance based on configuration metadata. The processor(s), for a specific virtual appliance in the list: acquire a disk size of the specific virtual appliance; and determine, based on the disk size conversion information, whether the specific virtual appliance is required to convert a disk size of the custom virtual appliance. In response to determining that a candidate virtual appliance from the list is required to convert the virtual disk, the processor(s) construct the candidate virtual appliance as the custom virtual appliance.
US09910691B2 Hypervisor to I/O stack conduit in virtual real memory
Provided is a virtual interface, a “Forwarder” and a Virtual Block Storage Device (VBSD). The virtual interlace is the interface between a Command/Response Queue (CRQ), which receives CRQ commands from a hypervisor, and a common interface of the Forwarder. The Forwarder receives I/O commands in a format associated with the common interface and converts the commands into a generic I/O format. The reformatted command is transmitted to the VBSD. The hypervisor sends a read or write (R/W) request to the virtual interface, which passes the request to the Forwarder. The Forwarder receives the request, converts the request into a form readable by the VBSD and transmits the converted request to the VBSD. The VBSD transmits the request to a block storage device and returns the response to the Forwarder. The Forwarder replies to the request from the virtual interface with the response from the ABSD. The virtual interface then responds to the hypervisor.
US09910680B2 Decomposing a generic class into layers
The domain of genericity of an existing generic class may be expanded to include not just reference types, but also primitive and value types even though some members of the existing class do not support the expanded genericity. A subdivided version of the class may be created that includes a generic layer including abstract versions of class members and a reference-specific layer that including non-abstract versions of class members that are abstract in the generic layer. The subdivided version of the class may also include information that indicates to which layer a class member belongs. Problematic methods (e.g., methods that have built-in assumptions regarding the domain of genericity) may be moved into the second, reference-specific, layer, thereby retaining compatibility with classes that currently instantiate or reference those methods, while still allowing use within the expanded domain of genericity.
US09910679B2 Selective loading of components within a node to speed up maintenance actions
A method includes identifying a subset of components of a node that should be loaded during the next boot of the node, storing a list of the identified subset of components in a file outside of a basic input output system, and initiating boot of the node. The method further comprises the basic input output system accessing the file and controlling boot of the node to load only the identified subset of components of the node. Another method stores a plurality of such files, wherein each file is associated with maintenance of a target component of the node. After selecting one of the files, the basic input output system may access the selected file and control boot of the node to load only the subset of components that the selected file indicates should be loaded for purposes of a maintaining or testing the target component.
US09910678B1 NetBoot for installation of a non-native OS on a target host
A method for installation of a native OS on a host using non-native utilities. A native OS image is deployed on a native target client system using a non-native distribution server. The OS image is converted and packaged into a non-native format and provided to the target client. The OS image is unpacked and de-converted back to a native format and deployed on the target client. The client agent runs System Imaging Utility to acquire the OS image from the reference partition. The created OS image is pushed to the non-native file sharing system, and then the SCCM Proxy is asked to create an OS image package and a task sequence in the SCCM for this package. When the OS image is placed into the SCCM, the client agent reboots back to the reference partition.
US09910676B1 Hardware based XIP exit sequence to enable XIP mode operation on SPI boot interface
Methods and apparatus are provided for controlling one or more memory devices connected to an input output (IO) circuit through a serial peripheral interface (SPI), to make any device which is in execute in place (XIP) mode exit XIP mode. An example method comprises driving an initial signal from the IO circuit onto the data pins for a first plurality of clock cycles, the initial signal causing any memory device not in XIP mode to treat subsequent signals as a dummy read, disabling a driving function of the IO circuit prior to a negative edge of a last one of the first plurality of clock cycles, stopping generation of clock signals for a transition waiting period after the first plurality of clock cycles, and activating a weak pull-up of the IO circuit to apply logic high on all of the data pins for a second plurality of clock cycles.
US09910671B2 Vector operation core and vector processor
A vector operation core and a vector processor are provided. The vector operation core use two three-input adders and four data negators, so that the data input into the input adders may be flexibly negated. In addition to being provided with the vector operation core, the vector processor also comprises a control unit, which controls a selector and the negators in the vector operation core. The vector processor may simultaneously support butterfly operations in a base 2, base 3 and base 5 fast Fourier transform. The vector operation core may be widely applied to the design of the programmable vector processor in a multimode-compatible mobile terminal chip.
US09910670B2 Instruction set for eliminating misaligned memory accesses during processing of an array having misaligned data rows
A processor is described having an instruction execution pipeline. The instruction execution pipeline includes an instruction fetch stage to fetch an instruction. The instruction format of the instruction specifies a first input vector, a second input vector and a third input operand. The instruction execution pipeline comprises an instruction decode stage to decode the instruction. The instruction execution pipeline includes a functional unit to execute the instruction. The functional unit includes a routing network to route a first contiguous group of elements from a first end of one of the input vectors to a second end of the instruction's resultant vector, and, route a second contiguous group of elements from a second end of the other of the input vectors to a first end of the instruction's resultant vector. The first and second ends are opposite vector ends. The first and second groups of contiguous elements are defined from the third input operand. The instruction is not capable of routing non-contiguous groups of elements from the input vectors to the instruction's resultant vector. A software pipeline that uses the instruction is also described.
US09910659B2 Methods for providing anti-rollback protection of a firmware version in a device which has no internal non-volatile memory
Methods, systems, computer-readable media, and apparatuses for providing anti-rollback protection in a device which has no internal non-volatile memory are presented. One embodiment is a device for providing anti-rollback protection. The device may obtain a firmware version number associated with a first firmware installation for the device, wherein the device is implemented on a substrate that includes no non-volatile memory. The device may obtain a lowest acceptable firmware version number, wherein the lowest acceptable firmware version number is stored in a secure element environment, wherein the secure element environment utilizes memory separated from the substrate. The device may compare the firmware version number and the lowest acceptable firmware version number, wherein if the firmware version number is less than the lowest acceptable firmware version number, then disallow the first firmware installation.
US09910658B2 Optimization of distribution of over-the-air (OTA) updates to portable computing devices
A system and apparatus for distributing updates to portable computing device are disclosed. A number of portable computing devices to receive update data is determined and a first number of invitations to update are transmitted to a subset of the portable computing devices to receive update data during a first event. Data describing network usage during the first event is received and the available network bandwidth is determined Based on the available network bandwidth, the size of the update data and network speed, a second number of invitations to update for transmission during a second event is determined In one embodiment, the available network bandwidth accounts for a threshold bandwidth and the bandwidth being used. This allows dynamic modification of the number of invitations based on available network bandwidth while allowing bandwidth usage to remain below the threshold bandwidth.
US09910657B2 Installing software where operating system prerequisites are unmet
A method for installing a computer program is provided, which includes: determining at a beginning of an installation procedure of the computer program whether an operating system being executed on the computer systems supports a prerequisite component for installing and executing the computer program by using operating system support information corresponding to the computer program. Based on determining that the prerequisite component is not supported by the operating system, performing: setting up a container comprising the prerequisite component using operating system level virtualization, installing the computer program in the container, and providing information on how to access the computer program being executed on the container.
US09910654B1 Extensible software release management automation service
Technologies are disclosed herein for automated software release lifecycle management. In particular, a software release management network service is disclosed that provides functionality for allowing a software developer to automate aspects of a software release pipeline. A software release pipeline can have multiple stages, each of which can have multiple actions. The actions can include internal actions that utilize network services internal to a service provider network. The actions can also include external actions that utilize network services that are external to a service provider network. The internal and external actions can perform various release-related functions, such as obtaining source code, building the source code, deploying built program code, and for performing tests. Stage gates and/or action gates can also be defined for conditional execution of the next stage or action in a software release pipeline, respectively. A gate bypass can also be specified to override stage or action gates.
US09910653B2 Software distribution
An electronic device comprising: receiving means for receiving a first packaged installation file; installation means for installing a first version of a software application using the received first packaged installation file; packaging means for creating a second packaged installation file, for installing a second version of the software application; and transfer means for transferring the second packaged installation file to a second host device. A hand-portable electronic device, for sending data to another device during a session to enable the interactive production of music by the devices as an ensemble, comprising: output means operable, during a session, to send musical synchronisation information to the other device; a user input for controlling, during a session, the content of at least one of first musical control data and musical synchronisation information; and a synthesiser for producing music in dependence upon the first musical control data and the musical synchronisation information.
US09910651B2 System for developing, testing, deploying, and managing applications in real-time
A method, a device, and a non-transitory storage medium having instructions to deploy files of a web-based application, wherein a deploying includes: receive an upload of the files from a user device via a web browser, and store the files; receive from the user device via the web browser, a first request to run the web-based application that has been deployed; run the web-based application in response to the first request, and wherein during a running of the web-based application: determine a type of a second request for data to be used to generate a user interface of the web-based application; obtain the data based on the type of the second request; and render the user interface based on the obtained data.
US09910648B2 Inserting implicit sequence points into computer program code to support debug operations
Arrangements described herein relate to inserting implicit sequence points into computer program code to support debug operations. Optimization of the computer program code can be performed during compilation of the computer program code and, during the optimization, implicit sequence points can be inserted into the computer program code. The implicit sequence points can be configured to provide virtual reads of symbols contained in the computer program code when the implicit sequence points are reached during execution of the computer program code during a debug operation performed on the computer program code after the computer program code is optimized and compiled.
US09910645B2 Incremental build generation
A computer-implemented method includes receiving a set of complete source instructions to process a source code entity, an incremental build part, and a set of file definitions. The method analyzes the set of complete source instructions. The method identifies, from the set of analyzed source instructions, a set of operations that reference the incremental build subset. The method repeats: (i) determining, for each operation, whether any additional files are affected by the operation, the additional files forming a set of affected files; (ii) creating a combined set of files, the combined set of files consisting of the set of affected files and the incremental build subset; and (iii) updating the set of operations to include those from the analyzed source instructions that reference the combined set of files; until no new files are added to the combined set of files. The method generates a set of incremental source instructions.
US09910642B2 Optimal rule generation from a digraph representation
In one embodiment, a computing system identifies one or more terminal nodes in a digraph, and then back-walks primitives up the digraph from each terminal node to a corresponding parent terminal node or a root of the digraph, whichever is first. The system then identifies chains of back-walked primitives for each of the one or more terminal nodes (e.g., where each chain consists of a respective terminal node and any primitives either a) up to but not including a corresponding parent terminal node or else b) up to and including the root of the digraph when the back-walking reaches the root). Based on this, the system can then merge each set of any two or more chains of the identified chains that intersect on a decision operation into a corresponding new single chain, and maps each of the chains to a respective rule.
US09910639B2 Random number generation using threshold switching mechanism
Embodiments include a random number generation entity having at least one switching cell comprising a pair of electrodes and a chalcogenide layer arranged between the pair of electrodes and a pulse generating entity coupled with the electrodes of the switching cell. The pulse generating entity is configured to provide an excitation pulse to the switching cell. The random number generation entity also includes a detection entity configured to provide a detection signal indicating whether an electrical property measured at the switching cell exceeds or falls below a threshold value due to applying the excitation pulse to the switching cell and a random number generation entity adapted to generate a random number based on the detection signal of the detection entity.
US09910635B2 System and method for connecting to addresses received in spoken communications
Disclosed herein are systems, methods, and computer-readable media to connecting to addresses received in spoken communications. The method for connecting to addresses received in spoken communications comprises receiving at least one spoken communication containing a spoken address, extracting each address automatically from the at least one spoken communication, displaying to a user at least one extracted address, and receiving from the user a selection of at least one extracted address to initiate communication.
US09910633B2 Scalable storage-loss optimized framework based method and system for color gamut mapping
A method for a scalable storage-loss optimized (SSLO) system for color gamut mapping is provided. The SSLO system method comprises generating a pre-computed color gamut mapping between an input color gamut and an output color gamut, receiving an input signal including a plurality of input pixels from the input signal domain, wherein the input pixels correspond to a set of first color values represented in a first color space; converting the set of the first color values to be a set of second color values represented in a second color space; generating a set of third color values through a mapping modeling and a color reproduction; converting the set of the third color values to be a set of fourth color values represented in the first color space; and outputting an output signal including a plurality of output pixels corresponding to the fourth color values to the output signal domain.
US09910632B1 Systems and methods for a supplemental display screen
Systems and methods are disclosed for using a supplementary display device in conjunction with a first device, where the first device may have a smaller display than the supplementary display device. Icon images corresponding to applications installed on the first device are accessed and wirelessly transmitted to the supplementary display device. Touch data, corresponding to a user touch input on a touchscreen of the supplementary display device, is received at the first device. The touch data includes coordinate data corresponding to the user touch input on a touchscreen of the supplementary display device. Based at least in part on the touch data, a determination is to be made as whether an application on the first device is to be launched. The application is launched on the first device and a user interface corresponding to the launched application is transmitted to the supplementary display device.
US09910629B2 Image output system, image processing apparatus, image output apparatus and methods therefor
An image processing apparatus stores received print data and requests a conversion server to convert the print data. In response, the conversion server converts the print data into a predetermined format and transmits reference information indicating a location of the print data after conversion to the image processing apparatus. An image output apparatus transmits its own apparatus configuration information and a print request to the image processing apparatus. In response, the image processing apparatus outputs either of the print data and the reference information to the image output apparatus, based on the apparatus configuration information. The image output apparatus acquires, when the reference information is received, the print data after conversion from the conversion server and performs printing, based on the reference information, and performs, when the print data is received, printing based on the received print data.
US09910628B2 Electronic device, session continuity determining method, and data transmission/reception system
An electronic device includes a central processing unit (CPU) and a storage device. By executing a session continuity determination program, the CPU functions as: an Ack reception determining portion that determines whether an Ack, as a response to dummy data transmitted to a transmission side electronic device, has been received from the transmission side electronic device; a data reception determining portion that determines, when the Ack reception determining portion determines that the Ack has not been received, whether a particular data has been received from the transmission side electronic device within a particular time; and a non-continuity case processing portion that performs, when the data reception determining portion determines that the particular data has not been received within the particular time, a process for a case where a session with the transmission side electronic device is not being continued.
US09910627B2 Remote maintenance system and remote maintenance method
A remote maintenance system includes: a remote maintenance server; and one or more image forming apparatuses, the server including an operation input unit, a display unit, a storage unit that stores panel programs, a communication unit, an image forming apparatus database in which functions are registered, and a manager circuit that acquires, when a serviceman instructs restoration, the panel program to be restored from the storage unit, analyzes which of the functions is to be invoked by the panel program, compares, by referencing the database, the function of the restore-destination apparatus and the function to be invoked, and determines whether the restore-destination apparatus executes the panel program, and instructs the restore-destination apparatus to restore the panel program when it executes the panel program, each image forming apparatus restoring, when receiving a restore instruction, the panel program based on the instruction.
US09910622B2 Host-controlled garbage collection
In an array of solid-state drives (SSDs), SSDs in the array are each configured to initiate generation of additional erased memory blocks when an initiation command is received from a host or when the number of erased memory blocks in the SSD falls below a minimum threshold of erased memory blocks for the SSD. The minimum threshold value may be adjusted by the host.
US09910621B1 Backlogging I/O metadata utilizing counters to monitor write acknowledgements and no acknowledgements
In one aspect, a method includes receiving an I/O, incrementing a first counter in an active data structure in a backlog at a splitter after receiving the I/O, storing I/O metadata of the I/O in the active data structure, incrementing a second counter in the active data structure or a passive data structure in the backlog if the I/O was written to a storage array and received by the data protection appliance and incrementing a third counter in the active data structure or the passive data structure if either the I/O was not written to a storage array or not received by the data protection appliance.
US09910616B2 Dynamic data access
In dynamic data access, a request is received to access data of a core data service view of an in-memory database. It is determined that an aging temperature parameter is specified in an annotation in a core data service view definition. An aging temperature value corresponding to the aging temperature parameter is received as a range restriction. A default access behavior associated with the core data service view definition is overridden. A partition where the aging temperature value lies in a secondary memory is determined. Latest or recent partition in the secondary memory is referred to as a latest partition. Data from the latest partition until the determined partition is accessed in the secondary memory. The accessed data is loaded from the secondary memory to the main memory.
US09910615B2 Coding scheme for indirect addressing of multiple action memories
Some embodiments provide a method for configuring unit memories to implement first and second sets of entries, the second set of which references the first set. The method configures a first pool of unit memories to implement the first set. Each entry in the first set is located at a particular location in at least one of the memories of the first pool. The method configures a second pool of unit memories to implement the second set. Each entry in the second set includes a particular number of bits for indicating (i) an initial first-pool unit memory at which the first-set entry referenced by the second-set entry is found and (ii) a number of subsequent first-pool memories across which the first-set entry is divided. A number of bits required to identify a single first-pool memory is one fewer than the particular number of bits.
US09910609B2 Determining adjustments of storage device timeout values based on synchronous or asynchronous remote copy state
A determination is made as to whether a plurality of storage volumes controlled by a processor complex are secondary storage volumes that are in an asynchronous copy relationship with a plurality of primary storage volumes. A storage device timeout value for a storage device that stores the plurality of storage volumes is changed from a predetermined low value to a predetermined high value, wherein the predetermined high value is indicative of a greater duration of time than the predetermined low value, in response to determining that each of the plurality of storage volumes controlled by the processor complex and stored in the storage device are secondary storage volumes that are in the asynchronous copy relationship with the plurality of primary storage volumes.
US09910606B2 End of life extension of solid state memory
Method and apparatus for managing a solid state memory, such as but not limited to a NAND flash memory. In some embodiments, a storage device includes a non-volatile solid state memory and a control circuit configured to transfer user data between the memory and a host device. The control circuit maintains, in a local memory, a data structure indicative of measured readback error rates associated with memory locations in the memory in relation to erasure counts associated with the memory locations. The control circuit retires a subset of the memory locations identified by the data structure from further availability to store user data from the host device responsive to the measured readback error rates, and responsive to the erasure counts of said memory locations indicating the memory has reached an end of life (EOL) condition.
US09910605B2 Page migration in a hybrid memory device
A die-stacked hybrid memory device implements a first set of one or more memory dies implementing first memory cell circuitry of a first memory architecture type and a second set of one or more memory dies implementing second memory cell circuitry of a second memory architecture type different than the first memory architecture type. The die-stacked hybrid memory device further includes a set of one or more logic dies electrically coupled to the first and second sets of one or more memory dies, the set of one or more logic dies comprising a memory interface and a page migration manager, the memory interface coupleable to a device external to the die-stacked hybrid memory device, and the page migration manager to transfer memory pages between the first set of one or more memory dies and the second set of one or more memory dies.
US09910603B1 Heterogeneous data storage on magnetic tape
Techniques for storing data on a tape using a heterogeneous data storage technique are described herein. A logical partition from a logical model of a data storage tape is associated with a set of data. If a current location of the data storage tape corresponds to the logical partition of the set of data, a first data transfer operation associated with the set of data is performed using the data storage tape. The data transfer operation is monitored and changes to the data transfer rate of the data transfer operation are used to update the logical extent of the tape and to update the logical model. If the current location of the data storage tape does not correspond to the logical partition of the set of data, the data set is staged for later storage.
US09910591B2 Visualizations of memory layouts in software programs
The disclosed embodiments provide a system that facilitates the execution of a software program. During operation, the system obtains a memory layout for an object instance in a software program, wherein the memory layout includes a set of offsets and a set of allocated sizes of a set of components associated with the object instance. Next, the system uses the memory layout to determine a first memory space occupied by data in the object instance and a second memory space occupied by padding in the object instance. The system then displays a visualization of the memory layout on the computer system, wherein the visualization includes a first graphical distinction between the first memory space and the second memory space.
US09910584B2 Method for manipulating folders and apparatus thereof
The present disclosure discloses an information processing method for enhancing a display effect of an electronic device. The method includes: displaying a first part of the display interface in a display area, the first part of the display interface including a first part of the background image and P icons and Q folders located on the first part of the background image; obtaining a first manipulation operation on a first folder of the Q folders, a first sub-area of the display interface containing the first folder occupying a first display area of the display area on the display unit; executing a zoom-in instruction according to a predetermined scale in response to the first manipulation operation; displaying the first sub-area in a second display area of the display area when the zoom-in instruction executed is ended.
US09910583B2 Method and apparatus for program exceution based icon manipulation
The invention discloses a method and an apparatus for executing a program. The method includes: obtaining a related operation item of an object to be operated, and displaying an operation icon corresponding to the related operation item, and a direction of pointing from an original display coordinate of the object to be operated towards a display coordinate of the operation icon is an operation icon direction; according to the original display coordinate of the object to be operated and a display coordinate of the object after being dragged by the user, calculating a movement direction of the object to be operated; and starting to execute a functional operation corresponding to the operation icon when it is detected that the movement direction of the object to be operated is the same as the operation icon direction. Therefore, the invention can simplify program executing steps, and make operations intuitive and natural.
US09910582B2 Techniques for navigating information
Techniques described and suggested herein include systems and methods for navigating content in the form of a scrollable information sets. In an embodiment, a portion of a scrollable information set is displayed on a user device. As the user navigates through the information set, one or more location indicators are modified. The location indicators each correspond to a position within the information set and are configured to facilitate user input for navigating to a corresponding position within the information set.
US09910580B2 List display control method and device
List display control method and device are provided. The method may include displaying a plurality of list items in a list display area. The method may also include performing at least one of the following based on an operation of a pointer in the list display area: scrolling up, in response to a first operation of the pointer on any list item of the plurality of list items in a first area of the list display area and scrolling down, in response to a second operation of the pointer on any list item of the plurality of list items in a second area of the list display area which is different from the first area.
US09910578B2 User interface for controlling a bathroom plumbing fixture with outlet and flow pattern selection screens
A user interface for controlling a plumbing fixture includes an electronic display configured to display multiple different graphical menus for controlling a plurality of valves. The user interface includes a selector control configured to receive input from a user for navigating the multiple different graphical menus and for selecting items displayed in the multiple different graphical menus. A controller receives a first user input from the selector control and causes the electronic display to switch from displaying one of the graphical menus to another of the graphical menus in response to the first user input. The controller receives a second user input from the selector control and causes the plurality of valves to make multiple different adjustments in response to the second user input based on which of the multiple different graphical menus are displayed when the second user input is received.
US09910567B2 Providing a user interface
A system for providing a user interface includes a gadget definition, a style definition, and a scene file. The gadget definition includes one or more XML-based gadget definition tags defining a gadget element and the style definition includes one or more XML-based style definition tags defining one or more style attributes to be applied to the gadget element. The scene file is an XML-based document that includes a gadget element tag that specifies the gadget element. The system further includes a parser to parse the scene file, the style definition, and the gadget definition, and to generate an object that includes a gadget object corresponding to the gadget element. The system also includes a layout engine to determine, based on the object model, a layout of the user interface, and a rendering engine to render, based on the determined layout, the user interface including the gadget element.
US09910565B2 System and method for providing personalization of a virtual space based on an individualized seed value
A system and method for providing personalization of a virtual space based on an individualized seed value. The system may provide personalization within one or more instances of a virtual space based on an individualized seed value derived from one or more biometric samples (e.g., a fingerprint) and/other individual identifiers. One or more values may be obtained and used as the individual seed value to generate pseudorandom numbers. Personalizations affecting characteristics of one or more aspects of the virtual space may be determined based on the pseudorandom numbers generated. Presentation of the personalizations determined may be effectuated in on or more instances of the virtual space.
US09910556B2 Mouse cursor control method and apparatus
A method for controlling a mouse cursor in this invention includes: upon detecting an event that represents a focus was moved between plural objects displayed on a screen, identifying an object of a movement destination of the focus; identifying a position of the object of the movement destination; setting an end point to which a mouse cursor is moved, based on the identified position of the object of the movement destination; and performing first movement of the mouse cursor to a position that is nearer to the end point, plural times, until the position of the mouse cursor reaches the end point.
US09910552B2 Wiring body, wiring board, touch sensor, and method for producing wiring body
A wiring body includes a first conductor layer including a first conductor wire, a resin layer covering the first conductor layer, and a second conductor layer disposed on the first conductor layer through the resin layer and including a second conductor wire. The wiring body satisfies the formula |H1−H2|
US09910551B2 Touch display panel and driving method therefor
A touch display panel and a driving method therefor are provided. The touch display panel can include: a substrate, multiple touch display units, a gate driving circuit and/or any other components. The substrate can include a display region and a border region. The multiple touch display units can be disposed in the display region, and each touch display unit can include multiple gate lines each extending in a first direction and multiple electrode blocks arranged in the first direction. The electrode blocks can be located opposite to the gate lines in a direction perpendicular to the substrate. The gate driving circuit can be disposed in the border region and can be electrically connected to each gate line. During a display driving stage, the gate driving circuit can scan the gate lines such that any two sequentially scanned gate lines are located in different touch display units. The starting signals for the any two sequentially scanned gate lines can partially overlap, and the starting signals for gate lines in a same touch display unit may not overlap.
US09910549B2 Display device with integrated touch screen and method for driving the same
Discussed are a display device with an integrated touch screen and a method of operating the same. The display device according to an embodiment includes a display panel including a plurality of pixel electrodes; a touch screen including m number of electrodes which are formed to overlap with the plurality of pixel electrodes, wherein m is a multiple of n, and n is an integer equal to or greater than two, and wherein the m electrodes are divided into n number of electrode groups; a touch driver configured to generate a touch scan signal and to supply the generated touch scan signal to a display driver; and the display driver configured to apply a common voltage or the touch scan signal to one or more of the m electrodes depending on a driving mode of the display device.
US09910547B2 Anti-interference touch sensing structure
An anti-interference touch sensing structure includes a first substrate, a plurality of touch sensing units and at least a first anti-interference spot. The touch sensing units are coplanarly disposed on the first substrate, and a first interval region is formed between the adjacent touch sensing units. The first anti-interference spot is disposed within the first interval region.
US09910546B2 Position detecting device
The invention allows size reduction of a sensor of a position detecting device of a capacitive system, which detects a position indicated by an indicator. The sensor has plural electrode conductors that are disposed adjacent to each other and are configured to receive a signal from the indicator on a first surface of a substrate having the first surface and a second surface opposed to each other. The position detecting device includes a signal processing circuit including a differential amplifier circuit that calculates a difference between signals from at least two of the plural electrode conductors. Plural connecting lines are formed on the second surface of the substrate. The plural connecting lines each have one end connected to one of the plural electrode conductors disposed on the first surface by a through-hole or a via formed through the substrate, and the other end connected to a line-concentrated part.
US09910545B2 Transparent conductive film and touch panel
The transparent conductive film of the present invention is a transparent conductive film, comprising: a transparent film substrate; a patterned transparent conductive layer formed on one side of the transparent film substrate; and a colored layer provided on at least one of an opposite side of the transparent conductive layer from the transparent film substrate and an opposite side of the transparent film substrate from the transparent conductive layer, wherein the colored layer has an average absorptance of from 35% to 90% for light in the wavelength range of from 380 nm to 780 nm.
US09910544B1 Uniformity correction method for low cost and non-rectangular touch sensor matrices
A correction matrix for use with non-rectangular touch arrays is described. In one embodiment, a sensing device may include a memory and a processing element coupled to the memory. The memory may store a set of touch sense values corresponding to a measured characteristic of at least one unit cell of plurality of unit cells of a non-rectangular touch array and may store a correction matrix. The correction matrix may define an active region and an inactive region of the non-rectangular touch array. The processing element may modify touch sense values of a subset of the plurality of unit cells that are not completely within the active region defined by correction values of the correction matrix.
US09910541B2 Mis-touch recognition method and device
Provided are a mis-operation recognition method and device. In the method, a profile of a touch is determined according to the touch on a touch screen; whether a horizontal coordinate corresponding to a maximum vertical length of the profile is located within a predetermined location range on the touch screen or not is judged; and in a case that it is judged that the horizontal coordinate is located within the predetermined location range, the touch corresponding to the profile is recognized as a mis-touch. By means of the technical solution, a problem caused by a mis-touch generated when a touch screen device is held by a hand is solved, and a mis-operation is prevented, thereby improving user experience.
US09910540B2 Management of a touchscreen interface of a device
Method and system are provided for management of a touchscreen interface of a device. The method includes monitoring touchscreen interface function by logging data relating to user interaction with locations of the touchscreen interface. The logged data is then analyzed to identify one or more areas of the touchscreen interface which are inactive. The remaining active areas of the touchscreen interface are modeled to form a modified interface. An original touchscreen interface is then mapped to the modified interface resulting in only use of the remaining active areas.
US09910536B2 Touch sensor and touch panel device
A touch panel device in which a touch panel provided with a switch display and a touch sensor having a plurality of electrodes that include a chevron-shaped portion and a valley-shaped portion and that correspond to the switch display are disposed in a stacked manner, a slide input being capable of being performed by slide operation in an arrangement direction of the electrodes, in which, among intersection angles formed by intersection between a virtual line extending in the slide operation direction and a valley bottom of the valley-shaped portion, a valley side external angle that is an external angle of each electrode is larger than, among intersection angles formed by intersection between the virtual line and a peak portion of the chevron-shaped portion, a chevron side internal angle that is an internal angle of each electrode, and a buried portion that raises the valley bottom is provided in each electrode.
US09910529B2 Method, device, and system for detecting transmitter approaching or touching touch sensitive display
A method is provided for detecting a transmitter approaching or touching a touch sensitive display. The transmitter transmits an electrical signal which is mixed from a plurality of signals having different frequencies. The display includes a liquid crystal layer between pixel electrodes and common electrodes and a plurality of second electrodes. The common electrodes include a plurality of first electrodes. A plurality of sensing points is located in the intersections of the plurality of first electrodes and the plurality of second electrodes. The method includes: calculating the total signal strength of a received signal with respect to each of the first electrodes; calculating the total signal strength of a received signal with respect to each of the second electrodes; calculating a relative position between the transmitter and the display according to the calculated total signal strengths of the received signals with respect to each of the first and second electrodes.
US09910523B2 Display device with connection interface for common signal lines placed under planarization layer
A display of an electric device includes a plurality of separated transparent electrode blocks, which are configured to provide one or more of supplemental features such as touch recognition. Signal paths between the transparent electrode blocks and the driver for the supplemental features are implemented with a plurality of conductive lines positioned under one or more planarization layers. The conductive lines implementing the signal paths are routed across the display area, directly toward a non-display area where drive-integrated circuits are located.
US09910521B2 Control apparatus for mobile terminal and control method thereof
This specification relates to a control apparatus for a mobile terminal, capable of checking information through first and/or second sub display(s) in an easy, convenient manner, and a control method thereof. The control apparatus includes a main display that is located on a front surface of the mobile terminal, a first sub display that extends from the main display and is located on the left of the mobile terminal, a second sub display that extends from the main display and is located on the right of the mobile terminal, a communication unit that is configured to receive event information, and a controller that is configured to generate indication information indicating that the event information has been received, and output the indication information on the first or second sub display while the mobile terminal is gripped by a user.
US09910520B2 Electronic device
An electronic device according to the present disclosure includes a translucent panel including a front surface and a back surface, the translucent panel including a curved portion at an end portion, the curved portion being curved toward the back surface with respect to a central portion of the translucent panel. The electronic device also includes a touch panel located on the back surface of the translucent panel and configured to be covered with the central portion and the curved portion. The distance between the curved portion and the touch panel is shorter than the distance between the central portion of the translucent panel and the touch panel.
US09910518B2 Transparency augmented industrial automation display
An industrial automation display is provided. The industrial automation display in one example includes a substantially transparent display panel associated with and in view of an industrial automation process portion, a light-control layer formed as part of the substantially transparent display panel, and a display controller coupled to the light-control layer, with the display controller configured to receive industrial automation data related to the industrial automation process portion, generate industrial automation display data using at least a portion of the industrial automation data, and display the industrial automation display data on the light-control layer of the substantially transparent display panel, wherein the industrial automation display data is viewable in conjunction with the industrial automation process portion.
US09910516B2 Signal processing device and control method
A signal processing device and a control method are disclosed. The signal processing device comprises: an input unit which receives a signal from an external input device or senses a connection state; a storage unit for storing information on the external input device; and a control unit for recognizing and activating the external input device on the basis of the signal inputted from the external input device and the stored information.
US09910514B2 Wireless positioning pen with pressure-sensitive tip
A wireless positioning pen with a pressure-sensitive tip includes an electric power source, optical system (1), inertial sensors and wireless technology. A casing (6) has a second casing (7), and a top part with holes (61) with fingerboards (8) with buttons that forms a sliding housed body (4) with a battery (10) therein. A head (3) is attached to the front part thereof, and a first cover (5) with a fastening mechanism (51) attached to lower part of the body (4) The body (4) houses a four part printed circuit board (PCB) (2) mutually interconnected with flexible parts (20). The body (4) has the optical system (1) sliding on the PCB fixed part (14) bearing an optical sensor (13) connected through the PCB flexible part (15) to the fourth fixed part (24). The head (3) has a tip button (92) with a light source (16), and a capacitive sensor (91).
US09910507B2 Image display apparatus and pointing method for same
An image display apparatus that automatically adjust a pointing direction of a remote controller to almost match with a position of a pointer on a screen, and a pointing method performed by the image display apparatus are provided. The image display apparatus includes a reference angle detector configured to detect a reference angle formed by the pointing direction of the remote controller with respect to a reference direction set for a display; a remote control direction detector configured to detect a remote control direction which is a direction in which the remote controller is viewed, from a reference point set on the display; and a standard direction adjuster configured to adjust a standard direction set in the remote controller so that the standard direction reaches the reference point on the display as viewed from the remote controller, based on the reference angle and the remote control direction.
US09910500B2 Smart signage system
The present patent application is directed to a smart signage system. In one aspect, the smart signage system includes at least a signage device; at least a signage display being connected to the at least one signage device and configured to display contents stored in the signage device; and a plurality of client devices being in wireless communication with the at least one signage device. Each client device is configured to recognize a gesture from a user in correspondence with a target content displayed on the signage display, and thereby to acquire a file of information associated with the target content from the signage device.
US09910493B2 Suspension component for a haptic touch panel assembly
A suspension component for coupling a touch panel to a substrate in a haptic touch panel assembly. The suspension component includes a flexible connector that extends between a first end adapted for attachment to the touch panel and a second end adapted for attachment to the substrate. The flexible connector includes a concave section, an axial side wall, and a mobility gap and is shaped to allow the touch panel to move with respect to the substrate with three or more degrees of freedom, thereby facilitating more accurate and dynamic haptic feedback.
US09910490B2 System and method of cursor position control based on the vestibulo-ocular reflex
Cursor position control based on the vestibulo-ocular reflex. At least some of the illustrative embodiments are methods including: creating a first video stream, the first video stream depicting an eye of user of a computer system, wherein a pupil of the eye changes position relative to a face of the user during use of the computer system by the user; tracking pupil position relative to the face of the user, the tracking by way of the first video stream; moving a cursor position on the display device, the moving responsive to changes in pupil position relative to the face of the user, and the moving in real time with pupil position changes; and adjusting cursor position based on the vestibulo-ocular reflex.
US09910483B2 Distribution of tasks among asymmetric processing elements
Techniques to control power and processing among a plurality of asymmetric cores. In one embodiment, one or more asymmetric cores are power managed to migrate processes or threads among a plurality of cores according to the performance and power needs of the system.
US09910481B2 Performing power management in a multicore processor
In an embodiment, a processor a plurality of cores to independently execute instructions, the cores including a plurality of counters to store performance information, and a power controller coupled to the plurality of cores, the power controller having a logic to receive performance information from at least some of the plurality of counters, determine a number of cores to be active and a performance state for the number of cores for a next operation interval, based at least in part on the performance information and model information, and cause the number of cores to be active during the next operation interval, the performance information associated with execution of a workload on one or more of the plurality of cores. Other embodiments are described and claimed.
US09910475B2 Processor core power event tracing
A processor includes a trace unit to monitor activity by the processor and generate trace packets indicative of the activity by the processor. The trace packets may include four additional packets for processor event tracing including: a dormant state request packet, a code execution stop packet, a dormant state entry packet, and a dormant state exit packet.
US09910474B2 Method for optimizing management of standby of a microprocessor enabling the implementation of several logical cores and computer program implementing such a method
The subject of the invention is in particular the optimization of standby management of a part of a microprocessor allowing implementation of at least two logic cores, said at least one microprocessor comprising means for placing at least one resource non common to said at least two logic cores on standby. After having determined (400) a desired standby state for each of said at least two logic cores, said desired standby state of one of said at least two logic cores is compared with the said desired standby state of the other of said at least two logic cores. In response to said comparison, instructions preparing for said placement on standby and/or allowing the restoration of said one of said at least two logic cores are launched (420).
US09910473B2 Power management for a memory device
An improved method and apparatus for performing power management in a memory device is disclosed.
US09910472B1 Power system configuration monitoring
A power monitoring system monitors the actual configurations of power distribution systems which supply power to computer systems, based on data signals received at the computer systems via the power lines from the power distribution systems. The system determines if an actual power system configuration of a computer system is distinct from a target power system configuration of the computer system. A target configuration can be associated with particular computing operations performed on the computer system and can specify particular power system configurations of computer systems which execute such computing operations. The system can, in response to a determined distinction, adjustably control computing operation execution on the computer system, including adjustably routing data traffic. The system can, in response to a determined distinction, command power distribution system adjustments which mitigate the distinction.
US09910467B2 Lid and power supply interlock mechanism
An approach is provided in which a system includes a lid detection mechanism that prevents a power supply unit from being electrically coupled to the system when a lid is detached from the system's chassis. According to another embodiment of the present disclosure, the system includes a power supply unit detection mechanism that prevents the lid from being detached from the system's chassis when the power supply unit is electrically coupled to the system.
US09910463B1 Combination hardstop and switch for actuated locking devices
Aspects described herein generally relate to an actuated locking device. The actuated locking device includes a locking mechanism moveable between a first position and a second position, an actuator connected to the locking mechanism that actuates the locking mechanism for moving between the first position and the second position, and a hardstop switch that limits movement of the locking mechanism to at least one of the first position or the second position, in contact with the hardstop switch. The hardstop switch comprises a body including an electrically conductive surface defining a switch that completes an electrical circuit when the locking mechanism contacts the body of the hardstop switch.
US09910453B2 High voltage, high efficiency sine wave generator with pre-set frequency and adjustable amplitude
An apparatus for generating a sinusoid at a pre-set frequency f includes a DC power source with a controllable output voltage, a transformer, a power switch, a sequencer, and an output filter. The power switch is configured to apply the output of the DC power source to the primary of the transformer in either direction or to remain off based on control signals that are applied to its control input. The sequencer applies control signals to the control input in a choreographed sequence to form an oversampled version of a sine wave. The output filter is connected to the secondary of the transformer, and it passes the pre-set frequency f and attenuates frequencies above a cut-off frequency. In some preferred embodiments, the cut-off frequency is 3f and the transfer function of the output filter has a zero at 5f.
US09910450B2 Determining an attribute of an adapter based on a ratio of voltage divider output voltages
An example provides an apparatus for determining an attribute of an adapter based on a ratio of voltage divider outputs. The apparatus may include a first analog-to-digital converter to provide a first digital signal corresponding to a first output voltage of a first voltage divider connected between a power node and a ground node, the first voltage divider formed, at least in part, when the apparatus is operatively coupled to the adapter. The apparatus may include a second analog-to-digital converter to provide a second digital signal corresponding to a second output voltage of a second voltage divider connected between the power node and the ground node. The attribute of the adapter may be determined based on a ratio of the output voltages.
US09910440B2 Escape-path-planning system for an automated vehicle
An escape-path-planning system to operate an automated vehicle includes an object-detector and a controller. The object-detector is suitable for use on a host-vehicle. The object-detector is used to detect an other-vehicle in an adjacent-lane next to a present-lane traveled by the host-vehicle. The controller is in communication with the object-detector. The controller is configured to, in response to a lane-change-request, determine a first-route-plan that steers the host-vehicle from the present-lane to the adjacent-lane, determine a second-route-plan that steers the host-vehicle into the present-lane, initiate the first-route-plan when a forecasted-distance between the other-vehicle and the host-vehicle is greater than a distance-threshold, and cancel the first-route-plan and select the second-route-plan when the forecasted-distance between the other-vehicle and the host-vehicle becomes less than the distance-threshold after the first-route-plan is initiated. The second-route-plan is a pre-planned escape-path that is instantly available if needed that provides a smoother travel-experience for an occupant of the host-vehicle.