| Document | Document Title |
|---|---|
| US09692588B2 |
System and method for performing synchronization and interference rejection in super regenerative receiver (SRR)
A method of performing synchronization in a super regenerative receiver (SRR) includes setting a quench rate of the SRR to a value of 1.5 times a chip rate of an incoming signal, acquiring an expected preamble sequence of an arbitrary sample set among a plurality of possible sample sets, acquiring an expected start frame delimiter (SFD) sequence for all of the possible sample sets to achieve frame synchronization, computing respective correlation metrics for bits of the expected SFD sequence while the expected SFD sequence is acquired for all of the possible sample sets, calculating a decision metric based on the correlation metrics in response to an SFD sequence being detected for one or more of the possible sample sets, and identifying a best sample set for demodulating the incoming signal among all of the possible sample sets based on the decision metric to achieve pulse synchronization. |
| US09692586B2 |
Flexible real time scheduler for time division duplexing and/or frequency division duplexing
A flexible real-time scheduler for a wireless communication node, enabling the node to communicate with a remote node using dynamically variable frame structure. The scheduler continuously receives map information defining the frame structure of frames in a frame sequence. Each frame includes a plurality of slots (e.g., time slots or frequency slots). The map information specifies for each slot of each frame whether the slot is to be a transmit slot or a receive slot. The scheduler drives a transmitter to transmit during the slots assigned for transmission, and drives a receiver to receive during the slots assigned for reception. (The number of slots per frame and the size of each slot are also configurable.) |
| US09692585B2 |
Equalizing distributed antenna system equipped with multiple base station interface ports
Optimizing ripple reductions in equalizers shared between multiple interface ports in a distributed antenna system (DAS). In one aspect, a downlink equalizer is shared between a downlink simplex port and a duplex port in a radio interface module(s) (RIM(s)) in the DAS. In another aspect, to optimize ripple reduction in the downlink equalizer, the downlink equalizer is configured to go through a plurality of downlink equalizer states that each can generate a downlink equalizer frequency response affecting downlink ripple of the RIM(s). At each of the downlink equalizer states, a test signal is provided to the downlink equalizer and a corresponding downlink ripple of the RIM(s) is recorded. When all of the downlink equalizer states are evaluated based on the test signal, the downlink equalizer is configured to function based on the downlink equalizer state associated with the smallest downlink ripple of the RIM(s). |
| US09692583B2 |
Duplexer
According to a first aspect of the present invention, there is provided a duplexer for a radio frequency antenna, comprising: a radio frequency signal transmitter port arranged for connection to a radio frequency signal transmitter; a radio frequency signal receiver port arranged for connection to a radio frequency signal receiver; a switch arranged selectively to adopt either one of: a first state which connects the transmitter port to a common input/output port of the switch arranged for connection to a radio frequency antenna; and a second state which connects the receiver port to the common input/output port; a switch control unit arranged to monitor radio frequency power at the common input/output port and to receive a transmission gate signal; wherein the switch control unit is arranged to control the switch to adopt the first state upon receipt of the transmission gate signal, and, subsequently, to control the switch to adopt the second state when the monitored radio frequency power falls below a threshold level. |
| US09692582B2 |
Systems and methods for signaling reference configurations
A user equipment (UE) for receiving time-division duplexing (TDD) uplink/downlink (UL/DL) configurations is described. The UE includes a processor and instructions stored in memory that is in electronic communication with the processor. The UE receives a primary TDD UL/DL configuration for a serving cell and reconfiguration information. The UE determines a downlink (DL)-reference TDD UL/DL configuration based on the primary TDD UL/DL configuration and the reconfiguration information. The UE determines an uplink (UL)-reference TDD UL/DL configuration based on the primary TDD UL/DL configuration and the reconfiguration information. The UE performs Physical Downlink Shared Channel (PDSCH) operations based on the DL-reference TDD UL/DL configuration. The UE performs Physical Uplink Shared Channel (PUSCH) operations based on the UL-reference TDD UL/DL configuration. |
| US09692574B2 |
Methods and devices for detecting control signaling and implementing control signaling detection
A method and device for detecting control signaling and a method and device for implementing control signaling detection are provided, wherein blind detection times or the amount of enhanced Physical Downlink Control Channels (ePDCCH) allocated by each ePDCCH resource set is determined, so that the ePDCCH needed to be detected in each ePDCCH resource set can be determined. |
| US09692571B2 |
Signaling of non-virtual reference signals in coordinated multipoint communication
A first cell transmits a virtual cell identifier and state information associated with the virtual cell identifier over an interface to a second cell. The first cell and one or more third cells use the virtual cell identifier for transmissions to first user equipment. The state information indicates one of a plurality of states that indicate whether the virtual cell identifier is associated with at least one non-virtual reference signal for the first cell, the second cell, or one or more third cells. The second cell receives the virtual cell identifier and the state information and transmits the virtual cell identifier and state information over an air interface to second user equipment served by the second cell. The second user equipment performs interference cancellation or suppression of transmissions to the first user equipment based on the virtual cell identifier and the state information. |
| US09692567B1 |
Targeted service request for small data communication in a network environment
An example method for targeted service request for small data communication in a network environment is provided and includes receiving an extended service request indicating an evolved packet system (EPS) bearer identity for small data communication over a packet data network connection including one or more EPS bearers, where the one or more EPS bearers includes at least one small data bearer configured for small data communication, selectively activating the small data bearer, and facilitating the small data communication. In specific embodiments, the one or more EPS bearers includes a default EPS bearer and one or more dedicated EPS bearers, where the small data bearer is the default EPS bearer. In other embodiments, the one or more EPS bearers includes a default EPS bearer and one or more dedicated EPS bearers, where the small data bearer is one of the dedicated EPS bearers. |
| US09692564B2 |
Downstream external physical interface transport in DOCSIS 3.1 network environments
An example method for Downstream External Physical Interface (DEPI) in Data Over Cable Service Interface Specification (DOCSIS) 3.1 network environments is provided and includes generating, at a Converged Cable Access Platform (CCAP) core, a DEPI-Packet Streaming Protocol (PSP) pseudo-wire (PW) packet including a PSP sub-layer header having a same length for a Quadrature Amplitude Modulation (QAM) channel and an Orthogonal Frequency-Division Multiplexing (OFDM) channel in the DOCSIS network environment, and transmitting the DEPI-PSP PW packet over a DEPI interface to a remote physical layer (R-PHY) entity. |
| US09692563B2 |
Upstream contention measurement reporting and mitigation in DOCSIS remote PHY network environments
An example method for upstream contention measurement and reporting in Data Over Cable Service Interface Specification (DOCSIS) remote physical layer (R-PHY) network environments is provided and includes receiving, at a Converged Cable Access Platform (CCAP) core from a R-PHY node over a converged interconnect network (CIN) in the DOCSIS R-PHY network environment, an indication of a collision level in an upstream network between the R-PHY node and a plurality of cable modems (CMs), calculating a congestion level in the upstream network based on the collision level indicated by the R-PHY node, adjusting back-off window parameters for cable modem retransmissions based on the calculated congestion level, and adjusting a contention transmission opportunity density in a downstream Media Access Protocol (MAP) message based on the adjusted back-off window parameters. |
| US09692561B2 |
Method of handling soft buffer size for a transport block and related communication device
A method of determining a soft buffer size for a transport block comprises determining a basic unit for the soft buffer size according to a legacy soft buffer size for the transport block and a first parameter, and determining the soft buffer size for the transport block according to the basic unit and a second parameter. |
| US09692559B1 |
Systems and methods for a multiple-input-multiple-output (MIMO) data transmission scheme using a space time block code (STBC)
Systems and methods described herein provide a system for transmitting data on an MIMO channel using a STBC. The system comprises a wireless transmitter. The wireless transmitter obtains plurality of data symbols to transmit, and performs data padding for the plurality of data symbols based on a non-STBC manner. The wireless transmitter further calculates a number of bits per data symbol after the data padding and pre-codes a data symbol from the plurality of data symbols based on available channel information when the number of data symbols is an odd number. The wireless transmitter generates an STBC based on the pre-coded data symbols, and transmits the generated STBC to the MIMO channel. |
| US09692547B2 |
Optical wavelength automatic adaptation of transceivers
In some aspects, an example method may include receiving, at a receiver of a first optoelectronic module, a loss of signal indicator from a second optoelectronic module that is remote from the first optoelectronic module. The method may include iteratively cycling through transmission of optical signals on a plurality of wavelength channels to the second optoelectronic module until the loss of signal indicator terminates in response to receiving the loss of signal indicator. The method may include continuing to transmit the optical signal on a particular one of the plurality of wavelength channels in response to the loss of signal indicator terminating while transmitting an optical signal on the particular one of the plurality of wavelength channels. |
| US09692545B2 |
Optical reception apparatus and monitor signal generating method
An optical reception apparatus (1) of the present invention includes: a local oscillator (11) outputting local oscillation light (22); an optical mixer (12) receiving a multiplexed optical signal (21) and the local oscillation light, and selectively outputting an optical signal (23) corresponding to the wavelength of the local oscillation light from the multiplexed optical signal; a photoelectric converter (13) converting the optical signal (23) output from the optical mixer into an electric signal (24); a variable gain amplifier (15) amplifying the electric signal (24) to generate an output signal (25) whose output amplitude is amplified to a certain level; a gain control signal generating circuit (16) generating a gain control signal (26) for controlling the gain of the variable gain amplifier (15); and a monitor signal generating unit (17) generating a monitor signal (27) corresponding to the power of the optical signal (23) using the gain control signal (26). |
| US09692536B2 |
Method and apparatus for sending notification about broadcast service in a mobile broadcast system
A method and apparatus for transmitting a notification about broadcasting services in a broadcasting system are provided. The method includes detecting a notification event related to a broadcasting service; generating a notification message about the notification event; determining which channel is used for a transmission of the notification message; and transmitting the notification message to a terminal or a group of terminals over the determined channel. |
| US09692535B2 |
Methods and apparatus for automatic TV on/off detection
Methods and apparatus are disclosed for automatic TV ON/OFF detection. An example method includes detecting a power state of an information presentation device. The method includes comparing, using a processor, a measurement indicative of an amount of power drawn by the information presentation device to a first threshold. The method also includes comparing the measurement to a second threshold. The method also includes storing an indication that the information presentation device is in an indeterminate state if the measurement is greater than the first threshold and less than the second threshold. |
| US09692534B2 |
Cellular communication system, communication units, and method for broadcast and unicast communication
A method and apparatus supporting broadcast and unicast transmissions in a wireless communication system including plural communication cells. A first method includes: supporting one broadcast transmission in one sub-frame of a physical resource; the one broadcast transmission includes broadcast data using a first cell identifier and supporting transmission of unicast control information using a second cell identifier in the one sub-frame of the physical resource, the first and second cell identifiers being different. A second method includes: supporting one time discontinuous broadcast transmission in one sub-frame of a radio frame of a physical resource; and supporting transmission of unicast control information in plural time-continuous sub-frames of the radio frame of the physical resource; the one sub-frame used for the one time discontinuous broadcast transmission including a first duration less than a second duration used in the plural sub-frames of the radio frame for transmitting unicast control information. |
| US09692531B2 |
Method and system of measuring communication quality
Methods and systems of measuring communication quality are provided, by which measurement schedules of communication quality can be managed and controlled easily. A plural measurement-time slot is set with respect to a communication line used for communication quality measurements between a plural communication terminal apparatus via a mobile communication network, wherein each measurement-time slot has a time corresponding to one measurement of communication quality and the plural measurement-time slot is continuously arranged at a predetermined period, and a plural measurement schedule for measuring communication quality in each of communications with the plural communication terminal apparatus to the plural measurement-time slot. Information of the measurement schedule for each of the plural communication terminal apparatus is delivered to each communication terminal apparatus, and a communication for the communication quality measurement with the communication terminal apparatus corresponding to the measurement schedule via the communication line is performed when the time of measurement schedule comes. |
| US09692530B2 |
Active antenna system and methods of testing
An active antenna test system is described. The active antenna test system comprises an active antenna unit comprising: a plurality of antenna elements; at least one processor; a plurality of transceiver modules operably coupled to the at least one processor and arranged to receive at least one first baseband signal for transmission via at least one of the plurality of antenna elements and arranged to pass at least one second baseband signal thereto received and down-converted from at least one of the plurality of antenna elements; and at least one switching module operably coupling the plurality of antenna modules to the plurality of transceiver modules. The active antenna test system also comprises at least one communication test equipment, such as a radio frequency, RF, test module and at least one baseband processor. The active antenna unit further comprises at least one externally connectable radio frequency, RF, test port operably coupled to the at least one switching module and arranged to externally couple the at least one communication test equipment to at least one of the plurality of transceiver modules for conductive testing. |
| US09692526B2 |
Body coupled communication devices and systems as well as a design tool and method for designing the same
Based on new insights in body coupled communication systems, herein a design tool for designing a body coupled communication apparatus, and products for use in body coupled communication systems are provided herein. |
| US09692516B2 |
Optical transceiver and optical communications product
An optical transceiver, including a coupling assembly and a condensing assembly, is provided. The coupling assembly includes a first surface and a second surface; and multiple first lenses are disposed on the first surface. The condensing assembly includes a fastener, multiple filters, a reflector, and a light passing region; the condensing assembly is fastened to the second surface; the filters are optically aligned with the first lenses separately; the coupling assembly receives light of different wavelengths; and the light of different wavelengths enters the fastener through the multiple filters and is multiplexed or demultiplexed by the reflector and the filters, and multiplexed or demultiplexed light enters the coupling assembly through the light passing region. The optical transceiver provided in the present invention has advantages of low power consumption and high coupling efficiency. |
| US09692506B2 |
Infrared repeater
An IR repeater includes a receiver portion for receiving an IR light signal representing a coded command modulated by a modulating signal and a transmitter portion, electrically coupled to the receiver portion to generate an IR light signal corresponding to the coded signal received by the receiver portion. A mounting structure mounts the receiver portion outside an opaque object and mounts the transmitter portion inside the opaque object. |
| US09692505B2 |
Rogue optical network interface device detection
Techniques are described for identifying a rogue network interface device whose laser is not under control of a controller of the network interface device. The techniques identify the rogue network interface device based on reception of a predefined data pattern in a timeslot that is not reserved for any of the network interface devices without needing to disable upstream data transmission from the network interface devices during their assigned timeslots. The techniques also relate to a network interface device determining whether the network interface device is transmitting optical signals at a wavelength different than the wavelength that the OLT to which the network interface device is associated receives. |
| US09692501B1 |
Programmable data network for mobile parking area system and related method
The present invention is directed to a system and related method providing high speed wireless data connectivity between a vehicle and a temporary stationary location for the vehicle. The system comprises at least three steerable antennas configured for transmission and reception of a broadband RF signal. A first antenna is mounted to the temporary stationary location to send and receive data from one data source available to the system. A second steerable antenna mounted near the temporary location and third steerable antenna mounted to the vehicle provides a communication link between the temporary location and the vehicle. The systems disclosed herein may enable a RF node capable of accepting fiber, cable and satellite modem inputs and communicating wireless gigabit data to a transceiver on the vehicle. |
| US09692499B2 |
Terrestrial based air-to-ground communications system and related methods
An air-to-ground communications system includes at least one base station to be positioned on the ground and including a ground-based transceiver, a phased array antenna coupled to the ground-based transceiver, and a beamforming network coupled to the ground-based transceiver. The ground-based transceiver is configured to provide data traffic and control information to an aircraft. The beamforming network is configured to simultaneously generate at least one narrow antenna beam for the data traffic and at least one wide beam for the control information. |
| US09692498B2 |
Extending wireless signal coverage with drones
Example methods, apparatus, systems and articles of manufacture (e.g., physical storage media) to extend wireless signal coverage with drones are disclosed. Example methods disclosed herein to extend wireless signal coverage include determining whether a status of a wireless communication link being received at a first device from a second device meets a trigger condition. Such disclosed example methods also include, after determining the status meets the trigger condition, deploying a drone to a target location determined based on a first device location associated with the first device and a second device location associated with the second device, the drone being equipped with a signal extender capable of extending the wireless communication link. |
| US09692494B2 |
Dynamic switching between wireless multiple access schemes
Methods, systems, and apparatuses are described for dynamic switching between wireless multiple access schemes. In some aspects, a plurality of characteristics corresponding to a respective plurality of transmit/receive beam forming direction pairs of a wireless communication channel may be identified, and a wireless multiple access schemes used for communication in the wireless communication channel may dynamically be switched based at least in part on the identified plurality of characteristics, the wireless multiple access schemes comprising orthogonal frequency division multiple access (OFDMA) and single-carrier frequency division multiple access (SC-FDMA). |
| US09692492B2 |
Method and apparatus for modulating baseband signal in beam space multi-input multi-output, and method for receiving therein
A modulation method of a baseband signal, an apparatus thereof, and a receiving apparatus thereof in a beam space MIMO are disclosed. The baseband signal modulation apparatus may calculate a load value of a plurality of antenna elements by using the baseband signal. Also, the baseband signal modulation apparatus may change the phase or the magnitude for the baseband signal or a first band signal of a higher frequency than the baseband signal by corresponding to the frequency of the baseband signal. |
| US09692490B2 |
Radiofrequency map creation for data networks
A Next Generation Data Network is described. It leverages the “cloud” for data management, frequency data computation and analytics. Training signals are transmitted in a number of different transmit directions and attempted to be received in a number of different receive directions in order to create a radio frequency map of transmit/receive directions that allow a communication path to be created between nodes of the network. The wireless network is a single frequency network that permits limited non-line-of-sight operation. |
| US09692488B2 |
Waveguide for near field communication
A computing device comprises a head that can be physically attached to a base. The head may be capable of functioning as a type of computing device independent of the base. The base may include a base transceiver to receive data from a first component of the base, encode the data into a signal, and transmit the signal. The base may include a base waveguide to guide the signal to a head waveguide of the head. The head may include a head transceiver to receive the signal from the head waveguide, decode the data from the signal, and send the data to a second component of the head. |
| US09692484B2 |
Optimized PHY frame structure for OFDM based narrowband PLC
A method of operating a communication system is disclosed. The method includes forming a data frame having plural orthogonal frequency division multiplex (OFDM) symbols. A first set of preamble subcarriers is allocated to at least one of the OFDM symbols. A second set of data subcarriers is allocated to said at least one of the OFDM symbols. |
| US09692482B2 |
System and method to reduce crosstalk of digital subscriber lines
A method includes identifying, at a processor, a set of communication lines from a plurality of communication lines, the set of communication lines including a first communication line and a second communication line. A first crosstalk characteristic of the first communication line is correlated with a second crosstalk characteristic of the second communication line. The method also includes modifying, at the processor, a first signal corresponding to the first communication line based on a second signal corresponding to the second communication line. |
| US09692479B2 |
Radio-frequency switch decoder
A decoder for a radio-frequency module includes a control signal output, first control signal generator circuitry configured to receive an input signal indicating an operational state of a radio-frequency core communicatively coupled to the decoder, and generate an output control signal for controlling one or more radio-frequency devices of the radio-frequency core, second control signal generator circuitry configured to generate an intermediate output signal, and transition detection circuitry configured to receive a least a portion of the input signal and selectively provide the intermediate output signal on the control signal output when the input signal indicates a transition of the radio-frequency core for a first operational state of a first group of operational states to a second operational state of a second group of operational states. |
| US09692474B2 |
Mobile phone glove
A method and apparatus for managing a mobile phone. In one illustrative example, an apparatus comprises a garment having a glove-type shape, a pocket attached to a side of the garment, and a receptacle for holding a mobile device that has a touchscreen. The receptacle is attached to the garment through the pocket. The receptacle is comprised of a material that enables a user to interact with the touchscreen of the mobile device. |
| US09692473B2 |
Offset compensation in a receiver
Aspects of this disclosure relate to compensating for an offset in a receiver. In one embodiment, the receiver comprises a mixer, a feedback amplifier, and an offset correction circuit. The offset correction circuit can generate an indication of an offset in a differential input to the feedback amplifier and apply an offset compensation signal at an offset compensation node. The offset compensation node can be in a signal path of the feedback amplifier. Such offset compensation can reduce or eliminate leakage from a local oscillator at an input port of the mixer and/or at an antenna port of the receiver. |
| US09692472B2 |
Radio receiver with local oscillator modulation
An antenna subsystem receives an analog desired signal, noise, and interference via a communication channel. The desired signal includes modulated encoded digital information. A local oscillator (LO) modulation subsystem generates a modulated LO. The LO modulation subsystem generates a modulated LO to maximize the symbol signal-to-noise ratio of the decoded digital information based on a plurality of: the desired signal, the interference and the noise expected in the communication channel, the characteristics of the converter, and the ability of the DSP to remove the Modulated LO from the converted signal. A mixer mixes the received signal and the modulated LO. A converter converts the mixed signal from analog to digital. A digital signal processor (DSP) removes the modulated LO and desired signal modulation, and decodes the desired signal encoded digital information. |
| US09692468B2 |
Spectrum scrubber
A method of enhancing wireless communication performance includes receiving information indicative of a local interferer where the local interferer is identified based on dynamic position information indicative of a position of at least one mobile communication node, performing noise cancellation relative to a received signal by removing an interference signal associated with the local interferer to generate a scrubbed signal, and providing the scrubbed signal for additional signal processing. |
| US09692466B2 |
Radio reception circuit, radio reception method, and radio reception program
A radio reception circuit that allows for preventing the S/N ratio from being degraded due to the spurious of high-output adjacent channel signals, comprises: a variable bandpass filter for passing one of received signals that has a particular frequency and that is of a particular bandwidth; a demodulation circuit for demodulating the received signal having passed through the variable bandpass filter, thereby outputting an ultimate output signal; a frequency characteristic table that stores a plurality of different parameters about frequencies and bandwidths in advance; an S/N ratio measurement circuit for calculating the S/N ratio of the output signal in a case where one of the plurality of different parameters is applied to the variable bandpass filter; and a control unit for setting, to the variable bandpass filter, a parameter, for which the best S/N ratio can be obtained, out of the plurality of different parameters. |
| US09692464B1 |
Signal transmitter capable of reducing noise
A signal transmitter includes a modulation circuit, a signal separation circuit, and a signal combining circuit. The modulation circuit modulates a first signal to a modulated signal. The signal separation circuit separates the modulated signal into N separated signals. The N separated signals have different phases. The signal combining circuit combines the N separated signals to eliminate at least one order of harmonic signals of the N separated signals so as to generate an output signal. |
| US09692462B2 |
Transmitter and method for lowering signal distortion
A transmitter includes a first pre-distortion circuit, a second pre-distortion circuit, a transmitting circuit and a pre-distortion parameters generating circuit. The first pre-distortion circuit uses a plurality of first pre-distortion parameters to perform a pre-distortion operation upon a first input signal to generate a pre-distorted first input signal. The second pre-distortion circuit uses a plurality of second pre-distortion parameters to perform a pre-distortion operation upon a second input signal to generate a pre-distorted second input signal. The transmitting circuit is arranged to process the pre-distorted first input signal and the pre-distorted second input signal to generate an output signal. The pre-distortion parameters generating circuit generates the first pre-distortion parameters and the second pre-distortion parameters according to the first input signal, the second input signal and the output signal. |
| US09692459B2 |
Using multiple frequency bands with beamforming assistance in a wireless network
A communication device communicates with other communication devices in a wireless network using a first and a second frequency band. In accordance with some embodiments, inter-band beamforming assistance may be provided by the lower frequency band. |
| US09692458B2 |
Software programmable cellular radio architecture for telematics and infotainment
A cellular radio architecture for a vehicle that includes a programmable bandpass sampling radio frequency front-end and an optimized digital baseband. The architecture includes a triplexer having signal paths that include a bandpass filter that passes a different frequency band than the other bandpass filters and a circulator that provides signal isolation between the transmit signals and the receive signals. The architecture also includes a receiver module having a separate signal channel for each of the signal paths in the triplexer, where each signal channel in the receiver module includes a receiver delta-sigma modulator that converts analog receive signals to a representative digital signal. The architecture further includes a transmitter module having a transmitter delta-sigma modulator for converting digital data bits to analog transmit signals, where the transmitter module includes a power amplifier and a switch for directing the transmit signals to one of the signal paths in the triplexer. |
| US09692456B1 |
Product coded modulation scheme based on E8 lattice and binary and nonbinary codes
A transceiver architecture can contain an encoder and a decoder for communicating high speed transmissions. The encoder can modulate signal data based on a product code of an E8 lattice based on binary and non binary codes that creates an extended Hamming code of a multi-level structure of E8 with four bit estimates. During decoding the multi-level E8 decoding is performed on the Hamming code and then row decoding and column decoding are performed. Then lattice decoding is performed on the output of the row and column decoding. This decoding process can be iteratively performed a predetermined number of times until the encoded bits are decoded. |
| US09692448B1 |
Split chip solution for die-to-die serdes
An SoC integrated circuit package is provided in which the analog components of a SerDes for an SoC die in the SoC integrated circuit package are segregated into a SerDes interface die in the SoC integrated circuit package. |
| US09692445B1 |
Sigma-delta modulator for generating a sinusoidal signal
A system includes a storage device containing machine instructions and a plurality of digital values of an oversampled sinuisoidal signal. The system also includes a core coupled to the storage. The core is configured to execute the machine instructions, wherein, when executed, the machine instructions cause the core to implement a sigma-delta modulator that retrieves the plurality of digital values from the storage device as input to the modulator. The sigma-delta modulator is configured compute an output bit stream. The system further includes an analog filter configured to receive the output bit stream from the core and to low-pass filter the output bit stream to produce a sinusoidal output signal. |
| US09692442B1 |
Digital-to-analog converter with a sample and hold circuit and a continuous-time programmable block
A device, system, and method of a programmable circuit configured to operate in a buffered drive mode and blanking mode is disclosed. The programmable circuit includes a continuous-time digital-to-analog converter (CTDAC), a continuous-time block (CTB), coupled to the CTDAC, and a sample and hold (SH) circuit coupled to the CTDAC and the CTB. The programmable circuit is configured to operate in a buffered drive mode to buffer an output signal from the CTDAC. The programmable circuit, in buffered drive mode, is further configured to operate in a blanking mode to cause the SH circuit to perform a blanking operation on the CTDAC output signal. |
| US09692440B1 |
Circuit for generating a reference current proportional to square of clock frequency
An analog-to-digital conversion system, in some embodiments, comprises: a plurality of integrators coupled to each other, each of said integrators requiring a reference current; and a reference current generation circuit that generates said reference current for the plurality of integrators, the reference current is proportional to the square of the frequency of a clock signal of the reference current generation circuit. |
| US09692438B2 |
Signal processing, amplification module, an analog to digital converter module
The present invention provides a signal-processing circuit including an amplification module and an analog-to-digital conversion module, wherein the amplification module includes a first input terminal for receiving an input signal, a second input terminal for receiving a reference signal, and an output terminal coupled to the analog-to-digital conversion module. Furthermore, the input signal and the reference signal are amplified by the amplification module individually, and an amplified signal is output to the analog-to-digital conversion module through the output terminal, and then the amplified signal undergoes analog-to-digital conversion by the analog-to-digital conversion module. The first amplification coefficient of which the input signal is amplified by the amplification module and the second amplification coefficient of which the reference signal is amplified by the amplification module are opposite in sign. The voltage range of the amplified signal is substantially equal to the scale of the analog-to-digital conversion module. |
| US09692435B2 |
Digital-to-analog converter (DAC) with digital offsets
Systems and methods are provided for digital-to-analog converter (DAC) with digital offsets. A digital offset may be applied to an input of a digital-to-analog converter (DAC), and digital-to-analog conversions are then applied via the DAC to the input with the digital offset. The digital offset is set to account for one or more conditions relating to inputs to the DAC, with the one or more conditions affect switching characteristics of one or more of a plurality of conversion elements in the DAC, and where each conversion element handles a particular bit in inputs to the DAC. The digital offset may be determined dynamically and adaptively, such as based on the input and/or conditions relating to the input. Alternatively, the digital offset may be pre-determined and fixed. One or more adjustments may be selectively applied to the digital offset for particular input conditions. |
| US09692434B2 |
Analog to digital converter
An analog to digital converter includes an analog input and a voltage comparator coupled to the analog input for comparing a voltage at the analog input to a digitally synthesized waveform. A digital to analog converter (DAC) generates the digitally synthesized waveform. The DAC includes a plurality of capacitors selectively connected in parallel wherein the period between the selection of capacitors is less than the settling time of the voltage across the capacitors. |
| US09692429B1 |
Systems and methods involving fast-acquisition lock features associated with phase locked loop circuitry
Systems and methods are disclosed relating to fields of clock/data acquisition or handling, such as clock/data locking and the like. In one exemplary implementation, phase lock loop (PLL) circuitry may comprise voltage controlled oscillator (VCO) circuitry, phase frequency detector, converting circuitry, and frequency detector (FD) circuitry that outputs a frequency difference signal proportional to frequency difference between frequencies of a feedback clock signal and a reference clock signal. |
| US09692419B2 |
Compact logic evaluation gates using null convention
Compact logic evaluation gates are built using null convention logic (NCL) circuits. The inputs to a null convention circuit include a NCL true input and a NCL complement input. The NCL circuit includes a gate coupled to the pair of inputs, where the gate comprises a plurality of transistors. The transistors allow for logical signal capture, provide a pair of cross-coupled inverters for data storage, and include a first and second pull-down device. The first pull-down device causes a first side of the pair of cross-coupled inverters to go to a “0” state when a “1” is applied to the NCL true input, and the second pull-down device causes a second side of the pair of cross-coupled inverters to go to a “0” state when a “1” is applied to the NCL complement input. |
| US09692414B2 |
Crowbar current elimination
In one embodiment, an inverter generates an inverted clock signal using (i) first P-type and N-type transistors connected in cascode between supply and ground nodes and (ii) control circuitry receiving different phase-offset input clock signals that ensure that the cascode-connected transistors are never even partially on at the same time, thereby preventing crowbar current from occurring through the cascode-connected devices. In one implementation, the control circuitry has two P-type transistors and two N-type transistors configured to receive three phase-offset input clock signals to prevent crowbar current in the inverter. The control circuitry has pass transistors that selectively allow one of the phase-offset input signals to be applied to the gate of one of the cascode-connected transistors with minimal delay, thereby enabling the inverter to operate properly over a relatively wide range of input clock frequencies. |
| US09692413B2 |
Configurable exclusive-OR / exclusive-NOR gate using magneto-electric tunnel junctions
A configurable ME MTJ XOR/XNOR gate includes an insulator separating a top and bottom FM layer, a top ME layer with a first boundary magnetism at an interface of the top ME layer and the top FM layer, a bottom ME layer with a second boundary magnetism at an interface of the bottom ME layer and the bottom FM layer, and a top electrode coupled to the top ME layer and a bottom electrode coupled to the bottom ME layer. A voltage between the top electrode and FM layer is a first input, a voltage between the bottom electrode and FM layer is a second input, and a resistance between the top and bottom FM layer is indicative of the XOR or the XNOR of the inputs. The configurable ME MTJ XOR/XNOR gate has reduced energy consumption, smaller area, faster switching times, is non-volatile, and is configurable. |
| US09692410B2 |
Semiconductor switch
In an embodiment, semiconductor switch includes first switches switching conduction between input-output nodes and a common node. One of the first switches includes a plurality of first transistors connected in series between an input and output node and the common node. Each of the plurality of first transistors includes first gate electrodes, a second gate electrode, a first and second region in a semiconductor layer having a same conduction type. The first gate electrodes extend in parallel in a first direction. The second gate electrode extending in a direction crossing the first direction and is connected to one end of the first gate electrodes. The second region in the semiconductor layer is disposed on a side of the second gate electrode opposite to the first gate electrodes. |
| US09692398B2 |
Apparatuses and methods for voltage buffering
An apparatuses and methods for buffering a voltage from a circuit without current drive ability are described. An example apparatus includes a voltage buffer that includes two identical stages. The first stage is configured to receive an input voltage and produce an intermediate voltage as an output. The second stage is configured to receive the intermediate voltage and provide an output voltage that is equal to the input voltage. The voltage buffer may be coupled to a current source. The second stage of the voltage buffer may have current drive ability. |
| US09692396B2 |
Ring oscillator architecture with controlled sensitivity to supply voltage
A method and apparatus for controlling a supply sensitivity of a ring oscillator stage are provided. The apparatus is configured to generate, via a voltage biasing module, a first bias signal for a PMOS biasing module based on a supply voltage and a second bias signal for a NMOS biasing module based on the supply voltage, bias, via the PMOS biasing module, triode PMOS degeneration of the inverting module based on the first bias signal, bias, via the NMOS biasing module, triode NMOS degeneration of the inverting module based on the second bias signal, receive an input via an inverting module, and output, via the inverting module, an inverted version of the received input based on the biased triode NMOS degeneration and the biased triode PMOS degeneration. |
| US09692395B2 |
Frequency divider, clock generating apparatus, and method capable of calibrating frequency drift of oscillator
A clock generating apparatus includes an oscillator and a frequency synthesizer. The oscillator is utilized for generating a reference clock signal. The frequency synthesizer is coupled to the oscillator and utilized for synthesizing a target clock signal in accordance with the reference clock signal and a frequency division factor that has been adjusted or compensated, and outputting the target clock signal as an output of the clock generating apparatus. |
| US09692393B2 |
Radio communication receiver apparatus and method
A radio communication receiver apparatus is configured to process multiple radio frequency bands in a telecommunication system. The apparatus includes a plurality of digital receiver chains wherein each digital receiver chain is coupled to receive a digital representation of the multiple radio frequency bands, including a particular radio frequency band for processing by the respective digital receiver chain. Each digital receiver chain includes a digital receiver that is programmable to select a particular radio frequency band from the digital representation of the multiple radio frequency bands, and configured to down convert the selected radio frequency band into a digital baseband signal associated with the particular radio frequency band. Built in calibration is provided by operation of direct radio frequency technology. |
| US09692391B2 |
Adjustable compensation ratio feedback system
Apparatus for implementing Adjustable Compensation Ratio (ACR) active shielding or control of physical fields (magnetic, electric, electromagnetic, acoustic, etc.), comprising the addition of a secondary internal feedback loop within a conventional primary closed feedback loop topology. Compensation-ratio transfer function order and coefficients adjustment permits accommodating frequency-dependent and frequency-independent effects within a Protected Volume when a system field sensor or sensor array is not at the exact location where external field interference must be optimally canceled. A Laplace polynomial term precisely sets this parameter in a supplementary feedback link by modeling the frequency-dependent characteristic of an Interacting Medium without deleterious effect on other desirable primary closed-loop characteristics. The inventive ACR can be used in advanced active cancellation for magnetic shielding purposes. |
| US09692390B2 |
Filter device having a wiring electrode located in a different acoustic portion
A filter device includes a piezoelectric substrate, an IDT arranged on a major surface of the piezoelectric substrate to define a surface acoustic wave resonator, a wiring electrode that is electrically connected to the IDT, and an acoustic member located on a major surface of the piezoelectric substrate near or adjacent to the IDT and that has an acoustic impedance different from that of the piezoelectric substrate. The wiring electrode that is to be disposed in the vicinity of the IDT is located on the acoustic member. |
| US09692383B2 |
Gain optimized equalizer
The invention is directed to determining a gain for an equalizer associated with an audio device. An exemplary method comprises determining a maximum audio output level allowed by an acoustic safety threshold; determining a setting of the equalizer; and adjusting a gain of the equalizer based on the setting and the maximum audio output level. The invention enables an audio device to simultaneously satisfy an acoustic safety threshold and deliver an optimum audio output level. |
| US09692380B2 |
Dynamic volume adjustment
Systems and techniques are provided for dynamic volume adjustment. A signal including a detected distance to a person may be received from a proximity sensor of a smart home environment. A volume adjustment for a speaker of the smart home environment may be generated based on the detected distance to the person and a sound level associated with the detected distance to the person. The volume of the speaker may be adjusted based on the volume adjustment. A signal from a sensor of the smart home environment indicating that the sensor has been tripped may be received. The proximity sensor may be triggered based on the received signal indicating the sensor has been tripped to detect a distance to the person to generate the detected distance. An alarm may be sounded through the speaker. |
| US09692378B2 |
Programmable gain amplifier with analog gain trim using interpolation
Disclosed examples include programmable gain amplifier (PGA) circuits with an operation amplifier circuit having a first amplifier input and a second amplifier input including a plurality of second input nodes, a resistor array including a plurality of resistor sections connected in series with one another between the amplifier output and a reference voltage node, and a trim select circuit coupled between the second amplifier input and the resistor array circuit to deliver a feedback voltage signal to each individual one of the second input nodes from a given selected one of a plurality of the tap points of the resistor array circuit according to a trim code to provide analog gain trimming by interpolation. |
| US09692374B2 |
Differential amplifier circuit and display drive circuit
A differential amplifier circuit and display drive circuit having the same are disclosed herein. In one example, a differential amplifier circuit includes a differential pair transistor configure to receive a differential input signal. A current source is connected in series to the differential pair transistor and an output transistor that drives an output terminal on the basis of the differential input signal. The output transistor is configured to increase a current value of a current source on the basis of a timing at which a voltage level of the output terminal is caused to transition. The output transistor is configured to drive the output terminal only during a period in which the output terminal is caused to transition, and thus a slew rate is improved by increasing a bias current of the differential pair transistor in the period. |
| US09692371B2 |
Current feedback output circuit
The current feedback output circuit includes first and second transistors. The current feedback output circuit includes a current amplifier that has a non-inverting input terminal, an inverting input terminal, a first output terminal and a second output terminal, an input impedance of the non-inverting input terminal being higher than an input impedance of the inverting input terminal, and flows a current obtained by amplifying the difference between a current of an input signal to the non-inverting input terminal and a current input to the inverting input terminal between the first output terminal and the second output terminal. The current feedback output circuit includes first to sixth current mirror circuits. The current feedback output circuit includes a current feedback circuit that supplies a current responsive to a voltage at the signal output terminal to the inverting input terminal. |
| US09692368B2 |
Dual-band low noise amplifier
An apparatus includes amplification circuitry configured to amplify a radio frequency (RF) signal. The apparatus also includes differential inductors coupled to an output of the amplification circuitry. The differential inductors include a first inductor serially coupled to a second inductor, and the differential inductors are configured to filter the RF signal and to provide a differential output. |
| US09692366B2 |
Envelope tracking path delay fine tuning and calibration
A power amplifier of an envelope tracking system is configured to generate an output power with a variable supply voltage that is generated in an envelope tracking path. A signal generation/processing path receives an input signal and processes the input signal to the power amplifier in a main signal processing path. A delay component is configured to generate a delay to the envelope tracking path with respect to the signal generation path. A feedback path is configured to generate a feedback signal from the output of the power amplifier and adjust the delay component or the delay of the delay component during an active transmission or an active transmission mode. |
| US09692361B2 |
Doherty amplifier
A two-way Doherty amplifier for amplifying a modulated or non-modulated carrier signal, said carrier signal having a carrier frequency; wherein the Doherty amplifier comprises a first amplifier having a first amplifier output node, a second amplifier having a second amplifier output node, a combining node connected or connectable to a load, a first amplifier output line connecting the first amplifier output node to the combining node, and a second amplifier output line connecting the second amplifier output node to the combining node, and wherein the first amplifier output line has an electrical length of substantially one quarter wavelength of the carrier signal and the second amplifier output line has an electrical length of substantially one half wavelength of the carrier signal. |
| US09692353B2 |
Solar cell system and solar cell module
A solar cell system includes a bifacial solar cell module which is to be installed tilted relative to a horizontal plane with one edge in an upper position and another edge in a lower position, the solar cell module including: a solar panel which has a solar cell array region in which a plurality of solar cells are disposed; and a frame which includes portions surrounding a periphery of the solar panel, wherein the solar cell array region is formed in such a manner that a first distance between the solar cell array region and the portion of the frame along the other edge of the solar cell module is greater than a second distance between the solar cell array region and the portion of the frame along the one edge of the solar cell module. |
| US09692351B2 |
Protective device for vehicle inverter
This invention provides a protective device for a vehicle inverter, with which an inverter element can be protected from overheating while preventing a reduction in drivability. The protective device for a vehicle inverter includes a maximum element temperature calculation unit that calculates a maximum element temperature among respective element temperatures of the inverter, and an element temperature output limit coefficient calculation unit that calculates an output limit value corresponding to the maximum element temperature, sets a current output limit value as a current output limit coefficient when the current output limit value is smaller than a preceding output limit coefficient, and sets, as the current output limit coefficient, a value obtained by adding a predetermined value determined in advance to the preceding output limit coefficient when the current output limit value equals or exceeds the preceding output limit coefficient. |
| US09692350B2 |
Electrical rotating machine controller
An ECU, which acts as a “electrical rotating machine controller”, controls driving of a motor unit having two winding sets. In the ECU, components having different heat dissipation properties are used as switching elements between two systems of inverters (electric power conversion circuit). For example, “component X” is used as switching elements of a first inverter acting as a “normal circuit”, and “component Y” which has superior heat conductivity is used as switching elements, different from the switching elements of the first inverter, of a second inverter acting as a “particular circuit”. As a result, the switching element (component Y) of the second inverter is more likely to have a longer lifespan than the switching element (component X) of the first inverter. Accordingly, the likelihood of both systems failing at the same time may be reduced. |
| US09692349B2 |
Method, apparatus and system for controlling vehicle motor based on motor stall detection
A method, an apparatus and a system for controlling a motor based on motor stall detection are provided. The method includes driving the motor based on an external control signal and receiving information regarding an output voltage of the motor at a predetermined motor detection cycle from a sensor that corresponds to the motor. A bottom value is set by comparing a level of the received output voltage of the motor with a preset limit value and the limit value is changed to the set bottom value when the level of the received output voltage of the motor exceeds the limit value a predetermined number of times corresponding to a predetermined threshold value. Therefore, the present invention has an advantage of adaptively operating a motor based on characteristic change of the motor due to operation durability and external environment change. |
| US09692346B2 |
Control apparatus for electric power inverter
An inverter control apparatus performs PWM control of a 3-phase inverter connected to a rotary machine, by operating switching devices corresponding to respective phases. In each of successive processing periods, the PWM control is applied such as to satisfy first and second conditions. The first condition is that the state of switching devices corresponding to a highest-voltage phase of the inverter during the processing period is held fixed throughout the processing period. The second condition is that switching devices corresponding to a lowest-voltage phase of the inverter undergoes a greater number of switching operations during the processing period than switching devices corresponding to an intermediate-voltage phase of the inverter. The frequency of harmonic components in AC currents flowing in the rotary machine can thereby be raised above the audible range, to suppress audible mechanical noise, without significantly increasing the amount of switching losses. |
| US09692340B2 |
Variable torque angle for electric motor
A method for controlling an electric motor (such as a synchronous reluctance electric motor) is suggested, in which the torque angle in the d-q-reference frame is at least in part and/or at least at times varied depending on at least one working condition of the electric motor. |
| US09692337B2 |
Method for controlling a synchronous reluctance electric motor
A method (29) for controlling a synchronous reluctance electric motor (2) is suggested, wherein the electric voltage (7) that is applied to the synchronous reluctance electric motor (2) is controlled, and wherein the control of said electric voltage (7) is based on the electric current (14) in the d-q-reference frame (25, 26). |
| US09692328B2 |
Motor driving circuit to reduce switching loss
The present invention provides a motor driving circuit to reduce switching loss, which is applied to a motor. The motor driving circuit comprises a motor driving unit, a push-pull output unit, and a control unit. The control unit is coupled to the motor driving unit and the push-pull output unit. The control unit transmits a driving voltage to drive the push-pull output unit such that the push-pull output unit generates amplified currents which are transmitted to the motor driving unit. The motor driving unit reduces charge/discharge periods thereof based on the received amplified currents. |
| US09692327B2 |
Multi-phase machine current control
A controller for controlling a multi-phase motor is described. The controller may include a torque control module and a current control module. The current control module may be configured to receive a reference current from the torque control module, determine a reference voltage, determine a flux correction value based on the reference voltage, a maximum available voltage, and a speed of the multi-phase motor, and output the flux correction value. The torque control module may be configured to receive the flux correction value and update the reference current based on the flux correction value. |
| US09692325B2 |
High conductivity electrostatic chuck
In accordance with an embodiment of the invention, there is provided an electrostatic chuck comprising a conductive path covering at least a portion of a workpiece-contacting surface of a gas seal ring of the electrostatic chuck, the conductive path comprising at least a portion of an electrical path to ground; and a main field area of a workpiece-contacting surface of the electrostatic chuck comprising a surface resistivity in the range of from about 108 to about 1012 ohms per square. |
| US09692323B2 |
Method for actuating a multi-actuator drive device
A method is disclosed for controlling a linear or rotary multi-actuator drive device having a stationary and a movable part. Relative movement between the stationary and the movable parts is generated via actuators having limited strokes, which are in substantially continuous frictional contact with the movable part either directly or via a force-transmitting mechanism, wherein control signals having a timing offset are used therefor, which force alternation between the slip phase and the stick phase for each actuator. Speed variations and vibrations of the device are reduced or prevented by utilizing the elasticity in the drive components, by building up, between the points of friction of the actuators by means of control waveforms adapted to the respective situation for the various actuators, suitable mechanical tensions which prevent undesired variation in the force exerted by the actuators on the movable part, above all when an actuator transitions from the stick phase to the slip phase, or when one or more actuators reverse direction. |
| US09692319B1 |
Power system islanding detection with waveform fitting
A method includes generating samples of a grid parameter at a point of common coupling, fitting a waveform to the samples, and detecting an islanding condition in response to a parameter of the waveform. The waveform may be fit to the samples using a nonlinear algorithm. A controller includes a waveform fitting circuit to fit a waveform to samples of a grid parameter, an inverter controller to generate one or more switching signals to control an inverter in response to an error signal, and an error generator arranged to generate the error signal in response to a parameter of the waveform. |
| US09692316B1 |
Bleeder method using switch node coupling capacitor for TRIAC dimming of solid state lighting
Power converters having bleeder circuits are disclosed. For example, in an embodiment, a power converter can include a controllable TRIAC in series with a rectifier that together produces a controllable rectified voltage at a first node, a first inductor having a first end and a second end, the first inductor being electrically connected to the first node at the first end, and electrically connected to a first power lead of a transistor and an anode of a diode at the second end, a load capacitor having a first end and a second end, the load capacitor being electrically coupled to the first node at the first end of the load capacitor, and electrically coupled to a cathode of the diode at the second end the load capacitor, control circuitry to control switching of the transistor, and a bleeder circuit coupled to the second end of the inductor, the bleeder circuit including a resistor in series with a coupling capacitor. |
| US09692315B2 |
High efficiency AC-AC converter with bidirectional switch
An AC-AC converter device includes first and second AC input terminals and first and second AC output terminals. An input device is connected between an input node, a common node, a positive DC terminal and a negative DC terminal, wherein the input node is connected to the first AC input terminal via a first input inductor. An output device is connected between an output node, the positive DC terminal and the negative DC terminal, wherein the output node is connected to the first AC output terminal via an output inductor. A common device is connected between the common node, the positive DC terminal and the negative DC terminal, where the common node is connected to the second AC input terminal via a common inductor. A control device is provided for controlling the switches of the output device and the common device. |
| US09692309B1 |
AC power monitoring and parameter determination
Devices and methods for monitoring and determining alternating current (AC) power system parameters are provided. In some implementations, the device can include a processor; and at least one non-transitory computer-readable medium storing computer-executable instructions for implementing a number of components. The components include a monitor configured to: sense an AC line voltage signal and an AC current voltage signal; filter the AC line voltage signal; calculate average AC line voltage and current values based, at least, on a DC voltage and current values corresponding to the AC line voltage and current signals, respectively; determine fundamental AC line voltage and current signals based, at least, on zero crossings of the respective average AC line voltage value and the average AC line current value; and determine one or more AC power system parameters based, at least, on the fundamental AC line voltage signal and the fundamental AC line current signal. |
| US09692307B2 |
Power conversion apparatus
Power conversion apparatus converts input voltage and supplies output voltage to the electric load. The apparatus includes a semiconductor switch switches between open and closed states to regulate voltage control current for controlling output voltage, a first voltage detection section detects remote voltage being applied to the electric load as output voltage, a second voltage detection section detects a local voltage being applied to the output terminal as output voltage, a target current calculation section calculates target current which is the voltage control current target value, based on voltage deviation between target voltage which is the output voltage target value and either remote voltage or local voltage, and a switch control section controls the semiconductor switch so voltage control current becomes target current, to regulate output voltage to target voltage. The target current calculation section calculates the target current by using one of the remote or local voltage corresponds to a smaller target current. |
| US09692303B2 |
Systems and methods of non-invasive continuous adaptive tuning of digitally controlled switched mode power supply based on measured dynamic response
Example embodiments of the systems and methods of non-invasive continuous adaptive tuning of digitally controlled switched mode power supply based on measured dynamic response disclosed herein rely on time domain measurements for the tuning rather than on frequency response to automatically tune the system for stability and good dynamic performance. In particular, an algorithm directly measures overshoot and settling time to transients. Using this information, the algorithm minimizes both overshoot/undershoot and settling time by adjusting the parameters of a digital compensator. Since time domain measurements are directly used, the implementation does not require an additional perturbation in the system that otherwise would be necessary. |
| US09692301B2 |
DC-DC voltage converter with adaptive charge transferring capability
A voltage converter includes a high side transistor, a low side transistor coupled to the high side transistor at a switching node, and an inductor coupled to the switching node and providing an output node. A controller is provided that is coupled to the high side transistor and the low side transistor. The controller is configured to selectively turn on and off the high and low side transistors in a repeat cycle. The controller is configured to control the high and low side transistors to cause a sequence of packets of charge to be delivered to the inductor. Also included is an adaptive timer circuit coupled to the output node and the controller and configured to adaptively adjust the amount of charge in each packet based on the voltage ripple of the output node. |
| US09692299B2 |
Voltage-current characteristic generator
Disclosed is a voltage-current characteristic generator that includes: a voltage source; a current source; a selector for selecting and outputting the output of either the voltage source or the current source; a sensing portion, connected to an output of the selector, for outputting the output of the selector and for sensing, and feeding back, the voltage and current of the output; and a controller for receiving the voltage and current detected by the sensing portion and for setting the subsequent outputs in the voltage source and the current source, wherein, in addition to setting the subsequent outputs, the controller evaluates an operating mode wherein the subsequent output from the selector is to be from either the voltage source or the current source. |
| US09692298B2 |
Power converter controller with input current slope adjustment
A transient event detector includes a first reference generator, an adjustable low-pass filter, and a comparator. The first reference generator coupled to scale the input current signal to generate a first reference current signal that tracks the input current signal. The adjustable low-pass filter circuit is coupled to receive the input current signal and to generate a filtered input current signal such that a magnitude of a slope of the filtered input current signal is less than the magnitude of the slope of the input current signal during a transient event. The first comparator is coupled to generate an event detection signal that indicates the presence of the transient event in response to a value of the filtered input current signal reaching a value of the first reference current signal. The adjustable low-pass filter circuit is configured to increase the cutoff frequency in response to the event detection signal. |
| US09692295B2 |
Power converter including a power converter circuit and a plurality of capacitors for reduction of noise currents
In a power converter, an external terminal, a case, and capacitors are arranged to provide a conductive loop. The conductive loop defines thereinside a first region through which magnetic flux of an AC magnetic field penetrates, and a second region through which the magnetic flux penetrates. A magnetic-flux shielding member partly shields at least one of the first region and the second region from penetration of the magnetic flux of the AC magnetic field to adjust at least one of an amount of the magnetic flux penetrating through one of the first region and the second region, and an amount of the magnetic flux penetrating through the other thereof. |
| US09692289B2 |
DC power-supply device and refrigeration-cycle application device including the same
A DC power-supply device that suppresses an increase of a harmonic current and deterioration of a power factor without causing any imbalance among respective phase currents, in a configuration in which a three-phase alternating current is converted into a direct current and supplied to a load. The DC power-supply device includes a rectifier circuit, a reactor connected to an input side or an output side of the rectifier circuit, a first capacitor and a second capacitor serially connected between output terminals to a load, and a charging unit. During a cycle combining a charging period and a non-charging period of a pair of the first capacitor and the second capacitor, the charging unit is controlled so that a charging frequency becomes 3n times (n is a natural number) the frequency of the three-phase alternating current. |
| US09692287B2 |
Vibration electricity generation device
A vibration electricity generation device according to an embodiment of the present invention includes a fixed unit provided with a coil and a movable unit provided with a magnet. The movable unit is supported on the fixed unit in a suspended manner via a pair of coil springs. The movable unit is thus configured to vibrate in the up and down direction with a rather simple structure. A coil supporting member of the fixed unit is configured to cover a coil accommodating portion from both thickness direction sides thereof and a friction reducing treatment is applied to the surfaces of both thickness direction sides of the coil supporting member. The coefficient of kinetic friction is thus maintained low enough and a pair of guide shafts conventionally used are not required, thereby the electricity generation efficiency being improved. |
| US09692283B2 |
Apparatus and method for forming coil members
The invention relates to an apparatus and process for manufacturing coil members (20) to be inserted in the slots (21) of the core of a dynamo electric machine, the coil members (20) being formed by bending portions of an electric conductor (300) using at least a first engagement member (112). The apparatus comprises: a first member (23) that rotates around a first axis of rotation (17a); a second member (24) that rotates around a second axis of rotation (18a) positioned laterally with respect to the first axis of rotation (17a), wherein the second member (24) is supported by the first member (23); a third member (25) rotating around a central axis of rotation of the second member (24); wherein the third member (25) being supported by the second member (24). The first engagement member (112) being capable of engaging the conductor (300) against a contrast surface (192) to bend a portion of the conductor. The rotations of the first member (23) and of the second member (24) cause the at least a first engagement member (112) to move in a plane (P), whilst the rotation of the third member (25) causes the at least a first engagement member (112) to rotate in the plane (P). Preferably, the rotation of a fourth member (26) causes the at least a first engagement member (112) to rotate out of the plane (P). |
| US09692282B2 |
Method of fabricating electrical machine
A method for fabricating a rotor for an electric motor is provided. The method includes the steps of fabricating a first set of rotor parts for use in a motor having a first frame size and fabricating a second set of rotor parts for use in a motor having a second frame size. The second frame size is substantially different from the first frame size. The method further includes the steps of fabricating a third set of rotor parts for use in the motor having the first frame size and for use in the motor having the second frame size, ascertaining the desired motor frame size, and selecting one of the first set of rotor parts and the second set of rotor parts in accordance with desired motor frame size. The method also includes the steps of selecting the third set of rotor parts and assembling a rotor with one of the first set of rotor parts and the second set of rotor parts and with the third set of rotor parts, such that a rotor for use with the desired motor frame size is substantially provided. |
| US09692274B2 |
Motor
A motor may include a rotor having a permanent magnet on an outer peripheral face of a rotation shaft and a fixed body having a stator, an opposite-to-output side radial bearing member, and an opposite-to-output side end plate. The opposite-to-output side radial bearing member may be formed with a bearing part, a flange part, and a recessed part recessed toward an output side. An end part on the output side of the bearing part may be located on the output side relative to the end part on the opposite-to-output side of the stator, and an end part on the opposite-to-output side of the rotation shaft protruded toward the opposite-to-output side from the shaft hole may be accommodated in an inside of the recessed part and is located on the output side relative to the end part on the opposite-to-output side of the fixed body in the axial line direction. |
| US09692271B2 |
Electric motor
An electric motor has a stator positioned lengthwise within and fixed to a case. The stator has a stator core, a coil wound around a tooth extending from the stator core, and an insulating member attached to the stator core wherein the insulating member is configured to insulate the coil from the stator core. A wire holding part extends from the insulating member to hold a wire within an outer diameter of the insulating member. A rotor is positioned lengthwise along an inner circumference of the stator wherein the rotor is configured to rotate about a motor axis extending lengthwise across the electric motor. |
| US09692267B2 |
Double stator switched reluctance rotating machine
A double stator switched reluctance rotating machine includes an annular rotor, an outer stator that is disposed outside the rotor, and an inner stator that is disposed inside the rotor; and employs a structure in which the rotor is provided with a bolt fastening hole passing through the rotor in an axial direction and the bolt fastening hole is provided at a position depending on magnetic characteristics of the outer and inner stators. |
| US09692264B2 |
Rotor of permanent magnet motor having air gaps at permanent magnet end portions
A rotor of a motor includes a rotor core; permanent magnet insertion holes that are formed in an outer circumferential portion of the rotor core along a circumferential direction and in each of which an air gap extending in an outer circumferential direction, is formed in both end portions in a state where a permanent magnet is inserted; and a permanent magnet inserted in each of the permanent magnet insertion holes, wherein a thin portion is formed between the air gap and an outer circumference of the rotor core, rounded corner portions are formed at two locations on an outer circumference side in the air gap, and a radius of curvature of any one of the corner portions is equal to or more than half a width of the air gap in a circumferential direction. |
| US09692263B2 |
Stator core for rotary electric machine
When a plurality of core plates are stacked and fixed to form a stator core for a rotary electric machine, fixation portions are set in accordance with the relative positional relationship with magnetic poles of a rotor to suppress torque fluctuations. The number of rotational buildup states which is a value obtained by dividing 360 degrees by a rotational buildup angle θs by which the core plates are rotated in units of a predetermined number of plates to be stacked, the number of magnetic poles which is the number of magnetic poles M of the rotor, and the number of fixation portions which is the number of fixation portions 5 are set such that the number of fixation portions is an integer number of times the number of rotational buildup states and at least common divisors of the number of fixation portions and the number of magnetic poles include “1” only or “1” or “2” only. |
| US09692262B2 |
Suspension structures
A support structure is used to mount the stator of a rotating electrical machine (e.g. a motor or generator). The support structure includes a rigid external support frame (6). To minimise the transmission of vibrations caused by stator electromagnetic forces into the external support frame (6), at least one sandwich anti-vibration mount (14a) is secured between the external support frame (6) and a part of the stator (28). The mount (14a) is oriented relative to the stator such that it experiences compression loading in a substantially tangential direction of the stator and radial shear loading in a substantially radial direction of the stator during operation of the rotating electrical machine. The sandwich anti-vibration mount (14a, 14b) is pre-loaded with a pre-determined compression load substantially along its compression axis (Ac). The mount (14a) has a high stiffness characteristic Kc for compression loading and a stiffness characteristic Krs for radial shear loading that is substantially zero, or even negative. The mount (14a) will therefore restrain tangential deflection of the stator while still achieving a low-stiffness suspension in the radial direction. |
| US09692261B2 |
Rotating electric machine and electrically driven vehicle
Provided is a rotating electric machine including a rotor and stator fitted with various numbers of poles and slots and adapted to reduce vibration/noise of the machine. The rotating electric machine in accordance with an aspect of the present invention includes a stator having an S number of teeth, and a rotor disposed in the stator with a gap intervening between the stator and the rotor. The plurality of teeth in the stator are grouped in units of the number of teeth that is equal to a value “m” or a value “d”, the value “m” being obtained by dividing the number of stator slots, S, by the greatest common divisor N of the number of poles, P, and the number of stator slots, S, the value “d” being an aliquot of “m”. At least one tooth in each of the tooth groups has a distal end different in shape from distal ends of other teeth belonging to the same tooth group, and the plurality of tooth groups have the same configuration. |
| US09692253B2 |
Mobile terminal and method for controlling charging and charger therefor
Provided is a method for controlling charging in a mobile terminal. The method includes, applying a voltage to a charger upon detecting a connection to the charger via a cable; transmitting a signal for requesting charging to the charger, and switching a charging mode; and charging a power that is received from the charger according to the switched charging mode. |
| US09692249B2 |
Power supply system, power transmission device, power receiving device, method for controlling power transmission device, method for controlling power receiving device, and program
A power supply system wirelessly transmits power from a power transmission device to a power receiving device, in which the power transmission device includes a calculation unit configured to calculate a distance from the power transmission device to the power receiving device, a storage unit configured to store a preset relationship between a power transmission efficiency and a distance from the power transmission device to the power receiving device, and a wireless transmission unit configured to wirelessly transmit the distance calculated by the calculation unit and the relationship stored in the storage unit to the power receiving device, and the power receiving device includes a receiving unit configured to wirelessly receive the distance and the relationship from the power transmission device and a notification unit configured to notify a user of the distance and the relationship received by the receiving unit. |
| US09692248B2 |
Positioning aid for wireless energy transfer
A wirelessly powered device and operating method to aid in locating the device in relation to an energy transmitter. A device positioning aid processor places at least one component into a high electrical current consumption mode and determines, based on placing the at least one component into a high electrical current consumption mode, an amount of electrical current induced in a receiving coil that is adapted to inductively couple to a transmission coil external to the wirelessly powered device. An indicator, which is communicatively coupled to the device positioning aid processor, is configured to provide, in response to a determination of the amount of electrical current, an indication corresponding to the amount of electrical current. |
| US09692244B2 |
Charging means and apparatus for secondary battery
A charging means and apparatus which can quickly charge the secondary battery, the apparatus includes a plurality of power supply battery packs, each power supply battery pack corresponds to a charge-discharge circuit, and a microcontroller. The microcontroller sequentially and rotationally selects one of the pluralities of power supply battery packs to charge the secondary battery, and the plurality of power supply battery packs will be recharged after the discharging. After the discharging of the last one of the plurality of power supply battery packs is completed, the power supply battery pack which discharges firstly has done the recharging process and ready to discharge a again, and thus making sure at least one power supply battery pack is in fully charged condition, which is ready to discharge anytime. |
| US09692243B2 |
Frequency regulation method, frequency regulation apparatus, and storage battery system
Provided is a frequency regulation method for regulating a frequency of a power system so that the frequency approximates to a rated frequency, the method including: measuring the frequency; obtaining an SOC (state of charge) of a storage battery; determining a base-point of power to be charged in or discharged from the storage battery when the measured frequency is equal to a predetermined rated frequency; determining a control variable changed from the base-point by an amount corresponding to a frequency deviation that is a difference between the predetermined rated frequency and the measured frequency; and charging or discharging the storage battery based on the control variable, wherein in the determining a base-point, a third rate of change is smaller than a first rate of change and a second rate of change that are average rates of change in the base-point with respect to the SOC when the SOC is within a first range and a second range, respectively. |
| US09692237B2 |
Electronic medium with IC and system of the same
An electronic medium with an integrated circuit includes a power feeding terminal pair including a first power feeding terminal and a second power feeding terminal, an integrated circuit including at least one first rectifying circuit, and a second rectifying circuit that is separate from the integrated circuit, wherein the first rectifying circuit and the second rectifying circuit are connected in series between the first power feeding terminal and the second power feeding terminal. |
| US09692236B2 |
Reconfigurable power control system
Systems and methods for the creation of a centrally controlled DC and AC power rail system within a structure. The rails utilize a centralized controller along with a plurality of distributed controllers to allow for power in the rails to be selectively distributed or not distributed to outlets attached to the rails. This allows for power to be distributed without the need for users to utilize hardwired switches, but to instead utilize generally wireless switch modules, which may be implemented in hardware and/or software to control the outlets. It also allows for devices designed to utilize DC power to be directly supplied with such power from the DC power rail without the need to include onboard AC-DC converters with each device. |
| US09692232B2 |
Mixed signal controller
A mixed signal controller for a power quality compensator includes an analog circuit, an analog-to-digital converter (ADC), and a digital circuit. The analog circuit amplifies an input signal from the power quality compensator by a gain factor and outputs an analog signal, which is converted to a digital signal by the ADC. The digital circuit receives the digital signal, calculates the reference compensating current of each phase and then generates a trigger signal via hysteresis PWM to the power quality compensator. The digital circuit includes an evaluation circuit that calculates a value of the system total harmonic distortion after the power quality compensator compensates power and adjusts the gain factor when the value of the system total harmonic distortion reaches a predetermined threshold. |
| US09692229B2 |
Shut-off circuits for latched active ESD FET
An integrated circuit may include an over-capability detection circuit coupled to an I/O pad which provides a shut-off signal to a latch controlling an ESD protection shunting component. The ESD protection shunting component is coupled between the I/O pad and a reference node of the integrated circuit. The over-capability detection circuit provides the shut-off signal when safe operating conditions are resumed after a voltage excursion at the I/O pad. After receiving the shut-off signal, the latch biases the ESD protection shunting component into an off-state. |
| US09692227B2 |
DC supply unit for a power provision unit
A DC supply unit includes a first current blocking device arranged to allow current to flow in a first direction through the first current blocking device, and to block current that flows in a second direction opposite the first direction. In this context, the first direction is the flow direction of current during normal operation of the DC supply network. The DC supply unit further includes a first switching unit arranged in anti-parallel connection with the first current blocking device, wherein the first switching unit is controllable in its on-state to selectively allow reverse current during normal operation of the DC supply network to flow through the first switching unit in the second direction so as to bypass the first current blocking device and in an off-state to block current in the second direction when a fault occurs in the DC supply network. |
| US09692222B2 |
Heat-recoverable article, wire splice, and wire harness
It is an object of the present invention to provide a heat-recoverable article which heat-shrinks in an appropriate temperature range, in which the occurrence of bloom and bleeding is small, and which has excellent resistance to copper-induced damage; and a wire splice and a wire harness each including the heat-recoverable article. A heat-recoverable article according to the present invention has a cylindrical shape and includes a base material layer, in which the base material layer contains an antioxidant and two or more polyolefin resins, the base material layer has one melting-point peak temperature, the melting-point peak temperature is 112° C. to 128° C., the heat of fusion of all of the resin components of the base material layer is 80 to 130 J/g, and the oxidation induction temperature of the base material layer is 265° C. to 280° C. |
| US09692220B2 |
Guides for and methods of forming a wire harness
A guide 100 for a wire harness 610 is disclosed. The guide 100 comprises a first surface 120; a second surface 130, at least a second portion 132 of which is parallel to at least a first portion of the first surface 120; a contoured surface 140 between the first surface 120 and the second surface 130; and a plurality of through, circumferentially enclosed openings 170 extending from the first surface 120 to the second surface 130. The contoured surface 140 has a non-linear central axis 141 parallel to at least the first portion 122 of the first surface 120 and to at least the second portion 132 of the second surface 130. Further, the contoured surface 140 has a concave cross-section 142. The non-linear central axis 141 is curved. |
| US09692219B2 |
In-floor electrical fitting
An in-floor electrical fitting has a lower body that includes two half-bodies made of intumescent material. Each half-body includes a removable access wall that is also made of intumescent material and that is inserted into slots formed in the half-body. The removable access wall has at least one reduced-thickness section that can be broken off from the removable access wall to create a passageway through the removable access wall. During installation, the two access walls can be removed to allow an installer to a lay a conduit that will pass through the passageway through each access wall when the access walls are reinserted. An installer can pass power wires from one small compartment to another through the conduit while complying with code requirements calling for the separation of power and data cables. |
| US09692218B2 |
Multi-purpose conduit plate
A connecting plate to an electrical, or other, conduit and that may act as an end cap to the conduit, as a means of electrical and electronic interconnection through the conduit, as a tamper-resistant end cap lock and combinations thereof. |
| US09692214B2 |
Dispenser for cable support and method
A dispenser is disclosed for carrying and dispensing a cable support of the type having a pair of hook structures disposed on opposite sides of a central shaft. The dispenser comprises a plurality of rails extending in parallel, spaced-apart relationship to one another and joined to one another at respective proximal ends thereof. Each rail has a cantilevered distal end slidably receivable within one of the hook structures of the cable support. Each rail further has a cantilevered distal end to allow the cable support to be slidably removed from the rail along the distal end. |
| US09692212B2 |
Building block type quick-mounting power distribution device
The invention discloses a building block type quick-mounting power distribution device and a mounting method thereof. The device comprises a mounting assembly module; and an incoming line switching module for receiving and switching power signals, a switch measurement and control module for monitoring the received power signals and a feed-out end assembly module for outputting the power signals monitored by the switch measurement and control module to loads, which are all mounted on the mounting assembly module, respectively. While realizing power distribution function for loads, the power distribution devices may be stacked according to configuration requirements one upon one like building blocks during the screen assembling and mounting, so the assembling of a combined screen is simple and convenient, and easy to realize. Furthermore, since a single module occupies a small space, the capacity of a single screen is high. |
| US09692206B2 |
External resonator type laser device
An external resonator type laser device has an optical element that forms an external resonator with a semiconductor device by selecting and reflecting light of a specific wavelength range from light outputted from the semiconductor device; a supporting member formed of a material having a larger coefficient of linear expansion than the optical element; and a first mount interposed between the optical element and the supporting member, formed of a material having a coefficient of linear expansion closer to that of the optical element compared with that of the supporting member. The optical element is adhered to the first mount. The first mount is adhered to the supporting member by an adhesive having a Shore hardness of less than or equal to 65. |
| US09692205B2 |
Semiconductor laser module
A semiconductor laser module includes: a semiconductor laser element emitting a laser light; an optical fiber, into which the laser light emitted from the semiconductor laser element is incident, guiding the laser light; and an optical-fiber-holding unit having a fixing agent and holding the optical fiber, the fixing agent being for fixing the optical fiber. The fixing agent is provided at an area in which a power of a leakage light of the laser light having been incident into the optical fiber and then emitted to outside the optical fiber is low. |
| US09692204B2 |
Semiconductor laser element and method of making semiconductor laser device
A semiconductor laser element includes an inclined substrate, a semiconductor layer formed on one surface of the substrate, a first electrode (n-type electrode) formed on an opposite surface of the substrate, a second electrode (p-type electrode) formed on the semiconductor layer, and a current constriction part formed in the semiconductor layer. The semiconductor layer has a multi-layer structure including at least an active layer. The current constriction part causes a current to concentrate and flow to a particular area of the active layer. The first electrode or the second electrode is joined to a sub-mount. In one embodiment, the location of the current constriction part in a chip width direction is between the center of one of the first and second electrodes, which is joined to the sub-mount, and the center of the other electrode, which is not joined to the sub-mount, when viewed in the chip width direction. |
| US09692201B2 |
Optical-fiber-bundle structure, rare-earth-doped multi-core fiber, connection structure therefor, method for exciting rare-earth-doped multi-core fibers, and multi-core-optical-fiber amplifier
A bundle structure is obtained by arranging optical fibers having equal diameters in a close-packed arrangement around the outer circumference of a center optical fiber. The optical fibers are signal light optical fibers that transmit signal lights. The optical fiber is a pump light optical fiber that transmits pump light. The number of optical fibers is equal to the number of cores in the multi-core fiber. The bundle structure and the multi-core fiber are connected to one another by adhering or fusing. The cores and the cores are optically connected, and the core and the cladding are optically connected. When connecting, the mode field diameter of the cores and the cores are substantially equivalent. In addition, the outer diameter (diameter of circumscribed circle including optical fibers) of the bundle structure is set so as not to be greater than the outer diameter of the multi-core fiber. |
| US09692197B2 |
Method for manufacturing a commutator using a brazing and soldering process
A commutator (10) comprising a plurality of commutator bars (12) formed from a graphite structure (30) and a metal sheet (20) having soldered to the graphite structure (30) includes a brazing process followed by a soldering process. The brazing process includes applying a brazing material the graphite structure (30) and brazing at an elevated temperature to form a brazing layer (40). The soldering process includes applying a solder material to the brazing layer (40), placing the metal sheet (20) on the solder material, and soldering to form a solder layer (50) affixing the metal sheet (20) to the graphite structure (30). A plurality of grooves (70) are cut in the graphite structure (30) and the metal sheet (20) to form the commutator bars (12) arranged in an intermittent ring or circle. |
| US09692178B2 |
Apparatus for retaining a plug in a receptacle
The present disclosure is an apparatus for retaining a plug within a receptacle. The apparatus for retaining a plug within a receptacle may include a receptacle body and a retention device. The retention device may include a face portion and at least one prong, each prong of the at least one prong including a barb. The retention device is configured to retain a plug inserted within the receptacle body by contact with a shroud of the plug from the barb of each prong of the at least one prong of the retention device. |
| US09692177B2 |
Electrical connector assembly and connecting member thereof
An electrical connector assembly and a connecting member thereof, the connecting member comprises: a base portion having an upper surface and a lower surface which are opposite. A first connecting portion comprising two first protruding ribs spaced apart from each other and protruding upwardly from the upper surface of the base portion and two first latching grooves respectively provided at opposite inner sides of the two first protruding ribs, and the two first latching grooves extends along a front-rear direction. A second connecting portion comprising four upright extending walls spaced apart from each other and extending downwardly out from the lower surface of the base portion and four first latching flanges respectively extending horizontally out from the four upright extending walls. A resilient latching arm extending out from one end of the base portion, having a first positioning portion provided to an upper surface thereof and a second positioning portion provided to a lower surface thereof. The connecting member can assemble two cable connector assemblies together and then fix them to an application device, which is convenient during assembling. |
| US09692176B2 |
Conduit connection system having a pivoting housing
An electrical connection system connecting a flexible conduit to electrical conductors, comprising a conduit portion and a removably attachable base portion. The conduit portion retains an end of the conduit, via a retention mechanism within a first housing at a first end. The conduit portion comprises a first electrical connector housing and electrical terminals within a second end of the first housing. The base portion comprises a base mount and a second housing having a first end pivotably connected to the base mount, the second housing being pivotable at a joint. The base portion may also comprise a second electrical connector housing and electrical terminals within a second end of the second housing for electrical connection to the conduit portion. Mechanical fastening components of the base portion and the conduit portion enable a mechanical connection between the base portion and the conduit portion. |
| US09692172B2 |
Connector
A connector includes a housing having a cylindrical portion and terminal receptacle portions housed in the cylindrical portion for receiving a terminal, and a first seal member and a second seal member for sealing the terminal receptacle portions. The first seal member includes a first ring part fitted on a first terminal receptacle portion and a first extension portion formed so as to extend from the first ring part in a direction different than an arrangement direction of an adjacent second terminal receptacle portion. The second seal member includes a second ring part fitted on the second terminal receptacle portion, a third ring part fitted on a third terminal receptacle portion, and a second extension portion connecting the second ring part and the third ring part to each other and extending so as to overlap at least the first extension portion. |
| US09692171B2 |
Waterproof connector
A waterproof connector includes a connector housing. The connector housing includes: a terminal housing part for housing a terminal; a core-wire housing part which is provided continuously to the terminal housing part and houses a core wire part of an electric wire; and a covered end insertion part into which a covered end of the electric wire is inserted. The covered end insertion part is provided with a waterproof partition wall, so that respective interiors of the core-wire housing part and the terminal housing part are kept in a waterproof state. The core-wire housing part is provided, around the core wire part, with a hollow part which allows the core wire part of an end of the electric wire to move freely within the core-wire housing part. |
| US09692170B2 |
Connection device, manufacturing method of the same, and electronic device including the same
A connection device and method of manufacturing the same is provided. The connection device includes a housing that includes a first face, into which a plug is introduced, and a second face that is formed to be in contact with the first face, a connection hole that extends to the inside of the housing from the first face, an opening that extends from the first face to the second face to partially expose the connection hole on at least the second face, and a sealing member that is arranged on an outer peripheral surface of the housing to surround a region where the opening is formed. When mounted on the case member of the electronic device, the sealing member may form a dustproof and waterproof structure between the inner peripheral surface of the case member and the outer peripheral surface of the housing. |
| US09692165B2 |
Coaxial connector
A coaxial connector is manufactured to have a structure in which a first resin member is not easily separated from an external terminal. A coaxial connector according to the present disclosure includes a first resin member, a second resin member attached to the first resin member, a fixed terminal and a movable terminal disposed between the first resin member and the second resin member, and an external terminal attached to outer peripheries of the first resin member and the second resin member. The external terminal includes a cylindrical accommodating portion that accommodates the first resin member, and the first resin member includes a resin engagement portion. The resin engagement portion is engaged with the accommodating portion, so that separation of the first resin member is prevented. |
| US09692164B2 |
Dual compressive connector
An electrical connector for electrically connecting multiple photovoltaic bus bars. A casing includes first and second opposing walls. An elastic strip is bent into a bent elastic strip with a first leg and a second leg. The bent elastic strip is disposed between the first and second walls of the casing with the first leg pressing against the first wall and the second leg pressing against the second wall. The bent elastic strip is configured to hold at least one of the photovoltaic bus bars between the first leg and the first wall and another of the photovoltaic bus bars between the second leg and the second wall. The bent elastic strip may be formed of resilient spring metal with a thickness and an elastic modulus. The thickness and/or the elastic modulus of the elastic strip is/are configured so that the bus bars are inserted without requiring a tool to open a space and so that the bus bars are removed from the connector without requiring a tool to break the electrical connection. |
| US09692161B2 |
Wire and circuit board electrical connector
Provided a connector for establishing an electrical connection between an electrical conductor and a printed circuit board. The connector includes an insulating element which has a plurality of cavities for accommodating contact elements. The printed circuit board can be inserted in the connector via a slot in a connection face of the insulating element and can be connected to the first contact faces of the contact element provided in the connection face. Opposite the first contact face, the contact elements have a second contact face which is provided for the insulation-piercing contacting of the electrical conductor. The arrangement of the contact elements in the insulating element allows a particularly space-saving design of the connector. |
| US09692160B2 |
Electrical connector
An electrical connector includes a frame delimiting an elongated open cavity, and having two parallel long sides provided with contact areas capable of cooperating with contact areas of a complementary electrical connector. Each long side is formed of a multilayer printed circuit board. |
| US09692157B2 |
Controlled power fade for battery power devices
A method is provided for operating a power tool having a motor powered by a battery. The method includes: delivering power from the battery to the motor in accordance with an operator input; detecting a condition of the power tool indicating a shutdown of the power is imminent; and fading the power delivered from the battery to the motor, in response to the detected condition, through the use of a controller residing in the power tool. |
| US09692155B2 |
Jumper clamps
A dual conductive electrical jumper clamp system has two jumper clamps, each jumper clamp having upper and lower clamp frames and an electrical conductive contact plate positioned within each frame. An electrical conductive sleeve is positioned between the contact plates. In this manner, electricity is transmitted from an electric power source to only one of the contact plates, then solely to the other contact plate via the conductive sleeve, and ultimately to electrical terminal attaching jaw members at the ends of the contact plates. |
| US09692153B1 |
Connection system having a U-shaped handle with legs slidably or rotatably attached to a cam lever
A connector system is described herein. The connector system includes cam lever devices to assist the mating of the connector bodies of the connector system to one another. The handles of the cam lever devices are movable from an extended position that provides increased leverage to a retracted position that can be used to stow the handles after the connector bodies of the connector system have been successfully mated. A method of assembling such a connector system is also described herein. |
| US09692151B2 |
Coaxial connector with switch
Provided is a switch attached coaxial connector that improves an isolation characteristic between a common terminal and a closed terminal. In a normal state where a coaxial plug is not connected to the switch attached coaxial connector, a movable contact portion biased by a leaf spring piece portion elastically contacts a fixed contact piece portion so that a closed terminal and a common terminal are electrically connected to each other. When the coaxial plug is connected to the switch attached coaxial connector, the movable contact portion moves rearward from the fixed contact piece portion by the plug pin abutting against a plug contact portion so that the contact with respect to the fixed contact piece portion is disconnected and the electrical connection of the common terminal is switched from the closed terminal to the plug pin. |
| US09692143B2 |
Electrical connection device for producing a solder connection and method for the production thereof
This invention relates to an electrical connection device on a plate-type or strip-type material (1, 1′), which cannot be soldered or is difficult to solder or which is provided with a surface that cannot be soldered or is difficult to solder, having the following characteristics: A self-clinching bolt (5) is provided with a bolt head (7) that, relative to the bolt body (9) beneath, has a tapered cross section such that the bolt head (7) transitions, by way of a conical or shoulder-like sloping flank (11), into the bolt body (9) having an outer circumference (9′) that has a diameter larger than that of the bolt head (7). The outer circumference (9′) of the bolt body (9) is of smooth design, or is provided with a knurling (15). In the penetration area of the self-clinching bolt (5), the plate-type or strip-type material (1, 1′) is provided with a non-flanged material edge (101). Within the material edge (101), the self-clinching bolt (5) is press-fit with a peripheral area of the bolt body (9) thereof, thus creating a force fit. |
| US09692139B2 |
Methods and apparatus for orbital angular momentum (OAM) system
Methods and apparatus for an OAM system having simultaneous OAM states. In embodiments, m data streams are encoded and split into n copies each of which is delayed to produce a distinct RF orbital angular momentum (OAM) mode. The delayed copies are combined using wave division multiplexing. The combined m data streams are transmitted using n antenna elements. |
| US09692136B2 |
Monocone antenna
A monocone antenna includes a conical radiation element having a feed point at a vertex of the conical radiation element being connected to a feed transmission line and a capacitive ring radially outside of the conical radiation element and in proximity to the conical radiation element. The capacitive ring is connected to a ground plane of the monocone antenna. Optionally, a capacitive gap may be defined between the conical radiation element and the capacitive ring that is substantially filled with dielectric material. |
| US09692133B2 |
Antenna
In an antenna, a first element is connected to a GND of a feeder, on the same plane as a GND of a wireless circuit, and isolated from the GND of the wireless circuit. A second element is on the same plane as the GND of the wireless circuit and a first end connected to the first element and a second end as an open end. The third element has a first end connected to a power source of the feeder and located in a region occupied by the first element perpendicularly to the first element so that its first end source faces down. The fourth element has a first end connected to a second end of the third element and a second end as an open end, is parallel to the first element, and is perpendicular to a line connecting the first and second ends of the second element. |
| US09692125B1 |
High gain antenna structure for beam scanning
Antenna structures and methods of operating the same are described. One antenna structure having a stacked patch antenna including a first patch structure disposed in a first plane and a second patch structure disposed in a second plane, a first parasitic patch antenna that is coplanar with the second patch structure, and a second parasitic patch antenna that is coplanar with the second patch structure. The first patch structure includes a first substrate with a ground plane and a first patch element. The second patch structure includes a second substrate with a second patch element. The first parasitic patch antenna is disposed adjacent a first side of the second patch structure in the second plane. The second parasitic patch antenna is disposed adjacent a second side of the second patch structure in the second plane. |
| US09692121B2 |
Directional-antenna-placement visual aid and method
A directional-antenna-placement visual aid and method of placing directional antenna, especially useful for minimization of overlapping cellular-telephone signals in large venues, providing a projected-light representation of the coverage of an antenna during the mounting or adjustment of the antenna. |
| US09692119B2 |
Radio-frequency device and wireless communication device for enhancing antenna isolation
A radio-frequency device for a wireless communication device includes an antenna disposition area, a grounding unit, a first antenna and a second antenna. The first antenna includes a feed-in plate; a first radiating element, coupled to the feed-in plate and electrically connected to the grounding unit; and a metal branch, electrically connected to the grounding unit; wherein the grounding unit is shared by the first antenna and the second antenna, the feed-in plate is disposed in-between the metal branch and the first radiating element, and the metal branch is used for guiding a reflected signal generated from the second antenna to the metal branch so as to enhance isolations of the first antenna and the second antenna. |
| US09692118B2 |
Antenna and portable device having the same
An antenna apparatus and a portable device having the same are provided. The antenna apparatus includes a main antenna having a first radiator pattern, and an auxiliary antenna separated from the main antenna by a metal surface adjacent to the main antenna. The auxiliary antenna is resonant at a resonant frequency which is a function of at least one capacitor provided in a cut-out area of a printed circuit board (PCB) adjacent to the metal surface. |
| US09692115B2 |
Antenna radome with removeably connected electronics module
In one embodiment, an antenna assembly in a cellular network has a radome that houses a plurality of antenna arrays and an electronics module. The electronics module has a weatherproof housing that encloses electronics for processing signals received by and transmitted from a first of the antenna arrays. The electronics module is physically removeably connected to an outer surface of the radome and electrically removeably connected to the first antenna array, such that the electronics module can be removed without (i) disrupting service to other antenna arrays and (ii) removing the antenna assembly from the cell tower on which the antenna assembly is installed. |
| US09692112B2 |
Antennas including dual radiating elements for wireless electronic devices
A wireless electronic device includes first and second conductive layers arranged in a face-to-face relationship. The first and second conductive layers are separated from one another by a first dielectric layer. The wireless electronic device includes a first radiating element and a second radiating element. The first conductive layer includes a slot. The second conductive layer includes a stripline. The second radiating element at least partially overlaps the slot. The wireless electronic device is configured to resonate at a resonant frequency corresponding to the first radiating element and/or the second radiating element when excited by a signal transmitted and/or received though the stripline. |
| US09692111B2 |
Antenna for unattended ground sensor
An unattended ground sensor unit (30) is disclosed comprising an antenna (2) which is accommodated mainly in a head portion (5) of the unit. The antenna (2) comprises a base conductor (100) and a top conductor (102), both of which are circular plates arranged in a horizontal plane. An antenna rod (204) is electrically connected to the top conductor (102). A hole is provided in the base conductor (100) and the antenna rod (204) extends through the hole to be connected to antenna control circuitry on a printed circuit board (104) on the reverse side of the base conductor (100). An insulating ring (106) is provided around the antenna rod (204) where it extends through the base conductor (100) so that the antenna (rod 204) is electrically insulated from the base conductor (100). Two shorting pins (205) are provided between the top conductor (102) and the base conductor (100). The shorting pins (20) are provided on diametrically opposite sides of the antenna rod (204). A dielectric spacer (202) is provided having a keying cutout (112) that can be engaged to resist its rotation. |
| US09692110B2 |
Motor vehicle antenna assembly
An antenna assembly is disclosed in which at least part of the antenna assembly is formed as an integral part of an external plastic roof panel of a motor vehicle. In one embodiment a base member is formed as an integral part of the plastic panel, the base member being used to connect a flexible antenna to a circuit of the motor vehicle by means of an electrical connector. In a second embodiment the antenna is formed as an integral part of a base member. In both cases no aperture is required in the respective plastic panel and so no potential water leak paths are produced. |
| US09692108B2 |
Antenna apparatus for portable terminal
An antenna apparatus for a portable terminal which is light, thin, compact, and small. The antenna apparatus preferably includes a main board equipped with a power feeding part for feeding power and a ground surface for grounding the main board and at least one sub-board, each sub-board which has a ground surface and electrically communicates with the main board, wherein the ground surface of each sub-board receives power from the power feeding part of the main board and resonates. |
| US09692106B2 |
Hybrid on-chip and package antenna
Antenna devices, antenna systems and methods of their fabrication are disclosed. One such antenna device includes a semiconductor chip and a chip package. The semiconductor chip includes at least one antenna that is integrated into a dielectric layer of the semiconductor chip and is configured to transmit electromagnetic waves. In addition, the chip package includes at least one ground plane, where the semiconductor chip is mounted on the chip package such that the ground plane(s) is disposed at a predetermined distance from the antenna to implement a reflection of at least a portion of the electromagnetic waves. |
| US09692103B2 |
RF coupler with switch between coupler port and adjustable termination impedance circuit
Aspects of this disclosure relate to a radio frequency coupler and a switch between a port of the radio frequency coupler and an adjustable termination impedance circuit. In an embodiment, an apparatus includes a radio frequency (RF) coupler, a termination impedance circuit, and a switch circuit. The RF coupler can provide an indication of forward RF power at a coupled port in a forward power state and provide an indication of reverse RF power at an isolated port in a reverse power state. The termination impedance circuit can provide an adjustable termination impedance. The switch circuit can electrically connect the termination impedance circuit to the isolated port in the forward power state and electrically isolate the termination impedance circuit from the isolated port of the RF coupler in the reverse power state. |
| US09692100B2 |
Multi-layer resin substrate having grounding conductors configured to form triplate line sections and microstrip sections
A flat cable includes a plurality of resin layers that are flexible and stacked together, a line conductor, and grounding conductors. The flat cable includes a triplate line in which both surfaces of the line conductor oppose the corresponding grounding conductors, and a microstrip line in which only one of the surfaces of the line conductor opposes the corresponding grounding conductor. A width of the line conductor in the microstrip line is greater than a width of the line conductor in the triplate line, and the flat cable is bent at a position where the microstrip line is provided. |
| US09692090B2 |
Battery cooling structure
A battery cooling structure includes a cooling plate and an electrically insulative sheet. The cooling plate is to support a cooling surface of a battery module to cool the battery module including a plurality of battery cells arranged side by side. The electrically insulative sheet has an electrical non-conductivity and is disposed between the cooling surface of the battery module and the cooling plate to transfer heat from the cooling surface to the cooling plate. |
| US09692084B2 |
Electrolyte for magnesium cell and magnesium cell containing the electrolyte
An electrolyte for a magnesium cell contains a solute, which is phenoxyl-Mg—Al-halogen complex, and an ether solvent. With respect to the entire electrolyte, the solute concentration is 0.2 to 1 mol/L. The electrolyte is capable of staying stable in the air. Also provided is a magnesium cell containing the electrolyte. |
| US09692081B2 |
Manufacturing device and manufacturing method for battery
According to one embodiment, a manufacturing device for a battery, includes, an electrolyte supply unit which introduces an electrolyte into a cell, a chamber which accommodates the battery cell, a first pressure adjustment unit configured to make a pressure in the battery cell lower than a pressure on the side of the electrolyte supply unit, and a second pressure adjustment unit configured to make a pressure outside the battery cell in the chamber lower than the pressure in the battery cell, thereby increasing the capacity of the battery cell. |
| US09692073B2 |
Electrolyte material, liquid composition and membrane/electrode assembly for polymer electrolyte fuel cell
To provide a membrane/electrode assembly excellent in the power generation characteristics even under low or no humidity conditions or under high humidity conditions, and an electrolyte material suitable for a catalyst layer of the 5 membrane/electrode assembly, an electrolyte material is used which comprises a polymer (H) having a unit (A) which has an ion exchange group and in which all hydrogen atoms (excluding H+ of the ion exchange group) bonded to carbon atoms are substituted by fluorine atoms, a unit (B) which has a 5-membered ring and in which all hydrogen atoms bonded to carbon 10 atoms are substituted by fluorine atoms, and a unit (C) which has neither an ion exchange group nor a ring structure, has an ether bond, and has an ether equivalent of at most 350 as established by the following formula (I) and in which all hydrogen atoms bonded to carbon atoms are substituted by fluorine atoms: Ether equivalent=the molecular weight of the monomer forming the unit (C)/the 15 number of ether bonds in the monomer forming the unit (C) (I). |
| US09692071B2 |
Membrane structure
A membrane, suitable for use in a fuel cell comprises: (a) a central region comprising an ion-conducting polymeric material; (b) a border region which creates a frame around the central region and which consists of one or more non-ion-conducting materials wherein at least one of the one or more non-ion-conducting materials forms a layer; wherein the non-ion-conducting material of the border region overlaps the ion-conducting polymeric material of the central region by 0 to 10 mm in an overlap region. |
| US09692069B2 |
Processes and systems for storing, distributing and dispatching energy on demand using and recycling carbon
The present invention generally relates to storing energy in a form that is carbon neutral, storable and transportable, so that it can be used on demand. The present invention provides a process and system for using energy as available to produce carbon from carbon oxide, and then oxidizing the carbon to generate useful energy on demand, while effectively recycling the carbon, oxidant, and carbon oxide used in the process or system. In one embodiment, the present invention effectively stores renewable energy as carbon, transports the carbon, oxidizes the carbon to generate useful energy on demand and recycles the carbon as carbon dioxide. This invention may increase the utilization of renewable energy, especially for electrical power generation, while producing no net carbon dioxide or other air pollutants. |
| US09692068B2 |
Fuel cell system
A fuel cell system includes: a fuel cell; a coolant path connected to the fuel cell and allowing a coolant that cools the fuel cell to flow therethrough; a temperature detection unit configured to detect a temperature of the coolant in the coolant path; a temperature correction unit configured to calculate a temperature correction value by correcting the temperature of the coolant detected by the temperature detection unit; and a lower limit voltage control unit configured to control a lower limit voltage of the fuel cell based on the temperature correction value, wherein the temperature correction unit calculates the temperature correction value based on a following equation: T filt = T filt _ old + T - T filt _ old τ where Tfilt represents the temperature correction value, Tfilt_old represents a last temperature correction value, T represents the temperature of the coolant, and τ represents a coefficient, and the coefficient when the temperature of the coolant is less than a first predetermined value is set to be greater than the coefficient when the temperature of the coolant is equal to or greater than a second predetermined value. |
| US09692065B2 |
Fuel supply unit
A hydrogen supply unit is provided with an inflow block having an inflow passage for hydrogen gas, an outflow block having an outflow passage for hydrogen gas, injectors for adjusting a flow rate and a pressure of hydrogen gas, a secondary pressure sensor for detecting hydrogen gas pressure in the inflow passage, and a tertiary pressure sensor for detecting hydrogen gas pressure in the outflow passage. An inlet side of each injector is connected to the inflow passage and an outlet side of each injector is connected to the outflow passage. The hydrogen gas allowed to flow in the inflow passage is injected by each injector into the outflow passage and thereby reduced in pressure. Each of the injectors, secondary pressure sensor, and tertiary pressure sensor are held between the inflow block and outflow block. |
| US09692063B2 |
Fuel cell separator and fuel cell
A fuel cell separator comprises a first plate and a second plate. The first plate has a plurality of first projections protruded toward the second plate to define reactive gas flow paths, the second plate has a plurality of second projections protruded toward the first plate to define reactive gas flow paths. A top of each of the plurality of first projections is in contact with an intermediate part between adjacent two of the plurality of second projections formed on the second plate, and a top of each of the plurality of second projections is in contact with an intermediate part between adjacent two of the plurality of first projections formed on the first plate. |
| US09692062B2 |
Fuel cell and method for operating the fuel cell
Provided are a fuel cell that employs a fuel-electrode collector excellent in terms of thermal conductivity and the like, so that it is excellent in terms of power generation efficiency and cost effectiveness; and a method for operating the fuel cell. Included are a membrane electrode assembly (MEA), a fuel-electrode collector that is a porous metal body disposed in contact with a fuel electrode and performing current collection, and a heating device operated by electric power, wherein a solid electrolyte is a proton-permeable electrolyte, a fuel-gas channel is provided to cause a fuel gas to pass through the fuel-electrode collector, and the porous metal body constituting the fuel-electrode collector is formed of aluminum or aluminum alloy. |
| US09692061B2 |
Organic electrolyte solution and redox flow battery including the same
An organic electrolyte solution including a metal-ligand coordination compound, wherein the ligand is an organic phosphate compound. |
| US09692057B2 |
Copper-covered steel foil, negative electrode, and battery
A negative electrode collector using a copper-covered steel foil for carrying a negative electrode active material for lithium ion secondary batteries has a steel sheet as the core material thereof and has, on both surfaces thereof, a copper covering layer having a mean thickness tCu of from 0.02 to 5.0 μm on each surface, and of which the total mean thickness, t, including the copper covering layer 7 is from 3 to 100 μm with tCu/t of at most 0.3. The steel sheet can be common steel, austenitic stainless steel, or ferritic stainless steel. The copper covering layer can be a copper electroplating layer (including one rolled after plating). On the surface of the copper covering layer, for example, a carbon-based active material layer that has been densified through strong roll pressing is formed, and the copper-covered steel foil and the carbon-based active material layer constitute the negative electrode collector. |
| US09692054B2 |
Electrode material for lithium ion secondary battery, electrode for lithium ion secondary battery, and lithium ion secondary battery
There are provided an electrode material for a lithium ion secondary battery having a high discharge capacity and a high mass energy density at a low temperature or at a high-speed charge and discharge, an electrode for a lithium ion secondary battery, and a lithium ion secondary battery. An electrode material for a lithium ion secondary battery of the present invention includes an electrode active material made of LiFexMn1−x−yMyPO4 (0.220≦x≦0.350, 0.0050≦y≦0.018) in which the M is either or both of Co and Zn, the electrode material has an orthorhombic crystal structure, a space group is Pnma, values of crystal lattice constants a, b, and c satisfy 10.28 Å≦a≦10.42 Å, 6.000 Å≦b≦6.069 Å, and 4.710 Å≦c≦4.728 Å, and lattice volume V satisfies 289.00 Å3≦V≦298.23 Å3. |
| US09692052B2 |
Electrode material for battery, electrode material paste for battery, and solar cell using same, storage battery, and method for manufacturing solar cell
According to one embodiment, an electrode material for a battery includes a tungsten oxide powder or a tungsten oxide composite powder provided with a coating unit containing at least one selected from a metal oxide, silicon oxide, a metal nitride, and silicon nitride. |
| US09692048B2 |
Nonaqueous electrolyte rechargeable battery
A positive electrode collector includes a main body layer and a surface layer. The surface layer is provided at least at a portion of a surface of the main body layer where the positive electrode mixture layer is provided, and is made of a carbon material. A first positive electrode active material is made of first lithium complex oxide having a layered crystal structure. A second positive electrode active material includes a particle made of second lithium complex oxide having an olivine crystal structure, a carbon film provided at least at a part of a surface of the particle, and alginic acid salt provided at least at a part of a surface of the carbon film. A conducting agent in the positive electrode mixture layer includes a carbon particle and alginic acid salt provided at least at a part of a surface of the carbon particle. |
| US09692045B2 |
Porous absorbent for sodium metal halide cells
A cell cathode compartment comprises a granule bed comprising metal granules, metal halide granules, and sodium halide granules, a separator adjacent to the granule bed, a liquid electrolyte dispersed in the granule bed, and a porous absorbent disposed in the granule bed, wherein a transverse cross-sectional distribution of the porous absorbent in the granule bed varies in a longitudinal direction from a first position to a second position. In another embodiment, a cell cathode compartment comprises a granule bed comprising metal granules, metal halide granules, and sodium halide granules, a separator adjacent to the granule bed, a liquid electrolyte dispersed in the granule bed, and a porous absorbent coating on a surface adjacent to the granule bed. |
| US09692044B2 |
Low cost Si-based negative electrodes with enhanced cycling performance
A rechargeable battery comprising a positive electrode, a negative electrode and an electrolyte, wherein: —the electrolyte comprises a SEI film-forming agent, and—the negative electrode comprises a micrometric Si based active material, a polymeric binder material and a conductive agent, wherein at least part of the surface of the Si based active material consists of Si—OCO—R groups, Si being part of the active material, and R being the polymeric chain of the binder material. |
| US09692042B2 |
Nonaqueous electrolyte battery and battery pack
According to one embodiment, there is provided a nonaqueous electrolyte battery. The nonaqueous electrolyte battery includes a negative electrode, a positive electrode, and a nonaqueous electrolyte. An Li-atom abundance ratio ALi, Ti-atom abundance ratio ATi, and C-atom abundance ratio AC of a surface of the negative electrode satisfy inequalities 2≦AC/ATi≦10, and 1.0≦ALi/AC≦1.5. The positive electrode includes a nickel-cobalt-manganese composite oxide represented by a composition formula Li1−aNixCoyMnzO2. Subscripts x, y, and z satisfy an inequality 0.1≦x/(y+z)≦1.3, and subscript a satisfies an inequality 0≦a≦1. A ratio p/n of a capacity p of the positive electrode to a capacity n of the negative electrode is within a range of 1.2 to 2. |
| US09692037B2 |
Rechargeable battery
A rechargeable battery includes: an electrode assembly; a case housing the electrode assembly; a cap plate closing and sealing an opening of the case; an electrode terminal at an outside of the cap plate with respect to the case, extending through an opening in the cap plate, and electrically connected to the electrode assembly; and an insulating member between the electrode terminal and the cap plate. The electrode terminal includes: a first plate terminal electrically connected to the electrode assembly; a second plate terminal spaced from the first plate terminal; and a fuse connecting the first plate terminal and the second plate terminal and being at least partially surrounded by the insulating member. |
| US09692030B2 |
Battery module and method for the production thereof
A method for producing a battery module having a plurality of individual electrochemical cells, includes the following steps: —arranging cell cans; —embedding the cell cans in a metal foam; and —inserting cell coils into the cell cans. The metal foam is used hereby as common negative pole or positive pole of the single cells. |
| US09692028B2 |
Separator for nonaqueous electrolyte battery, and nonaqueous electrolyte battery
Provided is a separator for a nonaqueous electrolyte battery including a composite membrane. The composite membrane includes a porous substrate that contains a thermoplastic resin and an adhesive porous layer that is provided on at least one side of the porous substrate and contains an adhesive resin. The difference between the Gurley number of the porous substrate and the Gurley number of the composite membrane is 75 sec/100 cc or less. The difference between the tortuosity of the porous substrate and the tortuosity of the composite membrane is 0.30 or less. |
| US09692024B2 |
Cover mechanism comprising slide member and electronic device
A cover mechanism includes a cover which is detachably attached to a housing and a slide member which is slidably attached to the housing. The slide member includes a lock portion which locks the cover to keep the cover closed and a push-up portion which pushes up the cover as the slide member slides in a direction to release the lock. |
| US09692023B2 |
Electricity storage module
An electricity storage module is provided with a stack formed by stacking a plurality of electricity storage elements having positive and negative lead terminals that protrude outward from end portions. Differently polarized lead terminals of adjacent electricity storage elements are bent in opposite directions and connected by superimposing and welding the end portions thereof. |
| US09692019B2 |
Element manufacturing method and element manufacturing apparatus utilizing differential pressure for covering a substrate
To provide an element manufacturing method and element manufacturing apparatus for efficiently manufacturing an element such as an organic semiconductor element. First, an intermediate product, which includes a substrate and a protrusion extending in a normal direction of the substrate, is formed. Next, the intermediate product is covered, at a side where the protrusion is provided, with a first surface of a lid member. After the covering of the intermediate product, a gas is injected into an enclosed space formed at a side of a second surface of the lid member that is present on an opposite side of the first surface. This enhances an internal pressure of the enclosed space, thus bringing the first surface of the lid member into close contact with the intermediate product. |
| US09692016B2 |
Optoelectronic component and method for producing an optoelectronic component
Various embodiments may relate to an optoelectronic component and a method for producing an optoelectronic component. In various embodiments, an optoelectronic component is provided, the optoelectronic component, including an optically active structure, which is designed for receiving and/or providing electromagnetic radiation, and at least one scattering structure, which is formed in the beam path of the electromagnetic radiation on or above the optically active structure. The scattering structure is designed such that the directional characteristic of the electromagnetic radiation can be electrically modified. |
| US09692013B2 |
Organic light emitting device
Disclosed is an organic light emitting device. The organic light emitting device includes a first emission unit configured to include a common blue emission material layer which is included in common in a plurality of pixels emitting lights having different wavelength ranges, a second emission unit configured to include a red emission material layer, a green emission material layer, and a blue emission material layer which respectively emit lights having different wavelength ranges, a charge generation layer disposed between the first emission unit and the second emission unit, a first electrode formed as a reflective electrode, and configured to supply an electric charge having a first polarity to the first emission unit and the second emission unit, and a second electrode formed as a semi-transmissive electrode, and configured to supply an electric charge having a second polarity to the first emission unit and the second emission unit. |
| US09692012B2 |
Organic light emitting display device and method of manufacturing the same
An organic light emitting display device includes a first substrate, a thin film transistor disposed on the first substrate, a first electrode electrically coupled to the thin film transistor, a pixel defining layer disposed on the first substrate and the first electrode to define unit pixels, a plurality of organic light emitting structure disposed on the first electrode, where in the organic light emitting structure includes a first organic light emitting structure, a second organic light emitting structure and a third light emitting structure, a second electrode which covers the first through third organic light emitting structures and the pixel defining layer; a metamaterial layer disposed on the second electrode corresponding to the organic light emitting structures, an encapsulation member which covers the second electrode and the metamaterial layer, and a second substrate disposed on the encapsulation member opposite to the first substrate. |
| US09692011B2 |
Electroluminescent apparatus
In an organic EL display device (electroluminescence device) including an organic EL element (electroluminescence element), the organic EL element is covered with a desiccant layer. Between a TFT substrate (substrate) and an opposite substrate, a frame-shaped moisture high-permeable layer and a frame-shaped sealing member are disposed in a state successively surrounding the desiccant layer. |
| US09692010B2 |
Organic light emitting display device
An organic light emitting display device comprising: a substrate; a display area on the substrate; and an encapsulation layer disposed on the display area and comprising a plurality of inorganic layers and a plurality of organic layers, wherein the plurality of inorganic layers and the plurality of organic layers are alternately laminated, the inorganic layer comprises at least first to third inorganic layers, the organic layer comprises at least first and second organic layers, the first inorganic layer is disposed on the display area, the first organic layer is disposed on the first inorganic layer, the second inorganic layer is disposed on the first organic layer and covers end portions of the first inorganic layer, the second organic layer is disposed on the second inorganic layer, and the third inorganic layer is disposed on the second organic layer and does not contact the second inorganic layer. |
| US09692009B2 |
Device and method for producing hermetically-sealed cavities
An apparatus may include a first support covered with at least one ALD precursor and/or at least one MLD precursor, and a second support covered with at least one ALD precursor and/or at least one MLD precursor which is/are complementary to the ALD precursor and/or MLD precursor of the first support. The first support is at least partly joined to the second support by an atomic bond between the ALD precursor of the first support and the ALD precursor of the second support or between the MLD precursor of the first support and the MLD precursor of the second support in such a way that an ALD layer or an MLD layer is formed. |
| US09692007B2 |
Stacked organic light-emitting diode having a triple charge generation layer
A stacked organic light-emitting diode, a display device and a manufacturing method of a stacked organic light-emitting diode are disclosed. A stacked organic light-emitting diode includes at least two light-emitting units in a stacked arrangement and a charge generation layer disposed between the adjacent light-emitting units, wherein the charge generation layer includes a first material layer, an electron injection layer disposed on the first material layer and a second material layer disposed on the electron injection layer. By means of said stacked organic light-emitting diode and manufacturing method thereof, it can achieve excellent electron injection effect, even in the case of manufacturing an inverted-type stacked organic light-emitting diode (the lower electrode is a cathode). |
| US09692000B2 |
Organic electroluminescent element, display device and illuminating device
Disclosed is an organic electroluminescent element having high luminous efficiency and long life. Also disclosed are a display device and an illuminating device respectively using such an organic electroluminescent element. Specifically disclosed is an organic electroluminescent element comprising an electrode and at least one or more organic layers on a substrate. This organic electroluminescent element is characterized in that at least one of the organic layers is a light-emitting layer containing a phosphorescent compound and a host compound, the phosphorescent compound has a HOMO of −5.15 to −3.50 eV and a LUMO of from −1.25 to +1.00 eV, and the host compound has a 0-0 band of the phosphorescence spectrum at not more than 460 nm and a glass transition temperature of not less than 60° C. |
| US09691998B2 |
Single-walled carbon nanotubes/quantum dot hybrid structures and methods of making and use of the hybrid structures
Briefly described, embodiments of the present disclosure relate to structures including single-walled carbon nanotube/quantum dot networks, devices including the structures, and methods of making devices including the single-walled carbon nanotube/quantum dot networks. |
| US09691995B2 |
Method of manufacturing substrate for organic electronic device
Provided are a method of manufacturing a substrate, a method of manufacturing an organic electronic device (OED), a substrate, an OED, and a use thereof. The method of manufacturing a substrate which may provide an OED having an element with improved efficiency may be provided. In addition, a substrate having excellent surface roughness, and a refractive index or a light scattering property, which is suitably controlled according to a desired effect may be manufactured, and therefore the substrate capable of forming an OED having excellent reliability and efficiency and the method of manufacturing an OED may be provided. Moreover, a substrate and an OED, which are manufactured by the above methods, and their uses may be provided. The manufacturing method may be effectively applied to manufacture, for example, a flexible element. |
| US09691992B2 |
Organic light-emitting diode
An organic light-emitting diode includes a substrate, a first electrode, a second electrode facing the first electrode, and an organic layer between the first electrode and the second electrode. The organic layer includes an emission layer, and the emission layer includes a first compound represented by Formula 1 and a second compound represented by Formula 100. |
| US09691991B2 |
Organic light emitting diode
The present invention relates to an organic light emitting diode and a method of manufacturing the same. An organic light emitting diode according to the present invention comprises an exciton blocking layer comprising a compound represented by Formula 1 to confine an exciton to a light emitting layer to prevent light emitting leakage, and thus there is an effect of implementing an organic electroluminescence diode having excellent light emitting efficiency. Further, even though there is no separate electron injection layer, electron injection and light transport characteristics are excellent by comprising an electron transport layer comprising a compound represented by Formula 2 or 3, and thus it is possible to implement an organic light emitting diode having a simple and economical manufacturing process, a low voltage, high efficiency, and a long life span as compared to the related art. |
| US09691986B2 |
Furan and selenophene derivatized benzo [1,2-b:4,5-b′] dithiophene-thienothiophene based conjugated polymers for high-efficiency organic solar cells
Compositions, synthesis and applications for furan, thiophene and selenophene derivatized benzo[1,2-b:3,4-b′]dithiophene(BDT)-thienothiophene (BDT-TT) based polymers, namely, poly[(4,8-bis(5-(2-ethyhexyl)selenophen-2-yl)-benzo[1,2-b;4,5-b′]dithiophene)-2,6-diyl-alt-(4-(2-ethylhexanoyl)-3-fluorothieno[3,4-b]thiophene)-2-6-diyl (CS-15), poly[(4,8-bis(5-(2-ethyhexyl)selenophen-2-yl)-benzo[1,2-b;4,5-b′]dithiophene)-2,6-diyl-alt-(4-(2-ethylhexyl)-3-fluorothieno[3,4-b]thiophene)-2-carboxylate-2-6-diyl (CS-16), poly[(4,8-bis(5-(2-ethyhexyl)furan-2-yl)-benzo[1,2-b;4,5-b′]dithiophene)-2,6-diyl-alt-(4-(2-ethylhexyl)-3-fluorothieno[3,4-b]thiophene)-2-carboxylate-2-6-diyl (CS-18) and poly[(4,8-bis(5-hexylfuran-2-yl)-benzo[1,2-b;4,5-b′]dithiophene)-2,6-diyl-alt-(4-(2-ethylhexanoyl)-3-fluorothieno[3,4-b]thiophene)-2-6-diyl (CS-24) are disclosed. Further, an organic solar cell constructed of a derivatized benzo[1,2-b:3,4-b′]dithiophene(BDT)-thienothiophene (BDT-TT) based polymer is discussed. |
| US09691984B2 |
Semiconducting polymer and organic electroluminescence device thereof
A semiconducting polymer and electronic devices comprising such polymer, in which the polymer has one or more repeat units, a first of the repeat units having the structure wherein R12 to R17 independently comprise H or a polyether group having at least five ethoxy repeat units, and in which at least one of R12 to R17 has a polyether group. |
| US09691980B1 |
Method for forming memory device
A method for forming a memory device is provided. The method includes forming a plurality of memory cells. The method also includes performing a first baking on the memory cells. The method further includes setting a specified current, and after performing the first baking, performing a test process on the memory cells. The test process includes reading the current of the memory cells. When the read current of the memory cells is larger than or equal to the specified current, the test process of the memory cell is done. When the read current of the memory cells is smaller than the specified current, a re-forming process is performed on the memory cells to form a plurality of re-formed memory cells, and then the test process is performed on the re-formed memory cells. |
| US09691978B2 |
Semiconductor memory device and method of controlling the same
According to one embodiment, a semiconductor memory device includes a plurality of first wirings, a plurality of second wirings, a variable resistance layer, a first barrier insulating layer, and a second barrier insulating layer. The first wirings are disposed at predetermined pitches in a first direction intersecting with a substrate. The second wirings are disposed at predetermined pitches in a second direction intersecting with the first direction. The second wirings are formed to extend in the first direction. The variable resistance layer is disposed between the first wiring and the second wiring. The variable resistance layer is disposed at a position where the first wiring intersects with the second wiring. The first barrier insulating layer is disposed between the first wiring and the variable resistance layer. The second barrier insulating layer is disposed between the second wiring and the variable resistance layer. |
| US09691965B2 |
Method for making electrical contact with an electronic component in the form of a stack, and electronic component having a contact-making structure
A method is provided for making electrical contact with an electronic component in the form of a stack formed from a plurality of material layers, which react upon application of an electric field, and a plurality of electrode layers, wherein each material layer is arranged between two of the electrode layers. An insulation structure is generated on at least one stack circumferential region of the stack, which exposes each second electrode layer of the at least one stack circumferential region for electrical contact to be made. Also, a contact-making structure is applied to the at least one stack circumferential region which is provided with the insulation structure. Before the step of generating the contact-making structure, the material layers are partially removed by a material-removing method such that the electrode layers are exposed close to the surface. |
| US09691962B2 |
High fidelity and high efficiency qubit readout scheme
A technique relates to a qubit readout system. A cavity-qubit system has a qubit and a readout resonator and outputs a readout signal. A lossless superconducting circulator is configured to receive the microwave readout signal from the cavity-qubit system and transmit the microwave readout signal according to a rotation. A quantum limited directional amplifier amplifies the readout signal. A directional coupler is connected to and biases the amplifier to set a working point. A microwave bandpass filter transmits in a microwave frequency band by passing the readout signal while blocking electromagnetic radiation outside of the microwave frequency band. A low-loss infrared filter has a distributed Bragg reflector integrated into a transmission line. The low-loss filter is configured to block infrared electromagnetic radiation while passing the microwave readout signal. The low-loss infrared filter is connected to the microwave bandpass filter to receive input of the microwave readout signal. |
| US09691956B2 |
Light emitting device package
The light emitting device package may include a light emitting device including at least one light emitting diode and a body including at least one lead frame on which a light emitting device is disposed, the body provided a first protrusion formed on a outside of the body, wherein the width of a lower surface of the first protrusion is 0.5 times to 0.9 times the width of a upper surface of the first protrusion. |
| US09691954B2 |
Light-emitting diode (LED) package
A light-emitting diode (LED) package includes a light-emitting structure including a first conductive-type semiconductor layer, an active layer, and a second conductive-type semiconductor layer; an isolating insulation layer; a first connection electrode portion and a second connection electrode portion electrically connected to the first conductive-type semiconductor layer and the second conductive-type semiconductor layer, respectively; a first electrode pad and a second electrode pad electrically connected to the first connection electrode portion and the second connection electrode portion, respectively; a first molding resin layer provided between the first electrode pad and the second electrode pad; a first pillar electrode and a second pillar electrode electrically connected to the first electrode pad and the second electrode pad, respectively; and a second molding resin layer provided on the first molding resin layer, the first electrode pad, and the second electrode pad, and between the first pillar electrode and the second pillar electrode. |
| US09691953B2 |
Light emitting element and light emitting device
A light emitting element includes a semiconductor stack including an n-side semiconductor layer, and a p-side semiconductor layer disposed in a portion of an area above the n-side semiconductor layer, the semiconductor stack having a plurality of first lateral surfaces and a plurality of second lateral surfaces; an n-pad electrode disposed in an area different from an area where the p-side semiconductor layer is disposed above the n-side semiconductor layer, the n-pad electrode being electrically connected to the n-side semiconductor layer, and the n-pad electrode having a plurality of lateral surfaces that oppose the first lateral surfaces of the semiconductor stack; a first light transmissive film disposed in contact with the first lateral surfaces of the semiconductor stack; and a second light transmissive film disposed in contact with the second lateral surfaces of the semiconductor stack. A refractive index of the second light transmissive film is lower than a refractive index of the semiconductor stack, and higher than a refractive index of the first light transmissive film. |
| US09691950B2 |
Light emitting device and method of manufacturing light emitting device
A light emitting device includes a light emitting element configured to emit visible light; a fluorescent substance excited by light from the light emitting element and configured to emit visible light; a translucent member containing a translucent base material, which provided on the fluorescent substance or configured to contain the fluorescent substance, and provided on the light emitting element; and a film provided on an upper surface of the translucent member, and configured as an agglutination of nanoparticles having a different refractive index from the base material. |
| US09691946B2 |
Method for producing a conversion lamina and conversion lamina
A method for producing at least one conversion lamina for a radiation-emitting semiconductor component is specified. A base material including a conversion substance contained therein is applied to a substrate by means of a double-layered stencil. Furthermore, a conversion lamina for a radiation-emitting semiconductor component includes a base material and a conversion substance embedded therein. The thickness of the conversion lamina is in a range of between 60 μm and 170 μm inclusive. |
| US09691945B2 |
Semiconductor light emitting device
A light emitting device is provide comprising a light emitting diode (LED) chip having a first main surface and a second main surface opposing the first main surface, and one or more side surfaces extending between the first main surface and second main surface. A plurality of electrodes is disposed on the first main surface. A wavelength conversion film is disposed on the second main surface. A mark is formed in the wavelength conversion film. The mark contains orientation information of the light emitting device, thereby enabling the light emitting device to be properly oriented on a receiving substrate. |
| US09691944B2 |
Semiconductor light-emitting device and method for manufacturing the same
A semiconductor light-emitting device of the present disclosure includes a plurality of semiconductor layers; a first inclined face having a first slope inside the plurality of semiconductor layers, which connects an etched-exposed surface of the first semiconductor layer with the surface of the second semiconductor layer and reflects the light from the active layer towards the first semiconductor layer; a second inclined face having a second slope greater than the first slope, which is provided around the plurality of semiconductor layers and reflects the light from the active layer towards the first semiconductor layer; a non-conductive reflective film formed on the second semiconductor layer, for reflecting the light from the active layer towards the first semiconductor layer. |
| US09691943B2 |
Light-emitting element having a reflective structure with high efficiency
A light-emitting device comprises a reflective layer; a first transparent layer on the reflective layer; a light-emitting stack comprising an active layer on the first transparent layer; and a cavity in the first transparent layer. |
| US09691942B2 |
Single-cystalline aluminum nitride substrate and a manufacturing method thereof
The present invention relates to a single-crystalline aluminum nitride wherein a carbon concentration is 1×1014 atoms/cm3 or more and less than 3×1017 atoms/cm3, a chlorine concentration is 1×1014 to 1×1017 atoms/cm3, and an absorption coefficient at 265 nm wavelength is 40 cm−1 or less. |
| US09691940B2 |
Nitride semiconductor structure
A nitride semiconductor structure including a substrate, a cap layer, a nucleation layer, a transition layer and a composite buffer structure is provided. The cap layer is located on the substrate. The nucleation layer is located between the substrate and the cap layer. The transition layer is located between the nucleation layer and the cap layer, wherein the transition layer is an AlxGaN layer. The composite buffer structure is located between the transition layer and the cap layer. The composite buffer structure includes a first composite buffer layer, wherein the first composite buffer layer includes a plurality of first AlyGaN layers and a plurality of first GaN layers alternately stacking with each other, and the x is equal to the y. |
| US09691939B2 |
Patterned layer design for group III nitride layer growth
A method of fabricating a device using a layer with a patterned surface for improving the growth of semiconductor layers, such as group III nitride-based semiconductor layers with a high concentration of aluminum, is provided. The patterned surface can include a substantially flat top surface and a plurality of stress reducing regions, such as openings. The substantially flat top surface can have a root mean square roughness less than approximately 0.5 nanometers, and the stress reducing regions can have a characteristic size between approximately 0.1 microns and approximately five microns and a depth of at least 0.2 microns. A layer of group-III nitride material can be grown on the first layer and have a thickness at least twice the characteristic size of the stress reducing regions. A device including one or more of these features also is provided. |
| US09691935B2 |
Impurity-diffusing composition and method for producing semiconductor element
An impurity-diffusing composition including (A) a polysiloxane represented by Formula (1) and (B) an impurity diffusion component. In the formula, R1 represents an aryl group having 6 to 15 carbon atoms, and a plurality of R1 may be the same or different. R2 represents any of a hydroxyl group, an alkyl group having 1 to 6 carbon atoms, an alkoxy group having 1 to 6 carbon atoms, an alkenyl group having 2 to 10 carbon atoms, an acyl group having 2 to 6 carbon atoms, and an aryl group having 6 to 15 carbon atoms, and a plurality of R2 may be the same or different. R3 and R4 each represent any of a hydroxyl group, an alkyl group having 1 to 6 carbon atoms, an alkoxy group having 1 to 6 carbon atoms, an alkenyl group having 2 to 10 carbon atoms, and an acyl group having 2 to 6 carbon atoms, and a plurality of R3 and a plurality of R4 each may be the same or different. The ratio of n:m is 95:5 to 25:75. |
| US09691931B2 |
Materials, fabrication equipment, and methods for stable, sensitive photodetectors and image sensors made therefrom
Optically sensitive devices include a device comprising a first contact and a second contact, each having a work function, and an optically sensitive material between the first contact and the second contact. The optically sensitive material comprises a p-type semiconductor, and the optically sensitive material has a work function. Circuitry applies a bias voltage between the first contact and the second contact. The optically sensitive material has an electron lifetime that is greater than the electron transit time from the first contact to the second contact when the bias is applied between the first contact and the second contact. The first contact provides injection of electrons and blocking the extraction of holes. The interface between the first contact and the optically sensitive material provides a surface recombination velocity less than 1 cm/s. |
| US09691925B2 |
Light receiving element module and manufacturing method therefor
Light receiving elements of a back connection type including first and second electrodes on their back sides are connected by an inter-element connecting body including a tabular main body section and an inter-element connecting section to form a light receiving element module. The main body section is selectively directly connected to the first electrode and arranged on the second electrode via an insulating layer. The main body section covers substantially the entire back side of each of the light receiving elements excluding a part of the second electrode. The second electrode is connected to the inter-element connecting section of an adjacent light receiving element. The main body section forms a reflecting section between the main body section and the light receiving element to enable reflected light to be made incident on the light receiving element from a gap between the first and second electrodes. |
| US09691924B1 |
Solar cell interconnect with multiple current paths
Solar cell interconnects with multiple current paths. A solar cell interconnect may include a plurality of in-plane slits arranged in several rows. The in-plane slits may be spaced to provide strain relief without unduly increasing the electrical path resistance through the solar cell interconnect. The in-plane slits may be staggered, for example. |
| US09691923B2 |
Apparatus for and method of forming plural groups of laser beams using two rotating diffractive optical elements
An apparatus for and a method of forming a plurality of groups of laser beams (2, 2′, 2″) are defined. Each group (2, 2′, 2″) may comprise two or more laser beams. The apparatus comprises a first diffractive optical element (3, referred as DOE) and a second diffractive optical element (8), the first DOE (3) being arranged to receive a first laser beam (1) and to divide this into a plurality of second laser sub-beams and the second DOE (8) being arranged to receive said plurality of second laser sub-beams and to divide each of these into two or more groups of third laser sub-beams (2, 2′, 2″), the separation of the groups in a direction perpendicular to a first axis being adjustable by rotation of the first DOE (3) about its optical axis and the separation of the third laser sub-beams (2, 2′, 2″) within each group in a direction perpendicular to the first axis being adjustable by rotation of the second DOE (8) about its optical axis. |
| US09691918B2 |
Solar battery cell and manufacturing method for the solar battery cell
Provided is a solar battery cell with low price, high reliability, and high conversion efficiency. A manufacturing method for the solar battery cell including the following processes. That is: forming and laminating a second conductive-type layer and an antireflection film on a first conductive-type semiconductor substrate; applying a conductive paste containing a conductive particle and a glass frit to a predetermined position of the antireflection film; firing the semiconductor substrate with the conductive paste applied thereto; and forming an electrode penetrating the antireflection film and electrically connected to the second conductive-type layer. The semiconductor substrate with the conductive paste applied thereto is consecutively subjected to heat treatment just after the firing instead of being returned to room temperature. |
| US09691915B2 |
Solar cell with anti-reflection structure and method for fabricating the same
A solar cell with an anti-reflection structure comprises a solar cell substrate, a meshed electric-conduction layer formed on one surface of the solar cell substrate, a plurality of microspheres disposed on the meshed electric-conduction layer, and a dielectric layer. The microspheres have a diameter of 0.1-50 μm. The dielectric layer is formed between the meshed electric-conduction layer and the microspheres, and has a thickness smaller than the diameter of the microspheres to make the microspheres protrude from the dielectric layer. The meshed electric-conduction layer is formed via a screen-printing method. The present invention uses the microspheres and the meshed electric-conduction layer to achieve an excellent anti-reflection effect. Further, the present invention has the advantages of a simple fabrication process and a low fabrication cost. |
| US09691914B2 |
Optical sensor device
The following configuration is adopted in order to provide a highly reliable optival sensor device which enhances the reliability of devices without making the devices unsuitable for size and thickness reductions. The light sensor comprises an element-mounting portion (3) having a cavity and a lid member closely attached thereinto, the lid member being composed of: a window (2) constituted of a phosphate-based glass to which properties approximate to a spectral luminous efficacy properties have been imparted by compositional control; and a frame (1) constituted of a phosphate-based glass having light-shielding properties. The lid member is aLaminated glass member obtained by cutting the phosphate-based glass having the spectral luminous efficacy properties into individual pieces, fitting the glass piece into the opening of the phosphate-based glass (1) having light-shielding properties, the opening having been formed so as to have a size approximately equal to the cavity size, and melting and integrating the glasses member. |
| US09691910B2 |
Oxide semiconductor substrate and schottky barrier diode
A schottky barrier diode element having a silicon (Si) substrate, an oxide semiconductor layer and a schottky electrode layer, wherein the oxide semiconductor layer includes a polycrystalline and/or amorphous oxide semiconductor having a band gap of 3.0 eV or more and 5.6 eV or less. |
| US09691906B2 |
Method for producing thin film transistor
A method for producing a thin film transistor including an oxide semiconductor layer includes: depositing an oxide semiconductor film above a substrate by a sputtering method; and forming the oxide semiconductor layer into a predetermined shape by processing the oxide semiconductor film, wherein in the depositing of an oxide semiconductor film, a first oxide semiconductor film is deposited by using a first power density, and a second oxide semiconductor film is then deposited on the first oxide semiconductor film by using a second power density different from the first power density. |
| US09691904B2 |
Semiconductor device
To give favorable electrical characteristics to a semiconductor device. The semiconductor device includes an insulating layer, a semiconductor layer over the insulating layer, a pair of electrodes over the semiconductor layer and each electrically connected to the semiconductor layer, a gate electrode over the semiconductor layer, and a gate insulating layer between the semiconductor layer and the gate electrode. The insulating layer includes an island-shaped projecting portion. A top surface of the projecting portion of the insulating layer is in contact with a bottom surface of the semiconductor layer, and is positioned on an inner side of the semiconductor layer when seen from above. The pair of electrodes covers part of a top surface and part of side surfaces of the semiconductor layer. Furthermore, the gate electrode and the gate insulating layer cover side surfaces of the projecting portion of the insulating layer. |
| US09691903B2 |
Semiconductor device and manufacturing method thereof
In a method for manufacturing a semiconductor device, a fin structure including a first semiconductor layer, an oxide layer disposed over the first semiconductor layer and a second semiconductor layer disposed over the oxide layer is formed. An isolation insulating layer is formed so that the second semiconductor layer of the fin structure protrudes from the isolation insulating layer while the oxide layer and the first semiconductor layer are embedded in the isolation insulating layer. A third semiconductor layer is formed on the exposed second semiconductor layer so as to form a channel. |
| US09691899B2 |
Semiconductor structure and method for manufacturing the same
A semiconductor structure is provided, comprising a substrate (130), a support structure (131), a base region (100), a gate stack, a spacer (240), and a source/drain region, wherein the gate stack is located above the base region (100), and the base region (100) is supported above the substrate (130) by the support structure (131), wherein the support structure (131) has a sigma-shaped lateral cross-section; an isolation structure (123) is formed below edges on both sides of the base region (100), wherein a portion of the isolation structure (123) is connected to the substrate (130); a cavity (112) is formed between the isolation structure (123) and the support structure (131); and a source/drain region is formed on both sides of the base region (100) and the isolation structure (123). Accordingly, a method for manufacturing the semiconductor structure is also provided. |
| US09691896B2 |
Semiconductor device
A semiconductor device includes a fin-shaped silicon layer on a silicon substrate surface. The fin-shaped silicon layer has a longitudinal axis extending in a first direction parallel to the surface and a first insulating film is around the fin-shaped silicon layer. A pillar-shaped silicon layer is on the fin-shaped silicon layer, and a pillar diameter of the bottom of the pillar-shaped silicon layer is equal to a fin width of the top of the fin-shaped silicon layer. The pillar diameter and the fin width are parallel to the surface. A gate insulating film is around the pillar-shaped silicon layer and a metal gate electrode is around the gate insulating film. A metal gate wiring is connected to the metal gate electrode and has a longitudinal axis extending in a second direction parallel to the surface and perpendicular to the first direction of the longitudinal axis of the fin-shaped silicon layer. |
| US09691893B2 |
Low-cost semiconductor device manufacturing method
Provided are a low-cost semiconductor device manufacturing method and a semiconductor device made using the method. The method includes forming multiple body regions in a semiconductor substrate, forming multiple gate insulating layers and multiple gate electrodes in the body region; implementing a blanket ion implantation in an entire surface of the substrate to form a low concentration doping region (LDD region) in the body region without a mask, forming a spacer at a side wall of the gate electrode, and implementing a high concentration ion implantation to form a high concentration source region and a high concentration drain region around the LDD region. According to the examples, devices have favorable electrical characteristics and at the same time, manufacturing costs are reduced. Since, when forming high concentration source region and drain regions, tilt and rotation co-implants are applied, an LDD masking step is potentially omitted. |
| US09691891B2 |
Wide band gap semiconductor device
A semiconductor substrate having a main surface and made of a wide band gap semiconductor is provided, the semiconductor substrate including a device region formed in the semiconductor substrate, and a peripheral region formed to surround the device region. In the peripheral region, the semiconductor substrate includes a first semiconductor region having a first conductivity type, and a second semiconductor region formed on the first semiconductor region and having the main surface, the second semiconductor region having a second conductivity type different from the first conductivity type. At an outermost periphery of the peripheral region, the semiconductor substrate has a plurality of stepped portions annularly surrounding the device region, and the second semiconductor region is formed along the stepped portion. |
| US09691886B2 |
Semiconductor-on-insulator (SOI) lateral heterojunction bipolar transistor having an epitaxially grown base
A method of forming a semiconductor structure includes providing an emitter and a collector on a surface of an insulator layer. The emitter and the collector are spaced apart and have a doping of a first conductivity type. An intrinsic base is formed between the emitter and the collector and on the insulator layer by epitaxially growing the intrinsic base from at least a vertical surface of the emitter and a vertical surface of the collector. The intrinsic base has a doping of a second conductivity type opposite to the first conductivity type, and a first heterojunction exists between the emitter and the intrinsic base and a second heterojunction exists between the collector and the intrinsic base. |
| US09691883B2 |
Asymmetric formation approach for a floating gate of a split gate flash memory structure
A semiconductor structure of a split gate flash memory cell is provided. The semiconductor structure includes a semiconductor substrate having a source region and a drain region. Further, the semiconductor structure includes a floating gate, a word line, and an erase gate spaced over the semiconductor substrate between the source and drain regions with the floating gate arranged between the word line and the erase gate. The semiconductor structure further includes a first dielectric sidewall region disposed between the word line and the floating gate, as well as a second dielectric sidewall region disposed between the erase and floating gates. A thickness of the first dielectric sidewall region is greater than a thickness of the second dielectric sidewall region. A method of manufacturing the semiconductor structure and an integrated circuit including the semiconductor structure are also provided. |
| US09691879B2 |
Three-dimensional memory device and method of manufacturing the same
Disclosed is a semiconductor device. The semiconductor device may include a first pipe gate including a trench extended in a first direction. The semiconductor device may include a second pipe gate formed in the first direction and spaced apart from the surface of the trench, and configured to divide the trench into a first space and a second space. The semiconductor device may include a partition pipe gate extended in a second direction crossing the first direction, and configured to divide the first space into first areas, and divide the second space into second areas. The semiconductor device may include a first pipe channel formed inside each of the first areas, and a second pipe channel formed inside each of the second areas. |
| US09691877B2 |
Replacement metal gate structures
Replacement metal gate structures with improved chamfered workfunction metal and self-aligned contact and methods of manufacture are provided. The method includes forming a replacement metal gate structure in a dielectric material. The replacement metal gate structure is formed with a lower spacer and an upper spacer above the lower spacer. The upper spacer having material is different than material of the lower spacer. The method further includes forming a self-aligned contact adjacent to the replacement metal gate structure by patterning an opening within the dielectric material and filling the opening with contact material. The upper spacer prevents shorting with the contact material. |
| US09691872B2 |
III-V semiconductor device with interfacial layer
A semiconductor structure comprises a substrate including a III-V material, and a high-k interfacial layer overlaying the substrate. The interfacial layer includes a rare earth aluminate. The present disclosure also relates to an n-type FET device comprising the same, and a method for manufacturing the same. |
| US09691869B2 |
Semiconductor devices and structures
An Integrated Circuit device, including: a first layer including first transistors; and a second layer including second transistors overlaying the first layer, where the first transistors are facing down and the second transistors are facing up, and where the second layer includes a through layer via of less than 300 nm diameter. |
| US09691867B2 |
Semiconductor device including spacers having different dimensions
The semiconductor device structures and methods for forming the same are provided. The semiconductor device structure includes a metal gate over a substrate. A first spacer is formed over sidewalls of the metal gate and having a first height. A second spacer is formed over the sidewalls of the metal gate and having a second height. The first height is higher than the second height. The first spacer is farther from the sidewalls of the metal gate than the second spacer. In addition, the semiconductor device structure includes a dielectric layer formed over the substrate to surround the first spacer and the metal gate. |
| US09691865B2 |
High frequency semiconductor device
A high frequency semiconductor device includes a stacked body, a gate electrode, a source electrode and a drain electrode. The gate electrode includes a bending gate part and a straight gate part. The bending gate part is extended in a zigzag shape and has first and second outer edges. The source electrode includes a bending source part and a straight source part. The bending source part has an outer edge spaced by a first distance from the first outer edge of the bending gate part along a normal direction. The drain electrode includes a bending drain part and a straight drain part. The bending drain part has an outer edge spaced by a second distance from the second outer edge of the bending gate part along the normal direction. |
| US09691850B2 |
Vertical transistor with air-gap spacer
A vertical transistor has a first air-gap spacer between a gate and a bottom source/drain region, and a second air-gap spacer between the gate and the contact to the bottom source/drain region. A dielectric layer disposed between the gate and the contact to the top source/drain decreases parasitic capacitance and inhibits electrical shorting. |
| US09691849B2 |
Ultra-long silicon nanostructures, and methods of forming and transferring the same
Under one aspect, a plurality of silicon nanostructures is provided. Each of the silicon nanostructures includes a length and a cross-section, the cross-section being substantially constant along the length, the length being at least 100 microns. Under another aspect, a method of making nanostructures is provided that includes providing a silicon wafer including a thickness and first and second surfaces separated from one another by the thickness; forming a patterned layer of metal on the first surface of the silicon wafer; generating a current through the thickness of the silicon wafer, the metal oxidizing the silicon wafer in a region beneath the patterned layer of the metal; and exposing the silicon wafer to an etchant in the presence of the current, the etchant removing the oxidized region of the silicon wafer so as to define a plurality of nanostructures. Methods of transferring nanowires also are provided. |
| US09691848B2 |
Semiconductor devices with germanium-rich active layers and doped transition layers
Semiconductor device stacks and devices made there from having Ge-rich device layers. A Ge-rich device layer is disposed above a substrate, with a p-type doped Ge etch suppression layer (e.g., p-type SiGe) disposed there between to suppress etch of the Ge-rich device layer during removal of a sacrificial semiconductor layer richer in Si than the device layer. Rates of dissolution of Ge in wet etchants, such as aqueous hydroxide chemistries, may be dramatically decreased with the introduction of a buried p-type doped semiconductor layer into a semiconductor film stack, improving selectivity of etchant to the Ge-rich device layers. |
| US09691846B2 |
Semiconductor device including an insulating layer which includes negatively charged microcrystal
A semiconductor device comprises: a semiconductor layer; and an insulating film that is formed on the semiconductor layer. The insulating film includes an insulating layer that is mainly made of negatively charged microcrystal. |
| US09691843B2 |
Common-substrate semiconductor devices having nanowires or semiconductor bodies with differing material orientation or composition
Common-substrate semiconductor devices having nanowires or semiconductor bodies with differing material orientation or composition and methods to form such common-substrate devices are described. For example, a semiconductor structure includes a first semiconductor device having a first nanowire or semiconductor body disposed above a crystalline substrate. The first nanowire or semiconductor body is composed of a semiconductor material having a first global crystal orientation. The semiconductor structure also includes a second semiconductor device having a second nanowire or semiconductor body disposed above the crystalline substrate. The second nanowire or semiconductor body is composed of a semiconductor material having a second global crystal orientation different from the first global orientation. The second nanowire or semiconductor body is isolated from the crystalline substrate by an isolation pedestal disposed between the second nanowire or semiconductor body and the crystalline substrate. |
| US09691842B2 |
Semiconductor device and method of manufacturing semiconductor device
A semiconductor device includes first semiconductor regions of a first conductivity type spaced apart from each other and second semiconductor regions of a second conductivity type between adjacent first semiconductor regions. At least one second semiconductor region includes a void having at least one outer surface with a crystal plane orientation of (100). A third semiconductor region of the second conductivity type is on each second semiconductor region and a fourth semiconductor region of the first conductivity type is on the third semiconductor region. A gate electrode on is disposed on each first semiconductor region to be adjacent to a third semiconductor region via a gate insulation layer. |
| US09691841B2 |
Semiconductor device
A semiconductor device includes an insulating layer formed on a substrate, and a capacitor including first and second electrodes formed in the insulating layer, wherein a lower surface of the first electrode is formed to have a greater depth than a lower surface of the second electrode in the insulating layer. |
| US09691840B2 |
Cylindrical embedded capacitors
A device includes a substrate having a front surface and a back surface opposite the front surface. A capacitor is formed in the substrate and includes a first capacitor plate; a first insulation layer encircling the first capacitor plate; and a second capacitor plate encircling the first insulation layer. Each of the first capacitor plate, the first insulation layer, and the second capacitor plate extends from the front surface to the back surface of the substrate. |
| US09691838B1 |
Chip resistor
A chip resistor includes a substrate having first and second electrodes disposed on one surface thereof to be separated from each other. A first resistor electrically connects the first electrode to the second electrode, and a second resistor electrically connects the first electrode to the second electrode. When temperatures of the first electrode and the second electrode are different from each other, thermo electromotive force generated from the first resistor is less than thermo electromotive force generated from the second resistor, and a temperature coefficient of resistivity (TCR) of the second resistor is lower than the TCR of the first resistor. |
| US09691835B2 |
Double-face display panel
The double-face display panel comprises a plurality of pixel units arranged in an array mode, and the pixel unit comprises an anode, a cathode, an organic material functional layer arranged between the anode and the cathode and at least one thin film transistor, wherein the anode comprises a transmission anode and a reflection anode, the cathode comprises a transmission cathode and a reflection cathode, the transmission anode at least corresponds to the reflection cathode, the transmission cathode at least corresponds to the reflection anode, and the reflection anode and the reflection cathode are arranged in a staggered mode; the transmission anode is electrically connected with a drain electrode of the thin film transistor, and the reflection anode is electrically connected with the drain electrode of the thin film transistor. |
| US09691834B2 |
AMOLED array substrate, producing method thereof and display apparatus
The present disclosure provides an active matrix organic light-emitting diode array substrate comprising: a substrate; a plurality of pixel units located on the substrate and arranged in an array, each of the plurality of pixel units comprising a thin film transistor, an organic light-emitting diode and a bottom plate of a storage capacitor; a pixel definition layer spacing apart two adjacent pixel units from each other; and a top plate of the storage capacitor provided on the pixel definition layer, the top plate of the storage capacitor being spaced apart from the bottom plate of the storage capacitor by the pixel definition layer. The bottom plate is arranged above a gate electrode of the thin film transistor and electrically connected to the gate electrode of the thin film transistor. |
| US09691833B2 |
Thin film transistor substrate and display using the same
The present invention relates to a thin film transistor substrate having two different types of semiconductor materials on the same substrate, and a display using the same. A disclosed display may include a substrate, a first thin film transistor having a polycrystalline semiconductor material on the substrate and a second thin film transistor having an oxide semiconductor material on the substrate. |
| US09691831B2 |
Organic electroluminescent display device
An organic electroluminescent display device of the invention includes a substrate on which a plurality of pixels are disposed in a matrix, an under layer that includes an organic insulating film and lower electrodes, a pixel separation film that is provided on the under layer so as to project therefrom, and an organic layer that covers the top of the under layer and the top of the pixel separation film and includes at least a light-emitting layer. A first adhesive film formed of one or more kinds of substances selected from the group consisting of amorphous carbon, diamond-like carbon, silicon, gallium, germanium, graphite oxide, and silicon carbide is formed at least partially between the top of the under layer and the pixel separation film or between the pixel separation film and the organic layer. |
| US09691817B2 |
Magnetic tunnel junctions and methods of forming magnetic tunnel junctions
A method of forming a line of magnetic tunnel junctions includes forming magnetic recording material over a substrate, non-magnetic material over the recording material, and magnetic reference material over the non-magnetic material. The substrate has alternating outer regions of reactant source material and insulator material along at least one cross-section. The reference material is patterned into a longitudinally elongated line passing over the alternating outer regions. The recording material is subjected to a set of temperature and pressure conditions to react with the reactant of the reactant source material to form regions of the dielectric material which longitudinally alternate with the recording material along the line and to form magnetic tunnel junctions along the line which individually comprise the recording material, the non-magnetic material, and the reference material that are longitudinally between the dielectric material regions. Other methods, and lines of magnetic tunnel junctions independent of method, are disclosed. |
| US09691813B2 |
System for wafer-level phosphor deposition
System for wafer-level phosphor deposition. A method for phosphor deposition on a semiconductor wafer that has a plurality of LED dies includes the operations of covering the semiconductor wafer with a selected thickness of photo resist material, removing portions of the photo resist material to expose portions of the semiconductor wafer so that electrical contacts associated with the plurality of LED dies remain unexposed, and depositing phosphor on the exposed portions of the semiconductor wafer. |
| US09691812B2 |
Photodetector and methods of manufacture
Photodetector structures and methods of manufacture are provided. The method includes forming undercuts about detector material formed on a substrate. The method further includes encapsulating the detector to form airgaps from the undercuts. The method further includes annealing the detector material causing expansion of the detector material into the airgaps. |
| US09691811B1 |
Image sensor chip scale packages and related methods
Methods of forming an image sensor chip scale package. Implementations may include providing a semiconductor wafer having a pixel array, forming a first cavity through the wafer and/or one or more layers coupled over the wafer, filling the first cavity with a fill material, planarizing the fill material and/or the one or more layers to form a first surface of the fill material coplanar with a first surface of the one or more layers, and bonding a transparent cover over the fill material and the one or more layers. The bond may be a fusion bond between the transparent cover and a passivation oxide; a fusion bond between the transparent cover and an anti-reflective coating; a bond between the transparent cover and an organic adhesive coupled over the fill material, and/or; a bond between a first metallized surface of the transparent cover and a metallized layer coupled over the wafer. |
| US09691809B2 |
Backside illuminated image sensor device having an oxide film and method of forming an oxide film of a backside illuminated image sensor device
Disclosed is a method of fabricating an image sensor device, such as a BSI image sensor, and more particularly, a method of forming a dielectric film in a radiation-absorption region without using a conventional plasma etching causing roughness on the surface and non-uniformity within a die and a wafer. The method includes providing layers comprising a substrate having radiation sensors adjacent its front surface, an anti-reflective layer formed over the back surface of the substrate, a sacrificial dielectric layer formed over the anti-reflective layer, and a conductive layer formed over the sacrificial dielectric layer in a radiation-blocking region. The method further includes removing the sacrificial dielectric layer in the radiation-absorption region completely by a highly selective etching process and forming a dielectric film on the anti-reflective layer by deposition such as CVD or PVD while precisely controlling the thickness. |
| US09691806B2 |
Semiconductor integrated circuit, electronic device, solid-state imaging apparatus, and imaging apparatus
A semiconductor integrated circuit includes a first semiconductor substrate in which a part of an analog circuit is formed between the analog circuit and a digital circuit which subjects an analog output signal output from the analog circuit to digital conversion; a second semiconductor substrate in which the remaining part of the analog circuit and the digital circuit are formed; and a substrate connection portion which connects the first and second semiconductor substrates to each other. The substrate connection portion transmits an analog signal which is generated by a part of the analog circuit of the first semiconductor substrate to the second semiconductor substrate. |
| US09691805B2 |
Semiconductor device, method for manufacturing the same, and electronic device
Disclosed herein is a semiconductor device including: a first semiconductor chip having an electronic circuit section and a first connecting section formed on one surface thereof; a second semiconductor chip having a second connecting section formed on one surface thereof, the second semiconductor chip being mounted on the first semiconductor chip with the first and the second connecting sections connected to each other by a bump; a dam formed to fill a gap between the first and the second semiconductor chips on a part of an outer edge of the second semiconductor chip, the part of the outer edge being on a side of a region of formation of the electronic circuit section; and an underfill resin layer filled into the gap, protrusion of the resin layer from the outer edge of the second semiconductor chip to a side of the electronic circuit section being prevented by the dam. |
| US09691804B2 |
Image sensing device and manufacturing method thereof
Some embodiments of the present disclosure provide a back side illuminated (BSI) image sensor. The back side illuminated (BSI) image sensor includes a semiconductive substrate and an interlayer dielectric (ILD) layer at a front side of the semiconductive substrate. The ILD layer includes a dielectric layer over the semiconductive substrate and a contact partially buried inside the semiconductive substrate. The contact includes a silicide layer including a predetermined thickness proximately in a range from about 600 angstroms to about 1200 angstroms. |
| US09691803B2 |
Semiconductor wafer, method for manufacturing light receiving sensor, and light receiving sensor
A semiconductor wafer includes a semiconductor substrate, a dielectric multilayer film formed on the semiconductor substrate and serving as an optical filter on a light receiving sensor, and a light detection region formed in the semiconductor substrate, with the Poisson ratio VS, Young's modulus ES, the radius r, and the thickness b of the semiconductor substrate, stress σ in the dielectric multilayer film, and the thickness d of the dielectric multilayer film satisfy a relationship 1.0×10−3≧{3×r2×d×(1−VS)×σ}/(ES×b2). |
| US09691802B2 |
Image-acquisition device
Provided is an image-acquisition device including a first image-acquisition surface including a photoelectric conversion film capable of subjecting incident light to photoelectric conversion while transmitting some of the incident light; a second image-acquisition surface including a photoelectric conversion layer that subjects the incident light transmitted by the first image-acquisition surface to photoelectric conversion; and a polarizing filter that is disposed between the two image-acquisition surfaces and that extracts polarization information from the incident light transmitted by the first image-acquisition surface. |
| US09691798B2 |
Display device
A display device includes: an insulating layer positioned on a first insulating substrate; a pixel electrode including a first subregion electrode applied with a first voltage and positioned beneath the insulating layer, a first subpixel electrode which includes a second subregion electrode positioned on the insulating layer, and a second subpixel electrode which is positioned on the insulating layer and applied with a second voltage; a second insulating substrate facing the first insulating substrate; and a common electrode positioned under the second insulating substrate and applied with a common voltage, wherein one pixel area is divided into a first part in which the second subregion electrode is positioned, a second part in which the first subregion electrode and a portion of the second subpixel electrode overlap each other, and a third part which does not overlap the first subregion electrode in the second subpixel electrode. |
| US09691796B2 |
Display device
A display device is disclosed. In one aspect, the display device includes a substrate, a first signal line formed over the substrate and a first insulating layer formed over the substrate and the first signal line. The display device also includes a second signal line formed over the first insulating layer and including an overlapping area that overlaps the first signal line, a second insulating layer formed over the second signal line and having a via hole that exposes at least a part of the overlapping area. The display device further includes an auxiliary wiring layer covering the via hole and connected to the overlapping area through the via hole. |
| US09691792B2 |
Thin film transistor substrate and display apparatus
A thin film transistor (TFT) substrate comprises a substrate, a plurality of pixel electrodes, a gate layer, an active layer, a first source layer and a second source layer, and a drain layer. The pixel electrodes are disposed on the substrate. The gate layer is disposed on the substrate. The active layer is disposed corresponding to the gate layer. The first source layer and the second source layer contact the active layer respectively. The drain layer contacts the active layer and is electrically coupled to one of the pixel electrodes. The gate layer, the active layer, the first source layer and the drain layer constitute a first transistor. The gate layer, the active layer, the second source layer and the drain layer constitute a second transistor. When the first and second transistors are disabled, the first and second source layers are electrically isolated from each other. |
| US09691790B2 |
Display substrate and method of manufacturing the same
A display substrate includes a gate metal pattern including a gate line on a base substrate and extending in a first direction, and a gate electrode electrically connected with the gate line, a data metal pattern on the gate metal pattern and including a data line extending in a second direction crossing the first direction, a source electrode electrically connected with the gate line and a drain electrode spaced apart from the source electrode, a first electrode pattern on the data metal pattern, a low-resistance electrode pattern on the first electrode pattern and entirely overlapping with the gate metal pattern and the data metal pattern and a second electrode pattern overlapping with the first electrode pattern. |
| US09691787B2 |
Co-fabricated bulk devices and semiconductor-on-insulator devices
Bulk semiconductor devices are co-fabricated on a bulk semiconductor substrate with SOI devices. The SOI initially covers the entire substrate and is then removed from the bulk device region. The bulk device region has a thicker dielectric on the substrate than the SOI region. The regions are separated by isolation material, and may or may not be co-planar. |
| US09691785B2 |
Three-dimensional structured memory devices
A 3D structured nonvolatile semiconductor memory devices and methods for manufacturing are disclosed. One such device includes an n+ region at a source/drain region; a p+ region at the source/drain region; and a diffusion barrier material between the n+ region and the p+ region. The n+ region is substantially isolated from the p+ region. |
| US09691779B2 |
Nonvolatile semiconductor storage device and method of manufacture thereof
A nonvolatile semiconductor storage device including a number of memory cells formed on a semiconductor substrate, each of the memory cells has a tunnel insulating film, a charge storage layer, a block insulating film, and a gate electrode which are formed in sequence on the substrate. The gate electrode is structured such that at least first and second gate electrode layers are stacked. The dimension in the direction of gate length of the second gate electrode layer, which is formed on the first gate electrode layer, is smaller than the dimension in the direction of gate length of the first gate electrode layer. |
| US09691777B2 |
Non-volatile semiconductor memory device
A semiconductor memory device includes a semiconductor substrate, a first insulating film disposed on the semiconductor substrate, a first conductive film disposed on the first insulating film, a second insulating film disposed on the first conductive film, a second conductive film disposed on the second insulating film, a first electrode disposed on the first conductive film through an opening formed in the second conductive film and the second insulating film, and having a first width, a second electrode that is formed on the first electrode and having a second width, and a wiring layer that is formed on the second electrode. A first width of the first electrode is wider than a second width of the second electrode. |
| US09691776B2 |
Nonvolatile memory device
A nonvolatile memory device may include: an isolation layer formed in a substrate and defining an active region; a control plug formed over the isolation layer; a floating gate formed over the substrate and including a plurality of fingers adjacent to the control plug with a gap provided therebetween; and a charge blocking layer formed on sidewalls of the floating gate so as to fill the gap. The control plug may include: a first control plug formed between the plurality of fingers and having sidewalls facing inner walls of the fingers; and a second control plug formed outside the floating gate and having sidewalls facing outer walls of the fingers. |
| US09691775B1 |
Combined SADP fins for semiconductor devices and methods of making the same
A semiconductor cell includes a substrate and an array of at least five substantially parallel fins having substantially equal fin widths disposed on the substrate. The array includes a predetermined minimum spacing distance between at least one pair of adjacent fins within the array. The array has a first n-type fin for an n-type semiconductor device, and a first p-type fin for a p-type semiconductor device. The first p-type fin is disposed adjacent the first n-type fin and spaced a predetermined first n-to-p distance apart from the first n-type fin. The first n-to-p distance is greater than the minimum spacing distance and less than the sum of the fin width plus twice the minimum spacing distance. |
| US09691772B2 |
Semiconductor memory device including memory cell which includes transistor and capacitor
A semiconductor memory device includes a transistor and a capacitor. The transistor includes: an insulating film in which a groove portion is provided; a pair of electrodes separated so that the groove portion is sandwiched therebetween; an oxide semiconductor film which is in contact with the pair of electrodes and side surfaces and a bottom surface of the groove portion and has a thickness value smaller than a depth value of the groove portion; a gate insulating film covering the oxide semiconductor film; and a gate electrode provided to overlap with the oxide semiconductor film with the gate insulating film positioned therebetween. |
| US09691771B2 |
Vanadium-containing film forming compositions and vapor deposition of vanadium-containing films
Vanadium-containing film forming compositions are disclosed, along with methods of synthesizing the same, and methods of forming Vanadium-containing films on one or more substrates via vapor deposition processes using the Vanadium-containing film forming compositions. |
| US09691765B1 |
Fin type field effect transistors with different pitches and substantially uniform fin reveal
A semiconductor device that includes a first plurality of fin structures in a first device region and a second plurality of fin structures in a second device region. The first plurality of fin structures includes adjacent fin structures separated by a lesser pitch than the adjacent fin structures in the second plurality of fin structures. At least one layer of dielectric material between adjacent fin structures, wherein a portion of the first plurality of fin structures extending above the at least one layer of dielectric material in the first device region is substantially equal to the portion of the second plurality of fin structures extending above the at least one layer of dielectric material in the second device region. Source and drain regions are present on opposing sides of a gate structure that is present on the fin structures. |
| US09691763B2 |
Multi-gate FinFET semiconductor device with flexible design width
A semiconductor device includes a substrate extending in a first direction to define a substrate length and a second direction perpendicular to the first direction to define a substrate width. A first semiconductor fin is formed on an upper surface of the substrate. The first semiconductor fin extends along the second direction at a first distance to define a first fin width. A second semiconductor fin is formed on the upper surface of the substrate. The second semiconductor fin extends along the second direction at a second distance to define a second fin width. The second distance may be different with respect to the first distance such that the first and second fin widths are different with respect to one another. |
| US09691762B2 |
Transistor for amplifying a high frequency signal
A transistor includes: a semiconductor substrate; a plurality of gate electrodes, a plurality of source electrodes, and a plurality of drain electrodes on the semiconductor substrate; a drain pad on the semiconductor substrate and connected to the plurality of drain electrodes; a metal wiring on the semiconductor substrate and arranged spaced apart from, adjacent to and parallel to the drain pad; and a ground pad on the semiconductor substrate and connected to both ends of the metal wiring. |
| US09691758B1 |
Fin-type resistor
A semiconductor device and method for fabricating such a device are presented. The semiconductor device includes a fin extending away from a substrate, a plurality of epitaxially grown regions disposed along a top surface of the fin, and at least two contacts that provide electrical contact to the fin. The plurality of epitaxially grown regions are arranged to alternate with regions having no epitaxial material grown on the top surface of the fin. A resistance exists between the two contacts that is at least partially based on the arrangement of the plurality of epitaxially grown regions. |
| US09691755B2 |
Static discharge system
A semiconductor circuit includes a three-terminal high voltage semiconductor device, a charge distribution structure and a static discharge system. The charge distribution structure has a plurality of conductors with a floating potential. The charge distribution structure is capacitively coupled to a first terminal of the semiconductor device. The static discharge system removes charge that accumulates on at least a subset of the conductors. The static discharge system removes the charge that accumulates on the subset of conductors when the semiconductor device is in a first state while allowing charge to accumulate on the subset of conductors when the semiconductor device is in a second state. |
| US09691754B2 |
Semiconductor structure
A semiconductor structure comprises a well, a first lightly doped region, a second lightly doped region, a first heavily doped region, a second heavily doped region and a gate. The first lightly doped region is disposed in the well. The second lightly doped region is disposed in the well and separated from the first lightly doped region. The first heavily doped region is disposed in the first lightly doped region. The second heavily doped region is partially disposed in the second lightly doped region. The second heavily doped region has a surface contacting the well. The gate is disposed on the well between the first heavily doped region and the second heavily doped region. The well has a first doping type. The first lightly doped region, the second lightly doped region, the first heavily doped region and the second heavily doped region have a second doping type. |
| US09691753B2 |
Zener triggered silicon controlled rectifier with small silicon area
A semiconductor device includes a P-type semiconductor substrate, an N-well and a P-well disposed adjacent to each other and extending along a first direction within the P-type semiconductor substrate, a first N+ doped region and a first P+ doped region extending along the first direction within the N-well and spaced away from each other along a second direction perpendicular to the first direction, a second N+ doped region and a second P+ doped region extending along the first direction within the P-well and spaced away from each other along the second direction, and a plurality of third N+ doped regions and a plurality of P+ doped regions alternatively disposed in a junction region formed between the N-well and P-well the third N+ doped regions. The third N+ doped regions and the third P+ doped regions form a Zener diode. |
| US09691751B2 |
In-situ doped polysilicon filler for trenches
A method of fabricating an integrated circuit (IC) includes etching a trench in a semiconductor substrate having an aspect ratio (AR) ≧5 and a trench depth ≧10 μm. A dielectric liner is formed along the walls of the trench to form a dielectric lined trench. In-situ doped polysilicon is deposited into the trench to form a dielectric lined polysilicon filled trench having a doped polysilicon filler therein. The doped polysilicon filler after completion of fabricating the IC is essentially polysilicon void-free and has a 25° C. sheet resistance ≦100 ohms/sq. The method can include etching an opening at a bottom of the dielectric liner before depositing the polysilicon to provide ohmic contact to the semiconductor substrate. |
| US09691750B2 |
Semiconductor device and layout method thereof
In some embodiments, a semiconductor device comprises a first active region, a second active region, and a conductive metal structure. The second active region is separate from the first active region. The conductive metal structure is arranged to connect the first active region and the second active region. The conductive metal structure includes a first leg, a second leg and a body. The second leg is separate from the first leg and a body extending between and connecting the first leg and the second leg. |
| US09691745B2 |
Bonding structure for forming a package on package (PoP) structure and method for forming the same
Embodiments of mechanisms of a semiconductor device package and package on package (PoP) structure are provided. The semiconductor device package includes a substrate and a metal pad formed on the substrate. The semiconductor device package further includes a conductive element formed on the metal pad, and the metal pad electrically contacts the conductive element, and at least a portion of the conductive element is embedded in a molding compound, and the conductive element has a recess configured to provide an additional bonding interfacial area. |
| US09691744B2 |
Semiconductor memory device including output buffer
A semiconductor module includes a module substrate, a line pattern provided to the module substrate, first and second semiconductor chips on the module substrate and coupled to the line pattern, and a termination resister on the module substrate and coupled to the line pattern, the termination resistor being located between the first and second semiconductor chips. |
| US09691730B2 |
Semiconductor device and method for manufacturing the same
A semiconductor device according to the present invention includes an insulating substrate having a circuit pattern, semiconductor elements bonded on the circuit pattern with a brazing material, and a wiring terminal bonded with a brazing material on an electrode provided on each of the semiconductor elements on an opposite side of the circuit pattern, in which a part of the wiring terminal is in contact with the insulating substrate, and insulated from the circuit pattern. |
| US09691726B2 |
Methods for forming fan-out package structure
A method includes forming a first composite wafer including molding a plurality of device dies and a plurality of through-vias in a first molding material, and forming redistribution lines on opposite sides of the first molding material. The redistribution lines are inter-coupled through the plurality of through-vias. The method further includes forming a second composite wafer including stacking a plurality of dies to form a plurality of die stacks, and molding the plurality of die stacks in a second molding material. The second molding material fills gaps between the plurality of die stacks. The first composite wafer is bonded to the second composite wafer to form a third composite wafer. |
| US09691724B2 |
Multi-chip package and manufacturing method
Manufacturing method and a multi-chip package, which comprises a conductor pattern and insulation, and, inside the insulation, a first component, the contact terminals of which face towards the conductor pattern and are conductively connected to the conductor pattern. The multi-chip package also comprises inside the insulation a second semiconductor chip, the contact terminals of which face towards the same conductor pattern and are conductively connected through contact elements to this conductor pattern. The semiconductor chips are located in such a way that the first semiconductor chip is located between the second semiconductor chip and the conductor pattern. |
| US09691723B2 |
Connector formation methods and packaged semiconductor devices
Methods of forming connectors and packaged semiconductor devices are disclosed. In some embodiments, a connector is formed by forming a first photoresist layer over an interconnect structure, and patterning the first photoresist layer with a pattern for a first portion of a connector. A first metal layer is plated through the patterned first photoresist layer to form the first portion of the connector which has a first width. A second photoresist layer is formed over the interconnect structure and the first portion of the connector. The second photoresist layer is patterned with a pattern for a second portion of the connector. A second metal layer is plated through the patterned second photoresist layer to form the second portion of the connector over the first portion of the connector. The second portion of the connector has a second width, the second width being less than the first width. |
| US09691721B2 |
Jog design in integrated circuits
A device includes an active region in a semiconductor substrate, a gate strip over and crossing the active region, and a jog over the active region and connected to the gate strip to form a continuous region. The jog is on a side of the gate strip. A first contact plug is at a same level as the gate strip, wherein the first contact plug is on the side of the gate strip. A second contact plug is over the jog and the first contact plug. The second contact plug electrically interconnects the first contact plug and the jog. |
| US09691716B2 |
Techniques for enhancing fracture resistance of interconnects
Techniques and structure are disclosed for enhancing fracture resistance of back-end interconnects and other such interconnect structures by increasing via density. Increased via density can be provided, for example, within the filler/dummified portion(s) of adjacent circuit layers within a die. In some cases, an electrically isolated (floating) filler line of an upper circuit layer may include a via which lands on a floating filler line of a lower circuit layer in a region corresponding to where the filler lines cross/intersect. In some such cases, the floating filler line of the upper circuit layer may be formed as a dual-damascene structure including such a via. In some embodiments, a via similarly may be provided between a floating filler line of the upper circuit layer and a sufficiently electrically isolated interconnect line of the lower circuit layer. The techniques/structure can be used to provide mechanical integrity for the die. |
| US09691713B2 |
Semiconductor device
A semiconductor device includes: a semiconductor substrate having an element; a front surface electrode connected to the element; a rear surface electrode connected to the element; a protective film disposed on the front surface of the semiconductor substrate in a separation region; and a temperature sensor disposed on a front surface side of the semiconductor substrate. The front surface electrode is divided into multiple pieces along at least two directions with the protective film. The separation region includes an opposing region located between opposing sides of divided pieces of the front surface electrode adjacent to each other, and an intersection region, at which the opposing region intersects. The temperature sensor is disposed in only the opposing region. |
| US09691712B2 |
Method of controlling stress in group-III nitride films deposited on substrates
Methods of controlling stress in GaN films deposited on silicon and silicon carbide substrates and the films produced therefrom are disclosed. A typical method comprises providing a substrate and depositing a graded gallium nitride layer on the substrate having a varying composition of a substantially continuous grade from an initial composition to a final composition formed from a supply of at least one precursor in a growth chamber without any interruption in the supply. A typical semiconductor film comprises a substrate and a graded gallium nitride layer deposited on the substrate having a varying composition of a substantially continuous grade from an initial composition to a final composition formed from a supply of at least one precursor in a growth chamber without any interruption in the supply. |
| US09691710B1 |
Semiconductor package with antenna
A semiconductor package includes a substrate, a plurality of pin pads, a radio frequency (RF) pad, a semiconductor component, at least one surface mount device (SMD) component, a mold compound, a printed circuit board (PCB) antenna and a conductive solder. The RF pad is used to receive or transmit an RF signal on the top side of the substrate. The SMD component is mounted on the RF pad. The mold compound on the top side of the substrate covers the semiconductor component and the SMD component. The PCB antenna is located on the mold compound. Wherein, the conductive solder and the SMD component are stacked between the RF pad and a feeding structure of the PCB antenna. |
| US09691706B2 |
Multi-chip fan out package and methods of forming the same
A package includes a die having a conductive pad at a top surface of the die, a stud bump over and connected to the conductive pad, and a redistribution line over and connected to the stud bump. An electrical connector is over and electrically coupled to the redistribution line. |
| US09691700B2 |
Semiconductor device including first and second dummy wirings
A semiconductor device includes a first signal wiring, a first dummy wiring, and a second dummy wiring. The first signal wiring is configured to be supplied with a first signal potential. The first dummy wiring is insulated from the first wiring. The first dummy wiring is configured to be supplied with a fixed potential. The second dummy wiring is disposed between the first signal wiring and the first dummy wiring. The second dummy wiring is insulated from the first dummy wiring. The second dummy wiring is configured to be supplied with substantially the same potential as the first signal potential. |
| US09691695B2 |
Monolithic 3D integration inter-tier vias insertion scheme and associated layout structure
A 3D-IC includes a first tier device and a second tier device. The first tier device and the second tier device are vertically stacked together. The first tier device includes a first substrate and a first interconnect structure formed over the first substrate. The second tier device includes a second substrate, a doped region formed in the second substrate, a dummy gate formed over the substrate, and a second interconnect structure formed over the second substrate. The 3D-IC also includes an inter-tier via extends vertically through the second substrate. The inter-tier via has a first end and a second end opposite the first end. The first end of the inter-tier via is coupled to the first interconnect structure. The second end of the inter-tier via is coupled to one of: the doped region, the dummy gate, or the second interconnect structure. |
| US09691689B2 |
Lead frame for mounting semiconductor element and method for manufacturing the same
A lead frame for mounting semiconductor element includes a protrusion that is horizontally projects from edges of the upper and lower surfaces of a semiconductor-mounting part or a terminal part of the lead frame and that is provided on a lateral side of at least one of the semiconductor-mounting part or the terminal part of the lead frame, wherein the top end of the protrusion is substantially flat or the profile of the cross section of the top end is arc-shaped, and the top end of the protrusion is thick. |
| US09691686B2 |
Contact pad for semiconductor device
A device and method of manufacture is provided that utilize a dummy pad feature adjacent contact pads. The contact pads may be contact pads in an integrated fan-out package in which a molding compound is placed along sidewalls of a die and the contact pads extend over the die and the molding compound. The contact pads are electrically coupled to the die using one or more redistribution layers. The dummy pad features are electrically isolated from the contact pads. In some embodiments, the dummy pad features partially encircle the contact pads and are located in a corner region of the molding compound, a corner region of the die, and/or an interface region between an edge of the die and the molding compound. |
| US09691683B2 |
Methods for improving thermal performance of flip chip packages
Methods for improving thermal performance, such as thermal dissipation, of flip chip packages that include one or more flip chip dies are disclosed. In some embodiments, a thermal collection layer can be formed on a surface of a flip chip die. The thermal collection layer can be configured to dissipate heat generated by the flip chip die. In some variations, the thermal collection layer can be constructed using materials having high thermal conductivity. |
| US09691677B2 |
Underfill material and method for manufacturing semiconductor device using the same
An underfill material enabling voidless packaging and excellent solder bonding properties, and a method for manufacturing a semiconductor device using the same are provided. An underfill material, including an epoxy resin, an acid anhydride, an acrylic resin, and an organic peroxide, the minimum melt viscosity being between 1000 Pa*s and 2000 Pa*s, and gradient of melt viscosity between 10° C. higher than the minimum melt viscosity attainment temperature and a temperature 10° C. higher being between 900 Pa*s/° C. and 3100 Pa*s/° C., is applied to a semiconductor chip having a solder-tipped electrode formed thereon, and the semiconductor chip is mounted onto a circuit substrate having a counter electrode opposing the solder-tipped electrode, and the semiconductor chip and the circuit substrate are thermocompressed under bonding conditions of raising the temperature from a first temperature to a second temperature at a predetermined rate. |
| US09691674B2 |
Semiconductor device and method for manufacturing same
Provided are a semiconductor device including a terminal, a circuit substrate, and a case body and a method for manufacturing the semiconductor device. A semiconductor device (100) includes a terminal (13), a circuit substrate (42), a case body (1), and a positioning component (21). The terminal (13) includes a first end portion (13a), a trunk portion (13b), and a second end portion (13c). The first end portion (13a) of the terminal (13) is secured to the circuit substrate (42). The case body (1) includes a main surface (1s), an opening portion (1op) on a side opposing the main surface (1s), and a groove hole (2) on the main surface (1s) side. A sidewall (5) and a through hole (4) are formed in the groove hole (2). The terminal (13) passes through the through hole (4) toward the main surface (1s) side from the opening portion (1op) side of the case body (1), and the second end portion (13c) protrudes from the main surface (1s) of the case body (1). The positioning component (21) with an inclined protrusion portion (23a) formed thereon is secured in the groove hole (2). The trunk portion (13b) of the terminal (13) is pressed by the inclined protrusion portion (23a) of the positioning component (21) in a direction of the sidewall (5) of the groove hole (2) to be sandwiched between the inclined protrusion portion (23a) and the sidewall (5) and supported in the groove hole (2). |
| US09691669B1 |
Test structures and methods for measuring silicon thickness in fully depleted silicon-on-insulator technologies
Described are test structures and methods for measuring silicon thickness in fully depleted silicon-on-insulator technologies. |
| US09691661B2 |
Low profile IC package
An IC package without using an interposer is disclosed to form a low profile IC package. A single redistribution layer is fabricated according to IC process. A plurality of bottom pads is formed on a bottom of the single redistribution layer adaptive for the IC package to mount onto a mother board. A plurality of top pads is formed on a top of the single redistribution layer. An IC chip mounts on the plurality of top pads. A first molding compound wraps the single redistribution layer on four sides; and a second molding compound embeds the IC chip on top of the redistribution layer. |
| US09691659B1 |
Via and chamfer control for advanced interconnects
Methods of forming a semiconductor structure includes etching a via opening through an interlevel dielectric to a metal conductor. A contiguous metal liner is deposited onto exposed surfaces of the substrate. The substrate is exposed to a gaseous ion plasma to remove portions of the metal liner that are horizontally oriented and to reduce a height of the metal liner from portions thereof that are vertically oriented. Subsequently, a trench opening is formed in the interlevel dielectric, wherein the trench opening is connected with the via opening, wherein at least a portion of the metal liner remains on sidewall surfaces within the via opening during the forming of the trench opening. A diffusion barrier liner is deposited within the trench opening and the via opening. A conductive material is formed within remaining portions of the trench opening and the via opening to define the interconnect structure. |
| US09691653B2 |
Method of forming a flexible semiconductor layer and devices on a flexible carrier
A method for fabricating a semiconductor device comprises providing a preformed spalled structure comprising a stressor layer stack on a first surface of a semiconductor substrate; forming an interfacial release layer on an exposed second surface of the semiconductor substrate; adhesively bonding the interfacial release layer to a rigid handle substrate using an epoxy; removing at least a portion of the stressor layer stack from the first surface of the semiconductor substrate; processing the semiconductor substrate; and removing the semiconductor substrate from the interfacial release layer to impart flexibility to the semiconductor substrate. |
| US09691651B2 |
Substrate handling system for aligning and orienting substrates during a transfer operation
A system for sensing, orienting, and transporting wafers in an automated wafer handling process that reduces the generation of particles and contamination so that the wafer yield is increased. The system includes a robotic arm for moving a wafer from one station to a destination station, and an end-effector connected to an end of the robotic arm for receiving the wafer. The end-effector includes a mechanism for gripping the wafer, a direct drive motor for rotating the wafer gripping mechanism, and at least one sensor for sensing the location and orientation of the wafer. A control processor calculates the location of the center and the notch of the wafer based on measurements by the sensor(s) and generates an alignment signal for rotating the wafer gripping mechanism so that the wafer is oriented at a predetermined position on the end-effector while the robotic arm is moving to another station. |
| US09691641B2 |
Apparatus and method of cleaning wafers
An apparatus for cleaning wafers includes a chamber, a rotatable substrate holder inside the chamber, a nozzle above the rotatable substrate holder, a cover facing downward and fluidly coupled with the nozzle. The rotatable substrate holder is configured to mount one or more semiconductor wafers on the rotatable substrate holder. The nozzle is configured to spray a cleaning medium onto the one or more semiconductor wafers. The cover is of a shape having a top edge with a top cross-sectional area and a bottom edge with a bottom cross-sectional area. |
| US09691635B1 |
Buildup dielectric layer having metallization pattern semiconductor package fabrication method
A method of manufacturing a semiconductor package includes mounting and electrically connecting a semiconductor die to a substrate. The semiconductor die and the substrate are encapsulated to form an encapsulation. Via holes are laser-ablated through the encapsulation and conductive material is deposited within the via holes to form vias. A first buildup dielectric layer is formed on the encapsulation. Laser-ablated artifacts are laser-ablated in the first buildup layer. The laser-ablated artifacts in the first buildup layer are filled with a first metal layer to form a first electrically conductive pattern in the first build up layer. The operations of forming a buildup layer, forming laser-ablated artifacts in the buildup layer, and filling the laser-ablated artifacts with an electrically conductive material to form an electrically conductive pattern can be performed any one of a number of times to achieve the desired redistribution. |
| US09691633B2 |
Leadframe and the method to fabricate thereof
The present invention discloses a leadframe in which two conductive pillars with high aspect ratio and the corresponding two leads of the leadframe forms a 3D space for accommodating at least one device. A first lead and a second lead are spaced apart from each other. A first conductive pillar is formed on the first lead by disposing a first via on the first lead, wherein at least one first conductive material is filled inside the first via to form the first conductive pillar. A second conductive pillar is formed on the second lead by disposing a second via on the second lead, wherein at least one second conductive material is filled inside the second via to form the second conductive pillar. The first lead, the second lead, the first conductive pillar, and the second conductive pillar form a 3D space for accommodating at least one device, wherein the at least one device is electrically connected to the first conductive pillar and the second conductive pillar. |
| US09691631B2 |
Etching method and storage medium
There is provided an etching method, including: disposing a target substrate within a chamber, the target substrate having a first silicon oxide film formed on a surface of the target substrate and a second silicon oxide film formed adjacent to the first silicon oxide film, the first silicon oxide film being formed by an atomic layer deposition method and the second silicon oxide film being formed by a method other than the atomic layer deposition method; and selectively etching the first silicon oxide film with respect to the second silicon oxide film by supplying one selected from the group consisting of HF gas and alcohol gas; HF gas and water vapor; HF gas, F2 gas, and alcohol gas; HF gas, F2 gas, and water vapor, into the chamber. |
| US09691620B2 |
Semiconductor structure having film including germanium oxide on germanium layer and method of fabricating the same
A semiconductor structure includes: a germanium layer 30; and an insulating film that has a film 32 that includes a germanium oxide and is formed on the germanium layer and a high dielectric oxide film 34 that is formed on the film including the germanium oxide and has a dielectric constant higher than that of a silicon oxide, wherein: an EOT of the insulating film is 2 nm or less; and on a presumption that an Au acting as a metal film is formed on the insulating film, a leak current density is 10−5×EOT+4 A/cm2 or less in a case where a voltage of the metal film with respect to the germanium layer is applied from a flat band voltage to an accumulation region side by 1 V. |
| US09691619B2 |
Laser annealing device with multiple lasers
A laser annealing device of the present invention includes a stage on which a heating object is placed, a first laser element which emits first continuous laser light, a first optical system which leads the first continuous laser light to the heating object to form a first application region on the heating object, a second laser element which emits second continuous laser light having a wavelength shorter than that of the first continuous laser light, a second optical system which leads the second continuous laser light to the heating object to form a second application region on the heating object, and a system controller which executes scanning with the first application region and the second application region so that each portion of the heating object is scanned with at least part of the first application region before being scanned with the second application region. |
| US09691617B2 |
IIIA-VA group semiconductor single crystal substrate and method for preparing same
A IIIA-VA group semi-conductor single crystal substrate (2) has one of or both of the following two properties: an oxygen content of 1.6×1016-5.6×1017 atoms/cm3 in a range from the surface to a depth of 10 μm of the wafer, and an electron mobility of 4,800 cm2/V·s-5,850 cm2/V·s. Further, a method for preparing the semi-conductor single crystal substrate (2) comprises: placing a single crystal substrate (2) to be processed in a container (4); sealing said container (4), and keeping said single crystal substrate (2) to be processed at a temperature in the range of from the crystalline melting point −240° C. to the crystalline melting point −30° C. for 5 hours to 20 hours; preferably, keeping a gallium arsenide single crystal at a temperature of 1,000° C. to 1,200° C. for 5 hours to 20 hours. |
| US09691615B2 |
Chemoepitaxy-based directed self assembly process with tone inversion for unidirectional wiring
After forming a material stack including, from bottom to top, a dielectric material layer, a transfer layer, a hard mask layer and a neutral layer over a substrate, the neutral layer and the hard mask layer is patterned to create trenches therein that correspond to areas where unnecessary lines generated by a self-assembly of a self-assembling material subsequently formed and/or unnecessary portions of such lines are present. The self-assembling material is applied over the top surfaces of the patterned neutral layer and the transfer layer to form a self-aligned lamellar structure including alternating first and second domains. The second domains are removed selective to the first domains to provide a directed self-assembly (DSA) pattern of the first domains. Portions of the first domains not intersecting the trenches can be transferred into the patterned hard mask layer, resulting in a composite pattern of a pattern of trenches and the DSA pattern. |
| US09691613B2 |
Formation of heteroepitaxial layers with rapid thermal processing to remove lattice dislocations
Method and devices are disclosed for device manufacture of gallium nitride devices by growing a gallium nitride layer on a silicon substrate using Atomic Layer Deposition (ALD) followed by rapid thermal annealing. Gallium nitride is grown directly on silicon or on a barrier layer of aluminum nitride grown on the silicon substrate. One or both layers are thermally processed by rapid thermal annealing. Preferably the ALD process use a reaction temperature below 550° C. and preferable below 350° C. The rapid thermal annealing step raises the temperature of the coating surface to a temperature ranging from 550 to 1500° C. for less than 12 msec. |
| US09691611B2 |
Method of fabricating two-dimensional layered chalcogenide film
A method and apparatus for fabricating two-dimensional layered chalcogenide film are provided. A catalyst gas, a metal-based precursor gas and a chalcogen-based precursor gas are ionized with external stimuli to generate energetic particles which facilitate a chalcogen-substitution reaction of a metal-based precursor gas in a reaction chamber to form uniform two-dimensional layered chalcogenide film of at least a single crystalline layer via chemical vapor deposition. |
| US09691610B2 |
Method for producing a group III nitride semiconductor crystal and method for producing a GaN substrate
The present invention provides a method for producing a Group III nitride semiconductor crystal and a GaN substrate, in which the transfer of dislocation density or the occurrence of cracks can be certainly reduced on a growth substrate, and the Group III nitride semiconductor crystal can be easily separated from a seed crystal. A mask layer is formed on a GaN substrate, to thereby form an exposed portion of the GaN substrate, and an unexposed portion of the GaN substrate. Through a flux method, a GaN layer is formed on the exposed portions of the GaN substrate in a molten mixture containing at least Group III metal and Na. At that time, non-crystal portions containing the components of the molten mixture are formed on the mask layer so as to be covered with the GaN layer grown on the GaN substrate and the mask layer. |
| US09691609B2 |
Method of manufacturing semiconductor device, substrate processing apparatus, and recording medium
A method of manufacturing a semiconductor device includes alternately performing supplying a first process gas containing silicon and a halogen element to a substrate having a surface on which monocrystalline silicon and an insulation film are exposed and supplying a second process gas containing silicon and not containing a halogen element to the substrate, and supplying a third process gas containing silicon to the substrate, whereby a first silicon film is homo-epitaxially grown on the monocrystalline silicon and a second silicon film differing in crystal structure from the first silicon film is grown on the insulation film. |
| US09691608B2 |
Silicon carbide substrate, silicon carbide semiconductor device, and methods for manufacturing silicon carbide substrate and silicon carbide semiconductor device
A method for manufacturing a silicon carbide substrate includes the following steps. There is prepared a silicon carbide single crystal substrate having a first main surface, a second main surface, and a first side end portion, the second main surface being opposite to the first main surface, the first side end portion connecting the first main surface and the second main surface to each other, the first main surface having a width with a maximum value of more than 100 mm. A silicon carbide epitaxial layer is formed in contact with the first side end portion, the first main surface, and a boundary between the first main surface and the first side end portion. The silicon carbide epitaxial layer formed in contact with the first side end portion and the boundary is removed. |
| US09691606B2 |
Method of manufacturing semiconductor device, substrate processing apparatus, and recording medium
There is provided a method of manufacturing a semiconductor device, including pre-treating a surface of an insulating film formed on a substrate by supplying a precursor containing a first element and a halogen element to the substrate; and forming a film containing the first element and a second element on the pre-treated surface of the insulating film by performing a cycle a predetermined number of times, the cycle including supplying the precursor to the substrate; and supplying a reactant containing the second element to the substrate, wherein the act of supplying the precursor and the act of supplying the reactant are performed non-simultaneously. |
| US09691602B2 |
Liquid process apparatus and liquid process method
A top plate is provided with a top plate rotation mechanism configured to rotate the top plate in a horizontal plane. An outside cup peripheral case disposed around a cup is configured to move between an upper position, in which a top end of the cylinder is positioned above the cup, and a lower position located below the upper position. A nozzle support arm configured to support a nozzle is moved, in a horizontal direction, between an advanced position, in which the arm is advanced into the outside cup peripheral case via a side opening formed in a side surface of the outside cup peripheral case when the cylinder is located in the upper position, and a retracted position, in which the arm is retracted outward from the outside cup peripheral case. |
| US09691599B2 |
Ultraviolet light emitting device that can suppress time-dependent decrease in emission intensity during continuous operation
An ultraviolet light emitting device comprises: a first substrate having a main surface; a second substrate facing the main surface of the first substrate; a gas in a space between the first substrate and the second substrate; electrodes directly or indirectly on the main surface of the first substrate; a dielectric layer that is located directly or indirectly on the main surface of the first substrate and covers the electrodes; and a first light-emitting layer. The first light-emitting layer is located directly or indirectly on the dielectric layer and emits ultraviolet light in the gas due to electrical discharge between the electrodes. The first light-emitting layer is thicker in first regions on the dielectric layer than in second regions. The second regions include at least part of regions directly above the electrodes. |
| US09691596B2 |
Mass analyser and method of mass analysis
An electrostatic ion trap for mass analysis includes a first array of electrodes and a second array of electrodes, spaced from the first array of electrode. The first and second arrays of electrodes may be planar arrays formed by parallel strip electrodes or by concentric, circular or part-circular electrically conductive rings. The electrodes of the arrays are supplied with substantially the same pattern of voltage whereby the distribution of electrical potential in the space between the arrays is such as to reflect ions isochronously in a flight direction causing them to undergo periodic, oscillatory motion in the space, focused substantially mid-way between the arrays. Amplifier circuitry is used to detect image current having frequency components related to the mass-to-charge ratio of ions undergoing the periodic, oscillatory motion. |
| US09691593B2 |
Plasma processing device and plasma processing method
To provide a plasma processing device and a plasma processing method capable of performing high-speed processing. In an inductively-coupled plasma torch unit, a coil, a lid and a first ceramic block are bonded together, and a long chamber has an annular shape. Plasma generated in the chamber is ejected from an opening in the chamber toward a substrate. The substrate is processed by moving the long chamber and the substrate mounting table relatively in a direction perpendicular to a longitudinal direction of the opening. The first ceramic block is cooled efficiently by allowing a refrigerant to flow in a refrigerant flow path. |
| US09691587B2 |
Dimension measurement apparatus calibration standard and method for forming the same
A method for forming a dimension measurement apparatus calibration standard over a substrate is provided. The method includes forming strip structures over the substrate. The method includes depositing a calibration material layer over the substrate and the strip structures. The calibration material layer and the strip structures are made of different materials. The method includes removing the calibration material layer over top surfaces of the strip structures to expose the strip structures. The method includes removing the strip structures. The calibration material layer remaining over sidewalls of the strip structures forms linear calibration structures. |
| US09691585B2 |
Multi charged particle beam writing method, and multi charged particle beam writing apparatus
A multi charged particle beam writing method includes, shifting a writing position of each corresponding beam to a next writing position by performing another beam deflection of multi charged particle beams, in addition to the beam deflection for a tracking control, while continuing the beam deflection for the tracking control after the maximum writing time has passed; emitting the each corresponding beam in the “on” state to the next writing position having been shifted of the each corresponding beam, during a corresponding writing time while continuing the tracking control; and returning a tracking position such that a next tracking start position is a former tracking start position where the tracking control was started, by resetting the beam deflection for the tracking control after emitting the each corresponding beam to the next writing position having been shifted at least once of the each corresponding beam while continuing the tracking control. |
| US09691582B2 |
Photo-control receptacle
The invention relates to a photo-control receptacle, which comprises a base, having a power jack formed on one side and a pin holding groove formed on the other side thereof and communicated with the power jack; a mounting base, connected with the base through a connecting structure, having a plurality of pin mounting grooves arranged on one end and cable grooves arranged on the other end thereof and communicated with the pin mounting grooves; wherein, each of the pin mounting grooves has a metal pin arranged therein, which is further arranged to extend into the pin holding groove, the cable groove has a cable arranged therein and connected with the metal pin. The photo-control receptacle of the utility model achieves the tool-free installation, the assembly process is simple and saves time and labor. In addition, according to the actual situation, the orientation of the photo-control device can be adjusted by changing the relative position of the base and the mounting base. |
| US09691580B2 |
Fuse holder and configurable bus module for power distribution system
An embodiment of a power distribution system has been disclosed. The power distribution system includes a fuse holder having a plurality of line-side terminals. The power distribution system also includes a bus module having an enclosure and a conductor disposed within the enclosure. The conductor includes a comb-type bus bar having a base member and a plurality of branch members extending from the base member and each embodying a terminal connectable to one of the line-side terminals of the fuse holder. |
| US09691578B2 |
Relay assembly with exhaust cover
In some aspects, a relay assembly having an exhaust cover is provided. The relay assembly can include a housing, a relay enclosed within the housing, and the exhaust cover. The exhaust cover can be positioned in an opening of the housing that is adjacent to the relay. The exhaust cover can move in a direction away from the relay in response to a pressure generated inside the housing by the relay being communicated to the exhaust cover. |
| US09691575B2 |
Hopper control actuator
A hopper control actuator is provided. The actuator has a frame having a first bracket at a top end for attaching to a hopper, a second bracket at a bottom end for attaching to an overhead support, and at least one strut between the top end and bottom end; a sliding member attached to the frame having of an outer tube, an inner tube and a spring, the inner tube being slidable within the outer tube and having a first magnet affixed on an exterior surface thereof, the spring being connected to the inner tube and the first bracket, the inner tube and the outer tube having complimentary corners to prevent rotation; and an electrical enclosure having a micro-switch mounted therein, the electrical enclosure being attached to the at least one strut and the micro-switch having an actuating lever with a second magnet affixed thereto such that a like pole faces a like pole of the first magnet along a length of a path of travel of the first magnet. |
| US09691574B2 |
Medium or high voltage switch bushing
A medium or high voltage switch is provided. The medium or high voltage switch includes a bottle assembly and a bushing. The bottle assembly includes a bottle formed of a first material and defining a chamber. The bottle assembly further includes a plurality of contacts for selectively opening and closing an electrical circuit, the plurality of contacts disposed within the chamber. The bushing is formed of a second material and defines a cavity configured to receive the bottle assembly. The bottle assembly and the bushing have an interference fit. |
| US09691573B2 |
Electrical switch and slider assembly therefor
A slider assembly is for an electrical switch such as, for example, a dimmer switch. The dimmer switch includes a switching member and a housing member. The housing member overlays the switching member and includes an exterior surface, an interior surface, and an elongated slot. The slider assembly includes a slider structured to cooperate with the switching member. The slider includes an interface portion and an attachment portion. The attachment portion extends through the elongated slot of the housing member. The interface portion is movably disposed on the exterior surface of the housing member. A shutter is coupled to the slider. The shutter includes a plurality of resilient elements structured to engage the interior surface of the housing member, thereby creating a friction force associated with movement of the slider. |
| US09691572B2 |
Key button
Disclosed is key button (4) that includes a display surface on which character section (A) is formed, and a side face extending in a direction to intersect the display surface. The key button further includes transmission section (6) made of a light transmissive material, which constitutes the display surface and the side face, and shielding section (7) made of a light shielding material, which covers only a part of transmission section (6) other than character section (A) of the display surface. |
| US09691568B2 |
Electrical circuit breaker including a trip block
The electrical circuit breaker includes a circuit breaker block including at least an electrical conductor equipped with a first fixed pastille. The circuit breaker block also includes a bridge equipped with at least a second pastille, a unit for controlling the mobile bridge and an actuator of the control unit. This actuator is able to switch between an armed configuration in which it activates the control unit and a disarmed configuration in which it does not activate the control unit. The circuit breaker block also includes a first electrical coupling module. The electrical circuit breaker also includes a trip block including an electronic trip circuit and a second module for electrically coupling with the first coupling module of the circuit breaker block. This circuit breaker is provided with an actuator arming latch. |
| US09691566B2 |
State and operation indicator for a switch
A state and operation indicator for a snap switch is provided. Presently, instrumentation is often needed in order to determine if a snap switch is malfunctioning. Information may be provided on a control panel inconveniently positioned remotely as compared with the location of the snap switch itself. This disclosure provides for an indicator of the state and operation of a snap switch, which does not require the use of instrumentation, and which is proximate the snap switch. This indicator can be used in both alternating and direct current circuits. When the common terminal of the switch is energized an associated light can provide a cue that the power is on. The state and operation indicator can also have either a light associated with the normally open terminal, a light associated with the normally closed terminal, or both. These lights can respond to indicate the state and operation of the switch. |
| US09691565B2 |
Splatter resistance in circuit breakers
The disclosed concept pertains to coating compositions, methods of applying the compositions, and coated components produced therefrom. The coating compositions include alkyd or modified alkyd. The coatings are formed on surfaces of one or more internal components positioned within an electrical system, such as a circuit breaker. In the event of electrical arcing and the metal splatter produced therefrom, the coatings of the disclosed concept are effective to at least partially protect the component surface from the metal splatter and to at least partially impart splatter resistance to the component surface such that the metal splatter does not tend to adhere thereto. |
| US09691558B2 |
Electric current switching apparatus
An exemplary electric switch mounting arrangement includes a housing and a stationary contact to be mounted to an aperture in a wall of the housing. The arrangement having a compensation component within the interior area of the aperture for allowing stationary contacts of two different sizes to be mounted to the aperture, which compensation component includes one or more projections formed on the housing or the stationary contact and/or one or more recesses formed on the housing or stationary contact for receiving the one or more projections. |
| US09691553B2 |
Production method for tungsten anode body
A method for producing an anode body in a capacitor, which includes making a molded body by molding a tungsten powder and making an anode body by sintering the molded body, which includes a step of bringing the tungsten powder or the molded body thereof into contact with a solution of a silicon compound before sintering the molded body so as to adjust the silicon content in the anode body to 0.05 to 7 mass %. |
| US09691550B2 |
Multi-layer capacitor and method for producing a multi-layer capacitor
A multi-layer capacitor has dielectric layers and electrode layers arranged therebetween. The multi-layer capacitor has a number of segments that are connected to one another. At least one relief region is provided between the segments. The invention furthermore provides a method for producing such a multi-layer capacitor. |
| US09691546B2 |
Electronic part and method for forming joint structure of electronic part and joining object
An electronic part including an electronic part main body and an external electrode on the surface of the electronic part main body. The external electrode includes at least one alloy layer selected from among a Cu—Ni alloy layer and a Cu—Mn alloy layer, and an antioxidant film formed on the outer side of the alloy layer. The antioxidant film is one of a Sn-containing film, a noble metal film, and an organic substance film. |
| US09691543B2 |
High voltage transformer arrangement for high voltage tank assembly
A high voltage transformer arrangement for supplying power to a high voltage tank assembly is disclosed. The high voltage transformer arrangement includes a first core arranged in the high voltage tank assembly and a secondary winding configured on the first core, a second core positioned outside of the high voltage tank assembly and at a predefined distance from the first core, and a primary winding configured on the second core. The second core and the primary winding transfers current received from an external power source to the first core and secondary winding for supplying power to the high voltage tank assembly. |
| US09691539B2 |
Coil component
A coil conductor has a central axis extending in parallel with a mounting surface. The coil conductor disposed inside a component body extends substantially helically by alternately connecting a plurality of circulating conductive layers and a plurality of via hole conductors. The circulating conductive layers each extend so as to form a part of a substantially quadrangular track having a relatively short side and a relatively long side along an interface between the insulating layers. The via hole conductors each penetrate the insulating layer in a thickness direction. The line width of a short side portion of the circulating conductive layer is wider than that of a long side portion of the circulating conductive layer. |
| US09691536B2 |
Static apparatus
A static apparatus is provided in which a partial discharge, if occurred in a winding end portion, is unlikely to lead to insulation breakdown. The windings and core of a static apparatus are housed in a tank filled with coolant. The winding is fixed by upper and lower parts supporting winding. A continuous coolant duct is formed in a section embracing the winding and the upper and lower parts supporting winding. A coolant duct from the wiring, extending through the upper or lower parts supporting winding and connected with the coolant space is configured in a structure in which toroidal ducts in multiple tiers are connected in a vertical direction of the winding. Connecting holes of one toroidal duct and of its next toroidal duct are staggered with respect to each other and spaced at intervals which are longer than the width of the toroidal ducts. |
| US09691534B2 |
Magnetization device for magnetic encoder
In a magnetization device, while an annular magnetic body including plural rows of annular un-magnetized magnetic encoder tracks which are arranged adjacent to each other and integrated therewith is rotated, magnetization is performed, thereby providing a magnetic encoder. The magnetization device includes: a magnetizing yoke including a pair of opposed end portions opposed to each other across a magnetic gap; an exciting coil wound on the magnetizing yoke; a magnetization power source supplying a magnetizing current to the exciting coil to pass magnetic flux between the opposed end portions; and a magnetic shield which is provided to the magnetizing yoke and shields flow of the magnetic flux to the rows of magnetic encoder tracks other than a magnetization target. |
| US09691525B2 |
Coaxial cable
A coaxial cable is disclosed that may include an inner conductor and an outer conductor surrounding the inner conductor in a coaxial relationship. The coaxial cable may also include an insulative material located between the inner conductor and the outer conductor. A thickness of the insulative material between the inner conductor and the outer conductor may be increased in every direction at a bent portion of the coaxial cable as compared to the thickness of the insulative material between the inner conductor and the outer conductor at a non-bent portion of the coaxial cable. |
| US09691519B2 |
Insulating paste, electronic device and method for forming insulator
An insulating paste includes insulating particles 311, Si particles 312 and an organic Si compound 320. The organic Si compound 320 reacts with the Si particles 312 to form a Si—O bond filling up the space around the insulating particles 311. |
| US09691517B2 |
Hydroxy compound, ion conducting agent, and electroconductive resin composition
Provided are a hydroxy compound and an ion conducting agent each having excellent electroconductivity. Also provided is an electroconductive resin composition suppressed in bleeding and excellent in electroconductivity through the use of the hydroxy compound. Specifically, provided are a hydroxy compound represented by the following general formula (1), and an ion conducting agent including the hydroxy compound. |
| US09691516B2 |
Personal electromagnetic hygiene sleep system
A personal electromagnetic hygiene sleep system for calibrating a human to a baseline bio-electric homeostasis with the human and the environment via stimulus-responsive and performance textiles. These textiles possessing tested and theoretical benefits to the human organism such as: Harnessing the Earth's electrically negative potential via the Earth's mobile and free electrons to be an agent that assist in canceling, reducing, or pushing away electric fields from the body as well as serving to help attenuate oxidative stress and damage to the body from positively charged Reactive Oxygen Species (Free Radicals). Conference of these benefits are effected via a person being in direct or field contact with certain stimulus-responsive performance textiles and a plurality of adjacent conductive fibers for the transport of free electrons to the body from a greater electrically negative potential, an electrical ground, via the ground potential in a standard wall outlet. All superimposed upon a mattress. |
| US09691514B2 |
Electrical assembly having a fibrous conductive interface between a conductive composite component and a metallic component
An electrical assembly including a first element, such as a connector body, formed of a conductive composite material and a second element formed of a solid metallic material, such as a sheet metal electromagnetic interference shield, defining a fibrous conductive region formed of a plurality of metallic filaments. The conductive composite material forming the first element completely surrounds a portion of the fibrous conductive region. Conductive fibers in the conductive composite material are in intimate contact with the fibrous conductive region, forming a very high number of electrical contact points between the conductive fibers in the conductive composite material and the fibrous conductive region and thereby providing a robust electrical connection between the first element and the second element. |
| US09691511B1 |
Target-fueled nuclear reactor for medical isotope production
A small, low-enriched, passively safe, low-power nuclear reactor comprises a core of target and fuel pins that can be processed to produce the medical isotope 99Mo and other fission product isotopes. The fuel for the reactor and the targets for the 99Mo production are the same. The fuel can be low enriched uranium oxide, enriched to less than 20% 235U. The reactor power level can be 1 to 2 MW. The reactor is passively safe and maintains negative reactivity coefficients. The total radionuclide inventory in the reactor core is minimized since the fuel/target pins are removed and processed after 7 to 21 days. |
| US09691504B2 |
DRAM retention test method for dynamic error correction
A method of operation in an integrated circuit (IC) memory device is disclosed. The method includes refreshing a first group of storage rows in the IC memory device at a first refresh rate. A retention time for each of the rows is tested. The testing for a given row under test includes refreshing at a second refresh rate that is slower than the first refresh rate. The testing is interruptible based on an access request for data stored in the given row under test. |
| US09691502B2 |
Multi-port memory, semiconductor device, and memory macro-cell
A multi-port memory includes a memory cell, first and second word lines, first and second bit lines, first and second address terminals, and an address control circuit. The address control circuit controls the first and second word lines independently of each other on the basis of address signals that are respectively supplied to the first and second address terminals in a normal operation mode, and activates both of the first and second word lines that are coupled to the same memory cell on the basis of the address signal that is supplied to one of the first and second address terminals in a disturb test mode. |
| US09691501B2 |
Testing for threshold voltage and bit cell current of non-volatile memory arrays
A method of testing non-volatile memory arrays. A first test stage including at least a first stage read uses a first step size for setting current for BCC testing and/or voltage for VT testing for reading at least some memory cells. A second test stage including at least one second stage read uses an adjusted step size less in magnitude than the first step size for reading at least some memory cells. Provided no bit pattern match by the second test stage and/or the adjusted step size does not meet a predetermined minimum resolution (PMR), one or more additional test stages including additional array searching are added using a fixed step size less in magnitude than the adjusted step size including at least one read until a final read determines the predetermined repeating bit pattern is matched and a fixed step size for the final read meets the PMR. |
| US09691500B2 |
Casimir effect memory cell
A digital memory device includes a moveable element that is configured to move between a first stable position and a second stable position, where the moveable element comprises a first conducting area. The digital memory device further includes a second conducting area on the surface of a substrate. At the first stable position of the moveable element, a first gap exists between the first conducting area and the second conducting area. At the second stable position of the moveable element, a second gap that is smaller than the first gap exists between the first conducting area and the second conducting area. In at least the second stable position, an attractive Casimir force between the moveable element and the substrate holds the moveable element in the stable position. |
| US09691499B1 |
Semiconductor memory device
According to one embodiment, the semiconductor memory device includes a memory element, a reference resistance element, a read circuit, and a first circuit. The memory element is enabled to take a first resistance value and a second resistance value. The reference resistance element configured to have a resistance value between the first resistance value and the second resistance value. The read circuit is configured to determine data read from the memory element based on a current flowing through the memory element and a current flowing through the reference resistance element. The first circuit is configured to suppress the currents flowing through the memory element and the reference resistance element in response to determination of data read from the memory element. |
| US09691488B1 |
Dynamically adjusting read voltage in a NAND flash memory
A NAND flash memory device detects the occurrence of Cell Voltage Distribution Disruption Events (CVDDEs), such as a Partial Block Program (PBP) and Program-Read-Immediate (PRI), and provides a way to dynamically adjust read voltage to account for CVDDEs. A read command includes extended addressing bits that are used when a CVDDE has occurred to access registers that indicate an adjustment to read voltage that is needed to accommodate the CVDDE. The read voltage is then dynamically adjusted to accommodate the CVDDE. When the CVDDE is no longer an issue, the read voltage is adjusted to its previous value before the CVDDE. |
| US09691480B2 |
Global bit line pre-charge circuit that compensates for process, operating voltage, and temperature variations
A memory array includes wordlines, local bitlines, two-terminal memory elements, global bitlines, and local-to-global bitline pass gates and gain stages. The memory elements are formed between the wordlines and local bitlines. Each local bitline is selectively coupled to an associated global bitline, by way of an associated local-to-global bitline pass gate. During a read operation when a memory element of a local bitline is selected to be read, a local-to-global gain stage is configured to amplify a signal on or passing through the local bitline to an amplified signal on or along an associated global bitline. The amplified signal, which in one embodiment is dependent on the resistive state of the selected memory element, is used to rapidly determine the memory state stored by the selected memory element. The global bit line and/or the selected local bit line can be biased to compensate for the Process Voltage Temperature (PVT) variation. |
| US09691477B2 |
Resistive memory system and method of operating the resistive memory system
A resistive memory system having a plurality of memory cells includes a memory device having a resistive memory cell array and a controller. The controller generates write data to be written to the memory cell array by encoding input data such that the input data corresponds to an erase state and a plurality of programming states that a memory cell may have. The input data is encoded such that at least one of the number of memory cells assigned a first programming state and the number of memory cells assigned a second programming state is smaller than at least one of the numbers of memory cells in the erase state and the other programming states. The first programming state has a highest resistance level among the plurality of programming states, and the second programming state has a second highest resistance level among the plurality of programming states. |
| US09691476B2 |
Multi-context configuration memory
According to one embodiment, an integrated circuit includes first and second data lines, a first memory cell includes first and second resistance changing elements connected in series between the first and second data lines and a first selection transistor including a drain connected to a connection node of the first and second resistance changing elements, and a second memory cell includes third and fourth resistance changing elements connected in series between the first and second data lines and a second selection transistor including a drain connected to a connection node of the third and fourth resistance changing elements. |
| US09691471B2 |
SRAM cells with vertical gate-all-round MOSFETs
A Static Random Access Memory (SRAM) cell includes a first boundary and a second boundary opposite to, and parallel to, the first boundary, a first and a second pull-up transistor, a first and a second pull-down transistor forming cross-latched inverters with the first and the second pull-up transistors, and a first and a second pass-gate transistor. Each of the first and the second pull-up transistors, the first and the second pull-down transistors, and the first and the second pass-gate transistors includes a bottom plate as a first source/drain region, a channel over the bottom plate, and a top plate over the channel as a second source/drain region. The SRAM cell further includes a first, a second, a third, and a fourth active region, each extending from the first boundary to the second boundary. |
| US09691464B2 |
Fast programming of magnetic random access memory (MRAM)
A method of programming an MTJ includes selecting the MTJ and an access transistor coupled thereto. The gate of the selected access transistor is coupled to a selected word line (WL), which is raised to a first voltage, Vdd, and is then allowed to float. The first voltage and a second voltage, Vx, are respectively applied to a selected bit line (BL) coupled to the selected MTJ and a selected source line (SL) coupled to the selected access transistor, thereby driving a switching current through the selected MTJ from the selected BL to SL. Alternatively, the switching current may be reversed by applying 0 V and Vdd to the selected BL and SL, respectively. Moreover, the second voltage is applied to other BLs not coupled to the selected MTJ and the first voltage is applied to other SLs not coupled to the selected access transistor, thereby boosting the voltage of the floating WL to above the first voltage. |
| US09691457B2 |
Magnetic memory device
According to one embodiment, a magnetic memory device includes a magnetoresistive effect element, and a first layer provided on the magnetoresistive effect element, wherein the first layer includes an upper conductive layer, and a predetermined metal containing conductive layer provided between the magnetoresistive effect element and the upper conductive layer and containing a predetermined metal selected from Pt, Ir, Pd and Au. |
| US09691456B2 |
Reconfigurable semiconductor memory apparatus and operating method thereof
A reconfigurable semiconductor memory apparatus may include a memory cell array including a plurality of sub arrays. The reconfigurable semiconductor memory apparatus may include an information storage unit configured to store status information for each sub array, and a reset address according to the status information. |
| US09691452B2 |
Apparatuses and methods for concurrently accessing different memory planes of a memory
Apparatuses and methods for performing concurrent memory access operations for different memory planes are disclosed herein. An example apparatus may include a memory array having a plurality of memory planes. Each of the plurality of memory planes comprises a plurality of memory cells. The apparatus may further include a controller configured to receive a group of memory command and address pairs. Each memory command and address pair of the group of memory command and address pairs may be associated with a respective memory plane of the plurality of memory planes. The internal controller may be configured to concurrently perform memory access operations associated with each memory command and address pair of the group of memory command and address pairs regardless of page types associated with the pairs of the group (e.g., even if two or more of the memory command and address pairs may be associated with different page types). |
| US09691449B2 |
Semiconductor device and data processing system with coordinated calibration and refresh operations
Provided is a memory control technique for avoiding that the issue of a refresh command and the issue of a calibration command are arranged in succession.The memory control circuit issues a refresh command to make a request for a refresh operation based on a set refresh cycle, and issues a calibration command to make a request for a calibrating operation based on a set calibration cycle, for which the control function of suppressing the issue of the calibration command only for a given time after the issue of the refresh command, and suppressing the issue of the refresh command only for a given time after the issue of the calibration command is adopted. |
| US09691448B2 |
Memory system having lower pages and upper pages performing status read operation and method of operating the same
A method of operating a controller includes, determining whether an address corresponding to a program operation indicates a lower page or an upper page; waiting for a first waiting time for the program operation to the lower page when the address indicates the lower page; waiting for a second waiting time for the program operation to the upper page when the address indicates the upper page, wherein the second waiting time is longer than the first waiting time; and performing a status read operation on the semiconductor memory device after one of the first waiting time or the second waiting time. |
| US09691447B2 |
Memory controller with staggered request signal output
A memory controller having a time-staggered request signal output. A first timing signal is generated while a second timing signal is generated having a first phase difference relative to the first timing signal. An address value is transmitted in response to the first timing signal and a control value is transmitted in response to the second timing signal, the address value and control value constituting portions of a first memory access request. |
| US09691446B2 |
Memory device
A memory device according to one embodiment includes a memory cell which transitions to a first state or a second state by a first current through the memory cell; and a first circuit configured to stop supplying the first current when a first number of cycles of a clock signal lapses from reception of write data. |
| US09691440B2 |
Control method for data reception chip
A control method for a data reception chip. The data reception chip includes a voltage generation module including a plurality of resistors and a selection unit. The resistors are connected in series with one another and divide an operation voltage to generate a plurality of divided voltages. The selection unit selects one of the divided voltages as a reference voltage according to a control signal. The control method includes controlling the selection unit to set the level of the reference voltage to an initial level; receiving data and comparing the data with the reference voltage to generate a compared result; determining whether the compared result is equal to pre-determined data; and directing the selection unit to select another divided voltage when the compared result is not equal to the pre-determined data. |
| US09691439B2 |
Circuit structure for suppressing electromagnetic interference of DDR SDRAM signals
A circuit structure for suppressing electromagnetic interference (EMI) of DDR SDRAM signals, applied to a memory interface unit (MIU) of a DDR SDRAM, includes: a first conducting line, coupled to a reference level; a second conducting line, parallel to the first conducting line, coupled to the reference level; a third conducting line, between and parallel to the first and second conducting lines, transmitting a signal, the first, second and third conducting lines located on a same plane; and a connecting component, having two ends, one of the two ends electrically connected to the first conducting line and the other of the two ends electrically connected to the second conducting line, the connecting component crossing and electrically insulated from the third conducting line. |
| US09691438B2 |
Semiconductor device with hierarchical word line scheme
A semiconductor device includes: first and second memory cell regions disposed adjacent to each other in a first direction, and suitable for sharing a sub-word line driving signal, and a first sub-word line driving unit disposed in a crossing area that is disposed between the first and second memory cell regions in a diagonal direction. The first sub-word line driving unit includes a first sub-word line driver for driving the first memory cell regions, a second sub-word line driver for driving the second memory cell regions, and an interconnection for transmitting the sub-word line driving signal, which extends in the first direction. |
| US09691437B2 |
Compact microelectronic assembly having reduced spacing between controller and memory packages
A microelectronic package has terminals at a surface of a substrate having first and second half areas, each half area extending from a diagonal that bisects the first surface and a respective opposite corner of the first surface. Terminals for carrying data and address information in the first half area provide first memory channel access to a first memory storage array, and terminals for carrying data and address information in the second half area provide second memory channel access to a second memory storage array. The package may include first and second microelectronic elements overlying a same surface of the substrate which may be stacked in transverse orientations. |
| US09691435B2 |
Memory drive storage tray and memory drive carrier for use therewith
Technology is provided for a memory drive carrier. The memory drive carrier adapts a memory drive for insertion into a drive bay that is larger than the memory drive. The memory drive carrier includes an adapter body having a frame that defines an envelope compatible with the drive bay. The adapter body also includes a plurality of spaced apart walls defining a slot sized to receive the memory drive and position the memory drive's connector within the envelope adjacent an associated drive connector of the drive bay. The frame includes a plurality of interconnected wall portions and partitions that have one or more vent openings. |
| US09691434B2 |
Feedthrough connector for hermetically sealed electronic devices
Disclosed herein is one embodiment of an apparatus that includes a housing that defines an interior cavity. The housing also includes a spring aperture. The apparatus further includes a spring coupled to the housing over the spring aperture, with the spring having a deflection portion and a feedthrough aperture. The apparatus also has an electrical connector coupled to the spring and extending through the feedthrough aperture and the spring aperture. The electrical connector may have a plurality of electrical traces extending from a location external to the housing to a location within the interior cavity of the housing. |
| US09691432B2 |
Method for generating post-produced video from an original video
A method for generating a post-produced video from an original video includes the following. For an (i)th one of a plurality of original video segments, a number (M+1) of video data sets respectively from (k×j)th ones of original video frames of the original video segment is generated. A plurality of post-produced video segments are generated, each of which includes the video data sets for a respective one of the original video segments. A user input selects any one of the post-produced video segments. A post-produced video is generated according to the selection indicative of the user input. |
| US09691431B2 |
Generating videos of media items associated with a user
A method includes grouping media items associated with a user into segments based on a timestamp associated with each media item and a total number of media items. The method also includes selecting target media from the media items for each of the segments based on media attributes associated with the media item. The method also includes generating a video that includes the target media for each of the segments by generating a first animation that illustrates a first transition from a first item from the target media to a second item from the target media with movement of the first item from an onscreen location to an offscreen location, wherein the first item is adjacent to the second item in the first animation and determining whether the target media includes one or more additional items. The method also includes adding a song to the video. |
| US09691430B2 |
Opportunistic frame caching
Enhanced, efficient source frame decoding for user previewing is implemented by decoding and caching source frames of an input file that a user is interested in. Source frames for a user preview session are identified and decoded first to enhance user satisfaction with more timely preview segments for review. Additional source frames continue to be decoded on the fly to opportunistically enhance the current preview segment and to be prepared for additional preview segments and/or output file generation. |
| US09691429B2 |
Systems and methods for creating music videos synchronized with an audio track
Systems and methods for creating music videos synchronized with an audio track are provided. In some embodiments, an audio track may be selected and one or more video takes may be captured while the selected audio track plays. The video takes may be analyzed while they are captured to determine, for example, a video intensity level and/or a number of faces recognized within each take. By capturing the video takes with the audio track, the video takes may be synchronized to the audio tracks so that they are in time with one another. Portions or subsets of the video takes may be paired or matched with certain sections of the audio track based on, for example, the audio characteristics for a particular section and video characteristics of a particular take. |
| US09691427B2 |
Method and apparatus for detecting tightness of a pick-up head, method for controlling the moving of the pick-up head
A method and apparatus for detecting tightness of a pick-up head, and a method and apparatus for controlling the moving of the pick-up head are disclosed. The method for detecting the tightness of the pick-up head includes moving the pick-up head to an inner area of the disc reading device when then disc reading device is powered on, moving the pick-up head to an outer area of the disc reading device within a predetermined time period, moving the pick-up head from the outer area of the disc reading device to the inner area at a constant speed by a first fixed force, and recording the moving duration for moving the pick-up head from the outer area of the disc reading device to the inner area at the constant speed. |
| US09691424B2 |
Bolometer for internal laser power monitoring in heat-assisted magnetic recording device
An apparatus comprises a slider having an air-bearing surface (ABS), a write pole at or near the ABS, and a reader at or near the ABS and connected to a pair of reader bond pads of the slider. A near-field transducer (NFT) is formed on the slider at or near the ABS, and an optical waveguide is formed in the slider and configured to receive light from a laser source. A sensor is situated proximal of the write pole at a location within the slider that receives at least some of the light communicated along the waveguide. The sensor may be electrically coupled to the reader bond pads in parallel with the reader, and configured to generate a signal indicative of output optical power of the laser source. |
| US09691420B2 |
Disc device, controlling device and method
According to one embodiment, a disc device outputs a first signal for canceling out a first disturbance at a predetermined frequency of a position error, outputs a second signal which gain or phase of the first signal are changed, and corrects an operation amount or the position error by using the second signal. |
| US09691411B2 |
System and method for assessing suicide risk of a patient based upon non-verbal characteristics of voice data
A method for assessing suicide risk for a human subject including receiving recorded voice data of the subject; and classifying the subject as suicidal or non-suicidal based upon a computerized analysis of one or more nonverbal characteristics of the speech data, especially features associated with a breathy phonation type. The analysis of the nonverbal characteristics of the voice data can include an analysis of acoustic characteristics of speech, and/or an analysis of prosodic and voice quality-related features of the voice data. Related apparatus, systems, techniques and articles are also described. |
| US09691407B2 |
Noise reduction apparatus, noise reduction method, and noise reduction program
A noise reduction apparatus according to the present invention includes: a sudden sound information storage unit that stores an input signal that are input before a current input signal is input as sudden sound information, the input signal having a signal level of voice components equal to or smaller than a predetermined threshold and including a sudden sound to be suppressed; a phase difference calculation unit that calculates a phase difference between the sudden sound information and a sudden sound in the current input signal based on a maximum value of a correlation value between the sudden sound information and the current input signal; an addition signal generation unit that shifts a phase of the sudden sound information based on the phase difference to generate an addition signal; and a sudden sound suppression unit that adds the addition signal and the current input signal to output an output signal. |
| US09691404B2 |
Reconstructing audio signals with multiple decorrelation techniques
A method performed in an audio decoder for decoding M encoded audio channels representing N audio channels is disclosed. The method includes receiving a bitstream containing the M encoded audio channels and a set of spatial parameters, decoding the M encoded audio channels, and extracting the set of spatial parameters from the bitstream. The method also includes analyzing the M audio channels to detect a location of a transient, decorrelating the M audio channels, and deriving N audio channels from the M audio channels and the set of spatial parameters. A first decorrelation technique is applied to a first subset of each audio channel and a second decorrelation technique is applied to a second subset of each audio channel. The first decorrelation technique represents a first mode of operation of a decorrelator, and the second decorrelation technique represents a second mode of operation of the decorrelator. |
| US09691403B1 |
Spectral translation/folding in the subband domain
The present invention relates to a new method and apparatus for improvement of High Frequency Reconstruction (HFR) techniques using frequency translation or folding or a combination thereof. The proposed invention is applicable to audio source coding systems, and offers significantly reduced computational complexity. This is accomplished by means of frequency translation or folding in the subband domain, preferably integrated with spectral envelope adjustment in the same domain. The concept of dissonance guard-band filtering is further presented. The proposed invention offers a low-complexity, intermediate quality HFR method useful in speech and natural audio coding applications. |
| US09691400B1 |
Spectral translation/folding in the subband domain
The present invention relates to a new method and apparatus for improvement of High Frequency Reconstruction (HFR) techniques using frequency translation or folding or a combination thereof. The proposed invention is applicable to audio source coding systems, and offers significantly reduced computational complexity. This is accomplished by means of frequency translation or folding in the subband domain, preferably integrated with spectral envelope adjustment in the same domain. The concept of dissonance guard-band filtering is further presented. The proposed invention offers a low-complexity, intermediate quality HFR method useful in speech and natural audio coding applications. |
| US09691399B1 |
Spectral translation/folding in the subband domain
The present invention relates to a new method and apparatus for improvement of High Frequency Reconstruction (HFR) techniques using frequency translation or folding or a combination thereof. The proposed invention is applicable to audio source coding systems, and offers significantly reduced computational complexity. This is accomplished by means of frequency translation or folding in the subband domain, preferably integrated with spectral envelope adjustment in the same domain. The concept of dissonance guard-band filtering is further presented. The proposed invention offers a low-complexity, intermediate quality HFR method useful in speech and natural audio coding applications. |
| US09691398B2 |
Method and a decoder for attenuation of signal regions reconstructed with low accuracy
The embodiments of the present invention improves conventional attenuation schemes by replacing constant attenuation with an adaptive attenuation scheme that allows more aggressive attenuation, without introducing audible change of signal frequency characteristics. |
| US09691386B2 |
Automated voice-to-reporting/management system and method for voice call-ins of events/crimes
A system for institutions (particularly public safety) to accept spoken information such that users can report incident details as required to convey an official incident (e.g., crime) report and to aid in the investigation of the incident. Similarly, users can employ a combination of voice or text input, media submission, [GUI menu screens] and information download to aid in the immediate analysis of incident information to facilitate a rapid response for the incident. This method of interaction with institutions enables reporting parties to more quickly and efficiently convey incident information when direct interaction by an official is not possible or is subject to delay. This helps institutions, for example, police to provide better services while using less staff and resources. |
| US09691382B2 |
Voice control device and method for deciding response of voice control according to recognized speech command and detection output derived from processing sensor data
A voice control device has a speech command recognizer, a sensor data processor and a decision making circuit. The speech command recognizer is arranged for performing speech command recognition to output a recognized speech command. The sensor data processor is arranged for processing sensor data generated from at least one auxiliary sensor to generate a detection output. The decision making circuit is arranged for deciding a response of the voice control device according to the recognized speech command and the detection output. The same speech command is able to trigger difference responses according to the detection output (e.g., detected motion). Besides, an adaptive training process may be employed to improve the accuracy of the sensor data processor. Hence, the voice control device may have improved performance of the voice control feature due to a reduce occurrence probability of miss errors and false alarm errors. |
| US09691381B2 |
Voice command recognition method and related electronic device and computer-readable medium
An electronic device for browsing a document is disclosed. The document being browsed includes a plurality of command-associated text strings. First, a text string selector of the electronic device selects a plurality of candidate text strings from the command-associated text strings. Afterward, an acoustic string provider of the electronic device prepares a candidate acoustic string for each of the candidate text strings. Thereafter, a microphone of the electronic device receives a voice command. Next, a speech recognizer of the electronic device searches the candidate acoustic strings for a target acoustic string that matches the voice command, wherein the target acoustic string corresponds to a target text string of the candidate text strings. Finally, a document browser of the electronic device executes a command associated with the target text string. |
| US09691380B2 |
Negative n-gram biasing
Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for performing dynamic, stroke-based alignment of touch displays. In one aspect, a method includes obtaining a candidate transcription that an automated speech recognizer generates for an utterance, determining a particular context associated with the utterance, determining that a particular n-gram that is included in the candidate transcription is included among a set of undesirable n-grams that is associated with the context, adjusting a speech recognition confidence score associated with the transcription based on determining that the particular n-gram that is included in the candidate transcription is included among the set of undesirable n-grams that is associated with the context, and determining whether to provide the candidate transcription for output based at least on the adjusted speech recognition confidence score. |
| US09691379B1 |
Selecting from multiple content sources
A speech-based system may be configured to receive and act upon spoken requests from a user. In some cases, a spoken request may ask the system to play content such as music without specifying from which of multiple available content sources the music is to be obtained. In response to such a request, the system analyzes feature scores for each of the content sources. The feature scores indicate usage characteristics of the different sources by a current user or groups of users. The features scores for a particular source may be averaged or otherwise combined to create a composite score, and the source having the highest composite score is selected as the source of the requested content. |
| US09691369B2 |
Adjustable guitar effects pedalboard
An adjustable guitar effects pedalboard for anchoring guitar effects pedals. More specifically, a pedalboard having an upper level and a lower, telescoping level that is configured to allow users to adjust the width of the pedalboard to fit their needs. The upper level and the lower, telescoping level are curved and further contain a plurality of holes on which users can use cable ties to anchor their guitar effects pedals. The lower, telescoping level is comprised of a first telescoping section and a second telescoping section, and the plurality of holes in each of the telescoping sections align with each other in various positions of expansion and contraction. |
| US09691365B2 |
Guitar pick
Guitar pick uniquely designed for “variability and versatility” strumming. The apparatus shape is ergonomic and designed to optimize human factors i.e. musical transfer of energy from pick to strings in an ideal manner. The apparatus picking surface and corresponding tip(s) can take advantage of an array of material(s) while utilizing a rubber-like grip. Furthermore, the invention contains three equally spaced lobes with at least one lobe being defined with a continuous rounded edge-surface. Collectively, the guitar pick has three different lobe tips located along various radial(s) positioned at 360-135-225 degrees (reference to a 360 degree circle) with a predetermined distance from center point to individual lobe tip. Moreover, each planar lobe runs along the picks longitudinal as well as lateral axis and can utilize different material gauges. Rotation of the guitar pick i.e. moving from lobe to lobe . . . is achieved utilizing grooves that are geometrically relational to the union between each plane. |
| US09691364B1 |
Integrated pivot mechanism for fulcrum tremolo
INTEGRATED PIVOT MECHANISM FOR FULCRUM TREMOLO combines the tremolo biasing element in a pre-tensioned flat spring form to provide at least one tremolo pivot axis, transverse the direction of the strings, positioned between the tremolo base plate and the body operable to hold the base plate in initial position under normal load of the force of tension created by the strings, to increase the acoustic coupling between the base plate/bridge elements and the body to provide at least one tremolo pivot axis upon which moving the traditional tremolo arm to tilt the base plate toward or away from the nut changes the harmonic and pitch tunings to mimic the unique fulcrum tremolo effect when pivoted, and, thereby, recognize a distinct species of tremolo. In a preferred arrangement, typical feature such as spring tension, string height relative to the body and intonation, etc., are adjustable. The pivot mechanism can be alternatively used to adjust the height of the bridge elements relative to the body as well as improve acoustic coupling. |
| US09691363B2 |
Instrument trigger system and methods of use
Aspects disclosed herein relate to an instrument trigger system and methods of using such a system. In one aspect, the instrument trigger system includes a plurality of triggers, where each trigger is vibrationally isolated from the other triggers and/or from vibrations of the instrument to prevent unintended actuation of a trigger. In another aspect, the instrument trigger system includes one or more triggers that are easily accessible by a musician such that trigger actuation can be naturally integrated into the musician's play. In some embodiments, a sound module is integrated with the instrument trigger system. |
| US09691362B2 |
Display control apparatus, display control method, and recording medium displaying frames indicating portions of an image
A display control apparatus configured to perform display control in a manner that a first frame indicating a region to be digitally zoomed in an input image and a second frame indicating a region to be enlarged in the input image are superimposed on the input image. A display control method including performing display control in a manner that a first frame indicating a region to be digitally zoomed in an input image and a second frame indicating a region to be enlarged in the input image are superimposed on the input image. A computer-readable recording medium having an image processing program recorded therein, the image processing program causing a computer to perform the display control method. |
| US09691357B2 |
Information processing method and electronic device thereof, image calibration method and apparatus, and electronic device thereof
An information processing method applied to an electronic device is provided. The electronic device can make first multimedia data displayed synchronously on a first display unit and a second display unit. The method includes: acquiring a first parameter of the first display unit and a second parameter of the second display unit; acquiring a first operation on the first multimedia data for the second display unit; analyzing the first operation to obtain first coordinates of the first operation; transforming, based on the first parameter and the second parameter, the first coordinates of the first operation into second coordinates of the first operation on the first multimedia data for the first display unit; and performing the first operation based on the second coordinates of the first operation. |
| US09691356B2 |
Displaying portions of a video image at a display matrix
Systems, methods, and computer-readable and executable instructions are provided for providing a video clone to a display matrix. Providing a video clone to a display matrix can include utilizing a computing device to transfer video images via Ethernet to a network interface controller (NIC) device 602. Providing a video clone to a display matrix also can include utilizing the NIC device to transfer the video images to a plurality of displays 604. Providing a video clone to a display matrix also can include determining a plurality of portions of the video images that correspond to the plurality of displays utilizing a display scalar 606. Furthermore, providing a video clone to a display matrix can include associating the display scalar with each of the plurality of displays of the display matrix to display the video clone of each of the portions of video images 608. |
| US09691349B2 |
Source pixel component passthrough
Systems, apparatuses, and methods for passing source pixel data through a display control unit. A display control unit includes N-bit pixel component processing lanes for processing source pixel data. When the display control unit receives M-bit source pixel components, wherein ‘M’ is greater than ‘N’, the display control unit may assign the M-bit source pixel components to the N-bit processing lanes. Then, the M-bit source pixel components may passthrough the pixel component processing elements of the display control unit without being modified. |
| US09691346B2 |
Subbuffer objects
A method and an apparatus for a parallel computing program using subbuffers to perform a data processing task in parallel among heterogeneous compute units are described. The compute units can include a heterogeneous mix of central processing units (CPUs) and graphic processing units (GPUs). A system creates a subbuffer from a parent buffer for each of a plurality of heterogeneous compute units. If a subbuffer is not associated with the same compute unit as the parent buffer, the system copies data from the subbuffer to memory of that compute unit. The system further tracks updates to the data and transfers those updates back to the subbuffer. |
| US09691345B2 |
Dual-display device and method of manufacturing the same
A dual-display device includes a flexible substrate comprising first and second surfaces opposing each other, the first surface comprising a first area and a second area, the flexible substrate being bent to allow the first and second areas of the first surface to face each other, the second surface comprising first and second areas opposing the first and second areas of the first surface, respectively. The device further includes a first display unit formed over the first area of the second surface of the bent flexible substrate, and realizing an image; a second display unit formed over second area that is opposite to the first area of the second surface of the bent flexible substrate, electrically connected to the first display unit via lines, and realizing another image; and a common driver unit electrically connected to a pad area that extends from the first display unit, and configured to transmit at least a signal to drive the first display unit and the second display unit. |
| US09691343B2 |
Display device comprising display panel with bridge patterns
A disclosed display device comprises a data line of a display panel, a first switching circuit of the display panel, the first switching circuit including an input and a transistor to pass a test voltage from the input of the first switching circuit to a transistor electrode of the transistor, and a bridge pattern of the display panel, the bridge pattern electrically connecting the transistor electrode to the data line, the bridge pattern being in a different layer of the display panel than the transistor electrode. |
| US09691342B2 |
Display device and display device driver
A display device includes a display device, a driver to drive the source line of the display device, and a control unit to compress image data and generate compression data, and supply transfer data containing compression data to the driver. The control unit includes a first sorter circuit to perform a sorting process on image data, and a compression circuit to perform a compression processing on a first sorted image data output from the sorter circuit and generate compression data. The compression processing performs different processing on image data of sub-pixels corresponding to different colors. The driver includes a decompression circuit to decompress compression data and generate decompression data, a second sorter circuit to perform the sorting process on the image data and generate a second sorted image data, and a display drive circuit to drive a source line in response to the second sorted image data. |
| US09691340B2 |
Polarity reversion driving method and apparatus of liquid crystal display, and a liquid crystal display
Polarity reversion driving method and apparatus of liquid crystal display and a liquid crystal display are provided. In the method, four frames constitute one polarity reversion driving period, in which a first frame and a third frame have a same polarity arrangement with reversed polarities; a second frame and a fourth frame have a same polarity arrangement with reversed polarities; the first frame and the second frame have different polarity arrangements and corresponding pixels in adjacent two frames have complementary charging effects. The apparatus includes a time schedule controller, a logic controller and a source driver. Charging effects of pixels in frames are controlled by setting a polarity arrangement of pixels in each frame so that charging effects of corresponding pixels are complementary in adjacent two frames, thereby relieving the problem of reduced display quality due to inconsistent charging effects of pixels on two sides of data lines. |
| US09691339B2 |
Display apparatus and display apparatus control circuit
A display apparatus includes: a display device; a display device driver which drives the display device; a compression section adapted to an operation of generating compression data by compression processing performed on image data; and a transmission section which, when receiving compressed data from the compression section, transmits the compressed data to the display device driver by using a serial data signal. The compression section performs the compression processing with a data compression ratio selected in response to a frame rate with which the display device driver drives the display device. The display device driver receives the serial data signal from the transmission section, generates decompressed data by decompressing the compressed data transmitted by the serial data signal, and drives the display device in response to the decompressed data. The data compression ratio used in the compression processing is set so that the transmission rate of the serial data signal from the transmission section to the display device driver is kept constant independently of the frame rate. |
| US09691337B2 |
Digital gamma correction part, display apparatus having the same and method of driving display panel using the same
A digital gamma correction part includes a memory and a selector. The memory is configured to store a basic gamma reference data, a first compensated gamma reference data and a second compensated gamma reference data, where respective data of the first compensated gamma reference data are greater than respective data of the basic gamma reference data, and respective data of the second compensated gamma reference data are less than respective data of the basic gamma reference data. The selector is configured to receive a luminance data determined based on a luminance of a display panel, and to output a gamma reference data by selecting one from the basic gamma reference data, the first compensated gamma reference data and the second compensated gamma reference data based on the luminance data and a gamma converted reference range. |
| US09691336B2 |
Flat display device and method of fabricating the same
Disclosed are a flat panel display and a method for fabricating the same to connect defective sub-pixels to normal sub-pixels adjacent thereto, drive defective sub-pixels using thin film transistors of the normal sub-pixels and thereby repair the defective sub-pixels. |
| US09691335B2 |
Memory control device, mobile terminal, and computer-readable recording medium
The present invention includes a write-in start position control section (36) that performs a process of shifting, by a given shifting amount, a start position of a write-in operation to the frame memory (31), when the write-in operation is started, the given shifting amount being predetermined so as not to exceed a capacity reserved in advance in the frame memory. |
| US09691324B2 |
Compensation data calculation method for compensating digital video data and organic light emitting display including look-up table generated using the same
A method for calculating compensation data includes, a first luminance value that is calculated by supplying a first gray scale voltage to pixels and measuring a luminance. A second luminance value is calculated by supplying a second gray scale voltage to the pixels and measuring a luminance. Compensation coefficients are calculated using the first and second gray scale voltages and the first and second luminance values. Compensation data are calculated based on the compensation coefficients. |
| US09691323B2 |
Organic light emitting display and method of driving the same
The organic light emitting display may include a plurality of pixels for generating light components with predetermined brightness components while controlling the amount of current that flows from a first power source to a second power source via organic light emitting diodes (OLED), a first power source controller for extracting data of the highest gray level among input data items of one frame and for outputting a control value having voltage information corresponding to the highest gray level data, and a first power source generator for generating a controlled voltage value corresponding to the control value and outputting the controlled voltage value to the first power source. |
| US09691322B2 |
OLED display device compensating image decay
An OLED display device includes a display screen, a sensor, and a timing controller. The timing controller includes a detection unit, a test image generation unit, a data compensation unit, and image control unit. The detection unit provides a command for generating a test image. The test image generation unit generates a test image according to the command. The data compensation unit receives a decayed signal that corresponds to the test image and is detected by the sensor in order to generate a compensation signal according to the decayed signal. In response to the compensation signal, the image control unit compensates an external image to achieve normal displaying of the external image on the display screen. |
| US09691320B2 |
Display apparatus with color filters and light sources and method of controlling the same
A display apparatus includes a first light source, a second light source, a third light source, a first color filter, a second color filter, a third color filter, and an opto-functional device. The first light source and the second light source are allowed to emit light in a first emission time period to form a first display pattern. The third light source is allowed to emit light and the opto-functional device controls the third color filter to transmit light in a second emission time period to form a second display pattern. The first emission time period and the second emission time period are alternately repeated to combine the first display pattern and the second display pattern to obtain an intended display pattern when the display apparatus displays the intended display pattern. |
| US09691319B2 |
Pixel and sub-pixel arrangements in a display panel
Various arrangements of color sub-pixels in a group of pixels for use in a color display are disclosed. The same group of pixels is repetitively arranged in rows and columns in the color display. In particular, each group of pixels has four pixels arranged on the four quadrants of a rectangle or square. A pixel group may have two sub-pixels in R, two sub-pixels in G, two sub-pixels in B and two sub-pixels in W, but each of the pixels has two different color sub-pixels. In each of the four pixels in a pixel group, the two sub-pixels can be adjacent to each other along the column direction or along the row direction, but the two sub-pixels in at least one pixel are adjacent to each other along the column direction. A pixel group may have two pixels with R, G sub-pixels and two pixels in B. |
| US09691312B2 |
Shift register unit, shift register and display apparatus
A shift register unit, a shift register and a display apparatus are provided. The shift register unit includes a voltage-boosting module configured to output a first level signal when receiving a gate driving signal sent from the previous stage of shift register unit; a signal output module configured to output a gate driving signal under the control of a first clock signal based on the first level signal output by the voltage-boosting module; a reset module configured to control the signal output module to reset under the control of a reset signal; and a pull-down module configured to pull down the output level of the signal output module under the control of a second clock signal. It is possible to reduce the power consumption of the integrated circuit and avoid the abnormal waveform issue due to the decay of the reset signal by employing the technical solutions of embodiments of the present disclosure. |
| US09691309B2 |
Method and apparatus for self-illuminating sports, entertainment, emergency, and safety devices
A method and apparatus for the self-illumination of various objects designed for use in sports, entertainment, safety, and emergency related activities. The objects are caused to self-illuminate by chemiluminescence to facilitate usage of the objects during non-daylight hours or in areas that are otherwise surrounded by darkness. Chemiluminescence may be activated through injection, acceleration, tactile manipulation, through the process of attaching various portions of the self-illuminating objects together, or through the use of a mechanical activator. Activation is utilized to cause emission of visible light from within one or more cavities of the objects, from exterior portions of the objects, or from various inserts of the objects. Subcutaneous packets are also provided that may be caused to emanate visible light through chemiluminescence. |
| US09691304B2 |
Item hanging and manipulating apparatus
An apparatus for hanging and manipulating items that are suspended from a ceiling or wall. The apparatus includes hanging structures to suspend items from a wall or ceiling, a remotely controlled motorized take up reel system to raise and lower the items by way of suspension lines so the items can either be positioned, replaced, repaired or displayed, and a leveling system. The system can be safely operated without a person having to move a ladder in place and go up the ladder to work with the suspension item. |
| US09691302B2 |
Recording apparatus for package unpacking recordation
A recording apparatus comprises a plurality of supporting materials, a plurality of labels, and an unpacking recordation form. The supporting materials supports and fixes components of a specific device. The amount of the labels is at least the amount of the supporting materials plus two, wherein the labels comprises a starting-label and an ending-label pasted on the unpacking recordation form. The unpacking recordation form comprises several recording columns between the starting-label and the ending-label, wherein the amount of the recording columns is corresponding to that of the supporting materials. When unpacking the supporting materials from the device, the labels is removed from the supporting materials to paste to the recording columns. Therefore, user can determine if all supporting materials in the device are unpacked completely by checking if all of the recording columns are pasted by the labels. |
| US09691299B2 |
Systems and methods providing an enhanced user experience in a real-time simulated virtual reality welding environment
A real-time virtual reality welding system including a programmable processor-based subsystem, a spatial tracker operatively connected to the programmable processor-based subsystem, at least one mock welding tool capable of being spatially tracked by the spatial tracker, and at least one display device operatively connected to the programmable processor-based subsystem. The system is capable of simulating, in virtual reality space, a weld puddle having real-time molten metal fluidity and heat dissipation characteristics. The system is further capable of displaying the simulated weld puddle on the display device in real-time. |
| US09691298B1 |
Interactive driver development
Methods, computer-readable media, software, and apparatuses provide an interactive application, such as a video game, that presents gaming and driving challenges to facilitate improvement of driving skills and development of safe driving behavior. Drive data may be collected while a user is driving a vehicle and the drive data may be used to define a graphically simulated virtual world. A drive score may also be calculated based on the drive data. Portions of the graphically simulated virtual world may be unlocked based on the drive score. Also, attributes of a character within the graphically simulated virtual world may be modified based on the drive score. |
| US09691292B1 |
Multimedia training system and apparatus
A method for providing interactive training, whereby a video display and a base station are coupled in communication with a computer. A plurality of wireless handheld remotes are configured for wirelessly communicating with the base station, and each of the remotes is operable by a respective trainee of a group of trainees. Each remote has a remote ID unique from all other remotes and is stored in non-volatile memory of the computer; and the base station includes a base station ID code unique from all other base stations, and the base station ID is stored in non-volatile memory of each remote. Unique IDs prevents interference from other wireless devices including remotes paired with other base stations. It also makes it unnecessary for one training system to operate on a different channel from another training system. |
| US09691288B2 |
System and method for sending in-flight weather alerts
A system and method for sending weather alerts to an aircraft during flight are disclosed. In one embodiment, in-flight weather information is obtained from one or more aircrafts at regular intervals. Further, weather conditions along a predicted flight trajectory of the aircraft are determined using the obtained in-flight weather information. The aircraft is preceding the one or more aircrafts. Furthermore, the weather alerts associated with the weather conditions are sent to a display in the aircraft during flight. |
| US09691287B1 |
Graphical method to set vertical and lateral flight management system constraints
A method. The method includes receiving user input data from a user interface system. The user input data includes user gesture data, wherein the user gesture data is associated with one or more detected user gestures. The method also includes manipulating one or more graphical flight path elements based at least upon received user gesture data. The method further includes performing at least one flight path modification operation based at least upon one or more factors and the received user gesture data. The method additionally includes outputting updated graphical data to the user interface system, wherein the updated graphical data includes updated graphical flight path element data and updated graphical flight path data. |
| US09691281B2 |
Navigation system with image assisted navigation mechanism and method of operation thereof
A method of operation of a navigation system includes: receiving an entry for a destination, a sub-destination, or a combination thereof with the sub-destination located within the destination; receiving a road obstacle image while traveling along a route to reach the destination; generating an operation direction based on the road obstacle image; and generating a destination image representing the destination for displaying on a device. |
| US09691278B2 |
Systems and methods for traffic control
Systems and methods for real-time emergency vehicle authentication at traffic signal and tollgates are disclosed. In certain example embodiments, a dispatch server can provide identifying credentials and time-bounded intersection tickets (TBIT) to traffic signals and tollgates for conducting authentication of emergency vehicles. The emergency vehicles can transmit a traffic light control message requesting expedited access through a traffic signal or tollgate. The traffic signal or tollgate can decrypt the message using the TBIT. It can further determine if the identifying credential received from the emergency vehicle is authorized for expedited access and if the message was received within a required time period. In response, the traffic signal or tollgate can determine its current signal or gate position and determine if a change needs to be made to provide expedited access to the emergency vehicle. |
| US09691277B2 |
Integrated still image, motion video and speed measurement system
Devices capable of capturing still and motion imagery are integrated with an accurate distance and speed measuring apparatus. By measuring the changing distance of the target over that time, a target's speed can be determined. At substantially the same time as the target's speed is determined, imagery of the target is captured in both a still and moving format. Using a queuing mechanism for both distance and imagery data along with time stamps associated with each, a target's image, both in motion and still, can be integrated with its speed. In situations in which a still image is unavailable, a target's speed can be associated with a portion of a continuous stream of motion imagery to a point where a positive identification can be captured with a still image. |
| US09691270B1 |
Automatically configuring a remote control for a device
Intuitive methods of automatically configuring a remote control for multiple electronic devices are disclosed. The remote control can be automatically configured with the help of a first electronic device that is connected to one or more additional electronic devices. The first electronic device aids in the configuration of the remote control by gathering information about the one or more additional electronic devices and configuring the remote control in accordance. The information about the one or more additional electronic devices may be gathered from the devices themselves, from additional remote controls associated with the devices, and/or from a user, among other possibilities. |
| US09691268B2 |
Automatic intrusion detector threshold controlling systems and methods
A system for automatically controlling intrusion thresholds of intrusion detectors deployed in a premises, the system including intrusion detector output receiving functionality operative to receive at least one output from at least a first intrusion detector deployed in the premises, intrusion detector output comparison functionality operative to compare the at least one output from the at least a first intrusion detector with at least one of a multiplicity of premises intrusion detection patterns, and intrusion detector threshold controlling functionality operative, in response to ascertaining that the at least one output from the at least a first intrusion detector matches at least one of the multiplicity of premises intrusion detection patterns, to automatically tune a threshold of at least a second intrusion detector deployed in the premises. |
| US09691267B2 |
Environment detection system having communication recovery function including isolator coupled to two-way communication loop
The present invention provides a communication recovery method using an isolator in a communication system through a power line of land and marine equipment, wherein the method promptly senses situations, such as a disconnection or a short-circuit of a communication line, and restores the communication line for sensing and warning fire or gas in a larger sized space such as an inside/outside of a ship and an inside/outside of a plant or a building. |
| US09691262B1 |
Informing first responders based on incident detection, and automatic reporting of individual location and equipment state
A method and system are provided. The method includes generating a set of workplace predictors of risk relating to accidents, injury, and industrial hygiene, based on at least one employee state that includes at least one of a physical state, a cognitive state, and an emotional state. The method further includes collecting data for an elevated risk of a workplace accident at a work location responsive to the set of workplace predictors. The data includes employee data for employees involved in the elevated risk and workplace machinery data for workplace machinery involved in the elevated risk. The method also includes automatically dispatching the data to first responders using one or more hardware-based information dispatching devices. |
| US09691259B2 |
Method to activate emergency alarm on a personal alarm safety system device
A personal alert safety system comprises a housing adapted to be worn by a user. An accelerometer is in the housing. An alarm device is operatively associated with the housing. A control in the housing is operatively connected to the accelerometer and the alarm device. The control is configured to operate the alarm device responsive to select acceleration movement of the housing sensed by the accelerometer. |
| US09691256B2 |
Method and device for presenting prompt information that recommends removing contents from garbage container
Aspects of the disclosure provide a method for presenting prompt information that recommends removing contents from a garbage container. The method includes acquiring garbage information and garbage decaying benchmark information of the contents in the garbage container; determining whether the contents in the garbage container have mold or odor based on the garbage information and the garbage decaying benchmark information; and presenting the prompt information that recommends removing the contents from the garbage container when it is determined that the contents in the garbage container have mold or odor. |
| US09691254B2 |
Real-time alarm system for field safety management and driving method thereof
A real-time alarm system for field safety management, including: an RF communication module for outputting a warning sound or making an LED emit light, as a warning signal is received through an RF transmit and receive unit; a field management communication terminal for monitoring in real-time a body temperature displacement value, a heartbeat displacement value or a slope displacement value transmitted from the RF communication module and creating the warning signal; and a general server for periodically receiving the body temperature displacement value, the heartbeat displacement value or the slope displacement value at intervals of a day, a week, a month or a year through a wired or wireless communication network previously connected to the field management communication terminal and deriving a plurality of quantitative graphs related to safety management status of a field where the RF communication module is located. |
| US09691252B2 |
Floor covering item for detecting droppages
A covering component for detecting falls includes: a body delimited by edges, a plurality of pressure sensors distributed in accordance with a selected geometry in the body, a processing unit connected to at least some of the pressure sensors and which is arranged to collect state information of these pressure sensors, and at least a first socket and a second socket, each of which is connected to the processing unit which is arranged in the region of an edge, and which is arranged so as to be able to be connected to a socket of another similar component. The processing unit is arranged to: associate location information taken from this state information with location information of the component, receive via the first socket information originating from a first other similar component, and transmit, via the second socket, the associated information and/or received information to a second other similar component. |
| US09691250B2 |
System, apparatus, and method of providing an alert for an infant in a car seat
A system, apparatus, and method of providing an alert when an infant or child is in a child safety seat in a vehicle. Exemplary embodiments can include a pressure sensor and a transmitted signal, such as a continuously transmitted signal, when an infant or child is in a child safety seat and other conditions are met. In some examples, if a continuously transmitted signal is broken or otherwise fails to transmit, an alert may be provided. The alert may be provided through any of a variety of data transmission protocols to any of a variety of devices or locations, for example a mobile phone, smart phone, dedicated alert device, or emergency call center, depending on desired conditions. |
| US09691230B2 |
Video poker game with player hand disqualification
A method of playing a five card draw video poker wagering game on a gaming device comprising at least a processer, input device and video monitor screen is disclosed. The method comprises providing bonus features in video poker games without requiring an extra wager in addition to a base wager, without lowering the paytable, and basing the paytable on the total wager. In lieu of an extra wager, a predetermined set of dealt hands is automatically disqualified, effectively ending the game and forfeiting the wager. All dealt hands that are not disqualified are qualified hands. The player is eligible to receive at least one randomly-provided bonus feature or guaranteed bonus feature on every qualified hand. |
| US09691227B2 |
System and method for simulating the outcome of an electronic bingo game as a keno game
A game system and method plays an electronic game and simulates the outcome as a keno game. The game system allows a player to place a wager, plays the electronic game, and establishes an outcome of the electronic game. The outcome of the electronic game includes a payout according to a first pay table if a set of predetermined conditions has been achieved. The outcome of the game is simulated as a keno game. The outcome of the keno game is equivalent to the outcome of the electronic game. |
| US09691225B2 |
Resource management gambling hybrid gaming system
Systems for a gambling hybrid game having a resource management entertainment game are disclosed. In a resource management entertainment game including a terminal, a player acquires and consumes resources to achieve a goal. An entertainment system engine of the gambling hybrid game provides the resource management entertainment game and determines when an interaction with a game element occurs in the game. A game world engine of the gambling hybrid game determines when a gambling event in a gambling game is to be provided based upon the interaction with game element in the resource management entertainment game. The game world engine then requests that a real world engine of the gambling hybrid game resolve the gambling event in the gambling game. The real world engine resolves the gambling event and associated wagers on the outcome of the gambling event. |
| US09691222B2 |
Electronic wagering
The present system incorporates mobile computing devices to play games, such as electronic pull-tabs, in a plurality of venues, each having a local wireless network. Each network communicates with a central system that generates decks of game outcomes and associated awards. All wagers and awards for each game are tracked on the central system, which also provides each game award and associated outcome from a deck stored on the central system. |
| US09691218B2 |
System and method to provide user-configurable preferences and/or options for team play on a single gaming machine
A method and system to provide user-configurable preferences and/or options for team play on a single gaming machine is disclosed. According to one embodiment, a computer-implemented gaming system comprises a memory device having stored thereon a gaming application that enables multiplayer, turn-based gameplay among one or more players. A computer-processing unit is operatively connected to the memory device and processes the gaming application to enable the one or more players to specify a condition for determining when a player's turn at gameplay ends. Processing the gaming application further includes determining that the condition is satisfied for a current player and generating a message to indicate that the current player's turn at gameplay is terminated. A display presents the generated message to the one or more players. |
| US09691217B2 |
Method of playing a sporting event interactive board game
A method of playing a sporting event interactive board game is provided. A sporting event is displayed on at least one of a television, a computer monitor or other electronic device. The present invention includes a game board. The game board includes a playing surface having a plurality of betting spaces forming a path. Each player may purchase at least one of the betting spaces to play the game. The present invention further includes a chip. A position of the chip is determined randomly and placed on one of the betting spaces. The chip is then moved along the path of the betting spaces based on certain plays performed during the sporting event. When a score or an end of a period occurs during the sporting event, the player who purchased the betting space in which the chip is currently resting is paid. |
| US09691213B2 |
Automated customized cosmetic dispenser
The present invention provides a method and apparatus for the creation and dispensing of a custom formulation within a package at a retail point of sale. In one aspect, the invention includes an automated dispensing apparatus including at least a two-axis robot arm. In another aspect, the invention includes an automated mixer adapted to mix the dispensed custom formulation within the package. |
| US09691212B2 |
Systems and methods for providing a combined product for dispensing from a product dispenser
Embodiments of the invention can include systems and methods for providing a combined product for dispensing from a product dispenser. In one embodiment, a system can provide a combined product for dispensing from a product dispenser. The system can include a code generation module operable to receive data associated with a plurality of product recipes; and generate a machine readable item with a combined recipe including the plurality of product recipes, wherein the machine readable item configures a product dispenser to dispense the combined recipe. |
| US09691208B2 |
Mechanisms for authenticating the validity of an item
Mechanisms for validating the authenticity of an item. A reader device records authentication data that is obscured in a label. The authentication data is provided to a remote authentication server via a network. The reader device receives, from the remote authentication server, an authentication response based on the authentication data. Based at least in part on the authentication response, the reader device displays an indication that identifies whether the item is authentic. |
| US09691205B2 |
Cloud controlled common access entry point locking system and method
A cloud-based locking system and method, comprising a network-connected server comprising at least a memory and a processor and further comprising programmable instructions stored in the memory and operating on the processor, the instructions adapted to a system for locking and unlocking a common access entry point comprising, at least, a lock control interface, a relay, and a communication manager, is disclosed. The lock control interface is operably connected to a relay wherein the relay is electrically connected to a locking system of a common access entry point and able to lock and unlock a locking device thereon. The communication manager is configured to receive a request to lock or unlock the locking device from a network wherein the communication manager is operably connected to the lock control interface to issue commands to the lock control interface based on the request. |
| US09691200B2 |
Energy saving security system
A method and an apparatus are provided for protecting a secured space. The method includes the steps of providing a secured space including a first secured area and a second secured area accessed through the first secured area, wherein the second secured area has a relatively higher security level than the first secured area, controlling access into each of the first and second secured areas via at least one access controller, and deactivating a portion of the at least one access controller in accordance with a predetermined event and a security level. |
| US09691198B2 |
Wireless access control system and methods for intelligent door lock system
A wireless access control system to lock or unlock a first door at a dwelling of a user. A user remote access device transmits a first signal and a second signal. The user remote access device includes a vibration mode that provides an alert to the user of the remote access device. The user remote access device is configured to be in communication with an intelligent door lock system at the dwelling with the first door. The intelligent door lock system includes: a drive shaft, a circuit coupled to an engine configured to cause a rotation of the drive shaft, and an energy source coupled to the drive shaft, the user remote access device configured to provide the first signal to the intelligent lock system for locking or unlocking of the first lock, the intelligent door lock system configured to allow controlled access to the dwelling that includes an occupant of the dwelling as well as a designated third person granted access rights by the occupant. The user remote access device is configured to be in communication to a second lock at a vehicle of the user or at an office of the user. The user remote access device is configured to communicate with the second lock with the second signal to cause the second lock to lock or be unlocked. The remote access device has a controller for generating the first and second signals. |
| US09691197B2 |
Data processing apparatus for vehicle
A data processing apparatus for a vehicle, which operates upon receiving a power supply from an in-vehicle device, and performs a predetermined data processing, includes: a nonvolatile memory for storing backup data, to be held at a time when stopping the power supply from the in-vehicle device; a predicting device for predicting that the power supply from the in-vehicle device is cut off; and a first backup device for storing the backup data in the nonvolatile memory when the predicting device predicts that the power supply from the in-vehicle device is cut off. |
| US09691196B2 |
Data reproducing apparatus
A data reproducing apparatus that reproduces moving image data that is captured while a vehicle is traveling includes a controller configured to: derive a stoppable distance that the vehicle requires to come to a stop based on a speed of the vehicle obtained while the vehicle was traveling during an image-capturing time period in which the moving image data was captured; derive an inter-vehicle distance between the vehicle and a preceding vehicle located ahead of the vehicle during the image-capturing time period in which the moving image data was captured; and superimpose, on an object image generated from the moving image data, a first mark which shows a position corresponding to the stoppable distance and a second mark which shows a position corresponding to the inter-vehicle distance. |
| US09691184B2 |
Methods and systems for generating and joining shared experience
According to an example, a computer may receive characteristics information of an object in a video stream captured by a first computing device, generate a signature based on the characteristics information, identify an augmented reality information associated with the signature, transmit the augmented reality information to the first computing device, receive, from a second computing device, a set of characteristics information of the object in an image captured by the second computing device, determine that the set of characteristics information from the second computing device has a second signature that matches the signature generated based on the characteristics information received form the first computing device, and transmit the identified augmented reality information to the second computing device. |
| US09691179B2 |
Computer-readable medium, information processing apparatus, information processing system and information processing method
In an example system, a computer is caused to function as: a feature detection unit which detects a feature arranged in a real space; an image generation unit which generates an image of a virtual space including a virtual object arranged based on the feature; a display control unit which causes a display apparatus to display an image in such a manner that a user perceives the image of the virtual space superimposed on the real space; a processing specification unit which specifies processing that can be executed in relation to the virtual space, based on the feature; and a menu output unit which outputs a menu for a user to instruct the processing specified by the processing specification unit, in such a manner that the menu can be operated by the user. |
| US09691178B2 |
Scanning and processing objects into three-dimensional mesh models
The claimed subject matter includes techniques for scanning and processing three-dimensional (3D) objects. An example method includes scanning the 3D object to produce depth data. The method also includes generating, via a processor, a 3D progressive mesh from the depth data. The method further includes displaying the generation of the 3D progressive mesh in real-time. |
| US09691171B2 |
Visualization tool for parallel dependency graph evaluation
Systems and processes providing a tool for visualizing parallel dependency graph evaluation in computer animation are provided. Runtime evaluation data of a parallel dependency graph may be collected, including the start time and stop time for each node in the graph. The visualization tool may process the data to generate performance visualizations as well as other analysis features. Performance visualizations may illustrate the level of concurrency over time during parallel dependency graph evaluation. Performance visualizations may be generated by graphing node blocks according to node start time and stop time as well as the level of concurrency at a given time to illustrate parallelism. Performance visualizations may enable character technical directors, character riggers, programmers, and other users to evaluate how well parallelism is expressed in parallel dependency graphs in computer animation. |
| US09691170B2 |
Proactive creation of photo products
A method for proactively creating a photobook includes identifying a group of images by a computer system and automatically creating a design for a photobook by the computer system without receiving a user's request for designing a photobook if the number of images in the group is determined to be within a predetermined range. Pages of the photobook incorporate a plurality of images in the group. The method further includes presenting the design of the photobook to a user for preview and receiving an order from the user for a physical manifestation of the photobook based on the design. |
| US09691166B2 |
Radiation CT apparatus
A radiation CT apparatus that can gain a clear tomogram without a rotation axis runout and without fail through a single CT scan and a simple operation is provided. When the data on the projection with radiation collected through a CT scan is first reconstructed through an arithmetic operation by a reconstruction arithmetic operation unit 13, temporary coordinates that have been set in advance as the coordinates of the projected rotation axis so as to construct a tomogram along a predetermined sliced surface are used, this tomogram is displayed on the screen for changing the rotation axis coordinates that include the temporary coordinates, and the coordinates of the projected rotation axis are shifted by any amount in any direction through an operation on the screen so that a reconstruction arithmetic operation is again carried out in the reconstruction arithmetic operation unit 13. |
| US09691163B2 |
System and method of measuring distances related to an object utilizing ancillary objects
A system and method for measuring distances related to a target object depicted in an image and the construction and delivery of supplemental window materials for fenestration. A captured digital image is obtained containing a scene with a target object whose dimension is to be measured. The digital image may contain a target object dimension identified by one or more ancillary objects and a reference object in the same or different planes. Image processing is performed to find the reference object using known fiducial patterns printed on the reference object, metadata supplied by a user and/or by the detection of colored papers in the scene of the captured image. Adhering objects aid in keeping the reference object applied to an item in the scene such as a wall, while contrast objects aid the image processing to locate the reference object in low contrast reference object/background situations. Once located and measured, the reference object is used to calculate a pixel scale factor used to measure the target object dimensions. Target object dimensions are provided to an automated or semi-automated measurement process, design and manufacturing system such that customized parts are provided to end users. |
| US09691161B1 |
Material recognition for object identification
The recognition of objects such as clothing items can be improved by capturing image data that represents the material characteristics and true color of the object. A high resolution image can be captured that shows the individual threads and/or fibers, among other possible pattern or texture characteristics. Various approaches are discussed for determining the scale of these features to more accurately determine the way the material is made. Further, approaches are discussed that enable the true color of the material to be determined, through hardware and/or software, to further improve the accuracy of such a determination. The material and color properties can be combined with a conventional object recognition process to provide accurate object identification and/or authentication results. |
| US09691157B2 |
Visualization of anatomical labels
A framework for visualization is described herein. In accordance with one implementation, one or more structures of interest are localized in a three-dimensional image. A position of an anatomical label may be determined using a positioning technique that is selected according to a view type of a visualization plane through the image, wherein the position of the anatomical label is outside the one or more structures of interest. The anatomical label may then be displayed at the determined position in the visualization plane. |
| US09691156B2 |
Object image labeling apparatus, method and program
The invention relates to a labeling apparatus (1) for labeling structures of an object shown in an object image. A probability map providing unit (3) provides a probability map, the probability map indicating for different labels, which are indicative of different structures of the object, and for different positions in the probability map the probability that the respective structure, which is indicated by the respective label, is present at the respective position, wherein the probability depends on the position in the probability map. The probability map is mapped to the object image by a mapping unit (4), wherein a label assigning unit (5) assigns to a provided contour, which represents a structure in the object image, a label based on the mapped probability map. This allows automatically labeling structures of the object, which are indicated by provided contours in the object image, with relatively low computational efforts. |
| US09691155B2 |
Image processing apparatus and image processing method for finding background regions in an image
An image processing apparatus comprises a video input unit, a region division unit configured to divide an image acquired by the video input unit into a plurality of regions each including pixels of similar attributes, a feature extraction unit configured to extract a feature from each divided region, a background model storage unit configured to store a background model generated from a feature of a background in advance, and a feature comparison unit configured to compare the extracted feature with a feature in the background model and determine for each of the regions whether the region is the background. |
| US09691154B2 |
Digital optical instrument having a folding bridge
The invention relates to a digital optical instrument including two eyepieces and a folding bridge for adapting the eyepiece distance to the interpupillary distance of the user. In an image recorded by an image sensor, a first bounding frame which is tilted about a first tilt angle relative to the image sensor, is defined and bounds a first portion of the recorded image, wherein the first tilt angle is defined depending on the folding angle. The first portion which is bounded by the tilted first bounding frame is transmitted to the first or second display and displayed by the first or the second mechanically tilted display while maintaining the orientation of the recorded image relative to the observed scene or relative to the horizontal, that is, without rotating the recorded image or the image portion relative to the observed scene or relative to the horizontal. |
| US09691152B1 |
Minimizing variations in camera height to estimate distance to objects
Approaches provide for minimizing variations in the height of a camera of a computing device when estimating the distance to objects represented in image data captured by the camera. For example, a front-facing camera of a computing device can be used to capture a live camera view of a user. An application can analyze the image data to locate features of the user's face for purposes of aligning the user with the computing device. As the position and/orientation of the device changes with respect to the user, the image data can be analyzed to detect whether a location of a representation of a feature of the user aligns with the alignment element. Once the feature is aligned with the alignment element, a rear-facing camera (or other camera) can capture second image data of an object. The second image data can be analyzed to determine a geometric relationship between the rear-facing camera and the object, and the geometric relationship can be used to determine a distance to the object with respect to the computing device. |
| US09691151B1 |
Using observations from one or more robots to generate a spatio-temporal model that defines pose values for a plurality of objects in an environment
Methods, apparatus, systems, and computer-readable media are provided for generating and using a spatio-temporal model that defines pose values for a plurality of objects in an environment and corresponding times associated with the pose values. Some implementations relate to using observations for one or more robots in an environment to generate a spatio-temporal model that defines pose values and corresponding times for multiple objects in the environment. In some of those implementations, the model is generated based on uncertainty measures associated with the pose values. Some implementations relate to utilizing a generated spatio-temporal model to determine the pose for each of one or more objects an environment at a target time. The pose for an object at a target time is determined based on one or more pose values for the object selected based on a corresponding measurement time, uncertainty measure, and/or source associated with the pose values. |
| US09691149B2 |
Plenoptic camera comprising a light emitting device
A plenoptic camera comprising a camera lens, a lenslet array comprising a plurality of microlenses and a photosensor array. In order to determine reference pixels of sub-images, the camera lens comprises a light emitting device arranged in the aperture stop plane of the camera lens, the light emitting device lighting the photosensor array. |
| US09691144B2 |
System and method for counting zooplankton
A method and a system for density measurement of zooplankton in situ in an aqueous solution are provided. The method comprises acquiring at least one image of a volume of the aqueous solution; processing the at least one image and identifying particles in the at least one image; analyzing the identified particles based on a sharpness of each particle, and identifying zooplankton to be counted. |
| US09691142B2 |
Image generating device, image generating method, and non-transitory computer-readable storage medium
An image generating device that generates a composite image based on partial images cut out from captured images having photographic subject regions partially overlapping with each other, includes: a correction device that corrects each target partial image by setting one of first and second adjacent partial images as a reference partial image; a generation device that generates first and second conversion tables for approximating a concentration characteristic of each target partial image in overlapping first and second common regions to the first and second adjacent partial images, respectively; and a mixture conversion device that converts a concentration of each target partial image to make an influence of the first conversion table larger as a position of a pixel is closer to the first adjacent partial image, and to make the influence of the second conversion table larger as the position of the pixel is closer to the second adjacent partial image. |
| US09691140B2 |
Global matching of multiple images
Global matching of pixel data across multiple images. Pixel values of an input image are modified to better match a reference image with a slope thresholded histogram matching function. Visual artifacts are reduced by avoiding large pixel value modifications. For large intensity variations across the input and reference image, the slope of the mapping function is thresholded. Modification to the input image is therefore limited and a corresponding modification to the reference image is made to improve the image matching. More than two images may be matched by iteratively modifying a cumulative mass function of a reference image to accommodate thresholded modification of multiple input images. A device may include logic to match pixel values across a plurality of image frames generated from a plurality of image sensors on the device. Once matched, image frames may be reliably processed further for pixel correspondence, or otherwise. |
| US09691139B2 |
Adaptive contrast in image processing and display
Methods of producing an output image with enhanced contrast are disclosed. A first set of methods is adaptive and region-based and comprises dividing a digital input image comprised of input image luma pixels into a plurality of blocks, and for each of the blocks, applying certain statistical analyses and computations to produce output image pixel data, communicating the output image pixel data to an image display device, and displaying the output image. A second set of methods is adaptive and uses human vision basis functions. A device for producing an output image with enhanced contrast is also disclosed. |
| US09691137B2 |
Radial distortion parameter acquiring method and apparatus
Embodiments of the present invention disclose a radial distortion parameter acquiring method and apparatus. The method includes: randomly selecting a plane as a first plane; making an optical axis of a digital image capture device perpendicular to the first plane, and photographing the first plane to obtain a distorted image of the first plane; acquiring n arcs from the distorted image; and obtaining, by calculation, a radial distortion parameter of the digital image capture device according to the arcs. The apparatus includes: a selecting unit, a photographing unit, an acquiring unit, and a calculating unit. By applying the embodiments of the present invention, only one distorted image needs to be photographed to acquire a radial distortion parameter of a digital image capture device, and the distorted image can be acquired depending on a natural environment. |
| US09691133B1 |
Noise reduction with multi-frame super resolution
A method of generating super resolution image data includes receiving original image data of a low resolution at an image processing device, performing motion compensation on the original image data using a current frame of image data and at least one previous frame of image data and at least one future frame of image data as reference frames, generating motion vectors, applying noise reduction to the current frame of image data and the reference frames to produce noise reduced, current frame image data, and generating a current frame of super resolution image data using the noise reduced, current frame image data. |
| US09691131B1 |
System and method for image resizing
An image processing method and corresponding system stores in computer memory image size data representing a plurality of image sizes. First user interface controls are displayed on a display device to allow a user to specify a source image. The image size data stored in computer memory is used to produce data representing a plurality of transformed images corresponding to the source image with sizes that correspond to the image sizes represented by the image size data. A display window is displayed on the display device where the data representing the plurality of transformed images is used to simultaneously display representations of the plurality of transformed images in a particular area of the display window for viewing by the user. |
| US09691128B2 |
Aggregating and displaying social networking system user information via a map interface
A map interface presents a geographic map with markers identifying geographic locations associated with content items. When the geographic distance between two or more content items is less than a threshold distance, multiple content items are grouped to create an aggregated content item. Based on the geographic locations associated with the grouped content items, a geographic location is associated with the aggregated content item. A single marker identifies the geographic location for the aggregated content item on the geographic map. When a user viewing the map interface accesses the single marker, content selected from the content items combined to generated the aggregated content item is presented as well as the geographic location associated with the aggregated content item. |
| US09691122B2 |
Facilitating dynamic and efficient pre-launch clipping for partially-obscured graphics images on computing devices
A mechanism is described for facilitating dynamic and efficient pre-launch clipping for partially-obscured images on computing devices. A method of embodiments, as described herein, includes receiving state data relating to an image having partially-obscured regions, where the image is capable of being processed on a graphics processing unit of a computing device, and evaluating the state data, where evaluating includes computation of at least one of visible pixels and invisible pixels of the image. The method may further include selecting the visible pixels to be included in processing of the image, where the invisible pixels are ignored. The method may further include processing the image based on the visible pixels. |
| US09691121B1 |
Distributed determination of scene information
Techniques for distributed determination of scene information are described herein. Scene information may include, for example, information associated with geometries, lighting, colors, texture, shading, shadows, audio, camera attributes, and other information associated with a scene. A first portion of scene information may, for example, be determined by one or more first components, while a second portion of scene information may, for example, be determined by one or more second components. In some cases, at least part of the first portion of scene information may be provided from the one or more first components to the one or more second components. The one or more second components may use the at least part of the first portion of scene information in combination with at least part of the second portion of scene information to generate at least part of a resulting image and/or resulting audio associated with the scene. |
| US09691118B2 |
System for optimizing graphics operations
Disclosed is a system for producing images including techniques for reducing the memory and processing power required for such operations. The system provides techniques for programmatically representing a graphics problem. The system further provides techniques for reducing and optimizing graphics problems for rendering with consideration of the system resources, such as the availability of a compatible GPU. |
| US09691117B2 |
External validation of graphics pipelines
Data may be streamed out of a graphics pipeline during run time without preprogramming the stream out. A command stream may be captured, draw commands monitored, and shader output definitions may be parsed to determine how to stream out shader data, for example for debugging. Data may be streamed out from an application without using the application's original code. |
| US09691115B2 |
Context determination using access points in transportation and other scenarios
Systems and methods are provided for context determination. In one implementation one or more indications can be received, each of the one or more indications corresponding to a perception of one or more access points in relation to a user device. The one or more indications can be processed to determine one or more characteristics of at least one of the one or more access points. Based on the one or more characteristics, a context of the user device can be determined. |
| US09691114B2 |
Consumables inventory management method
A method of managing an inventory includes associating an identifier with a container system component such as a container, a sensor or a substance, where the sensor is configured to determine an indication of an attribute of the substance stored in the container. The method further may include associating an identifier with a container system member within a dataset remote to the container; remotely receiving container system data including the identifier and the indication of the attribute; and performing at least one data processing task associated with the container system data. |
| US09691112B2 |
Grid-friendly data center
Methods and arrangements for calculating a power budget. Data are received, the data including data relating to a current state of an electrical grid at a power-drawing location which draws at least one variable electrical load, the at least one variable electrical load being subject to variable pricing. At least one prediction is determined, the at least one prediction pertaining to a future state of the electrical grid and a future electrical load to be drawn at the power-drawing location. A power budget is thereupon calculated, with respect to the power-drawing location, based on the data and the at least one prediction. Other variants and embodiments are broadly contemplated herein. |
| US09691111B2 |
Systems, methods, and apparatus for determining energy savings
A system, method, and apparatus for determining energy savings are provided. The method may include repeatedly measuring energy usage of a load, determining that a demand response load control event exists, modifying the cycle of operation based at least in part on determining that a demand response load control event exists, and determining an energy savings based on comparing the measured energy usage of the load with an energy usage statistic. The determining that the demand response load control event exists may include receiving a demand response load control notification. The modifying the cycle of operation may include reducing a power draw of the load. |
| US09691110B2 |
Method and system for providing automated high scale fabrication of custom items
Method and system for providing volume manufacturing of customizable items including receiving a data package including a plurality of manufacturing parameters, each of the plurality of manufacturing parameters associated with a unique item, verifying the received data package, and implementing a manufacturing process associated with the received data package is provided. |
| US09691107B2 |
Exchanging personal information to determine a common interest
A user agent of a user selects another user having a user agent. The user agents exchange personal information about the user and personal information about the other user. The user agent determines whether a common interest exists between the two users based on the exchange of personal information. The other user is added to a social networking webpage of the user when the user agent determines that a common interest exists. |
| US09691106B2 |
Location based friend finding
A method, data processing system, and computer program product for locating people. A mobile data processing system identifies a number of degrees of separation from a requestor for use in searching for the people. The mobile data processing system searches a network data processing system for data structures that contain information about associations between the people that are within the number of degrees of separation from the requestor to generate an initial group of people. The mobile network data processing system identifies a group of people from the initial group of people that are within a geographic location based on a location of the mobile data processing system and a portion of the group of people who are online. The mobile data processing system displays the portion of the group of people on a display device for the mobile data processing system. |
| US09691104B2 |
System and method for providing revenue protection based on weather derivatives and merchant transaction data
Processor-executable methods, computing systems, and related processing for the creation, transaction, administration, management and communication of data relating to weather-related guarantees or revenue protection policies for mitigating the risk of loss of recurrent merchant revenue due to one or more weather conditions, based on analysis of revenues resulting from payment card transactions associated with the merchant. |
| US09691103B1 |
Systems and methods for processing overhead imagery
A method of processing overhead imagery of a property includes providing a computing device having a processor and a memory, receiving images of the property from one or more overhead image sources, and positionally correlating the images using the processor. Using the positionally correlated images, one or more features associated with the property are detected, wherein the one or more features include structures on the property and risks to the structures on the property. The method further includes determining, using the processor, a premium for an insurance policy covering the property using at least in part the detected one or more features associated with the property and non-physical risks associated with the property. A quote for the determined premium for the insurance policy is then provided to the user. |
| US09691097B2 |
System and method of providing recommendations
A method of providing recommendations is disclosed and includes receiving a selection of an offering via an online site. The method also includes outputting a detail page related to the offering via the online site. The detail page includes a first selectable indicator corresponding to a social network of a visitor and a second selectable indicator corresponding to unfiltered content. The method also includes outputting at least one recommendation via the detail page. Each recommendation is associated with a member of the social network when input received via the online site indicates a selection of the first selectable indicator. |
| US09691096B1 |
Identifying item recommendations through recognized navigational patterns
Customer interactions with one or more pages associated with an online marketplace may be aggregated into historical navigational patterns, which may be associated with one or more items available for purchase at the online marketplace. Where a series or sequence of customer interactions is subsequently received from a customer, such interactions may also be aggregated into a pattern, which may be compared to one or more of the historical navigational patterns. An item recommendation may be identified for the customer based at least in part on the comparison of the received navigational pattern to one or more of the historical navigational patterns. The item recommendation may include an item previously purchased following one of the historical navigational patterns, or an item related to one or more such items. |
| US09691095B2 |
System for improving a searchable vehicle database of aggregate vehicle data
A computerized system collects used vehicle data regarding vehicles available for sale from numerous sources (e.g., as from a vehicle auction system), and modifies and supplements such vehicle data for presentation to the consuming public in a searchable manner such that a single entity (e.g., a specific dealer) can offer all of the vehicles for sale to consumers while accounting for the various costs that will be incurred by the selling entity to successfully complete the sales transaction. |
| US09691093B2 |
System and method of matching a consumer with a sales representative
A system and method is disclosed having at least one sensor operable to detect a presence of a consumer in a retail environment and at least one database storing personal information of the consumer and a plurality of sales representatives employed by the retail environment. The personal information includes at least one of a personality profile based on data from at least one social network system and text communications, photographic data, and video data on the social network system. A computing device is also provided that includes at least one processor and at least one network connection. The processor is operable to compare the personal information of the consumer with the personal information of each of the plurality of sales representatives and select one of the plurality of sales representatives to service the consumer based on the comparison. |
| US09691087B2 |
Method and system for use of game for charity donations
A method and system for use of a game with charity donations. In one example, a donation agent interacting with a merchant website can offer an online user an option to allocate at least a portion of a payment for or price of a purchase, associated with a transaction made by the user via the merchant website, to be donated by a merchant (corresponding to the merchant website), on behalf of the user, to a charity of the user's choosing. The donation agent can disburse the calculated donation amount to the charity selected by the customer. The points earned can be combined with a college scholarship award mechanism. The game encourages people to participate in the charity in a fun way, e.g., as a hobby every day, with a large user base. |
| US09691086B1 |
Adaptive content rendering
Methods, systems, and apparatus, including computer programs encoded on a computer-readable storage medium for rendering a content item. A method includes: providing a request to a server computer, the request in the form of a request for a content item to fill a content item slot on a page to be displayed on a client device or a request for search results; receiving, in response to the request, a content item for display on the client device; and initiating the display of the content item including executing a script that identifies a plurality of layout options for the display of the content item, evaluates the plurality of layout options based on one or more criteria, and renders the content item in accordance with one of the plurality of layout options based on the evaluation. |
| US09691078B2 |
System for incentivizing charitable giving based on physical activity and a method of using the same
A system and method for incentivizing charitable giving based on physical activity includes a computer and a sports ball associated with a first participant identifier. The sports ball includes a sensor that detects and logs activity data. The activity data is received by the computer, and in further transmitted to a server. The server stores the received activity data in a participant record associated with the first participant identifier and assigns a plurality of credits to the participant record associated with the first participant identifier based on the activity data stored in the participant record. Software executing on the server generates a report based on the credits assigned to the participant record associated with the first participant identifier and transmits the report to a participant computer associated with the first participant identifier. |
| US09691074B2 |
Performance evaluation of an information resource in a computer network environment
Systems and methods of evaluating performance of an information resource in a computer networked environment are provided. A data processing system can obtain a request for a performance metric of an information resource. A number of visits to the information resource by an audience segment, and an aggregate number of visits to the information resource can be determined and used to identify a first metric. A global audience segment number and a global aggregate audience number can also be determined and used to identify a second metric. A performance metric associated with the information resource can get determined based on the first metric and the second metric. |
| US09691073B2 |
Displaying social opportunities by location on a map
A social networking system provides relevant content objects at the request of social networking system users. Relevance scores are determined for content objects by matching user location, user interests, and other social information to the content, location, and timing associated with content objects. A ranked list of content objects can be provided to the user, where the content objects are relevant to them based on their interests, location, and other social information. The system provides a user interface that displays a map containing pins, where each pin represents a content object in actionable proximity to a user. The content objects selected to be presented as pins to the user are those content objects with sufficiently high relevance scores. Multiple pins for a nearby area can be clustered. The user can switch between zoom levels for the map, thereby showing pins at varying distances from the user's current location. |
| US09691072B2 |
Method and system for generating electronic forms for purchasing financial products
The present invention provides a system and method for generating electronic forms for purchasing a financial product, such as a variable annuity. The present invention enables a user (e.g., an agent, a seller, etc.) to access a web-based application where pre-interview data of a client may be entered. The web-based application may then setup interview transaction templates based on various rules and other considerations for gathering appropriate information from a client. The transaction may be stored on the user's desktop device which may be used to remotely gather interview data from a client. During the interview process, the user may collect data offline. At the end of the interview process, the user may reconnect with the web-based application for transmitting data to a server. The server may then generate the appropriate forms based on the interview data gathered remotely and/or other sources of information. |
| US09691070B2 |
Automated voice-based customer service
An automated voice-based customer service system assists TV subscribers without engaging a customer service representative at a call center. A spoken user query is captured by a hand-held remote control device equipped with a microphone. The remote control device transmits voice data to a television content receiver and the voice data is sent to an automated customer service system. The automated customer service system decodes the user query and formulates a response. The response is then transmitted back to the television content receiver for presentation to the user as a voice response, on-screen text response, or as a modification to equipment settings. The user is able to converse verbally with the voice-based automated customer service system. Such a protocol assists subscribers in solving most common, routine problems without involvement of a human customer service representative. The automated customer service system can be programmed to process user queries about billing as well as technical difficulties concerning content reception, tuning, or display of television signals, and device connectivity. |
| US09691069B2 |
System and method for device specific customer support
A method of routing a voice communication from an information handling system to one of a plurality of queues includes automatically obtaining an identifier from the information handling system that uniquely identifies the information handling system, and transmitting the identifier so that the voice communication can be routed to one of the queues. |
| US09691063B2 |
Stored-value card management method and system
A computerized system for activating, issuing and otherwise managing transactions and activities pertaining to stored-value cards over a communications network. A central information database is provided for storing stored-value cardholder and card purchaser information received directly from respective stored-value cardholders and card purchasers PCs through a universal central processor via respective communication gateways. The central processor is coupled for communication realtime to multiple unaffiliated stored-value card processing networks normally operated by respective hosts. Each network includes a stored-value card processor coupled to a stored-value card database and multiple respective merchant communication devices. The central processor is programmed for managing the activation and issuance of transactions and activities for the stored-value card through the respective unaffiliated networks. The universal central processor is programmed to issue the stored-value cards directly to the cardholder or card purchaser by download over respective communication gateways. The universal central processor is further programmed for reporting the card activations, issuances, transactions and activities to the cardholders and the merchants thereby providing a universal management system. |
| US09691062B2 |
Systems and methods for wirelessly determining accepted forms of payment
Systems and methods are disclosed which may allow a merchant to wirelessly transmit accepted forms of payment using a beacon installed in the merchant location or near the merchant location. A consumer having a device capable of receiving the wireless transmission may receive the accepted forms of payment and have them displayed on a screen of the device. The device may also send the accepted forms of payment to a remote server that has issued the consumer a programmable credit card such that the remote server can program the credit card based on the forms of payment accepted by the merchant. |
| US09691061B2 |
Method and system for electronic toll payment
A system and method for making electronic payments for tolls, parking and related transactions. A customer downloads an application onto their personal electronic device and registers the customer's vehicle and financial account information with a provider. The application detects upcoming toll facilities and notifies the customer. The customer can accept the payment of the toll through the application whereupon the provider makes a payment from the customer's designated account to the toll facility. |
| US09691056B2 |
System and method for transferring funds
A computer-implemented payment processing method includes receiving, by a first computer system, a funds transfer request from a sender having a first account at a first financial institution, the first financial institution being a member of a first computer-implemented payment network, the funds transfer request including an identifier for a recipient, the recipient having a second account at a second financial institution, the second financial institution being a member of a second computer-implemented payment network; based upon the identifier for the recipient, determining by the first computer system whether the recipient is registered with the second computer-implemented payment network; and upon determining that the recipient is registered with the second computer-implemented payment network, transmitting by the first computer system a funds transfer message via the first and second computer-implemented payment networks to cause funds to be transferred from the sender to the recipient. |
| US09691055B2 |
Digital wallet
A digital wallet that facilitates fast, convenient, and secure commerce using a mobile electronic device (or non-mobile electronic device) and stores information associated with transactions, such as purchase confirmations and receipts. The digital wallet can store information for use in transactions, including information associated with one or more financial accounts, user information, and shipping information. To complete an online purchase, the digital wallet can interact with a merchant's website to obtain information regarding the purchase. The digital wallet provides a user interface for the user to review and confirm the purchase information. The user interface also allows the user to select from multiple payment options, customize shipping information, or provide information requested by the merchant. The digital wallet can transmit user confirmation to the merchant's website and receive a receipt for the purchase. The digital wallet can store the receipt and synchronize the receipt with a remote storage location. |
| US09691051B2 |
Security enhancement through application access control
Security enhancement through application access control for cloud-based services and/or storage accounts is disclosed. In one aspect, embodiments of the present disclosure include a method, which may be implemented on a system, for providing, via the collaboration environment, applications for use by a user in the collaboration environment. The applications are selectable by a user, through the collaboration environment, for use in interaction and engagement with other users in the collaboration environment in collaboration sessions. The applications that are visible or available for use by the user is configurable by another user (e.g., administrator or IT specialist) with appropriate permissions, though a designated console. |
| US09691049B2 |
Master bill of materials creation
Master BOM creation may include extracting BOM data from first and second BOMs, and determining which BOM extracted data is greater. If the first or second BOM is a CAD BOM and the other BOM is a non-CAD BOM, the CAD BOM and non-CAD BOMs may be respectively used as a first and a second source BOM data for a master BOM table. If the first and second BOMs are non-CAD BOMs, or both of the first and second BOMs are CAD BOMs, the greater and lesser of the first and second BOM extracted data may be respectively used as the first and as the second source BOM data. A master BOM may be created based on mapping of the master BOM table to the second source BOM data. |
| US09691045B1 |
Roadside assistance management
Methods, computer-readable media, software, and apparatuses provide a system for establishing base stations and allocating service vehicles to the base stations in order to provide roadside assistance. The system may include computing devices associated with customer vehicles and service vehicles as well as network computing devices. The system may receive a service request from a customer regarding a disabled vehicle. The system may then identify an appropriate service vehicle to assist the customer and assign the service request to the identified service vehicle. The system may select the appropriate service vehicle based on a location of the disabled vehicle. In an example, the system may choose a service vehicle from a base station closest to or within the shortest driving time to the disabled vehicle. By setting-up base stations in advance of service requests, service vehicles may reach disabled vehicles within a predetermined period of time. |
| US09691041B2 |
Providing access to a private resource in an enterprise social networking system
Disclosed are methods, apparatus, systems, and computer readable storage media for providing access to a private resource in an enterprise social networking system. One or more servers may receive a request for access to a private resource to be granted to a user from a publisher. The publisher may be configured to publish a message as a feed item to one or more feeds, where the message includes a user identification identifying the user. The user does not have access to the private resource. The feed item may be provided to display in the one or more feeds. Access may be granted to the user via the one or more feeds. In some implementations, access may be granted in response to a user input from the feed item associated with a moderator or owner, the moderator or owner having a privilege to control user access to the private resource. |
| US09691036B2 |
Decision making in an elastic interface environment
A method for a dynamic adapter design pattern is described. The method comprises a series of tour components being selected for a user from a plurality of tour components. This selection may be based on interaction information of a plurality of past participants with the plurality of tour components. A selected tour component, from the plurality of tour components, is received from the user. The series of tour components are adapted in real-time based on the selected component. This adaptation occurs by determining the user's prior interaction with the plurality of tour components, comparing the user's prior interaction and the selected tour component with the interaction information of the plurality of past participants, and modifying the series of tour components based on the comparison. |
| US09691034B2 |
Machine-learning accelerator (MLA) integrated circuit for extracting features from signals and performing inference computations
A machine-learning accelerator (MLA) integrated circuit for extracting features from signals and performing inference computations is disclosed. The MLA integrated circuit includes a framework of finite state machine (FSM) kernels that are machine-learning algorithms implemented in hardware. The MLA integrated circuit further includes a kernel controller having mathematical structures implemented in hardware in communication with the framework of FSM kernels. An arithmetic engine implemented in hardware within the MLA integrated circuit is in communication with the kernel controller to perform computations for the mathematical structures. In at least one embodiment, the MLA integrated circuit includes a compression decompression accelerator (CDA) implemented in hardware and coupled between a memory and the kernel controller for compressing data to be stored in the memory and for decompressing data retrieved from the memory. |