最新美国发明专利第2017-06-27期 - 专利汇|PatentHub专利检索|专利查询网|发明专利查询分析

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US09691981B2	Memory cell structures The present disclosure includes memory cell structures and method of forming the same. One such method includes forming a memory cell includes forming, in a first direction, a select device stack including a select device formed between a first electrode and a second electrode; forming, in a second direction, a plurality of sacrificial material lines over the select device stack to form a via; forming a programmable material stack within the via; and removing the plurality of sacrificial material lines and etching through a portion of the select device stack to isolate the select device.
US09691973B2	Semiconductor device and dielectric film including a fluorite-type crystal A semiconductor device according to an embodiment includes a first conductive layer, a second conductive layer, and a dielectric film provided between the first and the second conductive layers. The dielectric film including a fluorite-type crystal and a positive ion site includes Hf and/or Zr, and a negative ion site includes O. In the dielectric film, parameters a, b, c, p, x, y, z, u, v and w satisfy a predetermined relation. The axis length of the a-axis, b-axis and c-axis of the original unit cell is a, b, and c, respectively. An axis in a direction with no reversal symmetry is c-axis, a stacking direction of atomic planes of two kinds formed by negative ions disposed at different positions is a-axis, the remainder is b-axis. The parameters x, y, z, u, v and w are values represented using the parameter p.
US09691970B2	Magnetoresistive devices and methods for manufacturing magnetoresistive devices A magnetoresistive device includes a substrate and an electrically insulating layer arranged over the substrate. The magnetoresistive device further includes a first free layer embedded in the electrically insulating layer and a second free layer embedded in the electrically insulating layer. The first free layer and the second free layer are separated by a portion of the electrically insulating layer.
US09691969B2	Semiconductor integrated circuit and method of making the same The present disclosure relates to a semiconductor integrated circuit which includes a substrate, a first patterned conductive layer, a first magnetic tunnel junction (MTJ) stack and a second MTJ stack. The first patterned conductive layer is over the substrate. The first MTJ stack, which is over the first patterned conductive layer, has a first size. The second MTJ stack, which is over the first patterned conductive layer, has a second size different from the first size.
US09691967B2	Magnetic memory devices having perpendicular magnetic tunnel structures therein Magnetic memory cells include a magnetic tunnel junction and a first electrode, which is electrically coupled to the magnetic tunnel junction by a first conductive structure. This conductive structure includes a blocking layer and a seed layer, which extends between the blocking layer and the magnetic tunnel junction. The blocking layer is formed as an amorphous metal compound. In some of the embodiments, the blocking layer is a thermally treated layer and an amorphous state of the blocking layer is maintained during and post thermal treatment.
US09691966B2	Surface-mounted collision sensor, and method for collision detection An apparatus assembly of a medical apparatus is equipped for collision detection by attaching a polyvinylidene fluoride (PVDF) cover assembly to at least one rigid surface of the apparatus assembly, with a resilient material between the PVDF cover assembly and the rigid surface. The PVDF assembly is composed of a PVDF foil with electrically conductive layers on opposite sides thereof. A protective layer covers the PVDF cover assembly. Electrical leads are connected to the conductive layers, and the piezoelectric property of the PVDF foil produces a voltage across the leads when a force associated with a collision acts on the PVDF foil. A detection circuit detects this voltage and initiates an appropriate response to the collision.
US09691963B2	Capacitive coupled resonator and filter device with comb electrodes and support pillars separating piezoelectric layer A capacitive coupled resonator device includes a substrate, a bottom electrode, a piezoelectric layer, a top electrode, and at least one set of support pillars positioned between the piezoelectric layer and the top electrode and/or between the piezoelectric layer and the bottom electrode. The top electrode includes a first top comb electrode having a first top bus bar and first top fingers extending in a first direction from the first top bus bar, and a second top comb electrode having a second top bus bar and second top fingers extending in a second direction from the second top bus bar, the second direction being substantially opposite the first direction such that the first and second top fingers form a top interleaving pattern. The at least one set of support pillars separates at least one of the top and bottom electrodes from the piezoelectric layer, respectively, thereby defining corresponding air-gaps.
US09691960B1	Carrier, carrier leadframe, and light emitting device and method for manufacturing same A carrier leadframe, including a frame body and a carrier, is provided. The frame body includes at least one supporting portion, and the carrier includes a shell and at least one electrode portion and is mechanically engaged with the frame body via the supporting portion. A method for manufacturing the carrier leadframe as described above, as well as a light emitting device made from the carrier leadframe and a method for manufacturing the device, are also provided. The carrier leadframe has carriers that are separate in advance and mechanically engaged with the frame body, thereby facilitating the quick release of material after encapsulation. Besides, in the carrier leadframe as provided, each carrier is electrically isolated from another carrier, so the electric measurement can be performed before the release of material. Therefore, the speed and yield of production of the light emitting device made from the carrier leadframe is improved.
US09691959B2	Light emitting device package A packaged light emitting device die includes a package body having a profiled leadframe embedded in a body of reflecting material. The leadframe is exposed on mounting surface only on at least one solder bonding area. Solder is present only on the at least one solder bonding area and not elsewhere. The reflecting material provides the reflecting parts of the package so there is no need for a reflective layer to be deposited on leadframe. Moreover, the reflecting material can function as a solder resist to self-align the solder to the at least one solder bonding area.
US09691955B2	Solid state lighting devices with improved contacts and associated methods of manufacturing Solid state lighting (“SSL”) devices with improved contacts and associated methods of manufacturing are disclosed herein. In one embodiment, an SSL device includes an SSL structure having a first semiconductor material, a second semiconductor material spaced apart from the first semiconductor material, and an active region between the first and second semiconductor materials. The SSL device also includes a first contact on the first semiconductor material and a second contact on the second semiconductor material, where the first and second contacts define the current flow path through the SSL structure. The first or second contact is configured to provide a current density profile in the SSL structure based on a target current density profile.
US09691949B2	Submount based light emitter components and methods Submount based light emitter components and related methods are disclosed. In some aspects, light emitter components include a ceramic submount, at least a first pair of electrical traces disposed on a first side of the submount, at least a first pair of electrical contacts disposed on a second side of the submount, at least one light emitter chip disposed on the first side of the submount, and a non-ceramic reflector disposed about the at least one light emitter chip. The first pair of electrical contacts is configured to electrical communicate with the first pair of electrical traces. The at least one chip is configured to electrically communicate with the first pair of electrical traces. At least a portion of the reflector is configured to conceal a portion of each trace of the first pair of electrical traces.
US09691948B2	Method for manufacturing light emitting device with preferable alignment precision when transferring substrates A method for manufacturing a light emitting device is provided. Multiple epitaxial structures and multiple bonding pads formed thereon are formed on a growth substrate. A first adhesive layer is formed on the growth substrate, wherein the first adhesive layer encapsulates the epitaxial structures and the bonding pads. A first substrate is provided on the first adhesive layer. The growth substrate is removed, so as to expose the epitaxial structures and the first adhesive layer. A second substrate and a second adhesive layer disposed thereon are provided, wherein the epitaxial structures are adhered on the second substrate by the second adhesive layer. The first adhesive layer and the first substrate are removed.
US09691938B2	Advanced electronic device structures using semiconductor structures and superlattices Semiconductor structures and methods for forming those semiconductor structures are disclosed. For example, a p-type or n-type semiconductor structure is disclosed. The semiconductor structure has a polar crystal structure with a growth axis that is substantially parallel to a spontaneous polarization axis of the polar crystal structure. The semiconductor structure changes in composition from a wider band gap (WBG) material to a narrower band gap (NBG) material or from a NBG material to a WBG material along the growth axis to induce p-type or n-type conductivity.
US09691937B2	Light-emitting device manufacturing method Provided is a method that can manufacture a light-emitting device in which quantum dot is used and which has a high luminous efficiency. A light-emitting device (1) is manufactured that includes: a cell (10) including first and second glass plates (11, 12) facing and spaced apart from each other; and quantum dot (17) encapsulated in the cell (10). Prior to the encapsulation of the quantum dot (17), a reduction step of reducing moisture adsorbed on the inside walls of the cell (10) is performed.
US09691936B2	Manufacturing method of LED carrier An LED carrier includes a substrate, a metallic layer, an insulating layer, and a reflecting layer. The metallic layer is disposed on the substrate and has a die bonding region and a ring-shaped wiring region separated from the die bonding region. A region arranged between the die bonding region and the ring-shaped wiring region is defined as an insulating region. The insulating layer at least partially covers the insulating region. The reflecting layer is arranged above the die bonding region and at least partially covers the top surface of the insulating layer. Moreover, the instant disclosure also provides a manufacturing method of an LED carrier.
US09691933B2	Radiation and temperature hard multi-pixel avalanche photodiodes The structure and method of fabricating a radiation and temperature hard avalanche photodiode with integrated radiation and temperature hard readout circuit, comprising a substrate, an avalanche region, an absorption region, and a plurality of Ohmic contacts are presented. The present disclosure provides for tuning of spectral sensitivity and high device efficiency, resulting in photon counting capability with decreased crosstalk and reduced dark current.
US09691927B2	Solar cell apparatus and method of fabricating the same A solar cell apparatus according to the embodiment includes a support substrate; a back electrode layer on the support layer; a light absorbing layer on the back electrode layer; a plurality of buffer layers on the light absorbing layer, the plurality of buffer layers having a bandgap gradually increased from a bottom thereof to a top thereof; and a window layer on the buffer layers.
US09691921B2	Textured metallic back reflector Embodiments of the invention generally relate to device fabrication of thin films used as solar devices or other electronic devices, and include textured back reflectors utilized in solar applications. In one embodiment, a method for forming a textured metallic back reflector which includes depositing a metallic layer on a gallium arsenide material within a thin film stack, forming an array of metallic islands from the metallic layer during an annealing process, removing or etching material from the gallium arsenide material to form apertures between the metallic islands, and depositing a metallic reflector layer to fill the apertures and cover the metallic islands. In another embodiment, a textured metallic back reflector includes an array of metallic islands disposed on a gallium arsenide material, a plurality of apertures disposed between the metallic islands and extending into the gallium arsenide material, a metallic reflector layer disposed over the metallic islands, and a plurality of reflector protrusions formed between the metallic islands and extending from the metallic reflector layer and into the apertures formed in the gallium arsenide material.
US09691917B2	Back contact having selenium blocking layer for photovoltaic devices such as copper-indium-diselenide solar cells A photovoltaic device (e.g., solar cell) includes: a front substrate (e.g., glass substrate); a semiconductor absorber film; a back contact including a first conductive layer of or including copper (Cu) and a second conductive layer of or including molybdenum (Mo); and a rear substrate (e.g., glass substrate). A selenium blocking layer is provided between at least the Cu inclusive layer and the Mo inclusive layer.
US09691916B2	Synthesis of three-dimensional graphene foam: use as supercapacitors The invention relates to three-dimensional crystalline foams with high surface areas, high lithium capacity, and high conductivity for use as electrode materials and methods for their fabrication. In additional embodiments, the invention also relates to the use of three-dimensional crystalline foams as supercapacitors for improved charge and energy storage.
US09691913B2	Solar cell module and method for manufacturing same A solar cell module is provided with: a plurality of solar cells, each of which comprises a first electrode and a second electrode that are formed on a photoelectric conversion unit; and a wiring material that is fitted on the first electrode and the second electrode using an adhesive and connects the solar cells with each other. The adhesive is provided so as to extend beyond a region (R) directly below the wiring material and to adhere to a lateral surface of the wiring material. The solar cell module has a pore in the region (R) directly below the wiring material.
US09691912B1	Devices having nanoscale structures and methods for making same In one embodiment, a device includes a substrate having a top surface and cavity that defines generally vertical walls, a thin film of material that has been deposited on the walls of the cavity, and a further material that fills the cavity, wherein a top edge of the thin film is exposed and forms a trace that is flush with the top surface of the substrate and has substrate material on one side and the further material on the other side.
US09691911B1	Semiconductor device A semiconductor device include a substrate, a first well region formed in the substrate, a first isolation structure formed in the first well region, a Schottky barrier structure formed on the first well region, and a plurality of assist structures formed on the first well region. The substrate includes a first conductivity type, the first well region includes a second conductivity type, and the first conductivity type and the second conductivity type are complementary to each other. The assist structures physically contact the first well region.
US09691909B2	Current aperture diode and method of fabricating the same A diode and a method of making same has a cathode an anode and one or more semiconductor layers disposed between the cathode and the anode. A dielectric layer is disposed between at least one of the one or more semiconductor layers and at least one of the cathode or anode, the dielectric layer having one or more openings or trenches formed therein through which the at least one of said cathode or anode projects into the at least one of the one or more semiconductor layers, wherein a ratio of a total surface area of the one or more openings or trenches formed in the dielectric layer at the at least one of the one or more semiconductor layers to a total surface area of the dielectric layer at the at least one of the one or more semiconductor layers is no greater than 0.25.
US09691907B1	Non-volatile memory device and manufacturing method thereof A non-volatile memory device includes a plurality of memory cells. Each memory cell includes a vertical channel, a control gate, a floating gate, and an erase gate disposed on a substrate. The vertical channel extends upwards in a vertical direction. The control gate, the floating gate, and the erase gate surround the vertical channel respectively, and a part of the floating gate is surrounded by the control gate. The erase gate is disposed between the substrate and the floating gate in the vertical direction, and the floating gate include a tip extending toward the erase gate. The vertical channel and electrodes surrounding the vertical channel, such as the control gate, the floating gate, and the erase gate, are used to reduce the area of the memory cell on the substrate of the non-volatile memory device in the present invention. The density of the memory cells may be enhanced accordingly.
US09691902B2	Semiconductor device A semiconductor device includes a first pattern on a first active region, a second pattern on a second active region, and a third pattern on a third active region. The first pattern is spaced from the second pattern by a first interval corresponding to the width of a first recess between the first and second active regions. The second pattern is spaced from the third pattern by a second interval corresponding to the width of a second recess between the second and third active regions. The first, second, and third patterns includes gate patterns, and the first and second recesses include semiconductor material with a conductivity type different from the active regions. The semiconductor material in one recess extends higher than the semiconductor material in the other recess. The first, second, and third patterns have the same width, and the first and second recesses have different depths.
US09691901B2	Semiconductor device A semiconductor device includes a substrate, a gate structure, a sidewall spacer, and an epitaxial layer. The gate structure is disposed on the substrate, and the substrate has at least one recess disposed adjacent to the gate structure. The sidewall spacer is disposed on at least two sides of the gate structure. The sidewall spacer includes a first spacer layer and a second spacer layer, and the first spacer layer is disposed between the gate structure and the second spacer layer. The epitaxial layer is disposed in the recess, and the recess is a circular shaped recess. A distance between an upmost part of the recess and the gate structure is less than a width of the sidewall spacer.
US09691898B2	Germanium profile for channel strain The present disclosure relates to a transistor device having a strained source/drain region comprising a strained inducing material having a discontinuous germanium concentration profile. In some embodiments, the transistor device has a gate structure disposed onto a semiconductor substrate. A source/drain region having a strain inducing material is disposed along a side of the gate structure within a source/drain recess in the semiconductor substrate. The strain inducing material has a discontinuous germanium concentration profile along a line extending from a bottom surface of the source/drain recess to a top surface of the source/drain recess. The discontinuous germanium concentration profile provides improved strain boosting and dislocation propagation.
US09691892B2	High voltage transistor operable with a high gate voltage A semiconductor device includes a first load contact, a second load contact and a semiconductor region positioned between the first and second load contacts. The semiconductor region includes: a first semiconductor contact zone in contact with the first load contact; a second semiconductor contact zone in contact with the second load contact; a first conductivity type semiconductor drift zone between the first and second semiconductor contact zones, wherein the semiconductor drift zone couples the first semiconductor contact zone to the second semiconductor contact zone. The semiconductor device further comprises: a trench comprising a control electrode and an insulator. The control electrode extends for at least 75% of the semiconductor drift zone. A drift zone doping concentration and an extension of the semiconductor drift zone defines a blocking voltage of the semiconductor device. The insulator is configured for insulating a voltage that amounts to at least 50% of said blocking voltage.
US09691889B2	Integrated power device A semiconductor device that includes a plurality of isolated half-bridges formed in a common semiconductor die.
US09691887B2	Semiconductor device with variable resistive element A semiconductor device includes a semiconductor body including a drift zone that forms a pn junction with an emitter region. A first load electrode is at a front side of the semiconductor body. A second load electrode is at a rear side of the semiconductor body opposite to the front side. One or more variable resistive elements are electrically connected in a controlled path between the drift zone and one of the first and second load electrodes. The variable resistive elements activate and deactivate electronic elements of the semiconductor device in response to a change of the operational state of the semiconductor device.
US09691884B2	Monolithic three dimensional NAND strings and methods of fabrication thereof Methods of making a monolithic three dimensional NAND string that include forming a stack of alternating first material layers and second material layers over a substrate, where each of the second material layers includes a layer of a first silicon oxide material between two layers of a second silicon oxide material different from the first silicon oxide material, etching the stack to form a front side opening in the stack, forming a memory film over a sidewall of the front side opening, and forming a semiconductor channel in the front side opening such that at least a portion of the memory film is located between the semiconductor channel and the sidewall of the front side opening, where at least one of an air gap or a material which has a dielectric constant below 3.9 is formed between the respective two layers of second silicon oxide material.
US09691881B2	Manufacturing method of thin film transistor substrate The invention provides a manufacturing method of a thin film transistor substrate including: sequentially forming a gate electrode, a gate insulating layer covering the gate electrode, an active material layer, and a photo-sensitive material layer on a first substrate; performing a photolithography process by using a half tone mask to form a protective layer which is above the gate electrode and has a first recess and a second recess; wet etching the active material layer by using the protective layer as a mask to form an active layer; removing a portion of the protective layer at bottoms of the first recess and the second recess to expose a first portion and a second portion of the active layer respectively; forming a first electrode connecting to the first portion; and forming a second electrode connecting to the second portion.
US09691880B2	Semiconductor device with enhanced 3D resurf A device includes a semiconductor substrate, source and drain regions in the semiconductor substrate and spaced from one another along a first lateral dimension, and a drift region in the semiconductor substrate and through which charge carriers drift during operation upon application of a bias voltage between the source and drain regions. The drift region has a notched dopant profile in a second lateral dimension along an interface between the drift region and the drain region.
US09691876B2	Enhanced gate replacement process for high-K metal gate technology The present disclosure provides a method of fabricating a semiconductor device. A high-k dielectric layer is formed over a substrate. A first capping layer is formed over a portion of the high-k dielectric layer. A second capping layer is formed over the first capping layer and the high-k dielectric layer. A dummy gate electrode layer is formed over the second capping layer. The dummy gate electrode layer, the second capping layer, the first capping layer, and the high-k dielectric layer are patterned to form an NMOS gate and a PMOS gate. The NMOS gate includes the first capping layer, and the PMOS gate is free of the first capping layer. The dummy gate electrode layer of the PMOS gate is removed, thereby exposing the second capping layer of the PMOS gate. The second capping layer of the PMOS gate is transformed into a third capping layer.
US09691875B2	Method of manufacturing nitride semiconductor device A method of manufacturing a nitride semiconductor device includes: forming a transistor having a gate electrode Schottky-joined to a nitride semiconductor layer; performing high-temperature annealing at a temperature of 200 to 360° C. for 8 to 240 hours on the transistor; and after the high-temperature annealing, performing RF burn-in by applying radiofrequency power to the transistor at a channel temperature of 180 to 360° C.
US09691870B2	Semiconductor device A semiconductor device including a semiconductor substrate and an electrode formed from an alloy containing aluminum, silicon and titanium. The silicon content in the electrode is from 0.5 to 1.0% by weight relative to the total weight of the electrode, the titanium content in the electrode is from 0.8 to 3.0% by weight relative to the total weight of the electrode, and the thickness of the electrode is at least 1 μm.
US09691868B2	Merging lithography processes for gate patterning Methods for fabricating devices on a die, and devices on a die. A method may include patterning a first region to create a first gate having a first gate length and a first contacted polysilicon pitch (CPP) with a first process. The first CPP is smaller than a single pattern lithographic limit. The method also includes patterning the first region to create a second gate having a second gate length or a second CPP with a second process. The second CPP is smaller than the single pattern lithographic limit. The second gate length is different than the first gate length.
US09691863B2	Self-aligned contact for trench power MOSFET Embodiments of the present disclosure provide a self-aligned contact for a trench power MOSFET device. The device has a layer of nitride provided over the conductive material in the gate trenches and over portions of mesas between every two adjacent contact structures. Alternatively, the device has an oxide layer over the conductive material in the gate trenches and over portions of mesas between every two adjacent contact structures. It is emphasized that this abstract is provided to comply with rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.
US09691861B2	Method for analyzing discrete traps in semiconductor devices A method analyzes traps in a semiconductor device by determining a first-order derivative of a signal representing an operation of the semiconductor device over time to produce a signal rate change. The traps in the semiconductor device are analyzed based on lifetimes corresponding to peaks of the signal rate change.
US09691859B2	Silicon carbide semiconductor device There is provided a silicon carbide semiconductor device allowing for integration of a transistor element and a Schottky barrier diode while avoiding reduction of an active region and decrease of a breakdown voltage. A silicon carbide semiconductor device includes a silicon carbide layer. The silicon carbide layer includes: a first region defining an outer circumference portion of an element region in which a transistor element is provided; and a JTE region provided external to the first region in a drift layer and electrically connected to the first region. The first region is provided with at least one opening through which the drift layer is exposed. The silicon carbide semiconductor device further includes a Schottky electrode provided in the opening and forming a Schottky junction with the drift layer.
US09691858B2	Silicon carbide semiconductor device and manufacturing method therefor A silicon carbide semiconductor device includes trenches formed in a lattice shape on the surface of a silicon carbide substrate on which a semiconductor layer is formed, and gate electrodes formed inside of the trenches via a gate insulating film. The depth of the trenches is smaller in a portion where the trenches are crossingly formed than in a portion where the trenches are formed in parallel to each other. Consequently, the silicon carbide semiconductor device is obtained that increases a withstand voltage between the gate electrodes and corresponding drain electrodes on the semiconductor device rear surface to prevent dielectric breakdown and, at the same time, has a large area of the gate electrodes, high channel density per unit area, and low ON resistance.
US09691852B2	Semiconductor device An element isolation trench is formed in a substrate and is formed along each side of a polygon in a planar view. A first trench is formed in the substrate and extends in a direction different from that of any side of the trench. A first-conductivity type region is formed on/over apart located on the side of an end of the first trench in the substrate. Accordingly, when an impurity region that extends in a depth direction in the substrate is formed by forming the trench in the substrate and diagonally implanting an impurity into the trench, the impurity is prevented from being implanted into a side face of a groove such as a groove for element isolation and so forth impurity implantation into the side face of which is not desired.
US09691851B1	Semiconductor device and manufacturing method thereof A semiconductor device includes one nanowire structure disposed on semiconductor substrate and extending in first direction on semiconductor substrate. Each nanowire structure includes plurality of nanowires extending along first direction and arranged in second direction, the second direction being substantially perpendicular to first direction. Each nanowire is spaced-apart from immediately adjacent nanowire. A gate structure extends in third direction over first region of nanowire structure, the third direction being substantially perpendicular to both first direction and second direction. The gate structure includes a gate electrode. Source/drain regions are disposed over second region of nanowire structure, the second region being located on opposing sides of gate structure. The gate electrode wraps around each nanowire. When viewed in cross section taken along third direction, each nanowire in nanowire structure is differently shaped from other nanowires, and each nanowire has substantially same cross-sectional area as other nanowires in nanowire structure.
US09691839B2	Metal-insulator-metal (MIM) capacitor with insulator stack having a plurality of metal oxide layers Metal-insulator-metal (MIM) capacitors with insulator stacks having a plurality of metal oxide layers are described. For example, a MIM capacitor for a semiconductor device includes a trench disposed in a dielectric layer disposed above a substrate. A first metal plate is disposed along the bottom and sidewalls of the trench. An insulator stack is disposed above and conformal with the first metal plate. The insulator stack includes a first metal oxide layer having a first dielectric constant and a second metal oxide layer having a second dielectric constant. The first dielectric constant is higher than the second dielectric constant. The MIM capacitor also includes a second metal plate disposed above and conformal with the insulator stack.
US09691837B2	Organic light emitting diode display reducing parasitic capacitance An organic light emitting diode display includes a plurality of pixels. At least one pixel is connected to a scan line receive a scan signal, a data line to receive a data signal, and voltage line to receive a driving voltage. The at least one pixel includes a switching transistor including a switching drain electrode to output the data voltage, a driving transistor including a driving source electrode connected to the switching drain electrode, and an organic light emitting diode connected to a driving drain electrode of the driving transistor. The driving source electrode is separated from the data line.
US09691830B2	Organic electroluminescent display panel, its manufacturing method and display device An organic electroluminescent display panel, its manufacturing method and a display device are disclosed. In the organic electroluminescent display panel, a pixel definition layer provided therein has opening regions corresponding to pixel areas in the OLED, and each of the opening regions has an opening larger than a bottom surface of the opening region (300). An upper surface (a) of the pixel definition layer is formed from a hydrophobic material, and an inclination surface (b) of the pixel definition layer corresponding to each of the opening regions is formed from a hydrophilic material. The above OLED can assure the uniformity of the film layers formed after the pixel definition layer can be guaranteed to improve the light emitting performance of the OLED.
US09691828B2	Display apparatus having thin films including nanoparticles The invention provides a display apparatus and a method for manufacturing the same, relates to the field of display technology, and solves the problem of low display luminance due to the existing display apparatus being affected by other film layers. A display apparatus comprises a light emitting unit and further comprises several layers of thin film located in the light emission path of the light emitting unit, and at least one of the several layers of thin film has nanoparticles.
US09691827B2	Display device According to an aspect, a display device includes a display unit in which a plurality of pixels are arranged in a matrix along two directions intersecting with each other. Each of the pixels includes three sub-pixels corresponding to three of four colors including a first color, a second color, a third color, and a fourth color. An area of one sub-pixel among the three sub-pixels is larger than the area of each of the other two sub-pixels. A sub-pixel of the fourth color is one of the other two sub-pixels. Pixels each including the sub-pixel of the fourth color are not adjacent to each other in at least one of the two directions in the display unit.
US09691825B2	Light-emitting element, light-emitting device, electronic device, and lighting device including semi-transmissive and semi-reflective electrodes Provided is a light-emitting device which can emit monochromatic lights with high color purity due to a microcavity effect and which can provide a white light with a broad spectrum when the monochromatic lights are combined. The light-emitting device has a red-, green-, blue-, and yellow-emissive light-emitting elements each of which has a reflective electrode and a semi-transmissive and semi-reflective electrode. The red-, green-, blue-, and yellow-emissive light-emitting elements have the same structure other than the reflective electrode and a layer in contact with the reflective electrode to selectively emit red, green, blue, and yellow lights, respectively. Red, green, and blue color filters are also provided over the red-, green-, blue-, light-emitting elements, respectively. An EL layer is commonly shared by the red-, green-, blue-, and yellow-emissive light-emitting elements, and the semi-transmissive and semi-reflective electrode covers an edge portion of the EL layer.
US09691824B2	OLED panel, manufacturing method thereof and display device The present invention provides an OLED panel, a manufacturing method thereof and a display device. The OLED panel includes a substrate, an OLED light emitting unit that is provided on the substrate and a cover plate that is provided above the OLED light emitting unit, wherein a frit is provided in an area between the cover plate and the substrate corresponding to and surrounding a periphery of the light emitting unit, the frit being used for bonding the cover plate and the substrate together so as to hermetically package the OLED light emitting unit, and a supplementary packaging structure is further provided in an area between the cover plate and the substrate corresponding to a periphery of the frit, the supplementary packaging structure being used for assisting the frit to package the OLED light emitting unit and support the cover plate and the substrate.
US09691823B2	Image sensors and electronic devices including the same Image sensors, and electronic devices including the image sensors, include a first photoelectronic device including at least one of a blue photoelectronic device sensing light in a blue wavelength region, a red photoelectronic device sensing light in a red wavelength region, and a green photoelectronic device sensing light in a green wavelength region, and a second photoelectronic device stacked on one side of the first photoelectronic device without being interposed by a color filter, wherein the second photoelectronic device senses light in an infrared region.
US09691822B2	Organic light emitting diode display and manufacturing method thereof An organic light emitting diode display including: a substrate; a plurality of first signal lines on the substrate extending in a first direction; a first insulating layer covering the substrate and the first signal lines; a plurality of auxiliary signal lines formed on the first insulating layer and overlapping the first signal lines; a second insulating layer covering the auxiliary signal lines; a plurality of first signal line connecting members formed on the second insulating layer while overlapping parts of the auxiliary signal lines; a plurality of second signal lines crossing the first signal lines; a plurality of switching transistors and a plurality of driving transistors connected with the first signal lines and the second signal lines; and a plurality of organic light emitting diodes electrically connected to the driving transistors, where the first signal line connecting members connect the first signal lines to the auxiliary signal lines.
US09691821B2	Vertical cross-point arrays for ultra-high-density memory applications An ultra-high-density vertical cross-point array comprises a plurality of horizontal line layers having horizontal lines interleaved with a plurality of vertical lines arranged in rows and columns. The vertical lines are interleaved with the horizontal lines such that a row of vertical lines is positioned between each consecutive pair of horizontal lines in each horizontal line layer. Each vertical line comprises a center conductor surrounded by a single or multi-layered memory film. Accordingly, when interleaved with the horizontal lines, two-terminal memory cells are integrally formed between the center conductor of each vertical line and each crossing horizontal line. By configuring the vertical and horizontal lines so that a row of vertical lines is positioned between each consecutive pair of horizontal lines, a unit memory cell footprint of just 2F2 may be realized.
US09691820B2	Block architecture for vertical memory array Three-dimensional memory structures that are configured to use area efficiently, and methods for providing three-dimensional memory structures that use area efficiently are provided. The vertical memory structure can include a number of bit line bits that is greater than a number of word line bits. In addition, the ratio of bit line bits to word line bits can be equal to a ratio of a first side a memory cell included in a memory array of the memory structure to a dimension of a second side of the memory cell.
US09691818B2	Three dimensional semiconductor device having lateral channel A 3D semiconductor device and a method of manufacturing the same are provided. The 3D semiconductor device includes a semiconductor substrate, an active line formed on the insulating layer, including a source region, a drain region and a channel region positioned between the source region and the drain region, a gate electrode located on a portion of the active line, corresponding to a region between the source region and the drain region, and extending to a direction substantially perpendicular to the active line, and a line-shaped common source node formed to be electrically coupled to the source region and extending substantially in parallel to the gate electrode in a space between gate electrodes. The source region and the drain region of the active line are formed of a first material and the channel region of the active line is formed of a second material being different from the first material.
US09691816B2	Magnetic memory devices Magnetic memory devices are provided. A magnetic memory device includes a Magnetic Tunnel Junction (MTJ) structure on a contact. Moreover, the magnetic memory device includes an insulating structure and an electrode between the MTJ structure and the contact. In some embodiments, a first contact area of the electrode with the MTJ structure is smaller than a second contact area of the insulating structure with the MTJ structure.
US09691810B1	Curved image sensor An image sensor includes a plurality of photodiodes arranged in an array and disposed in a semiconductor material with pinning wells disposed between individual photodiodes in the plurality of photodiodes. The image sensor also includes a microlens layer. The microlens layer is disposed proximate to the semiconductor material and is optically aligned with the plurality of photodiodes. A spacer layer disposed between the semiconductor material and the microlens layer. The spacer layer has a concave cross-sectional profile across the array, and the microlens layer is conformal with the concave cross-sectional profile of the spacer layer.
US09691807B2	CMOS image sensor structure A semiconductor device includes a substrate, a logic gate structure, a photosensitive gate structure, a hard mask layer, a first spacer, a first source, a first drain, a second spacer, a second source and a second drain. The logic gate structure and the photosensitive gate structure are disposed on a surface of the substrate. The hard mask layer covers the logic gate structure, the photosensitive gate structure and the surface of the substrate. The first spacer overlies the hard mask layer conformal to a sidewall of the logic gate structure. The first source and drain are respectively disposed in the substrate at two opposite sides of the logic gate structure. The second spacer overlies the hard mask layer conformal to a sidewall of the photosensitive gate structure. The second source and drain are respectively disposed in the substrate at two opposite sides of the photosensitive gate structure.
US09691800B2	Image sensor and electronic device having the same An image sensor includes a substrate including photoelectric conversion elements for a plurality of unit pixels, which are two-dimensionally arranged in a pixel array; a light transmission member on the substrate; a grid structure in the light transmission member and having multiple layers; and a light collection member on the light transmission member, wherein the grid structure is tilted for respective chief ray angles of the plurality of unit pixels according to locations of the plurality of unit pixels in the pixel array.
US09691799B2	Thin film transistor substrate and display using the same The present disclosure relates to a thin film transistor substrate having two different types of thin film transistors on the same substrate, and a display using the same. A display includes a first thin film transistor including a polycrystalline semiconductor layer, a first gate electrode on the polycrystalline semiconductor layer, a first source electrode, and a first drain electrode; a second thin film transistor including a second gate electrode, an oxide semiconductor layer on the second gate electrode, a second source electrode, and a second drain electrode; and an intermediate insulating layer including a nitride layer and an oxide layer on the nitride layer, the intermediate insulating layer disposed on the first gate electrode and the second gate electrode and under the oxide semiconductor layer.
US09691797B2	Display device A display device according to one aspect of the present invention includes a plurality of scanning lines (10a) and a plurality of signal lines (11a); a plurality of pixel thin-film transistors; a common scanning interconnect (10b); and a plurality of protective diodes (6) (protective elements). At least a part of a plurality of connecting interconnects that electrically connect the common scanning interconnect with the plurality of protective diodes are constituted by connecting interconnects (11e) on the same layer as the signal lines. The surface area of overlapping parts between a plurality of semiconductor layers of thin-film transistors and the scanning lines and the surface area overlapping parts between the plurality of semiconductor layers and the common scanning interconnect are substantially equal.
US09691795B2	Display apparatus and manufacturing method thereof An exemplary embodiment of the described technology relates generally to a display apparatus including a plurality of pixels and corresponding to one area of a substrate for displaying an image, and a pad area corresponding to another area of the substrate, the pad area including a lower electrode configured to transmit an electric signal to the pixels, and a plurality of pad electrodes electrically connecting the lower electrode and a driving chip, wherein each of the pad electrodes includes a first contact surface for contacting the lower electrode, a second contact surface for contacting the driving chip, and an oxide layer on a surface of the pad electrode that is exposed to the outside, and that connects the first contact surface and the second contact surface.
US09691786B1	Semiconductor memory device A semiconductor memory device according to an embodiment includes: a first semiconductor layer; and a memory cell array on the first semiconductor layer, the memory cell array including a source line, a second semiconductor layer, and a conductive layer, those are sequentially disposed in a first direction and the memory cell array further including a third semiconductor layer which is columnar and extends in the first direction and a charge accumulation film disposed between the conductive layer and the third semiconductor layer, wherein the second semiconductor layer includes a first impurity region of a first conductivity type disposed at a position of the third semiconductor layer as viewed from the first direction and a second impurity region adjacent to the first impurity region which has a second conductivity type different from the first conductivity type.
US09691781B1	Vertical resistor in 3D memory device with two-tier stack A vertical, columnar resistor in a semiconductor device is provided, along with techniques for fabricating such a resistor. The resistor may be provided in a peripheral area of a 3D memory device which has a two-tier or other multi-tier stack of memory cells. The structure and fabrication of the resistor can be integrated with the structure and fabrication of the stack of memory cells. The resistor may comprise doped polysilicon. In an example implementation, a polysilicon pillar extends a height of a first tier of the stack and a metal pillar above the polysilicon pillar extends a height of a second tier of the stack.
US09691780B2	Interdigitated capacitor in split-gate flash technology The present disclosure relates to an inter-digitated capacitor that can be formed along with split-gate flash memory cells and that provides for a high capacitance per unit area, and a method of formation. In some embodiments, the inter-digitated capacitor has a well region disposed within an upper surface of a semiconductor substrate. A plurality of trenches vertically extend from the upper surface of the semiconductor substrate to positions within the well region. Lower electrodes are arranged within the plurality of trenches. The lower electrodes are separated from the well region by a charge trapping dielectric layer arranged along inner-surfaces of the plurality of trenches. A plurality of upper electrodes are arranged over the semiconductor substrate at locations laterally separated from the lower electrodes by the charge trapping dielectric layer and vertically separated from the well region by a first dielectric layer.
US09691778B2	Multiheight contact via structures for a multilevel interconnect structure Contact openings extending to sacrificial layers located at different depths can be formed by sequentially exposing a greater number of openings in a mask layer by iterative alternation of trimming of a slimming layer over the mask layer and an anisotropic etch that recesses pre-existing contact openings by one level. In one embodiment, pairs of an electrically conductive via contact and electrically conductive electrodes can be simultaneously formed as integrated line and via structures. In another embodiment, encapsulated unfilled cavities can be formed in the contact openings by non-conformal deposition of a material layer, electrically conductive electrodes can be formed by replacement of portions of the sacrificial layers, and the electrically conductive via contacts can be subsequently formed on the electrically conductive electrodes. Electrically conductive via contacts extending to electrically conductive electrodes located at different level can be provided with self-aligned insulating liner.
US09691769B2	Memory device having buried gate and method of fabricating the same A memory device includes a substrate including active areas and isolation areas, trenches in the isolation areas, active patterns in the active areas, the active patterns protruding from the substrate, isolation layers filling the trenches, gate trenches crossing the active patterns and the isolation layers, and gate line stacks filling the gate trenches, a first width of the gate trench in the isolation layer being greater than a second width of the gate trench in the active pattern.
US09691768B2	Nanowire or 2D material strips interconnects in an integrated circuit cell An integrated circuit design tool includes a cell library. The cell library includes entries for a plurality of cells, entries in the cell library including specifications of particular cells in a computer executable language. At least one entry in the cell library can comprise a specification of physical structures and timing parameters of a circuit including a first transistor, a second transistor, and an interconnect connecting a terminal of the first transistor to a terminal of the second transistor, the interconnect comprising one or more nanowires or 2D material strips arranged in parallel. An integrated circuit including the circuit is described.
US09691767B2	Semiconductor device and manufacturing method of semiconductor device A manufacturing method of a semiconductor device according to a disclosed embodiment includes: implanting a first impurity into a first region of a semiconductor substrate, forming a semiconductor layer on the semiconductor substrate, forming a trench in the semiconductor layer and the semiconductor substrate, forming an isolation insulating film in the trench, implanting a second impurity into a second region of the semiconductor layer, forming a first gate insulating film and a first gate electrode in the first region, forming a second gate insulating film and a second gate electrode in the second region, forming a first source region and a first drain region at both sides of the first gate electrode, and forming a second source region and a second drain region at both sides of the second gate electrode.
US09691764B2	FinFET cell architecture with power traces A finFET block architecture suitable for use of a standard cell library, is based on an arrangement including a first set of semiconductor fins in a first region of the substrate having a first conductivity type, and a second set of semiconductor fins in a second region of the substrate, the second region having a second conductivity type. A patterned gate conductor layer including gate traces in the first and second regions, arranged over channel regions of the first and second sets of semiconductor fins is used for transistor gates. Patterned conductor layers over the gate conductor layer are arranged in orthogonal layout patterns, and can include a plurality of floating power buses over the fins in the first and second regions.
US09691759B2	Semiconductor device including semiconductor substrate, silicon carbide semiconductor layer, unit cells, source, and gate A semiconductor device includes a first silicon carbide semiconductor layer, a source including a source pad and a source wiring, a gate including a gate pad and a gate wiring, first unit cells disposed in a first element region, and second unit cells disposed in a second element region. In a plan view, the first and second element regions are adjacent to each other with the gate wiring between the first and second element regions. A first electrode including the gate electrode of each first unit cell is disposed in the first element region and electrically connected to the gate. A second electrode including the gate electrode of each second unit cell is disposed in the second element region and not electrically connected to the gate. The first and second electrodes are separated below the gate wiring.
US09691749B2	Exclusion zone for stress-sensitive circuit design A semiconductor structure less affected by stress and a method for forming the same are provided. The semiconductor structure includes a semiconductor chip. Stress-sensitive circuits are substantially excluded out of an exclusion zone to reduce the effects of the stress to the stress-sensitive circuits. The stress-sensitive circuits include analog circuits. The exclusion zone preferably includes corner regions of the semiconductor chip, wherein the corner regions preferably have a diagonal length of less than about one percent of the diagonal length of the semiconductor chip. The stress-sensitive analog circuits preferably include devices having channel lengths less than about five times the minimum channel length.
US09691747B1	Manufacture of wafer—panel die package assembly technology Disclosed is a process, structure, equipment and apparatus directed to a low cost, high volume approach for the assembly of ultra small die to three-dimensional (3D) or 2.5D semiconductor packages.
US09691746B2	Methods of manufacturing stacked semiconductor die assemblies with high efficiency thermal paths Method for packaging a semiconductor die assemblies. In one embodiment, a method is directed to packaging a semiconductor die assembly having a first die and a plurality of second dies arranged in a stack over the first die, wherein the first die has a peripheral region extending laterally outward from the stack of second dies. The method can comprise coupling a thermal transfer structure to the peripheral region of the first die and flowing an underfill material between the second dies. The underfill material is flowed after coupling the thermal transfer structure to the peripheral region of the first die such that the thermal transfer structure limits lateral flow of the underfill material.
US09691741B2	Method for producing optoelectronic semiconductor components and optoelectronic semiconductor component A method for producing optoelectronic semiconductor components and an optoelectronic semiconductor component are disclosed. In an embodiment the method includes: A) creating a blank by pultrusion from a glass melt, B) shaping the blank into a billet-shaped optical element with a longitudinal axis, the optical element having a mounting side and a light outlet side, C) producing conductor tracks on the mounting side, D) mounting a plurality of optoelectronic semiconductor chips on the mounting side of the optical element and connecting them to the conductor tracks and E) separating the optical element into the optoelectronic semiconductor components, wherein each optoelectronic semiconductor component comprises at least two of the semiconductor chips, and wherein at least steps A) to D) are performed in the stated sequence.
US09691739B2	Semiconductor device and method of manufacturing same In a semiconductor device in which a plurality of semiconductor chips are stacked, performance is enhanced without deteriorating productivity. The semiconductor device has a first semiconductor substrate having a first surface and a second surface opposite the first surface, a first insulating film formed on the first surface, a first hole formed in the first insulating film and partially extending into the first semiconductor substrate, a second hole formed in the second surface, a first electrode entirely filling the first hole, and a conductive film conformally formed in the second hole. The conductive film is electrically connected to a bottom surface of the first electrode and leaves a third hole in the first semiconductor substrate open. The third hole is configured to receive a second electrode of a second semiconductor substrate.
US09691738B2	Bonding package components through plating A method includes aligning a first electrical connector of a first package component to a second electrical connector of a second package component. With the first electrical connector aligned to the second electrical connector, a metal layer is plated on the first and the second electrical connectors. The metal layer bonds the first electrical connector to the second electrical connector.
US09691734B1	Method of forming a plurality of electronic component packages A method of forming a plurality of electronic component packages includes attaching electronic components to a carrier, wherein high aspect ratio spaces exist between the electronic components. A dielectric sheet is laminated around the electronic components thus filling the spaces and forming a package body. The spaces are completely and reliably filled by the dielectric sheet and thus the package body has an absence of voids. Further, an upper surface of the package body is planar, i.e., has an absence of ripples or other non-uniformities. Further, lamination of the dielectric sheet is performed with a low cost lamination system.
US09691732B2	Semiconductor package with elastic coupler and related methods A semiconductor package includes: a die coupled to a substrate; a housing coupled to the substrate and at least partially enclosing the die within a cavity of the housing, and; a pin fixedly coupled to the housing and electrically coupled with the die. The pin includes a reversibly elastically deformable lower portion, which in implementations includes a spring, configured to compress to prevent a lower end of the pin from lowering beyond a predetermined point relative to the substrate when the housing is lowered to be coupled to the substrate. The pin is fixedly coupled in a top of the housing and is configured to be coupled with the substrate by lowering the housing towards the substrate. In implementations the pin includes two rigid portions coupled together only with a coil spring, the spring biasing the rigid portions away from one another when the housing is lowered towards the substrate.
US09691731B2	Package-on-package assembly with wire bonds to encapsulation surface A method of making a microelectronic package includes forming a dielectric encapsulation layer on an in-process unit having a substrate having a first surface and a second surface remote therefrom. A microelectronic element is mounted to the first surface of the substrate, and a plurality of conductive elements exposed at the first surface, at least some of which are electrically connected to the microelectronic element. Wire bonds have bases joined to the conductive elements and end surfaces remote from the bases and define an edge surface extending away between the base and the end surface. The encapsulation layer is formed to at least partially cover the first surface and portions of the wire bonds with unencapsulated portions of the wire bonds being defined by at least one of the end surface or a portion of the edge surface that is uncovered thereby.
US09691725B2	Integrated semiconductor device and wafer level method of fabricating the same The present disclosure provides one embodiment of a stacked semiconductor device. The stacked semiconductor device includes a first substrate; a first bond pad over the first substrate; a second substrate including a second electrical device fabricated thereon; a second bond pad over the second electrical device over the second substrate, the second bond pad electrically connecting to the second electrical device; a second insulation layer over the second bond pad having a top surface, the second insulation layer being bonded toward the first bond pad of the first substrate; and a through-substrate-via (“TSV”) extending from a surface opposite to the first bond pad through the first substrate and through the top surface of the second insulation layer to the second bond pad.
US09691722B2	Surface mount high-frequency circuit A surface mount high-frequency circuit is configured such that a plurality of ground pads 41 and a plurality of external connection ground conductors 51 are discretely disposed to surround a signal line pad 42 and an external connection signal line conductor 52, and a plurality of interlayer connection ground conductors 31 and that a plurality of columnar ground conductors 12 are discretely disposed to surround an interlayer connection signal line conductor 32. Thus, it is possible to suppress radiation of an unnecessary signal to the outside using a simple production process that is completed by only a wafer process without separately preparing a component such as a shield cover case.
US09691717B2	Fabricating process for package substrate A core substrate is prepared first, a bottom redistribution layer RDL1 is formed. Any warpage of the RDL1 is suppressed by the core substrate. In a later process, warpage is further suppressed by a molding compound encapsulating the core substrate. A plurality of metal pillars are formed passing through the core substrate longitudinally; a top redistribution layer RDL2 is then formed on a top surface of the metal pillars.
US09691708B1	Semiconductor package and manufacturing method thereof A semiconductor package and a manufacturing method for the semiconductor package are provided. The semiconductor package includes a molded semiconductor device, a first redistribution layer, a second redistribution layer, and a plurality of through interlayer vias. The molded semiconductor device includes a die. The first redistribution layer is disposed on a first side of the molded semiconductor device. The second redistribution layer is disposed on a second side of the molded semiconductor device opposite to the first side, wherein the second redistribution layer includes a patterned metal layer having an interconnection circuit portion electrically connected to the die and a metal ring surrounding and insulated from the interconnection circuit portion. The through interlayer vias are located right under the metal ring and extending through the molded semiconductor device to be electrically connect the first redistribution layer and the second redistribution layer.
US09691707B2	Semiconductor device and method of forming 3D dual side die embedded build-up semiconductor package A semiconductor device has a plurality of semiconductor die. A substrate is provided with bumps disposed over the substrate. A first prefabricated insulating film is disposed between the semiconductor die and substrate. An interconnect structure is formed over the semiconductor die and first prefabricated insulating film. The bumps include a copper core encapsulated within copper plating. The first prefabricated insulating film includes glass cloth, glass fiber, or glass fillers. The substrate includes a conductive layer formed in the substrate and coupled to the bumps. The semiconductor die is disposed between the bumps of the substrate. The bumps and the semiconductor die are embedded within the first prefabricated insulating film. A portion of the first prefabricated insulating film is removed to expose the bumps. The bumps electrically connect the substrate to the interconnect structure.
US09691705B2	Ultrathin superlattice of MnO/Mn/MnN and other metal oxide/metal/metal nitride liners and caps for copper low dielectric constant interconnects An electrical device including an opening in a low-k dielectric material, and a copper including structure present within the opening for transmitting electrical current. A liner is present between the opening and the copper including structure. The liner includes a superlattice structure comprised of a metal oxide layer, a metal layer present on the metal oxide layer, and a metal nitride layer that is present on the metal layer. A first layer of the superlattice structure that is in direct contact with the low-k dielectric material is one of said metal oxide layer and a final layer of the superlattice structure that is in direct contact with the copper including structure is one of the metal nitride layers.
US09691703B2	Bond pad structure with dual passivation layers A bond pad structure with dual passivation layers is disclosed. The bond pad structure includes: a pad material layer on a first passivation layer; a protection layer on the top surface of the pad material layer; a second passivation layer covering on the first passivation layer and the protection layer; and an opening formed through the second passivation layer and the protection layer to expose the pad material layer.
US09691702B2	Microelectronic components with features wrapping around protrusions of conductive vias protruding from through-holes passing through substrates In a microelectronic component having conductive vias (114) passing through a substrate (104) and protruding above the substrate, conductive features (120E.A, 120E.B) are provided above the substrate that wrap around the conductive vias' protrusions (114′) to form capacitors, electromagnetic shields, and possibly other elements. Other features and embodiments are also provided.
US09691699B2	Circuit structure and method for manufacturing the same A method for manufacturing a circuit structure is described as follows. Two patterned circuit layers are formed on a core layer. The patterned circuit layers are located on two opposite surfaces of the core layer. A patterned insulating layer is respectively formed on each of the patterned circuit layers. The patterned insulating layers respectively expose a portion of the patterned circuit layers. The core layer is removed so as to expose an upper surface of each of the patterned circuit layers and a top surface of each of the patterned insulating layers. The upper surface of each of the patterned circuit layers is aligned with the top surface of each of the patterned insulating layers.
US09691696B2	Interposers with circuit modules encapsulated by moldable material in a cavity, and methods of fabrication Stacked dies (110) are encapsulated in an interposer's cavity (304) by multiple encapsulant layers (524) formed of moldable material. Conductive paths (520, 620.3) connect the dies to the cavity's bottom wall (304B) and, through TSVs passing through the bottom wall, to a conductor below the interposer. The conductive paths can be formed in segments each of which is formed in a through-hole (514) in a respective encapsulant layer. Each segment can be formed by electroplating onto a lower segment; the electroplating current can be provided from below the interposer through the TSVs and earlier formed segments. Other features are also provided.
US09691694B2	Substrate comprising stacks of interconnects, interconnect on solder resist layer and interconnect on side portion of substrate An integrated circuit device that includes a package substrate and a die coupled to the package substrate. The package substrate includes at least one dielectric layer, a first stack of first interconnects in the at least one dielectric layer, and a second interconnect formed on at least one side portion of the at least one dielectric layer. The first stack of first interconnects is configured to provide a first electrical path for a non-ground reference signal, where the first stack of first interconnects is located along at least one side of the package substrate. The second interconnect is configured to provide a second electrical path for a ground reference signal.
US09691684B2	Integrated circuit device including through-silicon via structure and decoupling capacitor and method of manufacturing the same An integrated circuit device is provided which includes a through-silicon via (TSV) structure and one or more decoupling capacitors, along with a method of manufacturing the same. The integrated circuit device may include a semiconductor structure including a semiconductor substrate, a TSV structure passing through the semiconductor substrate, and a decoupling capacitor formed in the semiconductor substrate and connected to the TSV structure. The TSV structure and the one or more decoupling capacitors may be substantially simultaneously formed. A plurality of decoupling capacitors may be disposed within a keep out zone (KOZ) of the TSV structure. The plurality of decoupling capacitors may have the same or different widths and/or depths. An isopotential conductive layer may be formed to reduce or eliminate a potential difference between different parts of the TSV structure.
US09691682B2	Optoelectronic semiconductor component having an electrically insulating element An optoelectronic semiconductor component includes an optoelectronic thin-film chip; and a thermally conductive and electrically insulating element, wherein both the thin-film chip and the element are embedded in a molded body, a top surface of the thin-film chip and a bottom surface of the element are not covered by the molded body, the top surface of the thin-film chip is approximately flush with a top surface of the molded body, the bottom surface of the element is approximately flush with a bottom surface of the molded body, the molded body includes a first embedded conductor structure and a second embedded conductor structure, and the first conductor structure and the second conductor structure extends to the bottom surface of the molded body.
US09691681B2	Laser drilling encapsulated semiconductor die to expose electrical connection therein A method of making an integrated circuit package that contains a semiconductor die having one or more electrical connections to an electronic circuit within the semiconductor die. The method may include: encapsulating the semiconductor die and its electrical connections in non-electrically conductive, encapsulation material; laser drilling the encapsulation material to expose one of the electrical connections within the integrated circuit package, thereby creating a via opening in an external surface of the encapsulation material to the electrical connection; and electroplating or sputtering over the via opening in the encapsulation material to create a conductive routing layer from the exterior surface of the encapsulation material to the electrical connection.
US09691680B2	Structured substrate A structured substrate configured for epitaxial growth of a semiconductor layer thereon is provided. Structures can be formed on a side of the structured substrate opposite that of the growth surface for the semiconductor layer. The structures can include cavities and/or pillars, which can be patterned, randomly distributed, and/or the like. The structures can be configured to modify one or more properties of the substrate material such that growth of a higher quality semiconductor layer can be obtained.
US09691676B2	Semiconductor device and method for manufacturing the same A semiconductor device includes a first semiconductor chip including a first surface and a plurality of first electrodes disposed on the first surface; a second semiconductor chip including a second surface which faces the first surface, a plurality of second electrodes each of which includes at least one end disposed on the second surface, and a plurality of first protrusions each of which surrounds the one end of each of the second electrodes on an electrode by electrode basis; a plurality of conductive joint materials each of which joins a third electrode included in the first electrodes to the one end of an electrode which faces the third electrode among the second electrodes; and a plurality of first underfill resins each of which is disposed inside one of the first protrusions and covers one of the conductive joint materials on a material by material basis.
US09691675B1	Method for forming an electrical device and electrical devices A method for forming an electrical device includes attaching a semiconductor die on a carrier. The method further includes dispensing a fillet material at at least one edge of the semiconductor die arranged on the carrier. The method further includes dispensing an underfill material into a gap between the semiconductor die and the carrier after dispensing the fillet material.
US09691672B1	Integrated circuit containing standard logic cells and library-compatible, NCEM-enabled fill cells, including at least via-open-configured, GATE-short-configured, GATECNT-short-configured, and metal-short-configured, NCEM-enabled fill cells An IC includes logic cells, selected from a standard cell library, and fill cells, configured for compatibility with the standard logic cells. The fill cells contain structures configured to obtain in-line data via non-contact electrical measurements (“NCEM”). The IC includes such NCEM-enabled fill cells configured to enable detection and/or measurement of a variety of open-circuit and short-circuit failure modes, including at least one via-open-related failure mode, one GATE-short-related failure mode, one GATECNT-short-related failure mode, and one metal-short-related failure mode.
US09691671B2	Test key array The present invention provides a test key array including a lower conductive pattern, and the lower conductive pattern includes a plurality of first L-shaped traces parallel to each other, an upper conductive pattern, where the upper conductive pattern includes a plurality of second L-shaped traces parallel to each other, the lower conductive pattern crosses to the upper conductive pattern, and a plurality of cross regions are defined between the lower conductive pattern and the upper conductive pattern, and a plurality of conductive plugs, disposed on parts of the cross regions, electrically connecting to the lower conductive pattern and the upper conductive pattern.
US09691670B2	Manufacturing method of array substrate An embodiment of the present invention provides a manufacturing method of an array substrate comprising forming a gate detecting pattern on the array substrate with gate lines and common electrode lines formed thereon, the gate detecting pattern being arranged on one side of a pixel region of the array substrate and used to connect all the common electrode lines for pixel units; and performing a short circuit or a open circuit detection, wherein if the difference between a signal received by a receiving terminal for a gate line and a signal transmitted from a transmitting terminal for the gate line is larger than a predetermined detection threshold value, it is determined that short circuit between the gate line and a common electrode line or open circuit in the gate line occurs.
US09691668B2	Wafer carrier A wafer carrier comprises a supporting body having an opening therein, wherein said opening in said supporting body has a concave sidewall and a bottom surface in said supporting body which is curved in cross section; a plurality of vertical supporting rods configured to support and contact a wafer received in said opening and to displace said wafer from the bottom surface of the opening in said supporting body; wherein one of said supporting rods has an end for contacting and supporting said wafer; and wherein when viewing from a top view of the wafer carrier, one of said supporting rods has a base lining on the concave sidewall of said opening in said supporting body, a first concave side opposite to the base and two second concave sides connecting the base and the first concave side.
US09691666B2	Layout architecture for performance improvement An integrated circuit is provided. The integrated circuit includes a first contact disposed over a first source/drain region, a second contact disposed over a second source/drain region, a polysilicon disposed over a gate, the polysilicon interposed between the first contact and the second contact, a first polysilicon contact bridging the polysilicon and the first contact within an active region, and an output structure electrically coupled to the first polysilicon contact.
US09691665B2	Semiconductor structure with self-aligned spacers and method of fabricating the same A method of fabricating a semiconductor with self-aligned spacer includes providing a substrate. At least two gate structures are disposed on the substrate. The substrate between two gate structures is exposed. A silicon oxide layer is formed to cover the exposed substrate. A nitride-containing material layer covers each gate structure and silicon oxide layer. Later, the nitride-containing material layer is etched to form a first self-aligned spacer on a sidewall of each gate structure and part of the silicon oxide layer is exposed, wherein the sidewalls are opposed to each other. Then, the exposed silicon oxide layer is removed to form a second self-aligned spacer. The first self-aligned spacer and the second self-aligned spacer cooperatively define a recess on the substrate. Finally, a contact plug is formed in the recess.
US09691664B1	Dual thick EG oxide integration under aggressive SG fin pitch A method of forming a thick oxide layer over fins for EG devices and a thinner oxide layer over fins for SG devices on the same substrate and the resulting device are provided. Embodiments include forming a first set of fins over a first portion of a Si substrate; forming a second set of fins over a second portion of the Si substrate spaced from the first portion; forming an iRAD SiO2 layer over the first and second sets of fins; forming a polysilicon layer over the iRAD SiO2 layer over the first set of fins; forming a radical SiO2 layer over the iRAD SiO2 layer over the second set of fins and over the polysilicon layer; forming a mask over the radical SiO2 layer over the second set of fins; removing the polysilicon layer; and removing the mask and the iRAD SiO2 layer from the first set of fins.
US09691662B2	Field effect transistors having multiple effective work functions Selective deposition of a silicon-germanium surface layer on semiconductor surfaces can be employed to provide two types of channel regions for field effect transistors. Anneal of an adjustment oxide material on a stack of a silicon-based gate dielectric and a high dielectric constant (high-k) gate dielectric can be employed to form an interfacial adjustment oxide layer contacting a subset of channel regions. Oxygen deficiency can be induced in portions of the high-k dielectric layer overlying the interfacial adjustment oxide layer by deposition of a first work function metallic material layer and a capping layer and a subsequent anneal. Oxygen deficiency can be selectively removed by physically exposing portions of the high-k dielectric layer. A second work function metallic material layer and a gate conductor layer can be deposited and planarized to form gate electrodes that provide multiple effective work functions.
US09691660B2	Method for forming interconnects A method of forming an interconnect composed of metallized lines and vias in a workpiece includes forming metal lines in a workpiece, with the metal lines disposed in longitudinally spaced-apart line segments, the line segments spaced apart from each other end-to-end; and forming vias in a workpiece, wherein at least one end of a first formed metal line constrains one cross-sectional dimension of a second formed via, or wherein at least one end of a first formed via constrains one cross-sectional dimension of a second formed metal line.
US09691657B2	Interconnect wires including relatively low resistivity cores A dielectric layer and a method of forming thereof. An opening defined in a dielectric layer and a wire deposited within the opening, wherein the wire includes a core material surrounded by a jacket material, wherein the jacket material exhibits a first resistivity ρ1 and the core material exhibits a second resistivity ρ2 and ρ2 is less than ρ1.
US09691654B1	Methods and devices for back end of line via formation Back end of line via formation for semiconductor devices and methods of fabricating the semiconductor devices. One method includes, for instance: obtaining a wafer with a substrate and at least one contact in the substrate; depositing at least one lithography stack over the substrate; performing lithography to pattern at least one via opening; depositing a block co-polymer coating over the wafer into the at least one via opening; performing an ashing to remove excess block co-polymer material and form block co-polymer caps; and performing a thermal bake to separate the block co-polymer caps into a first material and a second material. An intermediate semiconductor device is also disclosed.
US09691652B2	Carrier device and ceramic member A ceramic member, in a carrier device, including: a plurality of ceramic layers; a clamping electrode formed on a first ceramic layer among the plurality of ceramic layers and inside of the plurality of ceramic layers, and configured to attract a dielectric material by electrostatic force; an electric heating element formed on a second ceramic layer, which is more distant from a side holding a carried object than the first ceramic layer among the plurality of ceramic layers, and configured to generate heat using electric power; a power feed port; a land formed on a third ceramic layer among the plurality of ceramic layers, and configured to receive electric power through the power feed port; and a via arranged to pass through at least one of the plurality of ceramic layers and provided as a conductive material to electrically connect the electric heating element with the land.
US09691645B2	Bolted wafer chuck thermal management systems and methods for wafer processing systems A workpiece holder includes a puck, first and second heating devices in thermal communication with respective inner and outer portions of the puck, and a thermal sink in thermal communication with the puck. The first and second heating devices are independently controllable, and the first and second heating devices are in greater thermal communication with the puck, than thermal communication of the thermal sink with the puck. A method of controlling temperature distribution of a workpiece includes flowing a heat exchange fluid through a thermal sink to establish a reference temperature to a puck, raising temperatures of radially inner and outer portions of the puck to first and second temperatures greater than the reference temperature, by activating respective first and second heating devices disposed in thermal communication with the radially inner and outer portions of the puck, and placing the workpiece on the puck.
US09691644B2	Supporting unit, substrate treating device including the same, and method of manufacturing the supporting unit Provided is a supporting unit. The supporting unit includes: a supporting plate including a substrate on a top surface thereof; and a heater having a predetermined pattern at a bottom surface of the supporting plate and heating the supporting plate, wherein the heater includes: a first metal plating layer applied on the bottom surface of the supporting plate along the predetermined pattern; an anti-oxidation layer of a conductive material applied on the first metal plating layer along the predetermined pattern; and a second metal plating layer of a conductive material applied on the anti-oxidation layer in a portion of the pattern.
US09691643B2	Etching apparatus An etching apparatus includes a controller configured to control a high frequency power supply to supply a high frequency power to a mounting table for etching a polymer layer formed on a base layer placed on the mounting table, using plasma generated from a predetermined gas supplied from a gas supply source by the high frequency power, the polymer layer having a periodic pattern of a first polymer and a second polymer formed by self-assembling the first polymer and the second polymer of a block copolymer that is capable of being self-assembled, the high frequency power being set for etching the polymer layer using the generated plasma such that the second polymer is removed and a pattern of the first polymer is formed for subsequently etching the base layer using the pattern of the first polymer as a mask.
US09691642B2	Device for measuring undulation of brake disc in railway wheel with brake discs A device for measuring undulation of a brake disc in a railway wheel with brake discs includes a wheel support supporting a hub's bore of the railway wheel; a first displacement gauge for measuring a height displacement of the brake disc frictional surface for one round to follow rotation of the wheel support; and a second displacement gauge for measuring a height displacement of a railway wheel rim surface for one round to follow rotation of the wheel support. A computing unit calculates a difference between maximum and minimum values of the height displacement of the frictional surface by acquiring measurement data from the first displacement gauge, calculates a difference between the maximum and minimum values of the height displacement of the rim's surface by acquiring measurement data from the second displacement gauge, and derives a difference between the both calculated differences as brake disc undulation.
US09691637B2	Method for packaging an integrated circuit device with stress buffer A method of fabricating a plurality of semiconductor devices includes attaching a plurality of integrated circuit (IC) die to a substrate including forming electric connections between contacts on the IC die and contacts on the substrate. After the IC die is attached to the substrate, a first encapsulating material is placed over stress-sensitive areas of the IC die. The first encapsulating material includes thirty percent or less of filler particles greater than a specified size. A second encapsulating material is placed over the first encapsulating material. The second encapsulating material includes sixty percent or more of filler particles.
US09691632B2	Epitaxial wafer and a method of manufacturing thereof An epitaxial wafer comprises a silicon substrate wafer having first and second sides, and a silicon epitaxial layer deposited on the first side, and optionally one or more additional epitaxial layers on top of the silicon epitaxial layer, at least one of the silicon epitaxial layer or at least one of the one or more additional epitaxial layers being doped with nitrogen at a concentration of 1×1016 atoms/cm3 or more and 1×1020 atoms/cm3 or less. The epitaxial wafer is produced by depositing the silicon epitaxial layer and/or at least one of the one or more additional epitaxial layers, at a deposition temperature of 940° C. or less through chemical vapor deposition in the presence of a deposition gas atmosphere containing one or more silicon precursor compounds and one or more nitrogen precursor compounds.
US09691627B2	Methods of forming semiconductor devices using auxiliary layers for trimming margin A method of fabricating a semiconductor device includes forming a linear preliminary mask pattern in a first direction on a substrate. The preliminary mask pattern is patterned to provide a plurality of mask patterns that are aligned end-to-end with one another on the substrate and are separated by an exposed portion of the substrate between respective facing ends of the plurality of mask patterns. An auxiliary layer is formed to cover at least sidewalls of the facing ends to reduce a size of the exposed portion to provide a reduced exposed portion of the substrate and the reduced exposed portion of the substrate is etched to form a trench defining active patterns in the substrate aligned end-to-end with one another.
US09691624B2	Method for manufacturing fin structure Provided is a method for manufacturing a fin structure. The method may include forming an initial fin on a substrate, forming a dielectric layer on the substrate to cover the initial fin, planarizing the dielectric layer by sputtering, and further etching the dielectric layer back to expose a portion of the initial fin, wherein the exposed portion serves as a fin.
US09691623B2	Semiconductor structures having low resistance paths throughout a wafer A semiconductor structure with low resistance conduction paths and methods of manufacture are disclosed. The method includes forming at least one low resistance conduction path on a wafer, and forming an electroplated seed layer in direct contact with the low resistance conduction path.
US09691622B2	Pre-fill wafer cleaning formulation A pre-fill solution for application onto a substrate surface prior to a fill operation is provided, the fill operation defined by application of an electroless deposition solution onto the substrate surface to deposit a metallic material in an etched feature, the substrate surface having metallic contaminants generated from an etch operation that generated the etched feature in the substrate surface, the pre-fill solution effective for preventing the electroless deposition solution from depositing on the metallic contaminants, the pre-fill solution comprising: a surfactant, the surfactant configured to enhance wetting of the substrate surface, the concentration of the surfactant in the solution being approximately in the range of 10 ppm to 2000 ppm, wherein the surfactant is an amphoteric surfactant; oxalic acid dihydrate; and hypophosphorous acid as a pH adjusting agent configured to reduce the pH of the solution to approximately less than 2 during the application onto the substrate surface.
US09691621B2	Silicide region of gate-all-around transistor The disclosure relates to a semiconductor device and methods of forming same. A representative structure for a semiconductor device comprises a substrate; a nanowire structure protruding from the substrate having a channel region disposed between a source region and a drain region; a pair of silicide regions extending into opposite sides of the source region, wherein each of the pair of silicide regions comprise a vertical portion adjacent to the source region and a horizontal portion adjacent to the substrate; and a metal gate surrounding a portion the channel region.
US09691614B2	Methods of forming different sized patterns A method includes forming a template portion to provide a first opening trench portion surrounding a first isolated pattern, and forming an array of pillars on an underlying layer; forming a separation wall layer including first separation wall portions surrounding sidewalls of the pillars, and forming second separation wall portions covering sidewalls of the first opening trench portion; forming a block copolymer layer on the separation wall layer; forming first domains in gaps between the pillars, and forming second domains surrounding and separating the first domains by annealing the block copolymer layer; forming second openings by selectively removing the first domains; forming third openings between the second openings, and forming a fourth opening adjacent to the first isolated pattern by selectively removing the pillars and the template portion; and forming fifth openings, which extend from the second and third openings and penetrate the underlying layer, and forming a sixth opening, which extends from the fourth opening and penetrates the underlying layer.
US09691612B2	Process for preparing graphene on a SiC substrate based on metal film-assisted annealing Provided is a process for preparing graphene on a SiC substrate, based on metal film-assisted annealing, comprising the following steps: subjecting a SiC substrate to a standard cleaning process; placing the cleaned SiC substrate into a quartz tube and heating the quartz tube up to a temperature of 750 to 1150° C.; introducing CCl4vapor into the quartz tube to react with SiC for a period of 20 to 100 minutes so as to generate a double-layered carbon film, wherein the CCl4 vapor is carried by Ar gas; forming a metal film with a thickness of 350 to 600 nm on a Si substrate by electron beam deposition; placing the obtained double-layered carbon film sample onto the metal film; subsequently annealing them in an Ar atmosphere at a temperature of 900 to 1100° C. for 10-30 minutes so as to reconstitute the double-layered carbon film into double-layered graphene; and removing the metal film from the double-layered graphene, thereby obtaining double-layered graphene. Also provided is double-layered graphene prepared by said process.
US09691605B2	Semiconductor device and method of manufacturing semiconductor device A semiconductor device includes a first semiconductor layer made of a nitride semiconductor and formed on a substrate, a second semiconductor layer made of a material including InAlN and formed on the first semiconductor layer, an insulator layer formed by an oxidized surface part of the second semiconductor layer, a gate electrode formed on the insulator layer, and a source electrode and a drain electrode respectively formed on the first or second semiconductor layer.
US09691598B2	Ionizer and mass spectrometer including first section for ionizing sample under atmospheric pressure while vaporizing or desorbing the sample component and second section for generating corona discharge In the ionizer of the present invention, a stream of gas spouted from a nozzle (18) of a DART ionization unit (10) vaporizes and ionizes the components in a sample (25). Gaseous sample-component molecules which have not been ionized by that process are subsequently ionized by a reaction with a reactant ion produced by a corona discharge generated from a needle electrode (20). Such a two-stage ionization of the sample-component molecules improves the ionization efficiency. A needle-electrode support mechanism (21) adjusts the position and/or angle of the needle electrode (20) and thereby controls a potential gradient. Therefore, a specific sample-derived ion species can be efficiently introduced into an ion introduction tube (31) and be detected with a high level of sensitivity.
US09691595B2	Modulation of instrument resolution dependant upon the complexity of a previous scan Systems and methods are used to analyze a sample using variable detection scan resolutions. A tandem mass spectrometer is instructed to perform at least two scans of a sample with different detection scan resolutions using a processor. The tandem mass spectrometer includes a mass analyzer that allows variable detection scan resolutions. The selection of the different detection scan resolutions can be based on one or more properties of sample compounds. The properties may include a sample compound molecular weight distribution that is calculated from a molecular weight distribution of expected compounds or is determined from a list of molecular weights for one or more known compounds. The tandem mass spectrometer can also be instructed to perform an analysis of the sample before instructing the tandem mass spectrometer to perform the at least two scans of the sample.
US09691592B2	Plasma source enhanced with booster chamber and low cost plasma strength sensor A method to improve plasma discharge efficiency by attaching one or more booster chambers to the main discharge chamber is disclosed here. The booster chamber functions as a plasma discharge amplification device for the main discharge chamber. It improves plasma density significantly, especially at pressure below 50 mTorr. Compared with traditional inductively coupled plasma (ICP) source, the strength of the plasma source enhanced with booster chamber has been improved several folds at low pressure conditions. Booster chamber can also be used as a convenient high speed plasma etching and deposition processing chamber for small samples. A method to gauge plasma strength by measuring plasma emission intensity has also been disclosed in this application.
US09691591B2	Plasma processing apparatus The microwave plasma processing apparatus includes a power feeding rod that applies high frequency wave for RF bias, the upper end of which is connected to a susceptor, and the lower end of which is connected to a high frequency output terminal of a matcher in a matching unit; a cylindrical external conductor that encloses around the power feeding rod serving as an internal conductor; and a coaxial line. The coaxial line is installed with a choke mechanism configured to block undesired microwave that enters the line from a plasma producing space in a chamber, and leakage of the microwave to an RF feeding line is prevented in the middle of the line, thereby suppressing the microwave leakage.
US09691586B2	Apparatus of plural charged-particle beams A multi-beam apparatus for observing a sample with high resolution and high throughput is proposed. In the apparatus, a source-conversion unit changes a single electron source into a virtual multi-source array, a primary projection imaging system projects the array to form plural probe spots on the sample, and a condenser lens adjusts the currents of the plural probe spots. In the source-conversion unit, the image-forming means is on the upstream of the beamlet-limit means, and thereby generating less scattered electrons. The image-forming means not only forms the virtual multi-source array, but also compensates the off-axis aberrations of the plurality of probe spots.
US09691584B1	Ion source for enhanced ionization An ion source having improved life is disclosed. In certain embodiments, the ion source is an IHC ion source comprising a chamber, having a plurality of electrically conductive walls, having a cathode which is electrically connected to the walls of the ion source. Electrodes are disposed on one or more walls of the ion source. A bias voltage is applied to at least one of the electrodes, relative to the walls of the chamber. In certain embodiments, fewer positive ions are attracted to the cathode, reducing the amount of sputtering experienced by the cathode. Advantageously, the life of the cathode is improved using this technique. In another embodiment, the ion source comprises a Bernas ion source comprising a chamber having a filament with one lead of the filament connected to the walls of the ion source.
US09691583B2	Imaging and processing for plasma ion source Applicants have found that energetic neutral particles created by a charged exchange interaction between high energy ions and neutral gas molecules reach the sample in a ion beam system using a plasma source. The energetic neutral create secondary electrons away from the beam impact point. Methods to solve the problem include differentially pumped chambers below the plasma source to reduce the opportunity for the ions to interact with gas.
US09691581B2	Fuse arrangement A fuse arrangement includes a first safety fuse and a second safety fuse connected electrically in parallel with each other. The fuse arrangement also includes an end plate mechanically coupled to the first and second safety fuses to form a structural unit so that both safety fuses must be inserted/removed to/from an electrical power distribution installation at the same time. Furthermore, the electrical parallel connection of the two safety fuses, rather than a single relatively larger safety fuse, may allow the maximum current strength of an electrical power distribution installation to be maintained while the current is split between the two safety fuses so the size of the fuse arrangement may be reduced.
US09691579B2	Package MEMS switch and method An electronic device and methods including a switch formed in a chip package are shown. An electronic device and methods including a switch formed in a polymer based dielectric are shown. Examples of switches shown include microelectromechanical system (MEMS) structures, such as cantilever switches and/or shunt switches.
US09691570B1	Modular tactile switch Modular button components are described that comprise a tactile switch coupled to a center portion of the modular button component and at least one electrical contact. A bracket extends beyond a length of the center portion of the modular component. In various embodiments, the tactile switch, the bracket and the at least one electrical contact are insert molded into a single assembly to form the modular button component that is detachably coupled to a printed circuit board.
US09691569B2	Light-transmissible keycap and manufacturing method thereof A light-transmissible keycap and the manufacturing method thereof are provided. The light-transmissible keycap has multiple light-transmissible symbol areas, and each light-transmissible symbol area has at least one character assigned with a color. Each light-transmissible symbol area is covered with only one light-transmissible color layer. Thus, when an external light is emitted from a light source beneath the keycap, the external light will only pass through one light-transmissible color layer covering that light-transmissible symbol area, and not pass through the light-transmissible color layer covering the other light-transmissible symbol area. Therefore, a bleeding problem due to multiple light-transmissible color layers overlapped and covering the same light-transmissible symbol area is avoided.
US09691564B2	Mounting plate A mounting plate is disclosed for supporting a circuit breaker accessory part. In an embodiment, the mounting plate includes a holding device, configured to hold the mounting plate on a wall of a housing of a circuit breaker and a fastening device, configured to fasten the circuit breaker accessory part to the mounting plate.
US09691563B2	Operation unit An operation unit includes an operation part that is provided to be movable up and down along a movement axis, functions as a push-button switch at a first position, and functions as a joystick lever at a second position above the first position in the movement axis direction; and an operation part-detecting part that senses pressing of the operation part when the operation part is at the first position, and senses a direction in which the operation part has inclined when the operation part is at the second position.
US09691562B2	Electric switching device with enhanced Lorentz force bias An electric switch is disclosed. The electric switch has a first terminal, a second terminal, a contact sub-assembly comprising at least two contact members disposed in a current path between the first and second terminals, the contact sub-assembly having a connecting position in which the contact members contact each other and an interrupting position in which the contact members are spaced apart from each other a Lorentz force generator comprising a first conductor member and a second conductor member, and at least one support Lorentz force generator. The Lorentz force generator and the at least one support Lorentz force generator both bias the contact sub-assembly into the connecting position, the current path extending from the first terminal to the second terminal through the contact sub-assembly in the connecting position.
US09691559B2	Circuit breaker A circuit breaker includes: fixed contact points; and a moving contact assembly. The moving contact assembly includes: a shaft; a moving contact that is held in the shaft; and springs that apply torque to the moving contact. The shaft includes: stopping faces that are formed in a direction opposite to the direction in which the moving contact rotates; and guiding faces that are curved from the stopping faces. The moving contact includes: first surfaces that are formed on the radius of rotation of the moving contact; and sliding surfaces that are located at an angle to the first surfaces and slanted toward the center of rotation with respect to the line of action of a tangential force of torque at the points of contact with the guiding faces.
US09691548B2	High-voltage capacitor A high-voltage capacitor includes a gas-tight enclosure containing interleaved electrodes. The dielectric of the capacitor is a pressurized gas at a pressure of at least 6 bar, and preferably 10 or 15 bar. In order to withstand this level of internal pressure, the insulating body section of the capacitor may be formed of a high-strength polymeric material.
US09691545B2	Developing bulk exchange spring magnets A method of making a bulk exchange spring magnet by providing a magnetically soft material, providing a hard magnetic material, and producing a composite of said magnetically soft material and said hard magnetic material to make the bulk exchange spring magnet. The step of producing a composite of magnetically soft material and hard magnetic material is accomplished by electrophoretic deposition of the magnetically soft material and the hard magnetic material to make the bulk exchange spring magnet.
US09691542B2	Inductor and display apparatus including the same An inductor configured to be mounted on a printed circuit board is provided. The inductor includes a drum core including a cylindrical body and first and second flanges extending from opposite ends of the cylindrical body, a coil wound around the cylindrical body, a plurality of pins on which opposite ends of the coil are wound, wherein each of the plurality of pins has one end fixed to the second flange and another end configured to be fixed to the printed circuit board, and at least one projection which protrudes from the second flange and is configured to support the inductor to stand vertically on the printed circuit board.
US09691538B1	Magnetic devices for power converters with light load enhancers A magnetic device includes a magnetic core, one or more first windings, and one or more second windings. Each first winding forms a respective first turn around a respective first winding center axis, and each second winding forms a respective second turn around a common second winding center axis that is orthogonal to each first winding center axis. Another magnetic device includes a magnetic core, a plurality of first windings forming respective first winding turns, and a second winding forming a second winding turn. Each first winding turn is within the second winding turn, as seen when the magnetic device is viewed cross-sectionally in a first direction. Yet another magnetic device includes a magnetic core, one or more first windings, and one or more second windings magnetically isolated from the one or more first windings.
US09691537B2	Power supply module A power supply module is disclosed. the power supply module includes a coil including a coil body and connecting terminals; an electronic component including at least an integrated circuit chip; a magnetic core configured to enclose in and around the coil body, wherein a recess is provided on at least one side surface of the magnetic core, the electronic components are located in the recess, and an opening is provided on at least one side wall of the recess; a connector configured to be tightly attached to and cover the side surface where the recess is provided, and be electrically connected with the coil and the electronic component; and a heat conducting material provided in the recess and configured to cover the electronic component.
US09691535B2	Filter device A filter device is electrically connected between a power supply and a power converter including a converter unit for rectifying inputs and an inverter unit for inversely converting outputs of the converter unit. The filter device includes a casing; a filter reactor housed inside the casing, for removing a high-frequency component; and a booster reactor housed inside the casing and disposed below the filter reactor, for boosting a voltage of a current having passed through the filter reactor. The booster reactor includes an iron core, a coil wound around the iron core, and a spacer interposed between inner and outer circumferential portions of the coil to form an air passage for passing air introduced into the casing. The booster reactor is stored in the casing so that the air that has passed through the air passage passes through a periphery of the filter reactor disposed immediately above the booster reactor.
US09691533B2	Magnetic circuit A magnetic circuit, provided with a short magnet and short magnet that are arranged in an array, and a yoke and a yoke provided so as to sandwich the short magnet and short magnet. The short magnet and short magnet, are arranged, that have a space between them that is a predetermined gap or less in the arrangement direction of the array respectively. In addition, the short magnet and short magnet are arranged so that one magnetic pole is located on the side toward one of the pair of yokes and, and the other magnetic pole is located on the side toward the other yoke.
US09691531B2	Magnet apparatus A magnet apparatus which comprises a first vacuum chamber, a second vacuum chamber, a first magnet disposed within the first vacuum chamber such that the first magnet can be thermally isolated from the exterior of the first vacuum chamber, and a load connector extending from the first vacuum chamber into the second vacuum chamber so that a load on the first magnet can be transferred to the second vacuum chamber, wherein the load connector is in thermal contact with the first magnet and can be thermally isolated from the exterior of the first vacuum chamber and the exterior of the second vacuum chamber.
US09691527B2	Shielding structure and wire harness using conductive resin mold and non-metallic fiber braid A shielding structure includes a conductive resin molded product, and a non-metallic fiber braid which is formed in a tubular shape by using multiple ultrathin strands made of conductive non-metallic fibers. A distal end of the non-metallic fiber braid is welded to the conductive resin molded product in the shielding structure.
US09691526B2	Method for making carbon nanotube composite film A method for making carbon nanotube composite film is provided. An original carbon nanotube film includes carbon nanotubes joined end to end by van der Waals attractive force. The carbon nanotubes substantially extend along a first direction. A patterned carbon nanotube film is formed by patterning the original carbon nanotube film to define at least one row of through holes arranged in the original carbon nanotube film along the first direction. Each row of through holes includes at least two spaced through holes. The patterned carbon nanotube film is treated with a polymer solution. The patterned carbon nanotube film is shrunk into the carbon nanotube composite film.
US09691522B2	Method of making down-hole cable A system and method for a down-hole cable is provided. The down-hole cable includes an insulated conductor portion. A filler layer abuts and encapsulates the insulated conductor portion, wherein the filler layer is substantially formed with a foamed fluoropolymer. An armor shell is applied to the exterior of the foamed fluoropolymer filler layer.
US09691521B2	Rectangular insulated wire and electric generator coil A rectangular insulated wire includes a rectangular conductor having a generally rectangular cross section, a thermosetting resin layer provided to cover the rectangular conductor, and a plurality of thermoplastic resin layers provided on the thermosetting resin layer. An adhesion strength between the thermosetting resin layer and the thermoplastic resin layer is 50 gf/mm to 100 gf/mm.
US09691518B2	Medical cable A medical cable includes a plurality of cables, a braided shield covering a circumference of the plurality of cables together and being formed of tubular braided strands, and a jacket covering a circumference of the braided shield. The braided strands includes a copper foil yarn, which includes a highly stretchable polyethylene terephthalate monofilament yarn having a tensile strength of not lower than 700 MPa and an elongation of not lower than 50 percent and not higher than 100 percent, and a copper strip wound helically at a pitch around a surface of the highly stretchable polyethylene terephthalate monofilament yarn. The copper foil yarn has an entire push and recover ratio of not lower than 80 percent.
US09691515B2	Bus bar assembly comprising a memory metal composition A power distribution system element formed via an additive manufacturing technique, such as applying a conductive material to a memory metal substrate, are discussed herein. In operation (e.g. in response to delivering current through the distribution system), the memory metal contracts while the conductive material expands. The result is distribution system element having reduced thermal expansion, which can be net zero coefficient of thermal expansion.
US09691513B1	Pedestal alignment tool for an orienter pedestal of an ion implant device A pedestal alignment tool for adjusting an orienter pedestal of an ion implant device is provided, wherein the pedestal is configured to orient a wafer prior to implantation in the ion implant device, the pedestal alignment tool comprising supporting elements configured for contacting a surface of the pedestal, a base comprising a top surface and openings for receiving the supporting elements, and adjustment means configured for adjusting lengths of the supporting elements over which the supporting elements protrude from the top surface of the base.
US09691510B2	Equipment protecting enclosures Biomass (e.g., plant biomass, animal biomass, and municipal waste biomass) is processed to produce useful intermediates and products, such as energy, fuels, foods or materials. For example, systems and methods are described that can be used to treat feedstock materials, such as cellulosic and/or lignocellulosic materials, in a vault in which the equipment is protected from radiation and hazardous gases by equipment enclosures. The equipment enclosures may be purged with gas.
US09691508B2	System and method for determining a state of operational readiness of a fuel cell backup system of a nuclear reactor system A method for determining a state of operational readiness of a fuel cell backup system of a nuclear reactor system includes monitoring a readiness state of a fuel cell system associated with a nuclear reactor system, and providing a readiness determination of the fuel cell system by comparing the monitored state of readiness of the fuel cell system to an established operating readiness state, the established operating readiness state a function of at least one characteristic of the nuclear reactor system. An apparatus includes a fuel cell monitoring system configured to monitor a readiness state of a fuel cell system associated with a nuclear reactor system, and a readiness determination system configured to provide a readiness determination of the fuel cell system by comparing the monitored state of readiness of the fuel cell system to an established operating readiness state.
US09691506B2	High dielectric insulated coax cable for sensitive impedance monitoring A boiling water reactor core power level monitoring system includes a desired length of high dielectric, non-linear material insulated coaxial type cable in close proximity to the reactor core and a time domain reflectometry apparatus configured to measure a temporary characteristic impedance change associated with the coaxial type cable in response to at least one of neutron or gamma irradiation generated via the reactor core.
US09691505B2	Dynamic application of error correction code (ECC) based on error type Error correction in a memory subsystem includes determining whether an error is a transient error or a persistent error, and adjusting an approach to ECC (error checking and correction) based on error type. The type of error can be determined by a built in self-test. If the error is a persistent error, the memory controller can perform in erasure mode, including correcting an erasure for an identified error location prior to applying an ECC correction algorithm. Otherwise, if the error is transient, the memory controller can perform standard full ECC correction by applying the ECC correction algorithm.
US09691503B2	Allocation technique for memory diagnostics An apparatus for allocating computer memory for memory diagnostics is disclosed. The apparatus may include a processor and memory that stores code executable by the processor, and may include code that identifies an unreserved amount of memory in a computer system, code that requests a portion of the memory based on the unreserved amount of memory, and code that determines whether an allocated portion of the memory comprises non-contiguous memory addresses. In some embodiments, the apparatus includes code that locks the allocated portion of the memory in response to the allocated portion consisting solely of contiguous memory addresses, and code that performs a memory diagnostic test on the allocated portion of the memory.
US09691497B2	Programmable devices with current-facilitated migration and fabrication methods Programmable devices and fabrication methods thereof are presented. The programmable devices include, for instance, a first electrode and a second electrode electrically connected by a link portion. The link portion includes one material of a metal material or a semiconductor material and the first and second electrodes includes the other material of the metal material or the semiconductor material. For example, the link portion facilitates programming the programmable device by applying a programming current between the first electrode and the second electrode to facilitate migration of the one material of the link portion towards at least one of the first or second electrodes. In one embodiment, the programming current is configured to heat the link portion to facilitate the migration of the one material of the link portion towards the at least one of the first or second electrodes.
US09691496B1	High density ROM cell with dual bit storage for high speed and low voltage Disclosed is a ROM memory including a first bitcell including a transistor to store two bits and first and second bit lines to read data stored in the bitcell, a second bitcell including a second transistor connected to the first transistor and sharing the first and second bit lines, and a virtual ground line adjacent the bit lines configured to ground the bitcells.
US09691495B2	Memory array with RAM and embedded ROM A memory array with RAM and embedded ROM including multiple RAM cells, a ROM cell, and a ROM enable circuit. Each RAM cell has a RAM cell structure with a first and second power terminals and configured to operate as a RAM cell when the memory array is in a RAM mode. The ROM cell has the same RAM cell structure in which at least one transistor is modified to cause the ROM cell to have a predetermined logic state. The ROM enable circuit enables bit lines of the ROM cell to control supply voltages provided to the power terminals of the RAM cells so that they settle to predetermined logic states in a ROM mode. The modified transistor has a pseudo transistor structure having a modified substrate that operates as a resistance, such as a doping region in the substrate having the same polarity type as the substrate.
US09691492B1	Determination of demarcation voltage for managing drift in non-volatile memory devices A predetermined pattern of bits is written to a non-volatile memory device prior to powering down the non-volatile memory device. A plurality of voltages are applied to the non-volatile memory device to determine which voltage of the plurality of voltages allows the predetermined pattern of bits to be read with a least amount of error. The determined voltage is set to be a demarcation voltage for reading from the non-volatile memory device.
US09691491B2	Methods and apparatus to track bit cell current using temperature and voltage dependent reference currents An example method to track bit cell current in a memory architecture. An example method disclosed herein includes generating a first reference current dependent on bit cell temperature. The example method includes generating a second reference current dependent on bit cell voltage and supplying a third reference current of constant magnitude. In examples disclosed herein, the example method involves summing the first reference current, the second reference current, and the third reference current. The example method includes determining, with a sense amplifier, a bit cell logic state based on the first reference current, the second reference current, and the third reference current.
US09691490B2	Semiconductor memory device including dummy memory cells and memory system including the same The semiconductor memory device includes a memory cell array including a first plurality of normal memory cells and a second plurality of dummy memory cells in a stacked configuration over a substrate, a first plurality of normal word lines electrically coupled to the first plurality of normal memory cells, and a second plurality of dummy word lines electrically coupled to the second plurality of dummy memory cells, wherein the first plurality of normal memory cells includes at least one bad memory cell and each of the at least one bad memory cells are is replaced with a dummy memory cell from among the second plurality of dummy memory cells.
US09691489B2	Nonvolatile semiconductor memory device with first and second read operations with different read voltages A nonvolatile semiconductor memory device according to one embodiment of the present invention includes: a memory cell array and a control circuit. The control circuit executes a first reading operation and a second reading operation. The first reading operation is an operation of reading a threshold voltage set in the selected memory cell by setting a voltage between a control gate electrode and source of the selected memory cell to a first value. The second reading operation is an operation of reading a threshold voltage set in the selected memory cell by setting a voltage between the control gate electrode and source of the selected memory cell to a second value lower than the first value. When executing the second reading operation, the control circuit keeps a voltage of the control gate electrode of the selected memory cell to 0 or a positive value.
US09691485B1	Storage system and method for marginal write-abort detection using a memory parameter change A storage system and method for marginal write-abort detection using a memory parameter change is provided. In one embodiment, a method for detecting a write abort is provided that is performed in a storage system having a memory. The method comprises reading a lower page in memory; determining if any data is written in the lower page; and in response to determining that no data is written in the lower page: increasing source voltage for memory cells in the lower page; re-reading the lower page; determining if a read failure exists in the re-read lower page; and in response to determining that a read failure exists in the re-read lower page, detecting a write abort. Other embodiments are possible, and each of the embodiments can be used alone or together in combination.
US09691483B1	Content addressable memory with banks In one aspect, techniques for providing a banked content addressable memory (CAM) with counters are provided. A dictionary word may be divided into a plurality of banks. A counter may be associated with each bank of the plurality of banks. The counter may count the number of times a segment of an input word aligned with the bank does not match. A scheduler may schedule comparison of banks with higher probability of not matching before banks with lower probability of not matching. The probability of not matching may be based on the counters.
US09691474B2	Memory system A memory system according to the embodiment comprises a cell array of plural cells having three or more settable physical quantity levels and operative to store a code composed of symbols expressed by elements in a finite field Zp (p is a prime), wherein a set of two cells is defined as a pair cell and a combination of physical quantity levels of the two cells contained in the pair cell is defined as a pair cell level, wherein the pair cell uses a pair cell level of plural pair cell levels, which maximizes or minimizes a physical quantity level of one cell contained in the pair cell, to assign elements in the Zp to the pair cell levels, thereby storing symbols of the code.
US09691472B2	Non-volatile memory device and method of programming the same A non-volatile memory device and a method of programming a non-volatile memory device including a plurality of memory cells that are stacked in a vertical direction over a substrate and connected to n word lines, wherein n is an integer greater than or equal to 3. The method includes programming memory cells of second to n−1-th word lines, from among first to n-th word lines that are sequentially disposed in the vertical direction over the substrate, to a multi-level state, wherein a multi-level program operation is sequentially performed from the second to n−1-th word lines in an order in which the word lines are disposed; and programming memory cells of the first word line to a single level state after the programming memory cells of the second to n−1-th word lines to a multi-level state.
US09691470B1	Apparatus and method for restricted range memory calibration An apparatus and method for a restricted range calibration is disclosed. A system includes a memory coupled to a memory controller. The memory controller is coupled to receive a clock signal, and is configured to operate in different performance states corresponding to different frequencies of the clock signal. The memory controller provides a data strobe signal to synchronize transfers of data to and from the memory. When operating in a first performance state, the memory controller may perform a first calibration of a delay applied to the data strobe signal. Performing the first calibration includes varying the delay over a first range of values. Thereafter, responsive to returning to the first performance state from another performance state, the memory controller may perform a second calibration. The second calibration includes varying the delay over a second range of values that is less than the first range.
US09691465B2	Thyristors, methods of programming thyristors, and methods of forming thyristors Some embodiments include thyristors having first and second electrode regions, first and second base regions, and material having a bandgap of at least 1.2 eV in at least one of the regions. The first base region is between the first electrode region and the second base region, and the second base region is between the second electrode region and the first base region. The first base region interfaces with the first electrode region at a first junction, and interfaces with the second base region at a second junction. The second base region interfaces with the second electrode region at a third junction. A gate is along the first base region, and in some embodiments does not overlap either of the first and second junctions. Some embodiments include methods of programming thyristors, and some embodiments include methods of forming thyristors.
US09691462B2	Latch offset cancelation for magnetoresistive random access memory Systems and methods relate to operations on a magnetoresistive random access memory (MRAM) bit cell using a circuit configured in multiple phases. In a sensing circuit phase, the circuit configured to determine a first differential voltage between a data voltage across the bit cell and a reference voltage. In a pre-amplifying phase, the circuit is configured to pre-amplify the first differential voltage to generate a pre-amplified differential voltage, which does not have offset voltages that may arise due to process variations. In a sense amplifier phase, the circuit is configured to amplify the pre-amplified differential voltage in a latch. Generation of the pre-amplified differential voltage cancels offset voltages which may arise in the latch. In a write phase, the circuit is further configured to write a write data value to the MRAM bit cell.
US09691459B2	Semiconductor memory device including shorted variable resistor element of memory cell A semiconductor memory device includes a shorted variable resistor element in a memory cell. The semiconductor memory device includes main cells and reference cells each including a cell transistor and a variable resistor element. The variable resistor element of the reference cell is shorted by applying a breakdown voltage of a magnetic tunnel junction (MTJ) element, connection in parallel to a conductive via element, connection to a reference bit line at a node between the cell transistor and the variable resistor element, or replacement of the variable resistor element with the conductive via element. A sense amplifier increases a sensing margin of the main cell by detecting and amplifying a current flowing in a bit line of the main cell and a current flowing in the reference bit line to which a reference resistor is connected.
US09691454B2	Memory controller with phase adjusted clock for performing memory operations In an illustrative embodiment, the memory circuit includes first and second data paths on which data is transferred for read and write memory operations and first and second mixer circuits for adjusting the phase of clock signals applied to their inputs. The mixer circuits are cross-coupled so that the outputs of the first and second mixers are both available to both the first and second data paths. One mixer is used to provide a first phase adjusted clock signal for use by the operating circuit and the other mixer is used to provide a second phase adjusted clock signal for use by a following operation whatever that may be.
US09691453B1	Efficient calibration of memory devices A system and method for efficient data eye training reduces the time and resources spent calibrating one or more memory devices. A reference voltage (Vref) calibration mechanism reduces the time and resources for calibration by reducing the number of tests needed to sufficiently determine the boundaries of the data eye of the memory device by using a combination of small steps and small steps to find a preferred reference voltage. In one example, the Vref calibration mechanism uses small steps of the reference voltage in a first range above a nominal reference voltage to find a maximum eye width then uses small steps to more precisely find the maximum eye width. If a maximum reference voltage is found in the first range then the second range below the nominal reference voltage does not need to be tested thereby saving additional time and resources.
US09691451B1	Write assist circuit and method therefor A circuit includes a first driver to provide a first driver signal at an output. The first driver signal corresponds to a voltage operatively coupled to a VSS terminal of the first driver when driving a logic low. A first capacitor includes a first terminal coupled to the VSS terminal of the first driver. A boost circuit includes a first input coupled to the output of the first driver and a first output coupled to a second terminal of the first capacitor. The boost circuit is configured to cause the first capacitor to provide a boosted voltage at the VSS terminal.
US09691450B1	Storage method and apparatus for random access memory using codeword storage A memory circuit, such as an embedded DRAM array, stores information as groups of bits or data using information coding in storage and retrieval data, instead of each bit being stored separately. Write data words can be mapped to storage format words that are stored and defined by a Hadamard matrix. The storage format word is stored as charge levels in an addressable memory location. For retrieving stored data, charge levels are read from the storage cells and interpreted to a valid storage format word. Hadamard code maximal likelihood decoding can be used to derive a read data word corresponding to a previously written write data word. The write data word is then output as the result of a read of the selected addressable location, or a portion thereof. The mapping can be two or more Hadamard matrix mappings concatenated for each of a plurality of storage format words.
US09691444B2	Buffer die in stacks of memory dies and methods Memory devices and methods of making and operating them are shown. Memory devices shown include stacked memory dies with one or more buffer dies included. In one such memory device, a command die communicates with one or more downstream memory dies through the one or more buffer dies. The one or more buffer dies function to repeat signals, and can potentially improve performance for higher numbers of memory dies in the stack.
US09691443B2	Apparatuses and methods for compensating for process, voltage, and temperature variation in a memory Systems and methods are described for compensating for variations in process, voltage, temperature, or combinations thereof in an apparatus. An example apparatus may be a memory circuit. A pre-driver circuit and driver circuit may be associated with the memory circuit. A reference generator may provide the pre-driver circuit with reference signals that are insensitive to process, voltage, and temperature. The pre-driver circuit may receive the reference signals and the pre-driver circuit output ramping rate may then be made less sensitive to variations in process, voltage, and temperature. The pre-driver circuit output may then be supplied to a driver circuit that may then output a final driver data output with reduced noise.
US09691442B2	Memory device with reduced on-chip noise In some examples, a memory device includes multiple memory banks equipped with an isolation switch and dedicated power supply pins. The isolation switch of each memory bank is configured to isolate the memory bank from global signals. The dedicated power supply pins are configured to connect each of the memory banks to a dedicated local power supply pads on the package substrate to provide local dedicated power supplies to each of the memory banks and to reduce voltage transfer between memory banks over conductors on the device, the device substrate, or the package substrate of the memory device.
US09691436B2	Top cover and disk drive apparatus A case of a disk drive apparatus includes a housing in which a disk is accommodated, and a top cover arranged to close an opening of the housing. The top cover includes a top cover body and a flow control member. The top cover body is a plate-shaped member arranged to extend perpendicularly to a central axis. The flow control member is fixed to a lower surface of the top cover body. The flow control member includes a lower surface arranged axially opposite to at least a portion of an upper surface of the disk.
US09691433B2	Medical image diagnosis apparatus and medical image proccessing apparatus A medical image diagnosis apparatus including an image collection system that collects first dynamic images extending over a first period and a display control circuit that uses the first dynamic images and time information related to an image corresponding to a first predetermined time phase in the first period to simultaneously display the first dynamic images, the first predetermined time phase, and a relationship of the image currently displayed with a time phase in the first period at least in a predetermined period going back from the predetermined time phase in a monitor.
US09691425B2	Laminating magnetic cores for on-chip magnetic devices A laminating structure includes a first magnetic layer, a second magnetic layer, a first spacer disposed between the first and second magnetic layers and a second spacer disposed on the second magnetic layer.
US09691422B1	Slider air-bearing surface designs with efficiency-flattening hole Disclosed herein are hard disk drive sliders having an air-bearing surface (ABS) with an efficiency-flattening hole (EFH). The sliders comprise a trailing edge pad that has a first surface at a first level with a first perimeter, a second surface at a second level, the second level being below the first level, the second surface being substantially parallel to the first surface, the second surface having a second perimeter, wherein the second perimeter is within the first perimeter, and a third surface at a third level, the third level being below the second level, the third surface being substantially parallel to the first and second surfaces, the third surface having a third perimeter, wherein the third perimeter is within the second perimeter.
US09691421B2	Writing spirals with accurate slope on a disk drive media A reference spiral is written on a recording surface of a magnetic storage disk that is free of position or timing information. The reference spirals are written on the recording surface with a substantially uniform slope by using open loop control of the position of a read/write head in conjunction with an iterative learning control scheme. A voltage profile applied to a voice coil motor is adapted over multiple iterations of moving the read/write head across the recording surface to closely approximate a target voltage profile, and the reference spiral is written using the adapted voltage profile. In addition, ramp contact detection based on actuator current profile may be employed to achieve full utilization of available actuator stroke.
US09691419B1	ESD protection surface charge control recording head Electrostatic discharge protection can be afforded to a data recording head in accordance with various embodiments. A data recording head may consist of a circuit having a preamp ground connected to a ground substrate via a ground trace. The ground trace can consist of a first leg connected to the ground substrate and a second leg with an open connection extending from a dice line.
US09691418B1	Adaptive write fault thresholds Systems and methods for determining a relationship between write fault threshold and temperature are described. The systems and methods include measuring an operating temperature of the storage device, determining a current operating temperature of the storage device, determining whether the current operating temperature of the storage device satisfies a temperature threshold, and upon determining the current operating temperature of the storage device satisfies the temperature threshold, modifying a write fault threshold associated with a data track of the storage device.
US09691416B1	Microwave assisted magnetic recording head with trailing shield heat sink A magnetic write head having a heat sink structure located adjacent to a trailing magnetic shield. The heat sink structure prevents heat generated by the magnetic oscillator current from causing damage to and reducing reliability of the magnetic write head. The trailing magnetic shield is substantially aligned with the magnetic oscillator, allowing the heat sink structure to wrap around the sides and back of the trailing magnetic shield and to provide good heat conduction away from the write pole, magnetic oscillator and trailing magnetic shield. The heat sink structure can be constructed of a material such as Ru, TiN, Cu, Au, Ag and AlN, and is preferably constructed of Au, which has excellent thermal properties.
US09691414B1	Tape head with narrow skiving edges fitted to transducers A tape head includes a body, which includes a transducer. The transducer may be a read or write element, respectively configured so as for the tape head to read from or write to a tape, in operation. The body exhibits a tape-bearing surface, which is typically configured to face and interact with the tape, in operation. The tape head further includes a closure. The closure is fixed on a leading side or a trailing side of the body and includes a skiving edge vis-à-vis the transducer. The skiving edge is adjoined by non-skiving edges. Finally, the closure has a top surface that meets the skiving edge; the top surface is level with the tape-bearing surface. Also included are related devices; tape head apparatuses for recording and/or reproducing tapes, comprising such tape heads; and methods of fabrication thereof.
US09691413B2	Identifying sound from a source of interest based on multiple audio feeds Methods and systems for identifying sound from a source of interest are provided for herein. In some embodiments, a first audio feed is captured by a first microphone and a second audio feed is captured by a second microphone. The first microphone may be located closer in proximity to the source of interest than the second microphone. The first audio feed can be processed utilizing the second audio feed to produce a first processed audio feed that can enable identification of sound originating from the source of interest. In some embodiments, the second audio feed can be additionally processed utilizing the first audio feed to produce a second processed audio feed. In such embodiments, frequencies from the first processed audio feed can be compared against frequencies of the second processed audio feed to identify sound originating from the source of interest. Other embodiments may be described and/or claimed herein.
US09691412B2	Conferencing system and method for controlling the conferencing system A communication system and a method can be configured to facilitate the performance of a conference. The system can include a conference organizer terminal and at least two participants' terminals each assigned to respective conference participants who each log in to start a conference on the communication system. The communication system can be configured to calculate a decision situation at a particular point in time of the ongoing conference by analyzing the views expressed by the conference participants during the conference and send data relating to the decision situation for that point in time to the conference organizer's terminal and/or other conference participant terminals for use in facilitating the conference. IN some embodiments, such data can be used to assist the conference participants' in recognizing when there is a consensus made on at least one decision to be made during the conference.
US09691410B2	Frequency band extending device and method, encoding device and method, decoding device and method, and program The present invention relates to a frequency band extending device and method, an encoding device and method, a decoding device and method, and a program, whereby music signals can be played with higher sound quality due to the extension of frequency bands.A bandpass filter 13 divides an input signal into multiple sub-band signals, a feature amount calculating circuit 14 calculates feature amount using at least one of the multiple divided sub-band signals and the input signal, a high frequency sub-band power estimating circuit 15 calculates an estimated value of a high frequency sub-band power based on the calculated feature amount, a high frequency signal generating circuit 16 generates a high frequency signal component based on the multiple sub-band signals divided by the bandpass filter 13, and the estimated value of the high frequency sub-band power calculated by the high frequency sub-band power estimating circuit 15. A frequency band extending device 10 extends the frequency band of the input signal using a high frequency signal component. The present invention may be applied to a frequency band extending device, for example.
US09691406B2	Method for encoding audio signals, apparatus for encoding audio signals, method for decoding audio signals and apparatus for decoding audio signals The invention introduces a new concept for hierarchical coding of HOA content. A method for encoding a hierarchical audio bitstream comprises rendering a HOA input signal to surround sound, encoding the surround sound for a base layer output signal, decoding the encoded surround sound to obtain a reconstructed surround sound signal, performing dimensionality reduction on the received HOA input signal, calculating a residual between the dimensionality-reduced HOA signal and the reconstructed surround sound signal, encoding the residual signal, and multiplexing structural information about the HOA input signal, the encoded residuals and the encoded surround sound into a bitstream to obtain a hierarchical audio bitstream.
US09691402B1	Spectral translation/folding in the subband domain The present invention relates to a new method and apparatus for improvement of High Frequency Reconstruction (HFR) techniques using frequency translation or folding or a combination thereof. The proposed invention is applicable to audio source coding systems, and offers significantly reduced computational complexity. This is accomplished by means of frequency translation or folding in the subband domain, preferably integrated with spectral envelope adjustment in the same domain. The concept of dissonance guard-band filtering is further presented. The proposed invention offers a low-complexity, intermediate quality HFR method useful in speech and natural audio coding applications.
US09691397B2	Device and method data for embedding data upon a prediction coding of a multi-channel signal A device for embedding data upon a prediction coding of a multi-channel signal includes a storage unit to store a code book that includes a plurality of prediction parameter sets, each of the plurality of prediction parameter sets including a plurality of kinds of prediction parameters for a processing regarding the prediction coding. The device extracts a plurality of candidates of a prediction parameter set for the multi-channel signal from the code book, wherein the plurality of candidates are capable of suppressing a prediction error in the prediction coding within a predetermined range, converts an embedding object that is at least part of the data in accordance with a number corresponding to a number of the candidates, selects, from the plurality of candidates, the prediction parameter set corresponding to the converted embedding object, and multiplexes the selected prediction parameter set with coded data which are down-mixed from the multi-channel signal.
US09691396B2	Speech/audio signal processing method and apparatus The present invention discloses a speech/audio signal processing method and apparatus. In an embodiment, the speech/audio signal processing method includes: when a speech/audio signal switches bandwidth, obtaining an initial high frequency signal corresponding to a current frame of speech/audio signal; obtaining a time-domain global gain parameter of the initial high frequency signal; performing weighting processing on an energy ratio and the time-domain global gain parameter, and using an obtained weighted value as a predicted global gain parameter, where the energy ratio is a ratio between energy of a historical frame of high frequency time-domain signal and energy of a current frame of initial high frequency signal; correcting the initial high frequency signal by using the predicted global gain parameter, to obtain a corrected high frequency time-domain signal; and synthesizing a current frame of narrow frequency time-domain signal and the corrected high frequency time-domain signal and outputting the synthesized signal.
US09691395B1	System and method for taxonomically distinguishing unconstrained signal data segments A system and method are provided for taxonomically distinguishing grouped segments of signal data captured in unconstrained manner for a plurality of sources. The system comprises a vector unit constructing for each of the grouped signal data segments at least one vector of predetermined form. A sparse decomposition unit selectively executes in at least a training system mode a simultaneous sparse approximation upon a joint corpus of vectors for a plurality of signal segments of distinct sources. The sparse decomposition unit adaptively generates at least one sparse decomposition for each vector with respect to a representative set of decomposition atoms. A discriminant reduction unit executes during the training system mode to derive an optimal combination of atoms from the representative set. A classification unit executes in a classification system mode to discover for an input signal segment a degree of correlation relative to each of the distinct sources.
US09691393B2	Voice print identification for identifying speakers at an event Voice print identification for identifying speakers at an event is provided. A plurality of speakers at an event are recorded and associated with identity indicators. Voice prints for each speaker are associated with each of the plurality of recorded speakers. Determining based on the event, the list of attendees for the event, and the identity indicators, whether the voice print for at least one speaker corresponds to a known.
US09691391B2	Clustering of audio files using graphs Systems and methods to perform speaker clustering determine which audio segments appear to include sound generated by the same speaker. Speaker clustering is based on creating a graph in which a node represents an audio segment and an edge between two nodes represents a relationship and/or correspondence that reflects a probability, likelihood, or other indication that the two nodes represent audio segments of the same speaker. This graph is analyzed to detect individual communities of nodes that associate to an individual speaker.
US09691390B2	System and method for performing dual mode speech recognition A system and method is presented for performing dual mode speech recognition, employing a local recognition module on a mobile device and a remote recognition engine on a server device. The system accepts a spoken query from a user, and both the local recognition module and the remote recognition engine perform speech recognition operations on the query, returning a transcription and confidence score, subject to a latency cutoff time. If both sources successfully transcribe the query, then the system accepts the result having the higher confidence score. If only one source succeeds, then that result is accepted. In either case, if the remote recognition engine does succeed in transcribing the query, then a client vocabulary is updated if the remote system result includes information not present in the client vocabulary.
US09691384B1	Voice action biasing system Methods, systems, and apparatus for determining that a software application installed on a user device is compatible with a new voice action, wherein the new voice action is specified by an application developer of the software application. One or more trigger terms for triggering the software application to perform the new voice action are identified. An automatic speech recognizer is biased to prefer the identified trigger terms of the new voice action over trigger terms of other voice actions. A transcription of an utterance generated by the biased automatic speech recognizer is obtained. The transcription of the utterance generated by the biased automatic speech recognizer is determined to include a particular trigger term included in the identified trigger terms. Based at least on determining that the transcription of the utterance generated by the biased automatic speech recognizer includes the particular trigger term, execution of the new voice action is triggered.
US09691383B2	Multi-tiered voice feedback in an electronic device This invention is directed to providing voice feedback to a user of an electronic device. Because each electronic device display may include several speakable elements (i.e., elements for which voice feedback is provided), the elements may be ordered. To do so, the electronic device may associate a tier with the display of each speakable element. The electronic device may then provide voice feedback for displayed speakable elements based on the associated tier. To reduce the complexity in designing the voice feedback system, the voice feedback features may be integrated in a Model View Controller (MVC) design used for displaying content to a user. For example, the model and view of the MVC design may include additional variables associated with speakable properties. The electronic device may receive audio files for each speakable element using any suitable approach, including for example by providing a host device with a list of speakable elements and directing a text to speech engine of the host device to generate and provide the audio files.
US09691377B2	Method and device for voice recognition training A method on a mobile device for voice recognition training is described. A voice training mode is entered. A voice training sample for a user of the mobile device is recorded. The voice training mode is interrupted to enter a noise indicator mode based on a sample background noise level for the voice training sample and a sample background noise type for the voice training sample. The voice training mode is returned to from the noise indicator mode when the user provides a continuation input that indicates a current background noise level meets an indicator threshold value.
US09691374B2	Processing a stream of ordered input data A data processing system is provided for performing processing operations upon an ordered stream of input data values to form an ordered stream of output data values. A select circuit (18) includes select interval generation circuitry (34) which determines a number (interval number) of input data values between each data value to be selected for output from among the ordered stream of input data values. This interval number varies with position within the ordered stream of input data values. The select circuit (18) can thus perform selection of input data values in accordance with an interval number which may be varied, for example, in accordance with a linear piecewise approximation of an desired curve or, in other embodiments, in a piecewise quadratic variation approximating a desired curve. The processing techniques may be used, for example, in beam forming application, such as 3D beam forming of ultrasonic images.
US09691371B1	Air adsorbing and sound absorbing structure An air adsorbing and sound absorbing structure with a first portion comprising a first material comprising an open-celled foam with an air-adsorbing material coupled to the foam, where the first portion has a first air adsorption capacity and a first density. There is a second portion fixed to or integral with the first portion, wherein the second portion comprises one or more of: a different material than the first material, a second air adsorption capacity that is different than the first air adsorption capacity, and a second density that is different than the first density.
US09691370B1	Acoustical panels Acoustical materials of the type provided in panel form for purposes of controlling or adjusting the acoustics of an interior space, such as an auditorium or concert hall, conference room, etc., and commonly referred to as architectural acoustical panels or ceiling panels. A panel comprises multiple layers, such as a surface layer which faces the room or sound source, which in turn comprises wood veneer laminated to a supporting layer and defines a plurality of microperforations extending entirely through, the surface layer. An acoustical absorbing layer may be a wood wool material or, most preferably, high-density fiberglass having a particular orientation, along with a combination of a support material or ribbing, which may define a plurality of cells in which the fiberglass lies. A back support layer may be perforated or solid. The density and orientation of the sound absorbing material combine with the density and quality of the microperforations to produce substantial improvement in sound absorption over a broad range of frequencies.
US09691368B2	Multifunctional digital musical instrument An electronic musical instrument includes a database including timbre data corresponding to a plurality of musical instruments an acoustic data input unit configured to display an acoustic data input position corresponding to a selected one of the musical instruments, detect whether the acoustic data input position is touched, and receive information on the touched acoustic data input position a mouthpiece detachably provided and having a shape corresponding to a shape of a mouthpiece of the selected musical instrument a wind sensor unit configured to measure an amount of air to generate loudness data a control unit configured to receive timbre data corresponding to the information on the touched acoustic data input position, receive the loudness data from the wind sensor unit, and synthesize the timbre data and the loudness data to output an acoustic sound signal of the selected musical instrument and a power supply unit configured to supply power.
US09691360B2	Alpha channel power savings in graphics unit A graphics processing circuit and method for power savings in the same is disclosed. In one embodiment, a graphics processing circuit includes a number of channels. The number of channels includes a number of color component channels that are each configured to process color components of pixel values of an incoming frame of graphics information. The number of channels also includes an alpha scaling channel configured to process alpha values (indicative of a level of transparency) for the incoming and/or outgoing frames. The graphics processing circuit also includes a control circuit. The control circuit is configured to place the alpha scaling channel into a low-power state responsive to determining that at least one of the incoming or outgoing frames does not include alpha values.
US09691359B2	Vehicle display system with transparent display layer The invention pertains to display method, a computer program for performing the steps of the display method and a display system (1), the display system having for example: at least one display unit (13, 16) arranged to present at least one display image, at least one memory unit (12, 15) comprising information related to for example descriptions of a set of default graphics display objects (W1-W3) and configuration data. The configuration data is arranged to define: at least one transparent display layer (L1-L3), at least one transparent display container (CO0-CO2) associated to the at least one transparent display layer and at least one display mode. Each of said at least one display mode comprising a predetermined selection of one or more of said at least one transparent display container of one or more of said at least one display layer.
US09691358B2	Electronic apparatus and method for outputting content An electronic apparatus and a method of outputting content of the electronic apparatus outputs a synchronized content to a display apparatus and a projection-type display apparatus and a method of outputting a content of the electronic apparatus. The electronic apparatus includes an input/output unit connected with a display apparatus and a projection-type display apparatus, and a control unit configured to control the input/output unit, wherein the control unit outputs a synchronized content to the display apparatus and the projection-type display apparatus through the input/output unit.
US09691352B2	Control method and device thereof A control method and a device thereof are provided, which are applied to an electronic device. The electronic device includes a display module and a projection module, and is capable of displaying output content through the display module or projecting the output content to a projection screen. The method includes: detecting a state of the projection module; acquiring a current display brightness of the display module as a first display brightness, in the case that it is detected that the projection module is controlled to perform projection; and controlling a display brightness of the display module to switch from the first display brightness to a second display brightness which is lower than the first display brightness.
US09691350B2	Display apparatus including light controlling parts and method of driving the same A display apparatus includes: a pixel part including a plurality of pixels arranged substantially in a matrix form, where the matrix form includes a unit matrix having X columns in a horizontal direction and Y rows in a vertical direction, where X and Y are natural numbers; and a plurality of light controlling parts inclined with respect to the vertical direction of the pixels on the pixel part at an inclined angle of θ, where the inclined angle of θ satisfies the following equation: θ=tan−1((M×X)/(N×Y)), where M and N are different natural numbers.
US09691344B2	Liquid crystal display device having a master and slave drivers and driving method thereof According to one embodiment, a power reception section connects to the battery side, and receives supply of power, a detection section detects a singular state where a voltage of the battery side has fallen to a value less than or equal to a predetermined voltage value, a shifting section receives a detection output of the singular state from the detection section to thereby shift to singular control, and a driver connection section connects the plurality of drivers to each other. If the detection section in one of the liquid crystal display drivers has detected the singular state, the shifting section executes the singular control, and the driver connection section notifies the other liquid crystal display drivers that the singular state has been detected.
US09691341B2	Data driver and display apparatus including the same A data driver includes a digital-to-analog converter, a control signal output circuit, and an output buffer. The digital-to-analog converter generates first data voltages and second data voltages based on image data and a polarity control signal. Each first data voltage has a positive polarity, and each second data voltage has a negative polarity. The control signal output circuit outputs a first output control signal and a second output control signal based on the polarity control signal. A phase of the second output control signal is different from a phase of the first output control signal. The output buffer outputs the first data voltages based on the first output control signal and outputs the second data voltages based on the second output control signal.
US09691338B2	Liquid crystal display device According to an aspect, the liquid crystal display device includes: an expansion coefficient determining unit that determines an expansion coefficient of each of partial areas based on a signal level of the first, the second, and the third colors; a luminance level determining unit that determines a luminance level of each partial area based on the signal level; a signal processing unit that uses the expansion coefficient to expand the signal level; and a light source control unit that controls brightness of a light source based on the expansion coefficient and the luminance level. The light source can change the brightness of the partial areas individually. The light source control unit controls the light source such that the brightness of the light source in a partial area having a luminance level equal to or higher than a predetermined threshold is higher than the brightness based on the expansion coefficient.
US09691329B2	Organic light emitting display device configured to measure deterioration information, and driving method thereof An organic light emitting display device includes pixels positioned at crossing regions between data lines and scan lines, each of the pixels including an organic light emitting diode, a scan driver configured to supply a scan signal to scan lines, a data driver configured to drive the data lines, wherein the data driver includes, in each channel, a supply part comprising a digital-to-analog converter configured to generate data signals using second data supplied from outside in a driving period, and a deterioration part configured to measure deterioration information of the organic light emitting diode using the digital-to-analog converter in a sensing period.
US09691328B2	Pixel driving circuit, pixel driving method and display apparatus The present disclosure relates to a pixel driving circuit, a pixel driving method and a display apparatus. In addition to a storage unit in a conventional pixel driving circuit, the pixel driving circuit comprises an auxiliary storage unit, which is charged to a data voltage in a charging phase and stables a gate potential of a driving unit when a data voltage write switch is turned off in a threshold voltage compensation phase, so that there is enough time for the storage unit of the driving unit to acquire the data voltage and a threshold voltage of the driving unit through self-discharge and the storage unit of the driving unit compensates for the driving unit in a driving phase. In this way, operating current of the driving unit is not influenced by the threshold voltage.
US09691318B2	Image display method and device and electronic apparatus An image display method, device and electronic apparatus avoid to some extent a problem of a poor display effect due to adjusting an image purely depending on an RGB image conversion algorithm. The solution comprises obtaining a brightness value of current ambient light; performing image conversion on a frame of image having three primary color components to obtain a first display information, the first display information comprising four primary color gray scale values of each pixel in the image; adjusting the first display information to a second display information according to the brightness value, the second display information comprising four primary color gray scale values of each adjusted pixel; and displaying the image according to the second display information.
US09691317B2	Image display control method and image display control device The present invention discloses an image display control method and an image display control device for realizing an ideal display result of chroma by compensating the chroma values of all sub-pixels used for displaying the current frame of an image. The image display control method comprises: acquiring chroma values, output by a signal source, of all sub-pixels needed when a display device displays the current frame of an image; adjusting the acquired chroma values of all the sub-pixels according to pre-stored chroma compensation values corresponding to respective sub-pixels to obtain adjusted chroma values corresponding to respective sub-pixels; and driving the display device according to the adjusted chroma values corresponding to respective sub-pixels to display the current frame of the image.
US09691316B2	Display device capable of clock synchronization recovery Provided is a display device including a timing controller configured to output a clock synchronizing signal for a clock data recovery operation, and a plurality of source driving chips configured to perform the clock data recovery operation in response to the clock synchronizing signal, wherein each of the source driving chips includes a filter unit configured to determine whether the first and second detection signals are activated or deactivated in response to a voltage level of the clock synchronizing signal and to output an operation signal according to a comparative result of the first and second detection signals, and an internal clock generator configured to perform the clock data recovery operation in response to the activation state of the operation signal.
US09691315B2	Touch-type input device A touch-type input device includes a touch panel including drive electrodes and sensor electrodes. Capacitors are formed at intersections of the drive electrodes and sensor electrodes. A controller determines whether a conductive foreign matter exists on the touch panel from raw data values indicating changes in the capacitances of the capacitors from initial reference values. The controller determines touching of the touch panel from control data values indicating changes in the capacitances of the capacitors from control reference values changed when a conductive foreign matter exists. When the raw data values indicate existence of a conductive foreign matter, the controller sets the control reference value of each capacitor to a raw data reference value corresponding to the present raw data value. The controller updates the initial reference value when the touch-type input device is activated and updates the control reference value when the control reference value is erroneous.
US09691311B1	Banner stand assembly A banner stand assembly. The banner stand assembly includes pair of horizontal members that are insertable through channels in a banner, a plurality of vertical members removably securable therebetween, and a plurality of triangular support members having a flexible central portion slidably and removably secured to the vertical members. The support members are angularly adjustable via movement along the vertical members. The flexible central portion allows the angle of the banner to be adjusted and allows the banner stand assembly to maintain even footing on sloped terrain. The support members are individually height adjustable so that the banner stand assembly can support a banner on varied terrain.
US09691308B2	Lighted mounting apparatus A lighted mounting apparatus for a promotional glass holder including a channel which is lined on the bottom by a LED strip, a pair of extrusions to receive and hold a promotional glass, and a low voltage power supply.
US09691306B2	Transparent display board with structure of double layer type and manufacturing method thereof The present invention relates to a transparent electric billboard having a multilayer structure and a manufacturing method thereof, and more particularly, to a transparent electric billboard having a multilayer structure that have high insulation and soundproof effect by having a multilayer structure with spaces therein, and a method of manufacturing the transparent electric billboard.
US09691305B2	Pixel interleaving configurations for use in high definition electronic sign displays Pixel interleaving configurations for use in high definition electronic sign displays where each and every scan line includes full red, green, and blue color representation to provide for high resolution electronic video sign displays.
US09691301B2	Apparatus and method for training local anesthesia techniques in dental applications A safe needle for instructional use includes a bead affixed to the penetrating needle tip of a dental anesthetic needle. The safe needle allows unlimited practice of pre-invasive technique without the stress and safety issues of using an actual needle.
US09691300B2	Text-to-touch techniques Text-to-touch techniques, in accordance with embodiment of the present technology, include apparatuses and methods for receiving content including textual portions and non-textual portions. The textual portions include letters, select words, numbers and punctuation having recognized Braille codes. The non-textual portions may include metadata, graphics, formatting, decorations, hyperlinks, radio buttons, submit buttons, check boxes, windows, icons, fields and/or the like. The systems and methods convert the textual portion to Braille codes and select non-textual portions to haptic feedback. The Braille code may then be output to a user. In addition, the haptic feedback associated with various Braille codes may also be output to the user along the associated Braille codes.
US09691296B2	Methods and apparatus for conversation coach In exemplary implementations of this invention, a display screen and speakers present an audiovisual display of an animated character to a human user during a conversational period of a coaching session. The virtual character asks questions, listens to the user, and engages in mirroring and backchanneling. A camera and microphone gather audiovisual data regarding behavior of the user. After the conversational period, the display screen and speakers display feedback to the user regarding the user's behavior. For example, the feedback may include a plot of the user's smiles over time, or information regarding prosody of the user's speech. The feedback may also include playing a video of the user that was recorded during the conversational period. The feedback may also include a timeline of the human user's behavior. The virtual coaching may be provided over the Internet.
US09691295B2	Musical puzzle This application discloses a game that engages a user in correctly reproducing the duration of notes (short, long) to reproduce a melody from a sequence of notes. The melody becomes recognizable when the durations are approximately correct. As a game, the processing system may score the selected durations and provide feedback to the gamer.This technology can be implemented as a method, device, system or article of manufacture. In addition, for some jurisdictions, it can be described as software that produces a technical effect.
US09691294B2	Computerized system for teaching, learning, and assessing the knowledge of STEM principles An on-line teaching, learning and assessing system provides a teacher rapid feedback while teaching a classroom lesson on STEM principles by measuring student progress in learning the principles wherein student progress is measured by students' correct answers to assessment questions. The system includes at least one teacher computer and a plurality of student computers linked to the at least one teacher computer by a communications network. Each computer includes an input device and a touch sensitive screen for receiving handwritten input. The teacher inputs the teacher computer with at least one assessment question and at least one corresponding correct answer to the question, both inputs being handwritten using math expressions and STEM sketches. The student inputs the student computer with at least one student answer corresponding to the assessment question, the answer being handwritten using math expressions and STEM sketches.
US09691291B2	System and method for providing group learning via computerized student group assignments conducted based on student attributes and student-variable-related criteria In certain implementations, group learning may be provided via computerized student group assignments. In an implementation, student information about students registered to take a course may be obtained. The student information may comprise attributes of the students that correspond to student variables. Group criteria information associated with the course may be obtained. The group criteria information may comprise first criteria indicating that a student group is to be diverse with respect to a first variable, and second criteria indicating that a student group is to be similar with respect to a second variable. The students may be assigned to student groups associated with the course based on the attributes, the first criteria, and the second criteria such that a student group associated with the course comprises a set of students that, as a whole, is diverse with respect to the first variable and similar with respect to the second variable.
US09691290B2	Systems for quantifying clinical skill Systems for quantifying clinical skill of a user, comprising: collecting data relating to a surgical task done by a user using a surgical device; comparing the data for the surgical task to other data for another similar surgical task; quantifying the clinical skill of the user based on the comparing of the data for the surgical task to the other data for the other similar surgical task; outputting the clinical skill of the user.
US09691286B2	Data driven airplane intent inferencing Method, system and computer program product for providing a predicted vehicle track and for providing alerts when two predicted vehicle tracks are closer than a threshold amount. A vehicle intent prediction model is generated based on past instance of tracks for a vehicle operation, known vehicle intent data for the past instances, and contextual factors, such as weather, airline operator, air vehicle type or configuration, day of the week, etc. for the past instances. The vehicle intent prediction model can be generated using one or more machine learning algorithms. A future vehicle trajectory for a current vehicle operation can be output by the vehicle intent prediction model using the current track and existing contextual factors for the current vehicle operation. In the event that two vehicles following their respective predicted vehicle future trajectories would be closer than a threshold distance, an alert can be provided.
US09691284B2	Methods and systems related to time triggered geofencing Time Triggered Geo-fencing. At least some of the example embodiments are systems including: a processor; a wireless interface coupled to the processor; and a memory coupled to the processor. The memory stores a program that when executed by the processor, causes the processor to receive a set of variables related to a geo-fence to be established at a predetermined time for a preset duration; establish the geo-fence at the predetermined time, the geo-fence established for the preset duration; monitor a location of a vehicle using signals received by the processor; and send an alert related to the location of the vehicle if said monitoring indicates the vehicle has crossed the geo-fence within the preset duration.
US09691283B2	Obstacle alert device An obstacle alert device notifies a driver of the presence of an obstacle approaching a vehicle without making it difficult to see a state of the periphery of the vehicle. The apparatus includes: a captured image obtainment unit that obtains a captured image of a scene of the periphery of the vehicle; a target captured image generation unit that generates a target captured image based on the captured image; an object presence determination unit that determines whether or not an object is present in an outside region that is on an outer side of the target captured image; a movement direction determination unit that determines a movement direction of the object in the outside region; and a notification image output unit that, in the case where the movement direction determination unit has determined that the object in the outside region is moving toward the center of the target captured image, sequentially displays a plurality of indicators, that appear for a set amount of time and then disappear, in different locations of the target captured image, starting with the side having the outside region in which the object is present and moving toward the center of the target captured image, and repeats this display while displaying the plurality of indicators in positions where the indicators partially overlap with each other, with the indicator displayed later being displayed over the indicator displayed immediately previous thereto at the areas where the indicators overlap.
US09691279B2	Drive assist apparatus Provided is a drive assist apparatus: based on signal indication information on a traffic signal installed at at least one intersection located ahead of a self-vehicle in a travelling direction of the self-vehicle, distance information from the self-vehicle to the at least one intersection, and a running speed of the self-vehicle, a recommended speed at which the self-vehicle can pass through the at least one intersection during a period in which the traffic signal installed at the at least one intersection is green is calculated and is notified to the driver. In addition, when a difference obtained by subtracting an actual running distance from a predicted running distance in a case where the self-vehicle runs at the recommended speed exceeds a first threshold value, it is determined that the road has a traffic jam and the notification of the recommended speed is terminated.
US09691269B2	Multiple function arrangement for electronic apparatus and method thereof The current invention relates to the reuse of elements in an device to provide multiple functions of function indication, remote control command reception and touch sensor. The device comprises an indicator element providing a first function of indicating to a user the operating state of the said device, a receiver element providing a second function of reception of remote control commands from a remote control device, means for combining the indicator element and the receiver element to provide a third function of touch sensor. The indicator element provides the first function during a subsequent second period of time and the receiver element providing the second function during the second of the time, the first and the second period of time being continuously alternated.
US09691266B2	Smart hazard detector drills Systems and methods for initiating a drill by receiving an indication to start a drill. The indication to start the drill is received via a first network interface having a first network interface type. The drill is propagated to other devices in a network via a second network interface having a second network interface type.
US09691264B2	Security system health monitoring An apparatus and method for determining at least one operational condition of a premises based system including at least one premises device. The apparatus includes a processor configured to perform a diagno stic procedure. The diagnostic procedure includes determining operational data of the premises based system, the operational data indicating at least one of a premises device and the apparatus is operating outside a failure range and performing predictive analysis based at least in part on the received operational data. The predictive analysis indicates whether the at least one of premises device and apparatus is likely to operate within the failure range within a predefined period of time. The diagnostic procedure includes causing a notification alert to be transmitted to at least one of a user interface device and remote monitoring center based on the predictive analysis.
US09691263B2	Systems and methods for monitoring conditions Systems and methods for monitoring conditions are provided. A system can comprise a plurality of wireless transmitters and a plurality of repeaters. At least one wireless transmitter can be integrated into an alarm. The repeaters can be dispersed throughout a region at defined locations. The system can also include a computer to receive information communicated from the repeaters and the transmitters. The computer can include software for evaluating received information, identifying an alarm condition and an originating location of the alarm condition, and for reporting the alarm condition to a remote location. Other embodiments are also claimed and described.
US09691261B2	Home automation communications A system includes a computing device programmed to receive an alert signal indicating an issue associated with a customer premises. The computing device is further programmed to transmit a notification signal to a plurality of remote devices, determine whether at least one of the plurality of remote devices has responded to the notification signal, and transmit an update signal to the other of the plurality of remote devices after one of the plurality of remote devices has responded to the notification. The update signal indicates that one of the plurality of remote devices has responded to the notification signal.
US09691260B2	Electronic device with orientation-based alert adjustment Methods and apparatuses are disclosed that allow an electronic device to autonomously adapt one or more user alerts to the current operating environment of the electronic device. For example, some embodiments may include a method comprising providing a plurality of alert devices in an electronic device, determining an operating environment of the electronic device using a sensor of the electronic device, and actuating at least one of the plurality of alert devices that corresponds to the determined operating environment.
US09691257B2	Systems and methods for silencing an audible alarm of a hazard detection system Hazard detection systems and methods according to embodiments described herein are operative to enable a user to interface with the hazard detection system by performing a touchless gesture. The touchless gesture can be performed in a vicinity of the hazard detection system without requiring physical access to the hazard detection system. This enables the user to interact with the hazard detection system even if it is out of reach. The hazard detection system can detect gestures and perform an appropriate action responsive to the detected gesture. In one embodiment, the hazard detection system can silence its audible alarm or preemptively turn off its audible alarm in response to a detected gesture. Gestures can be detected using one or more ultrasonic sensors, or gestures can be detected using a motion detector in combination with one or more ultrasonic sensors.
US09691255B2	Control device, and control system To improve the accuracy of the determination on whether or not a moving object is present in a predetermined region, a control device for use in a system configured to conduct presence-or-absence determination on whether or not a moving object is present on the basis of detection by a first sensor provided in a predetermined compartment region, the control device comprising: a mode control section configured to control switching of an operation mode for the detection by the first sensor or the presence-or-absence determination; and an acquisition section configured to acquire a determination result of whether or not a moving object is present in an adjacent region adjacent to the predetermined compartment region and not including the predetermined compartment region; wherein the mode control section controls the switching of the operation mode in response to the determination result acquired by the acquisition section, is provided.
US09691248B2	Transition to accessibility mode An approach is disclosed that provides assistance to disabled individuals when utilizing public spaces. In the approach, a wireless message is received at a detector of the system with the wireless message being from a device worn by a disabled individual. The wireless message includes impairment data pertaining to the disabled individual. In addition, reception of the wireless message indicates that the disabled individual has entered a physical area that provides accommodations to disabled individuals. The approach identifies an impairment pertaining to the disabled individual and adjusts a device setting of a device in the physical area based on the identified impairment of the disabled individual.
US09691246B2	Flame detector for monitoring a region adjacent to bodies of water and taking into consideration a degree of polarization present in the received light for the activation of a fire alarm A flame detector, may be aligned to cover a region to be monitored near a body water. The flame detector has at least one radiation sensor and a downstream evaluation unit. The at least one radiation sensor is sensitive to light in the spectrum of open fire. The evaluation unit outputs a fire alarm in the event of fluctuations or flicker frequencies characteristic of open fire being detected. A linear polarizing filter positioned upstream of the radiation sensor(s) has a polarization plane rotated about a main receiving direction to largely suppress the horizontal component of the received light, based on the knowledge that light reflected from water surfaces is predominantly horizontally polarized. If characteristic flicker frequencies and a significant degree of polarization are simultaneously detected in the received light, the detector identifies sunlight reflected off bodies of water and modulated by the swell, and a false alarm output is inhibited.
US09691244B2	Multi-functional self-defensive spraying device The present invention provides a multi-functional self-defensive spraying device comprising mainly a main body and a bottle body embedded in the main body. On the main body are disposed a control circuit composed of a microprocessor, an alarm module, a voice recognition module, an emitting module, and a GPS module, and a button connected to the control circuit. Inside the bottle body is disposed an internal pocket for housing chemical agents and in the internal pocket is disposed a high pressure gas cylinder. A string connects the high pressure gas cylinder to a pull ring exposed at an outer edge of the bottle body. At a top edge of the bottle body is disposed a nozzle head. When under attack, a user may press the nozzle head therefrom chemical agents will be sprayed to scare and deter the attacker. Also, when a user presses the button or shouts a particular sound, an alarm sound will be emitted and a rescue unit such as the police office will be notified of the attack and the whereabouts of the user. During an emergency, a user may remove the bottle body and pull the pull ring outwards to release pressure from the high pressure gas cylinder, causing the chemical agents to break through the top end of the internal pocket and the nozzle head. The user may speedily escape when the chemical agents are thus dispersed as in an explosion.
US09691243B1	Exit-code-based RFID loss-prevention system Methods and systems are described for authorizing an item with an RFID tag to leave a facility. In one embodiment, a mobile device receives or determines an exit code (EC) to write into the tag in response to providing authorizing information. The EC may be based on information stored in the tag such as the tag's item identifier or other tag information (collectively an item identifier or II), a ticket value, other information such as the OC, a mobile identity or location, or any other suitable information. Upon verification of the EC, the tagged item is allowed to leave the facility. In another embodiment, the mobile device stores an item identifier (II) associated with the tag and provides authorizing information. Upon verifying the authorizing information and confirming that the stored II corresponds to the tagged item's II, the tagged item is allowed to leave the facility.
US09691241B1	Orientation of video based on the orientation of a display Methods and systems involving the orienting of video data based on the orientation of a display are described herein. An example system may be configured to (1) receive first video data, the first video data corresponding to a first orientation of the image-capture device; (2) send the first video data to a second computing device; (3) receive, from the second computing device, first orientation data indicating a requested orientation of the image-capture device; (4) cause a visual depiction of the requested orientation to be displayed on a graphical display; (5) receive second video data, the second video data corresponding to a second orientation of the image-capture device, where the second orientation is closer to the requested orientation than is the first orientation; and (6) send the second video data to the second computing device.
US09691239B2	Electronic system for locating remote objects Systems and methods for marking and locating objects in crowded environments, and more particularly, systems and methods that include a remote configured to communicate with a beacon having audio and visual indicators, are shown and described. One system comprises a remote including a housing, a tool extending from the housing, a movable sleeve configured to cover the tool, a first control circuit, a selection button coupled to the control circuit, a first transceiver, and a beacon including a second transceiver configured to communicate with the first transceiver, a second control circuit, an indicator electrically coupled to the second control circuit, and a latch mechanism, the tool configured to interact with the latch mechanism to securely couple the beacon.
US09691238B2	Crowd-based haptics A system produces haptic effects. The system receives input data associated with an event, identifies an element of the event in the input data, generates the haptic effects based on the element of the event, and produces the haptic effects via a haptic output device. In one embodiment, the haptic effects are generated by haptifying the element of the event. In one embodiment, the haptic effects are designed haptic effects and are adjusted based on the element of the event. In one embodiment, the input data is associated with a crowd that attends the event, and the element of the event is caused by the crowd. In one embodiment, the input data includes haptic data collected by one or more personal devices associated with the crowd. In one embodiment, the input data is indicative of a location of the one or more personal devices associated with the crowd.
US09691236B1	System and method for controlling light emitting diodes using backplane controller or enclosure management controller Aspects of direct to systems and methods for controlling LEDs by a backplane or enclosure management controller. A controller has multiple output ports, including M ports connecting to M row control lines and N ports connecting to N column control lines. At least (M*N) LEDs respectively connected to the M row control lines and N column control lines to form a virtual LED matrix. In operation, the controller monitors N storage drives of the system, and determines at least M states for each storage drive. Based on the M states for each storage drive, the controller determines a state of each LED being ON or OFF, and outputs control signals to the at least M row control lines and the at least N column control lines through the output ports based on the state of each LED, such that the LEDs display the states of the storage drives.
US09691233B2	Cassette for use with an automated banking machine that can receive power and communicate via magnetic induction In an example embodiment, a document holding cassettes that can be used in an automated banking machine that includes circuitry that is wirelessly powered through inductive coupling. The cassette can wirelessly communicate with the automated banking machine through induction.
US09691223B2	Selectable intermediate result interleaved wagering system A selectable intermediate result interleaved wagering system is disclosed. The system includes an interactive controller operatively connected to an application controller, and constructed to: communicate application telemetry; receive an intermediate offer; communicate an indication to accept the intermediate offer; receive an application resource associated with the intermediate offer; and receive a wager outcome. The system also includes a wager controller operatively connected to the application controller, the wager controller constructed to: receive the wager request; generate a wager outcome; and communicate the wager outcome. The system also includes the application controller operatively connecting the interactive controller to the wager controller by a network, the application controller constructed to: receive the application telemetry; generate the intermediate offer; communicate the intermediate offer; receive the indication to accept the intermediate offer; communicate the application resource associated with the intermediate offer; communicate the wager request; receive the wager outcome; and communicate the wager outcome.
US09691215B2	Gaming system and method for offering simultaneous play of multiple games Gaming apparatus and methods of conducting a wagering game of chance. A gaming machine is disclosed which is configured for mutually concurrent play of a plurality of games of chance on a single display screen. A method of conducting a wagering activity includes providing a player with a plurality of differing games of chance, at least some of which are mutually concurrently playable on a single screen display of a gaming device and enabling mutually concurrent play of the plurality of differing games of chance on the single screen display. Various other gaming machine configurations and methods of play related to multiple differing games of chance on a single display screen are also disclosed herein. Networked gaming machines are also disclosed.
US09691210B2	Coin processing device and corresponding method for classifying coins A coin processing device (10) and a method for classifying coins are provided. The coin processing device (10) includes at least one computerized controller (9) having a storage unit (36), and at least one coin channel (34) for guiding a coin (35). The at least one coin channel (34) includes at least one sensor (37) suitable for measuring a passage time of the coin (35). An accelerating device (43) is connected to the computerized controller (9) and is designed to accelerate the coin (35) in a reproducible manner. A target speed value for a specified coin (35) is stored in the storage unit (36). An actual speed value is calculated based on the transport time detected by the sensor (37). A coin class of the coin (35) is ascertained by the computerized controller (9) from the comparison of the target speed value and the actual speed value.
US09691207B2	Electronic lock with user interface An electronic lock having one or more lock settings that can be updated using a mobile device. The mobile device includes an app that provides a user interface through which one or more lock settings of the electronic lock can be selected and modified. When the user has made the desired selections to the lock settings on the mobile device, the mobile device wirelessly transmits these settings to the electronic lock. The electronic lock is configured to update its lock settings based on the wireless communication from the mobile device.
US09691203B1	Door access control system permitting electronic and mechanical unlocking A door access control system permitting electronic and mechanical unlocking includes a lock mounted to a door and an unlocking device matched with the lock. The lock can be set to be in a normal mode or an away mode. The unlocking device can be used to input a real-time unlocking identification information that is transmitted to the lock for comparison purposes. The lock can also be unlocked by a key. When the lock is set to be in the away mode, an alarm device is activated if the key is used. In this case, a first input device of the lock can be used to input a real-time alarm deactivating information to deactivate the alarm device. When the lock is set to be in the normal mode, the alarm device does not operate even if the key is used to unlock the lock.
US09691202B2	Inputting lock commands A command can be input into an electronic lock by holding a data carrier in range of a reader of the lock. The lock provides an indicator for one or more commands. An indicated command can be selected using the data carrier.
US09691194B2	Systems and methods for assessing operational data for a vehicle fleet Various embodiments of the present invention are directed to a fleet management system configured for capturing and evaluating vehicle telematics data, such as data captured from one or more vehicle telematics devices indicative of one or more vehicle dynamics, and service data, such as data captured from one or more portable data acquisition devices indicative of one or more service dynamics. In certain embodiments, the fleet management system is configured to associate captured vehicle telematics data with captured service data based on the contextual attributes of each, such as the time, date, and location of data capture. By synching the vehicle telematics data to the service data, the operational data can be uniquely assessed for various operational efficiencies.
US09691192B2	Method and apparatus for recall notification handling In a first illustrative embodiment, a computer implemented method includes receiving a recall message from a remote source. The method also includes comparing the recall to stored vehicle data to determine if a recall repair has already been completed. The method further includes delivering the recall message to at least one vehicle occupant through a vehicle system, contingent on the non-completion of the recall repair.
US09691191B1	Methods and systems for automated real time continuous waveform electrical property monitoring and status reporting A method for performing an integrated waveform analysis without the use of an external device is disclosed. The method includes receiving, at a processing device, at least one electrical waveform associated with a communications bus, extracting, with the processing device a plurality of real time parametric measurements of voltage samples for the at least one electrical waveform, comparing, with the processing device, the parametric measurements of voltage samples to stored data that is accessible to the processing device, the stored data related to expected electrical signal characteristics for the communications bus proximate at least one of system interfaces, hardware components, and interconnections associated with the communications bus, distinguishing any system interconnection degradations and hardware failures associated with the communications bus based on said comparing, and reporting, via the processing device, at least one of: extracted electrical signal parametric measurements are consistent with the stored electrical signal characteristics, electrical signal parameters are indicative of a system interconnection degradation, and electrical signal parameters are indicative of a hardware failure.
US09691190B2	Location based parking meter time reminder In embodiments of the disclosure, location information can be used to automatically set a parking meter time reminder on a user's mobile device. For example, after determining that the user has parked once a destination has been reached, the user's location can be used to determine if the vehicle has been parked at a parking meter (or other timed parking), and a reminder can be set based on a time limit associated with that parking location. The reminder can display periodic notifications on the user's mobile device until it is detected that the user has driven the vehicle away from the parking spot.
US09691188B2	Tolling system and method using telecommunications System, arrangement and method for tolling includes a location determining system arranged at least partly in a vehicle to determine the vehicle location during vehicular travel, a toll database including data about tolls for use of a plurality of lanes of a multi-lane roadway at a plurality of different geographic points, the toll data being different for different lanes of the multi-lane roadway at at least one geographic point, and a communications device arranged on the vehicle. A processor directs transmission including the determined vehicle location and an identification of the vehicle by the communications device to a remote site separate and apart from the vehicle. A toll is determined at the remote site based on the toll database and the vehicle location which is the lane-specific location of the vehicle or based on at least two vehicle locations each of which is a lane-specific location of the vehicle.
US09691187B2	Control device for vehicle hiring and control system using same A control system for vehicle hiring includes a control device and a wireless smart key. The control device includes a first microprogram control unit. The wireless smart key includes a second microprogram control unit, a positive electrode and a negative electrode both electronically coupled to the second microprogram control unit. When the first microprogram control unit receives a first sensing signal or a second sensing signal, the first microprogram control unit is electronically coupled to the positive electrode and the negative electrode.
US09691186B2	Constraint of a subdivided model A method of generating a design for a device is disclosed. The method includes electronically accessing a reference geometry representing the topology, and electronically accessing a source polygonal data model, where the source polygonal data model includes a plurality of source vertices. The method also includes modifying position characteristics of one or more of the source vertices, where the source vertices are modified so that after the source polygonal data model is subdivided, vertices in the subdivided polygonal data model corresponding with the modified source vertices conform to the reference geometry. The method also includes subdividing the source polygonal data model having the modified source vertices to generate the design, where subdividing the source polygonal data model causes vertices in the design to be positioned such that the design conforms with the reference geometry at least partly because of the modified position characteristics of the modified source vertices.
US09691182B1	System and method for adaptive display restriction in a headset computer An apparatus for improving the safety of a driver while driving a car, the apparatus comprising a headset for combining an unobstructed view with a virtual overlay, the virtual overlay created from a virtual output provided to the headset, the virtual output having one or more portions, a memory, a processor, at least one input device coupled to the memory and capable of delivering input device data to the memory, an application stored in the memory that when executed by the processor determines characteristics of the driver or an environment around the driver based upon data from the at least one input device, and a controller that based on the determined characteristics performs one or more of the following: block a portion of the virtual output to the virtual overlay, alters at least a portion of the virtual output to the virtual overlay, or adds a new portion to the virtual output.
US09691181B2	Methods and systems for social sharing head mounted display (HMD) content with a second screen Systems and method for processing video frames generated for display on a head mounted display (HMD) to a second screen are provided. One example method includes receiving the video frames formatted for display on the HMD, and while passing the video frames to the HMD, selecting a portion of content from the video frames and processing the portion of the content for output to a second screen. The video frames viewed in the HMD are a result of interactive play executed for viewing on the HMD. The second screen configured to render an undistorted view of the interactive play on the HMD. In one example, the method and system enable additional content to be rendered on the second screen (e.g., second screen content, such as social interactive play with others, other non-game content, player-player communication, etc.).
US09691177B2	Techniques for automatic occluder simplification using planar sections Techniques are disclosed for simplifying an occluder representing 3D graphics data. Graphics data corresponding to one or more 3D objects is voxelized. A plurality of planes is generated to intersect the voxelized graphics data. Intersections between the planes and the voxelized graphics data are evaluated to identify corresponding slice polygons from the intersections. A subset of the planes is selected to maximize a correctness of a simplified occluder. The simplified occluder representing the object is generated from a union of the selected subset of the planes.
US09691173B2	System and method for rendering in accordance with location of virtual objects in real-time There is provided a system and method for rendering in accordance with location of virtual objects in real-time. There is provided a method for persistent association of a graphic overlay with a virtual object in a displayable environment, comprising receiving a first three-dimensional coordinate of the virtual object in the displayable environment, determining a three-dimensional coordinate of the graphic overlay in accordance with the first three-dimensional coordinate of the virtual object, tracking a movement of the virtual object in the displayable environment by receiving one or more second three-dimensional coordinates of the virtual object, and modifying the three-dimensional coordinate of the graphic overlay in accordance with the one or more second three-dimensional coordinates of the virtual object.
US09691172B2	Furry avatar animation Apparatuses, methods and storage medium associated with animating and rendering an avatar are disclosed herein. In embodiments, the apparatus may comprise an avatar animation engine to receive a plurality of fur shell texture data maps associated with a furry avatar, and drive an avatar model to animate the furry avatar, using the plurality of fur shell texture data maps. The plurality of fur shell texture data maps may be generated through sampling of fur strands across a plurality of horizontal planes. Other embodiments may be described and/or claimed.
US09691169B2	Compact font hinting A system includes a computing device that includes a memory configured to store instructions. The computing device also includes a processor to execute the instructions to perform operations that include receiving data representing a glyph in a font to present the glyph on a display. In response to operations being executed to present the glyph on the display, operations include identifying one or more values shared by glyphs of the font for adjusting the appearance of the glyph, from a data table stored with the glyph in the font. Operations also include adjusting a representation of the glyph using the identified one or more shared values for presentation on the display.
US09691168B2	Image reconstruction using gradient projection for medical imaging applications Techniques and systems are disclosed for estimating an unknown image from a plurality of cone-beam computed tomography (CBCT) image projections. The unknown image is estimated by solving for minima of an expression comprising a fidelity term that is a function of the plurality of image projections and a regularization term that is responsive to a sparsity of the CBCT image projections. The minima of the expression is iteratively estimated by calculating an image gradient of the function, determining a step size based on a based on a Barzilai-Borwein (BB) formulation and adjusting the minima estimate using the projected image gradient and a step size.
US09691165B2	Detailed spatio-temporal reconstruction of eyelids Methods and systems of reconstructing an eyelid are provided. A method of reconstructing an eyelid includes obtaining one or more images of the eyelid, generating one or more image input data for the one or more images of the eyelid, generating one or more reconstruction data for the one or more images of the eyelid, and reconstructing a spatio-temporal digital representation of the eyelid using the one or more input image data and the one or more reconstruction data.
US09691164B2	System and method for symbol-space based compression of patterns A method and system for symbol-space based pattern compression. The method includes identifying a plurality of basic image symbols in an input sequence; assigning, to each of the plurality of basic image symbols, at least one connecting port; generating an output sequence by replacing each identified basic image symbol with an identification symbol, wherein the output sequence indicates connections between pairs of the plurality of basic image symbols based on the connecting ports, wherein each identification symbol is not a previously used symbol; and storing the output sequence as a data layer.
US09691160B2	Device and method for motion estimation and compensation A device for motion estimation in video image data is provided. The device comprises a motion estimation unit (11, 21) for estimating a current motion vector for an area of a current image by determining a set of temporal and/or spatial candidate motion vectors and selecting a best motion vector from the set of candidate motion vectors. The motion estimation unit (11, 21) is further adapted for substantially doubling one or more of the candidate motion vectors and for including the one or more substantially doubled candidate motion vectors in the set of candidate motion vectors.
US09691159B2	Local contraction measurements A system (10) for quantification of uncertainty of contours includes a display (48) which displays a portion of a 4D image of at least a left ventricle over a plurality of cardiac phases. A measurement device (16) includes at least one processor (42) programmed to receive the 4D image (18) from an imaging device (12), receive a selected location on the myocardial wall of the left ventricle, cast a ray perpendicular to at least one of the myocardial wall or center of the left ventricle through the selected location, calculate a thickness the myocardial wall along the cast ray, evaluate myocardial wall motion over the range of the cardiac phases, calculate a quantification of the myocardial contractile function, and display the calculate a quantification of the myocardial contractile function on the display device (48).
US09691150B2	Image processing apparatus, image processing method and storage medium An image processing apparatus includes: an image obtaining unit configured to obtain a first image by imaging an object using a first imaging apparatus, a second image by imaging the object using a second imaging apparatus, a third image by imaging the object using an image capturing unit whose position is associated with the second imaging apparatus; and an alignment unit configured to align the object in the first image with the object in the second image so that observation information of the object in the first image matches observation information of the object in the third image.
US09691148B2	Medical imaging analyzer and medical image processing method According to one embodiment, a medical imaging analyzer includes an imaging unit, a calculator, and an analyzer. The imaging unit divides an area including an object of a subject to be captured into a plurality of partial areas such that the partial areas overlap each other to form an overlapping area, and administers a contrast agent to each of the partial areas to capture a plurality of time-series images. The calculator calculates, based on the transition of the pixel value in one of the time-series images having the overlapping area, the transition of the pixel value in the other time-series image having the overlapping area. The analyzer analyzes the time-series images based on the transition of the pixel value in the one and the other of the time-series images to obtain the hemodynamics of the subject.
US09691146B2	Non-touch optical detection of vital sign from amplified visual variations A microprocessor is operably coupled to a camera from which patient vital signs are determined. A temporal-variation-amplifier of at least two images is operable to generate a temporal variation, a vital-sign generator is operable to generate at least one vital sign from the temporal variation and a display device is operable to display the at least one vital sign.
US09691143B2	Inspection apparatus and inspection apparatus system A first output value evaluation device obtains an average value of output values of optical image data for each of unit regions and creates a distribution map of an average value in an inspected region. A first defect history management device creates a distribution map related with the shape of the pattern from the distribution map of the average value and holds the created distribution map. A second output value evaluation device obtains at least one of a variation value and deviation of the output value of each pixel in the unit region. A defect determination device compares the obtained value with a threshold value. A second defect history management device holds information of the output value determined as a defect in the defect determination device. A defect/defect history analysis device analyzes, and checks the information from the first defect history management device and the second defect history management device.
US09691138B2	System and method for adjusting pixel saturation In one aspect, a computer-implemented method for adjusting pixel saturation may generally include accessing, by one or more computing devices, a target distribution function associated with at least one target image and an input distribution function associated with at least one input image. The target distribution function may define a target probability for a pixel saturation of each pixel within the target image(s). The input distribution function may define an input probability for an initial saturation value of each pixel within the input image(s), with the input image(s) differing from the target image(s). The method may also include associating, by the computing device(s), the initial saturation value of each pixel within the input image(s) with a target saturation value based on the input and target distribution functions and adjusting, by the computing device(s), the initial saturation value of each pixel within the input image(s) to the corresponding target saturation value.
US09691130B2	Adaptive screen interfaces based on viewing distance Voice commands and gesture recognition are two mechanisms by which an individual may interact with content such as that on a display. In an implementation, interactivity of a user with content on a device or display may be modified based on the distance between a user and the display. An attribute such as a user profile may be used to tailor the modification of the display to an individual user. In some configurations, the commands available to the user may also be modified based on the determined distance between the user and a device or display.
US09691127B2	Method, apparatus and computer program product for alignment of images In an example embodiment a method, apparatus and computer program product are provided. The method includes calculating directionality values for pixels of a first image and pixels of a second image, where a directionality value for a pixel is calculated based on gradient differences between the pixel and a plurality of neighboring pixels. The method includes determining a plurality of similarity values between the first image and the second images for a plurality of alignment positions of the first image and the second image based on the directionality values for the pixels of the first image and the directionality values for corresponding pixels of the second image. The method further includes selecting an alignment position from among the plurality of alignment positions for aligning the first image and the second image based on comparison of the plurality of similarity values.
US09691126B2	Systems and methods for recipient-side image processing Systems, methods, and non-transitory computer readable media configured to create, process, and/or modify images are provided. Recipient image data associated with an original image captured by a second computing system can be received by a first computing system. A first intermediate image may be generated based on the recipient image data. A first viewable image for display on the first computing system may be generated based on the first intermediate image.
US09691123B2	Instrumentation of graphics instructions Embodiments of graphics instruction instrumentor (“GII”) and a graphics profiler (“GP”) are described. The GII may facilitate profiling of execution of graphics instructions by one or more graphics processors. The GII may identify target graphics instructions for which execution profile information is desired. The GII may store instrumentation graphics instructions in a graphics instruction buffer. The instrumentation graphics instructions may facilitate the GP in collecting graphics profile information. For example, timestamp-storage instructions may be store timestamps before and after execution of the target graphics instructions. The GII also may store an interrupt-generation instruction to cause an interrupt to be sent to the GP so that the GP may begin collection of graphics profile data. The GII may store an event-wait instruction to pause the graphics processors until an event is received. Other embodiments may be described and claimed.
US09691116B2	Intelligent barcode systems Systems and methods using intelligent barcodes for processing mail, packages, or other items in transport are provided. Systems and methods allowing end-to-end visibility of a mail stream by uniquely identifying and tracking mail pieces are also provided. Systems and methods include the use of standardized intelligent barcodes on mail pieces, a seamless process for mail acceptance, continuous mail piece tracking, and feedback on mail quality in real time. In one embodiment, systems and methods using intelligent barcodes allow a mailing service to provide enhanced acceptance, sorting, tracking, address correction, forwarding, and delivery services. In another embodiment, systems and methods using intelligent barcodes allow a mailing service to identify a mail piece as undeliverable-as-addressed (UAA) and determine a final disposition for the mail piece. In yet another embodiment, systems and methods using intelligent barcodes allow mailers more visibility into the mail stream and information on the quality of their mailings.
US09691109B2	Mechanism for reputation feedback based on real time interaction A method for confirming that a user interacted with a resource provider before allowing the user to submit feedback associated with the resource provider is disclosed. A social network provider can query entities that are aware of the user's interaction history before activating a feedback function. Also, non-sensitive information can be used to identify the user.
US09691108B2	Determining logical groups without using personal information Systems and methods for the forming of user device groups are presented. In one example, logical relationship information describing logical relationships among a plurality of user devices is accessed. Scores for each of a plurality of possible groups are generated based at least partially on the logical relationship information and information about a first user device, but the scores not being based on any personally identifiable information about the first user of the first user device. A first group is selected from the plurality of possible groups based on the scores. Then the first user device is added to the first group.
US09691105B2	Analyzing calendar to generate financial information Techniques of analyzing a calendar to generate financial information are disclosed. In some embodiments, scheduled event data for at least one scheduled event is extracted from an electronic calendar. The scheduled event data can comprise corresponding time data and text for each one of the at least one scheduled event. A financial accounting entry for each one of the at least one scheduled event can be generated based on the extracted scheduled event data. The financial accounting entry can comprise an electronic record of business-related activity that can be used for a financial accounting purpose. Generating the financial accounting entry can comprise populating the financial accounting entry using the time data of the corresponding scheduled event.
US09691099B2	Methods and systems to alert a user of a network-based marketplace event A system to alert a user of a network-based marketplace event. The system receives the network-based marketplace event and determines if the network-based marketplace event is associated with a network-based marketplace alert that has been requested by the user. If so, the system communicates the network-based marketplace alert to the client machine over a persistent connection, the network-based marketplace alert to alert the user of the network-based marketplace event.
US09691098B2	Method and system for managing and displaying product images with cloud computing A method and system displaying and managing images of consumer products with cloud computing. A layout for plural selected consumer products is selected. An N-layer digital image of a shelf layout on which consumer products are displayed is created and stored in one or more cloud storage objects. The created N-layer digital image includes an M-layer hierarchy of vector images and/or visual overlays stored in one or more cloud storage objects in progressive resolution format and allows progressive resolution display without loss of image quality on the selected plural consumer products that appear in the N-layer digital image. The created N-layer digital image is displayed via a cloud communications network. The created image provides a virtual shopping experience that emulates a shopping experience in an actual retail store.
US09691094B2	Retail system and computer-implemented method for designing a customization of a product A customer at a customer computer system transmits a page request to a retailer computer system. The retailer computer system transmits a product page and a script to the customer computer system. The script is executable by the customer computer system to transmit a customization request from the customer computer system to a customization computer system. The customization computer system inserts controls and a save selector onto the customer computer system. Use of the controls at the customer computer system allows for customization of an image of the product viewed on a display of the customer computer system to render a compound image. Selection of the save selector at the customer computer system causes transmission of a transmission packet from the customization computer system to the retailer computer system. The retailer computer system stores the compound image in a shopping cart associated with the customer computer system.
US09691092B2	Predicting and responding to customer needs using local positioning technology Methods and systems for predicting and responding to customer needs using local positioning technology are presented. In some embodiments, a customer assistance computing platform may receive one or more attributes associated with a beacon signal received by a customer computing device and an identifier associated with the customer computing device. Subsequently, the computing platform may determine an identity of a customer using the customer computing device. The computing platform then may determine a location of the customer using the customer computing device based on the one or more attributes associated with the beacon signal. Thereafter, the computing platform may determine one or more predicted needs of the customer. Then, the computing platform may generate a notification based on the predicted needs of the customer and may send the notification to the customer computing device.
US09691091B2	Transportation service matching with location tracking and arrival estimation Matches for transportation services with transportation service providers (TSPs) and providing tracking are combined with an option for location tracking of the load or transportation service. Bids are accepted for transportation services and, on acceptance, a request is made for the TSP or driver “opt-in” to location tracking through a mobile device. The system automatically communicates with the driver to confirm acceptance of mobile telephone tracking (opt-in) and location tracking is initiated. The location is reported according to a threshold, along with updated estimates of pick-up and of completion of delivery. The tracking provides substantially a “24/7” access to the location and updated estimated completion of delivery. Upon completion of delivery, the tracking is terminated (automatic opt-out).
US09691089B2	User to website guaranteed shopping One embodiment is directed toward a process for a merchant inspection, where a guaranteed shopping server inspects online merchants to ensure they are reliable, financially stable, and committed to providing a great online shopping experience to the buyer/user. Next, this service monitors merchants on a regular basis, to ensure they deliver on their terms of sale, thus assuring purchasers of an overall safe online experience. Next, the guaranteed shopping service provides, a guarantee for added peace of mind for the purchaser. In accordance with one embodiment, a guarantee is provided to the buyer including ID theft protection, a purchase guarantee and a lowest price guarantee. As with other type of guarantees, certain restrictions and terms may apply. If a buyer does experience a problem with an online merchant, a benefit claim can be made and once the claim is validated, guaranteed shopping coverage can apply.
US09691085B2	Systems and methods of natural language processing and statistical analysis to identify matching categories Combining the natural language processing of product descriptions and statistical analysis of payment data to classify consumers based on products purchased and merchants based on products sold. Systems and methods use natural language processing techniques to interpret the descriptions of item level purchase data to classify products that have been purchased by customers into micro-categories. Statistical deviation methods are applied to the payment data to calculate normalized mean product cost, after removing outliers. After determining the micro-categories of the products purchased and the mean product cost of the purchased products, the system and methods classify consumers and merchants into categories based at least in part on the product micro-categories, mean costs, and relative volume of product types sold by merchants to predict which consumers are likely to purchase from which merchants.
US09691083B2	Opportunity identification and forecasting for search engine optimization A method of optimizing placement of references to an entity includes identifying at least search term to be optimized, determining a score for results of a search of a network with respect to the entity, determining costs associated with improving the score, and determining values associated with improving the score.
US09691082B1	Systems, devices, and methods for providing a dynamic subscription update feature in a wireless communications network Systems, devices, and methods for providing a dynamic subscription update feature in a wireless communications network are disclosed herein. An exemplary system for providing a dynamic subscription update feature in a wireless communications network is configured to receive offline data and in-call data from a plurality of network entities for use in determining, in accordance with one or more rules, whether at least one subscriber is eligible to receive a subscription update offer and receive a response message indicating whether the at least one subscriber accepts or declines the offer. A device configured to receive a subscription update offer and respond with an acceptance or decline message is disclosed. Methods for operating the aforementioned system and device are also disclosed.
US09691077B2	Systems and methods for making awards based on telephony activity An award system associated with a telephony communications system analyzes one or more users' telephony activity to determine if the telephony activity satisfies certain predetermined award rules. If a single user's telephony activity satisfies one or more award rules, the system makes an award to the user. The making of an award can include posting the award on a social networking site with which the user is associated. The analysis can also include collecting information about a predetermined type of telephony activity for multiple users of the system, and determining which of the multiple users has experienced the most of the predetermined type of telephony activity. An award is then granted to those users who experienced the most of the predetermined type of telephony activity.
US09691076B2	Demand response system having a participation predictor A demand response management system having a participation predictor. There may be a storage device having information collected about past behavior, related to participation in a demand response program, about a customer. The information may incorporate determining a period of time since the customer last participated in a demand response program, a frequency of participation in demand response events by the customer, and a size of energy loads of the customer. A model of the customer may be developed from this and other information. A processor may be used to collect and process the information, develop a model, and to make a prediction of a customer's being selected to participate in an event based on the various operator selectable criteria.
US09691075B1	Name comparison The present disclosure extends to comparing two or more names in a database of contact records. In embodiments, systems of the present disclosure execute a comparison of submitted names to determine if the records should be linked and/or merged. Embodiments of the present disclosure can compensate for irregularities in the database of contact records, including inconsistent name prefixes and suffixes, misspellings, typographical errors, misordered first/last names, and nicknames.
US09691068B1	Public-domain analyzer Some implementations include searching for and analyzing public-domain-status information about works (such as e-books) over the Internet. A computer system may search for works recently made available online that are categorized as being in the public domain. Associated metadata is analyzed to generate a confidence level regarding whether the works are in the public domain or protected by copyright. Based on the confidence level, decisions can be made, such as whether to make the works available for free in a particular country.
US09691067B2	Validation database resident on a network server and containing specified distinctive identifiers of local/mobile computing devices may be used as a digital hardware key in the process of gaining authorized access to a users online website account such as, but not limited to, e-commerce website account, online financial accounts and online email accounts The present invention consists of methods whereby local/mobile computing devices are registered by collecting a set of hardware and/or software distinctive identifiers to be saved in a validation database residing on a validation database server/Web server, such that the local/mobile computing device can be used as a digital hardware key for right of access and authorization of electronic transactions. This is done by comparing a regenerated set of hardware and/or software distinctive identifiers with those previously registered in the validation database in order to validate the identity of the local/mobile computing device. The invention consists of a first software program executing on a local/mobile computing device that generates the set of hashed and/or encrypted hardware and/or software distinctive identifiers and a second software program resident residing on a validation database server/Web server that manages the validation database.
US09691065B2	Automated transactions clearing system and method Embodiments of the present invention are related to systems and methods of verifying the integrity of transactions that traverse through complex system workflows, and particularly, verifying the integrity of financial and non-financial transactions that traverse through a plurality of financial systems making up one or more system workflows. In one embodiment, a clearing system is disclosed to include a central clearing engine configured for processing a plurality of transactions by retrieving transaction data of at least one transaction of the plurality of transactions from at least one data source based on a selection received. After parsing the transaction data, the central clearing engine may verify transaction data integrity based on the transaction data and determine a result, and generate a report based on the result.
US09691064B2	System for packaging, processing, and activating a bundled greeting and gift card A greeting card stored-value card combinations and methods of forming said combinations are provided. In one embodiment, these combinations include a greeting card comprising means for affixing a stored-value card thereto. These combinations also include a stored-value card affixed to the greeting card. A single identifier, such as a Stock-Keeping Unit (SKU) or a Universal Product Code (UPC), is assigned to the bundle that uniquely identifies the bundled greeting card and stored-value card. The single identifier provides identification means allowing the stored-value card to be activated. A single capture of the single identifier enables the customer to both purchase the greeting card stored-value card combination product as well as to activate the store-value card.
US09691059B1	Systems and methods for transactions using an ATM/credit/debit card and a second communications channel to an account holder's bank Systems and methods for performing a transaction with a headless point-of-sale or automated teller machine (ATM) device are disclosed using a card having a second communications path to a financial services provider. A card having a display and radio frequency (RF) communications module may be authenticated with a headless point-of-sale device using a short-range RF communications link. Characteristics of the card may be set prior to the transaction. Transaction information may be provided to the display of the card from the headless point-of-sale device. A customer may confirm the transaction at the card using a touch-sensitive input area. During the processing, a communication may be made over the second communications path to authorize the transaction independently of the transaction processing path. A transaction may then be completed at the headless point-of-sale device.
US09691058B2	Automated budgeted transfer process for linked accounts Embodiments for linking accounts and transferring funds between linked accounts include system for receiving financial account data and identifying at least one funding account and one or more receiving accounts from the account data. The systems determine a mapping strategy for linking the at least one funding account and one or more receiving accounts and link the at least one funding account and the one or more receiving accounts according to the mapping strategy. The systems further set parameters and execute a transfer of funds between the linked accounts in accordance with the parameters.
US09691054B2	Method for nonintrusive identification and ordering of component parts A noninstrusive system and method of scanning an object having component parts includes a vendor based data repository of component parts and a matching processor to receive a scanned image representative of the assembled object and to provide suggested and/or matched component parts for purchase from the vendor.
US09691052B2	Method, a system and a server for business appointment scheduling using text messages The present disclosure relates to a method, a system and a server using text messages for scheduling of business appointments. A server receives an initial text message having been transmitted over a wireless network by a mobile terminal. The initial text message includes a function keyword. Based on the function keyword, the server determines a type of requested service and creates a unique page identification for a scheduler page. The server transmits toward the mobile terminal over the wireless network, a reply text message including the unique page identification. The server detects an access of the scheduler page by the mobile terminal, the access including an entry of appointment data. An appointment is scheduled in the scheduler page, using the entered appointment data.
US09691048B1	Photoconductive multi-resonator chipless RFID A chipless RFID transponder is disclosed. The transponder comprises an antenna and a plurality of resonant structures that together define a spectral signature of the RFID transponder. Each of the resonant structures comprises conductive portions separated by interstitial regions. A reversible photoconductive material is disposed in the interstitial regions of the resonant structures between the conductive portions. The photoconductive material is positioned so as to shift the spectral signature of the RFID when exposed to radiation.
US09691047B2	Observation platform for using structured communications In a method of using structured communication in a plurality of observation platforms, within a first observation platform associated with a first radio range, a second communication device associated with a computer system receives a signal from a first communication device. A first characteristic of the signal corresponds to an audible source and a second characteristic of the signal corresponds to information indicative of a geographic position of the first communication device. The computer system: recognizes a first user associated with the first communication device; derives context information for the signal; and relays the signal, via a computer network, to a second computer system associated with a second observation platform. The second observation platform is associated with a second radio range outside of the first radio range. In the second observation platform, the signal is relayed via the second computer system to a derived destination in the second observation platform.
US09691043B2	Device and method for cross-referencing A sample, which is embedded in a paraffin block, is placed on a tissue cassette (22) which carries a label (20) which may a bar code. When the sample is to be processed, the cassette is given to a microtome operator who scans the label (20) with, for example, a bar code reader (4). Scanning causes information to be displayed on a screen (12) and the operator verifies that what is on the screen matches what was on the label. The paraffin block is then placed in a microtome chuck (26) and sections are cut from the block. Concurrently with, or prior to sectioning, a number of slides (18) are dispensed (2) and are printed with a label (16) so that the sections can be mounted thereon. The slide label (16) is related to the cassette label (20). If the operator does not verify that the information displayed on the screen matches the information on the cassette label (20) and/or does not place the paraffin block in the microtome chuck (26) within an allocated time interval after scanning the cassette label (20), dispensing and labelling of slides (18) and/or operation of the microtome is prevented. This ensures accurate identification of samples within a laboratory as it does allow the operator the opportunity lose track of which samples were being processed.
US09691042B2	E-Business value web A method and system is provided to manage and track changes in enterprise architectures. The invention provides a hierarchical visual management tool to manage and update relational information within an enterprise in a controlled fashion. The relationship may be maintained in a database and displayed via graphical user interface. Enterprise assets are categorized into such categories as goals, customer values or requirements, capabilities, resources, and the like. A hierarchy is constructed so that relationships between these various categories are identified and captured using the invention. Weights may be assigned to each element of the categories so that any proposed change to an enterprise architecture may be viewed so that a value can be ascertained and compared between other values of other proposed changes. In this manner, tracking and management of evolutionary changes to an architecture may be accomplished using relational information.
US09691037B2	Methods and systems for processing schedule data Methods and systems comprising receiving travel request data; retrieving schedule data associated with the travel request data, the schedule data being further associated with a scheduled travel time; retrieving availability data associated with the travel request data, the availability data being further associated with an available travel time; generating representation data representing the schedule data and the availability data, the representation data representing the schedule data and/or the availability data differently based on a whether an itinerary complies with an organization's travel policies; and sending the representation data.
US09691035B1	Real-time updates to item recommendation models based on matrix factorization A network-based enterprise or other system that makes items available for selection to users may implement real-time updates to item recommendation models based on matrix factorization. An item recommendation model may be maintained that is generated from a singular value decomposition of a matrix indicating selections of items by users. A user-specific update to the item recommendation model may be calculated in real-time for a particular user such that the calculation may be performed without performing another singular value decomposition to generate an updated version of the item recommendation model. Item recommendations may then be made based on the user-specific update and the item recommendation model. In various embodiments, the item recommendations may be made in response to an indication or request for item recommendations for the particular user.
US09691032B2	Knowledge discovery from belief networks Techniques are disclosed herein for making predictions with respect to how content consumers will interact with a digital asset. For example, in the context of website visitors browsing digital assets provided via a website, web traffic data can be collected and modeled using a belief network. The belief network may represent a probability distribution for a set of variables that define the web traffic data. Examples of such variables include browser type, browsing session duration, geographic location, visitor demographic characteristics, and a browsing outcome. Certain of the embodiments disclosed herein can be used to extract knowledge from the belief network, thereby allowing statistical inferences to be drawn with respect to how certain classes of website visitors will interact with the website. The influence of one or more first variables (for example, geographic location) can be quantified with respect to one or more second variables (for example, the successful result indicator).
US09691031B2	Efficient fact checking method and system utilizing controlled broadening sources An efficient fact checking system analyzes and determines the factual accuracy of information and/or characterizes the information by comparing the information with source information. The efficient fact checking system automatically monitors information, processes the information, fact checks the information efficiently and/or provides a status of the information.
US09691027B1	Confidence level threshold selection assistance for a data loss prevention system using machine learning Machine-learning based detection (MLD) profiles can be used to identify sensitive information in documents. The MLD profile can be used to generate a confidence value for the document that expresses the degree of confidence with which the MLD profile can classify the document as sensitive or not. In one embodiment, a data loss prevention system provides or suggests a confidence level threshold to a user of the data loss prevention system by providing a confidence level threshold for the MLD profile to the user, the confidence level threshold to be used as the boundary between sensitive data and non-sensitive data. In one embodiment the provided confidence level threshold is determined by scanning a random data set using the MLD profile.
US09691017B2	Recombinase-based logic and memory systems The invention provides, inter alia, recombinase-based systems that provide for integrated logic and memory in living cells.
US09691015B2	Memory card adapter and memory apparatus Memory card adapters and/or a memory apparatuses may be provided. For example, a memory card adapter including a main housing section that corresponds to a memory card socket of a first standard, the main housing section including a card housing section, the card housing section configured to house a memory card of a second standard different from the first standard therein, a first surface of the main housing section defining a through-hole, the through-hole configured to expose a connection pin of the memory card to be housed in the housing section to an outside of the housing section, and a second surface of the main housing section defining a card insertion hole, the second surface being different from the first surface, the card insertion hole configured to receive the memory card into the card housing section may be provided.
US09691009B2	Portable optical reader, optical reading method using the portable optical reader, and computer program The present invention provides a portable optical reader, an optical reading method using the portable optical reader and a computer program capable of detecting a high possibility of a reading error and notifying a user of a possibility of a reading error. A character string as a reading target is imaged and a character string is recognized based on the captured image. A plurality of reading formats defining an attribute of the character string is stored, and a first reading format matched with the recognized character string among a plurality of stored reading format is searched. Among the plurality of stored reading formats, a second reading format in which a character string matched with the first reading format as a partial character string is searched. Based on the search result, a possibility of a reading error regarding the recognized character string is notified.
US09691000B1	Orientation-assisted object recognition A user attempting to obtain information about an object can capture image information including a view of that object, and the image information can be used with a matching or identification process to provide information about that type of object to the user. Information about the orientation of the camera and/or device used to capture the image can be provided in order to limit an initial search space for the matching or identification process. In some embodiments, images can be selected for matching based at least in part upon having a view matching the orientation of the camera or device. In other embodiments, images of objects corresponding to the orientation can be selected. Such a process can increase the average speed and efficiency in locating matching images. If a match cannot be found in the initial space, images of other views and categories can be analyzed as well.
US09690999B2	Remote recognition processing system and method A computerized method for intelligently distributing computer processing of mail piece scan images across a plurality of mail piece scan image processors. The method can include receiving a mail piece scan image from a mail piece scan image job requestor and selecting one of a plurality of scan mail piece scan image processors to process said mail piece scan image. The mail piece scan image can be transmitted to said one of a plurality of plurality of mail piece scan image processors and a mail piece scan image processing result can be received from said one of a plurality of plurality of mail piece scan image processors. Post-processing operations can be performed based on said mail piece scan image processing result. The mail piece scan image processing result can be transmitted to said mail piece scan image processing requestor.
US09690989B2	Fossil recognition apparatus, systems, and methods In some embodiments, an apparatus and a system, as well as a method and an article, may operate to acquire fluid image information from an imaging device having a field of view including fluid, the fluid image information including fossil image information. Additional activities may include processing the fossil image information to identify fossil types in the fluid as data that associates the fossil types with a formation from which the fluid was acquired, determining the location of a first borehole in the formation based on the data and offset records associated with a second borehole, and publishing the data in conjunction with indications of the location. Additional apparatus, systems, and methods are disclosed.
US09690988B2	Image processing apparatus and image processing method for blink detection in an image An image processing apparatus including a detection unit configured to detect a face area and an eye area from images that are sequentially input; a motion vector calculation unit configured to calculate, between two of the images, a first motion vector in the face area and second motion vectors in a plurality of blocks obtained by dividing the eye area; a similarity calculation unit configured to calculate, for each pair of the images, a value relevant to a similarity between the first motion vector and each of the second motion vectors; and a determination unit configured to determine whether blinking has occurred based on the value relevant to the similarity.
US09690978B2	Information processing apparatus, information processing and program A time difference measurement system includes: a first face detection unit for detecting face areas from images photographed by first camera and that slices them as face images; a first face feature extraction unit for extracting first face feature amounts from the face images, and a memory that stores the first face feature amounts in association with shooting time instants. The system includes, for a second camera, an analogous second face detection unit, a second overlap deletion unit and a second face feature extraction unit. The system includes: a face collation unit for collating the second face feature amounts with the first face values; and a time difference calculation unit for calculating time difference between the first and second shooting time instants. The system further includes at least one of first and second overlap deletion units for comparing a plurality of face images sliced from different frames.
US09690977B2	Object identification using 3-D curve matching The claimed subject matter provides for systems and/or methods for identification of instances of an object of interest in 2D images by creating a database of 3D curve models of each desired instance and comparing an image of an object of interest against such 3D curve models of instances. The present application describes identifying and verifying the make and model of a car from a possibly single image—after the models have been populated with training data of test images of many makes and models of cars. In one embodiment, an identification system may be constructed by generating a 3D curve model by back-projecting edge points onto a visual hull reconstruction from silhouettes of an instance. The system and methods employ chamfer distance and orientation distance provides reasonable verification performance, as well as an appearance model for the taillights of the car to increase the robustness of the system.
US09690975B2	Quantitative structural assay of a nerve graft Techniques are described for determining the quality of a nerve graft by assessing quantitative structural characteristics of the nerve graft. Aspects of the techniques include obtaining an image identifying laminin-containing tissue in the nerve graft; creating a transformed image using a transformation function of an image processing application on the image; using an analysis function of the image processing application, analyzing the transformed image to identify one or more structures in accordance with one or more recognition criteria; and determining one or more structural characteristics of the nerve graft derived from a measurement of the one or more structures.
US09690970B2	Method and device for mobile terminal biometric feature imaging A device and method for biometric feature imaging are disclosed. The biometric feature imaging device comprises: an optical lens component adapted for optically imaging a biometric feature of a region of interest, an image sensor adapted for converting an optical image containing the biometric feature into an electronic image, an infrared light source adapted for illuminating the biometric feature of the region of interest with infrared light when the infrared light source is activated, and an optical filter unit; the optical filter unit comprises: a first optical filter adapted for blocking invisible light, a second optical filter adapted for allowing infrared light to pass therethrough, a driving mechanism adapted for moving the first optical filter and the second optical filter, and a driving controller; the driving controller is adapted for generating a first driving signal for driving the driving mechanism to move the first optical filter into an optical path of the optical lens component or a second driving signal for driving the driving mechanism to move the second optical filter into the optical path of the optical lens component.
US09690969B2	Information processing apparatus, non-transitory computer readable medium, and information processing method An information processing apparatus includes an acquiring unit and a classification-proportion calculating unit. The acquiring unit acquires a granularity and network information that includes multiple nodes and multiple links connecting the multiple nodes, the granularity being used to classify the multiple nodes into multiple components. The classification-proportion calculating unit calculates a classification proportion in which each of the multiple nodes is classified as one of the components. The classification-proportion calculating unit calculates the classification proportion for each of the multiple components by using values of a first contribution and a second contribution. The first contribution takes on a high value as the classification proportion becomes high in which one of the nodes having a corresponding one of the links is classified as the component. The second contribution takes on a high value as a proportion of the component to the multiple components becomes high.
US09690967B1	Detecting conflicts between multiple different encoded signals within imagery This disclosure relates to advanced signal processing technology including steganographic embedding and digital watermarking. One combination disclosed in the description is an image processing apparatus including: electronic memory for storing an image, in which the image comprises at least a 1D or 2D barcode represented therein and a first encoded signal encoded therein, the 1D or 2D barcode comprising a first plural-bit code and the first encoded signal comprising a second plural-bit code; means for decoding the 1D or 2D barcode from the image to obtain the first plural-bit code; means for analyzing data representing the image to obtain the second plural-bit code from the first encoded signal; means for determining whether the second plural-bit code conflicts with the first plural-bit code; and means for generating a conflict map, the conflict map comprising an identification of a code conflict, and a spatial location of the code conflict relative to the image. Of course, other features and combinations are described as well.
US09690964B2	Filtering inventory objects using images in an RFID system A method for filtering scanned objects displayed on a reader is provided. The reader may scan one or more transponders, and obtain, from a database, an image for each scanned transponder. Each transponder may be associated with an object (e.g., an item of retail inventory). The obtained image for each object may be presented on an interface, and a selection of an object category may be received using the obtained images. A determination may be made as to which objects are associated with the selected object category. A display screen may display data associated with only the objects associated with the selected object category.
US09690960B1	Memorial data system A memorial data system is disclosed for providing information regarding an object. The memorial data system comprises a marker for identifying the object. A transponder circuit is coupled to the marker. A data is stored within the transponder circuit. A mobile electrical device transmits an electromagnetic field in close proximity to the transponder circuit. The transponder circuit receives the electromagnetic field for powering the transponder circuit. The transponder circuit transmits the data to the mobile electronic device. The mobile electronic device utilizes the data to access an electronic file on a network. The electronic file includes information regarding the object.
US09690957B2	RFID systems using distributed exciter network RFID systems are disclosed that include at least one RFID receiver system and a distributed exciter architecture. Exciters can be connected via wired and/or wireless connections to the RFID receiver system, which can control activation of the exciters to detect the presence of RFID tags within interrogation spaces defined by the exciter topology. One embodiment includes an RFID receiver system configured to detect information from RFID tags within a receive coverage area, and a plurality of exciters defining a plurality of interrogation spaces within the receive coverage area of the receiver system. The receiver system is configured to transmit a control signal that identifies one of the exciters and includes information indicative of an RFID tag interrogation signal, the exciters are configured to receive the control signal, and the exciter identified in the control signal is configured to illuminate an interrogation space with the RFID tag interrogation signal.
US09690955B2	Tunneling messages over an USB to control power delivery An electronic system includes a computer and a power adapter. The computer includes an embedded controller (EC) coupled to a computer power delivery (PD) controller. The power adapter includes a power adapter PD controller connected to a slave device and is configured to communicate with the computer over a communication link. The computer PD controller is configured to receive a command from the EC and, to transmit a universal serial bus (USB) vendor defined message (VDM) header and one or more vendor defined objects (VDOs) including the information of the payload of the transmit command. The power adapter PD controller responds to the one or more VDOs either by changing an output signal to the slave device connected to the power adapter PD controller, reports a state of a general purpose input/output (GPIO) pin of the power adapter PD controller, or changes the state of the GPIO pin.
US09690950B2	Method for exporting data of a Javacard application stored in a UICC to a host The invention proposes a method for exporting data of a Javacard application stored in a UICC to a host, the method consisting in: transmitting a transfer order to the application through a Javacard API; formatting the data in a pack, wherein the formatting is realized by the application; exporting the pack to the host.
US09690947B2	Processing a guest event in a hypervisor-controlled system Method of processing a guest event in a hypervisor-controlled system, which includes: triggering a first firmware service specific for the guest event; the firmware processing information associated with the guest event, and presenting only a subset of the information of a guest state and memory in decrypted form to a hypervisor, where the subset of the information is selected to allow the hypervisor to process the guest event; the firmware retaining a part of the information of the guest state and memory not sent to the hypervisor; the hypervisor processing the guest event based on the received subset of the information, and sending a process result to the firmware, triggering a second firmware service; the firmware processing the received process result together with the part of the information of the guest state and memory not sent to the hypervisor, and generates and performs a state and/or memory modification.
US09690946B2	Security analysis using relational abstraction of data structures Analyzing program code can include detecting an instance of a container within the program code using a processor, selecting a model container correlated with the container using the processor, and creating an instance of the model container within memory using the processor. A data-flow of the program code can be tracked through the instance of the model container instead of the instance of the container.
US09690945B2	Security analysis using relational abstraction of data structures Analyzing program code can include detecting an instance of a container within the program code using a processor, selecting a model container correlated with the container using the processor, and creating an instance of the model container within memory using the processor. A data-flow of the program code can be tracked through the instance of the model container instead of the instance of the container.
US09690936B1	Multistage system and method for analyzing obfuscated content for malware A malware detection system configured to detect suspiciousness in obfuscated content. A multi-stage static detection logic is utilized to detect obfuscation, make the obfuscated content accessible, identify suspiciousness in the accessible content and filter non-suspicious non-obfuscated content from further analysis. The system is configured to identify obfuscated content, de-obfuscate obfuscated content, identify suspicious characteristics in the de-obfuscated content, execute a virtual machine to process the suspicious network content and detect malicious network content while removing from further analysis non-suspicious network content.
US09690934B1	Systems and methods for protecting computing devices from imposter accessibility services The disclosed computer-implemented method for protecting computing devices from imposter accessibility services may include (1) registering a security application with the computing device as an accessibility service that has special permissions on the computing device that are not available to other applications, (2) ensuring that the security application is the first registered accessibility service on the computing device, and (3) performing, by the security application, a security action after ensuring that the security application is the first registered accessibility service. Various other methods, systems, and computer-readable media are also disclosed.
US09690932B2	Predicting and preventing an attacker's next actions in a breached network A method for cyber security, including detecting, by a decoy management server, a breach by an attacker of a specific resource within a network of resources in which users access the resources based on credentials, wherein each resource has a domain name server (DNS) record stored on a DNS server, changing, by the decoy management server, the DNS record for the breached resource on the DNS server, in response to the detecting, predicting, by the decoy management server, which credentials are compromised, based on credentials stored on the breached resource, and changing, by the decoy management server, those credentials that were predicted to be compromised, in response to the predicting which credentials.
US09690930B1	Detecting periodicity in a stream of events Sequences of discrete events, such as clicks on a website, are evaluated for periodic behavior, a period is calculated, and the sequence is scored to determine the confidence that the sequence really exhibits periodicity. The random variations on the timing of the discrete events due to transmission delays or other factors may be reduced or eliminated from the evaluation. An apparatus for performing the method of evaluation may include a computer programmed to carry out the method.
US09690928B2	Computing platform security methods and apparatus Computing platform security methods and apparatus are disclosed. An example apparatus includes a security application to configure a security task, the security task to detect a malicious element on a computing platform, the computing platform including a central processing unit and a graphics processing unit; and an offloader to determine whether the central processing unit or the graphics processing unit is to execute the security task; and when the graphics processing unit is to execute the security task, offload the security task to the graphics processing unit for execution.
US09690925B1	Consumption control of protected cloud resources by open authentication-based applications in end user devices A server computer system identifies a request from an application hosted on a mobile device to consume a protected resource hosted by a cloud. The request is transmitted via a resource authorization protocol. The server computer system identifies a token state of an application on the mobile device. The token state is stored in a policy data store that is separate from expiration data that is stored on an access token on the mobile device. The server computer system determines whether the token state violates a security policy that is associated with a user that is assigned to the mobile device and prevents consumption of the protected resource in response to a determination that the token state violates the security policy. The server computer system allows consumption of the protected resource in response to a determination that the token state does not violate the security policy.
US09690924B2	Transparent two-factor authentication via mobile communication device Two-factor authentication can be provided transparently to a user by virtue of proof information available at a mobile communication device. For example, after an access request for a service is sent, an authentication code can be intercepted from a responsive incoming message. The technologies can incorporate a cost proof as part of a cost optimization. Other features such as obfuscation and separate channels can be incorporated into the technologies to provide a superior user experience while implementing superior security.
US09690919B2	Allowing access to applications based on user capacitance Authenticating users comprises a computing device that receives a manual authentication input of a user and initiates a first user session between the user and the user computing device. The device communicates a request for a first user authorization data from an authentication technology associated with the one or more computing devices and receives the first user authentication data. The user or the device terminates the first user session and subsequently receives an input of the user to initiate a second user session. The device communicates a request for second user authentication data from the authentication technology and compares the first user authentication data and the second user authentication data. The device identifies a match of one or more features of the first user authentication data and one or more features of the second user authentication data and authorizes the user to conduct the second user session.
US09690914B2	Method of protecting computer program code Program code is modified to execute correctly only when code and data memory accesses/fetches are synchronised, i.e. data and code accesses/fetches are routed to identical physical addresses in computer memory. This indirectly defeats the MMU attack, in which code and data memory accesses/fetches to the same logical address are routed to different physical addresses. The program code is modified such that one or more sections of the code (“repair targets”) are deliberately broken so that the program code will not execute correctly, the repair targets being replaced at run time with correct code before the repair targets are executed.
US09690909B2	Methods and apparatus for programming a medical pump A controller for a programmable medical pump comprises a memory including a plurality of preloaded infusion therapies, each preloaded infusion therapy including a plurality of program parameters. The controller also includes a device receiving a selection of one of the preloaded infusion therapies, profile data corresponding to a specific patient, and values for the program parameters. The controller further includes a processor configured to determine which of the plurality of program parameters to associate with the selected preloaded infusion therapy, determine limits for the associated program parameters based upon the selected preloaded infusion therapy and the profile data, determine if the received values of program parameters exceed the determined limits, and responsive to determining that the values of the program parameters are within the determined limits, cause the selected preloaded infusion therapy to be administered via the medical pump using the received values for the program parameters.
US09690905B2	Dialysis treatment prescription system and method A dialysis system includes: a home dialysis machine located at a patient's home; a clinician computer associated with a dialysis center, the dialysis center located remotely from the home dialysis machine; a server in data communication with the home dialysis machine and the clinician computer; and wherein the system is configured and arranged for (i) treatment data to be sent by the home dialysis machine to the clinician computer via the server, and (ii) the treatment data to be analyzed to form a treatment prescription that is delivered to and used by the home dialysis machine to perform a subsequent treatment.
US09690903B2	Non-DICOM object attachment method and system Provided is a method and apparatus for storing content on a portable computer-readable medium. A computer system receives a request to store a medical image and additional data in a different format on the portable computer-readable medium. The medical image and the additional data to be stored are received in a computer memory, and an association is established between the additional data and the medical image so the additional data is stored with the medical image on the portable computer-readable medium. The medical image and the additional data are stored on the portable computer-readable medium with an application that, when executed by a user computer, grants a user access to both the medical image and the additional data on the portable computer-readable medium.
US09690902B2	Image observation apparatus to display medical images from a plurality of apparatus types The extraction unit extracts a plurality of medical images as a list display target from an image storage unit storing a plurality of medical images and an plurality of apparatus types in association with each other. The list generation unit generates a list in which a plurality of reduced images respectively corresponding to the plurality of extracted medical images are arranged. The plurality of reduced images are arranged for each apparatus type in the list, and the list clearly indicates a reduced image corresponding to a candidate image of the plurality of extracted medical images that is more likely to be used. The display displays the generated list.
US09690897B2	Efficient extraction for colorless multi patterning A method for parasitic capacitance extraction for integrated circuit (IC) designs fabricated involving multiple patterning that includes identifying, at a computing system, metal features in a metal layer of an IC design and generating, at the computing system, a graph based on spacing relationships between the metal features. The method further includes predicting, at the computing system, which metal features are to be formed by the same mask in the multiple patterning lithography process from the graph. The method further can include performing, at the computing system, a parasitic capacitance extraction analysis of the IC design utilizing the prediction of which metal features are to be formed by the same mask, and performing, at the computing system, timing analysis on the IC design utilizing the list of vertices sharing the same designators and the parasitic capacitance extraction calculations.
US09690894B1	Safety features for high level design This disclosure relates generally to electronic design automation using high level synthesis techniques to generate circuit designs that include safety features. The algorithmic description representation can be specified in a first language and include at least one programming language construct associated with a first safety data type. Compiling the algorithmic description may involve identifying the at least one construct, accessing a first safety data type definition associated with the first safety data type, and generating a second representation of the circuit design based on the algorithmic description representation and the first safety data type definition. The second representation can be provided in a second language and include at least one safety feature for a portion of the circuit design associated with the at least one construct.
US09690893B1	Methods and systems for customizable editing of completed chain of abutted instances Methods and systems of an electronic circuit design system described herein provide a new abutment tool in which a chain post-processing function is called once per resultant chain of abutted instances after each chain is fully formed in a layout. In an embodiment, a process design kit (PDK) abutment update function is enhanced to support a new chain processing event that facilitates a creation of new top level figures in a cell view in which the chain lives, and further facilitate adjustment of parameters of instances of programmable cells in the chain.
US09690891B2	Method and apparatus for facilitating manufacturing of semiconductor device A method for facilitating semiconductor device manufacturing may include the following steps: receiving a custom design data set, which complies with a first element-identification scheme; generating a compatible design data set using the custom design data set, wherein data elements in the compatible design data set correspond to data elements in the custom design data set, and wherein the compatible design data set is compatible with a dummy-pattern-data generation module; generating a first dummy-pattern data set using the dummy-pattern-data generation module and the compatible design data set; and generating a second dummy-pattern data set using the first dummy-pattern data set, wherein data elements in the second dummy-pattern data set correspond to data elements in the first dummy-pattern data set, and wherein the second dummy-pattern data set complies with the first element-identification scheme.
US09690885B2	Interactive visualization of reservoir simulation data sets A method, system, and computer-readable medium for providing a visualization of a model. The method includes receiving a grid of the model including cells representing space, time, or both in the model. The method also includes grouping at least some of the cells into first-level gridlets. The method also includes grouping at least some of the first-level gridlets into second-level gridlets. The method further includes determining a first upper limit of elements to send for display, based on a display system capability, and determining that the number of first-level gridlets exceeds the first upper limit, and that the number of second-level gridlets is less than or equal to the first upper limit. In response, the method includes selecting at least some of the second-level gridlets for display and omitting from display at least some of the cells and at least some of the first-level gridlets.
US09690883B2	Associating materials with bodies in a computer-aided design file Various disclosed embodiments include a method for integrating material assignments between a computer-aided design (CAD) system and a product data management (PDM) or product lifecycle management (PLM) system, the method performed by a data processing system and comprising accessing a designed part in the CAD system, wherein the designed part includes one or more geometric entity objects. The method also comprising assigning one or more assignment objects from the PDM system to each of the one or more geometric entity objects. The method further comprising associating one or more material objects from the PDM system with the one or more assignment objects, wherein the one or more material objects identify one or more materials identified from the designed part. The method comprising generating a design object in the PDM system representing the designed part based on the one or more assignment objects and the one or more material objects.
US09690879B2	Substrate processing apparatus, method of manufacturing semiconductor device, and method of generating recipe Provided is a method of automatically setting, in a recipe, a process parameter (PP) according to the number of substrates to be processed. The method includes (a) displaying a process parameter of a process recipe on a display unit; (b) displaying a parameter name in a process parameter file on the display unit; (c) generating a first recipe by substituting the process parameter with the parameter name; (d) downloading the first recipe and one of a plurality of condition tables corresponding to the selected number of substrates when the number of substrates to be processed in a processing chamber is selected; and (e) generating a second recipe by substituting the process parameter of the downloaded one of the condition tables for the parameter name in the downloaded first recipe.
US09690876B2	Method, apparatus, and computer program product for providing superviews of geospatial arrangements A method is provided for providing superviews of geospatial arrangements. Users may configure a superview by providing a unit(s) and filtering criteria. Subunits belonging to the unit(s) and satisfying the filtering criteria may be displayed in a graphical superview, including additional pertinent information relative to the subunits. The graphical superview may be updated automatically to reflect the most up to date information. A server may be preconfigured to receive a superview configuration and automatically cause the corresponding graphical superview to be displayed on a client device.
US09690873B2	System and method for bit-map based keyword spotting in communication traffic Methods and systems for locating occurrences of a search pattern in a body of text. A processor searches the text for one or more occurrences of a pattern. Both the text and the pattern comprise symbols of some alphabet. In preparation for the search, the processor defines a respective bit-map for each alphabet symbol. Using the bit-maps, the processor carries out a highly efficient process of searching the text for occurrences of the pattern. The processor then scans the pattern backwards using the bit-maps, symbol by symbol, attempting to match the symbols of the pattern to the corresponding symbols of the text. If a match is not found, the processor calculates the size of the jump to the next position in the text based on the accumulated results of the evaluations up to the current position.
US09690871B2	Updating features based on user actions in online systems Online systems, for example, social networking systems store features describing relations between entities represented in the online system. The information describing the features is represented as a graph. The online system maintains a cumulative feature graph and an incremental feature graph. Feature values based on recent user actions are stored in the incremental graph and feature values based on previous actions are stored in the cumulative graph. Periodically, the information stored in the incremental feature graph is merged with the information stored in the cumulative feature graph. The incremental graph is marked as inactive during the merge and information based on new user actions is stored in an active incremental feature graph. If a request for feature information is received, the feature information obtained from the cumulative feature graph, inactive incremental feature graph and the active incremental feature graph are combined to determine the feature information.
US09690868B2	Universal visitor identification system A tag management system can include features to assist in developing a cross-vendor profile for individual visitors to content pages of a content site. The visitors to the content site can obtain universal identifiers usable by the content site to identify the visitors. The universal identifiers can be included in the content pages by the visitor end user systems so that browser tags that may not have native access to the universal identifier can access the universal identifiers. The universal identifiers may then be provided to tag vendor systems with associated visitor data, thereby enabling the tag vendor systems to provide processed or raw data that can be compared by individual universal identifiers. Using this processed data, the content site can prepare the cross-vendor profile of individual visitors and realize insights that may be unavailable using conventional systems and methods.
US09690865B2	Providing access to a collection via a plurality of discrete machine-recognizable codes Systems and methods for providing access to a collection of related binary files via a collection of machine-recognizable codes provided on a device or consumer item.
US09690864B2	Method for managing user schedule and device using the same A method for managing user schedule and a device using the same are provided. The information stored in an external device is received and added to an existing user schedule. Accordingly, it is possible to integrally manage the user schedules scattered at different locations, and provide improved convenience of using user schedules.
US09690848B2	Multi-dimensional query expansion employing semantics and usage statistics Embodiments relate to systems and methods employing personalized query expansion to suggest measures and dimensions allowing iterative building of consistent queries over a data warehouse. Embodiments may leverage one or more of: semantics defined in multi-dimensional domain models, user profiles defining preferences, and collaborative usage statistics derived from existing repositories of Business Intelligence (BI) documents (e.g. dashboards, reports). Embodiments may utilize a collaborative co-occurrence value derived from profiles of users or social network information of a user.
US09690846B2	Intelligent navigation of a category system Enabling intelligent navigation is described, including: performing analysis of historical user activity data with respect to a query term to generate reference data associated with the query term; selecting a navigation recommendation model for the query term based at least in part on the reference data; using the reference data and the selected navigation recommendation model to determine a set of recommendation data associated with the query term, wherein the set of recommendation data includes at least a portion of a category system to be displayed in response to a subsequently received query including the query term.
US09690843B2	Data classification The present disclosure provides a method and an apparatus for storing data classification structure. Based on an initial classification structure tree, a reorganized classification structure tree that stores data classifications structure differently from that of the initial classification structure is generated. As the reorganized classification structure tree is flexible, when maintaining data and searching data by using the search engine, the present techniques may quickly find the desired data, thereby reducing the heavy burden of the search engine under the conventional techniques to conduct data search and high pressure of conducting data maintenance and data search. Further, the present techniques may not only reduce the burden of the search engine, but also relieve the pressure for maintaining data and searching data.
US09690834B2	Representation, comparison, and troubleshooting of native data between environments Methods for data management and corresponding systems and computer-readable mediums. A method includes receiving first native data in a first native format associated with a first native application. The method includes converting and storing the first native data in a transfer format as first transfer data. The method includes parsing the first transfer data to produce first converted data, in a converted format, that corresponds to the first native data. The method includes building a first native application model, corresponding to the first native data, according to the first converted data. The method includes displaying the first native application model in a view corresponding to the first native application.
US09690832B2	Enterprise reporting capabilities in storage management systems A method of refreshing a materialized view includes creating a materialized view based on a first result of a database query executed against a set of tables stored in a database and discovering a set of child storage objects associated with a parent storage object. The method also includes inserting, based on discovering the set of child storage objects, an entry into one or more tables of the set of tables, the entry including a child storage object of the set of child storage objects. The method further includes delaying a refresh of the materialized view until after the entry is inserted into the set of tables and then refreshing the materialized view, which is based on a second result of the database query executed against the set of tables.
US09690824B2	Methods and systems for searching a database of objects Methods and Systems for searching a database of Objects. Each Object is associated with a plurality of Attributes, each Attribute is associated with a Kind, and each Kind is associated with a plurality of Attributes. Search criteria comprising an Attribute is received. A Nonceattribute is created using the search criteria. A search utilizing the Nonceattribute is inputted. All Objects having the Nonceattribute are identified. All Attributes associated with the Objects are identified. All Kinds associated with the Attributes are identified. A ranking criterion is applied to identified Kinds and Attributes. The highest-ranked portion of the Kinds and the highest-ranked portion of the Attributes that can readably be shown in a search result display are displayed.
US09690822B2	System and method for metadata level validation of custom setup objects In one embodiment, a computer-implemented method executable by a server system to validate metadata of an application is provided. The method includes: receiving a custom metametadata object having a definition that specifies a format of metadata of an object, and having validation rules that specify a use of the custom metametadata object; generating a metadata record using the custom metametadata object; building an application using the metadata record; and validating the metadata record based on the validation rules of the metametadata object.
US09690821B2	Computer data system position-index mapping Described are methods, systems and computer readable media for position-index mapping in a computer data system.
US09690820B1	Database system for triggering event notifications based on updates to database records A data processing system is disclosed for accessing databases and updated data items and triggering event notifications. The data processing system may comprise a first database including a plurality of records, and a second database including a plurality of trigger indicators. The database system may further include a hardware processor configured to execute computer-executable instructions in order to: receive an update data item; identify a record corresponding to the update data item; cause an update to the record based on information included with the update data item; identify a trigger indicator corresponding to the update to the record; determine that a type of the trigger indicator matches a type of the update to the record; and generate an event notification including information included in the update.
US09690813B2	Tunable hardware sort engine for performing composite sorting algorithms Embodiments include methods, systems and computer program products for performing a composite sort on a tunable hardware sort engine includes determining desired sort performance parameters, configuring a composite sort engine based on the desired sort performance parameters, and receiving a plurality of keys having a payload associated with each of the plurality of keys. The method also includes reserving DRAM storage for each of the payloads, generating a tag for each of the plurality of keys, the tag identifying the DRAM storage reserved for each of the payloads, and storing the payloads in the portions of the DRAM storage. The method further includes generating a composite key for each of the plurality of keys, sorting the composite keys by the composite sort engine, and retrieving the payloads associated with the sorted composite keys from the DRAM storage. The method also includes outputting the payloads associated the sorted composite keys.
US09690811B1	Single repository manifestation of a multi-repository system Techniques are provided for manifesting a multiple repository system as a single repository to an application that is designed to use a single repository. According to one aspect, a particular container, which is used by the application to store data, is identified. One or more additional containers are created in one or more different repositories. Each of the additional containers is formatted to store the data that the application stores in the particular container. A construct is created. The construct is associated with the particular container's identifier. The construct causes information from the particular container and each of the additional containers to be combined to answer database commands that reference the particular container's identifier. As a result, data stored in a single repository can be distributed among multiple repositories, and the unmodified application can continue to access that data as though the data was stored in the single repository.
US09690803B1	Auxiliary files in a container file system A technique for storing support files in a data storage apparatus provides auxiliary files in a container file system. The container file system stores a container file that provides a file-based realization of a data object, such as an entire file system, LUN, or vVOL, for example, and stores one or more auxiliary files in the container file system alongside the container file. Thus, an auxiliary file that supports an application program's operations on a data object resides in the same fault domain with the container file that realizes the data object.
US09690799B2	Unified architecture for hybrid database storage using fragments Data records of a data set can be stored in multiple main part fragments retained in on-disk storage. Each fragment can include a number of data records that is equal to or less than a defined maximum fragment size. Using a compression that is optimized for each fragment, each fragment can be compressed. After reading at least one of the fragments into main system memory from the on-disk storage, an operation can be performed on the fragment or fragments while the in the main system memory.
US09690798B2	System and method for organizing files based on a unique identification code A system for determining a time that a file was created and associating an ID with the file based on the file creation time is disclosed. The system adjusts the creation time by a time zone offset. In the case of image files, the file creation time may be based on information associated with the image: (1) by the camera that took the picture (exchangeable image file data); (2) when the photo was last modified in memory (file modification time data); (3) based on the raw date and time the photo file was created (file date-time data); and (4) when the photo was imported onto a client device. The system may rename the file with this adjusted creation time to create a standardized name. As a result, the standardized name provides a filename nomenclature that is based on the actual or estimated time of when the file was created.
US09690797B2	Digital information analysis system, digital information analysis method, and digital information analysis program A digital information analysis system includes a target selection unit that selects target digital information, a combination storage unit that stores each of a plurality of word combinations related to a predetermined specific item, a search unit that searches whether the plurality of word combinations stored in the combination storage unit are included in the target digital information selected by the target selection unit, a relation determination unit that determines the relation of the target digital information to the predetermined specific item on the basis of a morphological analysis result when the plurality of word combinations stored in the combination storage unit are included in the target digital information, and a determination result setting unit that associates the determination result of the relation determination unit with the target digital information.
US09690793B2	Indirection data structures to manage file system metadata Described herein are systems, methods, and software to manage file system metadata in a data storage device. In one example, a data storage device includes a first storage zone, a shingled magnetic recording (SMR) zone, and a storage control system. The storage control system is configured to maintain file system metadata in a metadata location of the first storage zone for user data in the SMR zone. The storage control system is further configured to, responsive to a usage condition being satisfied for the file system metadata in the metadata location, identify metadata locations in the SMR zone to redirect and store the file system metadata. The storage control system is also configured to maintain an indirection data structure in the metadata location of the first zone that correlates the metadata locations in the SMR zone to the file system metadata.
US09690790B2	Method and apparatus for efficiently merging, storing and retrieving incremental data In a method and apparatus for retrieving data from a snapshot data storage system, for each epoch, a snapshot including (i) all changed data, and (ii) an index is created. The index includes an entry for each page that has changed during the epoch. For rapidly retrieving the data as of any given time, the method creates a hash table that includes an entry for each data page that has changed since the baseline was created. The hash table entry indicates the epoch in which the data most recently changed and an offset corresponding to the location of the changed data in the corresponding snapshot. The hash table is created by inserting an entry for each page in the most recent index, and then examining the remaining indices for all other snapshots from the most recent to the oldest snapshot and adding any non-duplicate entries into the table.
US09690789B2	Archive systems and methods Archive systems and methods are presented. In one embodiment, an archival information storage configuration method comprises: performing an information accessing process including determining if the information is associated with an archive process; and performing an archive storage boundary determination process including establishing archive storage boundaries based upon characteristics indicating potential sharing of the information and potential impacts on performance of archival storage operations. In one exemplary implementation, the archive storage boundary determination process comprises: performing an information mining process including identifying an indication the information is potentially shared; and performing an archival boundary selection process including selecting an archive storage boundary based in at least part upon results of the information mining process.
US09690787B2	Contents management system, contents management method, and computer program A contents management system manages multiple contents stored in a plurality of apparatuses. The contents management system includes a command input unit that assigns a viewing style for guiding a user to desired contents and a contents search condition; a screen format generating unit that generates a screen format according to the assigned viewing style; a contents search unit that searches a contents providing space constituted by the plurality of apparatuses, each storing contents, according to the assigned search condition; and a contents presenting unit that displays and outputs information on the individual contents searched by the contents search unit on the screen format through mapping.
US09690784B1	Culturally adaptive avatar simulator An avatar interaction system that solicits the end user to provide a cultural profile and automatically filters or translates responses through the avatar in a manner compatible with the cultural profile designated. End users may selected from a plurality of gender, race, and ethnically identifiable anthropomorphic forms to self-identify with a cultural profile. Gestures having cultural significance are identified, suppressed, and/or modified according to the currently enabled cultural profile of the end user.
US09690780B2	Document translation based on predictive use In a method for document analysis, receiving a request to translate a document, identifying usage information corresponding to the document, wherein the usage information includes information corresponding to a current viewing session of the document and historical usage information corresponding to one or more previous viewing sessions of the document, and determining one or more sections of the document to translate based on the identified usage information corresponding to the document.
US09690779B2	Quasi natural language man-machine conversation device base on semantic logic The presented is a tool and method for language presentation, browsing, editing, translation and communication based on Semantic Web, to be utilized as interface for collaborating software products and services or human-machine interaction. The conceptual system is extended to further include such objects as language components, sentence patterns or syntax rules, to get solutions for semantic logic representation devices, language presentation devices, semantic-language converting devices, the registry and delegation system, in forming a language-component-based system for browsing, editing, conversion and communication. It is always allowed to bring need-based control over the conceptual system and the registry with their scope and scale being kept at appropriate level; with a widespread community participation, the establishment of semantic-language converting device ecosystem will be important guarantee of a flexible and diversified language expression system; therefore to constitute the core of those pragmatic standards or specifications for machine translation, human-machine interface and the web system.
US09690777B1	Translating website listings and propagating the translated listings to listing websites in other regions A method and system for translating and propagating listings amongst listing websites is provided. In an embodiment, a request is received to propagate listings from a first listing website. Application server interface instructions are executed to make calls to APIs of a first listing website server for one or more listings. One or more listings in a first language are received from the first listing website and translated into one or more second languages. The translations are then used to generate one or more second listings for one or more second listing websites.
US09690776B2	Contextual language understanding for multi-turn language tasks Methods and systems are provided for contextual language understanding. A natural language expression may be received at a single-turn model and a multi-turn model for determining an intent of a user. For example, the single-turn model may determine a first prediction of at least one of a domain classification, intent classification, and slot type of the natural language expression. The multi-turn model may determine a second prediction of at least one of a domain classification, intent classification, and slot type of the natural language expression. The first prediction and the second prediction may be combined to produce a final prediction relative to the intent of the natural language expression. An action may be performed based on the final prediction of the natural language expression.
US09690774B1	Identifying vague questions in a question-answer system An approach is provided that improves a question answering (QA) computer system by reducing a number of vague questions submitted to the QA system. When a question is submitted to the QA system, the approach performs a vagueness question analysis on the question. The vagueness question analysis results in a vagueness score. The question is submitted to the QA system in response to the vagueness score reaching a threshold value that indicates a lack of vagueness in the question. The approach inhibits submission of the question to the QA system in response to the vagueness score failing to reach the threshold value.
US09690773B1	Associating one or more terms in a message trail with a task entry Methods and apparatus related to determining an association between a message trail and a task entry of a user and associating an n-gram with the task entry, wherein the n-gram is based on one or more messages of the message trail. A similarity score between the n-gram and one or more aspects of the associated task entry may be determined. The similarity score may be utilized, for example, to determine when to associate the n-gram with the task entry and/or how to utilize the associated n-gram with the task entry.
US09690772B2	Category and term polarity mutual annotation for aspect-based sentiment analysis Systems and methods for aspect-based opinion mining including identifying the polarity (e.g., positive, negative, etc.) of different features of a product or a service as expressed in a text. This general task can be divided into four sub-tasks: identifying the aspect terms, classifying them into one of a set of predefined aspect categories, and identifying the polarity of the aspects terms and the aspect categories. A combination of systems (e.g., rule-based and machine learning based) can be employed to implement aspect category and aspect term polarity mutual annotation for aspect-based sentiment analysis.
US09690766B2	Method for generating random content for an article A method for generating random content for applying said generated random content to a surface of an article and/or as content for a screen saver type of use may be described and disclosed. Randomized elements generated may be selected from one or more of the group comprising: logographs of an Asian alphabet, logographs of a Chinese alphabet, letters of a letter based alphabet, words from a dictionary, and the like. The article may comprise a tangible physical object capable of surface ornamentation. For example, and without limiting the scope of the present invention, the article may be selected from the group comprising: walls, canvas, paper, wall paper, vinyl, plastics, stickers, decals, fabric, textiles, upholstery, clothing, apparel, drinking glasses, and the like.
US09690764B1	Delivery and display of page previews using shadow DOM A content server retrieves the code and other content of a page and generates a preview of the page. The page preview could be an image that depicts a snapshot of the page, such as a screenshot, or an image map that includes links selectable by a user. The content server further modifies the original code used to load the page such that the modified code instructs a browser application to render and display the page preview for a first period of time and to render and display the actual page in place of the page preview after the first period of time. The content server may use the shadow document object model (DOM) framework to provide the page preview.
US09690758B2	Method and system for supporting an electronic book application service, and mobile device adapted to the method A method and system for supporting an electronic book (e-book) application service and a mobile device adapted to the method are provided. The method includes reproducing an e-book stored in a storage unit, creating, when a number of words related to place names are selected in the e-book, e-book auxiliary content that includes information regarding a map to which information regarding routes between locations corresponding to the selected words is applied, with respect to at least one page containing the selected words, and storing the e-book with the e-book auxiliary content in the storage unit.
US09690750B2	Arithmetic device, arithmetic method, and wireless communication device An arithmetic device including: a plurality of parallel processors, and a processor configured to control the plurality of parallel processors so as to calculate an approximate solution of an equation by using a first algorithm and a second algorithm switchably, each of the first algorithm and the second algorithm being algorithms providing an iterative method, the second algorithm causing a divergence more likely than the first algorithm, the second algorithm being performed more efficiently by the plurality of parallel processors than the first algorithm, the first algorithm and the second algorithm being switched each other between at least one pair of iterative steps of the iterative method.
US09690748B1	Delivering notifications to background applications Described herein are systems and methods providing notifications to an application in a background state on a device such as a user device. The device may be resource constrained such as having limited memory, processor, power, or other resources for execution of applications. While in a background state, notifications from other applications may be sent to the application in the background state. To other applications, the application in the background state may appear to be operating in the foreground.
US09690746B1	Computing devices for sending and receiving configuration information A computing device configured for sending configuration information is described. The computing device includes a processor and instructions stored in memory that is in electronic communication with the processor. The computing device obtains access information. The computing device further generates a graphic based on the access information. The computing device also receives a configuration information request associated with the graphic. Additionally, the computing device sends the configuration information.
US09690744B2	Information processing apparatus and method for hot plug An information processing apparatus of the embodiment includes: a data storage unit to store a virtual address in association with first information that includes at least identification information of a slot; and circuitry. And the circuitry is configured to: detect an interrupt that notifies an operating system that a first PCI card was replaced and is output from a second PCI card by which the first PCI card was replaced on a certain slot; extract, from the data storage unit, a virtual address associated with first information that includes identification information of the certain slot, upon detecting the interrupt; and set the second PCI card so as to communicate using the extracted virtual address.
US09690741B2	Configuration via high speed serial link Mechanisms and techniques for configuring a configurable slave device using a high speed serial link where a different number of lanes of the high speed serial link are used to send data between the slave device and a master device, depending on whether the slave device is in configuration mode or in normal operations mode, are provided.
US09690737B2	Systems and methods for controlling access to a shared data structure with reader-writer locks using multiple sub-locks A computer system for controlling access to a shared data structure includes a shared memory coupled to first and second processing units that stores a multi-lock to control access to a shared data structure. The multi-lock includes a first sub-lock associated with the first processing unit and a second sub-lock associated with the second processing unit The system also includes a data access control engine to receive a request to read from the data structure from the first processing unit and, as a result, determine whether a privately modifiable copy the first sub-lock exists in a first cache dedicated to the first processing unit, acquire a read portion of the first sub-lock and not communicate the acquisition across a coherence bus if a privately modifiable copy of the first sub-lock exists in the first cache, and if a privately modifiable copy of the first sub-lock does not exist in the first cache, load the first sub-lock into the first cache if no copy is in the first cache, shootdown other copies of the first sub-lock, and acquire the read portion of the first sub-lock.
US09690736B2	Managing state transitions of a data connector using a finite state machine A microprocessor within a processing unit is configured to manage to operation of a finite state machine (FSM) that, in turn, manages the operation of a data connector. The FSM may be a hardwired chip component that adheres to a communication protocol associated with the data connector. The microprocessor is configured to execute a software application in order to (i) apply configuration changes to the processing unit during state transitions initiated by the FSM and (ii) cause the FSM to initiate specific state transitions.
US09690731B2	Apparatus, system and method of protocol adaptation layer (PAL) communication to indicate transitioning a device to a default state Some demonstrative embodiments include apparatuses, systems and/or methods of transitioning a device to a default state. For example, an apparatus may include a first Protocol Adaptation Layer (PAL) communication unit to communicate PAL traffic with a second PAL communication unit over a communication link, the PAL traffic comprising traffic of a PAL connection over a PAL, the PAL is above a layer of the communication link, wherein the first PAL communication unit is to communicate a device reset request and a device reset response with the second PAL communication unit over the communication link, the device reset request indicating transitioning of a peripheral device to a default state, the device reset response in response to the device reset request, the device reset response indicating whether the device reset request is successfully handled.
US09690730B2	Register slicing circuit and system on chip including the same A register slicing circuit includes first and second register circuits, a forward channel and a backward channel. The first and second register circuits sequentially store requests received from a plurality of master devices to output the stored requests toward a slave device. The forward channel is used for sending a first request from the first register circuit to the second register circuit, and the backward channel is used for sending back a second request from the second register circuit to the first register circuit.
US09690729B2	Tablet computer dock A tablet computer dock for use in a passenger vehicle is configured to support a tablet computer for use or storage inside the passenger vehicle. The tablet computer dock illustratively includes a tablet receiver that defines a compartment sized to receive a tablet computer. The compartment is accessible through a slot sized to allow the tablet computer to pass into and out of the compartment.
US09690725B2	Camera control interface extension with in-band interrupt Master and slave devices may be coupled to a control data bus. A method includes controlling data transmissions over a bus from a master device, where data bits are transcoded into symbols for transmission across two lines of the bus and a clock signal is embedded within symbol transitions of the data transmissions, and providing an interrupt period, during which one or more slave devices coupled to the bus can assert an interrupt request on a first line of the bus, within part of a heartbeat transmission by the master device over the first line and a second tine of the bus. The interrupt request may be an indicator that the asserting slave device wishes to request some action by the master device.
US09690723B2	Semiconductor device for performing test and repair operations A semiconductor device may include: a storage unit configured to store program codes provided through control of a processor core; and a control unit configured to perform a control operation on a semiconductor memory device according to the program codes.
US09690722B2	Memory controller and memory access method A memory controller (10) for a plurality of banks of memory (55a-55c) is disclosed. The memory controller (10) includes an interface (20) connectable to a bus (60) to communicate with a processor (70). The memory controller (10) redundantly maps the plurality of banks of memory (55a-55c) to a memory space (50) and includes a plurality of memory operators, each of the plurality of memory operators being executable by the memory controller for performing a different function on data in the memory space (50) and/or one or more of the plurality of banks of memory (55a-55c). In response to receipt at the interface (20) of a request from the processor (70) for one of said memory operators, the memory controller (10) is configured to execute, independently of the processor (70), the respective memory operator on the memory space (50) and/or one or more of the plurality of banks of memory (55a-55c).
US09690719B2	Mechanism for managing access to at least one shared integrated peripheral of a processing unit and a method of operating thereof The present application relates to a mechanism for managing access to at least one shared integrated peripheral of a processing unit and a method of operating thereof. The mechanism is operative in an available state and a locked state. The mechanism comprises at least one context register and a bus interface for receiving a request. A filtering unit obtains information relating to a context of the received request. If in the available state, a managing unit loads the context register with the obtained context information; and grants access in response to the received request. If in the locked state, the managing unit detects whether the obtained context information matches with the context information stored in the context register; and if the obtained and stored context information match, grants access in response to the received request. Otherwise, access is denied.
US09690715B2	Selecting hash values based on matrix rank One embodiment of the present invention includes a hash selector that facilitates performing effective hashing operations. In operation, the hash selector creates a transformation matrix that reflects specific optimization criteria. For each hash value, the hash selector generates a potential hash value and then computes the rank of a submatrix included in the transformation matrix. Based on this rank in conjunction with the optimization criteria, the hash selector either re-generates the potential hash value or accepts the potential hash value. Advantageously, the optimization criteria may be tailored to create desired correlations between input patterns and the results of performing hashing operations based on the transformation matrix. Notably, the hash selector may be configured to efficiently and reliably incrementally generate a transformation matrix that, when applied to certain strides of memory addresses, produces a more uniform distribution of accesses across caches lines than previous approaches to memory addressing.
US09690707B2	Correlation-based instruction prefetching The disclosed embodiments provide a system that facilitates prefetching an instruction cache line in a processor. During execution of the processor, the system performs a current instruction cache access which is directed to a current cache line. If the current instruction cache access causes a cache miss or is a first demand fetch for a previously prefetched cache line, the system determines whether the current instruction cache access is discontinuous with a preceding instruction cache access. If so, the system completes the current instruction cache access by performing a cache access to service the cache miss or the first demand fetch, and also prefetching a predicted cache line associated with a discontinuous instruction cache access which is predicted to follow the current instruction cache access.
US09690705B1	Systems and methods for processing data sets according to an instructed order Described herein are systems and methods to process efficiently, according to a certain order, a plurality of data sets arranged in data blocks. In one embodiment, a first compute element receives from another compute element a first set of instructions that determine an order in which a plurality of data sets are to be processed as part of a processing task. Relevant data sets are then streamed into a cache memory associated with the first compute element, but the order of streaming is not by order of storage but rather by the order conveyed in the first set of instructions.
US09690704B2	Paging in secure enclaves Embodiments of an invention for paging in secure enclaves are disclosed. In one embodiment, a processor includes an instruction unit and an execution unit. The instruction unit is to receive a first instruction. The execution unit is to execute the first instruction, wherein execution of the first instruction includes evicting a first page from an enclave page cache.
US09690701B1	Probabilistic, parallel collection of memory no longer in use A computer-implemented method includes performing, by each of a plurality of crawlers, a random walk of a plurality of objects in a heap, where the plurality of objects are memory objects allocated for execution of an application. A timestamp of each object of the plurality of objects is updated, when the object is visited by a crawler of the plurality of crawlers. Garbage is identified, by a computer processor, based at least in part on the timestamp of each object of the plurality of objects. The garbage is reclaimed.
US09690698B2	Controller including map table, memory system including semiconductor memory device, and method of operating the same A memory system and a method of operating the same are provided. The method includes storing a first map table including a mapping relation between first physical addresses specifying pages of memory blocks having multi-level cells and first logical addresses, storing first logical address groups of the first logical addresses as meta information, determining a second logical address group of a request address, detecting whether the second logical address group is in the first logical address groups of the meta information, and searching for the request address in the first map table based on the detecting result.
US09690696B1	Lifetime extension of memory for data storage system Memory lifetime extension for a data storage system having a first memory and a second memory includes determining a plurality of age-adjusted access values for a data block stored in the first memory based on access of the data block and at least one aging weight, determining an overall access value for the data block based on the plurality of age-adjusted access values, and determining if at least a portion of the data block should be stored in a cache memory of the second memory based on the overall access value. The at least one aging weight can be dynamically adjusted based on an expected remaining practical usable life of the second memory.
US09690694B2	Apparatus, system, and method for an address translation layer An apparatus, system, and method are disclosed for storage address translation. The method includes storing, in volatile memory, a plurality of logical-to-physical mapping entries for a non-volatile recording device. The method includes persisting a logical-to-physical mapping entry from the volatile memory to recording media of the non-volatile recording device. The logical-to-physical mapping entry may be selected for persisting based on a mapping policy indicated by a client. The method includes loading the logical-to-physical mapping entry from the recording media of the non-volatile recording device into the volatile memory in response to a storage request associated with the logical-to-physical mapping entry.
US09690690B1	Scalable transitive violation matching Methods for reducing storage and performing static analysis on violations across code base revisions are disclosed. An example method begins with receiving a child snapshot representing a code base at a specific revision. A parent snapshot is identified. Then, canonical representations for violations representing coding defects in the parent and child snapshots are computed. An example method determines matching violations between the snapshots, unmatched parent violations, and unmatched child violations. For matching violations that have different canonical representations, a mapping between the parent snapshot violation and the child snapshot violation is stored using their respective canonical representations. For unmatched parent violations, each violation's canonical representation is stored with an indication that the violation has been eliminated from the child snapshot. For unmatched child violations, each violation's canonical representation is stored with an indication that the violation has been introduced in the child snapshot.
US09690689B2	Test case generation in a development environment A development system comprises a user interface component and a customization component configured to receive developer customization inputs and to customize a portion of a computing system based on the developer customization inputs. The portion comprises types modeled in the computing system. The development system also comprises a test generation component configured to identify a test value by accessing a test knowledge set based on the types, control the user interface component to generate a user interface display that displays an indication of the test value, and generate a test for the portion of the computing system.
US09690686B1	Method for setting breakpoints in automatically loaded software Aspects of the present invention provide a system and method for a user of an event-driven simulator to specify breakpoint conditions in kernel modules, startup processes, shared libraries, and other automatically loaded software elements before the target environment is initialized. The virtual platform detects specified breakpoints when a file is loaded onto a virtual platform debugger during startup of the environment or initialization of the relevant processes. The virtual platform debugger may scan for specified breakpoints in all loaded source code files, in only those source code files that are automatically loaded, or in only those source code files specified by the designer as modified.
US09690677B2	Transmission device, transmission system, and transmission method A first transmission device transmits a signal to a third transmission device by using an active line and a spare line. The first transmission device includes a CRC generator and an SN adder. The CRC generator calculates the CRC value of the signal. The SN adder stores, in a FCS byte filed in the signal, the FCS calculated value obtained by adding the SN representing consecutiveness of the signal to the CRC value. Furthermore, the first transmission device outputs the signal in which the FCS calculated value is stored to the second transmission device by using the active line and the spare line.
US09690674B2	Method and system for robust precision time protocol synchronization A method and system for maintaining clock synchronization in a communication network having multiple clocks are disclosed. According to one aspect, the invention provides a first precision time protocol (PTP) instance and second PTP service instance. Dynamic PTP parameters and tuning PTP parameters are periodically cloned from the first PTP service instance to the second PTP service instance substantially in real time.
US09690673B2	Single and double chip spare Techniques are provided for overcoming failures in a memory. One portion of the memory may operate in a single chip spare mode. Upon detection of an error in a single chip in the portion of the memory, a region of the portion of the memory may be converted to operate in a double chip spare mode. The memory may be accessed in both single and double chip spare modes.
US09690672B2	Acquiring diagnostic data selectively One or more processors execute one or more software commands that are capable of command failure on one or more computing devices. One or more processors detect one or more failed commands as a result of executing the one or more software commands. One or more processors determine whether the one or more failed commands are a first type of command failures that result from a first type of software commands. One or more processors reissue the one or more failed commands that are determined to be the first type of software commands at least once while at least one diagnostic program is executing. One or more processors capture diagnostic data for the one or more failed commands that are determined to be the first type of software commands.
US09690671B2	Manifest-based snapshots in distributed computing environments Scalable architectures, systems, and services are provided herein for creating manifest-based snapshots in distributed computing environments. In some embodiments, responsive to receiving a request to create a snapshot of a data object, a master node identifies multiple slave nodes on which a data object is stored in the cloud-computing platform and creates a snapshot manifest representing the snapshot of the data object. The snapshot manifest comprises a file including a listing of multiple file names in the snapshot manifest and reference information for locating the multiple files in the distributed database system. The snapshot can be created without disrupting I/O operations, e.g., in an online mode by various region servers as directed by the master node. Additionally, a log roll approach to creating the snapshot is also disclosed in which log files are marked. The replaying of log entries can reduce the probability of causal consistency in the snapshot.
US09690668B2	Data boundary identification A system and method obtain a set of data and identify successive subsets of data within the set of data. A boundary identifying hash is calculated on a subset of data and compared with a boundary indicating value. If the calculated boundary identifying hash matches the boundary indicating value, a natural boundary is identified in the set of data.
US09690665B2	Relay device, relay method, computer-readable recoding medium having stored therein relay program, and relay system A relay device includes a first storage unit, a second storage unit and a processor. The processor extracts a duplication pattern, which is an identical portion between data stored in the first storage unit in the past and data received currently. Also, the processor executes a process of storing the currently received data in the first storage unit and a process of associating an identifier with the extracted duplication pattern and storing the duplication pattern and the identifier in the second storage unit. Further, the processor edits data into edited data in which a duplication pattern included in the data has been replaced with the identifier associated with the duplication pattern when the data including a duplication pattern stored in the second storage unit has been received from a first device. Then, the processor transfers the edited data to a second device.
US09690661B2	Non-volatile memory devices and controllers For single-level cell flash memories and multi-level cell flash memories, different operations can be performed according to their stability when an abnormal status is terminated. Specifically, for the multi-level cell flash memories, when the abnormal status is terminated, a now physical block is used to proceed with write operation, and the previous physical block(s) would not be written any more. On the contrary, for the single-level cell flash memories, when the abnormal status is terminated, the controller needs to perform corresponding operations on the last physical page of the previous physical block(s).
US09690656B2	Data encoding on single-level and variable multi-level cell storage A method of encoding data on single level or variable multi-level cell storage includes receiving a block of encoded data from an approximation-aware application and at least an importance attribute associated with the block of encoded data; and assigning the block of encoded data to a memory address or a particular region of a memory having at least three precision levels, based at least according to the importance attribute. The importance attribute indicates a relative sensitivity of bits of the block to errors in an output quality from decoding the encoded data. An approximation-aware application can be an image encoding application having a modified entropy encoding step that enables identification and splitting of bits into groupings according to sensitivity to errors.
US09690655B2	Method and system for improving flash storage utilization by predicting bad m-pages A method for managing persistent storage. The method includes selecting a page for a proactive read request, where the page is located in the persistent storage. The method further includes issuing the proactive read request to the page, receiving, in response to the proactive read request, a bit error value (BEV) for data stored on the page, obtaining a BEV threshold (T) for the page, wherein T is determined using a program/erase cycle value associated with the page and a retention time of the data stored on the page, making a first determination that the BEV is greater than T, based on the first determination: identifying an m-page, where the m-page is a set of pages and the page is in the set of pages, and setting the m-page as non-allocatable for future operations.
US09690652B2	Search device and search method searching data based on key According to one embodiment, a search device includes a first comparison module, a determination module, a correction module, a second comparison module, and a search module. The first comparison module compares a received first key with a second key read from a nonvolatile memory. The determination module determines whether error correction is possible based on a first comparison result obtained by the first comparison module. The correction module generates a third key by applying an error correction process to the second key if the determination module determines that error correction is possible. The second comparison module compares the first key with the third key. The search module reads data associated with the second key in the nonvolatile memory if a second comparison result obtained by the second comparison module shows a match.
US09690649B2	Memory device error history bit Classifying memory errors may include accessing data from a location within a memory array of a memory device. The memory array may include at least one bit field to store memory error classification information. One or more memory errors in the data may be determined. One or more memory errors may further be classified. In response to the classifying, memory error classification information may be stored as one or more bit values within the bit field.
US09690644B2	Cognitive analysis for healing an IT system A cognitive computing hardware system receives an error log from an IT system. The error log comprises a record of errors currently being detected by sensors in the IT system. The cognitive computing hardware system receives an error history log, which describes a history of past errors that have occurred in the IT system. The cognitive computing hardware system receives a listing of alternative IT systems that have been predetermined to have a same functionality as the IT system that is currently experiencing the errors. The cognitive computing hardware system receives a record of real-time events that are external to the IT system, and generates a prioritized set of solutions to heal the IT system, based on the error history log, the listing of alternative IT systems, and the record of real-time events. The cognitive computing hardware system transmits a highest prioritized solution to the IT system.
US09690642B2	Salvaging event trace information in power loss interruption scenarios Salvaging event trace information in power loss interruption (PLI) scenarios, for use in solid-state drive (SSD) and hard disk drive (HDD) storage devices. If volatile state information that is salvaged after an inadvertent power loss were to include event trace information, then such information can provide a valuable debug resource. Event trace information from volatile memory is copied to a second memory upon a power on which is in response to a PLI event. A corrupt state of context reconstruction data stored on non-volatile memory is detected, and an indication of the corrupt state is set. The event trace information is passed to the host if requested based on the indication.
US09690638B2	System and method for supporting a complex message header in a transactional middleware machine environment A flexible transactional data structure can be used to store message header in a transactional middleware machine environment. The flexible transactional data structure can have dynamic numbers of fields and is accessible via specified IDs. The message header can include a first data structure that stores address information for accessing a client using a first message queue, and a second data structure that stores address information for accessing a client using a second message queue. The first type of server operates to use only the first data structure to obtain the address information for accessing the client using the first message queue. The second type of server operates to obtain a key from the first data structure first, and then use the key to obtain from the second data structure the address information for accessing the client using the second message queue.
US09690636B2	Apparatus and method of data communication between web applications A method and apparatus for data communication between web applications by using a web browser. The web browser includes a web application controller for executing a first web application and a second web application, and a data transferring unit for receiving the data from the first web application and transmitting the data to the second web application.
US09690635B2	Communicating behavior information in a mobile computing device Methods, systems and devices for communicating behavior analysis information using an application programming interface (API) may include receiving data/behavior models from one or more third-party network servers in a client module of a mobile device and communicating the information to a behavior observation and analysis system via a behavior API. The third-party servers may be maintained by one or more partner companies that have domain expertise in a particular area or technology that is relevant for identifying, analyzing, classifying, and/or reacting to mobile device behaviors, but that do not have access to (or knowledge of) the various mobile device sub-systems, interfaces, configurations, modules, processes, drivers, and/or hardware systems required to generate effective data/behavior models suitable for use by the mobile device. The behavior API and/or client modules allow the third-party server to quickly and efficiently access the most relevant and important information on the mobile device.
US09690633B2	Synchronization method A synchronization method of multiple threads is executed by a computer. The synchronization method includes determining a type of a synchronization process of a first thread performing the synchronization process for synchronization with a second thread; starting time measurement when the type of the synchronization process of the first thread is a first type; performing the synchronization process of the first thread and a synchronization process of the second thread based on a synchronization process history of the second thread when the measured time exceeds a permitted response period of the first thread; and updating the permitted response period and performing the synchronization processes of the first thread and the second thread based on the synchronization process history of the second thread, when another processing request is received.
US09690629B1	Distributed batch matching of videos based on recency of occurrence of events associated with the videos Distribution of various processing tasks is performed for a plurality of comparison objects, such as videos and/or other media content in a matching system. The plurality of comparison objects can include at least one feature that is compared to at least one feature of a plurality of reference objects to determine whether a match occurs in the comparison. Task descriptions corresponding to the processing tasks are distributed with the different processing tasks to a task pool. Matching components select at least one task from the task pool based on the task descriptions.
US09690626B2	Processing workloads in single-threaded environments A computer implemented method for assigning workload slices from a workload to upcoming frames to be processed during the rendering of the upcoming frames. The processing time of upcoming frames and workload slices varies at runtime according to system resources The method determines an effective frame rate that estimates the duration of an upcoming frame and also determines an effective slice rate that estimates the time it takes to complete an upcoming workload slice. Based on the effective frame rate and the effective slice rate, the method then calculates the slice-to-frame ratio which defines the rate in which slices are assigned to upcoming frames. The slice-to-frame ratio can dynamically change to accommodate for changes to the processing time of rendered frames and completed workload slices.
US09690625B2	System and method for out-of-order resource allocation and deallocation in a threaded machine A system and method for managing the dynamic sharing of processor resources between threads in a multi-threaded processor are disclosed. Out-of-order allocation and deallocation may be employed to efficiently use the various resources of the processor. Each element of an allocate vector may indicate whether a corresponding resource is available for allocation. A search of the allocate vector may be performed to identify resources available for allocation. Upon allocation of a resource, a thread identifier associated with the thread to which the resource is allocated may be associated with the allocate vector entry corresponding to the allocated resource. Multiple instances of a particular resource type may be allocated or deallocated in a single processor execution cycle. Each element of a deallocate vector may indicate whether a corresponding resource is ready for deallocation. Examples of resources that may be dynamically shared between threads are reorder buffers, load buffers and store buffers.
US09690621B2	Multitasking method and electronic device therefor A multitasking method of changing a state of an application changed to a background program of a lower priority to a freeze state which is a sleep mode or execute the application continuously in an unfreeze state which is an operation mode according to identification information, an activation state, etc. of the corresponding application to perform a multitasking operation and an electronic device therefor are provided. The method includes changing a first application program to a background program of a lower priority and executing a second application program as a foreground program of a higher priority and determining whether to change a state of the first application program changed to the background program to a freeze state which is a sleep mode or execute the first application program continuously in an unfreeze state which is an operation mode according to identification information of the first application program.
US09690615B2	Live migration of virtual machines from/to host computers with graphics processors Apparatuses, methods and storage medium associated with live migration of virtual machines (VMs) from/to host computers with graphics virtualization are disclosed herein. In embodiments, an apparatus may include a virtual machine monitor (VMM) having a memory manager to manage accesses of system memory of the apparatus, including tracking of modified memory pages of the system memory. Additionally, the VMM may include a graphics command parser to analyze graphics commands issued to a graphics processor (GPU) of the apparatus to detect writes to the system memory caused by the graphics commands, and augment the tracking of modified memory pages. Further, the VMM may include a live migration function to live migrate a VM to another apparatus, including provision of current memory content of the VM, utilizing modified memory pages tracked by the memory manager, as augmented by the graphics command parser.
US09690613B2	Using diversity to provide redundancy of virtual machines Concepts and technologies are disclosed herein for using diversity to provide redundancy of virtual machines. A server computer that executes an orchestrator application can receive a virtual machine instantiation request. The server computer can analyze the request to determine needs associated with a virtual machine (including a redundancy requirement). The server computer can obtain resource availability data that indicates availability of resources and includes diversity data used to provide diversity-based redundancy of the virtual machine. The server computer can identify a pool of resources and identify, among the pool, two or more resources. The two or more resources can include a most diverse group of resources of the pool of resources and can be identified based upon the diversity data. The server computer can trigger instantiation of the virtual machine and a copy of the virtual machine on the resources.
US09690611B2	Combining blade servers based on workload characteristics To perform a workload, a plurality of virtual machines (VMs) may be assigned to a plurality of blade servers. To assign the VMs, a computing system uses the characteristics of the workloads that will be executed by the virtual machines such as the number of processors or the amount of memory, storage the workload is estimated to use, and the like. Based on these workload characteristics, the computing system determines an optimal solution for deploying the VMs onto the blade servers. In one embodiment, the computing system determines whether two or more of the blade servers should be stitched together. For example, the computing system compares the workload characteristics of one of the virtual machine to the combined available resources of at least two of the blade servers. If the combined available resources satisfy the workload characteristics, the computing system stitches the blade servers together.
US09690609B2	Provenance in cloud computing systems A method comprises pairing a virtual machine instance with a virtual agent that is registered with registry in an execution environment. In this regard, upon instantiating the virtual machine and the corresponding virtual agent, the virtual agent monitors for transaction(s), e.g., a specific invoked method, on that execution environment. The virtual agent is also configured for generating an event in response to detecting the transaction. The virtual agent provides a unique signature associated with the event, which identifies the origin of the virtual machine instance. Still further, the virtual agent is configured for forwarding the event to the registry for collating with other events so as to produce composite end-to-end logs of processes in a manner that enables provenance.
US09690608B2	Method and system for managing hosts that run virtual machines within a cluster Embodiments of a non-transitory computer-readable storage medium and a computer system are disclosed. In an embodiment, a non-transitory computer-readable storage medium containing program instructions for managing host computers that run virtual machines into host-groups within a cluster is disclosed. When executed, the instructions cause one or more processors to perform steps including determining if a virtual machine entity needs additional resources and, if the virtual machine entity needs additional resources, mapping a host computer to a host-group with which the virtual machine entity is associated.
US09690607B2	System and method for generic product wiring in a virtual assembly builder environment Described herein is a system and method for generic product wiring in a cloud environment. In accordance with an embodiment, a virtual assembly builder can be used to virtualize installed components in a reference environment, and then deploy those components into another destination environment. A user can capture the configuration and binaries of software components into software appliance artifacts, which can be grouped and their relationships defined as software assembly artifacts. In accordance with an embodiment, a generic product introspector plugin allows users to specify at introspection, during creation of a virtual assembly, one or more metadata properties to be exposed for editing and configuration by scripts, during a subsequent rehydration of the virtual assembly. The properties exposed for editing and configuration by scripts can be used during instantiation of an instance of the assembly to define one or more inputs and outputs for the instance.
US09690604B2	Language-based model for asynchronous operations A language-based model to support asynchronous operations set forth in a synchronous syntax is provided. The asynchronous operations are transformed in a compiler into an asynchronous pattern, such as an APM-based pattern (or asynchronous programming model based pattern). The ability to compose asynchronous operations comes from the ability to efficiently call asynchronous methods from other asynchronous methods, pause them and later resume them, and effectively implementing a single-linked stack. One example includes support for ordered and unordered compositions of asynchronous operations. In an ordered composition, each asynchronous operation is started and finished before another operation in the composition is started. In an unordered composition, each asynchronous operation is started and completed independently of the operations in the unordered composition.
US09690603B2	Central processing unit, information processing apparatus, and intra-virtual-core register value acquisition method To provide a new operation verification method for an information processing flow, a central processing unit capable of building a plurality of virtual cores on a physical core includes: an element or part for executing, on an own virtual core, or causing another virtual core on the same physical core to execute, a reference instruction of directly referring to a current register value used by an arbitrary virtual core from the another virtual core without influence on an execution context of the arbitrary virtual core; and an element or part for switching a permission or authorization for executing the reference instruction of referring to the register value among the plurality of virtual cores.
US09690598B2	Remotely establishing device platform integrity This invention includes apparatus, systems, and methods for repairing a corrupted device still in the field by sending the corrupted device a known-good configuration derived from the majority group of devices in the field. First, an initial inventory and content scan of the device's hardware and software stack is taken. The attestation server uses the collection of results to determine a statistically known-good configuration for each type of device. The attestation server groups the known good devices by devices and ideally all of the devices of the same type are configured mostly the same. The attestation server sends an alert to the device that the device is configured differently than the plurality of existing devices. Finally, the attestation server will request a known-good configuration from one of the devices in the plurality of existing devices to repair the corrupted device in the field.
US09690591B2	System and method for fusing instructions queued during a time window defined by a delay counter A technique to enable efficient instruction fusion within a computer system is disclosed. In one embodiment, processor logic delays the processing of a first instruction for a threshold amount of time if the first instruction within an instruction queue is fusible with a second instruction.
US09690587B2	Variable updates of branch prediction states Embodiments relate to variable branch prediction. An aspect includes determining a branch selection of an execution unit of a processor and determining whether a present prediction state of the state machine correctly predicted the branch selection by the execution unit. The aspect includes determining whether a predetermined condition is met for performing an alternative state transition and, based on determining that the predetermined condition is met, changing the present prediction state of the branch prediction state machine from the one state to another state according to an alternative state transition process based on the branch selection of the execution unit and the determination whether the present prediction state of the state machine correctly predicted the branch selection by the execution unit.
US09690586B2	Processing of multiple instruction streams in a parallel slice processor A method of managing instruction execution for multiple instruction streams using a processor core having multiple parallel instruction execution slices provides instruction processing flexibility. An event is detected indicating that either resource requirement or resource availability for a subsequent instruction of an instruction stream will not be met by the instruction execution slice currently executing the instruction stream. In response to detecting the event, dispatch of at least a portion of the subsequent instruction is made to another instruction execution slice. The event may be a compiler-inserted directive, may be an event detected by logic in the processor core, or may be determined by a thread sequencer. The execution slices may be dynamically reconfigured as between single-instruction-multiple-data (SIMD) instruction execution, ordinary instruction execution, wide instruction execution. When an execution slice is busy processing a current instruction for one of the streams, another slice can be selected to proceed with execution.
US09690584B2	Systems and methods for register allocation System and methods are provided for register allocation. An original code block and a target code block associated with a branch of an execution loop are determined. An original allocation of a plurality of physical registers to one or more original variables associated with the original code block is detected. A target allocation of the plurality of physical registers to one or more target variables associated with the target code block is determined. One or more temporary registers are selected from the plurality of physical registers based at least in part on the original allocation and the target allocation. The original allocation is changed to the target allocation using the selected temporary registers. Specifically, one or more instructions are generated to change the original allocation to the target allocation using the selected temporary registers. The instructions are executed using one or more processors.
US09690578B2	High dose radiation detector Described is a processor comprising: a plurality of radiation detectors; a first logic unit to receive outputs from the plurality of radiation detectors, the logic unit to generate an output according to the received outputs, the output of the first logic unit indicating whether the processor was exposed to incoming radiations; and a second logic unit to receive the output from the first logic unit, and to cause the processor to perform an action according to the output from the first logic unit.
US09690576B2	Selective data collection using a management system A management system sends a first request for first data associated with multiple network entities. If the first request times out, the first request is split to create multiple smaller requests and the multiple smaller requests sent, requesting data from a subset of the multiple network entities. Based on responses to the multiple smaller requests, the management system identifies a particular network entity that caused the first request to time out and adds the particular network entity to a set of problematic entities. The management system sends a second request that requests second data from a portion of the multiple network entities that excludes the particular network entity. The multiple network entities may include one or more of a virtual machine (VM), a host node (to host VMs), a storage device, a network link, another type of network entity, or any combination thereof.
US09690573B2	Web content management using predetermined project templates Embodiments of the present invention provide a system, method, and program product. In an embodiment, a computing device generates a list of predetermined project templates associated with a web page, wherein the web page is new or preexisting. The computing device transmits the generated list of predetermined project templates for display that includes one or more predetermined project templates that include a preset package of web content editing actions that are associated with the web page. The computing device generates a web page action associated with the web page according to a project generated using a predetermined project template included in the transmitted list of predetermined project templates. The computing device transmits the generated web page action for display.
US09690562B2	Detecting computing processes requiring reinitialization after a software package update Embodiments relate to systems and methods for detecting computing processes requiring reinitialization after a software package update. A physical or virtual client machine can host a set of installed software packages, including operating system, application, and/or other software. An restart tool can track the set of executing processes on the client, and identify both corresponding executable files which spawned those processes, and any installed package updates which correspond to those executable files. The restart tool can compare the timestamp or other indicator of the version of the executable file which spawned currently running processes, and the timestamp or other indicator of any newer executable files which may have been installed after the application or other process was initiated. A user can be alerted to terminate and restart any processes running off of out-of-date executable files, or in embodiments those reinitializations can be set to be performed automatically.
US09690561B2	Preinstalled application management method for mobile terminal and mobile terminal An embodiment of the present invention discloses a preinstalled application management method for a mobile terminal, where storage space of the mobile terminal includes at least one directory, and an installation package of at least one preinstalled application is stored in the at least one directory. The method includes: starting the mobile terminal; scanning the at least one directory; and installing the installation package of the at least one preinstalled application in the at least one directory to generate a preinstalled application having user-level permission. Besides, an embodiment of the present invention further provides a mobile terminal. By using the method and the mobile terminal, the preinstalled application can be uninstalled.
US09690557B2	Techniques for rapid deployment of service artifacts A framework (referred to herein as Application Integration Architecture, or AIA) that formalizes and orchestrates activities in an SOA development lifecycle. In one set of embodiments, AIA can capture development-related information in a shared data store and cause the information to flow in an automated or semi-automated manner from one lifecycle phase to the next as the lifecycle progresses. This information flow can, in turn, facilitate automations at each lifecycle phase for the responsible stakeholders (e.g., solution architects, developers, installation developers, etc.), thereby enforcing SOA best practices, enhancing development productivity, and ensuring the quality of the final SOA deliverables.
US09690555B2	Optimization of application workflow in mobile embedded devices An aspect includes optimizing an application workflow. The optimizing includes characterizing the application workflow by determining at least one baseline metric related to an operational control knob of an embedded system processor. The application workflow performs a real-time computational task encountered by at least one mobile embedded system of a wirelessly connected cluster of systems supported by a server system. The optimizing of the application workflow further includes performing an optimization operation on the at least one baseline metric of the application workflow while satisfying at least one runtime constraint. An annotated workflow that is the result of performing the optimization operation is output.
US09690554B2	Unified data type system and method A type system includes a dual representation for basic data types. One representation is the basic data type representation common to such basic built-in data types, known as an unboxed value type or simply as a value type. Each of the basic data types also has a boxed representation that can be stored in the object hierarchy of the type system. This dual representation can also be extended to user-defined types, so that user-defined types may exist both as an unboxed value type and as an object within the object hierarchy of the type system. This dual representation allows the compiler and/or runtime environment to select the most effective and efficient representation for the data type depending on the particular need at the moment.
US09690553B1	Identifying software dependency relationships Embodiments include method, systems and computer program products for identifying dependency relationships in a software product. Aspects include obtaining change history data for the software product and extracting a plurality of change elements from the change history data, each change element including an identifier of a code segment that was changed and a timestamp of the change. Aspects also include creating a dependency graph based on the plurality of change elements, wherein the dependency graph includes nodes that correspond to the code segments and edges that connect nodes that were both updated in a same logical grouping, calculating a weight for each of the edges based on probability that the nodes connected by the edge will be updated together, and outputting the dependency graph.
US09690547B1	Dynamic setup of development environments A computer-implemented method includes receiving a request from a user at a local machine to access a project. One or more programming languages used in the project are identified. Resource availability at the local machine is analyzed. An integrated development environment (IDE) is selected for the project, based at least in part on the one or more programming languages and the resource availability of the local machine. The IDE is provisioned automatically, by a computer processor, for the user in response to the request to access the project.
US09690543B2	Significance alignment A data processing system uses alignment circuitry to align input operands in accordance with a programmable significance parameter to form aligned input operands. The aligned input operands are supplied to arithmetic circuitry, such as an integer adder or an integer multiplier, where a result value is formed. The result value is stored in an output operand storage element, such as a result register. The programmable significance parameter is independent of the result value.
US09690541B2	Automated audio volume based on physical motion estimation The present disclosure involves a method for automating media audio volume based on the physical motion of a mobile computing device. In one embodiment, the method includes detecting motion of the mobile device based on input motion data from a motion detection mechanism, determining whether the detected motion of the mobile device exceeds a configured motion threshold, based on the determining, causing a logical state change to transition into a automated volume state, and after the logical state change to transition to the automated volume state, automatically configuring the audio volume of audio output provided by a mobile computing device based on configured volume and fade parameters.
US09690538B1	Customizable real-time electronic whiteboard system Described herein is a system in which multiple display devices may be located remotely throughout a facility. The system receives location information for a number of users within the facility. The system is able to identify a set of users collocated with a particular display device and generate a set of configuration settings specific to that set of users. Information provided by the system, either in response to an information request or automatically, may be formatted and/or filtered according to the generated set of configuration settings. In some embodiments, the set of configuration settings may be compiled from each of the users in the set of users based on priority.
US09690536B2	Terminal device, and screen-sharing display method and system Embodiments of the present invention disclose a terminal device, and a screen-sharing display method and system. The screen-sharing display method is used in a device having a touch function, where the method includes: detecting a position of a touch object on a touchscreen; generating, according to the detected position of the touch object on the touchscreen, an icon corresponding to the position of the touch object; superimposing the icon onto display content of the touchscreen to obtain screen-sharing touch and display content; and sending the screen-sharing touch and display content to a screen-sharing display device, so that the screen-sharing display device displays the screen-sharing touch and display content including the icon.
US09690535B2	Optical configurations in a tileable display apparatus A display apparatus including a screen layer for displaying a unified image to a viewer and an illumination layer having an array of light sources. Each light source emits a light beam. An array of optical elements, each coupled to a corresponding light source in the array of light sources, is disposed between the screen layer and the illumination layer. The display layer includes a matrix of pixlets and a spacing region disposed between the pixlets in the matrix, wherein the array of light sources emit their light beams through the array of optical elements, wherein each optical element is configured to shape the received light beam into a divergent projection beam having a limited angular spread to project sub-images displayed by the pixlets as magnified sub-images on the backside of the screen layer, the magnified sub-images to combine to form the unified image that is substantially seamless.
US09690525B2	Availability of devices based on location Methods and systems for a client device wirelessly receiving, from a location sensor, an identifier for the location sensor in response to detecting the location sensor. A device corresponding to the identifier for the location sensor may be determined, and resources of the device may be made available to the client device. After making the resources of the device available to the client device, the client device may send data for accessing the resources of the device. The device may comprise a printer, and the resources of the device may comprise printing services. The data for accessing the resources of the device may comprise print job data.
US09690524B2	Managing print settings in multiple execution environments To make a set of set values of a plurality of print setting items added in a first execution environment usable in a second execution environment as well, an information processing apparatus comprises: a first printer driver configured to operate in a first execution environment, and add a set of set values of a plurality of print setting items to a list; and an application corresponding to a second printer driver configured to operate in a second execution environment, and obtain the set of the set values added by the first printer driver and display the set of the set values as a choice.
US09690521B2	Print control device and recording medium A print control device includes an application identification executor that identifies an application, a special print function detector that detects a special print function of the application, a view generator that generates a special function settings view showing the special print function of the application, a display controller that displays a print settings screen on a display device upon instructions for printing from the application, the print settings screen enclosing the special function settings view, and a transmitter that transmits print data to a printing apparatus, the print data being in a predetermined form, the print data including print settings configured by a user via the print settings screen.
US09690516B2	Parity stripe lock engine Embodiments described herein include a PSL engine that includes various memory elements that permit the engine to grant locks on particular portions of data in a stripe in a RAID storage system. The PSL engine can assign (or lock) different blocks of the stripe for different operations. The PSL engine can grant locks to multiple operations for the same stripe if the operations access mutually exclusive blocks of the stripe. Each time a new operation is requested, the PSL engine determines whether the operation would affect a stripe data block that is currently assigned to another operation. If the new operation corresponds to a block of data in the stripe that includes data locked by another operation, the PSL engine assigns the new operation to a wait list. In one embodiment, the PSL engine maintains a wait list for each of the stripes in the RAID system.
US09690515B2	Delayed automation to maximize the utilization of read and write cache A storage module may include a non-volatile memory module and a controller that communicates with the non-volatile memory module using a communications bus. In response to receipt of a host command, the controller may generate one or more sets of context commands for communication of data on the communications bus between the controller and an area of memory. The controller may execute the sets of context commands in a cache sequence. During execution of the context commands in the cache sequence, the controller may determine an opportunity window that occurs after execution of a context command of a prior set and before execution of a context command of a current set, during which the controller may utilize the communications bus.
US09690513B2	Dispersed storage processing unit and methods with operating system diversity for use in a dispersed storage system A plurality of data slices are generated from a block of data to be stored in the dispersed storage system. A plurality of dispersed storage units are determined for storing the plurality of data slices, based on an operating system associated with the plurality of dispersed storage units.
US09690511B2	Multi-core data array power gating restoral mechanism An apparatus includes a fuse array and a stores. The fuse array is programmed with compressed configuration data for a plurality of cores. The stores is coupled to the plurality of cores, and includes a plurality of sub-stores that each correspond to each of the plurality of cores, where one of the plurality of cores accesses the semiconductor fuse array upon power-up/reset to read and decompress the compressed configuration data, and to store a plurality of decompressed configuration data sets for one or more cache memories within the each of the plurality of cores in the plurality of sub-stores. Each of the plurality of cores has sleep logic. The sleep logic is configured to subsequently access a corresponding one of the each of the plurality of sub-stores to retrieve and employ the decompressed configuration data sets to initialize the one or more caches following a power gating event.
US09690508B1	PDSE physical dump anonymizer A method for anonymizing a data set dump includes detecting an error in an original data set and generating a copy of the original data set. Like the original data set, the copy contains an index and a plurality of members. The method reads the index to locate members within the copy that are reachable by the index. The method then converts the copy to a scrubbed copy by overwriting customer data within the members, while retaining the index, structure of the members, and quantity of data within the data set. In certain embodiments, the method further locates lost members within the copy that are not referenced by the index, and overwrites customer data within the lost members. The scrubbed copy may then be transmitted to a technician for examination since all potentially sensitive/confidential data has been removed. A corresponding system and computer program product are also disclosed.
US09690505B2	Refresh row address A table may include first and second row addresses that are adjacent an activated row address. A first counter of the first row address may be incremented if the activated row address is not included in the table. A second counter of the second row address may also be incremented if the activated row address is not included in the table. The first row address may be refreshed if the first counter exceeds a counter threshold. The second row address may be refreshed if the second counter exceeds the counter threshold.
US09690503B2	Returning coherent data in response to a failure of a storage device when a single input/output request spans two storage devices A controller maintains exposed and unexposed locations of a first storage device and a second storage device. In response to receiving a request a perform a write operation to write data in locations that span the first storage device and the second storage device, the controller atomically writes an entirety of the data in the unexposed locations of the first storage device.
US09690496B2	Using external memory devices to improve system performance The invention is directed towards a system and method that utilizes external memory devices to cache sectors from a rotating storage device (e.g., a hard drive) to improve system performance. When an external memory device (EMD) is plugged into the computing device or onto a network in which the computing device is connected, the system recognizes the EMD and populates the EMD with disk sectors. The system routes I/O read requests directed to the disk sector to the EMD cache instead of the actual disk sector. The use of EMDs increases performance and productivity on the computing device systems for a fraction of the cost of adding memory to the computing device.
US09690495B2	Emulating memory mapped I/O for coherent accelerators in error state Embodiments disclose techniques for emulating memory mapped I/O (MMIO) for coherent accelerators in an error state. In one embodiment, once an operating system determines that a processor is unable to access a coherent accelerator via a MMIO operation, the operating system deletes one or more page table entries associated with MMIO of one or more hardware contexts of the coherent accelerator. After deleting the page table entries, the operating system can detect a page fault associated with execution of a process by the processor. Upon determining that the page fault was caused by the process attempting to access one of the deleted page table entries while executing a MMIO operation, the operating system emulates the execution of the MMIO operation for the faulting process, giving the process the illusion that its requested MMIO operation was successful.
US09690489B2	Method for improving access performance of a non-volatile storage device A method for improving access performance of a non-volatile storage device when programming data of a size smaller than a fixed minimum program number (FMPN) is disclosed. The method includes the steps of: predetermining a size of a blank data section for combining with a first data section and a second data section, the total size of the first data section, the second data section and the blank data section equals the FMPN; reading out data located at the second data section; updating a new data to the first data section; combining the new data with the data at the second data section; and incorporating the combined data with the blank data of the blank data section to become a final data, and programming the final data.
US09690486B2	Reduction in time required to write file to tape Reducing time required to write a file to tape is provided. Synchronous processing is performed in a file system implementing a Linear Tape File System (LTFS) file format, wherein the synchronous processing includes writing, to a tape medium of a tape cartridge, index information and one or more files. A type of the synchronous processing is determined, wherein the type is either an index-MAM sync type or an index-only sync type. Updated information is stored to a media auxiliary memory of the tape cartridge in response to determining that the synchronous processing is of the index-MAM sync type.
US09690485B2	Adjustment of volume synchronization Embodiments of the present invention provide systems and methods for adjusting synchronization rates of volumes. Volumes and their copies (i.e., mirrored volumes) provide physical or virtual storage on a data storage medium. Depending on the function (i.e., the purpose) of mirrored volumes, a certain synchronization rate is recommended. Embodiments of the present invention provide systems and methods for an automatic dynamic adjustment of individual synchronization rates by adapting to changes in system workloads in order to avoid degradation of user-driven input/output (IO) and to efficiently achieve nearly 100% synchronization for all mirrored volumes.
US09690483B2	Asynchronously clearing page frames In one embodiment, a computer-implemented method includes producing one or more clean frames by clearing a batch of one or more frames for use in backing virtual memory pages. The producing the one or more clean frames may be performed asynchronously from a unit of work being performed by a processor. The one or more clean frames may be added to a clean frame queue, where the clean frame queue includes a plurality of clean frames that have been cleared. A first request may be received, from the processor, for a frame for use in backing a virtual memory page of the unit of work. A clean frame, of the one or more clean frames, may be removed from the clean frame queue, responsive to the first request. The clean frame may be delivered to the processor, responsive to the first request.
US09690481B2	Touch event model Embodiments of the present invention are directed to methods, software, devices and APIs for defining touch events for application level software. Furthermore, some embodiments are directed to simplifying the recognition of single and multiple touch events for applications running in multi-touch enabled devices. To simplify the recognition of single and multiple touch events, each view within a particular window can be configured as either a multi-touch view or a single touch view. Furthermore, each view can be configured as either an exclusive or a non-exclusive view. Depending on the configuration of a view, touch events in that and other views can be either ignored or recognized. Ignored touches need not be sent to the application. Selectively ignoring touches can allow for simpler software elements that do not take advantage of advanced multi touch features to be executed at the same device and time as more complex software elements.
US09690475B2	Information processing apparatus, information processing method, and program Provided is an information processing apparatus including a an operating tool detection unit that detects an indication direction of an operation tool in contact with a display panel and an operation identification unit that identifies a direction of an operation input by the operating tool, based on the detected indication direction of the operating tool. Thereby, the direction of the operation is detected based on the indication direction of the operating tool, so that an operation independent of an orientation of the display panel with respect to an operator becomes possible.
US09690474B2	User interface, device and method for providing an improved text input A user interface module for a device having a touch display arranged with virtual keys and at least one first area. The device is adapted to execute at least one application adapted to receive text input and the touch display is arranged to display content associated with the application. The touch display is also arranged to display a text input area upon activation of the application's receiving of text input. The text input area, at least partially, overlaps the at least one first area. The touch display is also arranged to display the content being displayed in the first area as shaded and arranged to display text input received through the text input area clearly.
US09690472B2	Display method and electronic device The invention provides a display method for sharing information among various users. The method includes: detecting a first operation, where the first operation is associated with an object needed to be displayed; in response to the first operation, determining a first identifier from invoked usage information; displaying an interface needed to be displayed corresponding to the object needed to be displayed in a first display area corresponding to the first identifier. The invention further provides an electronic device to implement the method.
US09690467B2	Graphical user interface and related method A graphical user interface that is embodied in a computer-readable medium for execution on a computer, and configured for processing of an image that is displayed on a screen. The graphical user interface includes an original version of a control element, and a blurred version of the control element. The blurred version of the control element is superimposed over the image on the screen, and the original version of the control element is superimposed over the blurred version of the control element on the screen.
US09690459B2	Display apparatus and user interface screen displaying method using the same A display apparatus includes an input unit receiving a user command for configuring a main user interface (UI) screen for controlling content reproduction, and a controller configuring the main UI screen including at least one UI element selected by the user command and display the main UI screen configured according to the user command on a display, wherein the at least one UI element is a graphic element to which a function associated with the content reproduction is mapped.
US09690457B2	Virtual reality applications Augmented reality technology is described. The technology can detect objects in a scene, identifying one or more installed or available applications based on the detected objects, and place icons representing the identified applications proximate to the detected objects in a display of the scene, e.g., so that a user can start or install the identified applications. The technology can also facilitate interaction with an identified object, e.g., to remotely control a recognized object.
US09690454B2	Methods and systems for remotely viewing and auditing cell sites comprising a digital data structure comprising a substantially 360 degree digital representation of the site Digital data structures of cell sites that can be reviewed, interrogated and manipulated so that users can investigate the cell site remotely. The digital data structures contain data for the elevated antenna holding structure and for each desired cell site component, such as the cellular antennas, microwave dishes. The digital data structures contain high resolution optical information about the cell site so that desired elements can be distinguished and read; relative spatial relationship data so that the relative spatial relationships between the different components can be determined to and automatically generated angular adjustment data to reduce perspective distortions of the cell site components.
US09690452B2	System and method for internet meta-browser for users with disabilities The present invention is a system and method operable with generally available browser technology that may facilitate improved access and navigation of the Internet and world-wide web by a user who is a novice user or is a user with disabilities. A browser plug-in component may cause the display of buttons, indicators and/or textual information to a user to aid a user in accessing and navigating the webpages. The buttons, indicators and/or textual information may be provided as an overlay on existing webpages. The overlay and webpage display may be tailored to specific users at a point in time and over time so that the overlay elements may reflect user preferences and/or a level of access/navigation activities that is appropriate to the user.
US09690450B2	User interface for displaying selectable software functionality controls that are relevant to a selected object An improved user interface is provided for displaying selectable software functionality controls that are relevant to a selected object and that remain visibly available for use while the selected object is being edited. Upon selection of a particular object for editing, functionality available for editing the object is presented in a ribbon-shaped user interface above the software application workspace to allow the user ready and efficient access to functionality needed for editing the selected object. The display of relevant functionality controls is persisted until the user dismisses the display, selects another top-level functionality control or selects another object for editing.
US09690449B2	Touch based selection of graphical elements The present invention extends to methods, systems, and computer program products for touch based selection of graphical elements. Embodiments of the invention improve the usability of interacting with data visualizations. When multiple graphical elements are covered by a finger touch, a gesture recognition component detects ambiguity in the selection. In response, a visualization component draws additional regions around the touched location. The additional regions correspond to the covered graphical elements covered. Thus, a user is made aware of the graphical elements covered by his or her finger. These additional regions are touch friendly and more easily selectable. A finger can be moved into one of the additional regions and released to finish the selection. The gesture recognition component interprets this gesture as if the user tapped directly and unambiguously on the corresponding graphical element.
US09690447B2	Dynamically changing appearances for user interface elements during drag-and-drop operations A user interface includes elements whose appearance dynamically changes in dependence upon functions associated with the elements. In the case of an icon that is the destination for a drag-and-drop operation, the image displayed for the icon changes in accordance with the object being dragged to it, to represent the task that will be performed as a result of the drag-and-drop operation. The appearance of other elements involved in drag-and-drop operations can also be varied, to reflect the task at hand. As a result, the user is provided with more intuitive feedback regarding the functions that will be performed by the computer as a result of a drag-and-drop operation.

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