Document | Document Title |
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US09634302B2 |
Secondary battery module
A secondary battery module includes a cell block in which a plurality of square batteries are layered, and includes: a pair of end plates arranged to respectively face one side and another side of the cell block in a layering direction; and a pair of side frames and arranged to respectively face one side and another side in a cell width direction perpendicular to the layering direction of the cell block, and in the one side and another side in the cell width direction, one end portion being engaged with one end plate at the one side in the layering direction, and other end portion being engaged with other end plate at another side in the layering direction. |
US09634301B2 |
Lithium ion battery cell with secondary seal
A lithium ion battery cell includes a prismatic casing enclosing active components of the lithium ion battery cell. The lithium ion battery cell also includes a terminal having a terminal post extending through an opening in the casing and electrically connected to the active components; a primary sealing component configured to seal a first portion of the terminal post against the casing; and a secondary seal disposed around a second portion of the terminal post and against the primary sealing component. The secondary seal is formed from a curable adhesive resin and is configured to resist egress of the electrolyte out of the lithium ion battery cell and is configured to resist ingress of moisture into the lithium ion battery cell. |
US09634299B2 |
Rechargeable battery
A rechargeable battery includes: an electrode assembly including a first electrode having a first polarity and a second electrode having a second polarity, the second polarity being different from the first polarity; a case housing the electrode assembly; a first terminal electrically connected to the first electrode; a cap plate coupled to an opening of the case; a first lower insulating member between the first electrode and the cap plate; and a first short-circuit member between the first terminal and the first lower insulating member, and configured to be deformed to electrically connect the first electrode to the cap plate, wherein the first terminal includes a first fixing portion electrically connected to the first electrode. |
US09634294B2 |
Method of manufacturing organic light emitting display panel
A method of manufacturing an organic light emitting display panel, the method including: providing a pixel defined by an intersection of one of a plurality of data lines and one of a plurality of gate lines, the providing the pixel including: providing a transistor, providing a storage capacitor including: a first electrode, and a second electrode, and providing a semiconductor layer, providing a first plate partially overlapping the semiconductor layer in the pixel, the providing a first plate including: providing a gate portion of the transistor, and providing a capacitor-forming portion including the first electrode of the storage capacitor, and providing a second plate on the first plate in the pixel, the second plate including the second electrode of the storage capacitor, the second plate not overlapping the semiconductor layer. |
US09634293B2 |
Organic light emitting display device having 2 stack structure and a metal oxide
An organic light emitting display (OLED) device can include a substrate on which first to third light emitting portions are defined, first electrodes respectively positioned on the first to third light emitting portions, a first stack formed on the first electrodes and including first, second and third light emitting layers corresponding to the first, second and third light emitting portions, respectively, an N-type charge generation layer (CGL) positioned on the first stack, a transition metal oxide layer positioned on the N-type CGL, a second stack positioned on the transition metal oxide layer and including fourth, fifth and sixth light emitting layers corresponding to the first, second and third light emitting portions, respectively, and a second electrode positioned on the second stack. |
US09634291B2 |
Organic light-emitting transistor
An organic light-emitting transistor (OLET) is provided. The OLET includes: a substrate; at least one first electrode on the substrate; a first semiconductor layer having a first conductive type on the first electrode; a second semiconductor layer having a second conductive type on the first semiconductor layer; a gate electrode disposed on a side surface of the second semiconductor layer; a gate insulating layer disposed between the gate electrode and the second semiconductor layer; an organic emission layer on the second semiconductor layer. |
US09634290B2 |
Laminate for light emitting device and process of preparing same
A laminate for a light emitting device, includes a glass substrate, a random network of reliefs formed on the glass substrate, and a flattening layer formed on the network, wherein the network of reliefs are formed from a glass frit. The laminate for a light emitting device further includes a network inducing the scattering of light for efficiently extracting outward a loss of light at an interface between a glass substrate and an internal light extraction layer. The laminate is suitable for the industrial field of optical devices, such as organic light emitting diodes (OLEDs), backlights, lighting, and the like. |
US09634285B2 |
Electrical device
The invention relates to an electrical device comprising an electrical unit (2) like an organic light emitting diode, a protection element (3) like a thin film encapsulation, which at least partly covers the electrical unit, for protecting the electrical unit against water and/or oxygen, and a detection layer (4) arranged between the protection element and the electrical unit or within the protection element, wherein the detection layer comprises organic material and is adapted such that a property of the detection layer is changed, if the detection layer is in contact with a contact gas usable for detecting a permeability of the protection element. This allows easily integrating a fast detection test for detecting a permeability of the protection element into a production process for producing the electrical device, i.e. a time consuming external permeability test may not be required. |
US09634279B2 |
Light-emitting element
A light-emitting element having high external quantum efficiency is provided. A light-emitting element having low drive voltage is provided. Provided is a light-emitting element which includes a light-emitting layer containing a phosphorescent compound, a first organic compound, and a second organic compound between a pair of electrodes. A combination of the first organic compound and the second organic compound forms an exciplex (excited complex). An emission spectrum of the exciplex overlaps with an absorption band located on the longest wavelength side of an absorption spectrum of the phosphorescent compound. A peak wavelength of the emission spectrum of the exciplex is longer than or equal to a peak wavelength of the absorption band located on the longest wavelength side of the absorption spectrum of the phosphorescent compound. |
US09634274B2 |
Monochrome OLED and method for manufacturing the same, and OLED display panel
The present invention discloses a monochrome OLED and a method for manufacturing the same, and an OLED display panel, which can improve the performance of an OLED. A monochrome OLED according to an embodiment of the invention comprises a luminescent layer, wherein the luminescent layer comprises at least one luminescent sublayer; and at least one carrier control layer that is adjacent to the luminescent sublayer, wherein the carrier control layer is adapted to control the concentration ratio of carriers with different polarities in the luminescent layer. |
US09634273B2 |
Method for producing fully aqueous phase-synthesized nanocrystals/conducting polymer hybrid solar cell
Provided is a method for producing a highly efficient organic/inorganic hybrid solar cell using fully aqueous phase-synthesized semiconductor nanocrystals and conducting polymer. The method mainly includes three steps: synthesizing nanocrystals in an aqueous phase, synthesizing a conjugated polymer precursor in an aqueous phase, and producing a device of solar cell. The nanocrystal material required for producing a solar cell by the method is widely available, diversified and size-controlled, and the used conjugated polymer has regulated molecular structure and molecular weight, which contributes to increase the absorption of sunlight. The processing of cell device can be performed at room temperature in air, and has advantages of no pollution, short processing period, and low cost. A method for producing an organic/inorganic hybrid solar cell is developed, which succeeds in introducing the high quality nanocrystals synthesized in an aqueous phase and is an eco-friendly and pollution-free technology for producing a solar cell. |
US09634272B2 |
Foldable display
A foldable display according to the present disclosure includes: a substrate having a folding portion which is folded; and a plurality of transistors in the substrate each of the transistors including: a gate electrode on the substrate; a channel overlapping the gate electrode; and a source electrode and a drain electrode positioned at respective sides of the channel, wherein the gate electrode is divided into a plurality of sub-gate electrodes by at least one gate cutout. |
US09634268B2 |
Electronic device comprising metal complexes
Electronic devices, in particular organic electroluminescent devices, comprising metal complexes of the formula (1). |
US09634261B2 |
Organic photoelectric conversion element and solar cell using same
Disclosed is an organic photoelectric conversion element which has a reverse layer structure wherein at least a first electrode, a photoelectric conversion layer and a second electrode are arranged on a substrate in this order. The organic photoelectric conversion element is characterized in that: the photoelectric conversion layer is a bulk heterojunction layer that is composed of a p-type organic semiconductor material and an n-type organic semiconductor material; and a compound that has a linear or branched fluorinated alkyl group having 6-20 carbon atoms is contained as the p-type organic semiconductor material. |
US09634257B2 |
Heterocyclic compound and organic light-emitting device including the same
A heterocyclic compound of Formula 1 below and an organic light-emitting device including the same are provided. X1 to X4, L1, L2, n, m, and Ar1 to, Ar4 in Formula 1 are defined as in the specification. |
US09634254B2 |
Organic material and organic light emitting diode display using same
An organic material for an organic light emitting diode (OLED) display, and an OLED display are provided, and the organic material includes an anthracene derivative includes at least deuterium. |
US09634252B2 |
Polymer and solar cell using the same
A polymer of an embodiment includes a repeating unit containing a bivalent group represented by the following formula (1). R is hydrogen, halogen, an alkyl group, an alkanoyl group, an aryl group, a heteroaryl group, or the like. X is oxygen, sulfur, selenium, or the like. Y and Z each is a bivalent group selected from a carbonyl group, a sulfinyl group, and a sulfonyl group. However, a case where Y and Z are both the carbonyl groups is excluded. |
US09634249B2 |
Semiconductor device and method for producing semiconductor device
A device includes a pillar-shaped insulating layer above a first pillar-shaped semiconductor layer. A resistance-changing film is around an upper portion of the pillar-shaped insulating layer and a lower electrode is around a lower portion of the pillar-shaped insulating layer and connected to the resistance-changing film. A reset gate insulating film surrounds the resistance-changing film, and a reset gate surrounds the reset gate insulating film. |
US09634246B2 |
Electronic device and method for fabricating the same
An electronic device includes a semiconductor memory. The semiconductor memory includes a vertical electrode layer formed over a substrate and extending in a vertical direction substantially perpendicular to a surface of the substrate; an interlayer dielectric layer and a structure formed over the substrate and alternately stacked along the vertical electrode layer, wherein the structure includes a horizontal electrode layer and a base layer which is conductive and located over or under the horizontal electrode layer; a variable resistance layer interposed between the vertical electrode layer and the base layer, and including a common element with the base layer; and a groove interposed between the vertical electrode layer and the horizontal electrode layer and insulating the vertical electrode layer and the horizontal electrode layer from each other. |
US09634244B2 |
Magnetic random access memory with perpendicular interfacial anisotropy
The present invention is directed to an MRAM element comprising a magnetic free layer structure and a magnetic reference layer structure with an insulating tunnel junction layer interposed therebetween. The magnetic free layer structure has a variable magnetization direction substantially perpendicular to the layer plane thereof. The magnetic reference layer structure includes a first magnetic reference layer formed adjacent to the insulating tunnel junction layer and a second magnetic reference layer separated from the first magnetic reference layer by a first non-magnetic perpendicular enhancement layer. The first and second magnetic reference layers have a first fixed magnetization direction substantially perpendicular to the layer plane thereof. The second magnetic reference layer has a multilayer structure comprising a first magnetic reference sublayer formed adjacent to the first non-magnetic perpendicular enhancement layer and a second magnetic reference sublayer separated from the first magnetic reference sublayer by an intermediate metallic layer. |
US09634243B1 |
Semiconductor structure and method of forming the same
The present disclosure provides a semiconductor structure, including a logic region and a memory region adjacent to the logic region. The memory region includes a first Nth metal line of an Nth metal layer, a magnetic tunneling junction (MTJ) over first Nth metal line, and a first (N+1)th metal via of an (N+1)th metal layer, the first (N+1)th metal via being disposed over the MTJ layer. N is an integer greater than or equal to 1. A method of manufacturing the semiconductor structure is also disclosed. |
US09634239B2 |
Magnetic element
A magnetic element is provided. The magnetic element includes a free magnetization layer having a surface area that is approximately 1,600 nm2 or less, the free magnetization layer including a magnetization state that is configured to be changed; an insulation layer coupled to the free magnetization layer, the insulation layer including a non-magnetic material; and a magnetization fixing layer coupled to the insulation layer opposite the free magnetization layer, the magnetization fixing layer including a fixed magnetization so as to be capable of serving as a reference of the free magnetization layer. |
US09634238B2 |
Magnetic structures, methods of forming the same and memory devices including a magnetic structure
Magnetic structures, methods of forming the same, and memory devices including a magnetic structure, include a magnetic layer, and a stress-inducing layer on a first surface of the magnetic layer, a non-magnetic layer on a second surface of the magnetic layer. The stress-inducing layer is configured to induce a compressive stress in the magnetic layer. The magnetic layer has a lattice structure compressively strained due to the stress-inducing layer. |
US09634237B2 |
Ultrathin perpendicular pinned layer structure for magnetic tunneling junction devices
A material stack of a synthetic anti-ferromagnetic (SAF) reference layer of a perpendicular magnetic tunnel junction (MTJ) may include an SAF coupling layer. The material stack may also include and an amorphous spacer layer on the SAF coupling layer. The amorphous spacer layer may include an alloy or multilayer of tantalum and cobalt or tantalum and iron or cobalt and iron and tantalum. The amorphous spacer layer may also include a treated surface of the SAF coupling layer. |
US09634236B2 |
Magnetoelectronic components and measurement method
Magnetoelectronic components comprise at least one oblong working structure made of a ferromagnetic material, along which magnetic domain walls can migrate, means for applying an electric current to this working structure, and at least one magnetic field sensor for the magnetic field generated by the working structure. The working structure is designed so that it is able to form domain walls, the transverse magnetization direction of which in the center has no preferred direction in the plane perpendicular to the migration direction thereof along the working structure, and/or can form massless domain walls. It was found that the kinetic energy of such moving domain walls vanishes. These walls are thus not subject to the Walker limit nor to intrinsic pinning. As a result, the components can read, store or process and finally output information more quickly. The invention also relates to a method for measuring the non-adiabatic spin transfer parameter β of a ferromagnetic material. This method was developed as part of a more in-depth examination of the phenomena that were found. |
US09634233B2 |
Axial loading for magnetostrictive power generation
A device generates electrical energy from mechanical motion in a downhole environment. The device includes a magnetostrictive element and an electrically conductive coil. The magnetostrictive element has a first end and a second end. The first and second ends are coupled between two connectors. The magnetostrictive element is configured to experience axial strain in response to radial movement of at least one of the connectors relative to the other connector. The electrically conductive coil is disposed in proximity to the magnetostrictive element. The coil is configured to generate an electrical current in response to a change in flux density of the magnetostrictive element. |
US09634229B2 |
Piezoelectric device, ultrasound probe, droplet discharge device, and piezoelectric device fabrication method
In a piezoelectric device, an ultrasound probe, and a droplet discharge unit of the present invention, each of a pair of first and second electrodes is placed on a piezoelectric member having a single orientation in a direction perpendicular to a thickness direction thereof to extend in a direction perpendicular to the thickness direction or along the thickness direction and in a direction perpendicular to the direction of the orientation. Therefore, the piezoelectric device of the present invention has excellent piezoelectric properties. Further, the ultrasound probe and the droplet discharge unit of the present invention have good efficiency. |
US09634226B2 |
Lamb wave device and manufacturing method thereof
A Lamb wave device according to an embodiment of the present invention includes a piezoelectric function member and a supporting member. The piezoelectric function member has a piezoelectric substrate, IDT electrodes, and a cutout portion. The IDT electrodes are disposed on the upper surface of the piezoelectric substrate. The cutout portion is formed in the piezoelectric substrate, and includes a step face provided between the upper surface and the lower surface of the piezoelectric substrate. The supporting member has a supporting surface and a cavity. The supporting surface is bonded to the lower surface of the piezoelectric substrate, and is exposed in the cutout portion toward the upper surface of the piezoelectric substrate. The cavity is formed adjacent to the supporting surface, and faces the IDT electrodes through the piezoelectric substrate. |
US09634225B2 |
Artificial muscle camera lens actuator
An artificial muscle structure has an electro-active polymer (EAP) layer having a frusto-conical shape and whose tip has an opening formed therein for use as a camera variable aperture. First, second and third electrode segments are formed on a rear face of the EAP layer. The second segment is positioned in a gap between the first and third segments so as to be electrically isolated from the first and third segments. The second segment has an opening formed therein that is aligned with the opening in the EAP layer. A complementary electrode is formed on a front face of the EAP layer. Other embodiments are also described. |
US09634221B2 |
Thin-film thermo-electric generator and fabrication method thereof
A method of manufacturing a thin-film thermo-electric generator includes the steps of: forming two or more PN junctions each having a three-layer structure; forming a substrate which has a first side and an opposed second side; coupling the PN junctions at the first side of the substrate to define a first group of PN junctions at the first side of the substrate; and providing two electrodes that one of the electrodes is extracted from the first group of PN junctions. Accordingly, each of the PN junctions is formed by depositing an insulating thin-film layer between a P-type thermo-electric thin-film layer and a N-type thermo-electric thin-film layer. |
US09634218B2 |
Fabrication method for synthesizing a Bi2TeySe3-y thermoelectric nanocompound and thermoelectric nanocompound thereby
The present invention provides a method for synthesizing a Bi2TeySe3-y thermoelectric nanocompound (0 |
US09634216B2 |
Light emitting device
According to one embodiment of the present invention, the light emitting device includes an LED element, a side wall which surrounds the LED element, a phosphor layer which is fixed to the side wall with an adhesive layer therebetween, and is positioned above the LED element, and a metal pad as a heat dissipating member. The side wall includes an insulating base which surrounds the LED element and a metal layer which is formed on a side surface at the LED element side of the base, and is in contact with the metal pad and the adhesive layer. The adhesive layer includes a resin layer that includes a resin containing particles which have higher thermal conductivity than the resin or a layer that includes solder. |
US09634208B2 |
Shallow reflector cup for phosphor-converted LED filled with encapsulant
An LED die (26) conformally coated with phosphor (28) is mounted at the base (24) of a shallow, square reflector cup (16). The cup has flat reflective walls (20) that slope upward from its base to its rim at a shallow angle of approximately 33 degrees. A clear encapsulant (30) completely fills the cup to form a smooth flat top surface. Any emissions from the LED die or phosphor at a low angle (48, 50) are totally internally reflected at the flat air-encapsulant interface toward the cup walls. This combined LED/phosphor light is then reflected upward by the walls (20) and out of the package. Since a large percentage of the light emitted by the LED and phosphor is mixed by the TIR and the walls prior to exiting the package, the color and brightness of the reflected light is fairly uniform across the beam. The encapsulant is intentionally designed to enhance TIR to help mix the light. |
US09634207B2 |
Semiconductor component and method of producing a semiconductor component
A method of producing a semiconductor component includes providing an optoelectronic semiconductor chip; applying a molding compound for an optical element, wherein the molding compound is based on a highly refractive polymer material; precuring the molding compound at a temperature of at most 50° C.; and curing the molding compound. |
US09634206B1 |
LED luminaire
A compact light unit having light emitting diodes (LEDs) includes a circuit board assembly and a lens including optical structures, a front face, and a rim disposed about the front face. The lens may include a pocket on a back portion of the lens opposite the front face within which the circuit board assembly is mounted with the LEDs being optically aligned with the optical structures. The LED light unit further includes a bezel having an interior opening with the bezel configured to be mounted to the lens with the rim engaged with an interior portion of the bezel and the front face exposed through the interior opening. Various optical structures may be provided to direct light projected by the LEDs at different angles. |
US09634199B2 |
Methods of tuning light emitting devices and tuned light emitting devices
Methods of treating an emission spectrum of visible light emitted from a light emitting source, and resulting apparatus, are disclosed. The methods include obtaining the visible light emission spectrum emitted from the light emitting source and a desired visible light emission spectrum. The methods may also include determining at least one wavelength of the emission spectrum of the source with an irradiance or intensity that is less than that of the desired emission spectrum. The methods may include selecting at least one pigment that is effective in tuning the emission spectrum of the source by increasing the intensity or irradiance of the at least one wavelength. The methods may include applying the at least one pigment to the light emitting source to treat the emission spectrum emitted therefrom. |
US09634197B2 |
Wafer level packaging of multiple light emitting diodes (LEDs) on a single carrier die
An LED wafer includes LED dies on an LED substrate. The LED wafer and a carrier wafer are joined. The LED wafer that is joined to the carrier wafer is shaped. Wavelength conversion material is applied to the LED wafer that is shaped. Singulation is performed to provide multiple LED dies that are joined to a single carrier die. The multiple LED dies on the single carrier die are connected in series and/or in parallel by interconnection in the LED dies and/or in the single carrier die. The singulated devices may be mounted in an LED fixture to provide high light output per unit area. Related devices and fabrication methods are described. |
US09634193B2 |
Light emitting diode and method of manufacturing the same
A light-emitting diode including a substrate, a first semiconductor layer disposed on the substrate, an active layer disposed on the first semiconductor layer, a second semiconductor layer disposed on the active layer and having a conductivity type different than that of the first semiconductor layer, and a reflective pattern disposed on the second semiconductor layer and configured to reflect light emitted from the active layer, the reflective pattern having heterogeneous metal layers and configured to absorb stress caused by differences in coefficient of thermal expansion between the heterogeneous metal layers. |
US09634190B2 |
White light-emitting element
A white light-emitting device of the present invention includes a substrate (101); a diamond semiconductor layer (105) provided on the substrate (101), in which one or a plurality of p-type α layers (102), a p-type or n-type γ layer (103), and one or a plurality of n-type β layers (104) are laminated in this order from the substrate (101); a first electrode (106) provided on the α layer (102) which injects an electric current; a second electrode (107) provided on the β layer (104) which injects an electric current; and a fluorescent member (108) which coats a light emission extraction region of the surface of the diamond semiconductor layer. |
US09634189B2 |
Patterned substrate design for layer growth
A patterned surface for improving the growth of semiconductor layers, such as group III nitride-based semiconductor layers, is provided. The patterned surface can include a set of substantially flat top surfaces and a plurality of openings. Each substantially flat top surface can have a root mean square roughness less than approximately 0.5 nanometers, and the openings can have a characteristic size between approximately 0.1 micron and five microns. One or more of the substantially flat top surfaces can be patterned based on target radiation. |
US09634179B2 |
Selective removal of a coating from a metal layer, and solar cell applications thereof
A method and resulting structure of patterning a metal film pattern over a substrate, including forming a metal film pattern over the substrate; depositing a coating over the substrate surface and the metal film pattern; and removing the coating over the metal film pattern by laser irradiation. The substrate and coating do not significantly interact with the laser irradiation, and the laser irradiation interacts with the metal film pattern and the coating, resulting in the removal of the coating over the metal film pattern. The invention offers a technique for the formation of a metal pattern surrounded by a dielectric coating for solar cells, where the dielectric coating may function as an antireflection coating on the front surface, internal reflector on the rear surface, and may further may function as a dielectric barrier for subsequent electroplating of metal patterns on either surface. |
US09634177B2 |
Solar cell emitter region fabrication with differentiated P-type and N-type region architectures
Methods of fabricating solar cell emitter regions with differentiated P-type and N-type regions architectures, and resulting solar cells, are described. In an example, a back contact solar cell includes a substrate having a light-receiving surface and a back surface. A first polycrystalline silicon emitter region of a first conductivity type is disposed on a first thin dielectric layer disposed on the back surface of the substrate. A second polycrystalline silicon emitter region of a second, different, conductivity type is disposed on a second thin dielectric layer disposed on the back surface of the substrate. A third thin dielectric layer is disposed laterally directly between the first and second polycrystalline silicon emitter regions. A first conductive contact structure is disposed on the first polycrystalline silicon emitter region. A second conductive contact structure is disposed on the second polycrystalline silicon emitter region. |
US09634176B2 |
Method for manufacturing crystalline silicon-based solar cell and method for manufacturing crystalline silicon-based solar cell module
A method for manufacturing a crystalline silicon-based solar cell having a photoelectric conversion section includes a silicon-based layer of an opposite conductivity-type on a first principal surface side of a crystalline silicon substrate of a first conductivity-type, and a collecting electrode formed by an electroplating method on a first principal surface of the photoelectric conversion section. By applying laser light from a first or second principal surface side of the photoelectric conversion section, an insulation-processed region his formed where a short-circuit between the first principal surface and a second principal surface of the photoelectric conversion section is eliminated. On the collecting electrode and/or the insulation-processed region, a protecting layer s formed for preventing diffusion of a metal contained in the collecting electrode into the substrate. After the protecting layer is formed, the insulation-processed region is heated to eliminate leakage between the substrate and the silicon-based layer. |
US09634175B2 |
Systems and methods for thermally managing high-temperature processes on temperature sensitive substrates
A method for depositing one or more thin-film layers on a flexible polyimide substrate having opposing front and back outer surfaces includes the following steps: (a) heating the flexible polyimide substrate such that a temperature of the front outer surface of the flexible polyimide substrate is higher than a temperature of the back outer surface of the flexible polyimide substrate, and (b) depositing the one or more thin-film layers on the front outer surface of the flexible polyimide substrate. A deposition zone for executing the method includes (a) one of more physical vapor deposition sources adapted to deposit one or more metallic materials on the front outer surface of the substrate, and (b) one or more radiant zone boundary heaters. |
US09634169B1 |
Hybrid solar concentrator utilizing a dielectric spectrum splitter
A hybrid solar concentrator that utilizes one or more dielectric mirrors to isolate components of the solar spectrum compatible with specific PV band-gaps and to pass longer wavelengths through to a heat receiver, generating both electricity and heat from a single set of dual-axis heliostats. |
US09634168B2 |
Attachment structures for building integrable photovoltaic modules
Provided are novel building integrable photovoltaic (BIP) modules having specially configured attachment structures for securing these modules to building structures and other BIP modules. In certain embodiments, a BIP module includes a base sheet supporting photovoltaic cells and having a rigid polymer portion and a flexible polymer portion. The flexible portion is designed to be penetrated with mechanical fasteners during installation. The flexible portion may include fastening pointers and/or through holes for identifying specific penetration locations. The rigid portion provides necessary structural rigidity and support to the module and more specifically to the photovoltaic cells. In certain other embodiments, a BIP module includes an adhesive bumper strip disposed along one edge of the module and configured for secure this module with respect to another module. During installation, the strip is positioned between a back sealing sheet of one module and a front sealing sheet of another module. |
US09634164B2 |
Reduced light degradation due to low power deposition of buffer layer
Methods for forming a photovoltaic device include forming a buffer layer between a transparent electrode and a p-type layer. The buffer layer includes a work function that falls substantially in a middle of a barrier formed between the transparent electrode and the p-type layer to provide a greater resistance to light induced degradation. An intrinsic layer and an n-type layer are formed over the p-type layer. |
US09634163B2 |
Lateral collection photovoltaics
A nanostructured or microstructured array of elements on a conductor layer together form a device electrode of a photovoltaic or detector structure. The array on the conductor layer has a high surface area to volume ratio configuration defining a void matrix between elements. An active layer or active layer precursors is disposed into the void matrix as a liquid to form a thickness coverage giving an interface on which a counter-electrode is positioned parallel to the conduction layer or as a vapor to form a conformal thickness coverage of the array and conduction layer. The thickness coverage is controlled to enhance collection of at least one of electrons and holes arising from photogeneration, or excitons arising from photogeneration, to the device electrode or a device counter-electrode as well as light absorption in said active layer via reflection and light trapping of said device electrode. |
US09634161B2 |
Nanoscale precursors for synthesis of Fe2(Si,Ge)(S,Se)4 crystalline particles and layers
Thin films comprising crystalline Fe2XY4, wherein X is Si or Ge and Y is S or Se, are obtained by coating an ink comprised of nanoparticle precursors of Fe2XY4 and/or a non-particulate amorphous substance comprised of Fe, X and Y on a substrate surface and annealing the coating. The coated substrate thereby obtained has utility as a solar absorber material in thin film photovoltaic devices. |
US09634156B2 |
Semiconductor photomultiplier and readout method
A silicon photomultiplier device is provided. The device comprises a plurality of photosensitive cells each having a photo-detector, a quench resistive load and a first stage capacitive load. The device is arranged in a three electrode connection configuration comprising first and second electrodes arranged to operably provide a biasing of the device and a third electrode operably used to readout a signal from the device. A second stage capacitive load is operably coupled to two or more photosensitive cells. |
US09634155B2 |
Method for producing an electrical terminal support
The invention relates to a method for producing an electrical terminal support for an optoelectronic semiconductor body, comprising the following steps: providing a carrier assembly (1), which comprises a carrier body (11), an intermediate layer (12) arranged on an outer surface (111) of the carrier body (11), and a use layer (13) arranged on the intermediate layer (12); introducing at least two openings (4), which are mutually spaced in the lateral direction (L), in the use layer (13) via an outer surface (131) of the use layer (13), wherein the openings extend completely through the use layer (13) in the vertical direction (V); electrically insulating lateral surfaces (41) of the openings (4) and of the outer face (131) of the use layer (13); arranging electrically conductive material (6) at least in the openings (4), wherein after completion of the terminal carrier (100), the electrically conductive material (6) has an interruption (U) in the progression thereof along the outer surface (131) of the use layer (13) in the lateral direction (L) between adjoining openings (4). |
US09634153B2 |
Sensor using sensing mechanism having combined static charge and field effect transistor
The present invention relates to a sensor that uses a sensing mechanism having a combined static charge and a field effect transistor, the sensor including: a substrate; source and drain units formed on the substrate and separated from each other; a channel unit interposed between the source and drain units; a membrane separated from the channel unit, disposed on a top portion and displaced in response to an external signal; and a static charge member formed on a bottom surface of the membrane separately from the channel unit and generating an electric field. Accordingly, since the sensor using a sensing mechanism having a combined static charge and a field effect transistor according to an embodiment of the present invention can measure the displacement or movement of the sensor by measuring a change of the electric field of the channel unit of the field effect transistor by using a static member, the electric field can be formed so as to be proportional to an amount of charge and inversely proportional to a squared distance regardless of the intensity and distribution of an external electric field. Therefore, sensitivity is improved without being affected by an external electric field. |
US09634150B2 |
Semiconductor device, display device, input/output device, and electronic device
A self-aligned transistor including an oxide semiconductor film, which has excellent and stable electrical characteristics, is provided. A semiconductor device is provided with a transistor that includes an oxide semiconductor film, a gate electrode overlapping with part of the oxide semiconductor film, and a gate insulating film between the oxide semiconductor film and the gate electrode. The oxide semiconductor film includes a first region and second regions between which the first region is positioned. The second regions include an impurity element. A side of the gate insulating film has a depressed region. Part of the gate electrode overlaps with parts of the second regions in the oxide semiconductor film. |
US09634148B2 |
Thin film transistor and manufacturing method thereof
The disclosure is related to a thin film transistor and a method of manufacturing the thin film transistor. The thin film transistor comprises a substrate, a first semiconductor layer, an etch stop layer and a second semiconductor layer stacked on a surface of the substrate, and a first via and a second via formed on the etch stop layer; a source and a drain formed separating from each other and the source and the drain overlapping two ends of the second semiconductor layer respectively, wherein the source connects the first semiconductor layer through the first via, and the drain connects the first semiconductor layer through the second via, a gate insulation layer formed on the source and the drain; and a gate formed on the gate insulation layer. The thin film transistor of the disclosure have a higher on-state current of the thin film transistor and a faster switching speed. |
US09634147B2 |
Thin film transistor array substrate and liquid crystal display panel using same
A thin film transistor (TFT) array substrate of a liquid crystal display (LCD) panel includes a first substrate, a gate located on the first substrate, a gate insulation layer located on the first substrate and covers the gate and the first substrate, a source layer located on the gate insulation layer to correspond to the gate, an etching stopping layer located on the source layer, and a source and a drain located on the etching stopping layer. The etching stopping layer is made of color photoresist. |
US09634145B2 |
TFT substrate with variable dielectric thickness
A transistor includes a substrate and an electrically conductive gate over the substrate. The gate has a gate length. A source electrode and a drain electrode are over the substrate, and are separated by a gap defining a channel region. The channel region has a channel length that is less than the gate length. A semiconductor layer is in contact with the source electrode and drain electrode. A dielectric stack is in contact with the gate, and has first, second, and third regions. The first region is in contact with the semiconductor layer in the channel region, and has a first thickness. The second region is adjacent to the first region that has the first thickness. The third region is adjacent to the second region, and has a thickness that is greater than the first thickness. |
US09634143B1 |
Methods of forming FinFET devices with substantially undoped channel regions
One disclosed method includes forming a fin in a substrate by etching a plurality of fin-formation trenches, forming a layer of insulating material in the trenches, performing a densification anneal process on the layer of insulating material and, after performing the densification anneal process, performing at least one ion implantation process to form a counter-doped well region in the fin. The method also includes forming an undoped semiconductor material on an exposed upper surface of the fin, recessing the insulating material so as to expose at least a portion of the undoped semiconductor material and forming a gate structure around the exposed portion of the undoped semiconductor material. |
US09634142B1 |
Method for improving boron diffusion in a germanium-rich fin through germanium concentration reduction in fin S/D regions by thermal mixing
A method may include forming a germanium-including fin on a substrate, and forming a dummy gate extending over the germanium-including fin, creating a channel under the gate and a source/drain region of the germanium-including fin extending from under the dummy gate on each side of the dummy gate. An in-situ p-type doped silicon germanium layer may be grown over the source/drain region, the germanium-including fin having a higher concentration of germanium than the in-situ p-type doped silicon germanium layer. An anneal thermally mixes the germanium of the in-situ p-type doped silicon germanium layer and the germanium of the germanium-including fin in the source/drain region of the germanium-including fin and diffuses the p-type dopant of the in-situ p-type doped silicon germanium layer into the channel of the germanium-including fin, forming a source/drain extension. A portion of the channel has a higher germanium concentration than the source/drain region. |
US09634141B1 |
Interlayer dielectric film in semiconductor devices
A method of forming a semiconductor device includes depositing a flowable dielectric layer on a substrate and annealing the flowable dielectric layer. The method further includes performing a high temperature (HT) doping process on the flowable dielectric layer. The HT doping process may include implanting dopant ions into the flowable dielectric layer and heating the substrate during the implanting of the dopant ions. The heating of the substrate may include heating a substrate holder upon which the substrate is disposed and maintaining the substrate at a temperature above 100° C. An example benefit reduced the wet etch rate (WER) of the flowable dielectric layer. |
US09634135B2 |
Power field effect transistor
A field-effect transistors (FET) cell structure has a substrate, an epitaxial layer of a first conductivity type on the substrate, first and second base regions of the second conductivity type arranged within the epitaxial layer or well and spaced apart, and first and second source regions of a first conductivity type arranged within the first and second base region, respectively. Furthermore, a gate structure insulated from the epitaxial layer by an insulation layer is provided and arranged above the region between the first and second base regions and covering at least partly the first and second base region, and a drain contact reaches from a top of the device through the epitaxial layer to couple a top contact or metal layer with the substrate. |
US09634132B2 |
Semiconductor structures and methods for multi-level band gap energy of nanowire transistors to improve drive current
A semiconductor device is provided having a channel formed from a nanowire with multi-level band gap energy. The semiconductor device comprises a nanowire structure formed between source and drain regions. The nanowire structure has a first band gap energy section joined with a second band gap energy section. The first band gap energy section is coupled to the source region and has a band gap energy level greater than the band gap energy level of the second band gap energy section. The second band gap energy section is coupled to the drain region. The first band gap energy section comprises a first material and the second band gap energy section comprises a second material wherein the first material is different from the second material. The semiconductor device further comprises a gate region around the junction between the first band gap energy section and the second band gap energy section. |
US09634131B2 |
Insulated gate bipolar device
A semiconductor device includes: metal collector layer on backside, P-type collector layer, N-type field stop layer and N− drift layer. There are active cells and dummy cells on top of the device. The active cell and dummy cell are separated by gate trench. The gate trench is formed by polysilicon and gate oxide layer. There are N+ region and P+ region in active cells, and they are connected to metal emitter layer through the window in the insulation layer. There are P-well regions in both active cells and dummy cells. The P-well regions in active cells are continuous and connected to emitter electrode through P+ region. The P-well regions in dummy cells are discontinuous and electrically floating. |
US09634129B2 |
Insulated gate bipolar transistor (IGBT) and related methods
An insulated gate bipolar transistor (IGBT) includes a gate trench, an emitter trench, and an electrically insulative layer coupled to the emitter trench and the gate trench and electrically isolating the gate trench from an electrically conductive layer. A contact opening in the electrically insulative layer extends into the emitter trench and the electrically conductive layer electrically couples with the emitter trench therethrough. A P surface doped (PSD) region and an N surface doped (NSD) region are each located between the electrically conductive layer and a plurality of semiconductor layers of the IGBT and between the gate trench and the emitter trench. The electrically conductive layer electrically couples to the plurality of semiconductor layers through the PSD region and/or the NSD region. |
US09634127B2 |
FinFET device and method for fabricating same
Methods are disclosed herein for fabricating integrated circuit devices, such as fin-like field-effect transistors (FinFETs). An exemplary method includes forming a first semiconductor material layer over a fin portion of a substrate; forming a second semiconductor material layer over the first semiconductor material layer; and converting a portion of the first semiconductor material layer to a first semiconductor oxide layer. The fin portion of the substrate, the first semiconductor material layer, the first semiconductor oxide layer, and the second semiconductor material layer form a fin. The method further includes forming a gate stack overwrapping the fin. |
US09634122B2 |
Device boost by quasi-FinFET
Some embodiments relate to an integrated circuit (IC) including one or more field-effect transistor devices. A field effect transistor device includes source/drain regions disposed in an active region of a semiconductor substrate and separated from one another along a first direction by a channel region. A shallow trench isolation (STI) region, which has an upper STI surface, laterally surrounds the active region. The STI region includes trench regions, which have lower trench surfaces below the upper STI surface and which extend from opposite sides of the channel region in a second direction which intersects the first direction. A metal gate electrode extends in the second direction and has lower portions which are disposed in the trench regions and which are separated from one another by the channel region. The metal gate electrode has an upper portion bridging over the channel region to couple the lower portions to one another. |
US09634121B2 |
Method of manufacturing display panel
A method of manufacturing a display panel having a plurality of lightly doped drain thin film transistors arranged as a matrix includes forming a semiconductor pattern with a predetermined shape on a substrate; forming a dielectric layer covering the semiconductor pattern on the substrate; forming a metal layer on the dielectric layer; forming a photoresist patterns smaller than the semiconductor pattern on the metal layer above the semiconductor pattern; etching the metal layer to form a gate electrode smaller than the photoresist pattern; doping high concentration ions by using the photoresist pattern as a mask to form a pair of highly doped regions on the semiconductor pattern not covered by the photoresist pattern; removing the photoresist pattern; and doping low concentration ions by using the gate electrode as a mask to form a pair of lightly doped regions between the highly doped regions and a part of the semiconductor pattern. |
US09634117B2 |
Self-aligned contact process enabled by low temperature
Self-aligned contacts of a semiconductor device are fabricated by forming a metal gate structure on a portion of a semiconductor layer of a substrate. The metal gate structure contacts inner sidewalls of a gate spacer. A second sacrificial epitaxial layer is formed on a first sacrificial epitaxial layer. The first sacrificial epitaxial layer is adjacent to the gate spacer and is formed on source/drain regions of the semiconductor layer. The first and second sacrificial epitaxial layers are recessed. The recessing exposes at least a portion of the source/drain regions. A first dielectric layer is formed on the exposed portions of the source/drain regions, and over the gate spacer and metal gate structure. At least one cavity within the first dielectric layer is formed above at least one of the exposed portions of source/drain regions. At least one metal contact is formed within the at least one cavity. |
US09634114B2 |
Tunnel field-effect transistor, method for manufacturing same, and switch element
A tunnel field-effect transistor (TFET) is configured by disposing a III-V compound semiconductor nano wire on a (111) plane of a IV semiconductor substrate exhibiting p-type conductivity, and arbitrarily disposing electrodes of a source, drain and gate. Alternatively, the tunnel field-effect transistor is configured by disposing a III-V compound semiconductor nano wire on a (111) plane of a IV semiconductor substrate exhibiting n-type conductivity, and arbitrarily disposing electrodes of a source, drain and gate. The nano wire is configured from a first region and a second region. For instance, the first region is intermittently doped with a p-type dopant, and the second region is doped with an n-type dopant. |
US09634113B2 |
Fully silicided linerless middle-of-line (MOL) contact
A method of making a semiconductor device includes forming a source/drain region on a substrate; disposing a gate stack on the substrate and adjacent to the source/drain region, the gate stack including a gate spacer along a sidewall of the gate stack; disposing an inter-level dielectric (ILD) layer on the source/drain region and the gate stack; removing a portion of the ILD layer on the source/drain region to form a source/drain contact pattern; filling the source/drain contact pattern with a layer of silicon material, the layer of silicon material being in contact with the source/drain region and in contact with the gate spacer; depositing a metallic layer over the first layer of silicon material; and performing a silicidation process to form a source/drain contact including a silicide. |
US09634112B2 |
Field effect transistor and method of fabricating the same
A field effect transistor is provided. The field effect transistor may include a capping layer on a substrate, a source ohmic electrode and a drain ohmic electrode on the capping layer, a first insulating layer and a second insulating layer stacked on the capping layer to cover the source and drain ohmic electrodes, a Γ-shaped gate electrode including a leg portion and a head portion, the leg portion being connected to the substrate between the source ohmic electrode and the drain ohmic electrode, and the head portion extending from the leg portion to cover a top surface of the second insulating layer, a first planarization layer on the second insulating layer to cover the Γ-shaped gate electrode, and a first electrode on the first planarization layer, the first electrode being connected to the source ohmic electrode or the drain ohmic electrode. |
US09634111B2 |
Passivation technique for wide bandgap semiconductor devices
A method of protecting a semiconductor structure from water and a semiconductor structure formed by the method. The semiconductor structure includes a wide-bandgap semiconductor material in which at least one semiconductor device is formed. The method includes heating the semiconductor structure in a vacuum to a temperature of at least 200° C. to remove water from the semiconductor structure. The method also includes, after the heating of the semiconductor structure, forming a layer comprising a hydrophobic material over the semiconductor structure. The semiconductor structure is kept in the vacuum between the heating of the semiconductor structure and the forming of the layer comprising the hydrophobic material. |
US09634110B2 |
POC process flow for conformal recess fill
A method of filling trenches between gates includes forming a first and a second dummy gate over a substrate, the first and second dummy gates including a sacrificial gate material and a hard mask layer; forming a first gate spacer along a sidewall of the first dummy gate and a second gate spacer along a sidewall of the second dummy gate; performing an epitaxial growth process to form a source/drain on the substrate between the first and second dummy gates; disposing a conformal liner over the first and second dummy gates and the source/drain; disposing an oxide on the conformal liner between the first and second dummy gates; recessing the oxide to a level below the hard mask layers of the first and second dummy gates to form a recessed oxide; and depositing a spacer material over the recessed oxide between the first dummy gate and the second dummy gate. |
US09634108B2 |
Method of manufacturing a device by locally heating one or more metalization layers and by means of selective etching
A method of manufacturing a device comprises depositing one or more metallization layers to a substrate, locally heating an area of the one or more metallization layers to obtain a substrate/metallization-layer compound or a metallization-layer compound, the compound comprising an etch-selectivity toward an etching medium which is different to that of the one or more metallization layers outside the area, and removing the one or more metallization layers in the area or outside the area, depending on the etching selectivity in the area or outside the area, by etching with the etching medium to form the device. |
US09634107B2 |
Low temperature ohmic contacts for III-N power devices
The disclosure relates to a method for manufacturing an Au-free ohmic contact for an III-nitride (III-N) device on a semiconductor substrate and to a III-N device obtainable therefrom. The III-N device includes a buffer layer, a channel layer, a barrier layer, and a passivation layer. A 2DEG layer is formed at an interface between the channel layer and the barrier layer. The method includes forming a recess in the passivation layer and in the barrier layer up to the 2DEG layer, and forming an Au-free metal stack in the recess. The metal stack comprises a Ti/Al bi-layer, with a Ti layer overlying and in contact with a bottom of the recess, and a Al layer overlying and in contact with the Ti layer. A thickness ratio of the Ti layer to the Al layer is between 0.01 to 0.1. After forming the metal stack, a rapid thermal anneal is performed. Optionally, prior to forming the Ti/Al bi-layer, a silicon layer may be formed in contact with the recess. |
US09634101B2 |
Semiconductor component with a monocrystalline semiconductor region arranged in a via region
A MOS transistor semiconductor component includes a semiconductor body with first and second surfaces, a first contact electrode on the first surface, a second contact electrode on the second surface, a first insulation layer separating a via region at least from a drift region, a monocrystalline semiconductor region arranged in the via region and extending between the first surface and the second surface, a gate electrode electrically connected to the first contact electrode, a source electrode electrically insulated from the gate electrode, and arranged at least partially above the first surface, and a drain electrode electrically insulated from the second contact electrode on the second surface. The MOS transistor has a gate terminal formed by the second contact electrode and electrically connected to a gate-electrode of the MOS transistor through the via region. The gate-electrode is formed next to the first surface and disposed outside the via region. |
US09634096B2 |
Semiconductor device with trench isolation
A semiconductor device includes a semiconductor substrate and a trench isolation. The trench isolation is located in the semiconductor substrate, and includes an epitaxial layer and a dielectric material. The epitaxial layer is in a trench of the semiconductor and is peripherally enclosed thereby, in which the epitaxial layer is formed by performing etch and epitaxy processes. The etch and epitaxy process includes etching out a portion of a sidewall of the trench and a portion of a bottom surface of the trench and forming the epitaxial layer conformal to the remaining portion of the sidewall and the remaining portion of the bottom surface. The dielectric material is peripherally enclosed by the epitaxial layer. |
US09634094B1 |
Strain-enhanced transistors with adjustable layouts
A transistor may include a semiconductor region such as a rectangular doped silicon well. Gate fingers may overlap the silicon well. The gate fingers may be formed from polysilicon and may be spaced apart from each other along the length of the well by a fixed gate-to-gate spacing. The edges of the well may be surrounded by field oxide. Epitaxial regions may be formed in the well to produce compressive or tensile stress in channel regions that lie under the gate fingers. The epitaxial regions may form source-drain terminals. The edges of the field oxide may be separated from the nearest gate finger edges by a distance that is adjusted automatically with a computer-aided-design tool and that may be larger than the gate-to-gate spacing. Dummy gate finger structures may be provided to ensure desired levels of stress are produced. |
US09634091B2 |
Silicon and silicon germanium nanowire formation
Among other things, one or semiconductor arrangements, and techniques for forming such semiconductor arrangements are provided. For example, one or more silicon and silicon germanium stacks are utilized to form PMOS transistors comprising germanium nanowire channels and NMOS transistors comprising silicon nanowire channels. In an example, a first silicon and silicon germanium stack is oxidized to transform silicon to silicon oxide regions, which are removed to form germanium nanowire channels for PMOS transistors. In another example, silicon and germanium layers within a second silicon and silicon germanium stack are removed to form silicon nanowire channels for NMOS transistors. PMOS transistors having germanium nanowire channels and NMOS transistors having silicon nanowire channels are formed as part of a single fabrication process. |
US09634089B2 |
Selective amorphization for signal isolation and linearity
Provided is a structure for improved electrical signal isolation between adjacent devices situated in a top semiconductor layer of the structure and a method for the structure's fabrication. The structure comprises a gate situated on the top semiconductor layer, the top semiconductor layer situated over a base oxide layer, and the base oxide layer situated over a handle wafer. The top surface of the handle wafer is amorphized by an inert implant of Xenon or Argon to reduce carrier mobility in the handle wafer and improve electrical signal isolation between the adjacent devices situated in the top semiconductor layer. |
US09634086B2 |
Method of manufacturing semiconductor devices using light ion implantation and semiconductor device
A first doped region is formed in a single crystalline semiconductor substrate. Light ions are implanted through a process surface into the semiconductor substrate to generate crystal lattice vacancies between the first doped region and the process surface, wherein a main beam axis of an implant beam used for implanting the light ions deviates by at most 1.5 degree from a main crystal direction along which channeling of the light ions occurs. A second doped region with a conductivity type opposite to the first doped region is formed based on the crystal lattice vacancies and hydrogen atoms. |
US09634082B2 |
Semiconductor device and method for manufacturing semiconductor device
A highly reliable semiconductor device is manufactured by giving stable electric characteristics to a transistor in which an oxide semiconductor film is used for a channel. An oxide semiconductor film which can have a first crystal structure by heat treatment and an oxide semiconductor film which can have a second crystal structure by heat treatment are formed so as to be stacked, and then heat treatment is performed; accordingly, crystal growth occurs with the use of an oxide semiconductor film having the second crystal structure as a seed, so that an oxide semiconductor film having the first crystal structure is formed. An oxide semiconductor film formed in this manner is used for an active layer of the transistor. |
US09634078B2 |
Organic display device
The present inversion provides an organic display device comprising at least infrared display pixel, the infrared display pixel includes a transparent substrate which is deposited with a first electrode layer, an infrared organic light emitting layer and a second electrode layer thereon, and the infrared organic light emitting layer is filled with an infrared light emitting material. The present invention can allow the organic display device to carry out large area of infrared display; and the present invention uses the flexible transparent substrate, so as to conveniently use and carry the organic display device. |
US09634070B2 |
Organic light emitting display device
An organic light emitting display device includes: a display panel including scan lines, and pixels, a pixel of the pixels including: a driving transistor having a gate electrode; an insulator layer disposed on the gate electrode of the driving transistor; an electrode disposed on the insulator layer and coupled to the gate electrode of the driving transistor through a first contact hole; a first passivation layer disposed on the electrode; a first voltage line disposed on the first passivation layer and configured to supply a first voltage; a second passivation layer disposed on the first voltage line; and an organic light emitting diode (OLED) having an anode coupled to the driving transistor, wherein the anode is disposed on the second passivation layer, and wherein the first voltage line overlaps with the electrode and the anode. |
US09634069B2 |
Display device
A display device includes an element substrate including a display area where a plurality of self-light-emitting elements are formed, and a driver IC disposed outside the display area in the element substrate. A first metal layer is disposed on the reverse side of the element substrate at a position opposite to the display area. A second metal layer is disposed with a space between the first metal layer and the second metal layer on the reverse side of the element substrate at a position opposite to the driver IC. |
US09634067B2 |
Electro-optical apparatus, manufacturing method for electro-optical apparatus, and electronic device
An electro-optical apparatus includes a first pixel and a second pixel. The first pixel and the second pixel include a reflective layer, an insulating layer, a functional layer, and an opposing electrode. The insulating layer includes a first insulating layer, a second insulating layer having a first opening, and a third insulating layer having a second opening. A first pixel electrode is provided on the first insulating layer in the first opening. A second pixel electrode is provided on the second insulating layer. |
US09634064B2 |
Semiconductor memory device having stacked word lines and conductive pillar
According to one embodiment, a manufacturing method of a semiconductor memory device includes forming a stacked body in which word line material layers and insulating layers are alternately stacked on a base layer. The method includes forming first holes on the stacked body so as to be arranged in a first direction and in a second direction that intersects with the first direction. The method includes forming resistance-change films on inner walls of the first holes, forming bit lines inside the resistance-change films in the first holes, and dividing the stacked body in the first direction by forming second holes so that a portion in the stacked body adjacent to the resistance-change films in the second direction. The method includes forming inter-bit line insulating films in the second holes. |
US09634062B2 |
Light sources utilizing segmented LEDs to compensate for manufacturing variations in the light output of individual segmented LEDs
A light source and method for making the same are disclosed. The light source includes a plurality of Segmented LEDs connected in parallel to a power bus and a controller. The power bus accepts a variable number of Segmented LEDs. The controller receives AC power and provides a power signal on the power bus. Each Segmented LED is characterized by a driving voltage that is greater than 3 times the driving voltage of a conventional LED fabricated in the same material system as the Segmented LED. The number of Segmented LEDs in the light source is chosen to compensate for variations in the light output of individual Segmented LEDs introduced by the manufacturing process. In another aspect of the invention, the number of Segmented LEDs connected to the power bus can be altered after the light source is assembled. |
US09634054B2 |
Solid-state image pickup device and method of driving the same
A solid-state image pickup device includes: a photoelectric conversion element including a charge accumulation region, the photoelectric conversion element performing photoelectric conversion on incident light and accumulating, in the charge accumulation region, electric charge obtained through the photoelectric conversion; a charge-voltage conversion element accumulating the electric charge obtained through the photoelectric conversion; and a charge accumulation element adjacent to the photoelectric conversion element, part or all of the charge accumulation element overlapping the charge accumulation region, and the charge accumulation element adding capacitance to capacitance of the charge-voltage conversion element. |
US09634051B2 |
Optical devices, in particular computational cameras, and methods for manufacturing the same
Then optical device comprises a first member (P) and a second member (O) and, arranged between said first and second members, a third member (S) referred to as spacer. The spacer (S) comprises —one or more portions referred to as distancing portions (Sd) in which the spacer has a vertical extension referred to as maximum vertical extension; —at least two separate portions referred to as open portions (4) in which no material of the spacer is present; and —one or more portions referred to as structured portions (Sb) in which material of the spacer is present and in which the spacer has a vertical extension smaller than said maximum vertical extension. Such optical devices can be used in or as multi-aperture cameras. |
US09634047B2 |
Solid-state image pickup device, method of manufacturing solid-state image pickup device, and electronic apparatus
There is provided a solid-state image pickup device including: a semiconductor substrate (21); a photodiode (11A, 11B) formed in the semiconductor substrate; a transistor (10) having a gate electrode (14) part or all of which is embedded in the semiconductor substrate, the transistor being configured to read a signal electric charge from the photodiode via the gate electrode; and an electric charge transfer layer (13) provided between the gate electrode and the photodiode. |
US09634040B2 |
Array substrate and curved display device
The Present disclosure relates to the field of display technology and discloses an array substrate and a curved display device which can solve the technical problem of dark area on both sides of the existing curved display device. The array substrate according to the present disclosure comprises a number of sub pixel units arranged as an array, each sub pixel unit comprising a main sub pixel, a secondary sub pixel and a voltage-dividing capacitor. Said array substrate is divided into a compensation region and a non-compensation region. The capacitance of the voltage-dividing capacitor of the sub pixel unit in the compensation region is smaller than that of the voltage-dividing capacitor of the sub pixel unit in the non-compensation region. The present disclosure is applicable to curved display devices such as curved television and curved display, etc. |
US09634037B2 |
Array substrate for display devices
An array substrate for display devices is provided. According to an exemplary embodiment, the array substrate for display device includes: a plurality of gate lines that extend along a first direction; and a data line that is formed by connecting a plurality of first sub-data lines extending along a second direction and a plurality of second sub-data lines extending along a third direction, wherein the gate lines overlap the second sub-data lines with an insulating layer interposed therebetween. |
US09634034B2 |
Display panel, display apparatus having the same and method of manufacturing the same
A display panel includes a display area configured to display an image, and a peripheral area adjacent to the display area. The peripheral area includes a pad area in which a plurality of output pads are disposed. The output pads are arranged in a matrix formed having M row*N column (M and N are normal numbers, M is 3 or larger than 3). Each of the output pads has a center of the output pad spaced apart from a center of an adjacent output pad by a distance D in a first direction. Each of the output pads is spaced apart from an adjacent output pad by a gap. Each of the output pads has a center of the output pad spaced apart from a center of an adjacent output pad by a pitch P in a second direction which is substantially perpendicular to the first direction. An equation “P |
US09634032B2 |
Manufacture method of dual gate oxide semiconductor TFT substrate and structure thereof
The present invention provides a manufacture method of an oxide semiconductor TFT substrate and a structure thereof. The manufacture method of the dual gate oxide semiconductor TFT substrate utilizes the halftone mask to implement one photo process, which cannot only accomplish the patterning to the oxide semiconductor layer but also obtain the oxide conductor layer (53′) with ion doping process; the method implements the patterning process to the bottom gate isolation layer (31) and the top gate isolation layer (32) at the same time with one photo process; the method manufactures the first top gate (71), the first source (81), the first drain (82), the second top gate (72), the second source (83), the second drain (84) at the same time with one photo process; the method implements patterning process to the flat layer (9), the passivation layer (8) and the top gate isolation layer (32) at the same time with one photo process, to reduce the number of the photo processes to five for shortening the manufacture procedure, raising the production efficiency and lowering the production cost. |
US09634031B2 |
Semiconductor device comprising oxide semiconductor
To suppress change in electric characteristics and improve reliability of a semiconductor device including a transistor formed using an oxide semiconductor. A semiconductor device includes a transistor including a gate electrode, a first insulating film, an oxide semiconductor film, a second insulating film, and a pair of electrodes. The gate electrode and the oxide semiconductor film overlap with each other. The oxide semiconductor film is located between the first insulating film and the second insulating film and in contact with the pair of electrodes. The first insulating film is located between the gate electrode and the oxide semiconductor film. An etching rate of a region of at least one of the first insulating film and the second insulating film is higher than 8 nm/min when etching is performed using a hydrofluoric acid. |
US09634028B2 |
Metallized junction FinFET structures
FinFET devices are provided wherein the current path is minimized and mostly limited to spacer regions before the channel carriers reach the metal contacts. The fins in the source/drain regions are metallized to increase the contact area and reduce contact resistance.Selective removal of semiconductor fins in the source/drain regions following source/drain epitaxy facilitates replacement thereof by the metallized fins. A spacer formed subsequent to source/drain epitaxy prevents the etching of extension/channel regions during semiconductor fin removal. |
US09634027B2 |
CMOS structure on SSOI wafer
A method of forming fins in a complimentary-metal-oxide-semiconductor (CMOS) device that includes a p-type field effect transistor device (pFET) and an n-type field effect transistor (nFET) device and a CMOS device are described. The method includes forming a strained silicon-on-insulator (SSOI) layer in both a pFET region and an nFET region, etching the strained silicon layer, the insulator, and a portion of the bulk substrate in only the pFET region to expose the bulk substrate, epitaxially growing silicon (Si) from the bulk substrate in only the pFET region, and epitaxially growing additional semiconductor material on the Si in only the pFET region. The method also includes forming fins from the additional semiconductor material and a portion of the Si grown on the bulk substrate in the pFET region, and forming fins from the strained silicon layer and the insulator in the nFET region. |
US09634023B2 |
Vertical memory devices
According to example embodiments, a vertical memory device includes a low resistance layer on a lower insulation layer, a channel layer on the low resistance layer, a plurality of vertical channels on the channel layer, and a plurality of gate lines. The vertical channels extend in a first direction that is perpendicular with respect to a top surface of the channel layer. The gate lines surround outer sidewalls of the vertical channels, and are stacked in the first direction and are spaced apart from each other. |
US09634018B2 |
Split gate non-volatile memory cell with 3D finFET structure, and method of making same
A non-volatile memory cell including a semiconductor substrate having a fin shaped upper surface with a top surface and two side surfaces. Source and drain regions are formed in the fin shaped upper surface portion with a channel region there between. A conductive floating gate includes a first portion extending along a first portion of the top surface, and second and third portions extending along first portions of the two side surfaces, respectively. A conductive control gate includes a first portion extending along a second portion of the top surface, second and third portions extending along second portions of the two side surfaces respectively, a fourth portion extending up and over at least some of the floating gate first portion, and fifth and sixth portions extending out and over at least some of the floating gate second and third portions respectively. |
US09634014B2 |
Method of making a programmable cell and structure thereof
A programmable cell includes a split gate structure. The split gate structure includes a thin gate dielectric region and a thick gate dielectric region disposed below a gate conductor. A thickness of the thick oxide region is more than a thickness of the thin oxide region. The programmable cell can be fabricated using angle doping to dope an area associated with the thin dielectric region. |
US09634011B2 |
Semiconductor device having buried gate structure and method for manufacturing the same, memory cell having the same and electronic device having the same
A semiconductor device includes a substrate comprising a trench; a gate dielectric layer formed over a surface of the trench; a gate electrode positioned at a level lower than a top surface of the substrate, and comprising a lower buried portion embedded in a lower portion of the trench over the gate dielectric layer and an upper buried portion positioned over the lower buried portion; and a dielectric work function adjusting liner positioned between the lower buried portion and the gate dielectric layer; and a dipole formed between the dielectric work function adjusting liner and the gate dielectric layer. |
US09634009B1 |
System and method for source-drain extension in FinFETs
A fin-type field effect transistor (finFET) device includes a gate disposed over at least two fins, each fin defining a source outboard portion and a drain outboard portion extending beyond the gate. There is a source contact that electrically connects the source outboard portions of the fins, and similarly on the opposed side of the gate there is a drain contact electrically connecting the drain outboard portions of the fins. A first dielectric spacer layer is disposed adjacent to the gate and overlying the fins, and a second dielectric spacer layer is disposed adjacent to the first spacer layer and also overlying the fins. The second dielectric spacer layer electrically isolates the gate from the drain contact and/or from the source contact. A method of making a finFET device is also detailed. |
US09634008B2 |
Semiconductor device and manufacturing method of semiconductor device
According to one embodiment, a semiconductor device includes an element isolation insulating film, a gate electrode film, source/drain regions, a channel region, and an air gap. The element isolation insulating film partitions an element arrangement area on one main face side of a semiconductor substrate. The channel region is disposed near a surface of the semiconductor substrate below the gate electrode film. The air gap is disposed at a region of the element isolation insulating film contacting with the channel region. |
US09634003B2 |
Special construct for continuous non-uniform RX FinFET standard cells
Methods for abutting two cells with different sized diffusion regions and the resulting devices are provided. Embodiments include abutting a first cell having first drain and source diffusion regions and a second cell having second drain and source diffusion regions, larger than the first diffusion regions, by: forming a dummy gate at a boundary between the two cells; forming a continuous drain diffusion region having an upper portion crossing the dummy gate and encompassing the entire first drain diffusion region and part of the second drain diffusion region and having a lower portion beginning over the dummy gate and encompassing a remainder of the second drain diffusion region; forming a continuous source diffusion region that is the mirror image of the continuous drain diffusion region; and forming a poly-cut mask over the dummy gate between, but separated from, the continuous drain and source diffusion regions. |
US09633997B2 |
Semiconductor device and method for manufacturing semiconductor device
A semiconductor device, in which, in a density distribution of first conductivity type impurities in the first conductivity type region measured along a thickness direction of the semiconductor substrate, a local maximum value N1, a local minimum value N2, a local maximum value N3, and a density N4 are formed in this order from front surface side, a relationship of N1>N3>N2>N4 is satisfied, a relationship of N3/10>N2 is satisfied, and a distance “a” from the surface to the depth having the local maximum value N1 is larger than twice a distance “b” from the depth having the local maximum value N1 to the depth having the local minimum N2. |
US09633988B2 |
Apparatuses and methods of communicating differential serial signals including charge injection
Apparatuses and methods are disclosed, including an apparatus that includes a differential driver with charge injection pre-emphasis. One such apparatus includes a pre-emphasis circuit and an output stage circuit. The pre-emphasis circuit is configured to receive differential serial signals, and buffer the differential serial signals to provide buffered differential serial signals. The output stage circuit is configured to receive the buffered differential serial signals and drive the buffered differential serial signals onto differential communication paths. The pre-emphasis circuit is configured to selectively inject charge onto the differential communication paths to assist with a signal transition on at least one of the differential communication paths. Additional embodiments are disclosed. |
US09633986B2 |
Technique for fabrication of microelectronic capacitors and resistors
A sequence of semiconductor processing steps permits formation of both vertical and horizontal nanometer-scale serpentine resistors and parallel plate capacitors within a common structure. The method takes advantage of a CMP process non-uniformity in which the CMP polish rate of an insulating material varies according to a certain underlying topography. By establishing such topography underneath a layer of the insulating material, different film thicknesses of the insulator can be created in different areas by leveraging differential polish rates, thereby avoiding the use of a lithography mask. In one embodiment, a plurality of resistors and capacitors can be formed as a compact integrated structure within a common dielectric block, using a process that requires only two mask layers. The resistors and capacitors thus formed as a set of integrated circuit elements are suitable for use as microelectronic fuses and antifuses, respectively, to protect underlying microelectronic circuits. |
US09633984B2 |
Semiconductor module
According to one embodiment, a semiconductor module includes a first semiconductor element, a second semiconductor element, a first light emitting element and a second light emitting element. The first semiconductor element is provided with a first light receiving circuit and a first output circuit. The second semiconductor element is provided with a second light receiving circuit and a second output circuit. The first light emitting element is electrically connected to the second output circuit and mounted on the first semiconductor element such that first light emitted from the first light emitting element is received by the first light receiving circuit. The second light emitting element is electrically connected to the first output circuit and mounted on the second semiconductor element such that second light emitted from the second light emitting element is received by the second light receiving circuit. |
US09633978B2 |
Semiconductor device and method of manufacturing the same
A semiconductor device includes a wiring substrate, a first semiconductor chip flip-chip connected to the wiring substrate, a first underfill resin filled between the wiring substrate and the first semiconductor chip, the first underfill resin including a pedestal portion arranged in a periphery of the first semiconductor chip, a second semiconductor chip flip-chip connected to the first semiconductor chip, and being larger in area than the first semiconductor chip, and a second underfill resin filled between the first semiconductor chip and the second semiconductor chip, the second underfill resin covering an upper face of the pedestal portion of the first underfill resin and a side face of the second semiconductor chip. |
US09633972B2 |
Method for manufacturing semiconductor display panel
A manufacturing method includes: attaching a film onto a bonding surface of a wafer; performing laser cutting on the wafer to obtain a plurality of semiconductor light-emitting eutectic chips; attaching light-emitting surfaces of the plurality of eutectic chips on to an expansion film; detaching films from bonding surfaces of the plurality of eutectic chips; performing wafer expansion on the expansion film so that the plurality of eutectic chips have the same intervals as chip loading spaces on a substrate; attaching the expansion film onto a tray, and moving the tray so that positions of the plurality of eutectic chips correspond to that of the chip loading spaces; moving the tray so that the plurality of eutectic chips approach the chip loading spaces on the substrate; and embedding the plurality of eutectic chips into the chip loading spaces so that the plurality of eutectic chips are electrically connected to the substrate. |
US09633971B2 |
Structures and methods for low temperature bonding using nanoparticles
A method of making an assembly can include forming a first conductive element at a first surface of a substrate of a first component, forming conductive nanoparticles at a surface of the conductive element by exposure to an electroless plating bath, juxtaposing the surface of the first conductive element with a corresponding surface of a second conductive element at a major surface of a substrate of a second component, and elevating a temperature at least at interfaces of the juxtaposed first and second conductive elements to a joining temperature at which the conductive nanoparticles cause metallurgical joints to form between the juxtaposed first and second conductive elements. The conductive nanoparticles can be disposed between the surfaces of the first and second conductive elements. The conductive nanoparticles can have long dimensions smaller than 100 nanometers. |
US09633966B2 |
Stacked semiconductor package and manufacturing method thereof
A stacked semiconductor package and a manufacturing method thereof. For example and without limitation, various aspects of this disclosure provide a semiconductor package in which an upper interposer and/or package are electrically and mechanically coupled to a lower package utilizing an adhesive member comprising conductive particles. |
US09633965B2 |
Semiconductor structure and manufacturing method of the same
The present disclosure provides a semiconductor package, including a semiconductor die and a substrate having a first surface electrically coupled to the semiconductor die and a second surface opposing to the first surface. The first surface includes a core region having a plurality of landing pads and a periphery region surrounding the core region and having a plurality of landing traces. A pitch of the landing pads is from about 55 μm to about 280 μm. The semiconductor die includes a third surface facing the first surface of the substrate and a fourth surface opposing to the third surface. The third surface includes a plurality of elongated bump positioned correspondingly to the landing pads and the landing traces of the substrate, and the elongated bump includes a long axis and a short axis perpendicular to the long axis on a cross section thereof. |
US09633964B2 |
Wiring substrate and electronic component device
A wiring substrate includes a connection pad formed in the outermost wiring layer, a dummy pad formed in the outermost wiring layer, and a dummy wiring portion formed in the outermost wiring layer, the dummy wiring portion connecting the connection pad and the dummy pad. The maximum width of each of the connection pad and the dummy pad is set to be larger than the width of the dummy wiring portion. A bump of an electronic component is flip-chip connected to a connection pad through a resin-containing solder. |
US09633961B2 |
Packaging devices and methods of manufacture thereof
Packaging devices and methods of manufacture thereof for semiconductor devices are disclosed. In some embodiments, a packaging device includes a contact pad disposed over a substrate, and a passivation layer disposed over the substrate and a first portion of the contact pad. A post passivation interconnect (PPI) line is disposed over the passivation layer and is coupled to a second portion of the contact pad. A PPI pad is disposed over the passivation layer. A transition element is disposed over the passivation layer and is coupled between the PPI line and the PPI pad. The transition element comprises a first side and a second side coupled to the first side. The first side and the second side of the transition element are non-tangential to the PPI pad. |
US09633960B2 |
Chip with I/O pads on peripheries and method making the same
A chip with I/O pads on the peripheries and a method making the chip is disclosed. The chip includes: a substrate; at least two metal layers, formed above the substrate, each metal layer forming a specific circuit, wherein two adjacent metal layers are separated by an inter-metal dielectric layer; and a passivation layer, formed on a top side of the chip. By changing the I/O pad from the top of the chip to the peripheries, the extra thickness of the packaged chip caused by wire bonding in the prior arts can be reduced. |
US09633959B2 |
Integrated circuit die with corner IO pads
An integrated circuit (IC) die has side input/output (IO) pads located along each side of the die interior. Each die corner has a corner IO pad. The side IO pads adjacent to the corner IO pads have shortened passivation regions in the top metal layer (TML) that define TML access regions. TML traces run through the TML access regions to connect the corner IO pads to the die interior. Providing corner IO pads enables an IC die to have up to four more IO pads than a comparable conventional IC die that does not have any corner IO pads, or an IC die to have the same number of IO pads within a smaller overall footprint. |
US09633955B1 |
Semiconductor integrated circuit structure including dielectric having negative thermal expansion
A semiconductor IC structure includes a semiconductor substrate, a multi-layered dielectric structure disposed on the semiconductor substrate, a first conductive layer disposed in the multi-layered dielectric structure, and a second conductive layer disposed on the multi-layered dielectric structure. The multi-layered dielectric structure further includes a first dielectric layer disposed on the semiconductor substrate, and a second dielectric layer disposed on the first dielectric layer. A coefficient of thermal expansion (CTE) of the first dielectric layer is larger than zero, and a CTE of the second dielectric layer is smaller than zero. |
US09633953B2 |
Methodology to achieve zero warpage for IC package
A methodology for addressing package warpage is described. In an embodiment a package includes a die mounted on a wiring board. Portion of a metal plane within the wiring board includes a reduced portion, characterized by a reduced thickness that is less than a baseline thickness. |
US09633951B2 |
Semiconductor package including a semiconductor die having redistributed pads
A semiconductor package that includes a semiconductor die, an insulation around the die, and a conforming conductive pad coupled to an electrode of the die. |
US09633949B2 |
Copper etching integration scheme
The present disclosure is directed to an integrated circuit. The integrated circuit has a conductive body disposed over a substrate. The conductive body has tapered sidewalls that cause an upper surface of the conductive body to have a greater width than a lower surface of the conductive body. The integrated circuit also has a projection disposed over the conductive body. The projection has tapered sidewalls that cause a lower surface of the projection to have a greater width than an upper surface of the projection and a smaller width than an upper surface of the conductive body. A dielectric material surrounds the conductive body and the projection. |
US09633948B2 |
Low energy etch process for nitrogen-containing dielectric layer
A stack that includes, from bottom to top, a nitrogen-containing dielectric layer, an interconnect level dielectric material layer, and a hard mask layer is formed on a substrate. The hard mask layer and the interconnect level dielectric material layer are patterned by an etch. Employing the patterned hard mask layer as an etch mask, the nitrogen-containing dielectric layer is patterned by a break-through anisotropic etch, which employs a fluorohydrocarbon-containing plasma to break through the nitrogen-containing dielectric layer. Fluorohydrocarbon gases used to generate the fluorohydrocarbon-containing plasma generate a carbon-rich polymer residue, which interact with the nitrogen-containing dielectric layer to form volatile compounds. Plasma energy can be decreased below 100 eV to reduce damage to physically exposed surfaces of the interconnect level dielectric material layer. |
US09633947B2 |
Folded ballistic conductor interconnect line
A method includes forming a folding template in a first dielectric layer. The folding template has a plurality of surfaces that are positioned in different planes. A ballistic conductor line is formed on the plurality of surfaces of the folding template. A device includes a first dielectric layer and a vertically folded line disposed in the first dielectric layer, the vertically folded line including a ballistic conductor material. |
US09633940B2 |
Structure and method for a high-K transformer with capacitive coupling
The present disclosure provides a semiconductor device. The semiconductor device includes a semiconductor substrate having an integrated circuit (IC) device; an interconnect structure disposed on the semiconductor substrate and coupled with the IC device; and a transformer disposed on the semiconductor substrate and integrated in the interconnect structure. The transformer includes a first conductive feature; a second conductive feature inductively coupled with the first conductive feature; a third conductive feature electrically connected to the first conductive feature; and a fourth conductive feature electrically connected to the second conductive feature. The third and fourth conductive features are designed and configured to be capacitively coupled to increase a coupling coefficient of the transformer. |
US09633938B2 |
Hybrid pitch package with ultra high density interconnect capability
A hybrid pitch package includes a standard package pitch zone of the package having only standard package pitch sized features that is adjacent to a smaller processor pitch sized zone of the package having smaller processor pitch sized features. The package may be formed by obtaining a package having standard package pitch sized features (such as from another location or a package processing facility), forming a protective mask over a standard package pitch zone of the package that is adjacent to a smaller processor pitch sized zone on the package, and then forming smaller processor pitch sized features (such as contacts, traces and interconnects) in the smaller processor pitch sized zone at a chip fabrication processing facility. The smaller processor pitch sized features can be directly connected to (thus reducing the package connection area needed) a chip or device having processor pitch sized features (e.g., exposed contacts). |
US09633936B2 |
Semiconductor package
A semiconductor package is provided. In one configuration, the semiconductor package includes a substrate. First and second conductive traces are disposed on the substrate. A conductive pillar bump is disposed on the second conductive trace, and a first conductive structure is disposed between the second conductive trace and the conductive pillar bump or between the second conductive trace and the substrate. A semiconductor die is disposed over the first conductive trace, wherein the conductive pillar bump connects to the semiconductor die. |
US09633927B2 |
Chip arrangement and method for producing a chip arrangement
A chip arrangement includes semiconductor chips coupled to opposing sides of an insulating layer. The arrangement includes a first semiconductor chip having a first chip surface presenting a first chip conductive region. An electrically insulating layer includes a first layer surface presenting a first layer conductive region, and a second, opposing surface presenting a second layer conductive region. The electrically insulating layer is coupled to the first semiconductor chip by applying the first layer conductive region to the first chip conductive region. The electrically insulating layer is then coupled to the second chip conductive region by applying the second layer conductive region to the second chip conductive region. |
US09633924B1 |
Package structure and method for forming the same
A package structure and method for forming the same are provided. The package structure includes a substrate and a semiconductor die formed over the substrate. The package structure also includes a package layer covering the semiconductor die and a conductive structure formed in the package layer. The package structure includes a first insulating layer formed on the conductive structure, and the first insulating layer includes monovalent metal oxide. A second insulating layer is formed between the first insulating layer and the package layer. The second insulating layer includes monovalent metal oxide, and a weight ratio of the monovalent metal oxide in the second insulating layer is greater than a weight ratio of the monovalent metal oxide in first insulating layer. |
US09633920B2 |
Low damage passivation layer for III-V based devices
The present disclosure relates to a structure and method of forming a low damage passivation layer for III-V HEMT devices. In some embodiments, the structure has a bulk buffer layer disposed over a substrate and a device layer of III-V material disposed over the bulk buffer layer. A source region, a drain region and a gate region are disposed above the device layer. The gate region comprises a gate electrode overlying a gate separation layer. A bulk passivation layer is arranged over the device layer, and an interfacial layer of III-V material is disposed between the bulk passivation layer and the device layer in such a way that the source region, the drain region and the gate region extend through the bulk passivation layer and the interfacial layer, to abut the device layer. |
US09633919B2 |
Package structure with an elastomer with lower elastic modulus
A package structure includes a substrate, at least one electronic component, a housing and at least one strut. The at least one electronic component is disposed on a first surface of the substrate. The housing covers the first surface of the substrate. The housing has an accommodation space. The at least one electronic component is accommodated within the accommodation space. The at least one strut is protruded from an inner surface of the housing and extended toward the accommodation space. The at least one elastomer is arranged between the corresponding strut and the substrate. |
US09633915B1 |
Method of using dummy patterns for overlay target design and overlay control
Methodologies for using dummy patterns for overlay target design and overlay control are provided. Embodiments include providing a first dummy pattern on a first layer as an outer overlay target for an integrated circuit (IC); providing a pattern associated with a second dummy pattern on a second layer as a target for measuring overlay; and utilizing a scanning electron microscope (SEM) to obtain an overlay measurement between the first and second dummy patterns. |
US09633910B2 |
Backside contacts for integrated circuit devices
A chip includes a semiconductor substrate, a well region in the semiconductor substrate, and a transistor formed at a front side of the semiconductor substrate. A source/drain region of the transistor is disposed in the well region. A well pickup region is disposed in the well region, wherein the well pickup region is at a back side of the semiconductor substrate. A through-via penetrates through the semiconductor substrate, wherein the through-via electrically inter-couples the well pickup region and the source/drain region. |
US09633907B2 |
Self-aligned nanowire formation using double patterning
A method includes forming a pattern-reservation layer over a semiconductor substrate. The semiconductor substrate has a major surface. A first self-aligned multi-patterning process is performed to pattern a pattern-reservation layer. The remaining portions of the pattern-reservation layer include pattern-reservation strips extending in a first direction that is parallel to the major surface of the semiconductor substrate. A second self-aligned multi-patterning process is performed to pattern the pattern-reservation layer in a second direction parallel to the major surface of the semiconductor substrate. The remaining portions of the pattern-reservation layer include patterned features. The patterned features are used as an etching mask to form semiconductor nanowires by etching the semiconductor substrate. |
US09633905B2 |
Semiconductor fin structures and methods for forming the same
A device includes a semiconductor substrate, and a plurality of semiconductor fins parallel to each other, wherein the plurality of semiconductor fins is a portion of the semiconductor substrate. A Shallow Trench Isolation (STI) region is on a side of the plurality of semiconductor fins. The STI region has a top surface and a non-flat bottom surface, wherein the plurality of semiconductor fins is over the top surface of the STI region. |
US09633902B2 |
Method for manufacturing semiconductor device that includes dividing semiconductor substrate by dry etching
According to an embodiment, a method for manufacturing a semiconductor device includes: selectively forming a plurality of mask layers on a first surface of a semiconductor substrate, and the semiconductor substrate having the first surface and a second surface; dividing the semiconductor substrate by forming a gap piercing from the first surface to the second surface of the semiconductor substrate, the gap being formed by dry-etching the first surface of the semiconductor substrate exposed between the plurality of mask layers, and a width of the gap on the second surface side being larger than a width of the gap on the first surface side; and forming a first electrode under a reduced-pressure atmosphere on the first surface of the semiconductor substrate after the semiconductor substrate being divided. |
US09633901B2 |
Method for manufacturing semiconductor device
A method for manufacturing a semiconductor device is provided. The method includes forming a first semiconductor element and a second semiconductor element in a semiconductor wafer. The first semiconductor element includes a first electrode formed on a front surface of the semiconductor wafer. The second semiconductor element is adjacent to the first semiconductor element and includes a second electrode formed on the front surface. The method further includes forming a first insulating layer on the front surface located at a first boundary portion between the first electrode and the second electrode; applying a specific potential different from a potential of the second electrode on the first electrode after the formation of the first insulating layer; and cutting the semiconductor wafer at the first boundary portion so as to divide the first semiconductor element from the second semiconductor element. |
US09633899B2 |
Method for patterning a graphene layer and method for manufacturing a display substrate
The invention provides a method for patterning a graphene layer and a method for manufacturing a display substrate. The method for patterning a graphene layer comprises: forming an isolation layer on a graphene layer; forming a photoresist layer on the isolation layer; patterning the photoresist layer; etching the isolation layer according to the patterned photoresist layer to form a patterned isolation layer; etching the graphene layer according to the patterned photoresist layer to form a patterned graphene layer; and removing the patterned isolation layer. In the method of the invention, the unfavorable condition of the prior art may be avoided that a graphene film sloughs off or a photoresist remains on a graphene film when a photoresist material is peeled off, and the product yield can be improved in the case that the production cost is controlled. |
US09633892B2 |
Method for manufacturing SOI substrate in which crystal defects of a single crystal semiconductor layer are reduced and method for manufacturing semiconductor device
A method for manufacturing an SOI substrate in which crystal defects of a single crystal semiconductor layer are reduced even if a single crystal semiconductor substrate including crystal defects is used. A first oxide film is formed on a single crystal semiconductor substrate; the first oxide film is removed; a surface of the single crystal semiconductor substrate from which the first oxide film is removed is irradiated with laser light; a second oxide film is formed on the single crystal semiconductor substrate; an embrittled region is formed in the single crystal semiconductor substrate by irradiating the single crystal semiconductor substrate with ions through the second oxide film; bonding the second oxide film and the semiconductor substrate so as to face each other; and the single crystal semiconductor substrate is separated at the embrittled region by heat treatment to obtain a single crystal semiconductor layer bonded to the semiconductor substrate. |
US09633891B2 |
Method for forming a transistor structure comprising a fin-shaped channel structure
An example method includes providing a layer stack in a trench defined by adjacent STI structures and recessing the STI structures adjacent to the layer stack to thereby expose an upper portion of the layer stack, the upper portion comprising at least a channel portion. The method further includes providing one or more protection layers on the upper portion of the layer stack and then further recessing the STI structures selectively to the protection layers and the layer stack, to thereby expose a central portion of the layer stack. And the method includes removing the central portion of the layer stack, resulting in a freestanding upper part and a lower part of the layer stack being physically separated from each other. |
US09633884B2 |
Performance enhancement of coating packaged ESC for semiconductor apparatus
An advanced coating for electrostatic chuck used in plasma processing chamber is provided. The advanced coating is formed using plasma enhanced physical vapor deposition. The coating is generally of Y2O3/Al2O3, although other material combinations can be used. Also, a multi-layered coating can be formed, such that an intermediate coating layer can be formed using standard plasma spray, and a top coating can be formed using PEPVD. The entire ESC assembly can be “packaged” by the coating. |
US09633883B2 |
Apparatus for transfer of semiconductor devices
An apparatus includes a first frame to hold a wafer tape having a first side and a second side. A plurality of semiconductor device dies are disposed on the first side of the wafer tape. A second frame includes a first clamping member and a second clamping member to clamp therebetween a product substrate having a circuit trace thereon. The second frame is configured to hold the product substrate such that the circuit trace is disposed facing the dies on the wafer tape. A needle is disposed adjacent to the second side of the wafer tape. A length of the needle extends in a direction toward the wafer tape. A needle actuator is connected to the needle to move the needle to a die transfer position. A laser points toward a portion of the product substrate corresponding to the transfer position to affix the die. |
US09633880B2 |
Elevator linear motor drive
Disclosed is a substrate processing system with a magnetic conduit configuration to improve the movement of a substrate carrier within the system. The configuration specifically provides for safe, secure movement of a carrier between multiple levels of a substrate processing system by using magnetic conduits to redirect magnetic forces created by a linear motor, permitting the linear motor to be positioned outside of the system and in a location that will not interfere with the movement of the carrier. |
US09633877B2 |
Wafer container with door mounted shipping cushions
A cushioned wafer container system having removable wafer cushions for transporting large-diameter wafers. The system includes a wafer container enclosure defining a front opening and including a rear wall, and a plurality of wafer supports defining a plurality of slots; a front door configured to attach to the wafer enclosure at the front opening and defining a front side and a rear side; a primary wafer cushion coupled to a rear side of the front door at a central portion of the front door, the primary wafer cushion defining a plurality of wafer grooves, each of the grooves of the primary wafer cushion aligned with a slot of the wafer supports; and a first removable wafer cushion attachable to the rear side of the front door adjacent the primary wafer cushion, the first removable wafer cushion defining a plurality of wafer-receiving grooves in alignment with the grooves and slots. |
US09633868B2 |
Heat treatment method and heat treatment apparatus
After a substrate implanted with impurities is heated to a preheating temperature, the front surface of the substrate is heated to a target temperature by irradiating the front surface of the substrate with a flash of light. Further, the flash irradiation is continued to maintain the temperature of the front surface near the target temperature for a predetermined time period. At this time, a flash irradiation time period in the flash heating step is made longer than a heat conduction time period required for heat conduction from the front surface of the substrate to the back surface thereof, and a difference in temperature between the front and back surfaces of the substrate is controlled to be always not more than one-half of an increased temperature from the preheating temperature to the target temperature during the flash irradiation. This alleviates the concentration of stresses resulting from a difference in thermal expansion between the front and back surfaces of the substrate to thereby prevent the cracking of the substrate. |
US09633864B2 |
Etching method
There is provided a method for selectively etching a first region of silicon oxide with respect to a second region of silicon nitride by performing plasma processing on a target object including the second region formed to have a recess, the first region provided to fill the recess and to cover the second region, and a mask provided on the first region. The method includes: (a) generating a plasma of a processing gas containing a fluorocarbon gas in a processing chamber where the target object is accommodated and forming a deposit containing fluorocarbon on the target object; (b) generating a plasma of a processing gas containing an oxygen-containing gas and an inert gas in the processing chamber; and (c) etching the first region by radicals of fluorocarbon contained in the deposit. A sequence including the step (a), the step (b) and the step (c) is repeatedly performed. |
US09633863B2 |
Compositions and methods for selective polishing of silicon nitride materials
The present invention provides an acidic aqueous polishing composition suitable for polishing a silicon nitride-containing substrate in a chemical-mechanical polishing (CMP) process. The composition, at point of use, preferably comprises about 0.01 to about 2 percent by weight of at least one particulate ceria abrasive, about 10 to about 1000 ppm of at least one non-polymeric unsaturated nitrogen heterocycle compound, 0 to about 1000 ppm of at least one cationic polymer, optionally, 0 to about 2000 ppm of at least one polyoxyalkylene polymer, and an aqueous carrier therefor. The cationic polymer preferably is selected from a poly(vinylpyridine) polymer, a quaternary ammonium-substituted acrylate polymer, a quaternary ammonium-substituted methacrylate polymer, or a combination thereof. Methods of polishing substrates and of selectively removing silicon nitride from a substrate in preference to removal of polysilicon using the compositions are also provided. |
US09633861B2 |
Cu/barrier interface enhancement
Embodiments of the present invention provide processes to selectively form a metal layer on a conductive surface, followed by flowing a silicon based compound over the metal layer to form a metal silicide layer. In one embodiment, a substrate having a conductive surface and a dielectric surface is provided. A metal layer is then deposited on the conductive surface. A metal silicide layer is formed as a result of flowing a silicon based compound over the metal layer. A dielectric is formed over the metal silicide layer. |
US09633859B2 |
Semiconductor device and a manufacturing method thereof
The performances of a semiconductor device are improved. In a method for manufacturing a semiconductor device, a first insulation film, a conductive film, a silicon-containing second insulation film, and a third film formed of silicon are sequentially formed at the surface of a control gate electrode. Then, the third film is etched back to leave the third film at the side surface of the control gate electrode via the first insulation film, the conductive film, and the second insulation film, thereby to form a spacer. Then, the conductive film is etched back to form a memory gate electrode formed of the conductive film between the spacer and the control gate electrode, and between the spacer and the semiconductor substrate. |
US09633858B2 |
Methods for forming semiconductor device
A method for forming a semiconductor device includes forming first and second hard mask layers overlying a semiconductor substrate and forming trenches through the second hard mask, the first hard mask, and into the substrate. A dielectric material is formed in the trenches to form shallow trench isolation regions, removing the second hard mask layer, and a floating gate material is formed overlying the first hard mask and the trenches. The method further includes repeating at least twice a process of forming a buffer layer over the floating gate material and using a polishing process to remove a portion of the buffer layer and a top portion of the floating gate material. Next, a dry etch process to remove a portion of the floating gate material above the shallow trench isolation regions and the remaining portions of the buffer layer to form floating gate structures. |
US09633856B2 |
Method of forming a singe metal that performs N and P work functions in high-K/metal gate devices
The present disclosure provides a method of fabricating a semiconductor device. The method includes providing a semiconductor substrate with a first region and a second region, forming a high-k dielectric layer over the semiconductor substrate, forming a metal layer over the high-k dielectric layer, the metal layer having a first work function, protecting the metal layer in the first region, treating the metal layer in the second region with a de-coupled plasma that includes carbon and nitrogen, and forming a first gate structure in the first region and a second gate structure in the second region. The first gate structure includes the high-k dielectric layer and the untreated metal layer. The second gate structure includes the high-k dielectric layer and the treated metal layer. |
US09633854B2 |
MOSFET and method for manufacturing the same
The present disclosure discloses a MOSFET and a method for manufacturing the same, wherein the MOSFET comprises: an SOI wafer comprising a semiconductor substrate, a buried insulating layer, and a semiconductor layer, the buried insulating layer being disposed on the semiconductor substrate, and the semiconductor layer being disposed on the buried insulating layer; a gate stack disposed on the semiconductor layer; a source region and a drain region embedded in the semiconductor layer and disposed on both sides of the gate stack; and a channel region embedded in the semiconductor layer and sandwiched between the source region and the drain region, wherein the MOSFET further comprises a back gate and a counter doped region, and wherein the back gate is embedded in the semiconductor substrate, the counter doped region is disposed under the channel region and embedded in the back gate, and the back gate has a doping type opposite to that of the counter doped region. The MOSFET can adjust a threshold voltage by changing the doping type of the back gate. |
US09633853B2 |
Method for forming an electrical contact
A method for forming an electrical contact to a semiconductor structure is provided. The method includes providing a semiconductor structure, providing a metal on an area of said semiconductor structure, wherein said area exposes a semiconductor material and is at least a part of a contact region, converting said metal to a Si-comprising or a Ge-comprising alloy, thereby forming said electrical contact on said area, wherein said converting is done by performing a vapor-solid reaction, whereby said semiconductor structure including said metal is subjected to a silicon-comprising precursor gas or a germanium-comprising precursor gas. |
US09633852B2 |
Semiconductor structure and method for forming the same
A semiconductor structure and a method for forming the same are provided. The semiconductor structure comprises a first doped region, a second doped region, a doped strip and a top doped region. The first doped region has a first type conductivity. The second doped region is formed in the first doped region and has a second type conductivity opposite to the first type conductivity. The doped strip is formed in the first doped region and has the second type conductivity. The top doped region is formed in the doped strip and has the first type conductivity. The top doped region has a first sidewall and a second sidewall opposite to the first sidewall. The doped strip is extended beyond the first sidewall or the second sidewall. |
US09633849B2 |
Implant profiling with resist
A process for forming at least two different doping levels at the surface of a wafer using one photo resist pattern and implantation process step. A resist layer is developed (but not baked) to form a first resist geometry and a plurality of sublithographic resist geometries. The resist layer is baked causing the sublithographic resist geometries to reflow into a continuous second resist geometry having a thickness less that the first resist geometry. A high energy implant implants dopants through the second resist geometry but not through the first resist geometry. A low energy implant is blocked by both the first and second resist geometries. |
US09633848B2 |
Photosensitive resin composition, method for producing patterned cured film, semiconductor element and electronic device
Disclosed is a photosensitive resin composition comprising (A) an alkali-soluble resin having a structural unit represented by the following formula (1), (B) a compound that generates an acid by light, (C) a thermal crosslinking agent, and (D) an acryl resin having a structural unit represented by the following formula (2): wherein R1 represents a hydrogen atom or a methyl group; R2 represents an alkyl group having 1 to 10 carbon atoms, or the like; and a represents an integer of 0 to 3, b represents an integer of 1 to 3, and the total of a and b is 5 or less, and wherein R3 represents a hydrogen atom or a methyl group; and R4 represents a hydroxyalkyl group having 2 to 20 carbon atoms. |
US09633847B2 |
Using sub-resolution openings to aid in image reversal, directed self-assembly, and selective deposition
A method for treating a microelectronic substrate to form a chemical template includes patterning the substrate to form a trench structure with a plurality of trenches of a defined trench width and depositing a photoactive material on the substrate to overfill the trench structure to form a fill portion in the plurality of trenches and an overfill portion above the trench structure. The method further includes exposing the photoactive material to electromagnetic radiation comprising a wavelength that is at least four times greater than the defined trench width such that the overfill portion is modified by the exposure while the electromagnetic radiation fails to penetrate into the plurality of trenches leaving the fill portion unmodified and removing the modified overfill portion of the photoactive material to form a planarized filled trench structure for use as a chemical template for selective reactive ion etching, selective deposition, or directed self-assembly. |
US09633845B2 |
Method of manufacturing a substrate having a crystallized layer and a laser crystallizing apparatus for the same
A method of manufacturing a substrate includes: irradiating, along a first path, a laser beam emitted from a source onto a substrate, wherein the substrate includes a target layer of the laser beam, and wherein the substrate is disposed on a stage; and irradiating, along a second path, a portion the laser beam, which was emitted from the source and reached the target layer, by reflecting the laser beam back onto the target layer using a reflection mirror. An area of a second region of the target layer is greater than an area of a first region of the target layer, wherein the laser beam is irradiated along the second path in the second region, and the laser beam is irradiated along the first path in the first region. |
US09633843B2 |
Silicon substrates with compressive stress and methods for production of the same
A heterostructure may include a substrate having a first primary surface, a second primary surface, and a diffusion layer extending a depth into the substrate from the first primary surface; and a deposition layer disposed on the second primary surface of the substrate. The heterostructure may further include an epitaxial layer disposed on the deposition layer. |
US09633838B2 |
Vapor deposition of silicon-containing films using penta-substituted disilanes
Disclosed are methods of depositing silicon-containing films on one or more substrates via vapor deposition processes using penta-substituted disilanes, such as pentahalodisilane or pentakis(dimethylamino)disilane. |
US09633837B2 |
Methods of providing dielectric to conductor adhesion in package structures
Methods of forming a microelectronic packaging structure and associated structures formed thereby are described. Those methods may include forming a CVD dielectric material on a package dielectric material, and then forming a conductive material on the CVD dielectric material. |
US09633833B2 |
Methods and apparatus for cleaning semiconductor wafers
A method for cleaning semiconductor substrate using ultra/mega sonic device comprising holding a semiconductor substrate by using a chuck, positioning a ultra/mega sonic device adjacent to the semiconductor substrate, injecting chemical liquid on the semiconductor substrate and gap between the semiconductor substrate and the ultra/mega sonic device, changing gap between the semiconductor substrate and the ultra/mega sonic device for each rotation of the chuck during the cleaning process by turn the semiconductor substrate or the ultra/mega sonic device clockwise or counter clockwise. |
US09633832B2 |
Method for metal gate surface clean
The present disclosure provides a method for forming an integrated circuit (IC) structure. The method includes providing a metal gate (MG), an etch stop layer (ESL) formed on the MG, and a dielectric layer formed on the ESL. The method further includes etching the ESL and the dielectric layer to form a trench. A surface of the MG exposed in the trench is oxidized to form a first oxide layer on the MG. The method further includes removing the first oxide layer using a H3PO4 solution. |
US09633827B2 |
Apparatus and method for sampling of confined spaces
In various embodiments of the invention, a cargo container can be monitored at appropriate time intervals to determine that no controlled substances have been shipped with the cargo in the container. The monitoring utilizes reactive species produced from an atmospheric analyzer to ionize analyte molecules present in the container which are then analyzed by an appropriate spectroscopy system. In an embodiment of the invention, a sorbent surface can be used to absorb, adsorb or condense analyte molecules within the container whereafter the sorbent surface can be interrogated with the reactive species to generate analyte species characteristic of the contents of the container. |
US09633818B2 |
Charged particle beam apparatus, image forming method using a charged particle beam apparatus, and image processing apparatus
To provide a charged particle beam apparatus capable of obtaining an image with high contrast and high visibility, the apparatus has: a charged particle optical system; a detection part to detect secondary charged particles generated from the sample; an image formation part to receive a detection signal from the detection part and form an image of the sample; an image processing part to process the image formed with the image formation part; and a display part to display the result of processing with the image processing part, wherein the image formation part has a pulse-count signal processing part to generate cumulative histogram information on a pulse signal component in the detection signal, set a threshold value for pulse signal detection using information on the generated cumulative histogram, and output a detection signal having a value higher than the set threshold value as a pulse signal. |
US09633815B1 |
Emitter for an electron beam, electron beam device and method for producing and operating an electron emitter
A cold field emitter for emitting an electron beam for an electron beam device is described. The emitter includes an emitter tip having a tip surface; and two or more adjacent facets formed at the tip surface and having facet boundaries, each of the facets forming a recess in the emitter tip, wherein the facets are separated. An intermediate area is provided between and around the two or more adjacent facets and the intermediate area is configured for electron emission. Further, an electron beam device, a method for operating an electron beam device and a method for producing an emitter for an electron beam device is described. |
US09633810B2 |
Combination switch
A combination switch 10 outputs operation command signals to a driving system of a vehicle according to a switching operation of a switching unit 11 and includes a storage part 21 that stores determination information 21a indicating whether combinations of operation command signals to be outputted from switches of the switching unit 11 are abnormal or normal, a determination part 22 that refers to the determination information 21a in the storage part 21, determines whether or not a combination of the operation command signals is abnormal, and if an abnormal combination of the operation command signals continues longer than a predetermined time, adds, to the operation command signals, abnormality information indicating that the combination of the operation command signals is abnormal, and a communication part 13 that transmits the operation command signals added with the abnormality information. |
US09633809B2 |
Trip device for circuit breaker
A trip device for a circuit breaker comprises a first terminal; a second terminal; and a bimetal in which a slot with one side opened is formed at one end of the bimetal, the one end is divided into a first end portion and a second end portion, the first end portion is connected to the first terminal, and the second end portion is connected to the second terminal, wherein the bimetal generates heat with a current which flows between the first end portion and the second end portion, and a heating amount of the bimetal is changed based on a length of the slot. Accordingly, a desired rated current can be set, the bimetal can be prevented from being damaged by a fault current, and the fault current can be effectively detected by obtaining a sufficient amount of heat and a bending amount of the bimetal. |
US09633802B2 |
Vacuum bulb, circuit-breaker pole including such a vacuum bulb, and method to manufacture such devices
A vacuum bulb is provided, including a sealed chamber; two electrical contacts, which move relative to one another, the chamber including a cylindrical body of a dielectric material and closed at ends thereof by two metal covers, each of the two metal covers being connected to one of the two electrical contacts: and a dielectric coating, which covers an outer surface of the chamber, and includes at least two layers, including an overmolding layer of a synthetic material and an intermediate layer of silicone, the intermediate layer being interposed between the outer surface and the overmolding layer, the intermediate layer being discontinuous and localized on metal portions of the chamber so as to cover at least partially an outer surface of the metal portions, and the silicone includes compressible hollow bodies having a skin of a thermoplastic material. |
US09633799B2 |
Long-term energy storage assembly comprising an intermediate connection part
The invention relates to an electrical energy storage assembly comprising an envelope and a capacitive element (30) contained in the envelope, said envelope comprising: at least one side wall (22); and two bottom walls (41) each located at an end of the side wall. Said storage assembly comprises at least one electroconductive intermediate connection part (50) to be arranged between the capacitive element and a bottom wall (41), in addition to a covering plate (51) for covering the end of the capacitive element (20), said covering plate (51) including at least one vent (53) for the passage of a fluid. The covering plate (51) is fixed to the capacitive element in such a way as to be in electrical contact therewith, and the intermediate connection part (50) is also fixed to the envelope in certain areas enabling a deformation of the bottom wall in relation to the intermediate connection part. |
US09633796B2 |
High voltage tantalum anode and method of manufacture
Tantalum powders produced using a tantalum fiber precursor are described. The tantalum fiber precursor is chopped or cut into short lengths having a uniform fiber thickness and favorable aspect ratio. The chopped fibers are formed into a primary powder having a controlled size and shape, narrow/tight particle size distribution, and low impurity level. The primary powder is then agglomerated into an agglomerated powder displaying suitable flowability and pressability such that pellets with good structural integrity and uniform pellet porosity are manufacturable. The pellet is sintered and anodized to a desired formation voltage. The thusly created capacitor anode has a dual morphology or dual porosity provided by a primary porosity of the individual tantalum fibers making up the primary powder and a larger secondary porosity formed between the primary powders agglomerated into the agglomerated powder. |
US09633793B2 |
Multilayer ceramic capacitor
A multilayer ceramic capacitor that contains at least one kind of a first element that forms a covalent hydride with hydrogen (except for an element generating a hydride having a boiling point of less than 125° C.) and a second element that forms a hydride in a boundary region with hydrogen between an outermost plating layer constituting an external electrode and a dielectric layer constituting a ceramic element body. |
US09633792B2 |
Conductive paste for external electrode, multilayer ceramic electronic component using the same, and manufacturing method thereof
A conductive paste for an external electrode, a multilayer ceramic electronic component using the same, and a manufacturing method of a multilayer ceramic electronic component are provided. The conductive paste for an external electrode includes first conductive particles containing a metal, second conductive particles formed of ceramic particles coated with silver (Ag), and a thermosetting resin. |
US09633791B2 |
Monolithic capacitor
A monolithic capacitor includes a multilayer body including a plurality of stacked dielectric layers, first and second capacitor electrodes inside the multilayer body, and outer electrodes on at least one surface of the multilayer body. The first and second capacitor electrodes are arranged perpendicularly or substantially perpendicularly to first and second surfaces of the multilayer body. The first capacitor electrode includes a capacitor portion opposed to the second capacitor electrode with the dielectric layer interposed therebetween, a lead portion connected to one outer electrode, and an intermediate portion not opposed to the second outer electrode. The second capacitor electrode includes a capacitor portion opposed to the first capacitor electrode with the dielectric layer interposed therebetween, and a lead portion connected to the other outer electrode. The intermediate portion is arranged in a gap area that is surrounded, when viewed in a stacking direction of the dielectric layers, by imaginary lines extending from inner exposed ends of the lead portions in a direction interconnecting the first and second surfaces of the multilayer body, by the capacitor portions, and by the first surface. |
US09633789B2 |
Laminated capacitor mounted structure
A mounted structure includes a laminated capacitor, a wiring substrate, and a joint material. The laminated capacitor includes a body with dielectric layers and internal electrode layers alternately stacked, and an external electrode connected to the internal electrode layers. The body includes a side surface coated with a side surface coating portion of the external electrode. The joint material is joined to the side surface coating portion and a land provided on the wiring substrate so as to cover the outer surfaces thereof. The outer end portion of the thickest portion of the joint material covering the side surface coating portion is located farther outside an outer end of the land in a direction perpendicular or substantially perpendicular to a side surface of the body. |
US09633787B2 |
Multilayer capacitor and installation structure of multilayer capacitor
In a multilayer capacitor, a multilayer capacitor main body includes first and second main surfaces, first and second side surfaces, and first and second end surfaces, the first and second main surfaces extending in a length direction and a width direction, the first and second side surfaces extending in the length direction and a thickness direction, and the first and second end surfaces extending in the width direction and the thickness direction. The second main surface is depressed in a portion extending from opposite ends of the second main surface toward a center of the second main surface in the length direction. |
US09633786B2 |
Multilayer capacitor and usage method therefor
A multilayer capacitor includes a multilayer body including a dielectric layer, first through third inner electrodes, and first and second capacitor sections, and first through third outer electrodes on surfaces of the multilayer body. The first capacitor section is electrically connected between the first and second outer electrodes. The second capacitor section is electrically connected between the second and third outer electrodes. The first, second, and third inner electrodes are connected to the first, second, and third outer electrodes, respectively. The first and third inner electrodes oppose each other with the dielectric layer therebetween, thus defining the first capacitor section. The second and third inner electrodes oppose each other with the dielectric layer therebetween, thus defining the second capacitor section. |
US09633785B2 |
Multilayer ceramic electronic component and board having the same
A multilayer ceramic electronic component may includes: a ceramic body including dielectric layers; an active layer including first and second internal electrodes disposed to be exposed to both end surfaces of the ceramic body in a length direction of the ceramic body, respectively, first floating electrodes overlapping the first and second internal electrodes while being spaced apart from each other in the thickness direction of the ceramic body, second floating electrodes each disposed to be spaced apart from the first and second internal electrodes, and first and second dummy electrodes disposed to be spaced apart from the first floating electrodes; upper and lower cover layers disposed upwardly and downwardly of the active layer, respectively; third and fourth dummy electrodes disposed to be exposed to both end surfaces of the ceramic body in the length direction of the ceramic body, respectively; and fifth dummy electrodes. |
US09633780B2 |
Apparatus and method for controlling resonator of wireless power transmission system
A source device configured to transmit a magnetic field via magnetic resonance with a target device includes a source resonator including a plurality of loop circuits respectively configured to generate different magnetic fields each depending on a length of a corresponding one of the plurality of loop circuits, and a circuit selector configured to select one loop circuit among the plurality of loop circuits based on information associated with the target device. |
US09633778B2 |
Magnetic component with balanced flux distribution
An embodiment of an inductor assembly includes at least a first inductive loop with a first wire formed into a plurality of conductive windings around a first magnetic core section. The first magnetic core section includes at least a radially inner magnetic core portion with a first inner effective radius, Rin(1), and a radially outer magnetic core portion with a first outer effective radius, Rout(1). The radially inner magnetic core portion is formed from a first material having a first core maximum permeability value, Mmax(1). The radially outer magnetic core portion is formed from a second material having a first core minimum permeability value, Mmin(1), less than the first core maximum permeability value, Mmax(1). A single turn of each winding extends fully around both the first radially inner and outer core portions without passing between them. |
US09633777B2 |
High impedance air core reactor
Air core reactor includes a coil connected between first and second terminals. The coil is made of a succession of bundles of conductor (B1, B2, B3, . . . , BN) connected in series along an axis between the first terminal and the second terminal. Each bundle is made of one wire wound around the axis to form a multi-layer winding having a cross-section of N winding layers in a direction perpendicular to the axis, from a winding layer of rank 1 which is the closest to the axis to a winding layer of rank N which is the furthest from the axis. Each perpendicular winding layer includes several winding layers in the direction of the axis. The number of axial winding of the perpendicular winding layer of rank j (j=2, . . . , N) is equal or less than the number of axial winding layers of the perpendicular winding layer of rank j−1. |
US09633776B2 |
Variable core electromagnetic device
An electromagnetic device includes a variable magnetic flux core having a plurality of core sections stacked on one another. At least one core section of the plurality of core sections may include a different selected geometry and/or a different chosen material. The at least one core section is configured to provide a predetermined inductance performance. An opening is provided through the stacked plurality of core sections for receiving a conductor winding. An electrical current flowing through the conductor winding generates a magnetic field about the conductor winding and a magnetic flux flow in each of the plurality of core sections. The magnetic flux flow in the at least one core section is different from the other core sections in response to the different selected geometry and/or the different chosen material of the at least one core section to provide the predetermined inductance performance. |
US09633774B2 |
Method for making magnetics assembly including transformer
A method for making a magnetic assembly comprises the following steps: twisting a first to eighth magnetic wires to form a bundle of wires having a first end and an opposite second end; providing a magnetic core; winding the bundle of magnetic wires around the magnetic core; sorting the first end and the second end of the bundle of wires to form individual first ends and individual second ends of the first to eighth wires; picking out the second ends of the first wire and the second wire, and the first ends of the third wire and the fourth wire to form a center tap of a primary coil of a transformer; and picking out the second ends of the fifth wire and the sixth wire, and the first ends of the seventh wire and the eighth wire to form a center tap of a secondary coil of the transformer. |
US09633768B2 |
Chip resistor and mounting structure thereof
A chip resistor with a reduced thickness is provided. The chip resistor includes an insulating substrate, a resistor embedded in the substrate, a first electrode electrically connected to the resistor, and a second electrode electrically connected to the resistor. The first electrode and the second electrode are spaced apart from each other in a lateral direction that is perpendicular to the thickness direction of the substrate. |
US09633764B2 |
Conducting line shield structure
A conductive line shield structure includes a first conductive line and a shielding member. The first conductive line includes a conductive part and an insulative part. The shielding member is a sheet including an insulative base material and a metal foil, and is wrapped so as to enclose the first conductive line therein. One side end part of the shielding member overlaps an outside surface of the insulative base material so that one side end part of the insulative base material is in contact with the outside surface of the insulative base material. |
US09633759B2 |
Waterproofing structure for insulation-coated electrical wire, and wire harness
The present invention relates to a waterproofing structure for an insulation-coated electrical wire that includes a tubular protection member and a resin material that is accommodated in the protection member. An exposed conductor section includes a plurality of bare wires bent to double back in a reverse direction in the protection member, the protection member including a tubular section that surrounds the exposed conductor section and the pair of on intermediate ends of the coating tube that are adjacent to both ends of the exposed conductor section; and a closed section that is distanced from the exposed conductor section in the axial direction and closes one end of the tubular section. The resin material is made of a thermosetting resin that is cured, between the protection member and the insulation-coated electrical wire, while closely fitting to the closed section, the exposed conductor section, and the pair of intermediate ends. |
US09633757B2 |
Wire harness and wire harness manufacturing method
A wire harness having a portion of an electrical line group configured to easily housed in a protector without requiring the task of opening an overlapping portion of the protector, and a method for manufacturing said wire harness are provided. The protector includes a shape-memory panel having a shape-memory polymer sheet and noise suppression metal coating films formed on two surfaces thereof and are electrically conductive with each other. The shape-memory polymer sheet is molded in a shape-memory state for covering a portion of the electrical line group in a scroll-like manner, and then opened into a flat plate shape. The portion of the electrical line group is placed on the flat plate-shaped shape-memory panel, and then heated so that the shape-memory panel returns to the shape-memory state and covers the portion of the electrical line group in a scroll-like manner. |
US09633756B2 |
Device for connecting a circuit breaker
An arrangement for connecting a circuit breaker in a circuit, for example, in a switchgear, having conductors designed in the form of busbars and supported against each other for receiving forces resulting from normal operating behavior and from short circuit situations. The conductors are disposed in at least two-part claddings each completely peripherally enclosing the respective conductor and serving as electrical insulation. |
US09633751B2 |
Liquid lithium first walls for electromagnetic control of plasmas in fusion power reactor environments
A method, system, and apparatus are disclosed for liquid lithium first walls for electromagnetic control of plasmas in fusion power reactor environments. In particular, the method involves installing at least one layer of at least one tile on the surface area of the internal walls of the reactor chamber. A portion of the tile(s) facing the interior of the reactor chamber includes a plurality of channels. The method further involves applying an electric charge to the liquid lithium. Further, the method involves circulating the liquid lithium throughout the interior network of the tile(s) to allow for the liquid lithium to flow into the channels and to reach the external surface of the tile(s) that faces the interior of the reactor chamber. In some embodiments, the method also involves installing at least one magnetic coil between the tile(s) and the surface area of the internal walls of the reactor chamber. |
US09633749B2 |
System and method of managing tags associated with read voltages
A data storage device includes a controller coupled to a non-volatile memory. The non-volatile memory is configured to store multiple tags that include a first tag and a second tag. The controller is configured to determine one or more candidate values associated with a candidate tag. The one or more candidate values may be determined based on an operation applied to the first tag and the second tag. The controller is further be configured to cause the non-volatile memory to remove the first tag or the second tag from the multiple tags. |
US09633746B2 |
Semiconductor device, semiconductor system including the same and test method thereof
A semiconductor device includes a memory region suitable for providing a plurality of read data in parallel at every read operation cycle, an output path suitable for outputting the plurality of read data at a set time in response to an internal clock and one or more internal control signals at the every read operation cycle, and an output path control unit suitable for generating the internal control signal in response to a read command and generating the internal clock in response to a system clock, wherein a shifting time of a first edge of the internal clock is adjusted by a set level at the every read operation cycle during a test mode. |
US09633742B2 |
Segmentation of blocks for faster bit line settling/recovery in non-volatile memory devices
In non-volatile memory circuits, the amount of time needed for bit lines to settle can vary significantly depending on the location of the blocks selected. For example, in a sensing operation, the amount of time for bit lines to settle when being pre-charged by sense amplifiers will be shorter for blocks near the sense amps than for far side blocks. These variations can be particularly acute in high density memory structures, such as in 3D NAND memory, such as that of the BiCS variety. Rather than use the same timing for all blocks, the blocks can be segmented into groups based on their proximity to the sense amps. When performing a sensing operation, the timing can be adjusted based on the block group to which a selected page of memory cells belongs. |
US09633736B2 |
Semiconductor memory device capable of reducing chip size
According to one embodiment, a first well of the first conductivity type which is formed in a substrate. a second well of a second conductivity type which is formed in the first well. The plurality of memory cells, the plurality of first bit line select transistors, and the plurality of second bit line select transistors are formed in the second well, and the plurality of first bit line select transistors and the plurality of second bit line select transistors are arranged on a side of the sense amplifier with respect to the plurality of memory cells of the plurality of bit lines. |
US09633735B2 |
System and method to inhibit erasing of portion of sector of split gate flash memory cells
A system and method to inhibit the erasing of a portion of a sector of split gate flash memory cells while allowing the remainder of the sector to be erased is disclosed. The inhibiting is controlled by control logic that applies one or more bias voltages to the portion of the sector whose erasure is to be inhibited. |
US09633731B2 |
Semiconductor memory device including three-dimensional array structure
A semiconductor memory device may include source selection transistors coupled to a common source line, source side dummy memory cells coupled between the source selection transistors and the normal memory cells, and drain selection transistors coupled to a bit line. The semiconductor memory device may include drain side dummy memory cells coupled between the drain selection transistors and the normal memory cells. A number of the source side dummy memory cells is less than a number of the drain side dummy memory cells, and a number of the drain selection transistors may be greater than the source selection transistors. |
US09633730B2 |
Semiconductor memory device
A memory device includes a first string and a second string. The first string includes first and second transistors and first cell transistors coupled in series between a source line and a bit line. The second string includes third and fourth transistors and second cell transistors coupled in series between the source line and the bit line. During a read, a gate of the fourth transistor is applied with a voltage to turn off the transistor, and after start of application of voltages to the first cell transistors, the gate of the fourth transistor is applied with a voltage substantially the same as a voltage applied to the source line. |
US09633729B2 |
Non-volatile memory for high rewrite cycles application
A non-volatile memory has an array of non-volatile memory cells. Each of the non-volatile memory cells includes a coupling device formed on a first well, a read device, a floating gate device formed on a second well and coupled to the coupling device, a program device formed on the second well, and an erase device formed on a third well and coupled to the first floating gate device. The read device, the program device, and the erase device are formed on separate wells so as to separate the cycling counts of a read operation, a program operation and an erase operation of the non-volatile memory cell. |
US09633725B2 |
Method for determining electrical parameters used to programme a resistive random access memory
A method determines electrical parameters for programming a resistive random access memory in an insulating state and in a conducting state, by formation or dissolution of a filament. |
US09633721B2 |
Storage device with 2D configuration of phase change memory integrated circuits
A storage device, apparatus, and method to write and/or read data from such storage device. The storage device, comprises a channel controller and phase change memory integrated circuits (PCM ICs) arranged in sub-channels, wherein each of the sub-channels comprises several PCM ICs connected by at least one data bus line, which at least one data bus line connects to the channel controller. The channel controller is configured to write data to and/or read data from the PCM ICs according to a matrix configuration of PCM ICs, wherein: a number of columns of the matrix configuration respectively corresponds to a number of the sub-channels, the sub-channels forming a channel, and a number of rows of the matrix configuration respectively corresponds to a number of sub-banks, the sub-banks forming a bank, wherein each of the sub-banks comprises PCM ICs that belong, each, to distinct sub-channels of the sub-channels. |
US09633719B2 |
Programming memory cells to be programmed to different levels to an intermediate level from a lowest level
Embodiments of methods and memory devices for performing the methods are disclosed. In an embodiment, one such method includes programming all memory cells that are to be respectively programmed to different levels other than a lowest level, corresponding to a lowest data state, to an intermediate level from the lowest level and respectively programming all the memory cells that are to be respectively programmed to the different levels other than the lowest level to the different levels other than the lowest level from the intermediate level. |
US09633718B1 |
Nonvolatile memory device
There is provided a nonvolatile memory device having a writing error preventing function with high noise resistance. This structure includes a switch and a noise filter circuit connected in parallel to a clock terminal, wherein a clock pulse monitoring circuit compares the number of clocks input from the clock terminal with a prescribed number, and when detecting abnormality in the number of clocks, switches to a noise countermeasure mode in which the switch is turned off to validate the noise filter circuit. |
US09633717B2 |
Tracking cell and method
A circuit includes a first power node that receives a first operational voltage having a first operational voltage level and a second power node that receives a second operational voltage having a second operational voltage level different from the first operational voltage level. A memory cell is coupled with the first power node, the memory cell configured to store a logic value, and a tracking cell is coupled with the second power node, the tracking cell configured to generate a signal having a timing responsive to the second operational voltage level. The circuit is configured to read the logic value of the memory cell based on the signal. |
US09633711B2 |
Method of managing data of storage devices responsive to temperature
Methods of managing data of a storage device responsive to temperature can include measuring a temperature of the storage device, changing a duration of a refresh interval of the buffer memory responsive to the measured temperatures, changing a number of refresh bursts during the refresh interval responsive to the measured temperature, and refreshing data of the buffer memory based on the refresh interval and the number of the refresh bursts that are changed responsive to temperature. |
US09633709B2 |
Storage device including transistor comprising oxide semiconductor
A highly reliable storage device with small data deterioration is provided. The storage device includes a first circuit, a second circuit, a third circuit, and a memory cell. The first circuit has a function of detecting power-on. The second circuit has a function of specifying the address of the memory cell. The third circuit has a function of refreshing the memory cell at the address specified by the second circuit after the first circuit detects power-on. The memory cell preferably includes an oxide semiconductor transistor. |
US09633708B2 |
Semiconductor storage device using STT-MRAM
A memory circuit (100) includes a plurality of memory cells (50), an N-type MOSFET (30a) and an N-type MOSFET (30b). The drain of the N-type MOSFET (30a) is connected to one of a pair of bit lines, and the drain of the N-type MOSFET (30b) is connected to the other of the pair of bit lines. The gate of the N-type MOSFET (30a) is connected to the drain of the N-type MOSFET (30b), and the gate of the N-type MOSFET (30b) is connected to the drain of the N-type MOSFET (30a). |
US09633701B2 |
Resistor switching circuit, storage circuit, and consumable chip
A resistor switching circuit, a storage circuit and a consumable chip. The resistor switching circuit is used in the consumable chip, and includes a plurality of resistor switching branch circuits, the resistor switching branch circuit including a switching switch and a resistor, the switching switch and the resistor being connected in series in a conducting loop of a signal wire; and a decoder, connected to a data storage module in the consumable chip, and used for generating a switching instruction according to a signal output by the data storage module to control a switching switch of a corresponding resistor switching branch circuit to put a corresponding resistor into the conducting loop of the signal wire, so as to change a resistance value of the conducting loop of the signal wire. |
US09633697B2 |
Zoom indication for stabilizing unstable video clips
A computer-implemented method for zoom indication for stabilizing unstable video clips is described. To indicate zoom, a zoom value associated with an unstable segment of a video clip is received. The zoom value represents a value by which frames of the video clip in the unstable segment need to be zoomed to stabilize the unstable segment. An indicia is displayed representing the zoom value in a thumbnail in a user interface. The thumbnail represents the video clip. The indicia displayed over a region in the thumbnail corresponding to the unstable segment in the video clip. |
US09633694B2 |
Full fidelity remote video editing
Video editing methods and systems enable an editor to edit a video project for which source media assets are located at a media storage server located remotely from the editor with substantially the same fidelity and editing feature set that would be available if the source media assets and editor were co-located. A video editing client used by the editor maintains a persistent cache of proxy media with the layers of the video project stored independently, facilitating editing with combinations locally originated assets and remote assets. The client requests frames not already cached from the remote server via a low bandwidth network. Unless a frame is purged from the cache, no frame is requested from the server more than once. A multi-level priority prefetching scheme, including sequence-based prefetching, populates the cache with frames likely to be requested during editing. |
US09633693B2 |
Interface for media publishing
Methods and apparatus for implementing an interface for media publishing. In one implementation, a method of publishing media data includes: accessing a media interface of a media device; capturing media data using a media capture component of said media device; storing said captured media data in a media file in storage of said media device; modifying said captured media data; and publishing said modified media data to a network server; wherein said capturing, modifying, and publishing are performed using said media interface. |
US09633691B2 |
Storage controller, storage device, and method
A storage controller includes a control unit and an interface. The control unit, when write data input as data to be written onto a magnetic disk includes a bit string of a first pattern, inverts one or more bits of the bit string. The write data includes a redundancy bit string used for data error correction. The interface outputs write data including bit inverted by the control unit. |
US09633689B1 |
Continuously zoned servo preamble detection and frequency acquisition
An apparatus for storing data includes a storage medium with user data regions and with servo data regions containing preamble patterns. Servo data in the servo data regions is written with a varying clock frequency across the storage medium. The apparatus also includes a head assembly disposed in relation to the storage medium and operable to read and write data on the storage medium. The apparatus also includes a preamble detection circuit adapted to search an input stream derived from the head assembly for the preamble patterns in a number of frequency bins. |
US09633687B2 |
Symbol timing recovery scheme for parallel recording channel systems
An apparatus includes a loop filter that receives a plurality of input signals. Each of the input signals is based on a different timing error detector output signal. The apparatus also includes a plurality of read channels, a plurality of interpolation filters, and an array of transducers. Each of the interpolation filters is in communication with a corresponding one of the read channels. Each of the transducers is in communication with a corresponding one of the read channels. The loop filter processes the plurality of input signals, and outputs a different total phase signal for each received input signal. Each of the interpolation filters samples the corresponding read channel based on one of the total phase signals output by the loop filter. The loop filter processes the plurality of input signals by calculating a phase estimate of the samples, and a skew estimate of the samples, relative to written data. |
US09633680B2 |
Head suspension having a flexure tail with a covered conductive layer and structural layer bond pads
A head gimbal assembly has a laminate flexure that includes a metallic conductive layer that includes a plurality of electrically conductive traces that are elongated and narrow and electrically connected to the read head, and a metallic structural layer that is stiffer than the conductive layer. A first dielectric layer is disposed between the structural layer and the conductive layer. A second dielectric layer substantially covers the conductive layer in a flexure tail bonding region that overlaps a flexible printed circuit (FPC). The structural layer includes a plurality of flexure bond pads that are aligned with, facing, and bonded to corresponding FPC bond pads. The flexure bond pads in the structural layer are electrically connected to the electrically conductive traces in the conductive layer by vias through the first dielectric layer. In certain embodiments, the flexure tail is folded upon itself in the flexure tail bonding region. |
US09633679B2 |
Sensor stack structure with RKKY coupling layer between free layer and capping layer
A reader stack, such as for a magnetic storage device, the stack having a top synthetic antiferromagnetic (SAF) layer, a magnetic capping layer adjacent to the top SAF layer, an RKKY coupling layer adjacent to the magnetic capping layer opposite the top SAF layer, and a free layer adjacent to the RKKY coupling layer opposite the magnetic capping layer. Also included is a method for biasing a free layer in a reader stack by providing an exchange coupling between the free layer and a top synthetic antiferromagnetic (SAF) layer using a layer having RKKY coupling property positioned between the free layer and the top SAF layer and a magnetic capping layer between the SAF layer and the layer having RKKY coupling property. |
US09633678B2 |
Data reader with spin filter
A data reader may be configured with at least a detector stack positioned on an air bearing surface and consisting of a spin accumulation channel continuously extending from the air bearing surface to an injector stack. The injector stack can have at least one cladding layer contacting the spin accumulation channel. The at least one cladding layer may have a length as measured perpendicular to the ABS that filters minority spins from the detector stack. |
US09633676B2 |
Magnetic storage medium comprised of magnetic nanoparticles contained within nanotubes
A magnetic storage medium is formed of magnetic nanoparticles that are encapsulated within nanotubes (e.g., carbon nanotubes). |
US09633673B2 |
Accurate forward SNR estimation based on MMSE speech probability presence
Acoustic noise in an audio signal is reduced by calculating a speech probability presence (SPP) factor using minimum mean square error (MMSE). The SPP factor, which has a value typically ranging between zero and one, is modified or warped responsive to a value obtained from the evaluation of a sigmoid function, the shape of which is determined by a signal-to-noise ratio (SNR), which is obtained by an evaluation of the signal energy and noise energy output from a microphone over time. The shape and aggressiveness of the sigmoid function is determined using an extrinsically-determined SNR, not determined by the MMSE determination. The extrinsically-determined SNR is obtained from a long term history of previously-determined speech presence probabilities and a long term history of previously-determined noise histories. |
US09633671B2 |
Voice quality enhancement techniques, speech recognition techniques, and related systems
An echo canceller can be arranged to receive an input signal and to receive a reference signal. The echo canceller can subtract a linear component of the reference signal from the input signal. A noise suppressor can suppress non-linear effects of the reference signal in the input signal in correspondence with a large number of selectable parameters. Such suppression can be provided on a frequency-by-frequency basis, with a unique set of tunable parameters selected for each frequency. A degree of suppression provided by the noise suppressor can correspond to an estimate of residual echo remaining after the one or more linear components of the reference signal have been subtracted from the input signal, to an estimated double-talk probability, and to an estimated signal-to-noise ratio of near-end speech in the input signal for each respective frequency. A speech recognizer can receive a processed input signal from the noise suppressor. |
US09633665B2 |
Process and associated system for separating a specified component and an audio background component from an audio mixture signal
Processes are described herein for transforming an audio mixture signal data structure into a specified component data structure and a background component data structure. In the processes described herein, pitch differences between a guide signal and a dialogue component of an audio mixture signal are accounted for by explicit modeling. Processes described herein can involve obtaining an audio guide signal data structure that corresponds to a dubbing of the specified component, determining parametric spectrogram model data structures for spectrograms of the specified component and the background component, estimating parameters of the parametric spectrogram model data structures to produce data structures representing, a temporary specified signal and a temporary background signal, and filtering the audio mixture signal data structure using the data structures representing the temporary specified signal and the temporary background signal in order to produce data structures representing a specified audio signal and an audio background signal. |
US09633664B2 |
Audio encoder, audio decoder, method for encoding and audio information, method for decoding an audio information and computer program using a modification of a number representation of a numeric previous context value
An audio decoder includes an arithmetic decoder for providing decoded spectral values on the basis of an arithmetically-encoded representation of the spectral values and a frequency-domain-to-time-domain converter for providing a time-domain audio representation using the decoded spectral values. The arithmetic decoder selects a mapping rule describing a mapping of a code value onto a symbol code in dependence on a context state described by a numeric current context value, and determines the numeric current context value in dependence on a plurality of previously-decoded spectral values. The arithmetic decoder modifies a number representation of a numeric previous context value, describing a context state associated with one or more previously decoded spectral values, in dependence on a context subregion value, to acquire a number representation of a numeric current context value describing a context state associated with one or more spectral values to be decoded. An audio encoder uses a similar concept. |
US09633663B2 |
Apparatus, method and computer program for avoiding clipping artefacts
An audio encoding apparatus includes an encoder for encoding a time segment of an input audio signal to be encoded to obtain a corresponding encoded signal segment. The audio encoding apparatus further includes a decoder for decoding the encoded signal segment to obtain a re-decoded signal segment. A clipping detector is provided for analyzing the re-decoded signal segment with respect to at least one of an actual signal clipping or an perceptible signal clipping and for generating a corresponding clipping alert. The encoder is further configured to again encode the time segment of the audio signal with at least one modified encoding parameter resulting in a reduced clipping probability in response to the clipping alert. |
US09633661B1 |
Speech-responsive portable speaker
A portable music device may operate in response to user speech. In situations in which the music device is operating primarily from battery power, a push-to-talk (PTT) button may be used to indicate when the user is directing speech to the device. When the music device is receiving external power, the music device may continuously monitor a microphone signal to detect a user utterance of a wakeword, which may be used to indicate that subsequent speech is directed to the device. When operating from battery power, the device may send audio to a network-based support service for speech recognition and natural language understanding. When operating from external power, the speech recognition and/or natural language understanding may be performed by the music device itself. |
US09633660B2 |
User profiling for voice input processing
The present disclosure generally relates to systems and methods for processing received voice inputs for user identification. In an example process, voice input can be processed using a subset of words from a library used to identify the words or phrases of the voice input. The subset can be selected such that voice inputs provided by the user are more likely to include words from the subset. The subset of the library can be selected using any suitable approach, including for example based on the user's interests and words that relate to those interests. For example, the subset can include one or more words related to media items stored by the user on the electronic device, names of the user's contacts, applications or processes used by the user, or any other words relating to the user's interactions with the device. |
US09633658B2 |
Computer-implemented system and method for transcription error reduction during a live call
A computer-implemented system and method for transcription error reduction during a live call is provided. Speech utterances are transcribed during a live call. A confidence score is assigned to each transcribed speech utterance. One of the transcribed speech utterances with a low confidence score is identified. An attempt is made to identify a pool of related transcribed speech utterances by monitoring other live calls for a predetermined amount of time. Similar transcribed speech utterances with low confidence scores are identified and a group of the similar transcribed speech utterances and the identified transcribed speech utterance is formed. A determination is made as to whether the group includes a predetermined number of transcribed speech utterances upon termination of the predetermined time. If so, a sample of the transcribed speech utterances in the pool is processed to verify a validity of the transcribed speech utterances. |
US09633657B2 |
Systems and methods for supporting hearing impaired users
A method for providing speech recognition to a user on a mobile device are provided, the method comprising: 1) receiving, by a processor, audio data; 2) processing the audio data, by a speech recognition engine, to determine one or more corresponding text, wherein the processing comprises querying a local language model and a local acoustic model; and 3) displaying the one or more corresponding text on a screen of the mobile device. |
US09633655B1 |
Voice sensing and keyword analysis
Methods for voice sensing and keyword analysis are provided. An example method allows for causing a mobile device to transition to a second power mode, from a first power mode, in response to a first acoustic signal. The method includes authenticating a user based at least in part on a second acoustic signal. While authenticating the user, the second acoustic signal is compared to a spoken keyword. The spoken keyword is analyzed for authentication strength based on the length of the spoken keyword, quality of a series of phonemes used to represent the spoken keyword, and likelihood of the series of phonemes to be detected by a voice sensing. While receiving the first and second acoustic signals, a signal to noise ratio (SNR) is determined. The SNR is used to adjust sensitivity of a detection threshold of a voice sensing. |
US09633652B2 |
Methods, systems, and circuits for speaker dependent voice recognition with a single lexicon
Embodiments reduce the complexity of speaker dependent speech recognition systems and methods by representing the code phrase (i.e., the word or words to be recognized) using a single Gaussian Mixture Model (GMM) which is adapted from a Universal Background Model (UBM). Only the parameters of the GMM need to be stored. Further reduction in computation is achieved by only checking the GMM component that is relevant to the keyword template. In this scheme, keyword template is represented by a sequence of the index of best performing component of the GMM of the keyword model. Only one template is saved by combining the registration template using Longest Common Sequence algorithm. The quality of the word model is continuously updated by performing expectation maximization iteration using the test word which is accepted as keyword model. |
US09633651B2 |
Apparatus and method for providing an informed multichannel speech presence probability estimation
An apparatus for providing a speech probability estimation is provided. The apparatus includes a first speech probability estimator for estimating speech probability information indicating a first probability on whether a sound field of a scene includes speech or on whether the sound field of the scene does not include speech. Moreover, the apparatus includes an output interface for outputting the speech probability estimation depending on the speech probability information. The first speech probability estimator is configured to estimate the first speech probability information based on at least spatial information about the sound field or spatial information on the scene. |
US09633649B2 |
System and method for creating voice profiles for specific demographics
Systems, methods, and computer-readable storage devices for receiving an utterance from a user and analyzing the utterance to identify the demographics of the user. The system then analyzes the utterance to determine the prosody of the utterance, and retrieves from the Internet data associated with the determined demographics. Using the retrieved data, the system retrieves, also from the Internet, recorded speech matching the identified prosody. The recorded speech, which is based on the demographic data of the utterance and has a prosody matching the utterance, is then saved to a database for future use in generating speech specific to the user. |
US09633645B2 |
Adaptive noise control system with improved robustness
A method for determining an estimation of a secondary path transfer characteristic in an ANC system is described herein. In accordance with one example of the invention, the method includes the positioning of a microphone array in a listening room symmetrically with respect to a desired listening position and reproducing at least one test signal using a loudspeaker arranged within the listening room to generate an acoustic signal. The acoustic signal is measured with the microphones of the microphone array to obtain a microphone signal from each microphone of the microphone array, and a numerical representation of the secondary path transfer characteristic is calculated for each microphone signal based on the test signal and the respective microphone signal. The method further includes averaging the calculated numerical representations of the secondary path transfer characteristic to obtain the estimation of the secondary path transfer characteristic to be used in the ANC system. |
US09633639B2 |
Guitar effector module, and multi-type guitar effector using same
A guitar effector module includes: a component circuit board in which an analog guitar effector circuit is formed; a module case in which a knob for adjusting a sound by a circuit is mounted, and the component circuit board is installed therein; and a circuit connection unit, in which a circuit input unit, a circuit output unit, and a circuit power supply unit with respect to the circuit are formed, which is electrically connected with the component circuit board, and is installed on an external side of the module case. |
US09633635B2 |
Musical instrument stand clamp
A musical instrument stand clamp, which to be fixed to a stand, comprises a fixed part, a movable part, and a screwing-lock part. The movable part is pivotally coupled to a pivotal point of the fixed part. The fixed part includes a locked section and a clamping section respectively at two sides of the pivotal point. The movable part includes an outer curved surface near the locked section and a movable member far away from the locked section. The screwing-lock part is screwed through the locked section to push the outer curved surface of the movable part and rotate the movable part with respect to the fixed part so as to move the movable member toward a clamping member of the locked section, whereby the clamp is fixed to the stand. Thus, the clamp can be fast assembled or disassembled merely via rotating the screwing-lock part. |
US09633634B2 |
Magnetic throw-off floating attachment
A snare drum attachment is disclosed. A mounted body is mounted to the snare drum and houses a first magnet. A moveable body is coupled to the mounted body. The moveable body is configured to retain tensioned snares a set distance from a snare head of the snare drum. The moveable body houses a second magnet magnetically coupled to the first magnet so as to generate a magnetic force. A manual actuator is coupled to the first magnet. Actuation of the manual actuator alters the magnetic force so as to displace the moveable body relative to the mounted body. The displacement changes the set distance of the tensioned snares from the snare head. |
US09633633B1 |
Drum beater foot pedal
Disclosed herein is an adjustable foot pedal for a percussion drum. In one example, the foot pedal utilizes a transversely split footboard having a heel end pivotably coupled to a heel plate and a toe end coupled to a step force transfer member. In one example the heel end is longitudinally adjustable relative to the toe end. A connecting rod may be utilized having an intermediate point coupled to the eccentric cam plate at a position offset from the axis of rotation of the rotational shaft so as to pivot and linearly slide relative thereto; a first end of the connecting rod fixed to the frame body; and wherein the connecting rod couples to the eccentric cam plate between the attachment to the frame body and at least one compression member. A pivot arm may be used pivotably coupled to the connecting member and pivotably coupled to the footboard. |
US09633629B2 |
Piano or grand piano with strings and a sound bridge with reduced mass and improved tonal quality
The present invention relates to a piano or a grand piano with a resonance board and strings which rest on a sound bridge with two longitudinal faces. Such a sound bridge serves to transmit vibration energy which is output by the strings of the instrument to a resonance board. The invention is based on the realization that, on the one hand, the rigidity of the sound bridge must be maintained at the locations at which it is in contact with the strings and the resonance board. On the other hand, it is advantageous if the mass of the sound bridge is reduced. For this reason, according to the invention it is proposed that the sound bridge have a first cutout and a second cutout, wherein the two cutouts are arranged on the two longitudinal edges of the sound bridge which lie opposite one another. |
US09633626B2 |
Adjusting an electronic display based on gaze tracking
A system for adjusting an electronic display is provided herein. The system includes a gaze tracking device to capture an image of a pupil associated with a viewer of the electronic display, and a diameter of the pupil being ascertained via the image of the pupil. In another example, the system may also include an ambient light sensor receiver to logarithmically receive light information from an ambient light sensor; and a display adjuster to adjust a luminance of the electronic display based on a combination of a diameter and the light information. |
US09633625B2 |
Pixel circuit and method for driving the same
A pixel circuit includes a plurality of pixels. Each pixel includes a data storage capacitor to store a voltage for controlling a gray scale value based on an input data signal, a plurality of switch transistors connected in series between a data signal line and the data storage capacitor, and a plurality of connection transistors coupled to the pixels. The switch transistors have a gate electrode connected to a first gate control signal line. At least one connection transistor is connected between at least one node between the switch transistors of a first pixel and at least one node between the switch transistors of a second pixel adjacent to the first pixel. The at least one connection transistor includes a gate electrode connected to a second gate control signal line. |
US09633618B2 |
Device and method of modifying image signal
An image signal modifying method is disclosed. In one aspect, the image signal modifying method includes inputting a gray level interval of a first dynamic capacitance compensation (DCC) lookup table to a current gray level which is a target in a previous image signal when it is overdriven (DTG) and 0 to a gray level of the previous image signal (PIG). The method also includes searching for a data value in an adaptive color correction (ACC) lookup table corresponding to a gray level equal to a numerical value of the DTG (ALT) and performing an algorithm based on the DTG, the ALT, and the gray level interval of the first DCC lookup table. The method further includes generating a second DCC lookup table based on the algorithm, and performing second DCC processing on the input image signal based on the second DCC lookup table. |
US09633616B2 |
Display device and electronic apparatus
According to an aspect, a display device includes: a plurality of pixels aligned in row and column directions, each of the pixels including a drive element; a plurality of scan lines each coupled with the drive elements included in the pixels aligned in the row direction to transmit thereto a scan signal for selecting the pixels row by row; a plurality of signal lines each coupled with the drive elements included in the pixels aligned in the column direction to write display data; and a display control unit. The display control unit alternately repeats a display period and a stop period. In a latter term of the stop period, display control unit provides the display data written in the respective pixels in a row that has been selected during the display period immediately before the stop period, to the signal lines corresponding to the respective pixels. |
US09633614B2 |
Display device and a method for driving a display device including four sub-pixels
According to an aspect, a display device includes an image display panel and a signal processing unit. The signal processing unit derives a generation signal for a fourth sub-pixel in each of pixels based on an input signal for a first sub-pixel, an input signal for a second sub-pixel, an input signal for a third sub-pixel, and an extension coefficient. The signal processing unit derives a correction value based on a hue of an input color corresponding to a color to be displayed based on the input signal for the first sub-pixel, the input signal for the second sub-pixel, and the input signal for the third sub-pixel. The signal processing unit derives the output signal for the fourth sub-pixel in each of the pixels based on the generation signal for the fourth sub-pixel and the correction value and outputs the output signal to the fourth sub-pixel. |
US09633612B2 |
Display control system and method, and display device
The present disclosure relates to the field of display technology, and particularly to a display control system and control method, and a display device. The display control system comprises a plurality of source drive chips, a plurality of gate drive chips, a power-on timing controller and a standby timing controller, each of the source drive chips being connected with the power-on timing controller and the standby timing controller, respectively, the power-on timing controller being connected in series with the plurality of gate drive chips, the standby timing controller being also connected in series with the plurality of gate drive chip. The display control system further comprises a backlight source drive chip, both the power-on timing controller and the standby timing controller being connected with the backlight source drive chip. A display of a background-pushed message by a display device in a standby state can be achieved in the present disclosure by employing a design of two timing controllers, the power-on timing controller and the standby timing controller. This solves the problem that existing display devices only enable a prompt of a background-pushed message in the standby state but fail to display the contents of the background-pushed message. |
US09633609B2 |
Display compensating method and display compensating system
A display compensating method for eliminating a mura of a display panel. The display compensating method includes capturing an image displayed by the display panel to generate a capturing image; generating a plurality of compensation results according to a plurality of brightness values in the capturing image corresponding to a plurality of display units of the display panel; and setting brightness of the plurality of display units according to the plurality of compensation results to eliminate the mura of the display panel. |
US09633608B2 |
Display device having a plurality of regions and method of driving the same at different of frequencies
In one aspect, the display device includes a display panel including a first region and a second region, wherein the first region is configured to display a first image having a first luminance and wherein the second region is configured to display a second image having a second luminance. The display device also includes a panel driver configured to drive the first region at a first frequency and the second region at a second frequency less than the first frequency and a luminance compensator configured to compensate for the difference between the first and second luminances. |
US09633600B2 |
Display device and electronic appliance
There is provided a display device including a light-emitting portion configured to constitute a pixel and emit light by a drive current, a writing transistor configured to write a video signal into pixel capacitance, a driving transistor configured to control the drive current of the light-emitting portion on the basis of the video signal written in the pixel capacitance, a first metal layer configured to constitute a drain and a source of each of the driving transistor and the writing transistor, and a second metal layer configured to constitute a gate of each of the driving transistor and the writing transistor. |
US09633594B2 |
Display device and electronic apparatus
A display device includes an array of display cells having a plurality of display subunits; a plurality of first type of drive lines and a plurality of second type of drive lines, each of the plurality of first type of drive lines intersecting with each of the plurality of second type of drive lines, intersection thereof corresponding to each display subunit of the plurality of display subunits, to provide a display drive signal for each display subunit; a display drive unit, connected with the drive lines, to provide a display drive signal for the plurality of first type of drive lines and the plurality of second type of drive lines; wherein at least one drive line of at least one type of drive lines of the plurality of first type of drive lines and the plurality of second type of drive lines is a curve. |
US09633593B2 |
Organic light emitting diode display panel
An organic light emitting diode display panel is disclosed which is defined into a plurality of pixel regions and includes: first through third pixel drivers arranged in each of the pixel regions and configured to each drive respective organic light emitting diode; and first through third pixel electrodes arranged in each of the pixel regions and connected to the first through third pixel drivers. The first and second pixel drivers within an odd-numbered pixel region share a first power supply line with each other. The third pixel driver within the odd-numbered pixel region shares a second power supply line with the first pixel driver within an even-numbered pixel region adjacent to the odd-numbered pixel region. The second and third pixel electrodes are arranged along a first direction parallel to a major axis of the first pixel electrode and disposed to expend along second directions perpendicular to the first direction. |
US09633587B2 |
Backlight simulation at reduced resolutions to determine spatial modulation of light for high dynamic range images
Embodiments of the invention relate generally to generating images with an enhanced range of brightness levels, and more particularly, to facilitating high dynamic range imaging by adjusting pixel data and/or using predicted values of luminance, for example, at different resolutions. In at least one embodiment, a method generates an image with an enhanced range of brightness levels. The method can include accessing a model of backlight that includes data representing values of luminance for a number of first samples. The method also can include inverting the values of luminance, as well as upsampling inverted values of luminance to determine upsampled values of luminance. Further, the method can include scaling pixel data for a number of second samples by the upsampled values of luminance to control a modulator to generate an image. |
US09633581B2 |
Recycling processes and labels and adhesives and use therein
A method for recycling materials having an affixed label is disclosed. The present invention also includes labels and adhesives that is readily removable from a material during a process for recycling the material. |
US09633580B2 |
Label for in-mold molding, in-mold molded article and method for molding same
A label for in-mold molding, which comprises a laminate film comprising a substrate layer (A) and a heat-sealable resin layer (B), wherein the substrate layer (A) comprises a thermoplastic resin in an amount of from 40 to 90% by weight and at least one of an inorganic fine powder and an organic filler in an amount of from 10 to 60% by weight, the heat-sealable resin layer (B) comprises a thermoplastic resin in an amount of from 50 to 100% by weight, the laminate film is at least uniaxially stretched, the porosity of the laminate film is from 10% to 45%, the thermal conductivity of the label is from 0.04 to 0.11 W/mK, and the bonding strength of the label stuck to an adherend formed of a propylene-based resin at 200° C. and 60 MPa is from 250 to 1500 g/15 mm. |
US09633578B2 |
Methods and systems for tracking occurrences and non-occurrences of medical-related events
Described in some aspects of the present invention are methods and systems that can be used to track occurrences and/or non-occurrences of medical-related events, for example, to record whether one or more medical-related events have occurred at a particular time or during a particular time interval. Any suitable number of events may be tracked using such methods and systems, and the types and varieties of events that can be tracked are diverse. Examples include but are not limited to vaccine or other drug administrations, physical therapies, tests, diagnoses and surgeries. In some preferred embodiments, these and/or other medical-related occurrences or events will be tracked using an article that can be worn about the body of a patient although a variety of non-wearable articles can be utilized as well. |
US09633573B1 |
Mechanical release archery training device
An archery training system provides an archer the ability to safely condition psychologically and physically without the need of a bow and arrow while maintaining the sensation of using a bow and arrow. The archery training system is easily portable or stowed, and offers a combination of variables replicating the activity of compound bow shooting, such as a counter balanced replication of a grasped bow while drawing a bowstring, the utilization of accessory bow sights for target acquisition and aiming, the adjustability to accommodate the various hand grip styles unique to each archer, and immediate visual feedback to performance or shooting technique. |
US09633572B2 |
Systems and methods for computerized interactive skill training
The present invention is directed to interactive training, and in particular, to methods and systems for computerized interactive skill training. An example embodiment provides a method and system for providing skill training using a computerized system. The computerized system receives a selection of a first training subject. A training challenge related to the first training subject is accessed from computer readable memory. The training challenge is provided to a user via a terminal, optionally in verbal form. A first score related to the correctness and/or completeness of a verbalized challenge response provided by the user is stored in memory. A second score related to how quickly the trainee provided the verbalized challenge response is stored in memory. A third challenge score related to the confidence and/or style with which the trainee verbalized the challenge response is stored in memory. |
US09633567B1 |
Ground collision avoidance system (iGCAS)
The present invention is a system and method for aircraft ground collision avoidance (iGCAS) comprising a modular array of software, including a sense own state module configured to gather data to compute trajectory, a sense terrain module including a digital terrain map (DTM) and map manger routine to store and retrieve terrain elevations, a predict collision threat module configured to generate an elevation profile corresponding to the terrain under the trajectory computed by said sense own state module, a predict avoidance trajectory module configured to simulate avoidance maneuvers ahead of the aircraft, a determine need to avoid module configured to determine which avoidance maneuver should be used, when it should be initiated, and when it should be terminated, a notify Module configured to display each maneuver's viability to the pilot by a colored GUI, a pilot controls module configured to turn the system on and off, and an avoid module configured to define how an aircraft will perform avoidance maneuvers through 3-dimensional space. |
US09633562B2 |
Automotive telemetry protocol
Method and apparatus whereby one or more vehicle nodes are configured for use in a vehicular communications network which provides for exchange of data between a plurality of vehicle nodes and a plurality of stationary nodes, where each stationary node comprises a computing unit operable to broadcast periodic announcements of services, and to receive identity messages from the vehicle node on at least one common IEEE 802.11 Medium Access Control (MAC) channel. Preferably, each stationary node is configured to provide for exchange of data with the plurality of vehicle nodes, where each vehicle node comprises at least one on-board computing unit which is operable to broadcast identity messages to and to receive service announcements from the stationary node on the at least one common IEEE 802.11 MAC channel. |
US09633560B1 |
Traffic prediction and control system for vehicle traffic flows at traffic intersections
A method and a traffic prediction and control system (TPCS) for predicting and controlling vehicle traffic flow through a traffic intersection dynamically with proximal traffic intersections are provided. The TPCS dynamically receives sensor data from sensors at a local traffic intersection, determines traffic flow parameters, and determines a traffic flow flux using the traffic flow parameters. The TPCS dynamically receives analytical parameters from sensors at proximal traffic intersections and determines a minimum safe driving distance between leading and trailing vehicles, a traffic free flow density, a synchronized traffic flow density, and a traffic jam density to predict transitions of the vehicle traffic flow across traffic flow phases through the local traffic intersection. The TPCS controls the vehicle traffic flow by dynamically adjusting duration of traffic signals of the local traffic intersection and transmitting traffic signal time adjustment instructions to the proximal traffic intersections to maintain an optimized traffic flow flux. |
US09633555B2 |
Remote device location identification
A method, system, and computer usable program product for remote device location identification are provided in the illustrative embodiments. A command to identify a remote device is received, at the remote device in a data processing environment. The command is included in a predetermined communication directed to the remote device. A determination is made whether the command is supported at the remote device. The remote device is identified by transmitting an identification of a location associated with the remote device. |
US09633553B2 |
Systems and methods for compensating for sensor drift in a hazard detection system
Systems and methods for compensating for sensor drift of a smoke sensor are described herein. Sensor drift may be caused by accumulated buildup of dust or other particulates within an enclosure of the smoke sensor. Embodiments described herein can account for sensor drift by adjusting a clear air offset value. |
US09633550B2 |
Evacuation system
A method includes receiving, at a node located in a structure, an indication of an evacuation condition. The structure includes a plurality of nodes in communication with one another. The method also includes sending, by the node, a message to one or more additional nodes. The message informs the one or more additional nodes that the node is going to determine an evacuation route in response to the indication of the evacuation condition such that the one or more additional nodes do not determine the evacuation route. The method also includes determining, by the node, the evacuation route based at least in part on the indication of the evacuation condition and at least in part on a layout of the structure. The method further includes providing, by the node, the evacuation route to the one or more additional nodes. |
US09633549B2 |
Emergency auto-notification
According to an embodiment, methods and systems can provide emergency auto-notification. Thus, in the event of an emergency, such as a predefined emergency, one or more people can be notified of a user's condition, needs, environment, and location, for example. The people to be notified can be predetermined, such as during a set up procedure. The people to be notified can be notified by text messaging, email, vice, voice mail, or any other method. The notification can be triggered by any desired criteria. For example, the notification can be triggered by the user's condition, location, or environment. |
US09633548B2 |
Leveraging a user's geo-location to arm and disarm a network enabled device
A method of controlling operation of a security device in a location by a mobile user device, comprises monitoring a region around a location of interest, via a mobile user device; providing at least one security device within the region, wherein the security device comprises at least one sensor to monitor a location. The user device recognizes that the user device has entered the region, and searches for a security device within the region. The security device is detected and at least certain security features and/or sensors are disarmed. Disarming may mean that at least certain notifications are not sent about the status of the location. When the user device recognizes that the device is leaving the region, security features and/or sensors may be armed. |
US09633545B2 |
Hygiene compliance module
A hygiene compliance module is configured to be retrofit with a compatible dispenser to enable hygiene compliance monitoring functions. The hygiene compliance module is configured to be coupled to the dispenser via a communication interface to receive power, ground, and dispenser actuation signals therefrom. In addition, the hygiene compliance module is enabled to communicate with a wireless data tag that is worn by a user of the dispenser and with a remote hygiene compliance monitoring station. |
US09633542B2 |
Electronic device and computer-based method for reminding using the electronic device
In a method for reminding using an electronic device, the method includes controlling a front camera of the electronic device to capture a facial image, determining whether a user needs to shave according to the characteristic information of a beard region of the facial image, and controlling a reminding device to remind the user to shave. |
US09633536B1 |
Motion sensor alarm and sprinkler device
An intruder alarm and deterrent system includes a plurality of motion sensors around a dwelling being in communication with an existing sprinkler system. Upon sensing an adult intruder, the sprinkler system is activated to broadcast a spray of water to douse, startle, and scare away the intruder. The intruder alarm also provides an audible alarm. |
US09633535B2 |
Method and system for advanced electronic border security
A system (10) for protecting a border (B) comprises a fiber-optic cable (12) extending from one end of a border to the other end thereof. The cable includes a bundle of optical fibers which connect to sensors placed at intervals long the border. Included within the fiber-optic cable is a high voltage conductor by which high voltage AC is introduced into, and passes through, the cable for powering the sensors. The high voltage is stepped down and rectified from AC to DC for this purpose. Various types of sensors (100-700) are arranged in pods (14) located at intervals along the length of the border. A method of border protection is also disclosed. |
US09633533B2 |
System and method for interacting with digital video recorders through networking applications
A method and apparatus are provided. The method includes the steps of providing a web or social networking account within a chat server for a digital video recorder (DVR) of a security system, the DVR receiving a chat message from a person through the chat server, and the DVR automatically executing a predetermined instruction corresponding to a content of the chat message. |
US09633531B1 |
Clamp and pivoting flag for tables
Devices, apparatus, and methods for clamping a pivoting arm/flag onto an edge of furniture, such as a table edge, countertop edge, and the like, with or without messages and advertising indicia thereon, in order to signal servers and wait staff that service is being requested. The clamp can include a one-piece clip with a substantially horizontal top leg perpendicular to a top edge of a back panel, and an upwardly angled lower leg attached to a bottom edge of the back panel. |
US09633527B2 |
Allocation of variable award in gaming devices
Embodiments of the present invention set forth systems, apparatuses and methods for allocating variable awards in gaming devices. Accordingly, a gaming device can be configured to provide a variable award that is allocated over a variety of selectable play options. Each of the selectable play options has distinguishing play characteristics that provide different game play while maintaining a substantially similar expected outcome value to the other selectable play options. |
US09633522B2 |
Gaming device having card game
Embodiments of the present invention are directed to an apparatus, system, computer readable storage media, and/or method that involve or otherwise facilitate a card game or secondary card game played on a gaming device. The card game may be structured to use similar rules to a blackjack-styled card game. The card game may be played against an opponent, such as a computer, dealer, or another player. Alternatively, the card game may include the display of one or more cards and a process to determine if a total value of the cards meets a predefined criterion. A win against an opponent or satisfaction of the predefined criterion may progress the card game to another round of play. These rounds of play may continue until an opponent wins, or until the predefined criterion is not satisfied. |
US09633506B2 |
Gaming system and method for providing a game including roaming wild symbols
In various embodiments, the present disclosure relates generally to gaming systems and methods for providing one or more games employing roaming wild symbols. |
US09633505B2 |
System and method for on-demand delivery of audio content for use with entertainment creatives
A method of creating and delivering an on-demand audio asset for inclusion in a creative is described. The method includes the steps of accessing a central processing environment, requesting at least one recording of at least a portion of an audio transmission generated from a communication device, generating at least one audio asset, adding the audio asset to a pool of related assets stored in a vault connected to the central processing environment, selecting the generated audio asset and at least one other related asset from the pool of related assets to form a creative, then requesting delivery of the creative to another communication device, and finally delivering the creative to the other communication device. The method is performed in part by a creative composition engine, which is also described. The engine includes a central processing environment having a processor, a digital recorder and a digital asset storage vault. |
US09633502B2 |
Controlled coin portal
A controlled coin inlet or portal is described that allows for improved alignment of a coin with the coin entry slot of a coin acceptor mechanism. A coin entry slot having at least an upper or lower edge is dimensioned to allow entry of a coin of a desired maximum width in a substantially on-edge orientation. The coin portal may include at least one outwardly extending coin guide slot of substantially corresponding maximum width as the coin entry slot and positioned adjacent to the upper or lower edge of the coin entry slot. |
US09633501B2 |
Cash automatic transaction device
A cash automatic transaction device capable of, upon storage of a banknote sent from a depositing/dispensing port in a banknote storage box, or upon accumulation of a banknote sent from the banknote storage box in the depositing/dispensing port, preventing the occurrence of trouble such as paper jam or poor posture. The cash automatic transaction device has a depositing/dispensing port used for depositing/dispensing of banknotes, and a banknote storage box for storage of deposited/dispensed banknotes. The depositing/dispensing port has depositing/dispensing space to store the deposited/dispensed banknotes, and accumulation space in which the banknote is accumulated upon dispensing. The width of the depositing/dispensing space is smaller than the exit and entrance width of the storage box, while the width of the accumulation space is greater than the exit and entrance width of the storage box. |
US09633500B1 |
Systems, methods and devices for managing rejected coins during coin processing
Currency processing systems, coin processing machines, computer-readable storage media, and methods of managing processed coins are presented herein. A method is presented for managing coins processed by a currency processing system. The method includes: receiving a batch of coins by the currency processing system; feeding the coins into a coin processing unit which includes one or more coin discriminating sensors; sorting the batch of coins into genuine fit target coins and reject coins; sorting the reject coins into a plurality of reject groups, each of which corresponds to a respective category of rejected coins; analyzing at least one of the reject groups to determine if any genuine target coins were mischaracterized and erroneously sorted into that reject group; and, crediting a user of the currency processing system for any genuine target coins in the reject group determined to have been mischaracterized and erroneously sorted. |
US09633499B2 |
System and method for detecting presence of one or more user identification device
A method for detecting presence of one or more security token comprises a host device transmitting a wake-up message for receipt by the security token. Based on the wake-up message and a condition of the one or more security token, the security token either awakens or returns to an inactive state. The wake-up message comprises a security code that is unique to a host device and an instruction code that is configured to selectively instruct at least one of the one or more security tokens associated with the vehicle to awaken. A system for detecting presence of a user includes a host device configured for transmitting a wake-up message to be received by a security token. The wake-up message comprises a unique security code and an instruction code that is configured to instruct security tokens associated with the vehicle to awaken. |
US09633494B1 |
Secure destruction of storage devices
Techniques are provided for securely destroying storage devices stored in a data storage center. A server room may be situated in the data storage center that is configured to store a plurality of server racks for storing storage devices that are associated with a radio frequency identifier tag. The data storage center may include a secure area that includes destruction devices for destroying a storage. The data storage center may include a computer system for transmitting instructions to a user device for identifying the storage device for removal and transfer to the secure area, tracking a location of the storage device based at least in part on an associated RFID tag, and transmitting an alarm to the data storage center based at least in part on the location of the storage device and the expiration of a time interval. |
US09633493B2 |
Secure short-distance-based communication and validation system for zone-based validation
A secure short-distance-based communication and validation system validates users in a validation area. The system may include multiple zones in the validation area and beacons in each zone. A run-time mobile device identifier and keys that may be location-specific, device-specific and time-specific are generated and utilized for secure communication between mobile devices and a zone computer in a zone. The validation area may be in a vehicle, and validation may include deducting a fare. |
US09633492B2 |
System and method for a vehicle scanner to automatically execute a test suite from a storage card
Disclosed are systems and methods for a vehicle scanner to automatically execute applications from a removable storage card. The method includes detecting a presence of one or more executable diagnostic requests in removable data storage, and responsive to the detection, transmitting one or more corresponding requests for vehicle diagnostic data to the vehicle via a vehicle interface. Responsive to the transmission, the vehicle scanner receives and processes diagnostic data from the vehicle. The vehicle scanner may store the data back to the removable storage card, or may transmit the data via a wired or wireless interface to a display device. As part of the detection process, the vehicle scanner may first authenticate the removable storage card before executing vehicle diagnostic instructions from the card. |
US09633491B2 |
Monitoring belt operation to predict belt lifespan
A system and a method for monitoring a belt to predict a lifespan for the belt are described. An indicator of belt speed and an indicator of torque from a motor for driving the belt can be determined for a first time interval. A belt service value can be determined for the first time interval based upon the indicators of belt speed and torque from the motor. The belt service value can indicate a deviation from one or more reference belt speeds and torques from the motor. An effective service interval can be determined for the operation of the belt during the first time interval, based upon the belt service value. An indicator of a remaining operational lifespan for the belt can then be determined, based upon the effective service interval. |
US09633488B2 |
Methods and apparatus for acquiring, transmitting, and storing vehicle performance information
The present invention includes the methods and the apparatus for acquiring, transmitting, and storing vehicle performance information. The methods of the present invention can be embodied in a wireless mobile computer device or non-transitory computer-readable medium. The embodiments include a processor, a memory storage device, a display screen, and a software application. The software application includes computer-readable instructions stored on the memory storage device and configured for execution by this process. These computer-readable instructions further include steps for acquiring instructions, storing instructions, displaying instructions, and transmitting instructions. |
US09633485B2 |
System and method for the access to information contained in motor vehicles
System and method for the access to information contained in motor vehicles. The system comprises: —a control unit (206) configured for: •capturing determined information of the vehicle (100) coming from some electronic component, preferable from the ECU (214); •generating a data message from said information—an optical transmitter (216) for the transmission of said data message (122) by means of visible optical communication through some light (104) of the vehicle. The information is captured by a communications terminal (102) by means of an optical receiver (106) and is sent to an analysis terminal (114) for its processing, being able to be employed for the control of access or diagnostic of the vehicle, among other applications. |
US09633483B1 |
System for filtering, segmenting and recognizing objects in unconstrained environments
Described is a system for filtering, segmenting and recognizing objects. The system receives a three-dimensional (3D) point cloud having a plurality of data points in 3D space and down-samples the 3D point cloud to generate a down-sampled 3D point cloud with reduced data points in the 3D space. A ground plane is then identified and removed, leaving above-ground data points in the down-sampled 3D point cloud. The above-ground data points are clustered to generate a plurality of 3D blobs, each of the 3D blobs having a cluster size. The 3D blobs are filtered based on cluster size to generate a set of 3D candidate blobs. Features are extracted from each 3D candidate blob. Finally, at least one of the 3D candidate blobs is classified as a pre-defined object class based on the extracted features. |
US09633480B2 |
Radiographic image analyzing device, method, and recording medium
An image obtaining unit obtains a subject image, a body thickness distribution modifying unit receives input of a virtual model having an estimated body thickness distribution and modifies the estimated body thickness distribution of the virtual model to output the modified estimated body thickness distribution, and a body thickness distribution determining unit determines the outputted estimated body thickness distribution to be used as the body thickness distribution of the subject. The body thickness distribution determining unit includes a judging unit for switching, according to a judgment condition, between a first control under which the body thickness distribution modifying process is iteratively executed until a first termination condition is satisfied and a second control under which the body thickness distribution modifying process is iteratively executed until a second termination condition that is different from the first termination condition is satisfied so that the first control or the second control is executed. |
US09633479B2 |
Time constrained augmented reality
A method of displaying virtual content on an augmented reality device (101) is disclosed. The virtual content is associated with a scene. An image of a scene captured using the augmented reality device (101) is received. A viewing time of the scene is determined, according to a relative motion between the augmented reality device and the scene. Virtual content is selected, from a predetermined range of virtual content, based on the determined viewing time. The virtual content is displayed on the augmented reality device (101) together with the image of the scene. |
US09633477B2 |
Wearable device and method of controlling therefor using location information
The present specification relates to a wearable device and a method of controlling therefor. According to one embodiment, a method of controlling a wearable device includes the steps of detecting a real object and displaying a first virtual object based on the detected real object when the real object is detected, and detecting the real object and a first interaction and displaying a second virtual object when the real object and the first interaction are detected, wherein the second virtual object is displayed based on the second virtual object information transmitted by the external device. |
US09633475B2 |
Modeling geologic surfaces using unilateral non-node constraints from neighboring surfaces in the stratigraphic sequence
Systems and methods for modeling three-dimensional (“3D”) geologic surfaces, which represent a constraining surface and a constrained surface, in a stratigraphic conforming relationship that do not intersect or overlap. |
US09633467B2 |
Stencil mapped shadowing system
Aspects comprise shadowing system as part of ray tracing. It is based on uniform grid of cells, and on local stencils in cells. The acceleration structures are abandoned along with high traversal and construction costs of these structures. The amount of intersection tests is cut down. The stencils are generated in the preprocessing stage and utilized in runtime. The relevant part of scene data, critical for shadowing of all visible intersection points in a cell, is registered in the local stencil map, as a volumetric data. The runtime use of stencils allows a complete locality at each cell, enhanced utilization of processing resources and load balancing of parallel processing. |
US09633463B2 |
User gesture driven avatar apparatus and method
Apparatuses, methods and storage medium associated with animating and rendering an avatar are disclosed herein. In embodiments, the apparatus may include a gesture tracker and an animation engine. The gesture tracker may be configured to detect and track a user gesture that corresponds to a canned facial expression, the user gesture including a duration component corresponding to a duration the canned facial expression is to be animated. Further, the gesture tracker may be configured to respond to a detection and tracking of the user gesture, and output one or more animation messages that describe the detected/tracked user gesture or identify the canned facial expression, and the duration. The animation engine may be configured to receive the one or more animation messages, and drive an avatar model, in accordance with the one or more animation messages, to animate the avatar with animation of the canned facial expressions for the duration. Other embodiments may be described and/or claimed. |
US09633462B2 |
Providing pre-edits for photos
Implementations generally relate to providing pre-edits to photos. In some implementations, a method includes detecting one or more objects in a photo. The method further includes classifying the one or more objects. The method further includes selecting one or more parameter values for one or more respective filters based on the classifying of the one or more objects. |
US09633458B2 |
Method and system for reducing a polygon bounding box
In a graphics processing pipeline, a processing unit establishes a bounding box around a polygon in order to identify sample points that are covered by the polygon. For a given sample point included within the bounding box, the processing unit constructs a set of lines that intersect at the sample point, where each line in the set of lines is parallel to at least one side of the polygon. When all vertices of the polygon reside on one side of at least one line in the set of lines, the processing unit may reduce the size of the bounding box to exclude the sample point. |
US09633457B2 |
Apparatus and method for automatically determining graph types, based on analysis of electronic document
An information processing apparatus includes a processor to generate an electronic document including a graph. The processor extracts specialized vocabulary words from a title of the electronic document. These specialized vocabulary words are respectively associated with vectors having a plurality of elements, each element indicating a tendency to a specific purpose of documents. The processor specifies a document purpose of the electronic document, based on an average of the vectors associated with the extracted specialized vocabulary words. The processor then determines a graph type, based on the document purpose, and generates a graph of the determined graph type, based on data of the electronic document. |
US09633456B2 |
System and method for providing flavor advisement and enhancement
A method and apparatus for generating a visual representation of a flavor or texture profile based on flavor or texture preferences of a user with respect to each of a plurality of flavor or texture categories or based on flavor or texture characteristic information representing flavor or texture characteristics of a product or recipe for each of a plurality of flavor or texture categories. The flavor or texture preferences of a user and the flavor or texture characteristics of a product or recipe with respect to each of a plurality of flavor or texture categories is determined by way of a method and apparatus for determining a flavor or texture profile for a user and a method and apparatus for determining a flavor or texture profile for a food element, respectively. Also described is a method and apparatus for providing food element recommendations based on flavor or texture. |
US09633455B1 |
Dictionary-free MR parameter inference for fingerprinting reconstruction
A method of generating Magnetic Resonance (MR) parameter maps includes creating one or more parameter maps, each respective parameter map comprising initial parameter values associated with one of a plurality of MR parameters. A dynamical update process is performed over a plurality of time points. The dynamical update process performed at each respective time point includes applying a randomized pulse sequence to subject using an MR scanner to acquire a k-space dataset. This randomized pulse sequence is configured to excite a distinct range of values associated with the plurality of MR parameters. The dynamical update process further includes applying a reconstruction process to the k-space dataset to generate an image and using a tracking process to update the one or more parameter maps based on the randomized pulse sequence and the image. |
US09633453B2 |
Image processing device, image processing method, and non-transitory recording medium
A volume of an object is constructed from images obtained by imaging the object or the like and depicting the object. The calculator 102 of the image processing device 101 calculates a statistic of each of first material images depicting an object. The initializer 104 constructs a volume of the object from multiple second material images depicting the object and multiple second imaging directions associated respectively with the multiple second material images. The estimator 103 estimates the statistic associated with an observation direction from the calculated statistics. The render 105 renders an image by observing the constructed volume in the observation direction. The corrector 106 corrects the rendered image based on the statistic estimated in association with the observation direction. The constructor 107 constructs a volume of the object from at least the observation direction and corrected image. |
US09633450B2 |
Image measurement device, and recording medium
An image measurement device calculates a disparity value from image data of images having disparity, acquires three-dimensional position information at the time of capturing the image data by using the disparity value, and calculates a three-dimensional plane from a region on an image serving as a same plane as a designated measurement region. Three-dimensional positions of the measurement region are acquired from the calculated three-dimensional plane to calculate a length. Accordingly, by using captured images having disparity, it is possible to measure a length of any part even in a region that the disparity value is hard to be acquired. |
US09633448B1 |
Hue-based color naming for an image
Systems and methods are provided for associating colors or color names with a color image based on hue. A set of hue values can be extracted from color data, such as a color palette, corresponding to a color image. A representative hue can be derived from the set of hue values. Colors included in the color data that are attributable to the representative hue can be identified and one or more colors can be derived therefrom as representative of a subject depicted by the color image. Color names matching the representative colors can be identified and associated with the color image. In particular, a common color name can be determined therefrom and associated with the subject of the color image. |
US09633442B2 |
Array cameras including an array camera module augmented with a separate camera
Systems with an array camera augmented with a conventional camera in accordance with embodiments of the invention are disclosed. In some embodiments, the array camera is used to capture a first set of image data of a scene and a conventional camera is used to capture a second set of image data for the scene. An object of interest is identified in the first set of image data. A first depth measurement for the object of interest is determined and compared to a predetermined threshold. If the first depth measurement is above the threshold, a second set of image data captured using the conventional camera is obtained. The object of interest is identified in the second set of image data and a second depth measurement for the object of interest is determined using at least a portion of the first set of image data and at least a portion of the second set of image data. |
US09633436B2 |
Systems and methods for multi-dimensional object detection
Systems and methods for multi-dimensional object detection are described. Embodiments disclose receiving image frames, extracting image components in the image frame, identifying line segments in the extracted components, grouping the line segments into groups, based at least in part on one or more similarities between the slope associated with a line segment and the spatial proximity between the line segments, and merging each of the one or more identified line segments in a selected group into a single line segment. Embodiments additionally disclose detecting the position of one or more objects in the image frame by identifying objects in the image frame, producing a second version of the image frame, applying at least one image classifier to the image frame and the second version of the image frame, and identifying coordinates associated with at least one target object. Some embodiments additionally couple lane and object detection with alert generation. |
US09633435B2 |
Calibrating RGB-D sensors to medical image scanners
A computer-implemented method for automatically calibrating an RGB-D sensor and an imaging device using a transformation matrix includes using a medical image scanner to acquire a first dataset representative of an apparatus attached to a downward facing surface of a patient table, wherein corners of the apparatus are located at a plurality of corner locations. The plurality of corner locations are identified based on the first dataset and the RGB-D sensor is used to acquire a second dataset representative of a plurality of calibration markers displayed on an upward facing surface of the patient table at the corner locations. A plurality of calibration marker locations are identified based on the second dataset and the transformation matrix is generated by aligning the first dataset and the second dataset using the plurality of corner locations and the plurality of calibration marker locations. Then, a translation is added to the transformation matrix corresponding to a maximum height associated with the apparatus. |
US09633430B2 |
Method for analyzing functional MRI brain images
A method for analyzing fMRI brain data, comprising: collecting the fMRI data including spatial information and temporal information from subjects; preprocessing the fMRI data; computing independent components (ICs) and their corresponding time course for each individual subjects; constructing an initial functional connectivity pattern; constructing a classifier based on the functional connectivity pattern; and applying the classifier to functional connectivity patterns of individual subjects for statistical analysis or diagnosis. The method may be used in fMRI based studies of a brain function and brain disorder diagnosis. |
US09633425B2 |
System for detecting image abnormalities
Image capture systems including a moving platform; an image capture device having a sensor for capturing an image, the image having pixels, mounted on the moving platform; and a detection computer executing an abnormality detection algorithm for detecting an abnormality in the pixels of the image immediately after the image is captured by scanning the image utilizing predetermined parameters indicative of characteristics of the abnormality and then automatically and immediately causing a re-shoot of the image. |
US09633421B2 |
Image compensation value computation
Image compensation value computation techniques are described. In one or more implementations, an image key value is calculated, by a computing device, for image data based on values of pixels of the image data. A tuning value is computed by the computing device using the image key value. The tuning value is configured to adjust how the image data is to be measured to compute an image compensation value. The image compensation value is then computed by the computing device such that a statistic computed in accordance with the tuning value approaches a target value. The image compensation value is applied by the computing device to adjust the image data. |
US09633420B2 |
High dynamic range image generation and rendering
Techniques and tools for high dynamic range (HDR) image rendering and generation. An HDR image generating system performs motion analysis on a set of lower dynamic range (LDR) images and derives relative exposure levels for the images based on information obtained in the motion analysis. These relative exposure levels are used when integrating the LDR images to form an HDR image. An HDR image rendering system tone maps sample values in an HDR image to a respective lower dynamic range value, and calculates local contrast values. Residual signals are derived based on local contrast, and sample values for an LDR image are calculated based on the tone-mapped sample values and the residual signals. User preference information can be used during various stages of HDR image generation or rendering. |
US09633409B2 |
GPU predication
Techniques are disclosed relating to predication. In one embodiment, a graphics processing unit is disclosed that includes a first set of architecturally-defined registers configured to store predication information. The graphics processing unit further includes a second set of registers configured to mirror the first set of registers and an execution pipeline configured to discontinue execution of an instruction sequence based on predication information in the second set of registers. In one embodiment, the second set of registers includes one or more registers proximal to an output of the execution pipeline. In some embodiments, the execution pipeline writes back a predicate value determined for a predicate writer to the second set of registers. The first set of architecturally-defined registers is then updated with the predicate value written back to the second set of registers. In some embodiments, the execution pipeline discontinues execution of the instruction sequence without stalling. |
US09633400B2 |
Display apparatus and method of providing a user interface
A display apparatus and a method for providing user interface thereof are provided. The method for providing user interface includes searching a feed where a moving image is included from among feeds received from at least one social network and displaying user interface including at least one feed where the moving image is included, in response to a predetermined user command being input. The display apparatus may include a display; a communicator configured to receive a feed from at least one social network; a user input; and a controller configured to search a feed where a feed including a moving image is included from among feeds received through the communicator, in response to a predetermined user command being input, and control the display in order to display a user interface which includes at least one feed including the moving image. |
US09633399B2 |
Method and system for implementing a cloud-based social media marketing method and system
Disclosed is an approach for implementing a system, method, and computer program product for performing social marketing using a cloud-based system. The approach is capable of accessing data across multiple types of internet-based sources of social data and commentary and to perform analysis upon that data. A social marketing campaign can then be generated and implemented in an integrated manner using the system. This permits realtime reaction to trends, with rapid ability to react to opportunities in the marketplace. |
US09633395B2 |
Method of administering an investment fund
A method of administering an investment fund using a computer. The method includes the steps of creating shares for sale, providing a managed distribution schedule identifying a number of payments to be provided during each of consecutive periods, providing an investment strategy for investing in assets to provide funds sufficient to meet the managed distribution schedule, issuing a share to an investor in exchange for funds received from the investor, investing the received funds according to the investment strategy, calculating the value of each of the payments to be provided according to the managed distribution schedule in a period to the investor, and providing each of the payments to the investor during the period. Multiple embodiments relate to methods for calculation and sourcing of each payment. |
US09633390B2 |
Completing a purchase transaction at various locations within a retail store
Embodiments for determining a completing a purchase transaction at a waypoint where a customer is located within a retail store are disclosed. The embodiments include determining waypoint of the customer, receiving waypoint data including the location of the customer positions within the retail store and a shopping list identifying items that the customer desires to purchase, and completing the purchase transaction for the items at the waypoint. |
US09633389B2 |
System, method, and non-transitory computer-readable storage media for allowing a customer to place orders remotely and to pick-up the order at a store
Techniques for allowing customer to order goods on-line or remotely and to pick-up the goods at a desired location or store are disclosed. The techniques include receiving a customer order. The location for delivery of the item with a customer order. The customer order includes at least one good and an associated customer identification number, e.g., a customer motor vehicle license plate number. The techniques further includes capturing images of the license plates of motor vehicles as the motor vehicles enter an order pick-up area located at the store, and if the associated customer motor vehicle license plate number matches one of the received motor vehicle license plate numbers from the optical character recognition unit, delivering the customer order to the motor vehicle associated with the customer. |
US09633385B1 |
Financial management system categorization utilizing image or video acquired with mobile communication device
Systems, methods and computer program products for item categorization. A mobile communication device such as a smartphone is utilized by a consumer to acquire an image or video of a barcode or other machine readable indicia associated with an item. The image or video is processed to identify read or scan the barcode to determine corresponding numerical data or a code, which is used to identify the specific item selected by the consumer for purchase from a merchant. The identified specific item (or image or video or associated data) is transmitted from the mobile communication device to a computer hosting a financial management system, which categorizes the item and update or generates financial reports or summaries reflecting the recent categorization data. Reports or summaries such as category or item-based budget reports can be transmitted to and displayed on a screen of the mobile communication device. |
US09633382B2 |
Management apparatus and billing method thereof
A management apparatus and a billing method which calculates a billing charge by using a cumulative output amount for a target billing period. In the management apparatus and billing method a billing charge is calculated by using a cumulative output amount for a target billing period, a cumulative output amount quota having the cumulative output amount for the target billing period, and a quota unit price corresponding to the cumulative output amount quota of at least one image forming apparatus. |
US09633380B2 |
Method and system for third party brokered authentication of reciprocity of interest
A device-implemented method and multi-component system are described. The method and system enable the selection of a charity to receive donations from persons interested in one another, and further enables a subject who is the target of interest from an initiating party to confirm the sincerity of the initiating party by third party brokered transactions that quantitatively demonstrate the substantive interest of the initiator. The initiator is also able to confirm the genuine interest by his or her target recipient in that the initiator and the recipient can set minimum donation level thresholds that must be met before their identities are confirmed. |
US09633376B2 |
Systems and methods for providing meta-social graphs
Systems and methods are disclosed for providing a meta-social graph. In accordance with one implementation, a computerized method comprises collecting a plurality of different online identities of a first online user, each of the different online identities corresponding to a unique social network system. The method also includes collecting a plurality of communication data associated with the first user and determining bi-directional connections of the first user with other users from the collected communication data. In addition, the method may also include creating a meta-social graph from the determined bi-directional connections and the plurality of different online identities and generating a global identifier for the first user. The method also includes storing, in at least one memory device, the meta-social graph with at least one of the generated global identifier, the determined bi-directional connections, and the collected communication data. |
US09633371B1 |
System and method for targeting content based on identified audio and multimedia
The present disclosure relates to systems and methods that recognize audio queries and select related information to return in response to recognition of the audio queries. The technology disclosed facilitates easy designation of aggregate user experience categories and custom audio references to be recognized. It facilitates linking and returning of selected information in response to recognition of audio queries that match the designated aggregate user experience categories or custom audio references to be recognized. |
US09633367B2 |
System for creating customized web content based on user behavioral portraits
A method is provided for determining a website user behavioral portrait based on navigation on the website and dynamically reconfiguring web pages based on those portraits. In accordance with the method, data relating to the progress of a user through a website is recorded, and an ongoing behavioral portrait of the user is built based on the data. The portrait is then used to dynamically reconfigure web content. |
US09633365B1 |
Method, apparatus, and computer-readable medium for serving detailed social annotations
Methods, apparatuses, and computer-readable media for serving detailed annotations is disclosed. When a user converts in response to an advertisement, data about the conversion is stored in one or more logs. A batch handler uses the one or more logs to create and enter a record regarding the conversion into a conversion table. Upon receiving an ad request from a client, ads scorer may construct a detailed annotation using the conversion table and a social graph table, and ads server may return an ad and the detailed annotation. Ads server may also return an ad plus an iframe. The iframe requests a detailed annotation from a conversion management server. The conversion management server constructs and returns the detailed annotation. |
US09633359B2 |
Near-term data filtering, smoothing and load forecasting
Techniques for near-term data filtering, smoothing and forecasting are described herein. In one example, data is received from supervisory control and data acquisition (SCADA) measurements available in an electrical grid. The data may be filtered according to a two-stage Kalman filter, which may include a ramp rate filter test and a load level filter test. The filtered data may then be smoothed according to an augmented Savitzky-Golay filter. Within the filter, a lift multiplier may correct for bias, which may have been introduced by load changes (e.g., an early morning increase in load). In one example, the lift multiplier may be calculated as a ratio between a smoothed load from a centered Savitzky-Golay moving average and a right hand side constrained Savitzky-Golay moving average. The filtered and smoothed data may be used in forming near-term forecast(s), which may be performed by autoregressive model(s). |
US09633356B2 |
Targeted advertising for playlists based upon search queries
A facility for selecting targeted advertising messages for presentation with sets of media sequences forming playlists is described. The facility stores search queries that are used by a user to locate pre-existing playlists, to generate new playlists, or to modify existing playlists. Prior to the use of a stored playlist, or contemporaneously with the use of a stored playlist, the facility uses the stored search queries to select one or more advertising messages to be presented with the media sequences in the playlist. The advertising messages that are presented may be updated each time the playlist is accessed in order to remove advertising messages from expired campaigns, to remove advertising messages that are not having a desired marketing effect, or to add new advertising messages. |
US09633353B2 |
Method and system for using social networks to verify entity affiliations and identities
Login credentials for at least one website, such as a social networking website, are received from a user purporting to act on behalf of an entity, for example, in the context of registering the entity with a system for electronic bill payment. Social data relating to the entity is retrieved from the websites using the login credentials. The social data comprises a plurality of social connections, each reflecting a respective relationship between the entity and a respective third party. A plurality of relevant social connections comprising at least a subset of the plurality of social connections is determined, each social connection of the plurality of relevant social connections reflecting a relationship to a respective third party that is deemed to be reliable. A reliability rating of the entity is then determined based on the plurality of relevant social connections. |
US09633348B2 |
Mobile payment systems and methods
A method includes providing a first payment account that is issued by a first financial institution and enables an accountholder thereof to make payments at merchants via a closed-loop payments network corresponding to the first financial institution and mobile person-to-person payments using the payment account. The method includes enabling a second payment account that is issued by a second financial institution to be electronically linked to the first payment account and used as a source of funds. The method includes providing a mobile operating system and enabling a plurality of merchant-specific payment accounts to be associated with a mobile communications device having the operating system. The method includes determining whether a merchant-specific payment account that is accepted only by a particular merchant is available to the accountholder via the mobile communications device and receiving a fee when the first payment account is used for a purchase. |
US09633342B2 |
Gift card association with account
Embodiments of the invention are directed to systems, methods and computer program products for associating gift cards with accounts. An exemplary apparatus is configured to: receive information associated with a gift card; associate the gift card with the account; receive information associated with a transaction; determine the transaction qualifies for the gift card; and apply funds associated with the gift card to the transaction. |
US09633340B2 |
Methods and systems for mapping repair orders within a database
Methods and systems for mapping repairs orders within a database are described. Mapping a repair order can include generating a searchable data record with multiple data record fields. Each data record field can include a term located on the repair order or a standard term associated with the term on the repair order. In order to retrieve repair orders from the database, the data records can be searched using search criteria that match standard terms storable in the data record fields. Although the repair orders can be searched to find repair orders with terms that match the search criteria, the search may be carried our more efficiently (e.g., quicker) by searching the data records instead of the repair orders. One or more repairs orders can be associated with real-fix tips. Phrases of the real-fix tips can be selected automatically based, for example, or RO terms recited on the repair orders. |
US09633339B2 |
E-meeting requirement assurance for e-meeting management
Embodiments of the present invention provide a method for e-meeting requirements assurance in e-meeting management. In an embodiment of the invention, a method for e-meeting requirements assurance in e-meeting management is provided. The method includes selecting a scheduled e-meeting for an invitee in memory of a computer, retrieving resource requirements published for the selected scheduled e-meeting, inspecting local computing resources of the invitee, comparing the local computing resources to the retrieved resource requirements to identify local resource deficiencies, and generating a notice of the local resource deficiencies to the invitee prior to a scheduled date and time for the e-meeting. |
US09633337B2 |
Managing emails at an electronic mail client
A plurality of emails having a same subject are identified. An inclusion relationship among the plurality of emails is determined. A user interface at an email client end is provided. The method includes on the user interface the plurality of emails and the inclusion relationship among the plurality of emails is graphically displayed, wherein the graphically displaying of the inclusion relationship comprises identifying content that is duplicated across at least two emails within the plurality of emails. |
US09633334B2 |
Facilitating user incident reports
With a computer processor, access is obtained to a sorted global tuple list of incident types, each tuple of which includes at least an incident identifier, a corresponding incident type, a corresponding context, and a corresponding impact factor. The latter specifies importance of solving the corresponding incident type in the corresponding context. Each tuple of the global tuple list is sorted by decreasing order of impact factor. At the computer processor, context information is obtained for at least one remote computing device; based on the context information and the sorted global tuple list, the computer processor sends, over a telecommunications infrastructure, data which causes an incident reporting display on the remote computing device to be re-ordered in accordance with the impact factors as they are ranked in accordance with the context information for the at least one remote computing device. |
US09633331B2 |
Nearest known person directory function
A system for matching nearest contacts in a logical contact hierarchy can include a logical contact hierarchy disposed in a database; and, a hierarchical query processor coupled to the logical contact hierarchy. The hierarchical query processor can be configured to produce a closest matching contact from among contacts in the logical contact hierarchy based upon a specified anchor contact in the logical contact hierarchy. A boolean operator further can be programmed to select a closest matching contact based upon a boolean expression operating upon multiple closest matching contacts produced by the hierarchical query processor. |
US09633328B2 |
Imputed probabilistic product location based on shopper path and transaction log data
Systems and methods for imputing the location of a product in a shopping environment are provided to address the above discussed problems. One example system disclosed herein includes a sensor system configured to track paths for a plurality of shoppers in a shopping environment. The system may further include a data analyzer computing device configured to receive signal data from the sensor system and transaction data from a point of sale system in the shopping environment. The transaction data may indicate the products purchased by the shopper in the shopping environment. The signal data may be matched to corresponding transaction data for the same shopping path. The system may impute one or more product locations of products in the transaction data associated with multiple shopper paths. The imputed product locations may be represented in a probability map, or used to make corrections to a preexisting planogram. |
US09633327B2 |
Sensor zone management
Systems, methods, and computer program products are provided for tracking one or more items. In one exemplary embodiment, there is provided a method for tracking an item. The method may include periodically detecting sensor information of an item by a sensor device. The method may also include periodically transmitting the sensor information by the sensor device. The method may also include receiving the sensor information at a tracking center, storing the sensor information in a database, and reviewing the stored sensor information. The method may further include using the stored sensor information to update shipment information for a package. |
US09633326B2 |
Load distribution and consolidation tracking system
Through various embodiments, a traceability system may comprise a first tracking device configured to receive a pre-generated session identification number, wherein the pre-generated session identification number is assigned to a first load and a MAC address of the device. The device is further configured to initialize one or more environmental sensors of the device and generate, through the one or more environmental sensors, environmental data pertaining to one or more factors of an environment surrounding the device. The device is additionally configured to execute a propagation query to generate a second session identification number adapted from the pre-generated session identification number, the second session identification number being related to a second load derived from the first load. |
US09633320B2 |
Energy demand prediction apparatus and method
An energy demand prediction apparatus according to an embodiment includes an image analysis unit and a prediction unit. The image analysis unit generates analysis data including at least one of human information and environment information of a prediction target area based on image data acquired by an image sensor. The prediction unit generates prediction data by executing an energy demand prediction based on the analysis data and an energy demand prediction model generated using previous data corresponding to the analysis data. |
US09633317B2 |
Dynamically evolving cognitive architecture system based on a natural language intent interpreter
A dynamically evolving cognitive architecture system based on a natural language intent interpreter is described. A system forms an intent based on a user input, and creates a plan based on the intent. The plan includes a first action object that transforms a first concept object associated with the intent into a second concept object and also includes a second action object that transforms the second concept object into a third concept object associated with a goal of the intent. The first action object and the second action object are selected from multiple action objects. The system executes the plan, and outputs a value associated with the third concept object. |
US09633314B2 |
Multi-qubit coupling structure
A quantum qubit coupling structure is provided. The quantum qubit coupling structure includes a plurality of qubits and a variable capacitor electrically connected between the plurality of qubits to vary coupling constants of the plurality of qubits. |
US09633306B2 |
Method and system for approximating deep neural networks for anatomical object detection
A method and system for approximating a deep neural network for anatomical object detection is discloses. A deep neural network is trained to detect an anatomical object in medical images. An approximation of the trained deep neural network is calculated that reduces the computational complexity of the trained deep neural network. The anatomical object is detected in an input medical image of a patient using the approximation of the trained deep neural network. |
US09633305B2 |
Antenna device and wireless communication terminal
An antenna device includes an antenna coil member and an extension member. The antenna coil member includes a first base, and a spiral conductor is on a front surface of the first base. An inner-peripheral-end conductor is connected to an inner peripheral end of the spiral conductor, and an outer-peripheral-end conductor is connected to an outer peripheral end. The extension member includes a second base, and first and second extension conductor patterns are located on a front surface of the second base. First and second end-portion conductors are respectively connected to ends of the first and second extension conductor patterns. The extension member is arranged at a front surface side of the antenna coil member, the inner-peripheral-end conductor faces the first end-portion conductor, and the outer-peripheral-end conductor faces the second end-portion conductor. |
US09633300B2 |
Apparatus having communication means and a receiving member for a chip card
The invention relates to an apparatus (100) which comprises a receiving member (110) configured to receive a chip card (200). The chip card (200) is configured for contactless communication with a first hardware interface (311). The apparatus (100) further comprises communication means (120) configured to enable contactless communication with a second hardware interface (321), wherein the first hardware interface (311) and the second hardware interface (321) are hardware interfaces of different types. The communication means (120) are configured to enable a communication of the communication means (120) with the chip card (200) when the chip card (200) is received in the receiving member (110). |
US09633297B2 |
IC module, IC card, and IC module substrate
Provided are an IC module, an IC card, and an IC module substrate that can reduce the manufacturing cost without degrading the external appearance of a contact terminal. An IC module includes a contact terminal (10) provided on a front surface (1a) of a base member (1) and having a contact surface, for contact with an external terminal, formed of a gold plating layer (14); an IC chip (55) attached to a back surface (1b) of the base member (1); a conductive member (a wire (60), a first conductive layer (20), and a second conductive layer (30)) connecting the IC chip (55) and the contact terminal (10) to each other through a through hole (3) opened at the front surface (1a) and the back surface (1b) of the base member (1); and an insulating surface material (40) partially covering the front surface (1a). At least a part of a region, overlapping the IC chip (55) in plan view, of the front surface (1a) is set as a non-forming region where a noble metal plating layer is not formed, and the surface material (40) is disposed in the non-forming region. |
US09633292B2 |
Printing apparatus, printing method, and non-transitory recording medium
According to one embodiment, a printing apparatus includes a conveying unit, a printing unit, a display unit, and a control unit. The conveying unit conveys a sheet. The printing unit prints an image on the sheet conveyed by the conveying unit. The display unit performs display for causing a user to select necessity of re-printing on the sheet on which the image is printed. The control unit controls, if the necessity of the re-printing of the sheet is selected, the conveying unit to back-feed the sheet and controls the printing unit to perform re-printing after the back-feed of the sheet is completed. |
US09633289B1 |
Power consumption in laser printing
A method for minimizing power consumption of a laser printer includes receiving page description language (PDL) data corresponding to a printing task, identifying commands corresponding to the received PDL data, computing a total predicted rendering time corresponding to the identified commands, computing a print deferral time according to the total predicted rendering time wherein the print deferral time corresponds to an amount of time by which printing drum initialization can be deferred without delaying completion of the printing task, and configuring a printing drum to begin operation according to the print deferral time. A computer program product and computer system corresponding to the method are also disclosed. |
US09633275B2 |
Pixel-level based micro-feature extraction
Techniques are disclosed for extracting micro-features at a pixel-level based on characteristics of one or more images. Importantly, the extraction is unsupervised, i.e., performed independent of any training data that defines particular objects, allowing a behavior-recognition system to forgo a training phase and for object classification to proceed without being constrained by specific object definitions. A micro-feature extractor that does not require training data is adaptive and self-trains while performing the extraction. The extracted micro-features are represented as a micro-feature vector that may be input to a micro-classifier which groups objects into object type clusters based on the micro-feature vectors. |
US09633274B2 |
Method and system for denoising images using deep Gaussian conditional random field network
A sensor acquires an input image X of a scene. The image includes noise with a variance σ2. A deep Gaussian conditional random field (GCRF) network is applied to the input image to produce an output image Y, where the output image is denoised, and wherein the deep GCRF includes a prior generation (PgNet) network followed by an inference network (InfNet), wherein the PgNet produces patch covariance priors Σij for patches centered on every pixel (i,j) in the input image, and wherein the InfNet is applied to the patch covariance priors and the input image to solve the GCRF. |
US09633266B2 |
Image processing apparatus and method that synthesizes an all-round image of a vehicle's surroundings
An image processing apparatus synthesize a synthesized image by taking pixel values of pixels in a synthesized image corresponding to each point on the three dimensional projection plane as viewed from a specific viewpoint position, as pixel values of corresponding pixels of the first image based on the first correspondence relationship, and taking pixel values of each pixel in the synthesized image corresponding to pixels identified in the first image as being pixels representing a solid object, as pixel values of corresponding pixels of the second image based on the second correspondence relationship. |
US09633265B2 |
Method for improving tracking in crowded situations using rival compensation
A method for tracking objects across a number of image frames includes tracking objects in the frames based on appearance models of each foreground region corresponding to each of the objects and determining if a plurality of the tracked objects overlap. Where a plurality of the tracked objects overlap, the method creates compensated appearance models for each of the plurality of overlapping objects by attenuating common appearance features among the corresponding appearance models; and tracks the plurality of overlapping objects based on the created compensated appearance models. |
US09633263B2 |
Appearance modeling for object re-identification using weighted brightness transfer functions
An approach for re-identifying an object in a first test image is presented. Brightness transfer functions (BTFs) between respective pairs of training images are determined. Respective similarity measures are determined between the first test image and each of the training images captured by the first camera (first training images). A weighted brightness transfer function (WBTF) is determined by combining the BTFs weighted by weights of the first training images. The weights are based on the similarity measures. The first test image is transformed by the WBTF to better match one of the training images captured by the second camera. Another test image, captured by the second camera, is identified because it is closer in appearance to the transformed test image than other test images captured by the second camera. An object in the identified test image is a re-identification of the object in the first test image. |
US09633262B2 |
Content interruption point identification accuracy and efficiency
Automated content interruption point identification improves the accuracy with which potential content interruption points are identified, and increases the efficiency of content interruption point identification and content distribution. Potential interruption points are automatically identified based on transitions occurring within the content, including changes in the sound level, changes in the light, or brightness, level, changes in people visible in a scene of the content, transitions that are identified by content metadata, and other types of transitions. In providing content to a content consumer, a determination is made whether to interrupt the provision of the content, at one or more of the identified potential content interruption points, based on factors including interruption point metadata, metadata associated with auxiliary content that would be inserted, and user information, which includes explicitly specified user settings, as well as detected user information. |
US09633256B2 |
Methods and systems for efficient automated symbol recognition using multiple clusters of symbol patterns
The current document is directed to methods and systems for identifying symbols corresponding to symbol images in a scanned-document image or other text-containing image, with the symbols corresponding to Chinese or Japanese characters, to Korean morpho-syllabic blocks, or to symbols of other languages that use a large number of symbols for writing and printing. In one implementation, the methods and systems to which the current document is directed carry out an initial processing step on one or more scanned images to identify, for each symbol image within a scanned document, a set of graphemes that match, with high frequency, symbol patterns that, in turn, match the symbol image. The set of graphemes identified for a symbol image is associated with the symbol image as a set of candidate graphemes for the symbol image. The set of candidate graphemes are then used, in one or more subsequent steps, to associate each symbol image with a most likely corresponding symbol code. |
US09633254B2 |
Intelligent motion capture element
Intelligent motion capture element that includes sensor personalities that optimize the sensor for specific movements and/or pieces of equipment and/or clothing and may be retrofitted onto existing equipment or interchanged therebetween and automatically detected for example to switch personalities. May be used for low power applications and accurate data capture for use in healthcare compliance, sporting, gaming, military, virtual reality, industrial, retail loss tracking, security, baby and elderly monitoring and other applications for example obtained from a motion capture element and relayed to a database via a mobile phone. System obtains data from motion capture elements, analyzes data and stores data in database for use in these applications and/or data mining. Enables unique displays associated with the user, such as 3D overlays onto images of the user to visually depict the captured motion data. Enables performance related equipment fitting and purchase. Includes active and passive identifier capabilities. |
US09633251B2 |
Facial identification method, facial identification apparatus and computer program for executing the method
A facial identification method includes changing an image size for facial identification, converting the image of changed size to an LBP domain, and detecting a face through scanning across the converted image. At least one or more of steps of converting and scanning is executed by a plurality of processing units. |
US09633249B2 |
Face detection in an image data stream using skin colour patch constructs
A data processing system for performing face detection on a stream of frames of image data, the data processing system comprising: a skin patch identifier configured to identify one or more patches of skin color in a first frame and characterize each patch in the first frame using a respective patch construct of a predefined shape; a first search tile generator configured to generate one or more first search tiles from the one or more patch constructs; and a face detector configured to detect faces in the stream by performing face detection in one or more frames of the stream within the first search tiles. |
US09633247B2 |
Electronic device with shared near field communications and sensor structures
An electronic device may have electrical components such as sensors. A sensor may have sensor circuitry that gathers sensor data using a conductive structure. The sensor may be a touch sensor that uses the conductive structure to form a capacitive touch sensor electrode or may be a fingerprint sensor that uses the conductive structure with a fingerprint electrode array to handle fingerprint sensor signals. Near field communications circuitry may be included in an electronic device. When operated in a sensor mode, the sensor circuitry may use the conductive structure to gather a fingerprint or other sensor data. When operated in near field communications mode, the near field communications circuitry can use the conductive structure to transmit and receive capacitively coupled or inductively coupled near field communications signals. A fingerprint sensor may have optical structures that communicate with external equipment. |
US09633237B2 |
System and method for tracking usage of items at a work site
A method tracks usage of items stored in containers. To perform the method, a sensor in a mobile electronic device receives data identifying a type of item stored in a container and a number of the type of item present in the container from a tag associated with the container. A user interface in the mobile electronic device generates a prompt requesting entry of a count of the items removed from the container. The sensor in the mobile electronic device generates a revised number of the items stored in the container and stores the revised number in the tag. |
US09633232B2 |
System and method for encrypting secondary copies of data
A system and method for encrypting secondary copies of data is described. In some examples, the system encrypts a secondary copy of data after the secondary copy is created. In some examples, the system looks to information about a data storage system, and determines when and where to encrypt data based on the information. |
US09633229B2 |
Semiconductor device module, license setting method and medium having license setting program recorded therein
A semiconductor device module according to embodiments includes a specific information storage unit configured to store individual identification information and class information, a control unit configured to perform authentication processing of maintenance information with signature signed using the class information, generate license information with signature signed using the individual identification information, the license information being based on the maintenance information, and store the license information with signature in a non-volatile memory, and a register to which a setting value based on the license information is set by the control unit. |
US09633228B1 |
Verifiable media system and method
A system and method for creating and retrieving verifiable media and in particular, such a system and method in which the circumstances related to the media are encapsulated along with the media to guarantee its authenticity. |
US09633227B2 |
Method, apparatus, and system of detecting unauthorized data modification
Methods, apparatus and system of detecting data security are provided herein. Data for detection are acquired. Whether the data for detection are to be updated for a first time is determined. When the data for detection are to be updated for the first time, the data for detection can be updated, encrypted, and stored as first encrypted data. When the data for detection are not to be updated for the first time, the data for detection can be acquired and encrypted to provide second encrypted data. The second encrypted data are compared with the stored first encrypted data to determine whether the second encrypted data having been unauthorizedly modified. The present disclosure is simple to be implemented without relying on specific logical of a certain application. Development costs, maintenance costs and occupancy of server resources can be reduced. System performance and user experience can be improved. |
US09633226B2 |
Systems and methods for managing authority designation and event handling for hierarchical graphical user interfaces
Prior art attempts to manage authority designation in GUI-based computer systems have set up various “handshaking” schemes between a graphics management system, such as a window server, and the various processes that are attempting to offer and accept access to each other. However, these schemes have certain limitations. In particular, when windows are used as the “fundamental basis” for implementing authority designation, events that should treat all content within a window identically can't do so because, even though all content in the window may appear to be “owned” by the window, there may be some other process that is actually rendering the content to some portion of the window. Thus, described herein are systems and methods to manage authority designation and event handling within “hierarchical” GUIs using “handshaking” schemes that are secure, sub-window granular, and that generalize recursively when applied to the various graphical layers used to construct the windows. |
US09633225B2 |
Portable terminal and method for controlling provision of data
A portable terminal and a method for controlling the provision of data are provided. The method includes analyzing information received or generated in response to an event; selecting a module that provides the analyzed information to a user of the portable terminal; and configuring data including the analyzed information, anthropomorphizes the configured data and providing the anthropomorphized data, through the selected module to the user. |
US09633222B2 |
Social network publication system
A method and system providing a Social Network Publication System (SNPS). Users create publications using cards. Catalog cards hold other cards and are used to build multi-layer publications. Function cards hold substantive content and interactive modules. Users customize permissions for their cards to control how their publications are interacted with and shared by other users. Users can search publications using filters. The streamlined editing system is based on nested cards. Users can become followers and watchers of other user and publications. |
US09633212B2 |
Intelligent key selection and generation
A method, computer program product, and system for selecting and generating a key to perform a cryptographic operation are described. The method includes receiving one or more inputs representing criteria for the key, the one or more inputs excluding an explicit identification of the key and one of the one or more inputs specifying the cryptographic operation; retrieving, from a memory device, information corresponding with the one or more inputs; selecting and generating the key based on the one or more inputs and the information; and performing the cryptographic operation using the key. |
US09633204B2 |
Method and system for log aggregation
Systems and methods for aggregating one or more log records are provided. An example method includes receiving an indication that a request has been completed. The method also includes aggregating, at the log aggregator, log records that were created based on processing the request. The log records include a unique identifier associated with the request. The method further includes sending the aggregated log records to the log client. |
US09633201B1 |
Methods and systems for fraud containment
Systems and methods for fraud containment are provided in accordance with an embodiment of the invention. A fraud event may be detected. One or more devices that may be used in perpetrating the fraud event may be detected. Additionally one or more potential fraud victims, who may be grouped into victim circles may be detected. The threat level to the victims and/or victim circles may be assessed. In some instances, behavioral profiles may be utilized to make fraud assessments. Based on the threat level, recommendations for fraud containment responses may be provided. |
US09633199B2 |
Using a declaration of security requirements to determine whether to permit application operations
Provided are a computer program product, system, and method for using a declaration of security requirements to determine whether to permit application operations. A declaration of security requirements indicates actions the application designates to perform with respect to resources in a computer system, wherein a plurality of the indicated actions are indicated for at least two operation modes of the application. A detection is made of whether the application is requesting to perform a requested action with respect to a requested resource in the computer system. A determination is made of a current operation mode of the application comprising one of the at least two operation modes in response to detecting that the application is requesting the requested action. A determination is made as to whether the declaration of security requirements indicates the requested action with the current operation mode. The requested action with respect to the requested resource is allowed to proceed in response to determining that the declaration of security requirements indicates the requested action with respect to the requested resource as indicated with the current operation mode. |
US09633198B2 |
Detecting anomalous process behavior
A method for learning a process behavior model based on a process past instances and on one or more process attributes, and a method for detecting an anomalous process using the corresponding process behavior model. |
US09633194B2 |
Authentication system, electronic apparatus and authentication method
Disclosed is an authentication system including: an electronic apparatus; and a remote operating device to remotely operate the electronic apparatus, wherein the electronic apparatus comprises a main controller to control the electronic apparatus and a sub-controller to control the electronic apparatus independently from the main controller; and wherein in case that the remote operating device accesses to the electronic apparatus, after the main controller carries out a first user authentication, the sub-controller carries out a second user authentication. |
US09633192B2 |
Systems and methods for providing a one-time authorization
Systems and methods for presenting a request are disclosed. The systems and methods may include one or more steps, such as receiving, by an electronic device, request information from an entity. The request information may include a request for approval by a user. The steps may further include transmitting, by the electronic device, data containing the request information to a computing device, receiving, by the electronic device, a symbology corresponding to the request information from the computing device and presenting, by the electronic device, the symbology to the user. |
US09633184B2 |
Dynamic authorization
Systems and techniques are provided for dynamic authorization. A signal may be received from a sensor. A concept may be determined from the signal. The concept may be a location of a computing device, an action being performed with the computing device, an identity of a user of the computing device, or a temporal context for the computing device. A current pattern may be determined from the concept. The current pattern may be matched to a stored pattern. The stored pattern may be associated with a security outcome. The security outcome may be sent to be implemented. A security message may displayed indicating the security outcome and part of the stored pattern that was matched to the current pattern. The security outcome may be causing presentation of an authentication prompt or not causing presentation of an authentication prompt. |
US09633182B2 |
Token based digital content licensing method
A method and apparatus for weighted leveling license unit based digital content access control are disclosed. Weighted leveling license unit based digital content access control may include enabling access to a first digital content object by a first user device associated with a first unique user identifier, receiving a request for access to a second digital content object, wherein the request indicates the first unique user identifier, identifying a weighted leveling licensing weight, and, on a condition that a product of the weighted leveling licensing weight and a sum of an assigned unit count for the first digital content object and an assigned unit count for the second digital content object is within a cardinality of a plurality of available license units, enabling access to the second digital content object by the first user device. |
US09633180B2 |
Processing system with register arbitration and methods for use therewith
A processing system includes a memory module that includes a register space for storing a plurality of register data in a plurality of registers and secure access data corresponding to the register space. A register arbitration module operates to receive a request to access one of the registers from a client module; retrieve secure access data corresponding to the client to determine if the client is trusted; and to grant the request to access the register if the client is trusted. If the client is not trusted, the register arbitration module retrieves secure access data to determine if the register is non-secured for the client. The register arbitration module grants the request to access the register when the register is non-secured for the client. |
US09633171B2 |
Predicting neonatal hyperbilirubinemia
A multi-variable statistical predictive leading-indicator approach is employed for identifying newborns at risk of clinically significant hyperbilirubinemia and for determining to administer interventions to at-risk newborns. In embodiments, a multi-variable logistic regression statistical model capable of calculating a probability of clinically significant hyperbilirubinemia is generated. Using an input data set for a newborn and the multi-variable logistic regression statistical model, a probability of clinically significant hyperbilirubinemia is determined for the newborn and presented to a clinician. |
US09633164B2 |
System and method for signal integrity waveform decomposition analysis
A system and method of analyzing signal performance of a hardware system includes dividing a simulation of the hardware system into a chain of blocks, identifying resonant loops between pairs of blocks in the chain of blocks, determining a loop response for each of the identified resonant loops, and determining an impact of each loop response on a performance of the system. |
US09633163B1 |
System and method for displaying routing options in an electronic design
The present disclosure relates to a computer-implemented method for electronic design automation. The method may include providing, using one or more processors, an electronic design and visually displaying a plurality of possible route sets associated with the electronic design at a graphical user interface. The method may include providing an option to select between the plurality of possible route sets at the graphical user interface. |
US09633159B1 |
Method and system for performing distributed timing signoff and optimization
Disclosed is an improved approach to implement timing signoff and optimization. Integrated MMMC timing closure functionality is provided in a single software session. The system provides the capability to perform signoff analysis, debugging, ECO, and TSO optimization for a large number of MMMC views in single software session. |
US09633158B1 |
Selectable reconfiguration for dynamically reconfigurable IP cores
Systems and methods for reconfiguration of a hardened intellectual property (IP) block in an integrated circuit (IC) device are provided. Reconfiguration of the hardened IP block in the IC device may transition between functions supported by the hardened IP block. A transition may occur as a pre-configured profile is selected to reconfigure the hardened IP block. Further, configuration data associated with each of the pre-configured profiles of the hardened IP block may be generated and storage space to store the configuration data may be created. Additionally, reconfiguration control logic to read and implement the configuration data in hard IP design primitives may also be generated. |
US09633155B1 |
Circuit modification
Techniques for modifying a circuit are described herein. In some examples, a method includes generating a set of testing data and detecting a predetermined modification to a translation path corresponding to a memory address mapping, the predetermined modification to change a physical memory address of the testing data associated with a virtual memory address to a second physical memory address of the testing data. The method can also include generating a test template comprising a first instruction to implement the predetermined modification and a second instruction comprising the second physical memory address in the translation path and transmitting the test template to the circuit for each of a plurality of software instruction threads. Furthermore, the method can include detecting a defect in the execution of the test template by the circuit and modifying the circuit to prevent the defect during execution of the test template. |
US09633143B2 |
Process and apparatus for generating a three-dimensional swept envelope of a vehicle
A method, apparatus, media and signals for generating a computer representation of a three-dimensional swept envelope of a vehicle having a wheeled chassis operable to support a vehicle body for movement along a terrain is disclosed. The method involves receiving terrain data representing a 3D terrain, receiving data defining parameters of the vehicle, and receiving data defining a path for movement of the vehicle from an initial position on the terrain to a displaced position on the terrain. The method also involves disposing a computer representation of the vehicle on the 3D representation of the terrain at successive locations along the path using the parameters. Disposing involves determining points of engagement between wheels of the wheeled chassis and the 3D representation of the terrain to dispose the chassis with respect to the terrain, and determining a corresponding 3D location of the vehicle body with respect to the terrain. The method further involves generating a plurality of spatial extents of the vehicle at the successive locations, the spatial extents defining the 3D swept envelope of the vehicle when moving between the initial position and the displaced position. In another aspect a method for generating a computer representation of a three-dimensional swept envelope of an object moving along a guideway disposed with respect to a 3D representation of a terrain is disclosed. |
US09633141B2 |
Systems and methods for electronic stress analysis comparison
Electronic comparison methods are described for determining changes in a current design model with respect to an earlier model and analyzing the impact of the identified changes. The method includes associating a priority value with a set of modified component objects using one or more algorithms and presenting a subset of the set of component objects, each of which has a priority value greater than a threshold value. |
US09633139B2 |
Methods and systems for search indexing
The present invention provides for quick and efficient searching. One embodiment includes a first instruction configured to read at least a first search string and a second search string entered into a same first search field, and a second instruction configured to incrementally filter search results to locate at least a first document that has a least a first word that begins with the first string and a second word that begins with the second string. |
US09633137B2 |
Managing questioning in a question and answer system
A system, a method, and a computer program product for managing questioning in a Question and Answering (QA) system are disclosed. An input question received by the QA system is analyzed to determine the set of answer-types. A set of answer-types is determined. Prompting for clarifying data associated with the input question happens. A set of candidate answers of the answer-type is determined. The clarifying data is used to determine the set of candidate answers. At least one candidate answer of the set of candidate answers of the answer-type is provided. |
US09633133B2 |
Web server for multi-version web documents
A repository server that provides stored copies of Web-accessible documents A client of the repository server may register a document in the repository server. The repository server makes a copy of the registered document and returns a repository URL for the copy to the client. The repository URL may be used to fetch the copy from the repository URL. Registration further relates the stored copy to its document URL, to an identifier for the stored copy, to a fingerprint that is a condensed representation of the stored copy's content and can be used to determine degrees of similarity other than match-no match, and to a set of stored copies having similar content. The fingerprints are used to compute similarity. The similarity computation further employs comparisons of links in the documents and of document URLS to determine whether it is necessary to use the fingerprints to compute similarity. |
US09633128B2 |
Lightweight web page generation
A system and method for rendering web pages is presented. A request identifying a domain name and a web page is received by at least one server communicatively coupled to a network. A TXT record associated with the domain name is then retrieved by the at least one server and the TXT record is analyzed to identify one or more settings associated with the domain name or the web page. The web page is then rendered in accordance with the one or more settings into a rendered web page by the at least one server. Finally, the rendered web page is transmitted to a computer system using the network. |
US09633127B2 |
Deploying programs in a cluster node
A dependency between a program to be deployed in a node in a cluster and other programs to be deployed in the cluster is obtained by one or more processors, which also obtain an IP address and connection information of a sub/pub server. A client computer connects to the sub/pub server, and subscribes to the sub/pub server for a message describing other programs on which the program is dependent. In response to obtaining the message of other programs on which the program is dependent from the sub/pub server, the program is deployed. |
US09633126B2 |
Method and system for synchronizing browser bookmarks
Methods and systems for synchronizing browser bookmarks are provided herein. In an exemplary method, a server can receive a bookmark collection sent by a first terminal browser. The bookmark collection can contain one or more bookmarks. The server can push the bookmark collection to a second terminal browser for the second terminal browser to simultaneously add the one or more bookmarks contained in the bookmark collection as bookmarks of the second terminal browser. |
US09633125B1 |
System, method, and computer program for enabling a user to synchronize, manage, and share folders across a plurality of client devices and a synchronization server
A system, method, and computer program are provided for enabling a user to synchronize, manage, and share files and folders across a plurality of client devices and a synchronization server. In a user interface, a first view displays all folders, which a user has synchronized to the synchronization server and a drop-target zone to which the user is able to drag a folder from the local device to synchronize the folder with the synchronization server. A second view displays all files and folders, which the user has shared with other users. A third view displays a list of user contacts, where each contact is a drop-target zone on which a user is able to drag a folder to share the folder with the contact. A fourth view is provided in which a user is able to see activity related to a folder displayed in the first view. |
US09633122B2 |
Systems and methods for web site customization based on time-of-day
Systems and methods are provided for delivering customized versions of web pages to users. In one implementation, a method is provided for customizing a delivered version of a web page to reflect a current time-of-day at a geographic location of the user. According to the method, a request for a web page is received from a client device of the user. The request for the web page includes an IP address of the client device. Based on the IP address, a current time is determined for the received request. Thereafter, a version of the requested web page corresponding to the current time is generated, and the generated version of the requested web page is delivered to the client device. |
US09633115B2 |
Analyzing a query and provisioning data to analytics
A user interface is generated that displays a set of selectable terms from a glossary of business terms and is configured to generate a business metadata query that identifies a forum with member profiles. A data movement executable is generated that identifies the forum and an analytical processing environment. The data movement executable is deployed and data is moved from the forum into the analytical processing environment. Analytics are performed on the data from the forum. Metadata is identified from the analytics. The glossary of business terms is updated using the metadata from the analytics. |
US09633113B2 |
Socializing via search
Implementations of methods, apparatuses, or systems are disclosed to facilitate search related communications. In at least one implementation, a method may include processing search queries based at least in part on one or more search query parameters to identify candidate search queries for an exchange of related communications, wherein candidate search queries originate from different special purpose computing system resources and/or different users. |
US09633102B2 |
Managing passthru connections on an operator graph
Embodiments of the disclosure provide a method, system, and computer program product for processing data such as a stream of tuples. Each tuple can contain one or more attributes. The method can include processing the attributes of the stream of tuples using stream operators operating on one or more computer processors and corresponding to one or more processing elements. The method can also include detecting an indicative element from a plurality of stream operators. The method can also include transmitting, in response to detecting the indicative element, a passthru command to a processing element corresponding to the indicative element. The method can also include altering, in response to receiving the passthru command at the processing element, a portion of attribute processing for the indicative element. |
US09633101B2 |
System, method and computer program product for portal user data access in a multi-tenant on-demand database system
In accordance with embodiments, there are provided mechanisms and methods for portal user data access in a multi-tenant on-demand database system. These mechanisms and methods for portal user data access in a multi-tenant on-demand database system can enable embodiments to provide portal-specific user accounts to the multi-tenant on-demand database system which have reduced configuration requirements than users directly accessing the multi-tenant on-demand database system. The ability of embodiments to provide portal-specific user accounts can reduce processing requirements of the database system. |
US09633097B2 |
Method and apparatus for record pivoting to accelerate processing of data fields
Various methods and apparatuses are described for performing high speed translations of data. In an example embodiment, record layout detection can be performed for data. In another example embodiment, data pivoting prior to field-specific data processing can be performed. |
US09633096B2 |
Targeted multi-dimension data extraction for real-time analysis
Methods and systems for extracting targeted data for real-time reporting are discussed. In an example, a system can include a data store, a server, and a denormalized database. The data store can maintain data created by an application. The server can be communicatively coupled to the data store. The server can include a data extraction module and a data compression module. The data extraction module can extract a subset of the data stored in the data store according to an extraction scheme. The data compression module can compress the extracted subset of the data into a set of aggregated key value pairs. The denormalized database can store the aggregated key value pairs. |
US09633091B2 |
Computer systems and methods for the query and visualization multidimensional databases
A method of generating a data visualization is performed at a computer having a display, one or more processors, and memory. The memory stores one or more programs for execution by the one or more processors. The process receives user specification of a plurality of characteristics of a data visualization. The data visualization is based on data from a multidimensional database. The characteristics specify at least x-position and y-position of data marks corresponding to tuples of data retrieved from the database. The process generates a data visualization according to the specified plurality of characteristics. The data visualization has an x-axis defined based on data for one or more first fields from the database that specify x-position of the data marks and the data visualization has a y-axis defined based on data for one or more second fields from the database that specify y-position of the data marks. |
US09633087B2 |
Systems and/or methods for capability-aware dynamic distributed event processing
In a system including processing resources and a capability repository, a first processing resource: receives event streams from operating contexts; identifies, based upon the received event streams, a dynamically changing condition in a first one of the operating contexts; automatically decomposes, using the repository, a complex event processing query to effect a change responsive to the identified dynamically changing condition in the first one of the operating contexts; causes the first one of the operating contexts to effect the change based upon the decomposed query; and effects a related change to operation of the first processing resource that corresponds to the change caused to the first one of the operating contexts. The repository stores information regarding event sources that transmit events to the processing resources, and the operating contexts. Each operating context is associated with a respective group of event sources and with at least one of the processing resources. |
US09633084B2 |
Information searching method and device, and computer storage medium
It is described an information searching method and device and a computer storage medium, which belong to the field of computers. The method includes that: a keyword for search input by a user is acquired, and user information of the user is acquired as well; and search is performed according to the keyword and the user information to obtain searched-out information that matches the keyword o and is relevant to the user information. The device includes an acquiring module and a searching module. The computer storage medium stores a computer program for executing the method. With the method, it is possible to perform search according to the acquired keyword and the user information to obtain searched-out information that matches the keyword and is relevant to the user information. The information obtained with the searching method described herein is highly relevant to the user, thereby enhancing the relevance between the searched-out information and the user. |
US09633083B2 |
Organizing search results using smart tag inferences
An aspect provides a method, including: accessing a tagging profile based on a store of historical user object information; determining, using the processor, a current user object search has been made by a user; determining, using the processor, a priority smart tag for providing results for the current user object search based on the tagging profile; and providing the results of the current user object search according to the priority tag determined. Other aspects are described and claimed. |
US09633080B2 |
Hierarchical entity information for search
A fast browsing architecture for exploring hierarchical lists of entities through a search user interface. A graphical UI operates to handle the hierarchical lists and sub-lists in different ways for different scenarios such as a hierarchical level is zero (only one list of entities associated with a query and the list cannot be further drilled down), a second scenario where the hierarchical level is one (a list of entities associated with the query and these entities can be further drilled down to a number of sub-lists) and the sub-lists cannot be further drilled down, and a third scenario where the hierarchical level is more than one (a list of entities associated with the query and these entities can be further drilled down to a number of sub-lists), sub-lists can be further drilled down to a number of lists, until there are no more drill down lists to be found. |
US09633077B2 |
Query of multiple unjoined views
A system includes identification of two or more information models of a database schema, where each of the two or more information models includes a plurality of dimensions and a respective measure, and is not joined to any other of the two or more information models, generation, for each of the two or more information models, of an auto join on a dimension included in the information model, reception of an object-based query including one or more objects of the two or more information models, generation of one structured language query for each of the two or more information models, obtaining of a result set for each of the two or more structured language queries, and aggregation of the result sets into an aggregated result set. |
US09633075B2 |
Framework for re-writing database queries
Embodiments relate to re-writing database query plans, and visualizing such re-written query plans. A query re-write framework includes a query normalization engine in communication with a rule catalog comprising query re-write rules in the form of rule classes. The framework receives as input, a query plan graph to be re-written. Based upon the engine's application of re-write rules from the catalog, the framework produces a re-written query plan graph as output. An interface component of the framework may provide a visualization of the re-written query plan graph as part of a dashboard. A user may access the framework to enable/disable existing rules in the catalog, add new rules to the catalog, and/or control a sequence and a precedence in which rules are applied to re-write the query plan. A user may interact with the visualization of the re-written query plan for purposes of de-bugging, re-write optimization, and/or query development. |
US09633073B1 |
Distributed data store for hierarchical data
A computing resource service provider may store user data in a distributed data storage system. The distributed data storage system may contain one or more storage nodes configured to store hierarchical data in one or more data stores such as a column data store. Data in the data stores may be compressed or otherwise encoded, by a storage optimizer, in order to reduce that redundancy in the hierarchical data stored in the one or more data stores. Responses to user queries may be fulfilled based at least in part on data stored in the one or more data stores. A query processor may scan multiple different data stores across various storage nodes in order to obtain items responsive to the user query. |
US09633071B1 |
System and method for modeling a search query
A computer method and system for providing information results in response to a natural language information request. The system and method include receiving a natural language information request from a user and compiling a computer executable query from the natural language information request from a user wherein the query is formatted to extract data from one or more computer databases. The query is then presented to the user prior to execution of the query so as to enable the user to change the query prior to its execution. The query is then executed to extract data from one or more computer databases whereby extracted data is presented to the user in a certain presentation format. |
US09633070B2 |
Increase database performance by reducing required communications and information transfers
According to embodiments of the present invention, one or more computer processors determine that a predetermined workload threshold associated with an invalidated object is not exceeded and transmits an invalidation command associated with the invalidated object to the owner of the invalidated object. The one or more computer processors instruct the modifier of the invalidated object to retain possession of a first lock on the object beyond the transaction. The one or more computer processors determine that a usage pattern associated with the invalidated object matches a predetermined usage pattern for selecting a lock that can be retained beyond an associated transaction and transmits a second lock a requestor. The one or more computer processors instruct the modifier to release possession of the first lock to the owner and transmit a first image of the current version of the invalidated object to the owner for subsequent transmission to the requestor. |
US09633068B2 |
Synchronizing local and remote data
Aspects of the subject matter described herein relate to synchronizing data. In aspects, properties are synchronized from an organization property store to a cloud property store and/or vice versa. The list of properties to synchronize may change based on the cloud services to which the organization subscribes, changes to the cloud services, or for other reasons. Furthermore, the list of properties to synchronize may be limited to certain objects of the organization which may also change over time. |
US09633067B2 |
Gold data set automation
Creation and maintenance of preferred or “gold” data sets are automated using objective, predefined rules or filters. The rules may be applied as part of a data publication workflow when new data becomes available in a database. The rules govern the type of data to be included in a gold data set, the currency of the data, the quality of the data, and the naming of the data. This helps reduce the amount of work required by users to create gold data sets and also ensures that the gold data set are up-to-date and high-value. The disclosed approach is particularly suited for use with data from hydrocarbon exploration and production related operations. |
US09633065B2 |
Efficient data rehydration
A system for an efficient data rehydration comprises a server, one or more reader device managers, a writer device manager, and a verifier. The server is for receiving a restore list comprising a plurality of storage locations and lengths for performing a data rehydration. The one or more reader device managers is for reading a data set indicated by the restore list by reading the plurality of storage locations for the lengths from one or more storage nodes. The plurality of storage locations and lengths indicate chunks from a client system stored as part of a full or as an incremental backup session on a storage device attached to a storage node. The writer device manager is for transferring the data set to a save node. A verifier is for verifying transfer of the data set. |
US09633064B2 |
Systems and methods of unified reconstruction in storage systems
Systems and methods for reconstructing unified data in an electronic storage network are provided which may include the identification and use of metadata stored centrally within the system. The metadata may be generated by a group of storage operation cells during storage operations within the network. The unified metadata is used to reconstruct data throughout the storage operation cells that may be missing, deleted or corrupt. |
US09633061B2 |
Methods for determining event counts based on time-sampled data
A method for determining event counts for a database system includes capturing samples for the active sessions based on a pre-defined sampling frequency and identifying events from the captured samples. The method further includes determining the wait time for each of the identified events and determining an event count for the active sessions using a harmonic mean. The harmonic mean is a summation of the maximum of either one or the ratio of the sampling frequency to the determined wait time for each of the identified events. |
US09633058B2 |
Predictive placement of columns during creation of a large database
Methods and arrangements for predictively placing columns of a large database in a multi-tier storage system. Aspects include receiving a database to be stored in the multi-tier storage system, wherein the database comprises a plurality of columns and the multi-tier storage system comprises at least two storage devices and evaluating one or more attributes of each of the plurality of columns of the database. Aspects also include storing each of the plurality of columns of the database on one of the at least two storage devices, wherein a determination of which of the at least two storage devices to store each of the plurality of columns is based on the one or more attributes of each of the columns, a predictive model based on the weighted columnar relationship graph, and the characteristics of the storage devices. |
US09633054B2 |
Providing a database as a service in a multi-tenant environment
In one embodiment, the present invention is directed to a system with multiple computing hosts each having a hypervisor to provide a virtual environment for the host and one or more containers each including a database instance and at least one database. These databases, and the database instance can be provided as a service to a user of a multi-tenant environment. |
US09633048B1 |
Converting a text sentence to a series of images
A text sentence is automatically converted to an image sentence that conveys semantic roles of the text sentence. This is accomplished by identifying semantic roles associated with each verb of a sentence, any associated verb adjunctions, and identifying the grammatical dependencies between words and phrases in a sentence, in some embodiments. An image database, in which each image is tagged with descriptive information corresponding to the image depicted, is queried for images corresponding to the semantic roles of the identified verbs. Unless a single image is found to depict every semantic role, the text sentence is split into two smaller fragments. This process is the repeated and performed recursively until a number of images have been identified that describe each semantic role of each sentence fragment. |
US09633046B2 |
Automated image cropping and sharing
Technologies for automated cropping and sharing of images include an imaging device configured to capture a digital image, recognize one or more subjects represented in the image, determine the social network groups associated with the subjects of the digital image, and crop the digital image to generate one or more sub-images. Each of the sub-images includes subjects associated with a particular social network group. Each of the sub-images may be shared with the relevant social network group. Subjects may include persons, objects, or events, and may be recognized through computer vision techniques as well as using contextual data. The imaging device may receive social network data from one or more social network servers, which may be used to determine the relevant social network groups. The imaging device may also exclude subjects from the cropped sub-images based on one or more content policies. Other embodiments are described and claimed. |
US09633042B2 |
Object recognition trait analysis systems and methods
A system for analyzing scene traits in an object recognition ingestion ecosystem is presented. In some embodiment, a trait analysis engine analyzes a digital representation of a scene to derive one or more features. The features are compiled into sets of similar features with respect to a feature space. The engine attempts to discover which traits of the scene (e.g., temperature, lighting, gravity, etc.) can be used to distinguish the features for purposes of object recognition. When such distinguishing traits are found, an object recognition database is populated with object information, possibly indexed according to the similar features and their corresponding distinguishing traits. |
US09633038B2 |
Detecting out-of-band (OOB) changes when replicating a source file system using an in-line system
Examples described herein include a computer system, positioned in-line with respect to a plurality of clients that actively use a source file system, to replicate a source file system on a target memory in presence of out-of-band events which after the source file system. |
US09633036B2 |
Deduplicated data processing rate control
A plurality of server processor workers is configured for the distributed parallel processing of deduplicated data entities in a plurality of chunks. The deduplicated data processing rate is regulated using a rate control mechanism. The rate control mechanism incorporates a debt/credit algorithm specifying which of the plurality of workers processing the deduplicated data entities must wait for each of a plurality of calculated required sleep times, the calculated required sleep times being calculated as a best fit between a maximum allowable sleep time, a delta vector, and a limit per time vector, wherein the required sleep time is one of the plurality of calculated required sleep times. |
US09633035B2 |
Storage system and methods for time continuum data retrieval
A method and system for storage of a data block for time continuum back-in-time data retrieval. The method comprises receiving a data block from a user node; updating an index stored in a memory respective of a time that the data block was received, wherein the time is a past time for retrieval of the data block; generating a hash number respective of contents of the data block; updating the index with the generated hash number; checking for existence of the generated hash number in a database; upon determination that the generated hash number does not exist in the database saving the data block in a storage device; increasing monotonously a transaction number respective of the generated hash number; and updating the index with the transaction number. |
US09633034B2 |
Generation of realistic file content changes for deduplication testing
Method, system, and computer program product embodiments for facilitating deduplication product testing in a computing environment are provided. In one such embodiment, data to be processed through the deduplication product testing is arranged into a single, continuous stream. At least one of a plurality of random modifications are applied to the arranged data in a self-similar pattern exhibiting scale invariance. A plurality of randomly sized subsets of the arranged data modified with the self-similar pattern is mapped into each of a plurality of randomly sized deduplication test files which are calibrated against input/output (I/O) trace data obtained in the computing environment. |
US09633033B2 |
High availability distributed deduplicated storage system
A high availability distributed, deduplicated storage system according to certain embodiments is arranged to include multiple deduplication database media agents. The deduplication database media agents store signatures of data blocks stored in secondary storage. In addition, the deduplication database media agents are configured as failover deduplication database media agents in the event that one of the deduplication database media agents becomes unavailable. |
US09633031B2 |
Systems and methods for enhancing performance of a clustered source code management system
A clustered source code management system is described. The system comprises a plurality of cluster nodes, a shared file server storing repository data, and a load balancer. Each of the plurality of cluster nodes is configured to receive an incoming request sent from a client computer, the incoming request being a source code management request to access repository data stored on the shared file server and process the incoming request to determine if a type of the incoming request is a cacheable request type. If the incoming request is of a cacheable request type, the cluster node is configured to determine if a valid cached response to the incoming request is available on storage media locally accessible to the cluster node; and, if so, respond to the incoming request by communicating the valid cached response to the client computer. |
US09633025B2 |
Data storage system for analysis of data across heterogeneous information management systems
Systems and methods for generating customized reports from data storage databases and other information management system databases. The methods include normalizing queried information from different types of information management system databases to enable system-wide report generation. Other implementations are disclosed. |
US09633019B2 |
Augmenting an information request
An electronic device comprises a microphone for receiving an oral request for information about an unspecified object. A sensor receives augmentation information about the unspecified object. Combination logic combines information from the oral request with the augmentation information into a combined format information request. Information retrieval logic then retrieves an answer to the combined format information request. |
US09633014B2 |
Policy based video content syndication
An item of hosted content is received from a media host. A match metric representing an aspect of a match between the item of hosted content and an item of reference content, the item of reference content provided by a content owner having rights to the item of reference content. A policy associated with the item of reference content is identified responsive to the value to that represents the correspondence, the policy including terms of use for the hosted content. The policy is provided to the media host. |
US09633013B2 |
Triggering actions in response to optically or acoustically capturing keywords from a rendered document
A system for processing text captured from rendered documents is described. The system receives a sequence of one or more words optically or acoustically captured from a rendered document by a user. The system identifies among words of the sequence a word with which an action has been associated. The system then performs the associated action with respect to the user. |
US09633010B2 |
Converting data into natural language form
Converting technical data from field oriented electronic data sources into natural language form is disclosed. An approach includes obtaining document data from an input document, wherein the document data is in a non-natural language form. The approach includes determining a data type of the document data from one of a plurality of data types defined in a detection and conversion database. The approach includes translating the document data to a natural language form based on the determined data type. The approach additionally includes outputting the translated document data in natural language form to an output data stream. |
US09633008B1 |
Cognitive presentation advisor
A computer-implemented method for reviewing content of a presentation is provided. The method includes obtaining, using a processor system of a device, content of an electronic presentation, wherein the content is associated with a first slide of the presentation. The format of the content is determined wherein the content includes natural language content and non-natural language content and the non-natural language content is converted into natural language content using the processor system. The sentiment and tone of the natural language content is analyzed using the processor system. A textual summary is created. The sentiment, tone and textual summary of the natural language content of the slide of the presentation is evaluated and a summary of the natural language content of the slide is presented using a display based upon the evaluation of the sentiment, tone and textual summary. |
US09633006B2 |
Question answering system and method for structured knowledgebase using deep natural language question analysis
Disclosed are a question answering system for structured knowledgebase using deep natural language question analysis, and a method thereof, the question answering system for structured knowledgebase using deep natural language question analysis includes a deep natural language question analysis unit configured to create a structure of a semantic frame by analyzing a natural language question that is input, a question-intermediate expression creation unit configured to create a question-intermediate expression of a lexicon level based on the semantic frame, a knowledgebase-specialized query creation unit configured to create a query used to search in knowledgebase that is a subject of search, based on the question-intermediate expression, and a knowledgebase search unit configured to find a correct answer in the knowledgebase that is subject of search based on the query, to provide an accuracy of the correct answer, a confidence of the correct answer and an evidence for the correct answer. |
US09633004B2 |
Better resolution when referencing to concepts
Systems and processes for operating a virtual assistant programmed to refer to shared domain concepts using concept nodes are provided. In some examples, to process a textual representation of user speech using an active ontology having these concept nodes, a primary user intent can be determined from the textual representation of user speech. Concepts referred to by the primary user intent can be identified, and substrings of the textual representation of user speech corresponding to the concepts can be identified. Secondary user intents for the substrings can be determined and a task flow based on the primary user intent and the secondary user intents can be generated and performed. |
US09632998B2 |
Claim polarity identification
A method comprising using at least one hardware processor for: receiving (a) a proposition and (b) a plurality of claims; identifying a local claim polarity of each claim of the plurality of claims with respect to the proposition; calculating a pairwise claim polarity agreement score for each pair of claims of the pairs of claims reflecting the likelihood of said each pair of claims to have the same claim polarity, wherein the pairwise claim polarity agreement score is associated with each claim of the pair of claims; and determining a global claim polarity for each claim of the plurality of claims based on the local claim polarity of the claim and pairwise claim polarity agreement scores associated with said each claim. |
US09632996B2 |
System for maintaining conversational cadence in online social relationship or network, involves providing set of fill-in messages that create appearance to another user in social network of no reduction in conversational cadence
A method for maintaining conversational cadence may include determining, by a processor, a conversational cadence associated with a user in a social network. The conversational cadence may be determined based on a plurality of messages previously transmitted by the user. The method may also include detecting, by the processor, a reduction in the conversational cadence of the user. The method may further include providing, by the processor, a set of fill-in messages that create an appearance to another user in the social network that there is no reduction in the conversational cadence. |
US09632990B2 |
Automated approach for extracting intelligence, enriching and transforming content
The present invention relates to a system and method for enriching and transforming unstructured data to obtain structured data by intelligence extraction, enrichment, categorization and hierarchy creation. The invention discloses an automated approach for transformation of unstructured documents, which involves an analysis, a transformation and a quality assessment of the input unstructured documents, to obtain the output structured documents in fewer time frames and without the need of skilled labors. |
US09632989B2 |
Partitioning of markup language documents
A hybrid markup language document (or “HMLD”) is scanned for a partition boundary. Content in the HMLD that precedes the partition boundary is discarded for simpler and faster processing. |
US09632987B2 |
Technique that enhances the manipulation of an HTML tree presentation by using an array representation of the hierarchical path of a tree node
The present invention discloses a method for manipulating the presentation of an AJAX tree using an array representing the hierarchical path of a tree node. Such a method can begin with the receipt of a user-request to expand a selected tree node of an AJAX tree in a Web page. Next, it can be determined if the tree node is present in the existing path array. When the tree node is present in the existing path array, the existing path array can be modified for the selected tree node. A new path array can be requested from the AJAX engine when the tree node does not exist in the existing path array. A path array handler can be invoked to expand the AJAX tree using the existing path array. |
US09632985B1 |
System and methods for cross platform interactive electronic books
Disclosed in some examples is a system for electronic learning support, the system having a content-ingestion module to generate a. digital specification in a first language from a set of input parameters for one or more of a plurality of digital templates, the digital specification including instructions which when executed by an execution environment of an electronic reading device, cause the electronic reading device to present one or more interactive content presentation objects and one or more interactive assessment objects, the execution environment being one of a plurality of execution environments, each execution environment being specific to one of a plurality of heterogeneous electronic reading devices; a digital specification delivery module executed by the one or more processors to transmit the digital specification to the electronic reading device; and an interaction module to: receive content interaction data corresponding to user interactions with the interactive content presentation objects from the execution environment and to send at least a subset of the content interaction data to at least one other electronic reading device, and to receive assessment data corresponding to user interactions with the interactive assessment objects from the execution environment. |
US09632984B2 |
Customizing content presentation format in accordance with the category of device used to access the content
In some embodiments, a system identifies content for display on a user device. The system determines a device category associated with the user device. The system determines that the content for display on the user device comprises at least one of a group comprising a plurality of bank product options, a user assistance option associated with one or more of the plurality of bank product options, a plurality of questions associated with one or more of the plurality of bank product options, and a disclosure associated with acceptance of a selected bank product option of the plurality of bank product options. The system determines a presentation format for the content according to presentation rules that determine presentation format for the content on the user device according to the content and the determined device category. |
US09632983B2 |
Image projection system and image projection method
An image projection system includes a second transform matrix calculator that calculates a second projection transform matrix usable to projection-transform first intersection coordinates into intersection coordinates uniformly or substantially uniformly distributed in a first area and calculates a third projection transform matrix usable to projection-transform second intersection coordinates into intersection coordinates uniformly or substantially uniformly distributed in a second area; and an image corrector that transforms image data on a first divided image by use of the second projection transform matrix, transforms image data on a second divided image by use of the third projection transform matrix, and translates at least one of the first divided image and the second divided image toward a borderline between the first divided image and the second divided image to delete a gap between the first divided image and the second divided image. |
US09632981B2 |
Calibration of a chest-mounted wireless sensor device for posture and activity detection
A method and system for calibrating a wireless sensor device are disclosed. In a first aspect, the method comprises determining a vertical calibration vector and determining a rotation matrix using the vertical calibration vector to line up native axes of the wireless sensor device with body axes. In a second aspect, a wireless sensor device comprises a processor and a memory device coupled to the processor, wherein the memory device includes an application that, when executed by the processor, causes the processor to determine a vertical calibration vector and to determine a rotation matrix using the vertical calibration vector to line up native axes of the wireless sensor device with body axes. |
US09632979B2 |
Apparatus and method for efficient prefix sum operation
An apparatus and method are described for performing a prefix sum. For example, one embodiment of an apparatus comprises: a graphics processor unit comprising one or more execution units to execute single instruction multiple data (SIMD) instructions, the GPU to be provided with a plurality of data elements as input for a prefix sum operation; a first register of the GPU to store the plurality of data elements in specified data element positions; and the one or more execution units to perform a series of single instruction multiple data (SIMD) operations using the plurality of data elements, the SIMD operations performed using regioning techniques to generate the prefix sum, the SIMD operations including a first plurality of simultaneous addition operations to add specified data elements to generate intermediate results and further including a second plurality of simultaneous addition operations to add the intermediate results to other intermediate results to generate the prefix sum. |
US09632972B1 |
Determining influence in a social community
Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for determining influence in a social community. In one aspect, a method includes identifying a user in a community; determining an influence score to be associated with the user in the community for a particular topic, including: determining a reach of one or more communications that relate to the particular topic that have been distributed from the user to other users in the community, and evaluating the reach as compared to the reach of one or more communications distributed from other users in the community for the particular topic; and storing the influence score in association with the user. |
US09632965B2 |
Cached PHY register data access
Ethernet physical sublayer (PHY) devices each provide PHY register data. One or more of the Ethernet PHY devices are connected to each of one or more management data input/output (MDIO)/management data clock (MDC) interfaces to which a number of MDIO/MDC controllers are connected. Each MDIO/MDC controller polls a corresponding MDIO/MDC interface to receive the PHY register data from the one or more Ethernet PHY devices connected thereto. The MDIO/MDC controllers store portions of the PHY register data received from the Ethernet PHY devices to a memory to which an interface is connected. A processor connected to the interface accesses the portions of the PHY register data stored to the memory. The processor can retrieve the portions of the PHY register data over the interface more quickly than the MDIO/MDC controllers can retrieve the PHY register data over the MDIO/MDC interfaces. |
US09632958B2 |
System for migrating stash transactions
A system for migrating stash transactions includes first and second cores, an input/output memory management unit (IOMMU), an IOMMU mapping table, an input/output (I/O) device, a stash transaction migration management unit (STMMU), a queue manager and an operating system (OS) scheduler. The I/O device generates a first stash transaction request for a first data frame. The queue manager stores the first stash transaction request. When the first core executes a first thread, the queue manager stashes the first data frame to the first core by way of the IOMMU. The OS scheduler migrates the first thread from the first core to the second core and generates pre-empt notifiers. The STMMU uses the pre-empt notifiers to update the IOMMU mapping table and generate a stash replay command. The queue manager receives the stash replay command and stashes the first data frame to the second core. |
US09632957B2 |
Handling interrupts in a multi-processor system
A data processing apparatus has a plurality of processors and a plurality of interrupt interfaces each for handling interrupt requests from a corresponding processor. An interrupt distributor controls routing of interrupt requests to the interrupt interfaces. A shared interrupt request is serviceable by multiple processors. In response to the shared interrupt request, a target interrupt interface issues an interrupt ownership request to the interrupt distributor, without passing the shared interrupt request to the corresponding processor, if it estimates that the corresponding processor is available for servicing the shared interrupt request. The shared interrupt request is passed to the corresponding processor when an ownership confirmation is received from the interrupt distributor indicating that the processor has been selected for servicing the shared interrupt request. |
US09632956B2 |
Expandable asymmetric-channel memory system
An expandable memory system that enables a fixed signaling bandwidth to be configurably re-allocated among dedicated memory channels. Memory channels having progressively reduced widths are dedicated to respective memory sockets, thus enabling point-to-point signaling with respect to each memory socket without signal-compromising traversal of unloaded sockets or costly replication of a full-width memory channel for each socket. |
US09632953B2 |
Providing input/output virtualization (IOV) by mapping transfer requests to shared transfer requests lists by IOV host controllers
An input/output virtualization (IOY) host controller (HC) (IOV-HC) of a flash-memory-based storage device is disclosed. In one aspect, an IOV-HC is coupled to input/output (I/O) clients via corresponding client register interfaces (CRIs), and is also coupled to a flash-memory-based storage device. The IOV-HC comprises transfer request list (TRL) slot offset registers indicating slots of a shared TRL that are assigned as base slots to each of the CRIs. The IOV-HC further comprises TRL slot count registers indicating how many slots of the shared TRL are assigned to each of the CRIs. When a transfer request (TR) directed to the flash-memory-based storage device is received from a CRI, the IOV-HC is configured to map the TR to a slot of the shared TRL based on a TRL slot offset register and a TRL slot count register of the plurality of TRL slot count registers corresponding to the CRI. |
US09632946B1 |
Dynamically adapting the configuration of a multi-queue cache based on access patterns
A multi-queue cache is configured with an initial configuration, where the initial configuration includes one or more queues for storing data items. Each of the one or more queues has an initial size. Thereafter, the multi-queue cache is operated according to a multi-queue cache replacement algorithm. During operation, access patterns for the multi-queue cache are analyzed. Based on the access patterns, an updated configuration for the multi-queue cache is determined. Thereafter, the configuration of the multi-queue cache is modified during operation. The modifying includes adjusting the size of at least one of the one or more queues according to the determined updated configuration for the multi-queue cache. |
US09632945B2 |
Destage grouping for sequential fast write tracks
An amount of sequential fast write (SFW) Tracks are metered by providing an adjustable threshold for performing a destage scan that moves the SFW tracks from a SFW least recently used (LRU) list to a destaging wait list (DWL). Priorities are set for the destaging of the SFW tracks from the DWL. |
US09632944B2 |
Enhanced transactional cache
Described herein is a technology for providing enhanced transactional caching. In accordance with one aspect, a transactional cache associated with a database is configured. The enhanced cache may support write operation by partial key or index. Execution of a write operation on the database is delayed until a flush is determined to be necessary. The write operation is delayed by performing the write operation on the transactional cache. The flush is invoked by performing a row-wise bulk operation that updates the database based on the transactional cache. |
US09632943B2 |
Expedited servicing of store operations in a data processing system
In at least some embodiments, a processor core generates a store operation by executing a store instruction in an instruction sequence. The store operation is marked as a high priority store operation operation in response to detecting a barrier instruction in the instruction sequence immediately preceding the store instruction in program order and is not so marked otherwise. The store operation is buffered in a store queue associated with a cache memory of the processor core. Handling of the store operation in the store queue is expedited in response to the store operation being marked as a high priority store operation and not expedited otherwise. |
US09632942B2 |
Expedited servicing of store operations in a data processing system
In at least some embodiments, a processor core generates a store operation by executing a store instruction in an instruction sequence. The store operation is marked as a high priority store operation in response to detecting a barrier instruction in the instruction sequence immediately preceding the store instruction in program order and is not so marked otherwise. The store operation is buffered in a store queue associated with a cache memory of the processor core. Handling of the store operation in the store queue is expedited in response to the store operation being marked as a high priority store operation and not expedited otherwise. |
US09632941B2 |
Fuzzy counters for NVS to reduce lock contention
A method for data management in a computing storage environment includes a processor device, operable in the computing storage environment, that divides a plurality of counters tracking write and discard storage operations through Non Volatile Storage (NVS) space into first, accurate, and second, fuzzy, groups where the first, accurate, group is one of updated on a per operation basis, while the second, fuzzy, group is one of updated on a more infrequent basis as compared to the first, accurate group. |
US09632939B2 |
Data cache virtual hint way prediction, and applications thereof
A virtual hint based data cache way prediction scheme, and applications thereof. In an embodiment, a processor retrieves data from a data cache based on a virtual hint value or an alias way prediction value and forwards the data to dependent instructions before a physical address for the data is available. After the physical address is available, the physical address is compared to a physical address tag value for the forwarded data to verify that the forwarded data is the correct data. If the forwarded data is the correct data, a hit signal is generated. If the forwarded data is not the correct data, a miss signal is generated. Any instructions that operate on incorrect data are invalidated and/or replayed. |
US09632938B2 |
Method and apparatus for pushing memory data
A method and an apparatus for pushing memory data from a memory to a push destination storage used to store data prefetched by a central processing unit (CPU) in a computing system are disclosed. In the method, a memory controller of the computing system periodically generates a push command according to a push period. Then the memory controller acquires a push parameter of to-be-pushed data according to the push command and sends at least one memory access request to memory according to the push parameter, where the at least one memory access request is used to request the to-be-pushed data from the memory. After receiving the to-be-pushed data that is sent according to the at least one memory access request by the memory, the memory controller buffers the to-be-pushed data and pushes the to-be-pushed data from the data buffer to the push destination storage. |
US09632934B2 |
Maintaining coherence when removing nodes from a directory-based shared memory system
A high performance computing system and methods are disclosed. The system includes logical partitions with physically removable nodes that each have at least one processor, and memory that can be shared with other nodes. Node hardware may be removed or allocated to another partition without a reboot or power cycle. Memory sharing is tracked using a memory directory. Cache coherence operations on the memory directory include a test to determine whether a given remote node has been removed. If the remote node is not present, system hardware simulates a valid response from the missing node. |
US09632933B2 |
Efficient coherency response mechanism
A plurality of processing units are interconnected by a coherency network in accordance with a directed spanning tree. Each processing unit that is a leaf of the directed spanning tree includes processing circuitry to provide a coherency response in response to a snoop request. Each processing unit which is not a root or leaf of the directed spanning tree includes switch point circuitry having one or more ingress ports coupled to neighboring processing units in accordance with the directed spanning tree. The switch point circuitry includes a coherency tracking table configured to store a combined coherency response in response to a particular snoop request based on one or more coherency responses received at the one or more ingress ports from the neighboring processing units. |
US09632925B2 |
Apparatus and system for object-based storage solid-state device
An object-based storage system comprising a host system capable of executing applications for and with an object-based storage device (OSD). Exemplary configurations include a call interface, a physical layer interface, an object-based storage solid-state device (OSD-SSD), and are further characterized by the presence of a storage processor capable of processing object-based storage device algorithms interleaved with processing of physical storage device management. Embodiments include a storage controller capable of executing recognition, classification and tagging of application files, especially including image, music, and other media. Also disclosed are methods for initializing and configuring an OSD-SSD device. |
US09632923B2 |
Dynamic test topology visualization
An approach for dynamic test topology visualization is provided. The approach retrieves test data from one or more databases. The approach retrieves test data from an application under test. The approach creates a visual diagram, wherein the visual diagram includes one or more topological elements, one or more topological relationships between the one or more topological elements, the test data, and a screen snapshot of an application under test. The approach overlays the visual diagram with user interaction information. The approach associates the visual diagram to the test execution performed on the application under test. |
US09632922B2 |
Workload mapper for potential problem areas using modules and defect data
Embodiments are directed to devices, systems and methods for improving the efficiency at which problem areas are identified and prioritized for an existing large, multi-module software system. In some embodiments, a workload mapper generates workload maps that identify the intersection between defect risk scores accumulated for various modules and a log of the modules that are accesses by a given workload. A graphical user interface (GUI) provides the ability to sort, search, compare and display the workload maps against various sort, search and/or compare criteria. |
US09632911B2 |
Stack trace clustering
A system and a method are disclosed for stack trace clustering. In one example, the method includes receiving a first stack trace and a second stack trace, normalizing, by a processing device, the first and second stack traces, determining a distance between the normalized first and second stack traces, and determining whether the normalized first and second stack traces are equivalent based on the determined distance. |
US09632909B2 |
Transforming user script code for debugging
User script code that is developed to be run in a host application, for example, as a macro can be transformed into debuggable code so that the host application may continue to operate during a debugging stop operation. Traceback methods can be created that call back into the host application to allow the host application to cooperatively operate and update its user-interface. The user script code can be transformed by injecting callbacks to the traceback methods at respective locations in the code where a stopping operation may be installed during debugging. Further, two or more debugging features can be combined into a single user script code transform using an iterator pattern function. |
US09632905B2 |
Data-agnostic adjustment of hard thresholds based on user feedback
This disclosure is directed to data-agnostic computational methods and systems for adjusting hard thresholds based on user feedback. Hard thresholds are used to monitor time-series data generated by a data-generating entity. The time-series data may be metric data that represents usage of the data-generating entity over time. The data is compared with a hard threshold associated with usage of the resource or process and when the data violates the threshold, an alert is typically generated and presented to a user. Methods and systems collect user feedback after a number of alerts to determine the quality and significance of the alerts. Based on the user feedback, methods and systems automatically adjust the hard thresholds to better represent how the user perceives the alerts. |
US09632901B2 |
Page resolution status reporting
A method for data transfer includes receiving in a data transfer operation data to be written by a peripheral device to a specified virtual address in a random access memory (RAM) of a host computer. Upon receiving the data, it is detected that a page that contains the specified virtual address is marked as not present in a page table of the host computer. The peripheral device receives a notification that the page is not present and an estimate of a length of time that will be required to make the page available and selects a mode for handling of the data transfer operation depending upon the estimate. |
US09632899B2 |
Method for analyzing request logs in advance to acquire path information for identifying problematic part during operation
Common parameters in common between a plurality of request logs are extracted from parameters in the plurality of request logs. The plurality of request logs is obtained when a request is executed by a process that uses a plurality of components. A common parameter different from a common parameter extracted for another process among the extracted common parameters is determined as an identification parameter that identifies the process. This allows accurately categorizing the process based on a log to be obtained when the process is executed. |
US09632897B2 |
Monitoring components in a service framework
A solution is proposed for monitoring usage of bundles in the OSGi environment. For this purpose, an event notification interface of the OSGi environment is exploited. Particularly, each event relating to a change of state of a bundle (such as its addition, removal, starting and stopping) is detected by an auxiliary bundle—which previously subscribed to the event notification interface. The auxiliary bundle can then forward the detected events to a licensing agent, which identifies the bundle by means of a software catalog. In this way, the desired result is achieved without requiring any instrumentation of the bundles to be monitored. |
US09632896B2 |
Built-in self-testing method of a near field communication device
A built-in self-testing method of a near field communication device including several functions tests a first internal communication link between a first function and a second function. The testing is performed by sending, on said first internal communication link, a first command from said first function used as a transmitter to said second function used as a receiver, and by checking said first command has been correctly executed by said second function. |
US09632895B2 |
Apparatus, system and method for a common unified debug architecture for integrated circuits and SoCs
A system and method for a common unified debug architecture for integrated circuits and System on Chips (SoCs) are provided. A system consistent with the present disclosure may comprise of an integrated circuit or SoC which includes a display port, plurality of logic blocks, and debug logic. The debug logic may receive debug data from one or more of the plurality of logic blocks in response to the integrated circuit or SoC operating in a debug mode. In addition, control logic coupled to the debug logic. The control logic provides display data to the display port in response to the integrated circuit operating in an operational mode. The control logic further directs high-speed debug data to the display port in response to the integrated circuit or SoC operating in the debug mode. The high-speed debug data is to be based on the debug data. |
US09632892B1 |
NFS cluster failover
Implementations are provided herein for establishing a failover cluster in a distributed file system that upon the occurrence of failover event, allows clients to actively migrate during ongoing file system activity from a source cluster to a target cluster without having to unmount an NFS export from the source cluster and remount the NFS export on the target cluster. Upon the occurrence of a failover event, clients can be rerouted to a target cluster that contains mirrored copies of the data the client was expecting to be stored on the original source cluster. However, in attempting to access the data, without unmounting and remounting an export, the client will continue to reference source cluster FSID and LIN identifiers when making NFS calls to the target cluster. Thus, implementations are provided herein for translating the requests of an NFS client on a target cluster after a failover event has occurred. A client can make NFS calls using FSID and LIN information of the original source cluster, and that information can be translated, e.g., through a reverse LIN map, to the unique LIN's of the target cluster, such that any failover migration of the client is transparent to the client. |
US09632888B2 |
Memory data migration method and apparatus, and computer
Embodiments of the present invention provide a memory data migration method and apparatus, and a computer, to migrate memory data that is in the computer. After acquiring a first trigger instruction, an operating system of the computer can suspend a task that is being executed, to execute memory data migration, determine a source memory card that stores to-be-migrated memory data, determine a backup memory card for the source memory card, and instruct a memory controller associated with the source memory card to perform the memory data migration, so that the memory controller associated with the source memory card reads memory data of the source memory card according to an instruction of the operating system, and writes the read memory data of the source memory card into the backup memory card. |
US09632887B2 |
Automatic client side seamless failover
A standby database cluster takes on the role of the primary database cluster if the primary database cluster becomes unavailable using the following steps: (i) operating a database management system (DBMS) including an initial primary cluster and a plurality of standby clusters; (ii) communicating to a set of client driver(s) connecting a first application to the initial primary cluster an identity of the plurality of standby clusters; (iii) on condition that the initial primary cluster becomes unavailable, assigning a selected standby cluster of the plurality of standby clusters to be assigned as a new primary cluster in place of the initial primary cluster; and (iv) in response to assignment of the new primary cluster, seamlessly moving the first application from the initial primary cluster to the new primary cluster without any substantial human intervention. |
US09632885B2 |
Fault detection method and related device and stack system
A fault detection method and a related device and stack system. The fault detection method is applied in a stack system, where a first communications device includes a first service board and a second service board, the first service board includes a first processor and a first component, the second service board includes a second processor and a second component, where the second component receives a first signal from the first component, updates the current total number of abnormal ports of the second communications device based on the number, which is indicated by the first signal, of abnormal ports of the second communications device, and if the updated current total number of abnormal ports of the second communications device satisfies a failure confirmation condition corresponding to the second communications device, informs the second processor that the second communications device partially or entirely fails. |
US09632882B2 |
Generic file level restore from a block-level secondary copy
Systems and methods are provided which perform a file level restore by utilizing existing operating system components (e.g., file system drivers) that are natively installed on the target computing device. These components can be used to mount and/or interpret a secondary copy of the file system. For instance, the system can instantiate an interface object (e.g., a device node such as a pseudo device, device file or special file) on the target client which includes file system metadata corresponding to the backed up version of the file system. The interface provides a mechanism for the operating system to mount the secondary copy and perform file level access on the secondary copy, e.g., to restore one or more selected files. |
US09632880B2 |
Data storage device and flash memory control method
A data storage device with flash memory and a flash memory control method are disclosed, which upload the physical-to-logical address mapping information of one block to the flash memory section by section. A microcontroller is configured to allocate a flash memory to provide a first run-time write block. Between a first write operation and a second write operation of the first run-time write block, the microcontroller updates a logical-to-physical address mapping table in accordance with just part of a first physical-to-logical address mapping table. The logical-to-physical address mapping table is provided within the flash memory. The first physical-to-logical address mapping table is established in the random access memory to record logical addresses corresponding to physical addresses of one block. |
US09632878B1 |
Verification of database table partitions during backup
A system that implements a data storage service may store data for database tables in multiple replicated partitions on respective storage nodes. In response to a request to back up a table, the service may export individual partitions of the table from the database and package them to be independently uploaded (e.g., in parallel) to a remote storage system (e.g., a key-value durable storage system). Prior to uploading the exported and packaged partitions to the remote storage system, the service may verify that the exported and packaged partitions can be subsequently restored, which may include unpackaging and/or re-inflating the exported and packaged partitions to create additional unpackaged copies of the partitions, re-importing the additional unpackaged copies of the partitions into the database (e.g., as additional replicas), and/or comparing checksums generated for the exported partitions with checksums generated for the additional unpackaged copies of the partitions. |
US09632877B1 |
Restoring a database to managed storage from a proxy backup image
The present disclosure describes implementing a virtual image file system, or IMGFS. A mount point directory is created in a local file system, where the local file system organizes files on a storage device. The mount point directory corresponds to a proxy backup image file stored on the storage device. The proxy backup image file stores an image file system. The image file system is mounted on the local file system at the mount point directory, using a virtual file system that implements an interface configured to access the image file system. In some embodiments, a notification is provided to a recovery manager that indicates the recovery manager should catalog one or more database files of the proxy backup image file. One or more database files can be restored to a second storage device, such as a group of physical disks that are managed as a single storage unit. |
US09632871B2 |
Reuse of problematic disks in a redundant disk system
A problematic disk within a Redundant Array of Independent Disks (RAID) data storage system can be reused. A first disk within the RAID data storage system can be formatted, initialized, and validated in response to the first disk experiencing a recoverable data storage error. The first disk can be designated as a second-level redundant disk within the RAID data storage system in order for the RAID data storage system to access the first disk in response to success of the validating operation on the first disk. Problematic disks experiencing media errors and/or slow disk errors can be isolated from the RAID data storage system to ensure high reliability of the RAID system. |
US09632869B1 |
Error correction for interconnect circuits
In approaches for correction of errors introduced in an interconnect circuit, an ECC proxy circuit is coupled between a first interconnect and the second interconnect, and generates for each of the write transactions from a bus master circuit, a first ECC from and associated with data of the write transaction, and transmits the write transaction and associated first ECC on the second interconnect. The ECC proxy circuit also supplements each of the read transactions from the bus master circuit with a reference to a second ECC associated with data referenced by the read transaction. The ECC proxy circuit transmits the read transaction that references the second ECC on the second interconnect. At least one random access memory (RAM) is coupled to the ECC proxy circuit through the second interconnect. The RAM stores data of each write transaction and the first ECC. |
US09632865B1 |
Superparity protection for data accessed responsive to a command
The disclosure is related to systems and methods of providing superparity protection to data. A storage device or other processing system, such as a host, may be capable of providing intermediate superparity protection to data. For example, superparity may be determined in response to a command received at a storage device. A superparity can be determined for read data to provide superparity protection to the read data. It may also be determined whether the read data is already protected by a valid superparity. |
US09632863B2 |
Track error-correcting code extension
In general, techniques are described for performing track-error-correcting code on data. A hard drive comprising a storage device and a read channel may be configured to perform the techniques. The read channel may be configured to read data from a track comprising a plurality of data sectors each comprising a plurality of bits, and a parity sector comprising a plurality of parity bits, wherein the data includes a plurality of bit groups, each bit group including a single bit from each data sector, and wherein each parity bit corresponds to a respective bit group, perform a track parity check, and, responsive to determining that the data includes an error, identify one or more data sectors as possible sources of the at least one error and adjust a log-likelihood ratio for at least one bit from the bit group. |
US09632862B2 |
Error handling in transactional buffered memory
Data is sent from a memory buffer device to a host device over a link. An error in the data is determined. A read response cancellation signal is sent to the host device to indicate the error to the host device, where the read response cancellation signal is to be sent subsequent to the data being sent from the memory buffer device to the host device. |
US09632861B1 |
Computer-implemented method, system, and storage medium
A method includes: acquiring messages output by items in the system, each of messages including an output time; referring to the messages and setting item pairs which combine two items among the items, as target item pairs; determining, for each of the item pairs, a strength of relevancy between the target item pairs based on a co-occurrence probability which indicates that a message is output from one of the target item pair within a prescribed time period before or after the output time of a message output from other of the target item pair; and determining a priority ranking for investigating one or more the items among the items other than a certain item based on the strength of relevancy of each of item pairs, as a response to an input of an investigation ranking determination instruction which designates the certain item among the items as an investigation start position. |
US09632855B2 |
Method and apparatus for controlling watchdog
A method of controlling a watchdog and an apparatus for the same are provided. The method of controlling a watchdog within a controller includes determining, by a processor, whether to respond to a fault in the controller by comparing a watchdog count with a predetermined watchdog warning level when the fault is detected. Further, the method includes storing, by the processor, information regarding a program group related to the detected fault and a watchdog reset count that corresponds to the program group within a memory after increasing the watchdog reset count when the fault is to be responded to. In addition the processor is configured to reset the controller when the watchdog count exceeds a predetermined watchdog timeout level. Therefore, the present invention prevents occurrence of repeated resets that result from the same cause within the controller. |
US09632851B1 |
Secure inter-process communications for mobile devices
A secure inter-process communication channel is provided to enable application to share data objects. An application may provide an export file type definition indicating data objects that may be shared with another application. Sharing data object between application may include obtaining the export file type definition from the application and displaying a graphical user interface based at least in part on the export file type definition. Data objects may be selected through the graphical user interface and provided to another application based at least in part on the selection. |
US09632841B2 |
Electronic device capable of configuring application-dependent task based on operating behavior of application detected during execution of application and related method thereof
An electronic device has a processing system and a management circuit. The processing system executes an application. The management circuit detects an operating behavior of the application during execution of the application, analyzes the detected operating behavior of the application to generate an application identification result, and configures an application-dependent task according to at least the application identification result. |
US09632837B2 |
Systems and methods for system consolidation
Aspects of the present disclosure disclose systems and methods for consolidating business assets currently being employed by the enterprise to perform business tasks. In various aspects, a well defined application programming interface (“API”) may be generated or otherwise provided that enables access to portions of an enterprise's assets and subsequently exposes such business assets in a standard format to requesting applications. |
US09632835B2 |
Deployment of virtual machines to physical host machines based on infrastructure utilization decisions
A resource management node includes a processor and a memory coupled to the processor. The memory includes computer readable program code that when executed by the processor causes the processor to perform operations. The operations can include, for each of a plurality of guest virtual machines (VMs), determining operational resources of physical host machines available in a distributed computing system that are needed to provide the guest VM. A placement scenario for placing the guest VMs on the physical host machines and placing the physical host machines in cabinets of a distributed computing system is generated. An amount of infrastructure of the distributed computing system used by the placement scenario is determined. A determination is made whether the placement scenario satisfies a defined rule for how much infrastructure of the distributed computing system can be used. Placement of the physical host machines in the cabinets and placement of the guest VMs on the physical host machines is initiated based on the placement scenario satisfying the defined rule. |
US09632830B1 |
Cache retention analysis system and method
A system and method for ensuring a minimum required availability of a Hosted Function (HF) may retain an entirety of a cache content between separate instances of one or more HF which may share a cache resource. Based on controlling a relationship between an unavailability of cache memory desired by the HF to a probability of the available cache being unusable by the HF, each activation period may be variable within a tolerance to achieve a certification strategy. The approach may statistically characterize a best case, expected case, and worst case of cache availability. The system and method may determine a quality of the cache state at the activation of a particular HF and, based on the statistical analysis of that quality over time, determine a desired derated activation period for each HF to achieve a minimum level of computational availability for successful activation of the HF. |
US09632828B1 |
Computing and tracking client staleness using transaction responses
Distributed systems that maintain data items or state on multiple server nodes (e.g., a storage system or lock service) may receive transaction requests from clients that include read requests and/or write requests. If a transaction request includes a read request, a server node may determine a node staleness value for the requested data from the server's perspective, and may return a transaction response to the client that includes the requested data and the node staleness value. The client may compute a client staleness value for the requested data dependent on the node staleness value in the transaction response, rather than on a separate heartbeat process. If the transaction also includes a write request, the server may return the transaction response for the read request before the write commits. In this case, the client may not use the requested data until it receives another response indicating that the write committed. |
US09632827B2 |
Resource manager for managing the sharing of resources among multiple workloads in a distributed computing environment
A resource manager for managing the sharing of resources among multiple workloads in a distributed computing environment. The resource manager comprises an allocation service component which applies a resource allocation policy to determine whether the requested resources may be allocated. The resource manager also comprises a dynamic provisioning service component which applies a reprovisioning policy to modify the make-up of the resources in response to unsatisfied resource requests. The allocation of resources to consumers may be determined in accordance with the resource ownership and share rights of the consumer on behalf of which the application or workload is being demanded. |
US09632826B2 |
Prioritizing deferred tasks in pending task queue based on creation timestamp
A task is marked as dependent upon a preceding task. The task that is attempted to be taken for execution from a head of a pending task queue that is marked is deferred. The deferred task is removed from the pending task queue and placed in a deferred task queue. The deferred task is reinserted back into the pending task queue for execution upon determining that the preceding tasks are completed. |
US09632822B2 |
Multi-core device and multi-thread scheduling method thereof
A multi-core device and a multi-thread scheduling method thereof are disclosed. The multi-thread scheduling method includes the following steps: recording thread performance-associated parameters for a thread; and performing a thread load balancing between multiple central processing units of a multi-core processor of the multi-core device. The thread load balancing is performed according to a thread critical performance condition of the thread and the thread critical performance condition is determined based on the thread performance-associated parameters. |
US09632818B2 |
Identifying performance bottleneck of transaction in transaction processing system
A mechanism is provided for identifying a performance bottleneck of a transaction in a transaction processing system. At a predefined time point, status information of an interaction between the transaction and a processing component among one or more processing components in the transaction processing system is collected. A duration of the interaction on the basis of the status information is determined. In response to the duration exceeding a predefined threshold, the interaction is identified as the performance bottleneck of the transaction in order to make changes to the transaction processing system thereby improving performance. |
US09632817B2 |
Correlating business workflows with transaction tracking
Methods, systems, and products are disclosed for correlating business workflows with transaction tracking, the method including identifying an instrumentation point in a business process of a business workflow that invokes an IT resource that carries out at least a portion of the business process and associating, at the instrumentation point, the business process and the IT resource with a transaction name having business semantics such that correlation data gathered about the IT resource may be linked with the business process. Correlating business workflows with transaction tracking may also include gathering correlation data about the IT resource, selecting one of the plurality of service specific correlator passing methods, and passing a correlator in accordance with the selected service specific correlator passing methods. |
US09632811B2 |
Virtualization of purpose-built devices
A virtual instance of a hardware device is generated from device profile model data. The virtual instance of the hardware device simulates operation of the hardware device. The simulated operation includes interacting with a software service over a network connection by generating, at the virtual instance, message data to push to a host of the software service over the network connection, receiving request data from the software service over the network connection, and generating a simulated response to the request data. The simulated operation further includes sending the simulated response from the virtual instance to the host over the network connection and modeling a physical effect measured by the hardware device during the interaction with the software service. Data sent by the virtual instance during the interaction is based on the modeled physical effect. |
US09632808B2 |
Implicit co-scheduling of CPUs
Techniques for implicit coscheduling of CPUs to improve corun performance of scheduled contexts are described. One technique minimizes skew by implementing corun migrations, and another technique minimizes skew by implementing a corun bonus mechanism. Skew between schedulable contexts may be calculated based on guest progress, where guest progress represents time spent executing guest operating system and guest application code. A non-linear skew catch-up algorithm is described that adjusts the progress of a context when the progress falls far behind its sibling contexts. |
US09632805B2 |
Data storage device and error correction method thereof
A firmware loading system including a first memory device and a calculation unit. The first memory device includes a first firmware code, wherein the first firmware code has a predetermined code and a plurality of parameter tables, and the parameter tables are arranged to set up a plurality of registers of a second memory device. The calculation unit is arranged to perform a firmware insertion procedure, wherein, during the firmware insertion procedure, the calculation unit selects one of the parameter tables according to a selection signal, compiles the selected parameter table and the predetermined code into a second firmware code, and writes the second firmware code in a flash memory of the second memory device. |
US09632797B2 |
Updating a commit list to indicate data to be written to a firmware interface variable repository
Examples disclosed herein relate to updating a commit list to indicate data to be written to a firmware interface (FI) variable repository. Examples include storing target data in a variable repository cache of system management memory of a computing device during a given SMM event, updating a commit list, during the given SMM event, to indicate that the target data is to be written to the FI variable repository, and ending the given SMM event without at least some portion of the target data being written to the FI variable repository during the given SMM event. |
US09632796B2 |
Computing apparatus and method for controlling automatic booting when cover is opened
A computing apparatus and a method for controlling the same are disclosed. According to an exemplary embodiment of the present invention, the method for controlling the computing apparatus includes the steps of receiving a user command configured to turn on an automatic booting mode through a user interface unit, delivering data corresponding to an ON state of the automatic booting mode to a BIOS module from an application module having an operating system stored therein, storing a configuration value corresponding to the ON state of the automatic booting mode in a Read-Only Memory (ROM) section of the BIOS module, when the cover is in a closed state, detecting an opening of the cover, and performing a predetermined operation in accordance with the configuration value being stored in the ROM section of the BIOS module, based upon a system status corresponding to when the cover is in a closed state. |
US09632793B2 |
Method and device for aborting transactions, related system and computer program product
Current tasks being executed in a set of modules of a signal processing system managed via an interface block are aborted so as to permit the execution of new tasks by pipelining eliminating transactions of said current tasks and executing transactions of the new tasks. Upon arrival of a signal to abort the current tasks, data and/or memory accesses present in said interface block are discarded. |
US09632788B2 |
Buffering instructions of a single branch, backwards short loop within a virtual loop buffer
A method and system for instruction fetching within a processor instruction unit, utilizing a loop buffer, one or more virtual loop buffers, and/or an instruction buffer. During instruction fetch, modified instruction buffers coupled to an instruction cache (I-cache) temporarily store instructions from a single branch, backwards short loop. The modified instruction buffers may be a loop buffer, one or more virtual loop buffers, and/or an instruction buffer. The instruction fetch within the instruction unit of a processor retrieves the instructions for the short loop from the modified buffers during the loop cycles of the single branch, backwards short loop, rather than from the instruction cache. |
US09632786B2 |
Instruction set architecture with extended register addressing using one or more primary opcode bits
A method and circuit arrangement selectively repurpose bits from a primary opcode portion of an instruction for use in decoding one or more operands for the instruction. Decode logic of a processor, for example, may be placed in a predetermined mode that decodes a primary opcode for an instruction that is different from that specified in the primary opcode portion of the instruction, and then utilize one or more bits in the primary opcode portion to decode one or more operands for the instruction. By doing so, additional space is freed up in the instruction to support a larger register file and/or additional instruction types, e.g., as specified by a secondary or extended opcode. |
US09632785B2 |
Instruction source specification
Techniques are disclosed relating to specification of instruction operands. In some embodiments, this may involve assigning operands to source inputs. In one embodiment, an instruction includes one or more mapping values, each of which corresponds to a source of the instruction and each of which specifies a location value. In this embodiment, the instruction includes one or more location values that are each usable to identify an operand for the instruction. In this embodiment, a method may include accessing operands using the location values and assigning accessed operands to sources using the mapping values. In one embodiment, the sources may correspond to inputs of an execution block. In one embodiment, a destination mapping value in the instruction may specify a location value that indicates a destination for storing an instruction result. |
US09632784B2 |
Instruction and logic for processing text strings
A processor includes a decoder logic to decode a compare instruction, and an execution unit to execute the compare instruction. The compare instruction is to cause the processor to determine whether each 32-bit floating point data element of first and second SIMD floating point operands is valid, compare only valid 32-bit floating point data elements of the first 64-bit SIMD floating point operand with only valid 32-bit floating point data elements of the second 64-bit SIMD floating point operand in the same data element position, and store indicators of whether the compared valid 32-bit floating point data elements of the first and second 64-bit SIMD floating point operands are equal. |
US09632782B2 |
Method and apparatus to process SHA-2 secure hashing algorithm
A processor includes an instruction decoder to receive a first instruction to process a secure hash algorithm 2 (SHA-2) hash algorithm, the first instruction having a first operand associated with a first storage location to store a SHA-2 state and a second operand associated with a second storage location to store a plurality of messages and round constants. The processor further includes an execution unit coupled to the instruction decoder to perform one or more iterations of the SHA-2 hash algorithm on the SHA-2 state specified by the first operand and the plurality of messages and round constants specified by the second operand, in response to the first instruction. |
US09632776B2 |
Preload instruction control
A processor provided with an instruction decoder responsive to preload instructions which trigger preload operations, such as page table walks and cache line fetches. An instruction decoder identifies if the memory address associated with the preload instruction matches a null value and suppresses the preload operation if the memory address does match the null value. The null value may be set under program control, it may be predetermined as a fixed value (e.g. zero) or may be set under hardware control, such as corresponding to memory addresses of a page identified by a memory management unit as non-accessible. |
US09632770B2 |
Infrastructure for hosting and publishing software packages
A system and method for hosting and publishing software packages is disclosed. An example method includes receiving and storing artifacts related to a software development kit and metadata describing a version of the software development kit. The received artifacts and metadata may be converted into a package for the software development kit. The package may then be staged and the package's dependencies may be checked to ensure that the package's dependencies exist and that there are no conflicts with another staged package. The currently staged packages may then be tested to determine if there are any incompatibilities among the staged packages and access control information may be used to provide the currently staged packages in a common format to the appropriate users. |
US09632762B2 |
Extending superword level parallelism
A computer identifies one or more pairs of scalar statements and performs a cost analysis of operations of each of the one or more pairs of scalar statements to determine both a benefit and a cost of operations. The computer determines, based, at least in part, on the cost analysis, a gain for each of the one or more pairs of scalar statements. The computer creates based, at least in part, on the gain, a sorted list of each of the one or more pairs of scalar statements and selects a first pair from the sorted list. The computer issues a query to a hash table using a statement of the first pair and selects from results received from the query, a second pair. The computer then extends, based, at least in part, on the second pair, the first pair to create a pack. |
US09632758B2 |
System and method for generating content rules for a website
A system and method for generating content rules for a Web application server. A system is provided that includes a content manager for selecting a content item; and a segment manager for defining a data segment to associate with a selected content item, wherein the segment manager includes a multifaceted search interface for defining the data segment. |
US09632755B1 |
Interface method resolution in object oriented programming models
A computer-implemented method includes receiving an invocation of an invoked interface associated with a class, identifying, based on the class, a plurality of interface lookup artifacts and a cached interface lookup artifact, and comparing the invoked interface with a cache interface. The cache interface is associated with the cached interface artifact. The computer-implemented method further includes, responsive to the invoked interface matching the cache interface, returning the cached interface artifact, and responsive to the invoked interface not matching the cache interface, searching the plurality of interface lookup artifacts until finding a matching interface lookup artifact. The matching interface lookup artifact is associated with a matching interface that matches the invoked interface. Responsive to finding the matching interface lookup artifact, returning the matching interface lookup artifact and updating the cached interface lookup artifact to the matching interface lookup artifact. A corresponding computer program product and computer system are also disclosed. |