最新美国发明专利第2017-01-10期 - 专利汇|PatentHub专利检索|专利查询网|发明专利查询分析

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US09543964B2	Semiconductor device and metering apparatus A semiconductor device includes: an oscillator; a semiconductor chip that includes an oscillation circuit connected to the oscillator, a timer circuit that generates a timing signal of a frequency according to a oscillation frequency of the oscillation circuit, and a frequency correction section that corrects a frequency of the timing signal based on temperature data; and a discrete device that includes at least one of a temperature sensing device that detects a peripheral temperature, that supplies the detected temperature as temperature data to the frequency correction section, and that is provided as a separate body to the semiconductor chip, or a capacitor that is electrically connected to both the oscillator and the oscillation circuit and that is provided as a separate body to the semiconductor chip, wherein the oscillator, the semiconductor chip and the discrete device are contained within a single package.
US09543960B1	Multi-stage frequency dividers having duty cycle correction circuits therein A multi-stage frequency divider includes a cascaded arrangement of first and second integer dividers configured to collectively divide a frequency of a periodic reference signal by an integer amount equal to a product of (2N+1) and (2M+1), where N and M are unequal positive integers greater than two. A duty cycle enhancement circuit is provided, which is synchronized to the periodic reference signal and configured to generate a periodic signal having 2MN+N+M cycles of high followed by 2MN+N+M+1 cycles of low or vice versa, where a duration of each cycle is equivalent to a period of the periodic reference signal. A duty cycle correction circuit is provided as a final stage and is configured to generate a periodic output signal having a uniform duty cycle from the periodic signal generated by the duty cycle enhancement circuit.
US09543959B1	Phase-mode based superconducting logic A device including Josephson junctions, and a terminal for receiving a sinusoidal clock signal for providing power to the Josephson junctions, is provided. The device further includes a terminal for receiving an input signal, a clock terminal for receiving a return-to-zero clock signal, and at least one latch. The device also includes at least one logic gate including at least a subset of the Josephson junctions, for processing the input signal and the return-to-zero clock signal to generate a first signal for the at least one latch. Additionally, the device includes at least one phase-mode logic inverter for processing the return-to-zero clock signal to generate a second signal for the at least one latch. The device also includes an output terminal for providing an output of the at least one latch by processing the first signal and the second signal.
US09543958B1	Multiplexer-memory cell circuit, layout thereof and method of manufacturing same An integrated circuit includes a plurality of logic tiles, wherein each logic tile includes a plurality of edges and, is configurable to communicate, during operation, with at least one adjacent logic tile, and wherein a first logic tile includes: (i) a plurality of static memory cells to store data, wherein each memory cell includes a first output, (ii) a multiplexer including inputs, an output and input selects, (iii) a plurality of poly-silicon conductors, each poly-silicon conductor is disposed in the substrate and connected to the first output of an associated memory cell, (iv) poly-silicon extensions, each poly-silicon extension is (a) connected to an associated poly-silicon conductor and (b) coupled to an associated input select of the multiplexer, wherein the poly-silicon extensions are disposed in the substrate and at least partially under a metal conductor in the first logic tile.
US09543953B2	Semiconductor device having floating body type transistor A semiconductor device includes a first circuit node supplied with a first signal changing between first and second logic levels, a second circuit node supplied with a second signal changing between the first and second logic levels, a third circuit node, a first transistor having a gate electrically connected to the first circuit node and a source-drain path electrically connected between the second and third circuit nodes, the first transistor being rendered conductive when the first signal is at the second logic level, a fourth circuit node supplied with a voltage level being close to or the same as the second logic level, and a second transistor having a gate electrically connected to the first circuit node and a source-drain path electrically connected between the third and fourth circuit nodes, the second transistor being rendered conductive when the first signal is at the first logic level.
US09543952B2	Semiconductor memory device and a method of operating the same A semiconductor memory device includes a ZQ calibration unit configured to generate an output high level voltage (VOH) code according to a VOH control code obtained from a result of comparing a reference voltage with a first VOH; and an output driver configured to generate a data signal having a second VOH determined by the VOH code. The VOH control code includes a pull-up VOH control code and a pull-down VOH control code and the VOH code includes a pull-up VOH code and a pull-down VOH code.
US09543948B2	Physical force capacitive touch sensors A physical force capacitive touch sensor comprises a capacitive sensor element on a substrate, a physically deformable electrically insulating spacer over the capacitive sensor element and a conductive deformable plane over the physically deformable electrically insulating spacer. A protective deformable fascia may be placed over the conductive deformable plane to provide an environmental seal for physical and weather protection, but is not essential to operation of the capacitive touch sensor. Back lighting is accomplished through a light transmissive layer(s) in the capacitive touch sensor. When the conductive deformable plane is displaced toward the capacitive touch sensor element, the capacitance value of the capacitive touch sensor element changes and that change may be detected and used as an actuation signal.
US09543947B2	Semiconductor device A semiconductor device containing a terminal, a power supply voltage dropping circuit that generates a constant voltage, a switch circuit to periodically apply a constant voltage to a terminal in response to a first clock, a current-controlled oscillator circuit, and a counter, and in which the power supply voltage dropping circuit supplies a first current to the switch circuit, the current-controlled oscillator circuit generates a second clock whose frequency changes in response to the value of the first current, and the counter counts the number of second clocks within the counting time.
US09543945B2	Fire sentry System, method, and apparatus for automatically disabling an appliance to prevent accidental fires. A shut-off system is coupled to a smoke detector. When the smoke detector alarm is activated a signal is sent to the shut off system coupled to a cooking appliance. The shut off system includes a timer and an override mechanism. If the override mechanism is triggered prior to the timer expiring, then the shut off system does not activate. If the override mechanism is not triggered prior to the timer expiring then the shut off system activates and decouples the appliance from its power supply.
US09543937B2	Multi-phase clock generation Embodiments are disclosed that relate to multi-phase clock generators and data samplers for use in high speed I/O circuitry. One disclosed example provides a multi-phase clock generator including a delay line having a plurality of delay elements, the delay line being configured to receive an input clock signal and output a plurality of output clock signals having different phases compared to a phase of the input clock signal. The multi-phase clock generator further includes a control circuit configured to control the delay line based at least in part upon rising edges and falling edges of one or more output clock signals output at one or more locations along the delay line.
US09543936B1	Reconfigurable voltage desensitization circuit to emulate system critical paths A circuit for controlling a clock signal may include a voltage source that provides a bias voltage, and at least one delay element having a non-linear capacitive load coupled to an output of the delay element. The non-linear capacitive load receives the bias from the voltage source and controls a delay magnitude applied to a plurality of pulses of the clock signal by the delay element. Based on the bias having a first scaled voltage, the delay magnitude that is applied to the plurality of clock pulses is increased in order to generate a frequency correction to the operating frequency of a microprocessor based on a variation to a microprocessor supply voltage. Based on the bias having a second scaled voltage, the delay magnitude that is applied to the clock pulses is maintained to retain the operating frequency of the clock during the variation to the supply voltage.
US09543935B1	Programmable delay circuit including hybrid fin field effect transistors (finFETs) Embodiments relate to programmable delay circuit. An aspect includes a first stage comprising a first hybrid fin field effect transistor (finFET) comprising a first gate corresponding to a first control FET, and a second gate corresponding to a first default FET, and a first plurality of fins, wherein the first gate and the second gate of the first stage each partially control a first shared fin of the first plurality of fins. Another aspect includes a second stage connected in series with the first stage, the second stage comprising a second hybrid finFET comprising a first gate corresponding to a second control FET, and a second gate corresponding to a second default FET, and a second plurality of fins, wherein the first gate and the second gate of the second stage each partially control a second shared fin of the second plurality of fins.
US09543933B2	Control circuit, DCDC converter, and driving method A current generator circuit included in a triangle-wave generator circuit in a control circuit includes plural stages of current mirrors connected in parallel with each other. The plural stages of current mirrors are placed so that the sum of output currents output therefrom becomes an output current of the current generator circuit. A switching element that controls the on/off state of a current in accordance with the amount of load current of a DCDC converter is connected to each of the current mirrors.
US09543930B2	Apparatuses and methods for duty cycle adjustment Apparatuses and methods for duty cycle adjustment are disclosed herein. An example apparatus may include a node, a phase mixer, and a duty cycle adjuster circuit. The phase mixer may have a first step duty cycle response and may be configured to provide a first output signal to the node in accordance with the first step duty cycle response. The duty cycle adjuster circuit may have a second step duty cycle response complementary to the first step duty cycle response and may be configured to provide a second signal to the node in accordance with the second step duty cycle response.
US09543922B2	Mesa-shaped piezoelectric resonator element A mesa-shaped piezoelectric resonator element including a resonator section having a thicker thickness than a peripheral section on the board surface of a piezoelectric substrate formed in a rectangular shape, wherein, when the length of the long side of the piezoelectric substrate is x and the board thickness of the resonator section is t, etching depth y of a level-difference section is set to fulfill a relationship in the following equation, based on the board thickness t. y = - 1.32 × ( x t ) + 43 ± 5 ⁢ ( % )
US09543921B2	Apparatus and methods for controlling overshoot in digital step attenuators Apparatus and methods for controlling overshoot in digital step attenuators are disclosed. By configuring a multi-bit DSA such that an attenuation control block changes a plurality of control signals in a manner preventing a series cascade of attenuation units from having a transient attenuation value less than an initial and final value of attenuation, an overshoot condition can be prevented. Control signals transition the attenuation units to a first state of attenuation before they transition attenuation units to a second state of insertion.
US09543903B2	Amplifiers with noise splitting Amplifiers with noise splitting to improve noise figure are disclosed. In an exemplary design, an apparatus (e.g., a wireless device, an integrated circuit, etc.) includes a plurality of amplifier circuits and at least one interconnection circuit. The amplifier circuits receive an input radio frequency (RF) signal. The interconnection circuit(s) are coupled between the plurality of amplifier circuits. Each interconnection circuit is closed to short the outputs or internal nodes of two amplifier circuits coupled to that interconnection circuit. The plurality of amplifier circuits may include a plurality of gain circuits coupled to a plurality of current buffers, one gain circuit and one current buffer for each amplifier circuit. Each amplifier circuit provides an output current, which may include a portion of the current from each of the plurality of gain circuits when the plurality of amplifier circuits are enabled.
US09543899B2	Class D power driver peripheral A Class D peripheral is integrated with a microcontroller as a general purpose driver for providing many different Class D power applications such as motor and solenoid control, audio amplification, etc. Use of a simple triangle waveform (saw tooth) oscillator normally used for detecting changes in capacitance values in combination with a voltage comparator provides inexpensive generation of pulse width modulation (PWM) suitable for a wide range of Class D power applications. Selection of either an external audio input or an internal processor controlled analog reference provides for flexible adaptability to any Class D power driver requirement.
US09543897B2	Fully I/Q balanced quadrature radio frequency mixer with low noise and low conversion loss A method, an apparatus, and a system product for mixing radio frequency signals are provided. In one aspect, the apparatus is configured to perform switching of switches based on first, second, third, and fourth phased half duty clock signals. The apparatus convolves a differential input signal on a differential input port with the first, second, third, and fourth phased half duty cycle clock signals to concurrently generate a differential in-phase output signal and a differential quadrature-phase output signal on a dual differential output port. The first, second, third, and fourth phased half duty cycle clock signals are of the same frequency and out of phase by a multiple of ninety degrees with respect to each other.
US09543894B2	Spin oscillator device The present invention relates to using spin transfer torque underneath a nanocontact on a magnetic thin film with perpendicular magnetic anisotropy (PMA), provides generation of dissipative magnetic droplet solitons and report on their rich dynamical properties. Micromagnetic simulations identify a wide range of automodulation frequencies including droplet oscillatory motion, droplet “spinning”, and droplet “breather” states. The droplet can be controlled using both current and magnetic fields, and is expected to have applications in spintronics, magnonics, and PMA-based domain-wall devices.
US09543892B1	Overlapping uncoupled inductors for low-cost multi-frequency voltage-controlled oscillators Certain aspects of the present disclosure provide techniques and apparatus for generating multiple oscillating signals. One example circuit generally includes a first voltage-controlled oscillator (VCO) having a first inductor and a second VCO having a second inductor in parallel with a third inductor, wherein the second and third inductors are disposed inside a loop of the first inductor and may behave as a magnetic dipole. The loop of the first inductor may be symmetrical, and a combined geometry of loops of the second and third inductors may be symmetrical. The coupling coefficient (k) between the first inductor and a combination of the second and third inductors may be small (e.g., k<0.01), due to the symmetrical geometry of the circuit layout. With a smaller k, the first and second VCOs' inductors may be placed closer to one another, thereby reducing an area consumed by the two VCOs.
US09543889B2	Distributed power harvesting systems using DC power sources A distributed power harvesting system including multiple direct current (DC) power sources with respective DC outputs adapted for interconnection into a interconnected DC power source output. A converter includes input terminals adapted for coupling to the interconnected DC power source output. A circuit loop sets the voltage and current at the input terminals of the converter according to predetermined criteria. A power conversion portion converts the power received at the input terminals to an output power at the output terminals. A power supplier is coupled to the output terminals. The power supplier includes a control part for maintaining the input to the power supplier at a predetermined value. The control part maintains the input voltage and/or input current to the power supplier at a predetermined value.
US09543883B2	Low-inductance, high-efficiency induction machine and method of making same An electric drive system includes an induction machine and a power converter electrically coupled to the induction machine to drive the induction machine. The power converter comprising a plurality of silicon carbide (SiC) switching devices. The electric drive system further includes a controller that is electrically coupled to the power converter and that is programmed to transmit switching signals to the plurality of SiC switching devices at a given switching frequency such that a peak-to-peak current ripple is less than approximately five percent.
US09543882B2	AC motor drive system When regenerative power from an AC motor via an inverter exceeds a predetermined power threshold, a charging/discharging control unit, which outputs a control signal for controlling the inverter on the basis of a DC bus voltage value and a charging/discharging current value, causes a power storage device to be charged such that the DC bus voltage value becomes a voltage threshold corresponding to the power threshold and causes a charging current at a start time of charging to the power storage device to start from a charging current value that is based on a DC bus voltage value.
US09543881B2	Rotary electric machine driving device A rotary electric machine driving device that drives and controls an alternating-current rotary electric machine, the rotary electric machine driving device including: an inverter that is electrically interposed between a direct-current power supply and the rotary electric machine, and converts electric power between a direct current and an alternating current; a smoothing capacitor that is electrically interposed between the direct-current power supply and the inverter, and is connected between a positive pole and a negative pole on a direct-current side of the inverter; and an inverter control unit that controls switching of a switching element of the inverter according to a predefined switching frequency.
US09543878B2	Drive unit and transport machine A drive unit includes: an inverter; an electric motor that has a first winding connected to an output part of the inverter and a second winding connected to the first winding; a first semiconductor switch that has a first end connected to the first winding and a second end connected to the second winding; a second semiconductor switch that has a first end and a second end connected to the first winding and the first semiconductor switch; and a snubber circuit that is provided between the second end of the first semiconductor switch and the first end of the second semiconductor switch and has a capacitor and a diode.
US09543870B1	Battery pack fuse monitoring and current limiting system A battery pack monitoring system is provided that continually monitors the current at the fuse and, when the system determines that the fuse is close to its operating limit, limits battery pack current by limiting traction motor torque.
US09543866B2	Motor drive controller and method for detecting rotation state A motor drive controller is for controlling a motor having multiple phases and includes: a comparison reference voltage generator that generates a predetermined constant voltage as a comparison reference voltage; a counter-electromotive voltage comparator that compares the comparison reference voltage with a counter-electromotive voltage of each phase of the motor; and a rotation state detector that detects a rotation state of the motor based on positive/negative polarities of counter-electromotive voltages of other phases with respect to the comparison reference voltage at the time of an occurrence of a zero cross between the counter-electromotive voltage of any one phase and the comparison reference voltage.
US09543865B2	Device for driving three-phase brushless motor The present invention allows a driving device, which drives a three-phase brushless motor in a sensorless manner, to detect an initial position of the brushless motor and start drive of the motor without performing positioning processing. In a device for driving a brushless motor by sequentially switching six energizing modes, in which two phases to be energized are selected out of three phases, energization is performed sequentially in six energizing modes before start of drive so that the motor does not rotate, and each induced voltage of an opened phase is acquired, induced voltage difference is obtained in each predetermined combination of energizing modes, and it is estimated to which one of six divided regions an initial position of the brushless motor corresponds based on a maximum value of induced voltage differences obtained.
US09543861B2	Piezoelectric generator The present disclosure provides an ionic ring comprising a number of piezoelectric elements, a piezoelectric device including the ionic ring, and a piezoelectric generator including the ionic ring and host devices incorporating the piezoelectric generator. The piezoelectric generator can be used to generate energy on a portable electronic device in response to mechanical deformation. The generated energy can be used instead of a battery of the portable electronic device or can be used to charge the battery.
US09543859B2	System and method for active/reactive power compensation Systems, methods, and devices for use with active/reactive power control in power conditioning systems. To provide quick active/reactive power control by way of a grid-connected inverter, an estimator estimates the P and Q coefficients based on an instantaneous power from the grid-connected inverter. The estimator receives grid current and voltage and estimates of the P and Q coefficients are used with reference P and Q values to determine whether active or reactive power needs to be injected to the grid. The P coefficient is a DC offset of the instantaneous power of the grid and the Q coefficient is the coefficient of a sine component of the instantaneous power.
US09543855B2	Voltage source converter (VSC) with neutral-point-clamped (NPC) topology and method for operating such voltage source converter A Voltage Source Converter (VSC) (10) with Neutral-Point-Clamped (NPC) topology with one or more phases, comprises an intermediate DC circuit having at least a first and a second capacitance connected in series between a positive terminal and a negative terminal, providing a central tap terminal between both capacitances, and at least one sub-circuit for generating one phase of an alternating voltage, each sub-circuit comprising an AC terminal for supplying a pulsed voltage; a circuit arrangement of the form of a conventional NPC converter, with a first series connection of at least two switches between said AC terminal and said positive terminal, a second series connection of at least two switches between said AC terminal said negative terminal, and switchable connections from said central tap terminal to the centers of both two-switch series connections; and additional first and second auxiliary switches assigned to said two-switch series connections.
US09543852B2	Method and system for controlling a DC link voltage of a power converter connecting an electric generator of a wind turbine with a power grid A method is provided for controlling a DC link voltage of a power converter connecting an electric generator of a wind turbine with a power grid. The method includes determining the rotational speed of a rotor of the electric generator. The method further includes determining a strength of harmonic components of the rotational speed of the rotor, wherein the harmonic components have frequency components being different from a fundamental rotational frequency of the electric generator. The method also includes determining a damping reference signal as a function of the determined strength of the harmonic components, and controlling the DC link voltage of the power converter in response to the determined damping reference signal. A corresponding control system is also provided.
US09543847B2	Switched mode power supply with improved light load efficiency A control circuit operable to control the switching of switching elements in a switched mode power supply. The control circuit comprises a switching control signal generator operable to generate control signals for switching the switching elements such that the switched mode power supply converts an input voltage (Vin) to an output voltage Vout). The control circuit further comprises an operation mode setting module which is operable to receive a signal (I) indicative of a current flowing to a load that is connected to an output of the switched mode power supply, and operable to cause the switching control signal generator to generate the control signals so as to operate the switched mode power supply in a continuous conduction mode or a pulse skipping mode in dependence upon the current.
US09543844B2	System and method for a switched-mode power supply In accordance with an embodiment, a method of operating a switched-mode power supply includes synchronously rectifying a current in a secondary side of the switched-mode power supply by detecting a voltage drop of a secondary winding of a transformer and activating a semiconductor switch coupled to the secondary winding when the voltage drop is detected. The method also includes determining a digital signal transmitting the digital signal to a controller coupled to a primary winding of the transformer by switching the semiconductor switch in accordance with the digital signal.
US09543838B2	Phase fault detection in switching power converters A switching power converter includes a phase operable to deliver a phase current to a load through an inductor. The phase current has an expected sawtooth or triangular ripple pattern. The switching power converter further includes a measuring unit operable to measure the phase current at two or more different points of a switching cycle during which the phase is turned on over a first interval of the switching cycle and turned off over a second interval of the switching cycle. The switching power converter also includes an analysis unit operable to determine whether the phase is faulty based on the phase current measurements taken at the two or more different points of the switching cycle. A corresponding method of detecting a phase fault in a switching power converter is also provided.
US09543836B2	Control device of a power conversion circuit In a control device of a power converter circuit repeating accumulation of energy to an inductor and release of energy from the inductor at each turn on/turn off timing of a switch, a zero cross detecting circuit detects a time when a current flowing through the inductor becomes zero by inputting a voltage between both terminals of the inductor directly without any resistance for detecting the inductor current. There is no electricity loss caused by the resistance for detecting the inductor current and critical mode control of the power converter circuit is precisely carried out.
US09543835B2	DC/DC converter, power supply circuit, and semiconductor device Provided is a DC-DC converter with improved power conversion efficiency. A transistor which is incorporated in the DC-DC converter and functions as a switching element for controlling output power includes, in its channel formation region, a semiconductor material having a wide band gap and significantly small off current compared with silicon. The transistor further comprises a back gate electrode, in addition to a general gate electrode, and a back gate control circuit for controlling a potential applied to the back gate electrode in accordance with the output power from the DC-DC converter. The control of the potential applied to the back gate electrode by the back gate control circuit enables the threshold voltage to decrease the on-state resistance when the output power is high and to increase the off-state current when the output power is low.
US09543831B2	Configurable DC-DC converter A method includes, in a mobile communication terminal that is powered by a DC-DC converter and is operated by a user in accordance with multiple possible usage scenarios, predefining for each of the possible usage scenarios a repective set of one or more parameters of operation for the DC-DC converter. When the user operates the terminal in accordance with a given usage scenario from among the possible usage scenarios, the predefined set of parameters of operation corresponding to the given usage scenario is selected, without physically sensing an electrical current drawn by the DC-DC converter. The DC-DC converter is configured to supply electrical power to the terminal using the selected parameters of operation.
US09543829B2	Switching regulator and comparator-based zero current detection method used by the switching regulator Provided are a switching regulator and a comparator-based zero current detection method. The switching regulator comprises: a switch configured to connect to a switching node and control an inductor current flowing through the switching node; and a switch controller configured to control a turn-off time of the switch by detecting a change in a voltage of the switching node after the switch is turned off, wherein the switch controller comprises: a comparator configured to compare a first voltage applied to a first input terminal connected to the switching node with a second voltage applied to a second input terminal connected to a first terminal of the switch; and a control logic configured to receive a comparison signal of the comparator and control an offset of the comparator to adjust the turn-off time of the switch.
US09543826B2	Audible noise avoiding circuit and DC-DC boost converter having the same An audible noise avoiding circuit and a DC-DC boost converter for a DC-DC boost converter are provided. The audible noise avoiding circuit comprises a timing controller and a linear regulator. The timing controller discharges a timing capacitor to a low voltage according to switching of the DC-DC boost converter. A sink output stage of the liner regulator is coupled to the output voltage node. When the voltage of the timing capacitor is higher than a threshold voltage, the compensation unit compensates the output of the operational amplifier for gradually turning on the sink output stage in order to gradually reduce the voltage of the output voltage node. A predetermined charging time interval is defined by the time interval of charging the timing capacitor from the low voltage to the threshold voltage, the reciprocal of the predetermined time interval is a frequency in the ultrasonic wave frequency range.
US09543817B2	Hollow magnetic metal core pulse energy harvesting generator This invention relates to energy harvesting of electrical energy by the change in a magnetic circuitous permeability path for magnetic lines of force that move through a coil of wire to induce, by Faraday's Law of Electromotive Induction, an electromotive force at the coil winding terminals of an associated coil. An abrupt, substantially instant change generated by a magnet's axial or angular mechanical and magnetic contact or dislocation through instant movement of the magnet by magnetic unlike pole spring back attractive force action with a high permeability stationary hollow or solid magnetic metal core centered in a coil bobbin with a wire wound wire coil providing efficient electrical generation therefrom.
US09543815B2	Split permanent magnet machine The invention relates to an electrical energy conversion system (11) which is particularly suited for use in wind energy conversion systems. The system includes two magnetically separated permanent magnet machines (25, 27) linked by a freely rotating rotor (19) housing permanent magnets (39). The first machine is typically a synchronous generator, and the second an induction generator. The synchronous generator (25) has a stationary stator (21) which is connectable to an electrical system such as an electricity grid, and the induction generator (27) has a rotor (17) which is connectable to a mechanical drive system such as, for example, a wind turbine.
US09543814B2	Method of making a heat transfer element for an electric machine An electric machine, such as a generator, providing for the generation of electricity and includes a rotor generating a magnetic field and a stator having stator windings. The interaction of the magnetic field with the stator windings generates current in the windings. The generator may provide the generated current to a power output of the generator, where it may be further transmitted to an electrical load to power the load.
US09543812B2	Multi-phase electric circuit A multi-phase electric circuit including an electric machine and an inverter, wherein machine encompasses a rotor connected to the inverter via at least two brushes for each phase, wherein each of the brushes of each phase is connected to the inverter via a separate brush line.
US09543811B2	Heatsink design with thermal insulator to reduce encoder temperature An electric motor assembly including a housing, an electric motor supported in a motor compartment of the housing, an encoder operatively coupled to the electric motor and supported in an encoder compartment of the housing, and a heat sink surrounding at least a portion of the encoder, the heat sink in thermal contact with an end cap of the housing at least partially defining the encoder compartment, whereby the heat sink is adapted to absorb heat from the encoder and conduct heat to the end cap.
US09543809B2	Radial vent composite heat pipe A radial vent composite heat pipe system for cooling and increasing the power density of an electrical machine is provided. The system comprises a plurality of radial vent composite heat pipe assemblies each comprising a slot portion thermally connected to a vent portion. The slot portions are disposable within respective stator slots of a stator core pack of a stator assembly of the electrical machine. The vent portions are disposable within stator vents of the stator assembly. The slot portions absorb heat from the stator coils of the stator assembly and transfer the absorbed heat to the vent portions. The vent portions reject the transferred heat into a cooling air flowing through the respective stator vent, thereby rapidly transferring heat from the respective stator coil to the cooling air flowing through stator vent, and thereby greatly increasing the power density of the electrical machine.
US09543805B2	Axial bearing device having increased iron filling An axial bearing device includes an annular electrical sheet arrangement having individual sheets which protrude radially outward. In addition, an electrical coil is provided in the axial bearing device and is inserted into the electrical sheet arrangement to generate a magnetic field in the electrical sheet arrangement. The electric sheet arrangement includes at least two concentric electrical sheet rings. All adjacent electrical sheets of each electrical sheet ring substantially abut at the inner circumference of the respective electrical sheet ring.
US09543803B2	Heat circulation pump A heat circulation pump includes a pump housing (1) with a pump impeller driven by an electric motor. The electric motor is arranged in a motor housing (8) connected to the pump housing (1). A plastic terminal box (12) is fixed to the motor housing (8) and houses electric and/or electronic components of the engine control and electrically connects the motor, a ground contact arranged on the motor housing (8), and a plug or a socket (34) arranged on the outside of the terminal box (12). The ground contact arranged on the motor housing is connected in an electrically conductive manner to a ground contact of the plug or socket (34) and to at least one conductor inside the terminal box (12). The electric connection between the ground contact arranged on the motor housing (8) and the ground contact of the plug or socket (34) is arranged outside of the terminal box (12).
US09543799B2	Single rotor-type motor A single rotor type motor includes: a stator including a plurality of stator cores that are divided in a plural number and radially arranged, a bobbin made of an insulating material and wrapped on an outer surface of each of the stator cores, and coils wound on an outer surface of the bobbin; and a single rotor disposed with a certain gap from any one surface of an inner surface of the stator and an outer surface thereof, wherein a wiring unit for electrically wiring coils wound on each stator core is integrally formed with the bobbin, and the wiring unit is arranged at an opposing end to an end facing the rotor of the stator core.
US09543798B2	Electric motor A rotor for an electric motor has an iron core and a winding wound about teeth of the rotor core. Slots are formed between the teeth to accommodate coils of the winding. The winding includes several layers of windings distributed in the radial direction of the rotor. Each winding layer has a plurality of coils with the coils of each winding layer being wound on the teeth in the circumferential direction of the rotor. The overall center of gravity of the winding layers is substantially positioned at the geometric center of the rotor. Thus the center of gravity of the entire winding is located substantially at the geometric center of the rotor, thereby preventing noise caused by unstable rotation due to the deviation between the center of gravity of the winding and the geometric center of the rotor.
US09543795B2	Rotor for an electrical machine and relative assembly method A rotor for an electrical machine includes a laminated core having a main axis and a plurality of poles delimiting a plurality of radial seats extending along the main axis, each seat being delimited by a first and a second pole. The rotor includes a plurality of magnets inserted in the seats and a plurality of springs locking the magnets in the seats; the springs acting between each magnet and the first pole delimiting the relative seat for pushing each magnet towards the second pole delimiting the same seat.
US09543791B2	Power transmission apparatus, power transmission method, and storage medium A waiting time during which receiving of a power receiving request is accepted from a power transmission apparatus is appropriately managed, to shorten a time required until power transmission is completed.
US09543790B2	Apparatus for transmitting magnetic resonance wireless power using higher order mode resonance, receiving terminal, and method for transmitting and receiving wireless power using the same A method includes matching a basic mode frequency signal and a higher order mode frequency signal to a multi-band frequency signal with respect to a signal in the form of the square wave, transferring the matched basic mode frequency signal and higher order mode frequency signal simultaneously to a multi-resonance reception resonator, converting output impedance of the basic mode frequency and the higher order mode frequency which are received through the reception resonator into a conjugate value of input impedance of the basic mode frequency and the higher order mode frequency of a receiver, and converting the converted multi-band frequency signal into an electric power that is required in a load and transferring the electric power to the load.
US09543784B2	Electric power supply system cooperated by a battery and a super capacitor An electric power supply system cooperated by a battery and a super capacitor includes a power source module and a processing unit. The power source module includes an electric power transformer, a battery, and a super capacitor. The electric power transformer is electrically connected to the battery and the super capacitor. The processing unit is electrically connected to the electric power transformer for controlling the battery to charge the super capacitor, such that both the battery and the super capacitor supply electricity to the load, and such that electricity generated by the load can recharge the super capacitor. The electricity power supply system can avoid an increase of the working temperature of the battery.
US09543783B2	Charging module and rechargeable battery assembly for electric vehicle A rechargeable battery assembly for an electric vehicle is disclosed in the present invention. It includes at least one rechargeable battery module which has a number of rechargeable battery cells linked in series or in parallel for providing power to the electric vehicle, and a management unit, installed with a first program, for managing the rechargeable battery cells; and a charging module for providing power to the rechargeable battery module, including an updating unit connected to the charging module for automatically detecting version of the first program and updating the first program while a newer version is available while electrically connected to the rechargeable battery module. Battery management system of the rechargeable battery assembly can be updated by the updating unit. Therefore, the rechargeable battery module can be applied to different requirements with its best performance.
US09543779B2	Method for transferring wireless power This invention defines management protocols for wireless power transfer to multiple devices in Multi-device Wireless Power Management System. Various functions of Multi-device Wireless Power Management System are justified from this invention. The WPT frames and messages which work between the management block of a charger and the management block or the coupler block of a device, or the coupler block of a charger are defined as well to execute various functions. Also the procedures for each functionality are described based on its frames and messages.
US09543778B1	Device for recharging hearing aid batteries using USB dongle Disclosed herein, among other things, are methods and apparatus for recharging hearing aid batteries using a USB adapter. A system includes a hearing assistance device and a battery recharger. The hearing assistance device includes a rechargeable battery, a recharge coil configured to receive power across a wireless inductive link, and charging circuitry configured to control power received by the recharge coil to recharge the battery. The battery recharger includes a device compartment configured to receive the hearing assistance device, a transmit coil configured to transmit power across the wireless inductive link, and a USB adapter port configured to connect to a USB adapter. The USB adapter is configured to provide power to the recharger.
US09543774B2	Supply circuit in a communication system of a protective headgear, protective headgear with such a supply circuit and method for operating such a supply circuit A power source (30, 32) supply circuit (28) is provided in a communication system of protective headgear for supplying a communication system from a power source (30, 32) associated with the protective headgear. The supply circuit (28) includes a boost converter (44) for better utilization of the electric power supplied by the power source (30, 32). Protective headgear is provided with such a supply circuit (28) for supplying the protective headgear. A method is also provided for operating such a supply circuit (28).
US09543773B2	Power storage device and charging method thereof An object is to inhibit a decrease in the capacity of a power storage device or to compensate the capacity, by adjusting or rectifying an imbalance between a positive electrode and a negative electrode, which is caused by decomposition of an electrolyte solution at the negative electrode. Provided is a charging method of a power storage device including a positive electrode using an active material that exhibits two-phase reaction, a negative electrode, and an electrolyte solution. The method includes the steps of, after constant current charging, performing constant voltage charging with a voltage that does not cause decomposition of the electrolyte solution until a charging current becomes lower than or equal to a lower current value limit; and after the constant voltage charging, performing additional charging with a voltage that causes decomposition of the electrolyte solution until a resistance of the power storage device reaches a predetermined resistance.
US09543772B2	Short circuit protection for a portable device powered by a battery pack having undervoltage protection A portable device includes set of charger contacts and a set of battery contacts. The battery contacts mate with corresponding contacts of a battery pack used to power the portable device, and the charger contacts allow charging of the battery pack while connected to the portable device. The battery pack includes an undervoltage protection circuit that opens when an undervoltage condition occurs across the battery pack contacts. The portable device further includes short circuit protection element connected between corresponding contacts of the set of battery contacts and the set of charger contacts that, upon a short circuit condition occurring at the charger contacts, prevents the undervoltage protection circuit from tripping and opening.
US09543771B2	Telescopic transmission cable device and mobile terminal Disclosed are a telescopic transmission cable device and a mobile terminal. The device comprises: a cable body and a rectification part, wherein the cable body comprises at least two wires insulated inform each other, one end of the cable body is a built-in end while the other end is an external connection end; when the cable body is coiled up into a coil, the external connection end and the built-in end are respectively connected to two input ends of the rectification part, and the two output ends of the rectification part are respectively connected to a positive and negative electrodes of a power supply to be charged; and when the cable body is in a linear shape, the external connection end is connected to an external device, the two wires of the built-in end are respectively connected to the positive and negative electrodes of the power supply to be charged, and the two output ends of the rectification part are respectively disconnected to the positive and negative electrodes of the power supply to be charged. The telescopic transmission cable device is applicable to a variety of mobile terminals.
US09543770B1	Portable device having electric outlets that provide AC electrical power and electrical power for charging electronic communication devices A portable apparatus for providing electrical power receptacles and device charging ports has a bottom panel member having a top side and a bottom side. A wall structure is attached and substantially perpendicular to the top side of the bottom panel member. The wall structure defines an interior region and comprises a plurality of sections wherein each section has an opening therein. Electrical power devices are located within the interior region. Each electrical power device is attached to a corresponding section of the wall structure and has an electrical power receptacle and device charging ports that are positioned within the opening in the corresponding section of the wall structure. A top panel member covers the interior region defined by the wall structure. The wall structure is attached to the top panel member. An electrical power cable is electrically connected to all of the electrical power devices.
US09543765B2	Centralized DC power supply control system and method of economically controlling power consumption An economical centralized DC power consumption control system is used to separate electric power into an AC circuit for high-power-consumption electric appliances such as TV set, refrigerator, washing machine, and air conditioner and a DC circuit for low-power-consumption electric appliances such as lamp, electric fan, notebook computer, tablet computer, mobile phone, and digital camera. The DC circuit is equipped with multiple high-powered power supplies, each of which transforms commercial power to DC power, provides electricity to various low-power-consumption electric appliances, and directly links the electric appliances for supply of electric energy without individual rectifiers/transformers.
US09543759B2	On-board-unit for use in vehicle identification A system and method for automatic identification and recording of vehicles passing a road user charging point or location. A system and method for powering an on-board-unit (OBU) that can be mounted in a vehicle by including an energy harvester capable of providing at least a part of the energy required to operate the on-board-unit.
US09543756B2	Pulse generator circuit arrangement and method for generating pulsed signals for insulation fault location in IT networks A pulse generator circuit arrangement for the search for insulation faults in IT networks includes a rectifier circuit for transforming an IT network voltage into a DC intermediate circuit and switching elements having a trigger signal input for switching on and off a DC intermediate circuit voltage. A circuit device downstream of the switching elements generates a pulsed current to be supplied to the IT network. The circuit arrangement includes a control and evaluating logic for determining the insulation resistance of the IT network and also a circuit device for generating the pulsed current, which is formed as a current regulating device and allows a dynamic adjustment of the pulsed current depending on the determined insulation resistance.
US09543755B2	Automotive electrically-actuated device end-of-travel detection An automotive electronic control unit configured to control an automotive electrically-actuated device which is required to move from/to one or more end-of-travel positions, wherein the electronic control unit is configured to detect reaching an end-of-travel or stall position by the automotive electrically-actuated device based on: amplitude of the electric current absorbed by the automotive electrically-actuated device, gradient of amplitude of the electric current absorbed by the automotive electrically-actuated device, and ripple frequency of amplitude of the electric current absorbed by the automotive electrically-actuated device.
US09543753B2	Protection device for electrical appliances, in particular electric motors, compressors and transformers A protection device is provided for electric appliances suitable for selectively connecting an electric appliance to a power supply line. The protection device includes a metal plate member, a composite metal blade, an insulating block for supporting the metal plate member and the composite metal blade, and a compensating resistor made en bloc with the metal plate member.
US09543752B2	Overvoltage protection circuit with digital control A device for digitally protecting against an overvoltage event may include a front-end circuit, an overvoltage protection circuit, and a protection switch. The protection switch may be coupled to the overvoltage protection circuit and may be configured to decouple the front-end circuit from an external medium, in response to a clamp signal. The overvoltage protection circuit may be configured to detect the overvoltage event at one or more nodes of a circuit. In response to the detection of the overvoltage event, the overvoltage protection circuit may generate the clamp signal to activate the protection switch.
US09543741B1	Temporary attachment equipotential grounding tool An equipotential grounding tool adapted to provide a temporary grounding and bonding point for establishing an equipotential work area for electrical linemen. The tool has has a variety of attachment fastening means for securing the tool to a fixed point. Once secured the tool provides common grounding and bonding contact points for interconnecting the surrounding surfaces and/or devices.
US09543734B2	Laser arrangement for generating a twice frequency converted laser radiation A laser arrangement for generating a twice frequency-converted laser radiation is disclosed, comprising the following: an active medium which by radiation of pump light generates a first laser radiation with a first frequency; a first laser resonator inside of which the first laser radiation circulates while resonating; a first non-linear crystal which is arranged inside of the first laser resonator and is provided and established to convert the first laser radiation into a second laser radiation with a second frequency that is higher than the first frequency; a second laser resonator inside of which the second laser radiation circulates while resonating; a second non-linear crystal which is arranged inside of the second laser resonator and is provided and established to convert the second laser radiation into a third laser radiation with a third frequency that is higher than the second frequency, wherein the first laser resonator and the second laser resonator are arranged relative to each other such that they have a joint optical section through which both the first laser radiation, circulating in the first laser resonator, and the second laser radiation, circulating in the second laser resonator, radiate. The first laser resonator and the active medium are designed and arranged such that the first laser radiation consists of precisely two adjacent longitudinal modes with two frequencies, wherein the first frequency of the first laser radiation is a sum frequency of these two frequencies, and in that the second laser resonator has an optical path length which allows for a resonance of merely a single longitudinal mode of the second laser radiation.
US09543733B2	Photonic bandgap fiber and fiber laser device using same There is provided a photonic bandgap fiber used in a state in which at least a part of the photonic bandgap fiber is bent at radii of 15 cm or greater and 25 cm or less. A large number of high refractive index portions 57 are disposed in a nineteen-cell core type in three layers, and a V value is 1.5 or greater and 1.63 or less. In the high refractive index portions 57, conditions are defined that a relative refractive index difference is Δ% and a lattice constant is Λ μm so as to remove light in a higher mode at the bent portion as described above.
US09543729B2	Electrical connector with removable external load bar, and method of its use An electrical connector for Ethernet cable, having an elongated hollow housing with a forward end wall which must correctly fit within the opening in a mating connector, in which the forward end wall has a thickened outer portion that must be sheared off to fit the mating connector, and in which the thickened portion is formed integral with the wall so that it continues to support the wall while being sheared off.
US09543725B2	Pliers for crimping electrical terminals Pliers include a pair of arm members, a pair of handles, at least one interchangeable working jaw and a control mechanism. Each arm member includes two parallel arm plates. The handles are connected to each other for movement of the arm members towards and away from each other. The working jaw is detachably supported in between the arm plates of the associated arm member. The control mechanism includes a retaining spacer, a driving member and a spring biased between the retaining spacer and the driving member. The retaining spacer is positioned in between the arm plates of the arm member. The driving member is movably disposed in between the arm plates of the arm member and has an end knob exposed outside the arm member so that pressing of the end knob of the driving member drives the driving member to be engaged with or disengaged from the working jaw.
US09543723B1	Trailer light harness cleaner The trailer light harness cleaner includes a plunger that is affixed to an insert, which slides back and forth within an outer sleeve. The insert includes at least one sanding element that is adapted to sand against an electrical terminal of a trailer light harness. The insert is either male-oriented or female-oriented so as to adaptively clean either a male or female light harness. The sleeve is adapted to interface with a light harness, whereas the insert is able to slide back and forth in order for the at least one sanding element to adaptively clean terminals associated with the respective light harness.
US09543719B2	Electrical connector for a vehicle An electrical connector comprises a dielectric body having a socket. A plurality of pivotable arms are hinged to the dielectric body. A releasable locking mechanism holds the pivotable arms in a locked position that releases with an outward pulling force exceeding a threshold force. The releasable locking mechanism comprises two or more latch members that are biased by corresponding springs against the corresponding pivotable arms. Each pivotable arm has a protrusion that divides a first region from a second region of the pivotable arm.
US09543718B2	Plug connector assembly A plug connection having a first plug connector and a second plug connector, wherein the plug connectors each have at least two contact elements, wherein the contact elements of the first plug connector make contact with the contact elements of the second plug connector at contact points in the plug-connected state of the plug connection, such that the contact elements of the two plug connectors are designed in the form of contact lugs which project into a free space and can be elastically deflected.
US09543714B2	Modular inserted connector detecting structure The present invention is a modular inserted connector detecting structure, which comprises a connector (such as USB connector) having an insulation body and multiple signal terminals, wherein two sides of the insulation body may have a first and a second detection modules joined therewith, or one surface of the insulation body is provided with a detection module thereon. Thereby, in assembly, the first and second detection modules may be used to join the two sides of the insulation body directly, or a scarfing seat of the detection module may be used to join on the insulation body, in order to achieve the effects of easy structure, convenient assembly, robust joining and facility to produce and manufacture.
US09543712B2	Intrinsically safe wireless dongle for a field device A wireless dongle for use in the potentially explosive area for an automation field device to connect to an electrical interface of the field device, having a wireless circuit for sending and receiving wireless signals and a connector element. The wireless dongle can be detachably fitted to the electrical interface by means of the connector element. The connector element has several contact elements, wherein the contact elements are attached to a printed circuit board in the wireless dongle, that a first contact element is used to supply the wireless dongle with energy, that an energy buffer on the printed circuit board is provided which is downstream of the first contact element. The connector element has a second contact element which is used to transmit data between the field device and the wireless dongle, that in each case there is at least one limiting resistor is downstream of the first contact element and the second contact element, and that the resistors and the energy buffer of the wireless dongle are encapsulated by means of a potting compound.
US09543702B2	Connector A connector has a housing (10) with a lock arm (18) and a slider (60) that is movable on the housing (10) between an advanced position and a retracted position. A deflection regulating portion (67) projects from the slider (60) into a deflection space (24) for the lock arm (18) on a rear part of the lock arm (18) when the slider (60) is at the retracted position. The deflection regulating portion (67) is configured to regulate deflection of a lock arm (18). The slider (60) includes an unlocking portion (64) configured to cover a releasing surface of the lock arm (18) from a side opposite the deflection space (24) at the advanced position and has a shape suspended toward the deflection space (24). The unlocking portion (64) presses the releasing surface by receiving an operation force (F) that deflects the lock arm (18) in an unlocking direction.
US09543701B2	Surface-optimised plug-in connector A plug-in connector comprising a plug-in connector housing and a locking element for mechanically connecting the plug-in connector housing to a counterpart plug-in connector. The locking element is externally accessible on the plug-in connector housing. Protective elements, which protect the transition regions, are provided at transition regions between the plug-in connector housing and the locking element.
US09543697B2	Connector having a housing with a fitting tube with guide walls with a lock arm inbettween A connector has a slider (60) with a base (61) extending along a width direction and to be inserted below a lock arm (17). Two arms (62) project from opposite widthwise ends of the base (61). A coupling (63) couples projecting end parts of the arms (62) and faces an upper surface side of the lock arm (17). A deflectable initial position holding portion (76) is provided on the base (61) and is configured to regulate a movement of the slider (60) to a connection position by resiliently locking an initial position holding receiving portion (25) of a housing main body (11) at an initial position. A connection position holding portion (64) is provided on the coupling (63) and is configured to regulate a detachment of the slider (60) by contacting a connection position holding receiving portion (23) of the lock arm (17) at the connection position.
US09543693B2	High-voltage arrangement The invention relates to a high-voltage arrangement (1), preferably for a motor vehicle, comprising a housing (2), a high-voltage plug (4) arranged on the housing (2) for the insertion of a high-voltage mating plug (5), a cover (3) that can be mounted on the housing (2) and dismounted, and a spring device (6) comprising at least one first spring element (10) which, when the cover (3) is not mounted, blocks the high-voltage mating plug (5) from being inserted into the high-voltage plug (6), and said cover (3), when mounted, pushing said first spring element (10) down such that the high-voltage mating plug (5) may be inserted into the high-voltage plug (4).
US09543691B2	Coaxial cable connector having an activatable seal A connector including a cavity for stowing a pre-installed sealing member. The sealing cavity is defined by a first or coupler seal cavity formed on the inside surface of a coupler and a second or insert seal cavity formed on the outer periphery of an insert. Relative motion of the coupler and the insert during assembly causes the sealing member to be displaced from a stowed or inactive seal position to an assembled or active seal position.
US09543690B2	Minerally insulated cable connector An electrical connector assembly for the electrical connection of one or more minerally insulated cables (11), the assembly comprising a pot seal arrangement (10) arranged in use to connect the minerally insulated cable (11) to a connector (22); at least one cable alignment plate (21, 31); and, a backshell (20) shaped so as to contain the pot seal (10) and cable alignment plate (21); the cable alignment plate (21) and pot seal (10) being arranged so as to locate within the backshell (20) such that in use, connecting the backshell (20) to the connector (22) forces the backshell (20), cable alignment plate (21) and pot seal (10) into a cooperative engagement.
US09543686B2	Contact element for mechanically, thermally and electrically contacting an energy store A contact element for mechanically, thermally and electrically contacting at least one energy store at least partially delimits at least one accommodating space for accommodating the at least one energy store. The contact element is designed for a force-fit, form-locked and/or integral joint with at least one subarea of the energy store, the contact element being at least partially electrically conductive, and the contact element being at least partially thermally conductive.
US09543683B2	Connector housing for an electric plug connector A connector housing for an electrical connector has a housing body having one or more contact receiving passageways and one or more contact-securing members. Each contact-securing member is pivotably mounted on the housing body about a pivot axis, spaced apart from the pivot axis and extending parallel to the pivot axis, and pivotable about the pivot axis into the contact receiving passageway. The contact-securing member has a latching lug, a securing arm extending towards the contact receiving passageway, and a recess positioned on a side of the securing are opposite the latching lug.
US09543677B1	Quick connector A quick connector has a tubular male member with an interior lumen, an outbound end configured to allow connection to a hose and to a current conductor, and a pair of opposed radially outwardly projecting protuberances. A tubular female member has an interior lumen, an outbound end configured to allow connection to a hose and to a current conductor, and an inbound end sized to receive an inbound end of the male tubular member. The female member has a sleeve with an undercut lip at an inbound end with opposed slots sized to receive the opposed protuberances of the tubular male member.
US09543675B1	Board-to-board connector assembly and connector In a board-to-board connector assembly, a plug-side power contact includes a first flat surface portion having a plate-like shape, a second flat surface portion having a plate-like shape and being opposed to a first part of the first flat surface portion and a power-contact-side connection portion connecting the first and second flat surface portions to each other. The first flat surface portion has the first part facing in parallel to the second flat surface portion and a second part or an upper end portion other than the first part. The first part includes a thinned portion having a shape recessed more deeply than a surface of the upper end portion and having a smaller thickness along the third direction than a thickness of the upper end portion.
US09543674B2	Electronic unit, in particular capacitive proximity sensor An electronic unit has an electronic assembly that comprises a circuit board, and also having a conductor that is connected to said electronic assembly and is provided with a flat connection end. At least one piercing contact protrudes down from the circuit board and connects the conductor electrically to the electronic assembly. The piercing contact penetrates the connection end of the conductor while forming an electrical connection with a conductor track of the conductor. The electronic component is particularly suited as a capacitive proximity sensor for a vehicle.
US09543671B2	Terminal block A terminal block for electrically connecting a plurality of first wires connected to an electric motor and a plurality of second wires connected to a power conversion device for supplying drive power of the electric motor includes a case, a plurality of terminals housed in the case and configured to connect the plurality of first wires and the plurality of second wires to each other, a partition wall provided between the plurality of terminals to electrically isolate the plurality of terminals from each other, and plate-like members provided between the partition wall and the terminals and made of a material with a higher elasticity than the case and the partition wall.
US09543670B2	Multi-conductor cable connector for multiple coaxial cables A multi-conductor cable connector for coaxial cables is provided, the connector including a cable connection portion, wherein the cable connection portion receives a prepared multi-conductor cable having a plurality of conductive strands concentrically sharing a common central axis, and a multi-contact portion coupled to the cable connection portion, the multi-contact portion having a plurality of contacts non-concentrically aligned with the cable connection portion. A fastener member may be used to receive portions of two prepared cables and a hollow clamping member. The fastener member compresses the hollow clamping member onto a portion of each of the two prepared cables.
US09543669B2	Supported termination The present invention relates to an assembly for the improved connection or termination of one or more minerally insulated cables, the assembly comprising an electrically insulating plate comprising one or more channels to accommodate and support one or more inward cables; one or more channels to accommodate and support one or more outward cables; one or more recesses to accommodate one or more electrical components; one or more terminal studs arranged to connect said at least one inward and outward cable; and a protective cover comprising one or more protective plates locatable over the electrically insulating plate and cables and further comprising one or more recesses located so as to provide access to each of the one or more terminal studs.
US09543665B2	Insulation displacement connector An insulation displacement contact includes a monolithic electrically conductive contact body that includes mating portion and a mounting portion. The mating portion defines a pair of insulation displacement slots configured to receive an electrical cable delivered by a connector housing.
US09543663B2	Terminal structure of coaxial cable, and connection structure of terminal of this coaxial cable A terminal structure include an internal conductor connection portion, a removal portion and an external conductor connection portion. The internal conductor connection portion is connected to a internal conductor via a conducting portion and an external conductor. The removal portion is provided at a rear side relative to the internal conductor connection portion. The external conductor connection portion is provided at a rear side relative to the removal portion, is formed in the outer peripheral surface of the external conductor, is shut off from the internal conductor connection portion by the removal portion, and is connected to the external conductor.
US09543661B2	RF module and antenna systems Architectures and implementations of a transceiver system for wireless communications are presented, the system including one or more antennas supporting a single frequency band or multiple frequency bands, a transmit circuit, a receive circuit, and an isolation circuit that is coupled to the one or more antennas and the transmit and receive circuits and provides adequate isolation between the transmit circuit and the receive circuit.
US09543660B2	Electronic device cavity antennas with slots and monopoles An electronic device may be provided with wireless circuitry. The wireless circuitry may include cavity antennas. A cavity antenna may be formed from a metal antenna cavity and resonating element structures. The metal antenna cavity may be formed from metal traces on a dielectric carrier. The resonating element structures may include directly fed and indirectly fed slot antenna resonating elements and monopole antenna resonating elements. The metal antenna cavity may exhibit a resonance that is tuned using a transmission line tuning stub. Filters and duplexer circuits may be used in routing signals at different frequency bands among the antenna resonating elements.
US09543659B2	Reflector antenna device A reflector antenna device is configured to include a main reflector 1 that has a rectangular aperture shape 2, and a primary radiator 3 that radiates a beam having a rectangular shape similar to the aperture shape 2 of the main reflector 1 onto the main reflector 1. As the primary radiator 3, a multimode horn antenna, an active phased array antenna, or the like can be used. As a result, the degree of freedom of reflector shaping can be improved without causing reduction in efficiency.
US09543656B2	Three-axis antenna A three-axis antenna having a first to a third antenna coils arranged so that directions of the maximum reception sensitivities are orthogonal to each other, the first to the third antenna coils comprising respectively: a planar coil being wound around the winding axis in circumferential direction and has an aperture; and a foil-type core inserted in the aperture; the foil-type core being arranged a plane to be in parallel to the plane of the first to the third coils.
US09543655B2	Folded near field communication antenna Provided is an antenna structure which is capable of having sufficient antenna performance even in an antenna having a small cross-sectional area. The antenna of the present invention comprises: a ferrite sheet; and an antenna sheet (flexible printed circuit board) which has a spiral loop antenna pattern. The antenna sheet is folded and the ferrite sheet is inserted therein to form a folded antenna. The folded antenna is configured in such a manner that a longitudinal pattern of the spiral loop antenna pattern is disposed close to a longitudinal centerline portion of the ferrite sheet.
US09543653B2	Flexible printed circuit board for dual mode antennas, dual mode antenna and user device Disclosed herein are a flexible printed circuit board for dual mode antennas, a dual mode antenna and a user device using the same. The flexible printed circuit board for dual mode antennas includes a first loop-shaped coil formed at one main surface of an insulative sheet and a second loop-shaped coil formed inside the loop of the first coil.
US09543651B2	Near field communication antenna A near field communication (NFC) antenna including a dielectric substrate, a coil, and a coupling structure is provided. The coil is disposed on the dielectric substrate. The coupling structure includes at least one coupling branch. Two ends of the coupling branch are respectively connected to two different connection points on the coil. The coupling structure is configured to improve the isotropic characteristics of the NFC antenna.
US09543646B2	Antenna control device and antenna apparatus An antenna control device includes a direction acquirer to acquire a target direction in which a target object to be tracked exists, a coordinate converter to perform conversion into an Y-coordinate which is an angle between the target direction and a plane containing both the zenith direction and a Y-axis fixed horizontally within a rotation range of the vertical axis, and into a X-coordinate which is an angle between the zenith direction and a projection of the target direction projected onto the plane. A drive command value arithmetic processor commands a vertical axis angle value obtained by multiplying the Y-coordinate by a coefficient. The arithmetic processor calculates the command value for each of the horizontal axis and the cross horizontal axis such that difference between the pointing direction of the antenna and the target direction is less than or equal to an allowable value.
US09543645B2	Reflective beamforming for performing chip-to-chip and other communications A transmitter front-end for wireless chip-to-chip communication, and for other, longer-range (e.g., several meters or several tens of meters) device-to-device communication is disclosed. The transmitter front-end can include a plurality of reflector power amplifiers implemented on an IC chip and an on-chip or on-package antenna for wireless transmitting a signal to another IC chip or device. The plurality of reflector power amplifiers can reflect the radiation of the on-chip or on-package antenna in a particular pattern such that the effective radiation pattern is reinforced in a desired direction and suppressed in an undesired direction. This helps to reduce the required output power of the transmitter front-end and mitigate interference with other potential wireless chip-to-chip or longer-range communications.
US09543633B2	Antenna dish heating system An antenna system having a dish, a heating element and a shaped plate. The dish has a concave shape on one side and a generally convex shape on the opposite side. The shaped plate has the heating element applied to a first side. The shaped plate has a second opposite side. The shaped plate is coupled to the opposite side of the dish. The shaped plate being formed from a flat plate having at least one slot cut therein, each slot having edges that are overlapped to thereby cause the flat plate to become the shaped plate.
US09543631B1	Tapered airline directional coupler A tapered airline directional coupler includes a housing having a length with an input end and an output end, the housing having a slot formed therein extending between the input end and the output end. The coupler also includes a main conductor in electrical communication with an input port connector mounted on the housing at the input end thereof and with an output port connector mounted on the housing at the output end thereof, and a coupled conductor in electrical communication with and extending between a forward coupling port connector mounted on the housing adjacent to the input end thereof and a reverse coupling port connector mounted on the housing adjacent to the output end thereof. Each of the slot, the main conductor and the coupled conductor has a cross-sectional area that varies depending upon where the cross-section is taken along the length of the housing.
US09543627B2	Microwave device using magnetic material nano wire array and manufacturing method thereof Provided herein is a microwave device using a magnetic material nano wire array and a manufacturing method thereof, the device including a template having a nano hole array filled with a metal magnetic material.
US09543626B2	Metal/oxygen battery with multistage oxygen compression A vehicular battery system includes a vehicular battery system stack including at least one negative electrode including a form of lithium, an oxygen reservoir having a first outlet operably connected to the vehicular battery system stack, a multistage compressor having a first inlet operably connected to the vehicular battery system stack, and a second outlet operably connected to a second inlet of the oxygen reservoir, and a cooling system operably connected to the multistage compressor and configured to provide a coolant to the multistage compressor to cool a compressed fluid within the multistage compressor.
US09543624B2	Electrical storage module An electricity storage module includes a stack, holder members, and heat-transfer plate members. The stack is formed by stacking power storage elements having lead terminals protruding outward from end portions. The holder members are made of insulating resin and are attached to the end portions of the power storage elements, the holder members holding the power storage elements. The heat-transfer plate member are disposed between power storage elements adjacent in a stacking direction, the heat-transfer plate members made of heat conductive material. An engaging portion is provided on one of the holder members and the heat-transfer plate members, and an engaged portion arranged to be engaged by the engaging portion is provided on the other of the holder members and the heat-transfer plate members. The holder members and the heat-transfer plate members are integrated by mutual engagement of the engaging portions and the engaged portions.
US09543623B2	Battery condition indicator The invention is directed towards a battery condition indicator. The battery condition indicator includes at least one indicator electrode, a counter electrode for the at least one indicator electrode, and a separator that is combined with an electrolyte. The at least one indicator electrode is in electrical connection with a first terminal of a battery. The at least one indicator electrode includes at least one redox material. The counter electrode is a second terminal of the battery. The separator that is combined with electrolyte is positioned between the at least one indicator electrode and the counter electrode.
US09543622B2	Lithium solid state secondary battery system The main object of the present invention is to provide a lithium solid state secondary battery system capable of restoring the decrease of output characteristics of a lithium solid state secondary battery without deteriorating an anode. The present invention attains the above-mentioned object by providing a lithium solid state secondary battery system including a lithium solid state secondary battery and an overdischarge treating unit, wherein an anode active material layer of the above-mentioned lithium solid state secondary battery contains an anode active material and a sulfide solid electrolyte material containing Li, A (A is at least one kind of P, S, Ge, Al and B) and S and having an ortho-composition, and the above-mentioned anode current collector includes a metal.
US09543619B2	Functionalized phosphorus containing fluoropolymers and electrolyte compositions Provided herein are functionally substituted fluoropolymers suitable for use in liquid and solid non-flammable electrolyte compositions. The functionally substituted fluoropolymers include phosphate-terminated or phosphonate-terminated perfluoropolyethers (PFPEs) having high ionic conductivity. Also provided are non-flammable electrolyte compositions including phosphate-terminated or phosphonate-terminated perfluoropolyethers (PFPEs) and alkali-metal ion batteries including the non-flammable electrolyte compositions.
US09543614B2	Nonaqueous electrolyte battery and battery pack According to one embodiment, a nonaqueous electrolyte battery includes a container, a positive electrode housed in the container, a negative electrode housed in the container, and a nonaqueous electrolyte housed in the container. The positive electrode includes a positive electrode active material represented by a general formula LiMO2 (M is one or more elements selected from a group consisting of Ni, Co, and Mn). The negative electrode is spatially separated from the positive electrode and includes a titanium-containing oxide as a negative electrode active material. A potential of the positive electrode is 3.75 V or more vs. Li/Li+, when an open circuit voltage of a nonaqueous electrolyte battery is 2.17 V.
US09543606B2	Fuel cell and proces for manufacturing a fuel cell The present invention pertains to a fuel cell with a storage unit (4) for storing hydrogen (Hx), with a proton conductive layer, which covers a surface of the storage unit (4), and with a cathode (7) on a side of the proton conductive layer, which side is located opposite, wherein the storage unit (4) is directly coupled with an anode and/or the storage unit (4) is incorporated in a substrate (1) of a semiconductor. The storage unit (4) is preferably connected to the substrate (1) at least via a stress compensation layer (3).
US09543605B2	Hydrogen generating device and power generating equipment A hydrogen generating device includes a first housing, a porous structure, a first flow-guiding structure and a heating unit. The first housing accommodates a solid reactant. The porous structure is disposed in the first housing. The first flow-guiding structure has first and second end portions opposite to each other. The first end portion is connected to the porous structure. The second end portion protrudes outside the first housing and is connected to the heating unit. A liquid reactant passing through the second end portion is gasified into a gaseous reactant through the heating unit. The gaseous reactant passing through the first end portion reaches to the porous structure and then is diffused from the porous structure into the first housing, so that the gaseous reactant and the solid reactant react and generate a hydrogen gas. A power generating equipment including the hydrogen generating device is also provided.
US09543604B2	Hydrogen generator A hydrogen generator and a fuel cell system including a fuel cell battery and the hydrogen generator. The hydrogen generator includes a cartridge, a housing with a cavity to removably contain the cartridge, and an initiation system. The cartridge includes a casing; a plurality of pellets including a hydrogen containing material; a plurality of solid heat transfer members in contact with but not penetrating the casing; a hydrogen outlet in the casing; and a hydrogen flow path from each pellet to the hydrogen outlet. A plurality of heating elements is disposed inside the housing. When the cartridge is in the cavity, each heating element is disposed so heat can be conducted from the heating element and through the casing and corresponding heat transfer member to initiate the release of hydrogen gas. The initiation system can selectively heat one or more pellets to release hydrogen gas as needed.
US09543603B2	Fuel cell system and control method for fuel cell system In a fuel cell system that includes a fuel cell that generates power in response to an electrochemical reaction between hydrogen and oxygen contained in air, and a compressor that supplies air to the fuel cell, in which an idle stop is executed to stop power generation by the fuel cell when a required load falls to or below a predetermined value, and during the idle stop, air is supplied in accordance with a voltage condition between a cathode and a anode of the fuel cell, regardless of the required load, air is supplied during the idle stop while detecting an air supply amount, and when the air supply amount reaches a predetermined value, the air supply is stopped.
US09543601B2	Fuel cell system using hydrogen supply manifold A fuel cell system having a hydrogen supply manifold is provided and includes a stack that uses supplied air and fuel gas to generate electricity. A recirculation line recirculates a fuel gas, to an inlet of the stack. An ejector unit is disposed on the recirculation line, supplies fresh fuel gas, and circulates the recirculated gas. The ejector unit includes a middle pressure manifold in which a nozzle mounting portion is formed and a supply passage to transmit fuel gas to the nozzle mounting portion. A control valve is disposed on the middle pressure manifold to adjust fuel supplied to the stack. A nozzle is engaged with an end portion of the nozzle mounting portion to inject fuel gas supplied through the supply passage. Additionally, a low pressure manifold is engaged with the middle pressure manifold to suction and mix exhaust gas of the stack.
US09543600B2	Fuel cell system A fuel cell system that can supply fuel gas appropriately is provided. The fuel cell system includes an injector 23A and an injector 23B which inject fuel gas, and an ECU 50. The ECU 50 adjusts the flow rate of the fuel gas that is injected from the injector 23A by adjusting the valve opening time period and the valve closing time period of the injector 23A, which are repeated alternately, and make at least a part of the valve opening time period of the injector 23B overlap with the valve closing time period of the injector 23A when opening the valve of the injector 23B.
US09543596B2	Seal member for fuel cell and fuel cell seal body using same A sealing member to be used for sealing a constituent member of a fuel cell is provided, the sealing member including a cross-linked product of a rubber composition, in which the rubber composition contains the following components (A) and (B). With this, rubber elasticity is maintained without being lost even under extremely low temperature conditions, and in the case where the sealing member is used in a fuel cell sealed body, an excellent sealing property is exhibited. (A) a rubber component including at least one of an ethylene-propylene rubber or ethylene-propylene-diene rubber having a ratio of ethylene-ethylene diad distribution of at most 29 mol %. (B) a cross-linking agent including an organic peroxide.
US09543594B2	Method of manufacturing metal separator for fuel cell A method of manufacturing a metal separator for a fuel cell includes providing an opening in a metal plate which is to be a part of the metal separator for the fuel cell, integrally molding a sealing member on both sides of an outer peripheral edge of the metal plate to cover the opening, and trimming the sealing member to remove a covering portion of the sealing member that covers the opening and to provide a fluid communication hole, at least one of a fuel gas, an oxidant gas, and a cooling medium being to pass through the fluid communication hole in the fuel cell.
US09543592B2	Method of manufacturing anode core-shell complex for solid oxide fuel cell using hydrazine reducing agent and surfactant Provided is a method of manufacturing an anode core-shell complex for a solid oxide fuel cell, including (A) manufacturing a stabilized zirconia (YSZ) sol by using zirconium hydroxide (Zr(OH)4) and yttrium nitrate (Y(NO3)3.6H2O) as a starting material and distilled water as a solvent by a hydrothermal method, (B) agitating nickel chloride, stabilized zirconia in a sol state, and a surfactant, (C) adding sodium hydroxide (NaOH), (D) adjusting a pH to a range of 6 to 8, and (E) sintering the nickel-stabilized zirconia core-shell powder.
US09543590B2	Catalyst layer composition for fuel cell, electrode for fuel cell, method of preparing electrode for fuel cell, membrane-electrode assembly for fuel cell, and fuel cell system using the membrane-electrode assembly A catalyst layer composition for a fuel cell includes an ionomer cluster, a catalyst, and a solvent including water and polyhydric alcohol; and an electrode for a fuel cell includes a catalyst layer comprising an ionomer cluster having a three-dimensional reticular structure, and a catalyst, a method of preparing a electrode for a fuel cell includes a catalyst layer comprising an ionomer cluster having a three-dimensional reticular structure, and a catalyst, and a membrane-electrode assembly for a fuel cell including the electrode and a fuel cell system including the membrane-electrode assembly.
US09543587B2	Thin film battery having improved efficiency of collecting electric current Provided is a thin film battery, including: a base substrate; a cathode current collector pattern and an anode current collector pattern being formed on the base substrate to be electrically separated from each other; a cathode pattern being formed on the cathode current collector pattern; an electrolyte pattern being formed on the cathode pattern; and an anode pattern being formed on the electrolyte pattern. At least one pattern of the cathode current collector pattern and the anode current collector pattern may include a non-noble metal based alloy.
US09543585B2	Electrode binder composition for nonaqueous electrolyte battery, electrode for nonaqueous electrolyte battery, and nonaqueous electrolyte battery Provided is a binder composition for electrodes that has high stability in the form of a liquid composition dissolved or dispersed in a solvent and can improve cycle property of a non-aqueous electrolyte battery. The binder composition used is a binder composition including a polymer A containing 80% by weight or more and 99.9% by weight or less of a repeating unit derived from a monomer including a nitrile group and 0.1% by weight or more and 20% by weight or less of a repeating unit derived from an ethylenically unsaturated compound, wherein a weight-average molecular weight of the polymer A is 500,000 to 2,000,000, and a molecular weight distribution (Mw/Mn) of the polymer A is 13 or smaller.
US09543584B2	Binder for secondary battery providing excellent cycle property Provided is a binder for secondary battery electrodes wherein the content of a gel comprising a polymer particle obtained by copolymerizing three or more types of monomers is 50 to 100% by weight and a swelling index of the binder to an electrolyte is 1.1 to 5.0. The binder fundamentally improves electrode stability due to the gel content defined above and increases ionic conductivity due to the swelling index, thus providing secondary batteries with superior cycle properties.
US09543582B2	Method for preparing lithium iron phosphate nanopowder The present invention relates to a method for preparing a lithium iron phosphate nanopowder, including the steps of (a) preparing a mixture solution by adding a lithium precursor, an iron precursor and a phosphorus precursor in a triethanolamine solvent, and (b) putting the mixture solution into a reactor and heating to prepare the lithium iron phosphate nanopowder under pressure conditions of 1 bar to 10 bar, and a lithium iron phosphate nanopowder prepared by the method. When compared to a common hydrothermal synthesis method, a supercritical hydrothermal synthesis method and a glycothermal synthesis method, a reaction may be performed under a relatively lower pressure. Thus, a high temperature/high pressure reactor is not necessary and process safety and economic feasibility may be secured. In addition, a lithium iron phosphate nanopowder having uniform particle size and effectively controlled particle size distribution may be easily prepared.
US09543580B2	Nickel-cobalt composite hydroxide and process for manufacturing same Process for manufacturing nickel-cobalt composite represented by Ni1-x-yCoxMnyMz(OH)2 (where, 0.05≦x≦0.95, 0≦y≦0.55, 0≦z≦0.1, x+y+z<1, and M is at least one metal element selected from Al, Mg, and the like), includes: forming seed particle, while reaction solution having mixed solution containing metal compounds and ammonia solution containing ammonium ion supply source at discharge head of an impeller from 50-100 m2/s2, the concentration of nickel ions is maintained within range 0.1-5 ppm by mass, whereby seed particles are formed; and growing seed particle wherein solution is obtained by supplying mixed and ammonium solutions to reaction solution is agitated with a concentration of nickel ions being maintained within range 5-300 ppm by mass and higher than the concentration of nickel ions in seed particle formation, whereby seed particles are grown up.
US09543578B2	Negative electrode active material for non-aqueous electrolyte secondary battery and method for manufacturing the same A method for manufacturing a negative electrode active material for a secondary battery that uses a non-aqueous electrolyte, including the steps of: depositing silicon according to an electron beam vapor-deposition method with metallic silicon as a raw material on a substrate of which temperature is controlled from 800 to 1100° C. at a vapor deposition rate exceeding 1 kg/hr in the range of film thickness of 2 to 30 mm; and pulverizing and classifying the deposited silicon to obtain the negative electrode active material. As a result, there is provided a method for manufacturing a negative electrode active material of silicon particles as an active material useful for a negative electrode of a non-aqueous electrolyte secondary battery that is, while maintaining high initial efficiency and battery capacity of silicon, excellent in the cycle characteristics and has a reduced volume change during charge/discharge.
US09543576B2	Methods of making metal-doped nickel oxide active materials Methods of making high-energy cathode active materials for primary alkaline batteries are described. The primary batteries include a cathode having an alkali-deficient nickel(IV)-containing oxide including one or more metals such as Co, Mg, Al, Ca, Y, Mn, and/or non-metals such as B, Si, Ge or a combination of metal and/or non-metal atoms as dopants partially substituted for Ni and/or Li in the crystal lattice; an anode; a separator between the cathode and the anode; and an alkaline electrolyte solution.
US09543572B2	Non-aqueous electrolyte secondary battery The present invention provides a non-aqueous electrolyte secondary battery that comprises an electrode body comprising a positive electrode and a negative electrode. The positive electrode has an upper operating voltage limit of 4.5 V or higher relative to lithium metal. The electrode body comprises a lithium titanate-containing layer. The lithium titanate-containing layer is isolated from the negative electrode.
US09543571B2	Precursor of a cathode active material for a lithium secondary battery, cathode active material, method for manufacturing the cathode active material, and lithium secondary battery including the cathode active material Disclosed are a precursor for a rechargeable lithium battery, a positive active material including the same, a preparation method thereof, and a rechargeable lithium battery including the positive active material. More particularly, the present invention relates to a precursor including a sheet-shaped plate having a thickness of about 1 nm to about 30 nm and that is represented by the following Chemical Formula 1. NixCoyMn1-x-y-zMz(OH)2 [Chemical Formula 1] In the above Chemical Formula 1, 0
US09543568B2	Electrode including multi-layered electrode active material layer and secondary battery including the same The present invention relates to an electrode comprising multi-layered electrode active material layer and a secondary battery comprising the same. According to the embodiments of the present invention comprises electrode having multi-layered electrode active material layer, wherein the content of the active materials which forms the electrode active material layers is equally maintained and the loading amounts at each layer are either the same or different from each other, thereby solving the problem of performance deterioration caused by an increase in battery resistance due to non-uniform dispersion of a binder or the like.
US09543562B2	Secondary battery A secondary battery comprises: a plurality of cylindrical electrode assemblies, wherein each electrode assembly comprises a positive electrode plate and a negative electrode plate rolled together with a separator interposed between the positive electrode plate and the negative electrode plate; a can housing the plurality of electrode assemblies; a cap assembly sealing the can; a positive electrode tab coupled to the positive electrode plate in each electrode assembly; and a negative electrode tab coupled to the negative electrode plate in each electrode assembly, wherein a first plurality of positive electrode tabs is aligned along a first line when viewed in one direction, and wherein a first plurality of negative electrode tabs is aligned along a second line when viewed in the one direction.
US09543560B2	Device for producing packaged electrode and method of producing packaged electrode A device for producing a packaged electrode having an electrode sandwiched between a pair of separators includes: a conveyance unit configured to sequentially overlay the electrode and the pair of separators from a front end side in a conveying direction while conveying the electrode and the pair of separators; a joining unit configured to join lateral edges of the pair of separators together, the lateral edges being positioned in a direction intersecting the conveying direction; and a controller configured to control operations of the conveyance unit and the joining unit. The controller is configured to repeatedly perform joining a plurality of times from the front end side in the conveying direction, each of the joining being performed while moving the joining unit so that a speed of the joining unit relative to a conveyance speed of a workpiece approaches zero.
US09543559B2	Square secondary battery A square secondary battery suppresses welding failure from occurring by temporarily retaining and securing a sealing cover and enabling detection by a leakage test even when welding failure occurs. The square secondary battery has a case surface portion with an injection opening for injecting an electrolyte, a sealing cover disposed at a position opposite to the case surface portion and sealing the injection opening and having an outer edge welded to the case surface portion to seal the injection opening, and a pressure sensitive adhesive member interposed between the sealing cover and the case surface portion for securing the sealing cover to the case surface portion. A gas passage is provided between the case surface portion and the sealing cover for communicating a gap formed at a position outer to the pressure sensitive adhesive member with respect to a battery case and the injection opening in a ventilation manner.
US09543558B2	Battery holder and isolation assembly A battery holder for securing a battery to a vehicle and for mechanically isolating the battery from the vehicle is provided. The battery holder includes a vehicle mounting plate, a battery containment plate, and a number of shock absorbing elements. The battery containment plate includes a number of open-topped cells for retaining leaking battery liquid therein. The shock absorbing elements prevent vibrations and shocks from being transferred from the vehicle to the battery.
US09543557B2	Traction battery assembly A traction battery assembly for a vehicle includes an array of cells stacked on a tray. The array of cells defines opposing longitudinal sides and opposing lateral sides. First and second L-shaped components are attached to the tray. Each of the components includes an end wall and a sidewall that are integrally formed to define a substantially 90° corner. The first and second components are attached together such that each of the sidewalls is disposed adjacent one of the longitudinal sides and each of the end walls is disposed adjacent one of the lateral sides to form a housing around the tray that has an open top and an open bottom.
US09543551B2	Lightweight and rigid structure of battery unit A battery unit is provided which includes a battery and a storage case in which the battery is mounted. The storage case is made up of a base, a cover, and an intermediate case. The cover is jointed to the base with an interspace therebetween. The intermediate case is disposed between the cover and the base and has a peripheral wall which occupies the interspace. The intermediate case is lower in stiffness than the cover and the base, thereby realizing a lightweight structure of the storage case without sacrificing the mechanical strength thereof.
US09543550B2	Battery cell module, battery, and motor vehicle A battery cell module includes a plurality of battery cells, in particular lithium-ion battery cells which are arranged in a packet and each of which has a substantially prismatic cell housing. Each cell housing has the three dimensions: housing height, housing width, and housing depth. Two of the dimensions are carried out in a substantially identical manner in all the battery cells of the battery cell module, and the third dimension is carried out differently in at least two battery cells of the battery cell module. A battery includes said battery cell module and a motor vehicle includes said battery.
US09543546B2	Organic light-emitting element The purpose of the present invention is to provide an organic light-emitting element that comprises an internal light extraction layer on a flexible transparent substrate, that has high luminous efficiency by means of light extraction, and that prevents the breakage and partial or complete separation of electrodes when the organic light-emitting element is repeatedly bent. The organic light-emitting element according to the present invention has an internal light extraction layer, a transparent electrode, and an organic light-emitting layer in this order on the flexible transparent substrate, wherein the value of the ratio (D) represented by formula 1 between the elastic modulus (EMI) of the surface of the internal light extraction layer and the elastic modulus (EMS) of the surface of the transparent electrode side of the transparent substrate is within the range of 100±30%. D (%)=(EMI/EMS)×100(%). Formula 1
US09543544B2	Organic light emitting display Disclosed is an organic light emitting display apparatus in which an anode electrode, an organic emission layer, a cathode electrode, and an auxiliary electrode connected to the cathode electrode and disposed on the same layer as that of the anode electrode are disposed in an active area of the substrate, a signal pad and a pad electrode connected to the signal pad and covering a top of the signal pad are disposed in a pad area of the substrate, and a top of the pad electrode has lower oxidation rate than the top of the signal pad.
US09543543B2	Substrate for display apparatus, and display apparatus using the same A substrate for a display apparatus includes a barrier layer disposed on a base substrate. The barrier layer includes a silicon oxide layer, and the silicon oxide layer includes a first part and a second part along a thickness direction of the barrier layer. The amount of silicon in the first part is different from the amount of silicon in the second part.
US09543542B2	Organic light-emitting display An organic light-emitting display includes a first substrate which includes a pixel region, and an encapsulation region which surrounds the pixel region, an organic light-emitting device which is located in the pixel region, a sealant which is located in the encapsulation region, and a dummy metal which is interposed between the first substrate and the sealant, where the encapsulation region includes a first encapsulation region and a second encapsulation region which is adjacent to the first encapsulation region, and the dummy metal is located in the first encapsulation region.
US09543540B2	OLED device and manufacture thereof A method of manufacturing an OLED device, a semi-finished product, and a OLED are described herein. In one embodiment, the method comprises providing an electrically conductive carrier substrate with a first carrier surface and a second carrier surface, assembling at least the first carrier surface a patterned layer of insulating material over an integral area, the layer of insulating material being patterned by a plurality of holes such that an electric access to the first carrier surface is possible, assembling a patterned conductive coating on the insulating material such that the conductive coating enters the holes and covers the insulating material, whereby the conductive coating is patterned such that a number of discrete first electrode areas are formed in the conductive coating, applying an organic light-emitting layer above at least one first electrode area, applying a second electrode layer above the organic light emitting layer.
US09543534B1	Self-aligned carbon nanotube transistor including source/drain extensions and top gate A carbon nanotube semiconductor device includes at least one carbon nanotube disposed on an insulator portion of a substrate. The at least one carbon nanotube includes a non-doped channel portion interposed between a first doped source/drain portion and a second doped source/drain portion. A first source/drain contact stack is disposed on the first doped source/drain portion and an opposing second source/drain contact stack is disposed on the second doped source/drain portion. A replacement metal gate stack is interposed between the first and second source/drain contact stacks, and on the at least one carbon nanotube. The first and second doped source/drain portions are each vertically aligned with an inner edge of the first and second contact stacks, respectively.
US09543531B2	Organic electroluminescent device The present invention relates to the use of double-complex salts in electronic devices, in particular in organic electroluminescent devices, and oligomers formed from charged metal complexes.
US09543527B2	Red phosphorescent compound and organic light emitting diode device using the same The present invention provides a phosphorescent compound of one of following formulas:
US09543526B2	Nitrogen-containing aromatic compounds and organic electroluminescent device Provided are a nitrogen-containing aromatic compound useful for an organic electroluminescent device, and an organic electroluminescent device (organic EL device) that improves luminous efficiency of the device and sufficiently ensures driving stability of the device. The nitrogen-containing aromatic heterocyclic compound is represented by the following formula (1). The organic EL device includes an organic layer that contains the nitrogen-containing aromatic heterocyclic compound between an anode and a cathode laminated on a substrate. In the formula (1), a ring A represents an aromatic ring represented by the formula (1a) and fused with two adjacent rings, a ring B represents a heterocycle represented by the formula (1b) and fused with two adjacent rings, Y's each represent C—R or N, X's each represent N—Z, O, S, or Se, R represents hydrogen, an alkyl group, an aromatic group, or the like, and Z represents an alkyl group, an aromatic group, or the like.
US09543525B2	Organic light emitting device and display apparatus including the same An organic light emitting device includes an anode, a hole auxiliary layer on the anode, the hole auxiliary layer including an arylamine derivative, an emission layer on the hole auxiliary layer, an electron auxiliary layer on the emission layer, the electron auxiliary layer including a 9,10-diarylanthracene derivative and a bifluorene derivative, and a cathode on the electron auxiliary layer.
US09543522B2	Electroluminescent device An electroluminescent device (20) having a first layer comprising a fluorinated first organic compound with one or more fluorene residues and soluble in a fluorinated solvent, the first layer being adjacent to a second layer having second organic compound that is insoluble in a fluorinated solvent, and methods and materials for making said device.
US09543521B2	Organic semiconductor device and process for its production An organic semiconductor device selected from organic diodes, organic field effect transistors, and devices comprising an organic diode and/or organic field effect transistor and a method of producing such a device are provided. The organic semiconductor device comprises at least one semiconducting layer based on a diketopyrrolopyrrole (DPP) polymer. The semiconducting layer may effectively be protected against degradation by radiation and/or oxidation by adding at least one stabilizing agent selected from hydroxybenzophenones, hydroxyphenyl benzotriazoles, oxalic acid anilides, hydroxyphenyl triazines, hindered phenols and/or merocyanines to the DPP polymer layer. The stabilization is effective both during production and during usage of the device, while the device's electronic properties are retained. The stabilizing agent is preferably a UV absorbing agent or an antioxidant or anti-radical agent known from the field of organic polymer technology.
US09543518B2	Vapor deposition apparatus, deposition method using the same, and method of manufacturing organic light-emitting display apparatus A vapor deposition apparatus for forming a deposition layer on a substrate includes a supply unit that is supplied with a first raw gas to form the deposition layer and an auxiliary gas, wherein the auxiliary gas does not constitute a raw material to form the deposition layer, a reaction space that is connected to the supply unit to be supplied with the first raw gas and the auxiliary gas, a plasma generator in the reaction space to convert at least a portion of the first raw gas into a radical form, and a first injection portion that is connected to the reaction space and that supplies at least a radical material of the first raw gas toward the substrate.
US09543513B2	Variable resistance material layers and variable resistance memory devices including the same A variable resistance material layer including germanium (Ge), antimony (Sb), tellurium (Te), and at least one type of impurities X. The variable resistance material layer having a composition represented by a chemical formula of Xp(GeaSb(1-a-b)Teb)(1-p), wherein an atomic concentration of the impurities X is in a range of 0
US09543512B2	Switch device and storage unit A switch device includes: a first electrode; a second electrode arranged to face the first electrode; and a switch layer provided between the first electrode and the second electrode. The switch layer includes a first layer containing a chalcogen element, and a second layer containing a high resistance material.
US09543509B2	Magnatoresistive structure and method for forming the same A magnetoresistive structure includes a substrate and a patterned stack structure. The substrate has a back surface and a front surface having a step portion. The patterned stack structure is on the step portion of the front surface and comprises a magnetoresistive layer, a conductive cap layer and a dielectric hard mask layer. The step portion has a top surface parallel to the back surface, a bottom surface parallel to the back surface and a step height joining the top surface and bottom surface and being not parallel to the back surface.
US09543508B2	Magnetic memory element and storage device using the same A magnetic miniaturized memory element with improved thermal stability of magnetization includes a first magnetic layer, an insulating layer that is formed on the first magnetic layer, a second magnetic layer that is formed on the insulating layer, and an expanded interlayer insulating film that comes into contact with side surfaces of the first and second magnetic layers, where at least one of the first magnetic layer and the second magnetic layer is strained and deformed so as to be elongated in an easy magnetization axis direction of the first magnetic layer or the second magnetic layer or compressive strain remains in any direction in the plane of at least one of the first magnetic layer and the second magnetic layer.
US09543500B2	Ferroelectric thin film having superlattice structure, manufacturing method thereof, ferroelectric element, and manufacturing method thereof At least two types of dielectric materials such as oxide nanosheets having a layered perovskite structure that differ from each other are laminated, and the nanosheets are bonded to each other via an ionic material, thereby producing a superlattice structure-having ferroelectric thin film. Having the layered structure, the film can exhibit ferroelectricity as a whole, though not using a ferroelectric material therein. Accordingly, there is provided a ferroelectric film based on a novel principle, which is favorable for ferroelectric memories and others and which is free from a size effect even though extremely thinned.
US09543498B2	Actuator device and method for manufacturing the actuator device An actuator device and a method for manufacturing the actuator device, which is formed by stacking and rolling films of electrostrictive material into a cylindrical body and can ensure electrical connection with inner electrodes at both end portions of the cylindrical body. The actuator device is formed by stacking and rolling two films of electrostrictive material into a cylindrical body, the two films each having an inner electrode on one or both surfaces thereof. The cylindrical body has at least one cut portion at each end portion thereof, the cut portion being configured to reach the inner electrode (electrode pattern). By applying conductive ink to each of the cut portions, the conductive ink flows through the cut portions and reaches the inner electrodes on the films. By heat-hardening the conductive ink, it is possible to ensure electrical connection between outer and inner electrodes.
US09543497B2	Piezoelectric device and electronic apparatus A piezoelectric device includes an integrated circuit (IC) chip and a piezoelectric resonator element, a part of the piezoelectric resonator element being disposed so as to overlap with a part of the IC chip when viewed in plan. The IC chip includes: an inner pad disposed on an active face and in an area where is overlapped with the piezoelectric resonator when viewed in plan; an insulating layer formed on the active face; a relocation pad disposed on the insulating layer and in an area other than a part where is overlapped with the piezoelectric resonator element, the relocation pad being coupled to an end part of a first wire; and a second wire electrically coupling the inner pad and the relocation pad, the second wire having a relocation wire and a connector that penetrates the insulating layer, the relocation wire being disposed between the insulating layer and the active face.
US09543496B2	Creation of high-pinning microstructures in post production YBCO coated conductors A method comprising irradiating a polycrystalline rare earth metal-alkaline earth metal-transition metal-oxide superconductor layer with protons having an energy of 1 to 6 MeV. The irradiating process produces an irradiated layer that comprises randomly dispersed defects with an average diameter in the range of 1-10 nm.
US09543493B2	Packaging for thermoelectric subcomponents A thermoelectric semiconducting assembly. Two parallel plates, a first plate and a second plate, are spaced apart. A plurality of pellets are fitted into said first plate and into said second plate, each said pellet comprising a body, a first cap, and a second cap, said body including a silicon material, said first cap and said second cap including an electrically resistive ceramic material, each pellet in said second plate being connected to a pellet in said first plate. Each pellet includes a doped body, wherein half of said pellets are doped with a p-type dopant to form a p-type pellet and half of said pellets are doped with an n-type dopant to form an n-type pellet. Each plate includes p-type pellets and n-type pellets in an alternating pattern, and each p-type pellet in said first plate connects with an n-type pellet in said second plate, and wherein each n-type pellet in said first plate connects with a p-type pellet in said second plate.
US09543490B2	Wafer-level light emitting diode package and method of fabricating the same Exemplary embodiments of the present invention provide a wafer-level light emitting diode (LED) package and a method of fabricating the same. The LED package includes a semiconductor stack including a first conductive type semiconductor layer, an active layer, and a second conductive type semiconductor layer; a plurality of contact holes arranged in the second conductive type semiconductor layer and the active layer, the contact holes exposing the first conductive type semiconductor layer; a first bump arranged on a first side of the semiconductor stack, the first bump being electrically connected to the first conductive type semiconductor layer via the plurality of contact holes; a second bump arranged on the first side of the semiconductor stack, the second bump being electrically connected to the second conductive type semiconductor layer; and a protective insulation layer covering a sidewall of the semiconductor stack.
US09543484B1	Semiconductor light emitting device and method for manufacturing same According to one embodiment, a semiconductor light-emitting device includes a semiconductor layer including a first semiconductor layer, a second semiconductor layer, a light emitting layer, a first surface, and a second surface, the light emitting layer provided between the first semiconductor layer and the second semiconductor layer, the second surface opposing the first surface; a p-side electrode; an n-side electrode; a p-side pillar; an n-side pillar; a first insulating layer; an optical layer; a second insulating layer; a first layer; a p-side interconnect; and an n-side interconnect. The first layer includes a first lower end portion and a second lower end portion.
US09543483B2	Epitaxy base and light-emitting device An epitaxy base adapted to form a light-emitting device on is provided. The epitaxy base includes a substrate and a patterned wavelength conversion structure disposed on a part of the substrate and protruding out from the substrate. A light-emitting device including the epitaxy base, a first type semiconductor layer, an emitting layer and a second type semiconductor layer is provided. The first type semiconductor layer is disposed on the substrate and the patterned wavelength conversion structure. The emitting layer is disposed on the first type semiconductor layer. The second type semiconductor layer is disposed on the emitting layer.
US09543481B2	Semiconductor nanoparticle-based materials The present invention relates to a primary particle comprised of a primary matrix material containing a population of semiconductor nanoparticles, wherein each primary particle further comprises an additive to enhance the physical, chemical and/or photo-stability of the semiconductor nanoparticles. A method of preparing such particles is described. Composite materials and light emitting devices incorporating such primary particles are also described.
US09543478B2	Light emitting device including a filter and a protective layer A method according to embodiments of the invention includes providing a plurality of LEDs (60) attached to a mount (62). A filter (102) is attached to at least one of the plurality of LEDs. A protective layer (104) is formed over the filter. A reflective layer (74) is formed over the mount. A portion of the reflective layer disposed over the protective layer is removed.
US09543476B2	UV light emitting diode and method of fabricating the same A UV light emitting diode and a method of fabricating the same are provided. The light emitting diode includes an active area between an n-type nitride-based semiconductor layer and a p-type nitride-based semiconductor layer, wherein the active area includes a plurality of barrier layers containing Al, a plurality of well layers containing Al and alternately arranged with the barrier layer, and at least one conditioning layer. Each conditioning layer is placed between the well layer and the barrier layer adjacent to the well layer and is formed of a binary nitride semiconductor. The design of the conditioning layer can reduce stress of the active area while allowing uniform control of the composition of the well layers and/or the barrier layers.
US09543475B2	Light emitting device and method of manufacturing the same A light-emitting device includes a first conductive type semiconductor layer, a second conductive type semiconductor layer, and an active layer between the first conductive type semiconductor layer and the second conductive type semiconductor layer and having a plurality of V-pits. The light-emitting device further includes a layer-quality improvement layer between the first conductive type semiconductor layer and the second conductive type semiconductor layer and having a plurality of V-pits with substantially same size and shape as the plurality of V-pits of the active layer, wherein layer-quality improvement layer is a group III-V semiconductor layer including Al or In. Due to the improved layer quality, the luminescent quality of the light-emitting device is improved.
US09543474B2	Manufacture method of making semiconductor optical device The semiconductor optical device has a chip of semiconductor lamination having a first semiconductor layer of a first conductivity type having a first surface, a second semiconductor layer of a second conductivity type opposite to the first conductivity type having a second surface, and an active layer sandwiched between the first semiconductor layer and the second semiconductor layer, the chip having side surface including a first side surface which is contiguous to the second surface, forms an obtuse angle with the second surface, extends across the second semiconductor layer and the active layer, and enters the first semiconductor layer, and a cracked surface which is contiguous to the first side surface, a first conductivity type side electrode formed on the first surface, and a second conductivity type side electrode formed on the second surface, wherein in-plane size of the semiconductor lamination is 50 μm or less.
US09543472B2	Diode-based devices and methods for making the same In accordance with an embodiment, a diode comprises a substrate, a dielectric material including an opening that exposes a portion of the substrate, the opening having an aspect ratio of at least 1, a bottom diode material including a lower region disposed at least partly in the opening and an upper region extending above the opening, the bottom diode material comprising a semiconductor material that is lattice mismatched to the substrate, a top diode material proximate the upper region of the bottom diode material, and an active diode region between the top and bottom diode materials, the active diode region including a surface extending away from the top surface of the substrate.
US09543466B2	Method for forming shield tunnels in single-crystal substrates A method of processing a single-crystal member includes setting the peak energy density of a pulsed laser beam to a value in a range from 1 TW/cm2 to 100 TW/cm2, and applying the pulsed laser beam to the single-crystal member while positioning a converged point of the pulsed laser beam at a predetermined position spaced from an upper side of the single-crystal member to grow a fine hole and a amorphous region shielding the fine hole from the upper side of the single-crystal member, thereby forming a shield tunnel in the single-crystal member.
US09543465B2	Method for manufacturing light emitting device A method for manufacturing a light emitting device has: preparing a base body which comprises a pair of connection terminals; preparing a light emitting element which includes a substrate, a semiconductor laminate that is laminated on the substrate, and a pair of electrodes formed on the surface of the semiconductor laminate; joining the electrodes of the light emitting element to the connection terminals of the base body; covering the light emitting element with a sealing member; and removing at least a part of the sealing member and a part of the substrate of the light emitting element from the opposite side from the base body so that an upper surface of the sealing member is lower than an upper surface of the substrate of the light emitting element.
US09543461B2	Encapsulating material for solar cell and solar cell module An encapsulating material for solar cell that is capable of suppressing the corrosion of metal and the occurrence of yellowing at a high temperature and has excellent long-term reliability in a constant temperature and humidity is provided.The encapsulating material for solar cell of the invention contains an ethylene/α-olefin copolymer, a hindered amine-based light stabilizer, a hindered phenol-based stabilizer, and a phosphorous-based stabilizer as essential components.
US09543460B2	Curable polyorganosiloxane composition for use as an encapsulant for a solar cell module The invention relates to curable polyorganosiloxane compositions for the use as an encapsulant for a solar cell module, in particular, for the encapsulation of photovoltaic modules, cured polyorganosiloxane composition made therefrom and photovoltaic modules comprising the same as encapsulant.
US09543450B2	Semiconductor devices and methods for manufacturing the same Semiconductor devices and methods for manufacturing the same are provided. In one embodiment, the method may include: forming a first shielding layer on a substrate, and forming one of source and drain regions with the first shielding layer as a mask; forming a second shielding layer on the substrate, and forming the other of the source and drain regions with the second shielding layer as a mask; removing a portion of the second shielding layer which is next to the other of the source and drain regions; forming a first gate dielectric layer and floating gate layer; forming a mask layer as a spacer on a sidewall of a remaining portion of the second shielding layer, and patterning the floating gate layer with the mask layer as a mask, and then removing the mask layer; and forming a second gate dielectric layer, and forming a gate conductor as a spacer on the sidewall of the remaining portion of the second shielding layer.
US09543449B2	Thin film transistor and method of manufacturing the same As source and drain wiring, a base layer and a cap layer are each formed of a MoNiNb alloy film, and a low-resistance layer is formed of Cu. The resultant laminated metal film is patterned through one-time wet etching to form a drain electrode and a source electrode. Cu serving as a main wiring layer does not corrode because of being covered with a MoNiNb alloy having good corrosion resistance. Further, even when a protective insulating film including an oxide is formed by plasma CVD in an oxidizing atmosphere, Cu is not oxidized. With the wet etching, the sidewall taper angle of the laminated metal film can be controlled to 20 degrees or more and less than 70 degrees.
US09543442B2	Manufacture method of dual gate oxide semiconductor TFT substrate and structure thereof The present invention provides a manufacture method of an oxide semiconductor TFT substrate and a structure thereof. The manufacture method of the dual gate oxide semiconductor TFT substrate utilizes the halftone mask to implement one photo process, which cannot only accomplish the patterning to the oxide semiconductor layer but also obtain the oxide conductor layer (52′) with ion doping process, and the oxide conductor layer (52′) is employed as being the pixel electrode of the LCD to replace the ITO pixel electrode in prior art; the method manufactures the source (81), the drain (82) and the top gate (71) at the same time with one photo process; the method implements patterning process to the passivation layer (8) and the top gate isolation layer (32) together with one photo process, to reduce the number of the photo processes to five for shortening the manufacture procedure, raising the production efficiency and lowering the production cost.
US09543439B2	Semiconductor device structure and manufacturing method thereof Some embodiments of the present disclosure provide a semiconductor device. The semiconductor device includes a semiconductive substrate; a gate structure over a fin structure of the semiconductive substrate; a channel portion of the fin structure under the gate structure; and at least one epitaxy region disposed over the semiconductive substrate and in contact with the channel portion. The epitaxy region includes a substance with a first lattice constant larger than a second lattice constant of the semiconductive substrate; and a concentration profile of the substance in the epitaxy region being decreasing from near a bottom portion to near a top portion. The bottom portion is closer to the channel portion than the top portion.
US09543437B2	Integrated circuit with dual stress liner boundary An integrated circuit with DSL borders perpendicular to the transistor gates primarily inside the nwell and with DSL borders parallel to the transistor gates primarily outside the nwell. A method for forming an integrated circuit with DSL borders perpendicular to the transistor gates primarily inside the nwell and with DSL borders parallel to the transistor gates primarily outside the nwell.
US09543436B2	Method and structure of making enhanced UTBB FDSOI devices An integrated circuit die includes a substrate having a first layer of semiconductor material, a layer of dielectric material on the first layer of semiconductor material, and a second layer of semiconductor material on the layer of dielectric material. An extended channel region of a transistor is positioned in the second layer of semiconductor material, interacting with a top surface, side surfaces, and potentially portions of a bottom surface of the second layer of semiconductor material. A gate dielectric is positioned on a top surface and on the exposed side surface of the second layer of semiconductor material. A gate electrode is positioned on the top surface and the exposed side surface of the second layer of semiconductor material.
US09543435B1	Asymmetric multi-gate finFET An asymmetrical finFET device includes at least one semiconductor fin on an upper surface of a semiconductor substrate. The fin extends along a length of the semiconductor substrate to define a fin length. A plurality of gate structures wrap around the sidewalls and upper fin surface of the fin. The plurality of gate structures includes at least one desired gate structure surrounded by at least one sacrificial gate structure. A first source/drain region is formed adjacent a first sidewall of the at least one desired gate structure, and a second source/drain region is formed adjacent a second sidewall of the at least one desired gate structure opposite the first sidewall. The dimensions of the first and second source/drain regions are asymmetrical with respect to one another.
US09543426B2	Semiconductor devices with self-aligned contacts and low-k spacers One illustrative method disclosed herein includes removing a portion of a sacrificial sidewall spacer to thereby expose at least a portion of the sidewalls of a sacrificial gate electrode and forming a liner layer on the exposed sidewalls of the sacrificial gate electrode. In this example, the method also includes forming a sacrificial gap fill material above the liner layer, exposing and removing the sacrificial gate electrode to thereby define a gate cavity that is laterally defined by the liner layer, forming a replacement gate structure, removing the sacrificial gap fill material and forming a low-k sidewall spacer adjacent the liner layer. A device is also disclosed that includes a gate cap layer, a layer of silicon nitride or silicon oxynitride positioned on each of two upstanding portions of a gate insulation layer and a low-k sidewall spacer positioned on the layer of silicon nitride or silicon oxynitride.
US09543424B2	Method for growing III-V epitaxial layers and semiconductor structure Disclosed are methods of growing III-V epitaxial layers on a substrate, a semiconductor structure comprising a substrate, a device comprising such a semiconductor structure, and an electronic circuit. Group III-nitride devices, such as, for example, high-electron-mobility transistors, may include a two-dimensional electron gas (2DEG) between two active layers. For example, the 2DEG may be between a GaN layer and a AlGaN layer. These transistors may work in depletion-mode operation, which means the channel has to be depleted to turn the transistor off. For certain applications, such as, for example, power switching or integrated logic, negative polarity gate supply is undesired. Transistors may then work in enhancement mode (E-mode).
US09543422B1	Semiconductor device A semiconductor device includes a second region of a second conductivity type above a first region of a first conductivity type. A gate electrode has a portion surrounded by the second region via a gate insulating layer. A first electrode, which is separated from the gate electrode, has a portion surrounded by the second region via a first insulating layer. A third region of a second conductivity type is between the first insulating layer and the gate insulating layer. The third region contacts the first insulating layer and has a second conductivity type carrier concentration higher than the second region. A fourth region has a portion aligned with the third region along a first direction. A fifth region of the second conductivity type contacts the gate insulating layer and is aligned with the first portion along a second direction perpendicular to the first direction.
US09543419B1	FinFET structures and methods of forming the same An embodiment is a method including forming an epitaxial portion over a substrate, the epitaxial portion including a III-V material. A damaged material layer being on at least one surface of the epitaxial portion. The method further including oxidizing at least outer surfaces of the damaged material layer to form an oxide layer, selectively removing the oxide layer, and repeating the oxidizing and the selectively removing steps while at least a portion of the damaged material layer remains on the epitaxial portion.
US09543415B2	Thin film transistor driving backplane and manufacturing method thereof, and display panel The embodiments of the present invention provide a thin film transistor driving backplane and a manufacturing method thereof, and a display panel. The manufacturing method may comprise: manufacturing a backplane base disposed with a plurality of active device structures; disposing an electrode layer on the backplane base; and manufacturing the electrode layer into a source electrode, a drain electrode and a pixel electrode integrally disposed with the drain electrode by one patterning process. According to the embodiment of the present invention, the electrode layer is manufactured into a plurality of source electrodes, drain electrodes and pixel electrodes, integrally disposed with the drain electrode, by one time patterning process, so that the source electrode, the drain electrode and the pixel electrode are all at the same electrode layer, and the source electrode, the drain electrode and the pixel electrode whose formation needs two patterning processes in the existing method, is simplified to one time patterning process, so it reduces the thickness of the thin film transistor driving backplane, simplifies the manufacturing step, and saves the manufacturing cost.
US09543411B2	Lateral double diffusion metal-oxide-semiconductor (LDMOS) transistors and fabrication method thereof A lateral double diffusion metal-oxide-semiconductor (LDMOS) transistor is provided. The LDMOS transistor includes a semiconductor substrate having a well region and a drain region in the well region. The LDMOS transistor also includes at least one drifting region in the well region and an annular source region in the drifting region surrounding the drain region. Further, the LDMOS transistor includes at least one annular isolation structure surrounding the drain region in the drifting region. Further, the LDMOS transistor also includes an annular gate dielectric layer on the well region and an annular gate on the annular gate dielectric layer.
US09543410B2	Semiconductor device and formation thereof A semiconductor device and method of forming the same are described. A semiconductor device includes an active area adjacent a gate structure. The gate structure includes a gate electrode over a gate dielectric, the gate dielectric having a bottom surface in a first plane. A second etch interacts with a first composition and an initial dopant to remove a bottom portion of a first sidewall spacer adjacent the gate structure, such that a bottom surface of the first sidewall spacer lies in a second plane different than the first plane. The removal of the bottom portion of the first sidewall spacer reduces a first distance between a source or drain and a bottom surface of the gate electrode, thus reducing proximity loading of the semiconductor device and improving functionality of the semiconductor device.
US09543409B2	Production of spacers at flanks of a transistor gate The production of spacers at flanks of a transistor gate, including a step of forming a dielectric layer covering the gate and a peripheral region of a layer of semiconductor material surrounding the gate, including forming a superficial layer covering the gate and the peripheral region; partially removing the superficial layer configured so as to completely remove the superficial layer at the peripheral region while preserving a residual part of the superficial layer at the flanks; and selective etching of the dielectric layer vis-à-vis the material of the residual part of the superficial layer and vis-à-vis the semiconductor material.
US09543408B1	Method of forming patterned hard mask layer A method of forming a patterned hark mask layer includes the following steps. A semiconductor substrate is provided. An amorphous silicon layer is formed on the semiconductor substrate. An implantation process is performed on the amorphous silicon layer. An annealing treatment is performed on the amorphous silicon layer after the implantation process. A patterned hard mask layer is formed on the amorphous silicon layer after the annealing treatment.
US09543405B2	Method of manufacturing a reduced free-charge carrier lifetime semiconductor structure A method of manufacturing a reduced free-charge carrier lifetime semiconductor structure includes forming a plurality of transistor gate structures in trenches arranged in a semiconductor substrate, forming a body region between adjacent ones of the transistor gate structures and forming an end-of-range irradiation region between adjacent ones of the transistor gate structures, the end-of-range irradiation region having a plurality of vacancies.
US09543403B2	Bipolar junction transistor with multiple emitter fingers Device structures for a bipolar junction transistor and methods of fabricating a device structure for a bipolar junction transistor. A first semiconductor layer is formed on a substrate, and a second semiconductor layer is formed on the first semiconductor layer. The first semiconductor layer, the second semiconductor layer, and the substrate are etched to define first and second emitter fingers from the second semiconductor layer and trenches in the substrate that are laterally positioned between the first and second emitter fingers. The first semiconductor layer may function as a base layer in the device structure.
US09543401B2	3D semiconductor integrated circuit device and method of manufacturing the same A 3D semiconductor integrated circuit device and a method of manufacturing the same are provided. An active pillar is formed on a semiconductor substrate, and an interlayer insulating layer is formed so that the active pillar is buried in the interlayer insulating layer. The interlayer insulating layer is etched to form a hole so that the active pillar and a peripheral region of the active pillar are exposed. An etching process is performed on the peripheral region of the active pillar exposed through the hole by a certain depth, and a space having the depth is provided between the active pillar and the interlayer insulating layer. A silicon material layer is formed to be buried in the space having the depth, and an ohmic contact layer is formed on the silicon material layer and the active pillar.
US09543398B2	Semiconductor switching device including charge storage structure A semiconductor switching device includes a first load terminal electrically connected to source zones of transistor cells. The source zones form first pn junctions with body zones. A second load terminal is electrically connected to a drain construction that forms second pn junctions with the body zones. Control structures, which include a control electrode and charge storage structures, directly adjoin the body zones. The control electrode controls a load current through the body zones. The charge storage structures insulate the control electrode from the body zones and contain a control charge adapted to induce inversion channels in the body zones in the absence of a potential difference between the control electrode and the first load electrode.
US09543392B1	Transparent group III metal nitride and method of manufacture Large-area, low-cost single crystal transparent gallium-containing nitride crystals useful as substrates for fabricating GaN devices for electronic and/or optoelectronic applications are disclosed. The gallium-containing nitride crystals are formed by controlling impurity concentrations during ammonothermal growth and processing to control the relative concentrations of point defect species.
US09543390B2	Transistor having a heterojunction and manufacturing method thereof A transistor includes a semiconductor substrate comprising a first region and a second region. The transistor further includes an emitter and a base disposed on the first region, and a collector disposed on the second region. The emitter includes a heterojunction. The heterojunction is at a same height as a junction between two different insulating materials that separate the emitter and the base.
US09543388B2	Complementary metal-oxide silicon having silicon and silicon germanium channels A silicon germanium on insulator (SGOI) wafer having nFET and pFET regions is accessed, the SGOI wafer having a silicon germanium (SiGe) layer having a first germanium (Ge) concentration, and a first oxide layer over nFET and pFET and removing the first oxide layer over the pFET. Then, increasing the first Ge concentration in the SiGe layer in the pFET to a second Ge concentration and removing the first oxide layer over the nFET. Then, recessing the SiGe layer of the first Ge concentration in the nFET so that the SiGe layer is in plane with the SiGe layer in the pFET of the second Ge concentration. Then, growing a silicon (Si) layer over the SGOI in the nFET and a SiGe layer of a third concentration in the pFET, where the SiGe layer of a third concentration is in plane with the grown nFET Si layer.
US09543387B2	Semiconductor device and manufacturing method thereof A semiconductor device includes a gate structure located on a substrate and a raised source/drain region adjacent to the gate structure. The raised source/drain region includes: a first epitaxial-grown doped layer of the raised source/drain region in contact with the substrate; a second epitaxial-grown doped layer on the first epitaxial-grown doped layer and including a same dopant species as the first epitaxial-grown doped layer, wherein the second epitaxial-grown doped layer includes a higher dopant concentration than the first epitaxial-grown doped layer and interfacing the gate structure by using a predetermined distance; and a third epitaxial-grown doped layer on the second epitaxial-grown doped layer and including the same dopant species as the first epitaxial-grown doped layer, wherein the third epitaxial-grown doped layer includes a higher dopant concentration than the second epitaxial-grown doped layer.
US09543384B2	Semiconductor package A semiconductor device includes a substrate, an elastic buffer layer disposed on a surface of the substrate, wiring patterns disposed on a first surface of the elastic buffer layer, and a semiconductor chip disposed on a second surface of the elastic buffer layer facing away from the first surface of the elastic buffer layer. The semiconductor chip includes trenches formed on a surface facing the elastic buffer layer. Interconnection members are disposed to electrically connect the elastic buffer layer to the substrate. Each of the interconnection members has one end electrically connected to one of the wiring patterns and the other end electrically connected to the substrate.
US09543383B2	High-speed high-power semiconductor devices High-speed high-power semiconductor devices are disclosed. In an exemplary design, a high-speed high-power semiconductor device includes a source, a drain to provide an output signal, and an active gate to receive an input signal. The semiconductor device further includes at least one field gate located between the active gate and the drain, at least one shallow trench isolation (STI) strip formed transverse to the at least one field gate, and at least one drain active strip formed parallel to, and alternating with, the at least one STI strip. The semiconductor device may be modeled by a combination of an active FET and a MOS varactor. The active gate controls the active FET, and the at least one field gate controls the MOS varactor. The semiconductor device has a low on resistance and can handle a high voltage.
US09543382B1	FinFET with improved SEU performance Illustratively, a finFET comprises at least one fin, and typically several fins, with a trapping region in or on a substrate at the base of each fin to trap ions produced by radiation incident on the substrate. In one embodiment, the trapping region is an implanted region having a conductivity type opposite that of the substrate. In another, the trapping region is a defect region. In another, the trapping region is an epitaxial region grown on the substrate. The finFET is formed by forming the fin or fins and then forming the trapping region at the base of the fin. Illustratively, the trapping region is formed by implanting in the substrate ions having a conductivity type opposite that of the substrate or by creating defects in the substrate or by epitaxially growing a region or regions having an opposite conductivity type to that of the substrate.
US09543381B2	Semiconductor structure and manufacturing method of the same Present disclosure provides a semiconductor structure, including a substrate having a center portion and an edge portion, an isolation layer over the substrate; a semiconductor fin with a top surface and a sidewall surface, partially positioning in the isolation layer, a first gate covering a portion of the top surface and a portion of the sidewall surface of the semiconductor fin, positioning at an edge portion of the substrate, and a second gate covering a portion of the top surface and a portion of the sidewall surface of the semiconductor fin, positioning at a center portion of the substrate. A lower width of the first gate in proximity to the isolation layer is smaller than an upper width of the first gate in proximity to top surface of the semiconductor fin.
US09543378B2	Semiconductor devices and fabrication methods thereof Semiconductor devices and fabrication methods thereof are provided. The semiconductor devices include: a substrate, the substrate including a p-type well adjoining an n-type well; a first p-type region and a first n-type region disposed within the n-type well of the substrate, where the first p-type region at least partially encircles the first n-type region; and a second p-type region and a second n-type region disposed in the p-type well of the substrate, where the second n-type region at least partially encircles the second p-type region. In one embodiment, the first p-type region fully encircles the first n-type region and the second n-type region fully encircles the second p-type region. In another embodiment, the semiconductor device may be a bipolar junction transistor or a rectifier.
US09543377B2	Semiconductor device A semiconductor device comprising a substrate is disclosed. The substrate comprises: a well of type one; a first doped region of type two, provided in the well of type one; a well of type two, adjacent to the well of type one; and a first doped region of type one, doped in the well of type two. The substrate comprises no isolating material provided in a current path formed by the first doped region of type two, the well of type one, the well of type two and the first doped region of type one.
US09543374B2	Low temperature coefficient resistor in CMOS flow A method for adding a low TCR resistor to a baseline CMOS manufacturing flow. A method of forming a low TCR resistor in a CMOS manufacturing flow. A method of forming an n-type and a p-type transistor with a low TCR resistor in a CMOS manufacturing flow.
US09543366B2	Display panel and display apparatus having the same The embodiments of the present invention provide a display panel and a display apparatus having the display panel. The display panel includes: an array substrate, a printed circuit board, a chip on film. One end of the chip on film is attached to a connection region of the array substrate, and the other end of the chip on film is attached to the printed circuit board, and the surface of the chip on film disposed with a chip faces the array substrate, and the connection region is disposed at a side of the array substrate away from a light-emitting surface.
US09543357B2	Magnetoresistive random access memory devices and methods of manufacturing the same An MRAM device comprises an insulating interlayer comprising a flat first upper surface on a first region and a second region of a substrate. A pattern structure comprising pillar-shaped magnetic tunnel junction (MTJ) structures and a filling layer pattern between the MTJ structures is formed on the insulating interlayer of the first region. The pattern structure comprises a flat second upper surface that is higher than the first upper surface. Bit lines are formed on the pattern structure that contact top surfaces of the MTJ structures. An etch-stop layer is formed on the pattern structure between the bit lines of the first region and the first upper surface of the first insulating interlayer of the second region. A first portion of an upper surface of the etch-stop layer on the first region is higher than a second portion of the upper surface of the etch-stop layer on the second region.
US09543352B2	CMOS image sensor with embedded micro-lenses A backside illuminated CMOS image sensor and a manufacturing method thereof are provided. Embedded micro-lenses disposed respectively on concave surfaces of a buffer oxide layer, wherein the concave surfaces are positioned to respectively align with photodiodes of pixel array of the CMOS image sensor. The embedded micro-lenses can confine incident light to the photodiodes to reduce optical crosstalk between adjacent pixels.
US09543349B2	CMOS image sensors having a transfer gate electrode, and methods of fabricating CMOS image sensors having a transfer gate electrode Complementary metal-oxide-semiconductor (CMOS) image sensors are provided. A CMOS image sensor includes a substrate including a pixel array and a peripheral circuit region, a photodiode and a floating diffusion region in the pixel array of the substrate, a transfer gate insulating layer and a transfer gate electrode on the substrate between the photodiode and the floating diffusion region, and a peripheral gate insulating layer and a peripheral gate electrode on the peripheral circuit region. The transfer gate electrode includes a first edge that is rounded to have a first radius of curvature, and the peripheral gate electrode includes a second edge that is rounded to have a second radius of curvature smaller than the first radius of curvature.
US09543344B2	Imaging apparatus An imaging apparatus includes a light emitting element layer, an optically transmissive first substrate and a light receiving element. The light emitting element layer faces a plurality of lenses. The optically transmissive first substrate includes a first surface with the light emitting element layer being disposed on the first surface. The light receiving element is arranged on an opposite side to the light emitting element layer so as to interpose the first substrate.
US09543331B2	Array substrate and manufacturing method thereof, display device An array substrate and manufacturing method thereof, and a display device are capable of preventing light reflection from a drain electrode, and guaranteeing the display effect of the display device. The array substrate includes a drain electrode of a thin film transistor unit, an insulating layer and a pixel electrode. The insulating layer is located between the drain electrode and the pixel electrode, and has a via hole formed therein, and the drain electrode and the pixel electrode are connected through the via hole. A surface of the pixel electrode at the via hole is a rough face.
US09543326B2	Display device According to one embodiment, a display device includes a first light shielding layer, a second light shielding layer, a first semiconductor layer, a second semiconductor layer, a gate line, a first source line, a second source line, a switching element, and a pixel electrode, wherein an area in which the first light shielding layer and the pixel electrode are opposed to each other and an area in which the second light shielding layer and the pixel electrode are opposed to each other are equal in size.
US09543325B2	Array substrate and manufacturing method thereof, liquid crystal display panel and display device An array substrate and a manufacturing method thereof, a liquid crystal display panel and a display device are provided, the array substrate comprises a base substrate, and thin film transistors and pixel electrodes provided on the base substrate, the pixel electrode and the active layer in the thin film transistor are provided in the same layer. The active layer is formed of transparent oxide semiconductor material, and the concentration of carriers in the oxide semiconductor material may be increased by performing a plasma process on the oxide semiconductor material, thus the pixel electrode may be manufactured by using the oxide semiconductor material used for manufacturing the active layer, thereby the pixel electrode and the active layer can be provided in the same layer, the number of the masks can be reduced, the manufacturing process is simplified, production cost is saved, the productivity is increased, and the manufacturing time is shortened.
US09543321B1	Semiconductor memory device and method of manufacturing the same A semiconductor memory device according to an embodiment comprises a stacked body, a semiconductor layer, a charge accumulation layer, and a slit portion. The stacked body includes a plurality of control gate electrodes stacked above a substrate. The semiconductor layer has one end thereof connected to the substrate, and faces the plurality of control gate electrodes. The charge accumulation layer is positioned between the control gate electrode and the semiconductor layer. The slit portion extends in a direction of the substrate from a surface of the stacked body, wherein the slit portion has its longitudinal direction in a direction intersecting the first direction.
US09543318B1	Three dimensional memory device with epitaxial semiconductor pedestal for peripheral transistors An alternating stack of insulator layers and spacer material layers is formed over a substrate. Stepped surfaces are formed in a contact region in which contact via structures are to be subsequently formed. An epitaxial semiconductor pedestal can be formed by a single epitaxial deposition process that is performed after formation of the stepped surfaces and prior to formation of memory openings, or a combination of a first epitaxial deposition process performed prior to formation of memory openings and a second epitaxial deposition process performed after formation of the memory openings. The epitaxial semiconductor pedestal can have a top surface that is located above a topmost surface of the alternating stack. The spacer material layers are formed as, or can be replaced with, electrically conductive layers. Backside contact via structures can be subsequently formed.
US09543317B2	Semiconductor device and method of manufacturing the same A semiconductor device includes interlayer insulating films spaced apart from each other and stacked over each other, and wherein first ends of the interlayer insulating films form a stepped structure; a slit penetrating the interlayer insulating films and dividing the interlayer insulating films into a plurality of stack structures; line patterns arranged between adjacent interlayer insulating films and separated from each other by the slit; pad patterns connected to the line patterns, formed over the first ends of the interlayer insulating films, and separated from each other by the slit; and at least one punch prevention pattern formed over sidewalls of the pad patterns adjacent to the slit and formed over the first ends of the interlayer insulating films.
US09543315B1	Semiconductor device The memory cell includes a gate insulating film, a control gate electrode, a cap insulating film, a cap layer, another gate insulating film, and a memory gate electrode. A laminated capacitive element includes a capacitive electrode which is constituted by a sub-electrode and another sub-electrode formed of mesa portions (protruding portions) disposed on the sub-electrode at a predetermined interval and each having an upper surface and side surfaces, a capacitive insulating film which is formed along an upper surface of the sub-electrode and the upper surface and the side surfaces of the another sub-electrode, and another capacitive electrode which is formed on the capacitive insulating film. Further, the control gate electrode and the sub-electrode are made of a conductor film, the cap layer and the another sub-electrode are made of other conductor film, and the memory gate electrode and the another capacitive electrode are made of another conductor film.
US09543306B1	Sub word line driver of a semiconductor memory device A sub word line driver of a semiconductor memory device including a sub word line driver is disclosed. The sub word line driver of a semiconductor memory device comprising: a semiconductor substrate including an active region extended in a first direction; a plurality of gate electrodes extended in a second direction perpendicular to the active region; first and second metal contacts formed over the active region between the gate electrodes; a plurality of metal pads coupled to the first metal contacts; and a plurality of metal signal lines coupled to the second metal contacts, extended in the second direction, and bent at specific parts adjacent to the metal pads.
US09543298B1	Single diffusion break structure and cuts later method of making A method of forming a single diffusion break includes etching rows of fins into a substrate of a structure from a patterned fin hardmask, the remaining fin hardmask being self-aligned with the fins. A first dielectric fill material is disposed and planarized over the structure to expose the fin hardmask. A photoresist layer is disposed over the structure. An isolation region is patterned across the fins to form first and second parallel fin arrays, wherein any remaining photoresist layer has self-aligned edges which are self-aligned with the isolation region. The self-aligned edges are trimmed to expose end portions of the fin hardmask. The exposed end portions are removed. The remaining photoresist layer is removed. A second dielectric fill material is disposed and planarized over the structure to form a base for a single diffusion break (SDB) in the isolation region.
US09543294B2	Semiconductor device A semiconductor device includes a semiconductor substrate; and a temperature sense diode fixed on the semiconductor substrate. The temperature sense diode includes: an anode electrode; a p-type semiconductor layer being in contact with the anode electrode; an n-type semiconductor layer being in contact with the p-type semiconductor layer; and a cathode electrode being in contact with the n-type semiconductor layer; and the anode electrode. The p-type semiconductor layer, the n-type semiconductor layer, and the cathode electrode are stacked along a thickness direction of the semiconductor substrate. An electric resistivity of the anode electrode or the cathode electrode whichever is located closer to the semiconductor substrate is lower than an electric resistivity of the n-type semiconductor layer and an electric resistivity of the p-type semiconductor layer.
US09543293B2	Power semiconductor device having trench gate type IGBT and diode regions Switching loss is reduced. A first surface of a semiconductor substrate has a portion included in an IGBT region and a portion included in a diode region. Trenches formed in the first surface include a gate trench and a boundary trench disposed between the gate trench and the diode region. A fourth layer of the semiconductor substrate is provided on the first surface and has a portion included in the diode region. The fourth layer includes a trench-covering well region that covers the deepest part of the boundary trench, a plurality of isolated well regions, and a diffusion region that connects the trench-covering well region and the isolated well regions. The diffusion region has a lower impurity concentration than that of the isolated well regions. A first electrode is in contact with the isolated well regions and away from the diffusion region.
US09543289B2	Manufacturing method of semiconductor device A manufacturing method of a semiconductor device includes: depositing a thin film semiconductor layer on a semiconductor substrate with an insulating film therebetween, the insulating film having been formed on a surface of the semiconductor substrate; ion-implanting first impurity ions into the thin film semiconductor layer under a condition where a range of the first impurity ions becomes smaller than a film thickness of the thin film semiconductor layer when being deposited; and selectively ion-implanting second impurity ions into the thin film semiconductor layer with a dose quantity more than a dose quantity of the first impurity ions, in which a diode for detecting temperature is formed by a region into which the first impurity ions have been implanted and a region into which the second impurity ions have been implanted in the thin film semiconductor layer.
US09543288B2	Semiconductor isolation structure The invention relates to a semiconductor isolation structure. More particularly, the present invention relates to a semiconductor isolation structure suitable for providing high voltage isolation. Embodiments disclosed include a semiconductor structure (10) comprising: a first semiconductor region (R1), a second semiconductor region (R2) within the first semiconductor region (R1), and a voltage isolator (11) separating the first and second semiconductor regions (R1, R2), the voltage isolator (11) comprising: a nested series of insulating regions (T1, T2) around the perimeter of the second semiconductor region (R2), an intermediate semiconductor region (I1, I2) between each adjacent pair of nested insulating regions (T1, T2), and a voltage control device (12) comprising a conducting element (D1-D3) connected to at least one intermediate semiconductor region (I1, I2) in parallel with the at least one insulating region (T1, T2), so as to control a voltage across the at least one insulating region (T1, T2).
US09543277B1	Wafer level packages with mechanically decoupled fan-in and fan-out areas A fan-out microelectronic package is provided in which bond wires electrically couple bond pads on a microelectronic element, e.g., a semiconductor chip which may have additional traces thereon, with contacts at a fan-out area of a dielectric element adjacent an edge surface of the chip. The bond wires mechanically decouple the microelectronic element from the fan-out area, which can make the electrical interconnections less prone to reliability issues due to effects of differential thermal expansion, such as caused by temperature excursions during initial package fabrication, bonding operations or thermal cycling. In addition, mechanical decoupling provided by the bond wires may also remedy other mechanical issues such as shock and possible delamination of package elements.
US09543276B2	Chip-stacked semiconductor package A chip-stacked semiconductor package including a first chip having a plurality of first real bump pads and a plurality of first dummy bump pads, a second chip on the first chip, the second chip including a plurality of real bumps and a plurality of bridge dummy bumps, the plurality of real bumps electrically connected to the plurality of first real bump pads, the plurality of bridge dummy bumps connected to the plurality of first dummy bump pads, and a sealing member sealing the first chip and the second chip may be provided.
US09543275B2	Semiconductor package with a lead, package-on-package device including the same, and mobile device including the same A semiconductor package includes a substrate; a first semiconductor chip arranged on the substrate; a second semiconductor chip arranged on the first semiconductor chip; a lead attached to the second semiconductor chip on a side of the second semiconductor chip opposite a side of the second semiconductor chip facing the first semiconductor chip; and a molding member covering an upper surface of the substrate and side surfaces of the lead and sealing the first semiconductor chip and the second semiconductor chip.
US09543273B2	Reduced volume interconnect for three-dimensional chip stack A method of forming a reduced volume interconnect for a chip stack including multiple silicon layers, the method including: forming multiple conductive structures, each of at least a subset of the conductive structures having a volume of conductive material for a corresponding under bump metallurgy pad onto which the conductive structure is transferred that is configured such that a ratio of an unreflowed diameter of the conductive structure to a diameter of the corresponding pad is about one third-to-one or less; transferring the conductive structures to the silicon layers; stacking the silicon layers in a substantially vertical dimension such that each of the conductive structures on a given silicon layer is aligned with a corresponding electrical contact location on an underside of an adjacent silicon layer; and heating the interconnect so as to metallurgically bond multiple electrical contact locations of adjacent silicon layers.
US09543266B2	Bonding wire for semiconductor device use and method of production of same Bonding wire for semiconductor device use where both leaning failures and spring failures are suppressed by (1) in a cross-section containing the wire center and parallel to the wire longitudinal direction (wire center cross-section), there are no crystal grains with a ratio a/b of a long axis “a” and a short axis “b” of 10 or more and with an area of 15 μm2 or more (“fiber texture”), (2) when measuring a crystal direction in the wire longitudinal direction in the wire center cross-section, the ratio of crystal direction <100> with an angle difference with respect to the wire longitudinal direction of 15° or less is, by area ratio, 10% to less than 50%, and (3) when measuring a crystal direction in the wire longitudinal direction at the wire surface, the ratio of crystal direction <100> with an angle difference with respect to the wire longitudinal direction of 15° or less is, by area ratio, 70% or more. During the drawing step, a drawing operation with a rate of reduction of area of 15.5% or more is performed at least once. The final heat treatment temperature and the pre-final heat treatment temperature are made predetermined ranges.
US09543259B2	Semiconductor structure with oval shaped conductor A semiconductor structure includes a semiconductive substrate, a post passivation interconnect (PPI) and a polymer layer. The PPI is disposed above the semiconductive substrate and includes a landing area for receiving a conductor. The polymer layer is on the PPI, wherein the conductor is necking a turning point so as to include an oval portion being substantially surrounded by the polymer layer, and the oval portion of the conductor is disposed on the landing area of the PPI.
US09543257B2	3DIC interconnect devices and methods of forming same An interconnect device and a method of forming the interconnect device are provided. Two integrated circuits are bonded together. A first opening is formed through one of the substrates. One or more dielectric films are formed along sidewalls of the first opening. A second opening is formed extending from the first opening to pads in the integrated circuits, while using some of the pads as hard masks. The first opening and the second opening are filled with a conductive material to form a conductive plug.
US09543254B2	Chamfered corner crackstop for an integrated circuit chip A corner crackstop is formed in each of the four corners of an integrated circuit (IC) chip, in which the corner crackstop differs structurally from a portion of the crackstop disposed along the sides of the IC chip. Each corner crackstop includes a plurality of layers, formed on a top surface of a silicon layer of the IC chip, within a perimeter boundary region that comprises a triangular area, in which a right angle is disposed on a bisector of the corner, equilateral sides of the triangle are parallel to sides of the IC chip, and the right angle is proximate to the corner relative to a hypotenuse of the triangle. The plurality of layers of the corner crackstop include crackstop elements, each comprising a metal cap centered over a via bar, in which the plurality of layers of the corner crackstop is chamfered to deflect crack ingress forces by each corner crackstop.
US09543252B2	Semiconductor apparatus and method for producing the same A plurality of semiconductor devices provided on a silicon carbide substrate are provided with electrode layers, respectively. The silicon carbide substrate is cut at a region of an exposed surface of the silicon carbide substrate that separates the electrode layers to individually separate the semiconductor devices. A stress relaxation resin is applied to each individually separated semiconductor device to cover the exposed surface at a peripheral end portion of that surface of the semiconductor device which has the electrode layer thereon. A semiconductor apparatus can thus be obtained that also allows a semiconductor device with a silicon carbide or similar compound semiconductor substrate to adhere to a sealant resin via large adhesive strength and thus allows the sealant resin to be less crackable, less peelable and the like by thermal stress caused in operation.
US09543249B1	Package substrate with lateral communication circuitry A package substrate having a first redistribution layer (RDL1) and a second redistribution layer (RDL2) is disclosed for a multichip package. The first redistribution layer RDL1 is built according to a first design rule. The second redistribution layer RDL2 is built according to a second design rule and configured on a bottom of the first redistribution layer RDL1. The second design rule has a lower circuitry density than the first design rule has. A lateral communication circuitry is built within the first redistribution layer RDL1 according to the first design rule adaptive for bridging neighboring chips which are configured on a top surface of the first redistribution layer RDL1.
US09543248B2	Integrated circuit devices and methods An integrated circuit device includes a first metal layer including aluminum. The integrated circuit device includes a second metal layer including an interconnect structure. The interconnect structure includes a layer of first material including aluminum. The integrated circuit device includes an inter-diffusion layer that includes aluminum. The inter-diffusion layer is proximate to the first metal layer and proximate to the layer of first material including aluminum. The integrated circuit device includes a self-forming barrier layer that includes aluminum. The self-forming barrier layer is proximate to a dielectric layer and proximate to the layer of first material including aluminum.
US09543240B2	DC-DC converter having terminals of semiconductor chips directly attachable to circuit board A power supply system has a leadframe with leads and a pad. The pad surface facing a circuit board has a portion recessed with a depth and an outline suitable for attaching side-by-side the sync and the control FET semiconductor chips. The input terminal of the control FET and the grounded output terminal of the sync FET are coplanar with the un-recessed portion of the pad (switch node terminal) so that all terminals can be directly attached to contacts of a circuit board. A driver-and-control chip is vertically stacked to the opposite pad surface and encapsulated in a packaging compound.
US09543238B1	Semiconductor device A semiconductor device includes a center semiconductor chip with a plurality of die pads, a plurality of lead frames, and a plurality of connecting components. The lead frame encapsulates the center semiconductor chip. Each connecting components establishes an electrical connection between the center semiconductor chip and the lead frame. At least one of the center semiconductor chip, the lead frame, and the connecting component forms an indicator.
US09543235B2	Semiconductor package and method therefor In one embodiment, an electronic package structure includes a lead having a first width. An electronic chip having a conductive bump on a major surface, the conductive bump has a second width greater than the first width. The conductive bump is attached to the lead such that a portion of the conductive bump extends to at least partially surround a side surface of the lead. A molding compound resin encapsulates the electronic chip, the conductive bump, and at least a portion of the lead. The lead is configured so strengthen the joining force between the lead and conductive bump.
US09543234B2	In-situ formation of silicon and tantalum containing barrier A method includes forming an opening in a dielectric layer, and forming a silicon rich layer on a surface of the dielectric layer. A portion of the silicon rich layer extends into the opening and contacts the dielectric layer. A tantalum-containing layer is formed over and the contacting the silicon rich layer. An annealing is performed to react the tantalum-containing layer with the silicon rich layer, so that a tantalum-and-silicon containing layer is formed.
US09543229B2	Combination of TSV and back side wiring in 3D integration The embodiments of the present invention relate generally to the fabrication of integrated circuits, and more particularly to a structure and method for fabricating a 3D integration scheme for multiple semiconductor wafers using an arrangement of intra-wafer through silicon vias (TSVs) to electrically connect the front side of a first integrated circuit (IC) chip to large back side wiring on the back side of the first IC chip and inter-wafer TSVs to electrically connect the first IC chip to a second IC chip.
US09543228B2	Semiconductor device, semiconductor integrated circuit device, and electronic device A semiconductor device includes a semiconductor substrate; an active element configured to be formed on the semiconductor substrate; and a multi-layer wiring structure configured to be formed on the semiconductor substrate. A heat dissipation structure is provided in the multi-layer wiring structure. The upper end of the heat dissipation structure forms an external connection pad to be connected with an external wiring board, and the lower end of the heat dissipation structure makes contact with a surface of the semiconductor substrate outside of an element forming region for the active element.
US09543223B2	Method and apparatus for fabricating wafer by calculating process correction parameters A method of calculating an overlay correction model in a unit for the fabrication of a wafer is disclosed. The method comprises measuring overlay deviations of a subset of first overlay marks and second overlay marks by determining the differences between the subset of first overlay marks generated in the first layer and corresponding ones of the subset of second overlay marks generated in the second layer.
US09543222B2	Methods for measuring the full well capacity of CMOS image sensors An integrated circuit device includes a transfer-gate transistor, and a photo diode connected to a source/drain region of the transfer-gate transistor. An electrical fuse is electrically coupled to a gate of the transfer-gate transistor. A diode is electrically coupled to the electrical fuse.
US09543221B2	Method of manufacturing light-emitting apparatus, light-emitting module inspecting apparatus, and method of determining whether light-emitting module meets quality requirement A method of manufacturing a light-emitting apparatus includes disposing a substrate on a support; disposing a light-emitting package including a light-emitting device on the substrate so as to allow the light-emitting package to be positioned at a target position on the substrate; applying energy to the light-emitting package to make the light-emitting device emit light; and analyzing the light that is emitted from the light-emitting device due to the energy, and determining a position where the light-emitting package is actually disposed. Thus, the light-emitting apparatus may be easily and inexpensively manufactured, and may generate a limited number of spots and provide improved uniform brightness.
US09543219B2	Void monitoring device for measurement of wafer temperature variations A method of monitoring a temperature of a plurality of regions in a substrate during a deposition process, the monitoring of the temperature including: forming, in the monitored plurality of regions, a plurality of metal structures each with a different metal pattern density, where each metal pattern density corresponds to a threshold temperature at or above which metal voids and surface roughness are formed in the plurality of metal structures, and detecting metal voids and surface roughness in the plurality of metal structures to determine the temperature of the monitored plurality of regions.
US09543217B2	Semiconductor device and method of manufacturing semiconductor device One embodiment includes a vertical n-channel power MOSFET for an output stage and a horizontal p-channel MOSFET for controlling the vertical n-channel power MOSFET are disposed on a single semiconductor substrate. The horizontal p-channel MOSFET has Psd (a p+-type source region and a p+-type drain region) formed in a self-aligning manner at a gate electrode. The Psd has p+-type diffusion regions disposed therein causing the Psd to partially have a high impurity concentration. The p+-type diffusion regions are connected to respective metal wiring layers through contact holes that are formed by ion implantation concurrently with a p+-type diffusion region of the vertical n-channel power MOSFET and that have a width narrower than conventional contact holes. In this way, contact properties can be improved between the metal wiring layer and a semiconductor portion and size reductions can be achieved.
US09543216B2	Integration of hybrid germanium and group III-V contact epilayer in CMOS A trench contact epilayer in a semiconductor device is provided. Embodiments include forming trenches through an interlayer dielectric (ILD) over source/drain regions in NFET and PFET regions; depositing a conformal silicon nitride (SiN) layer over the ILD and in the trenches; removing the SiN layer in the PFET region; growing a germanium (Ge) epilayer over the source/drain regions in the PFET region; depositing metal over the ILD and in the trenches in the NFET and PFET regions; etching the metal in the NFET region to expose the conformal SiN layer; removing the SiN layer in the NFET region; growing a Group III-V epilayer over the source/drain regions in the NFET region; and depositing metal over the ILD and in the trenches in the NFET region.
US09543215B2	Punch-through-stop after partial fin etch A method of reducing current leakage in three-dimensional semiconductor devices due to short-channel effects includes providing a starting semiconductor structure, the structure including a semiconductor substrate having a n-type device region and a p-type device region, the p-type device region including an upper layer of p-type semiconductor material, a hard mask layer over both regions, and a mask over the structure for patterning at least one fin in each region. The method further includes creating partial fin(s) in each region from the starting semiconductor structure, creating a conformal liner over the structure, creating a punch-through-stop (PTS) in each region, causing each PTS to diffuse across a top portion of the substrate, and creating full fin(s) in each region from the partial fin(s).
US09543213B2	Asymmetric high-k dielectric for reducing gate induced drain leakage An asymmetric high-k dielectric for reduced gate induced drain leakage in high-k MOSFETs and methods of manufacture are disclosed. The method includes performing an implant process on a high-k dielectric sidewall of a gate structure. The method further includes performing an oxygen annealing process to grow an oxide region on a drain side of the gate structure, while inhibiting oxide growth on a source side of the gate structure adjacent to a source region.
US09543210B2	Forming crown active regions for FinFETs A method includes forming a first mask over a substrate through a double patterning process, wherein the first mask comprises a horizontal portion and a plurality of vertical portions protruding over the horizontal portion, and wherein the vertical portions are spaced apart from each other, applying a first etching process to the first mask until a top surface of a portion of the substrate is exposed, applying a second etching process to the substrate to form intra-device openings and inter-device openings, wherein the inter-device openings are formed at the exposed portion of the substrate, filling the inter-device openings and the intra-device openings to form inter-device insulation regions and intra-device insulation regions and etching back the inter-device insulation regions and the intra-device insulation regions to form a plurality of fins protruding over top surfaces of the inter-device insulation regions and the intra-device insulation regions.
US09543208B2	Method of singulating semiconductor devices using isolation trenches In accordance with an embodiment of the present invention, a method for forming a semiconductor device includes forming a device region in a substrate. The device region extends continuously from one sidewall of the substrate to an opposite sidewall of the substrate. The method further includes forming trenches in the substrate. The trenches divide the device region into active regions. The method also includes singulating the substrate by separating the substrate along the trenches.
US09543205B2	Method of fabricating semiconductor device The method includes disposing semiconductor chips on a package substrate having sawing lines, forming an encapsulant to cover the semiconductor chips on the package substrate, forming a package assembly by a first curing of the encapsulant, forming first grooves by cutting the encapsulant along the sawing lines, performing a second curing of the encapsulant, and dividing the package assembly into unit semiconductor packages by cutting the package substrate along the sawing lines and forming second grooves to overlap the first grooves.
US09543202B2	Method of fabricating semiconductor device having contact structures Provided is a method of fabricating a semiconductor device, the method including forming interconnection structures extending parallel to each other on a substrate; performing a coating process and forming a liquid state silicon source material layer filling an area between the interconnection structures; performing a first annealing process, curing the liquid state silicon source material layer, and forming an amorphous silicon layer; and crystallizing the amorphous silicon layer and forming contact plugs.
US09543199B2	Long-term heat treated integrated circuit arrangements and methods for producing the same An explanation is given of, inter alia, methods in which the barrier material is removed at a via bottom or at a via top area by long-term heat treatment. Concurrently or alternatively, interconnects are coated with barrier material in a simple and uncomplicated manner by means of the long-term heat treatment.
US09543195B1	Semiconductor process A semiconductor process includes the following steps. Metal patterns are formed on a first dielectric layer. A modifiable layer is formed to cover the metal patterns and the first dielectric layer. A modification process is performed to modify a part of the modifiable layer on top sides of the metal patterns, thereby top masks being formed. A removing process is performed to remove a part of the modifiable layer on sidewalls of the metal patterns but preserve the top masks. A dielectric layer having voids under the top masks and between the metal patterns is formed. Moreover, the present invention also provides a semiconductor structure formed by said semiconductor process.
US09543191B2	Wiring structure having interlayer insulating film and wiring line without a barrier layer between Provided are a semiconductor device and semiconductor-device manufacturing method that make it possible to improve the contact between an insulating film and a wiring member and the reliability thereof. This method for manufacturing a semiconductor device (100) includes a step in which a CF film (106) is formed on top of a semiconductor substrate (102), a step in which grooves (C) corresponding to a wiring pattern (P) are formed in the CF film (106), and a step in which a copper wiring member (114) is embedded in the grooves (C).
US09543189B2	Laminated wafer processing method A method of processing a laminated wafer in which a first wafer is laminated on a second wafer, the method including: a laminated wafer forming step of forming the laminated wafer by laminating the first wafer on the second wafer; a modified layer forming step of forming a modified layer within the first wafer by positioning a focusing point of a laser beam within the first wafer and moving the first wafer in a horizontal direction relative to the focusing point while applying the laser beam, the modified layer forming step being performed before or after the laminated wafer forming step is performed; and a separating step of separating part of the first wafer from the laminated wafer with the modified layer as a boundary, the separating step being performed after the laminated wafer forming step and the modified layer forming step are performed.
US09543188B2	Isolation structure, method for manufacturing the same, and semiconductor device having the structure The present invention provides an isolation structure for a semiconductor substrate and a method for manufacturing the same, as well as a semiconductor device having the structure. The present invention relates to the field of semiconductor manufacture. The isolation structure comprises: a trench embedded in a semiconductor substrate; an oxide layer covering the bottom and sidewalls of the trench, and isolation material in the trench and on the oxide layer, wherein a portion of the oxide layer on an upper portion of the sidewalls of the trench comprises lanthanum-rich oxide. By the trench isolation structure according to the present invention, metal lanthanum in the lanthanum-rich oxide can diffuse into corners of the oxide layer of the gate stack, thus alleviating the impact of the narrow channel effect and making the threshold voltage adjustable.
US09543187B2	Electrostatic chuck In accordance with an embodiment of the invention, there is provided an electrostatic chuck comprising an electrode, and a surface layer activated by a voltage in the electrode to form an electric charge to electrostatically clamp a substrate to the electrostatic chuck. The surface layer includes a plurality of protrusions extending to a height above portions of the surface layer surrounding the protrusions to support the substrate upon the protrusions during electrostatic clamping of the substrate. The protrusions are substantially equally spaced across the surface layer as measured by a center to center distance between pairs of neighboring protrusions.
US09543183B2	Heated electrostatic chuck and semiconductor wafer heater and methods for manufacturing same A heated electrostatic chuck is provided, including a base having an upper surface and peripheral side surfaces, a thermal barrier coating formed by plasma deposition directly on at least the upper surface of the base, at least one heating element formed on portions of the thermal barrier coating, an electrically insulating layer formed on the heating element and exposed portions of the thermal barrier coating, at least one chucking electrode formed on at least a portion of the electrically insulating layer, and a protective layer formed on the chucking electrode.
US09543182B2	Electrostatic chuck and method of manufacturing semiconductor device An electrostatic chuck device including: a plurality of adsorption areas having an electrode generating electrostatic attractive force; and a control portion controlling the electrostatic attractive force against each of the plurality of the adsorption areas independently of other adsorption areas.
US09543172B2	Apparatus for providing and directing heat energy in a process chamber Apparatus for providing heat energy to a process chamber are provided herein. The apparatus may include a process chamber body of the process chamber, a solid state source array having a plurality of solid state sources, disposed on a first substrate, to provide heat energy to the process chamber to heat a target component disposed in the process chamber body, and at least one reflector disposed on the first substrate proximate to one or more of the plurality of solid state sources to direct heat energy provided by the one or more of the plurality of solid state sources towards the target component.
US09543171B2	Auto-correction of malfunctioning thermal control element in a temperature control plate of a semiconductor substrate support assembly that includes deactivating the malfunctioning thermal control element and modifying a power level of at least one functioning thermal control element A method for auto-correction of at least one malfunctioning thermal control element among an array of thermal control elements that are independently controllable and located in a temperature control plate of a substrate support assembly which supports a semiconductor substrate during processing thereof, the method including: detecting, by a control unit including a processor, that at least one thermal control element of the array of thermal control elements is malfunctioning; deactivating, by the control unit, the at least one malfunctioning thermal control element; and modifying, by the control unit, a power level of at least one functioning thermal control element in the temperature control plate to minimize impact of the malfunctioning thermal control element on the desired temperature output at the location of the at least one malfunctioning thermal control element.
US09543167B2	FinFET source-drain merged by silicide-based material A method includes conducting a laser-based anneal treatment on a metal layer positioned above and in direct contact with a first diamond shaped epitaxial layer surrounding a first fin and a second diamond shaped epitaxial layer surrounding a second fin, the metal layer extends from the first diamond shaped epitaxial layer to the second diamond shaped epitaxial layer, the laser-based anneal treatment forms a silicide layer, a portion of the silicide layer between the first and the second diamond shaped epitaxial layers is substantially thicker than a portion of the silicide layer in contact with the first and the second diamond shaped epitaxial layers, and the silicide layer takes on a crystal orientation of the first and the second epitaxial layers.
US09543164B2	Etching method An etching method is provided for performing an etching process on an etching target film arranged on a substrate. The etching method includes the steps of supplying a treatment gas including a halogen-containing gas, hydrogen gas, an inert gas, and oxygen gas; performing a treatment on a patterned mask arranged on the etching target film using a plasma generated from the treatment gas; and etching the etching target film that has undergone the treatment using a plasma generated from an etching gas.
US09543162B2	Substrate processing method A substrate processing method includes a phosphoric acid processing step of supplying a phosphoric acid aqueous solution, which contains silicon and has a silicon concentration lower than a saturation concentration, to a front surface of a substrate, a liquid volume reducing step of reducing a volume of the phosphoric acid aqueous solution on the substrate, after the phosphoric acid processing step, and a rinse replacing step of supplying a rinse liquid having a temperature lower than that of the phosphoric acid aqueous solution supplied to the front surface of the substrate in the phosphoric acid processing step to the front surface of the substrate covered with the phosphoric acid aqueous solution at least partially, after the liquid volume reducing step.
US09543161B1	Method of planarizating film A method of fabricating a semiconductor device is disclosed. The method includes forming a flowable-material (FM) layer over a substrate. The substrate has a first region and a second region. A top surface of the FM layer in the first region is higher than a top surface of the FM layer in the second region. The method also includes forming a plurality of trenches in the FM layer in the first region and performing annealing process to reflow the FM layer, wherein the plurality of trenches are filled with the FM layer.
US09543160B2	Reducing defects in patterning processes A method includes forming a mask layer forming a first photo resist over the mask layer, performing a first patterning step on the first photo resist, and performing a first etching step on the mask layer using the first photo resist as an etching mask. The first photo resist is then removed. The method further includes forming a particle-fixing layer on a top surface and sidewalls of the mask layer, forming a second photo resist over the particle-fixing layer and the mask layer, performing a second patterning step on the second photo resist, and performing a second etching step on the particle-fixing layer and the mask layer using the second photo resist as an etching mask. The particle-fixing layer is etched through. A target layer underlying the mask layer is etched using the mask layer as an etching mask.
US09543159B2	Patterning process of a semiconductor structure with a wet strippable middle layer A lithography method is provided in accordance with some embodiments. The lithography method includes forming an under layer of a polymeric material on a substrate; forming a silicon-containing middle layer on the under layer, wherein the silicon-containing middle layer has a silicon concentration in weight percentage less than 20% and is wet strippable; forming a patterned photosensitive layer on the silicon-containing middle layer; performing a first etching process to transfer a pattern of the patterned photosensitive layer to the silicon-containing middle layer; performing a second etching process to transfer the pattern to the under layer; and performing a wet stripping process to the silicon-containing middle layer and the under layer.
US09543154B2	Method for manufacturing semiconductor device A method for manufacturing a semiconductor device includes the following steps. A semiconductor substrate is prepared which has a first main surface and a second main surface opposite to each other. The semiconductor substrate is fixed on an adhesive tape at the first main surface. The semiconductor substrate fixed on the adhesive tape is placed in an accommodating chamber. While maintaining a temperature of the adhesive tape at 100° C. or more, a gas is exhausted from the accommodating chamber. After the step of exhausting the gas from the accommodating chamber, a temperature of the semiconductor substrate is reduced. After the step of reducing the temperature of the semiconductor substrate, an electrode is formed on a second main surface of the semiconductor substrate. In this way, there can be provided a method for manufacturing a semiconductor device so as to achieve reduced contact resistance between a semiconductor substrate and an electrode.
US09543150B2	Systems and methods for forming ultra-shallow junctions A method for forming a junction on a substrate includes removing a native oxide layer of a bulk material; doping an outer layer of the bulk material with molecular hydrogen to create a hydrogen-doped outer layer; and nano-doping the hydrogen-doped outer layer using one of boron or phosphorous to a target junction depth to create a nano-doped layer.
US09543149B2	High voltage lateral extended drain MOS transistor with improved drift layer contact An integrated circuit and method having an extended drain MOS transistor with a buried drift region, a drain end diffused link between the buried drift region and the drain contact, and a concurrently formed channel end diffused link between the buried drift region and the channel, where the channel end diffused link is formed by implanting through segmented areas to dilute the doping to less than two-thirds the doping in the drain end diffused link.
US09543145B2	Manufacturing method of semiconductor device A semiconductor device using an oxide semiconductor is provided with stable electric characteristics to improve the reliability. In a manufacturing process of a transistor including an oxide semiconductor film, an oxide semiconductor film containing a crystal having a c-axis which is substantially perpendicular to a top surface thereof (also called a first crystalline oxide semiconductor film) is formed; oxygen is added to the oxide semiconductor film to amorphize at least part of the oxide semiconductor film, so that an amorphous oxide semiconductor film containing an excess of oxygen is formed; an aluminum oxide film is formed over the amorphous oxide semiconductor film; and heat treatment is performed thereon to crystallize at least part of the amorphous oxide semiconductor film, so that an oxide semiconductor film containing a crystal having a c-axis which is substantially perpendicular to a top surface thereof (also called a second crystalline oxide semiconductor film) is formed.
US09543137B2	Sample droplet generation from segmented fluid flow and related devices and methods A sample droplet generator transforms a segmented array of sample material into a continuous stream of droplets containing analytes. The droplets may serve as a sample source for a wide range of detectors and analytical instruments. As one example, the droplets may be introduced into an ion source of a spectrometer that measures ions produced from the droplets or photons emitted from the droplets.
US09543134B2	Systems and methods for rapidly screening samples by mass spectrometry Systems and methods are used to rapidly screening samples. A fast sample introduction device that is non-chromatographic is instructed to supply each sample of a plurality samples to a tandem mass spectrometer using a processor. The fast sample introduction device can include a flow injection analysis device, an ion mobility analysis device, or a rapid sample cleanup device. The tandem mass spectrometer is instructed to perform fragmentation scans at two or more mass selection windows across a mass range of each sample of the plurality of samples using the processor. The two or more mass selection windows across the mass range can have fixed or variable window widths. The tandem mass spectrometer can be instructed to obtain a mass spectrum of the mass range before instructing the tandem mass spectrometer to perform the fragmentation scans.
US09543131B2	Method of operating a mass filter in mass spectrometry Disclosed herein is a mass spectrometry method having steps of: transmitting ions from an ion source through a mass filter; processing ions received from the mass filter in a discontinuous ion optical device downstream of the mass filter; operating the mass filter for a plurality of periods in a mass/charge ratio (m/z) filtering mode to transmit ions in one or more selected ranges of m/z to the discontinuous ion optical device; and operating the mass filter in a broad mass range mode transmitting ions of a mass range substantially wider than any mass range transmitted in the m/z filtering mode during one or more periods in which the discontinuous ion optical device is not processing ions from the mass filter. Utilization of this method assists to reduce contamination in the mass filter.
US09543130B2	Photomultiplier tube (PMT) having a reflective photocathode array An internal portion of a photomultiplier tube (PMT) having a reflective photocathode array, and a method for manufacturing the same, are provided. The internal portion of the PMT comprises the reflective photocathode array and at least one dynode structure corresponding to the array of reflective photocathodes. Each reflective photocathode receives light and from the light, generates photoelectrons which then travel towards the at least one dynode structure. Upon the photoelectrons making contact with the at least one dynode structure, the photoelectrons are multiplied.
US09543129B2	Electron multiplier An electron multiplier includes an insulating substrate which includes an electrical wiring pattern and in which a through-hole is formed, an MCP arranged on one side of the through-hole of the insulating substrate and electrically connected to the electrical wiring pattern, a shield plate arranged in one side of the MCP and electrically connected to the MCP, an anode arranged on the other side of the through-hole and electrically connected to the electrical wiring pattern, and a signal readout terminal fixed to the insulating substrate for reading a signal from the anode. The shield plate is formed to include the MCP when viewed in a thickness direction. A through-hole exposing at least a portion of the MCP is formed in the shield plate. The insulating substrate, the MCP, the shield plate and the anode are fixed to each other to be integral.
US09543126B2	Collimator for use in substrate processing chambers Embodiments of collimators for use in substrate processing chambers are provided herein. In some embodiments, a collimator includes: a body having a central region, a peripheral region, and a transitional region disposed between the central and peripheral regions; a first plurality of apertures in the central region having a first aspect ratio; a second plurality of apertures in the peripheral region having a second aspect ratio less than the first aspect ratio; and a third plurality of apertures in the transitional region, wherein the third plurality of apertures are cut so the transitional region forms a conical shape surrounding the central region.
US09543124B2	Capacitively coupled plasma source for abating compounds produced in semiconductor processes Embodiments disclosed herein include a plasma source for abating compounds produced in semiconductor processes. The plasma source has a first plate and a second plate parallel to the first plate. An electrode is disposed between the first and second plates and an outer wall is disposed between the first and second plates surrounding the cylindrical electrode. The plasma source has a first plurality of magnets disposed on the first plate and a second plurality of magnets disposed on the second plate. The magnetic field created by the first and second plurality of magnets is substantially perpendicular to the electric field created between the electrode and the outer wall. In this configuration, a dense plasma is created.
US09543115B2	Electron microscope An electron microscope includes an electron beam source, a first electromagnet, a second electromagnet and a detector. The field generated by the first electromagnet has an effect of three lenses subsequently arranged along the beam path. A first lens of these lenses is arranged upstream of the object plane and focuses the beam at the object plane. The second lens of these three lenses is arranged downstream of the object plane. The third lens of these three lenses generates an image of a diffraction plane of the second lens at the detector. The magnetic field generated by the second electromagnet has an effect of a fourth lens and can be changed in order to change a size of the image of the diffraction plane of the second lens on the detector.
US09543114B2	Implant masking and alignment system with rollers System and method to align a substrate under a shadow mask. A substrate holder has alignment mechanism, such as rollers, that is made to abut against an alignment straight edge. The substrate is then aligned with respect to the straight edge and is chucked to the substrate holder. The substrate holder is then transported into a vacuum processing chamber, wherein it is made to abut against a mask straight edge to which the shadow mask is attached and aligned to. Since the substrate was aligned to an alignment straight edge, and since the mask is aligned to the mask straight edge that is precisely aligned to the alignment straight edge, the substrate is perfectly aligned to the mask.
US09543112B2	Specimen cryo holder and dewar In an existing specimen cryo holder, a change in the orientation of a specimen would lead to tilting of a dewar together with the specimen and hence to bubbling of a cooling source contained in the dewar. In view of this, a specimen cryo holder, including a mechanism capable of cooling a specimen while keeping the posture of a dewar in a fixed direction even when the specimen is tilted into a direction suitable for processing or observation thereof, is provided. Also provided is a dewar in which a vacuum maintenance mechanism is mounted to an outer vessel so that an inner vessel holding a cooling source therein is vacuum-insulated from the outside air.
US09543111B2	Charged particle beam device Provided is a charged particle beam device or charged particle microscope permitting observation of even a large-sized specimen in the air atmosphere or a gaseous atmosphere.A charged particle beam device that adopts a thin film which partitions a vacuum atmosphere and the air atmosphere (or gaseous atmosphere) includes a charged particle optical lens barrel in which a charged particle optical system is stored, a housing in which a route along which a primary charged particle beam emitted from the charged particle optical lens barrel reaches the thin film is sustained in the vacuum atmosphere, and a mechanism that bears the charged particle optical lens barrel and first housing against a device installation surface. As the bearing mechanism, a housing having an opening through which a large-sized specimen is carried in or a mechanism having a shape other than the shape of the housing, such as, a post is adopted.
US09543109B2	X-ray sources using linear accumulation A compact source for high brightness x-ray generation is disclosed. The higher brightness is achieved through electron beam bombardment of multiple regions aligned with each other to achieve a linear accumulation of x-rays. This may be achieved by aligning discrete x-ray sub-sources, or through the use of x-ray targets that comprise microstructures of x-ray generating materials fabricated in close thermal contact with a substrate with high thermal conductivity. This allows heat to be more efficiently drawn out of the x-ray generating material, and in turn allows bombardment of the x-ray generating material with higher electron density and/or higher energy electrons, leading to greater x-ray brightness. The orientation of the microstructures allows the use of an on-axis collection angle, allowing the accumulation of x-rays from several microstructures to be aligned to appear to have a single origin, also known as “zero-angle” x-ray radiation.
US09543106B2	Tandem charged particle accelerator including carbon ion beam injector and carbon stripping foil A charged particle cancer therapy system is used to accelerate an anion, such a C−, and to convert the anion to a cation, such as C6+, through use of one or more electron extraction subsystems. A first example of an electron extraction subsystem is a hydrogen gas electron stripping system. A second example of an electron extraction subsystem is a carbon foil electron stripping system. The resultant cation is accelerated in a synchrotron, transported along a beam-line, and targeted to a tumor resulting in ablation of the tumor.
US09543102B2	Electromagnetic switch and contact position regulating method thereof An electromagnetic switch includes a main contact housing portion housing a main contact mechanism having a pair of fixed contacts fixedly disposed maintaining a predetermined interval and a movable contact disposed to connect with and separate from the pair of fixed contacts in a contact housing case; an auxiliary contact housing portion housing at least two auxiliary contact mechanisms having fixed contacts and movable contacts disposed connecting to and separating from the fixed contacts; and an electromagnet unit having a movable plunger individually coupled to move the movable contact of the main contact mechanism and the movable contacts of the auxiliary contact mechanisms. The main contact housing portion, the auxiliary contact housing portion, and the electromagnet unit are disposed in series.
US09543101B2	Electromagnetic contactor An electromagnetic contactor includes: a lower frame having an accommodation space therein; a bobbin having a fixed core, and accommodated in the lower frame; a movable core inserted into the bobbin so as to be moveable up and down; a spring installed between the bobbin and the movable core, and configured to provide an upward restoration force to the movable core; and a ‘b’ contact switch installed at one side of the bobbin, wherein a button for operating a switch lever of the ‘b’ contact switch is provided at a movable core plate positioned above the movable core.
US09543096B2	On-load tap changer The invention relates to an on-load tap changer for switching among different winding taps of a step transformer without interruption according to the preamble of the first patent claim. The general inventive concept lies in actuating both the selector contact unit and the switching means for uninterrupted load switching by means of a common motor drive without an energy store being connected therebetween.
US09543094B2	Extension member for rotary switch actuation The disclosure describes a switch extension device and method of installing such a device on a unit of electrical equipment with a closable housing containing a switch and electrically charged components, such as a transformer with a rotary oil safety switch inside the transformer terminal cabinet. The device includes a switch coupling member for mechanically manipulating a switch between at least a first switch position and a second switch position. The switch is disposed inside the closed housing containing components that are electrically charged when the switch is in the first position and not electrically charged when the switch is in the second position. The device also has an extension member with an external portion that extends outside of the closed housing for access by the user without opening the closed housing. Physical manipulation of the external portion of the extension member is mechanically translated to the switch coupling member for mechanically manipulating the switch between at least the first switch position and the second switch position.
US09543086B2	Power circuit breaker The invention relates to a power circuit breaker that is suitable for switching electrical voltages. The power circuit breaker according to the invention comprises two main electrodes, to each of which a respective pole of the voltage to be switched can be connected. During the switching process, at least one of said main electrodes follows a switching path. The power circuit breaker is characterized in that secondary electrodes are additionally provided, which protrude into the vicinity of the switching path and are designed and arranged in such a way that arcs can be produced (a) between the main electrodes and the secondary electrodes and (b) between the individual secondary electrodes during the switching process. The power circuit breaker according to the invention can be advantageously used in vehicles and in ultra-high-voltage AC and HVDC (high-voltage direct current) transmission systems and causes arcs to be extinguished as early as possible during the switching process.
US09543083B2	Fusible switching disconnect modules and devices with in-line current detection A fusible switch disconnect device includes a housing adapted to receive at least one fuse therein, and a switchable contact for connecting the fuse to circuitry. A current detecting element, a tripping mechanism, and control circuitry are provided to move the switchable contact to an open position in response to predetermined electrical current conditions in the device.
US09543076B2	Electronic component and method of manufacturing the same Disclosed herein are an electronic component and a method of manufacturing the same. In an electronic component having a conductor formed in an insulator and providing an external electrode electrically connected to the conductor on an outer surface of the insulator, a curvature of the external electrode in a via machining region is decreased at a predetermined level or less, thereby making it possible to decrease defect generation due to a glare-reflection of a laser.
US09543073B2	Transformer, method for manufacturing transformer and chip A transformer, a method for manufacturing the transformer and a chip are provided. The method includes: a first primary tuning capacitor and/or a first secondary tuning capacitor are/is arranged in an area enclosed by a primary coil and a secondary coil, wherein the first primary tuning capacitor includes more than one second primary tuning capacitor, and the first secondary tuning capacitor includes more than one second secondary tuning capacitor; the more than one second primary tuning capacitor are connected in parallel, and the more than one second secondary tuning capacitor are connected in parallel; and the more than one second primary tuning capacitor and the at least one wire between the more than one second primary tuning capacitor, and/or the more than one second secondary tuning capacitor and the at least one wire between the more than one second secondary tuning capacitor form a partially-shielded network or part of the partially-shielded network.
US09543071B2	Coil component and terminal component used therein Disclosed herein is a coil component that includes a base, a metal wire that is wound around the base and contains copper, and a terminal electrode that is provided on the base and contains nickel and tin. The terminal electrode includes a wire connection area to which an end portion of the metal wire is connected and which contains a CuNi alloy or a CuNiSn alloy, and a mounting area which is different from the wire connection area. The wire connection area includes a portion that contains a small amount of tin than the mounting area.
US09543069B2	Temperature regulation of an inductor assembly A vehicle is provided with a transmission having an inductor assembly. The inductor assembly is mounted within the transmission such that it is directly cooled by transmission fluid through at least one of spraying, splashing and immersion. The transmission includes at least one gear that is configured to, when rotating, transmit torque between an input and output of the transmission and splash fluid onto the inductor assembly to cool the inductor assembly.
US09543065B2	Noncontact electric power transmission equipment Disclosed is a noncontact power transmission system including a power transmission device for transmitting power to a power receiving device in a noncontact manner. The power transmission device includes a cover covering a portion of an outline of the power transmission device where the power transmission device faces the power receiving device, a base covering another portion of the outline of the power transmission device where the power transmission device does not face the power receiving device, a magnetic body arranged in a space enclosed with the cover and the base, a coil bobbin covering the magnetic body partially or entirely, and a coil wire which is wound around the coil bobbin and which generates a magnetic flux upon receiving an alternating current. The coil bobbin includes a load support.
US09543061B2	Cable assembly, connector apparatus and method A connector apparatus for connecting to a cable assembly that comprises coaxial cable and at least one wire and/or fluid conduit and/or further layer, wherein the connector apparatus comprises a housing that houses a connector and at least one further connector, wherein the connector is configured to electrically connect to the coaxial cable when the connector apparatus and the cable assembly are in an engaged state, the at least one further connector is configured to connect to the at least one wire and/or fluid conduit and/or further layer when the connector apparatus and the cable assembly are in the engaged state, the connector is configured to allow free rotation relative to the connector of the coaxial cable around an axis when the coaxial cable is electrically connected to the connector in the engaged state.
US09543059B2	Subsea umbilical An umbilical for use in the offshore production of hydrocarbons, the umbilical comprising a plurality of functional elements contained within an outer sheath, at least one of said functional elements comprising a multicore electric cable, said multicore electric cable comprising a plurality of insulated electric conductors electrically insulated from each other and assembled together in a helical or S/Z manner, said multicore electric cable further comprising a protective polymer sheath surrounding said plurality of insulated electric conductors, said multicore electric cable further comprising a tubular metallic layer located inside said protective polymer sheath and surrounding said plurality of insulated electric conductors.
US09543056B2	Semiconductive polyolefin composition comprising conductive filler The present invention relates to a semiconductive polyolefin composition comprising graphene nanoplatelets. It also relates to a semiconductive polyolefin composition comprising the combination of graphene nanoplatelets and carbon black. Moreover, the present invention is related to a process for producing the semiconductive polyolefin composition as well to the use of the semiconductive polyolefin composition in a power cable. Further, the invention is also related to an article, preferably a power cable comprising at least one semiconductive layer comprising said polyolefin composition.
US09543054B2	Method of fabricating electrodes including high-capacity, binder-free anodes for lithium-ion batteries An electrode (110) is provided that may be used in an electrochemical device (100) such as an energy storage/discharge device, e.g., a lithium-ion battery, or an electrochromic device, e.g., a smart window. Hydrothermal techniques and vacuum filtration methods were applied to fabricate the electrode (110). The electrode (110) includes an active portion (140) that is made up of electrochemically active nanoparticles, with one embodiment utilizing 3d-transition metal oxides to provide the electrochemical capacity of the electrode (110). The active material (140) may include other electrochemical materials, such as silicon, tin, lithium manganese oxide, and lithium iron phosphate. The electrode (110) also includes a matrix or net (170) of electrically conductive nanomaterial that acts to connect and/or bind the active nanoparticles (140) such that no binder material is required in the electrode (110), which allows more active materials (140) to be included to improve energy density and other desirable characteristics of the electrode. The matrix material (170) may take the form of carbon nanotubes, such as single-wall, double-wall, and/or multi-wall nanotubes, and be provided as about 2 to 30 percent weight of the electrode (110) with the rest being the active material (140).
US09543051B2	System and method to control migration of contaminates within a water table System and Method is described that controls the release of contaminated water by rapidly freezing the ground water, including salt water, which permeates the area underneath the a contamination source, so that the resulting ice lens mitigates the extent to which radioactive water is released into the environment. An aperture in the containment area allows the dispersal and dilution of the contaminates by allowing in ground water from outside, and/or removing water from the containment area. The variable aperture may be a physical valve or preferably an opening in the ice shield which size may be controlled by freezing or thawing portions of the ice shield.
US09543050B2	Imaging apparatus and method for monitoring radiation within a closed structure An observation instrument for use in a cavity in a hot cell includes a radiation sensor located between a dome and a shield and a travel mechanism for moving the sensor between a retracted position away from the dome and an observation position in which the sensor extends inside the dome and a method of maintaining the cell including extracting the shield, sensor, and travel mechanism from the cavity; where appropriate, replacing the sensor; inserting a replacement dome into the cavity and sliding it into the proximity of the dome that has remained in position in the cavity; inserting the shield, sensor and travel mechanism into the cavity and sliding them into contact with the replacement dome; and moving the dome that has remained in position until it is expelled into the cell, by pressing the replacement dome against it.
US09543046B2	Detecting pin diversion from pressurized water reactors spent fuel assemblies Detecting diversion of spent fuel from Pressurized Water Reactors (PWR) by determining possible diversion including the steps of providing a detector cluster containing gamma ray and neutron detectors, inserting the detector cluster containing the gamma ray and neutron detectors into the spent fuel assembly through the guide tube holes in the spent fuel assembly, measuring gamma ray and neutron radiation responses of the gamma ray and neutron detectors in the guide tube holes, processing the gamma ray and neutron radiation responses at the guide tube locations by normalizing them to the maximum value among each set of responses and taking the ratio of the gamma ray and neutron responses at the guide tube locations and normalizing the ratios to the maximum value among them and producing three signatures, gamma, neutron, and gamma-neutron ratio, based on these normalized values, and producing an output that consists of these signatures that can indicate possible diversion of the pins from the spent fuel assembly.
US09543041B2	Configuration and testing for magnetoresistive memory to ensure long term continuous operation Techniques and circuits for testing and configuring magnetic memory devices are presented. Registers and nonvolatile storage is included on the memory devices for storing values used to control testing of the memory devices as well as for configuring parameters related to both testing and normal operation. Examples include adjustment of bias voltages, sense amplifier offset values, and timing parameters to improve the efficiency of testing operations as well as improve reliability and speed of normal operation.
US09543037B2	Semiconductor device having electrical fuse and control method thereof To provide an electrical fuse that is connected to a detection node via a selective transistor, a precharge transistor that precharges the detection node in a state where the selective transistor is off; a bias transistor that passes a bias current to the detection node in a state where the selective transistor is on and the precharge transistor is off, and a detection circuit that detects a potential of the detection node in a state where the bias current is flowing into the detection node, wherein the bias transistor reduces an amount of the bias current in a stepwise manner or a continuous manner.
US09543036B2	System and method of programming a memory cell A method includes applying a programming voltage to a drain of an access transistor, where a source of the access transistor is coupled to a drain region of a one-time programmable (OTP) device. The method also includes applying a first voltage to a gate of the OTP device and a second voltage to a terminal of the OTP device to bias a channel region of the OTP device, where the first voltage and the second voltage are substantially equal.
US09543032B2	Nonvolatile memory device, memory system including the same, and method of operating nonvolatile memory device A non-volatile memory device includes a non-volatile memory cell array including a plurality of word lines, a voltage generator configured to generate a first high-voltage using a supply voltage and a second high-voltage using an external voltage which is higher than the supply voltage, and a word line selection circuit configured. The word line selection circuit is configured apply, during a program operation of the memory cell array, the first high-voltage to a selected word line among the plurality of word lines, and the second high-voltage to unselected word lines among the plurality of word lines.
US09543024B2	Nonvolatile memory erasure techniques Embodiments of the present disclosure describe methods, apparatus, and system configurations for conditional pre-programming of nonvolatile memory before erasure. In one instance, the method includes receiving a request to erase information in a portion of the nonvolatile memory device, in which the portion includes a plurality of storage units, determining whether one or more storage units of the plurality of storage units included in the portion of the non-volatile memory device are programmed, pre-programming the portion of the non-volatile memory device if the one or more storage units are determined to be programmed, and erasing the pre-programmed portion of the non-volatile memory device. A number of determined programmed storage units may not exceed a predetermined value. Other embodiments may be described and/or claimed.
US09543023B2	Partial block erase for block programming in non-volatile memory A non-volatile memory system utilizes partial block erasing during program operations to mitigate the effects of programming pass voltage disturbances. A programming request is received that is associated with a group of word lines from a block, such as all or a portion of the word lines. The system erases and soft programs the block prior to beginning programming. The system programs a subset of the word lines of the block for the programming request. After programming the subset of word lines, the system pauses the programming operation and performs an erase operation for the unprogrammed word lines of the block. The already programmed word lines and one or more optional buffer word lines may be inhibited from erasing during the erase operation. After erasing the unprogrammed word lines, the system completes the programming request by programming the remaining user data in the unprogrammed region of the block.
US09543017B2	End-of-life reliability for non-volatile memory cells A memory chip includes a memory array and a two-dimensional sensing system. The array includes a multiplicity of memory cells connected in rows by word lines and in columns by bit lines. The sensing system moves a read point two-dimensionally within a two-dimensional read space as the two-dimensional read space shrinks and shifts over the life of the chip.
US09543016B1	Low power high speed program method for multi-time programmable memory device A programming method for a PMOS multi-time programmable (MTP) flash memory device biases the select gate transistor to a constant drain current level and sweeps the control gate bias voltage from a low voltage level to a high voltage level while maintaining the cell current around a predetermined cell current limit level. In this manner, the PMOS MTP flash memory device can achieve low power and high speed program using hot carrier injection (HCI). The programming method of the present invention enables multi-bit programming of the PMOS MTP flash memory cells, thereby increasing the programming speed while preserving low power consumption.
US09543010B2	Resistive memory and measurement system thereof A measurement system including a testing machine and a resistive memory is provided. The resistive memory includes a first storage cell. The first storage cell includes a transistor and a variable resistor. During a specific period, the testing machine provides a write voltage to change the state of the variable resistor. During a maintaining period, the testing machine maintains the level of the write voltage and measures the current passing through the variable resistor. When the current passing through the variable resistor does not arrive at a pre-determined value, the testing machine increases the level of the write voltage. Furthermore, a resistive memory utilizing the testing machine is also provided.
US09543002B2	Nonvolatile semiconductor memory device The transistor layer is disposed above or below the memory layer and includes a transistor. The wiring line layer connects the memory layer and the transistor layer. The memory cell array comprises a plurality of select gate lines connected to gates of a plurality of the select transistors aligned in a third direction. The wiring line layer comprises: a first connecting wiring line connected to a first select gate line of the plurality of select gate lines and extending in the third direction; and a second connecting wiring line connected to a second select gate line adjacent in a second direction to the first select gate line. This second connecting wiring line at least comprises: a first portion extending in the third direction; and a second portion extending from the first portion to a layer below the first connecting wiring line.
US09543000B2	Determining soft data for combinations of memory cells The present disclosure includes apparatuses and methods for determining soft data for combinations of memory cells. A number of embodiments include an array of memory cells including a first and second memory cell each programmable to one of a number of program states, wherein a combination of the program states of the first and second memory cells corresponds to one of a number of data states, and a buffer and/or a controller coupled to the array and configured to determine soft data associated with the program states of the first and second memory cells and soft data associated with the data state that corresponds to the combination of the program states of the first and second memory cells based, at least in part, on the soft data associated with the program states of the first and second memory cells.
US09542996B2	Device with SRAM memory cells including means for polarizing wells of memory cell transistors A memory device includes a matrix of several columns of SRAM memory cells each including transistors forming a memory point, a read port and a write port, and such that the transistors of the read port and/or the P-type transistors include a second well with a conductivity type opposite that of a first well of the other transistors. The memory device also includes a polarization unit for the second wells, able to select and apply polarization potentials on the second wells, including a memory circuit of the polarization states of the second wells for each column or group of columns and a selection circuit applying a polarization potential on the second wells according to one of the values received as input, as a function of the stored polarization state associated with the column or group of columns.
US09542994B1	Retention control in a memory device A memory device and method of operating the memory device are provided. The memory device has bitcells arranged in a plurality of rows and columns. Row driver circuitry provides access to the array of bitcells by selection of an access row of the plurality of rows. The row driver circuitry comprises a retention control latch to store a retention control value and row power gating circuitry responsive to a retention signal to power gate at least one row when the retention control value has a first value and to leave the at least one row powered when the retention control value has a second value. Row-based retention of the content of the bit cells is thus provided, and the leakage current of the memory device when it is in a retention (e.g. sleep) mode, and only some of its rows contain valid data, can thus be reduced.
US09542991B1	Single-ended signal equalization with a programmable 1-tap decision feedback equalizer An apparatus includes a first circuit and a second circuit. The first circuit may be configured to (i) receive a sequence of input values that have been carried on a single-ended line of a data bus coupled to a memory channel, (ii) slice a previous input value of said sequence of input values to generate a previous output value, (iii) slice a current input value of said sequence of input values to generate a current output value, and (iv) present said current output value on a differential line. The previous input value generally precedes said current input value in said sequence of input values. The second circuit may be configured to decode said previous input value based on a tap coefficient value to generate a plurality of feedback values suitable to reduce an inter-symbol interference in said current input value caused by said previous input value.
US09542990B2	Semiconductor memory device and method for accessing the same A semiconductor memory device and a method for accessing the same are disclosed. The semiconductor memory device includes an oxide heterojunction transistor which includes: an oxide substrate; an oxide film on the oxide substrate, wherein an interfacial layer between the oxide substrate and the oxide film behaves like two-dimensional electron gas; a source electrode and a drain electrode being located on the oxide film and electrically connected with the interfacial layer; a front gate on the oxide film; and a back gate on a lower surface of the oxide substrate, wherein the source electrode and the drain electrode of the oxide heterojunction transistor are respectively connected with a first word line and a first bit line for reading operation, and wherein the front gate and the back gate are respectively connected with a second word line and a second bit line for writing operation.
US09542989B2	Circuit and method for controlling MRAM cell bias voltages A cell bias control circuit maximizes the performance of devices in the read/write path of memory cells (magnetic tunnel junction device+transistor) without exceeding leakage current or reliability limits by automatically adjusting multiple control inputs of the read/write path at the memory array according to predefined profiles over supply voltage, temperature, and process corner variations by applying any specific reference parameter profiles to the memory array.
US09542988B1	Semiconductor memory device According to one embodiment, a semiconductor memory device includes a memory cell, a bit line connected to the memory cell, a sense circuit which senses data of the memory cell based on second current that flows through the memory cell and first current, a first transistor of a first conductivity type, which is connected to the bit line and through which the second current flows, and a second transistor of the first conductivity type, through which the first current flows.
US09542984B2	Semiconductor memory apparatus and operation method using the same A semiconductor memory apparatus includes a command processing block configured to generate a voltage generation start signal, a first write control signal, a second write control signal, a read signal, and an operation signal in response to a first control signal and a second control signal in a write operation, and a memory control block configured to electrically couple a memory block, which stores data, to a sense amplifier or apply a predetermined voltage to the memory block in response to the voltage generation start signal, the first write control signal, the second write control signal, the read signal, and the operation signal.
US09542982B1	Systems and methods for processing data with power ramp control An apparatus for processing data includes a data processing circuit configured to process user data, wherein the data processing circuit comprises a number of sub-circuits, a number of clock gates each configured to control a clock signal to one of the sub-circuits, a gating control circuit configured to control the clock gates to apply the clock signal to each of the sub-circuits in staged fashion during a ramped power up operation, and a dummy data source configured to provide dummy data to the data processing circuit during the ramped power up operation of the data processing circuit.
US09542976B2	Synchronizing videos with frame-based metadata using video content A transformed video and a source video may be synchronized according to implementations disclosed herein to provide tag information to the device receiving the transformed version of the video. A synchronization signal may be computed on the source video and the transformed video using a statistic such as mean pixel intensity. The synchronization signals computed for the transformed video and source video may be compared to determine a transformed video reference point location for the requested tag information. The requested tag information may be provided to the device receiving the transformed version of the video.
US09542971B2	Optical disc library apparatus having magazine-disc association information, optical disc, and optical disc library system The optical disc library apparatus of the present disclosure includes one or more magazines configured to store a plurality of optical discs, a plurality of optical disc drives configured to perform recording or reproducing on or from the optical discs, a changer mechanism configured to perform loading or ejecting any optical disc stored in the magazine to or from any optical disc drive, and a controller configured to control the changer mechanism. The magazine includes magazine-disc association information associating magazine information specifying the magazine with disc information specifying a plurality of optical discs to be stored in the magazine. The controller outputs the magazine-disc association information.
US09542966B1	Data storage devices and methods with frequency-shaped sliding mode control A data storage device includes a disk, a head, a microactuator, a coarse actuator, and a servo controller. The microactuator is configured to position the head relative to the disk. The coarse actuator is configured to position the microactuator relative to the disk. The servo controller is configured to generate an adjusted position error signal based on a position error signal and an estimated microactuator position signal. The servo controller is also configured to filter the adjusted position error signal with a shaping filter to generate a filtered position error signal, and to provide sliding mode control of the coarse actuator based at least partially on the filtered position error signal.
US09542960B2	Thermally-assisted magnetic recording head including a main pole, a plasmon generator and two side shields A thermally-assisted magnetic recording head includes a main pole, a plasmon generator, and first and second side shields. The main pole has a front end face located in the medium facing surface. The plasmon generator has a near-field light generating surface located in the medium facing surface. The front end face of the main pole includes a first end face portion, and a second end face portion greater in width than the first end face portion. The first and second side shields have first and second side shield end faces located on opposite sides of at least part of the near-field light generating surface and at least part of the first end face portion in the track width direction.
US09542958B2	Display device, head-mount type display device, method of controlling display device, and method of controlling head-mount type display device A transmissive display device includes an image display section adapted to generate image light representing an image, allow a user to visually recognize the image light, and transmit an external sight, a sound acquisition section adapted to obtain a sound, a conversion section adapted to convert the sound into a character image expressing the sound as an image using characters, a specific direction setting section adapted to set a specific direction, and a display position setting section adapted to set an image display position, which is a position where character image light representing the character image is made to be visually recognized in a visual field of the user, based on the specific direction.
US09542955B2	High-band signal coding using multiple sub-bands A method includes receiving, at a vocoder, an audio signal sampled at a first sample rate. The method also includes generating, at a low-band encoder of the vocoder, a low-band excitation signal based on a low-band portion of the audio signal. The method further includes generating a first baseband signal at a high-band encoder of the vocoder. Generating the first baseband signal includes performing a spectral flip operation on a nonlinearly transformed version of the low-band excitation signal. The first baseband signal corresponds to a first sub-band of a high-band portion of the audio signal. The method also includes generating a second baseband signal corresponding to a second sub-band of the high-band portion of the audio signal. The first sub-band is distinct from the second sub-band.
US09542954B2	Method and apparatus for watermarking successive sections of an audio signal Audio watermarking is the process of embedding watermark information items into an audio signal in an in-audible manner. In a first embodiment, in case the original audio signal has parts of low signal energy, an alternative signal having a level or strength given by the psycho-acoustic model is combined with the original audio signal. The combined signal is watermarked with watermark data to be embedded. In a second embodiment, in case the original audio signal has parts of low signal energy, an alternative signal having a level or strength given by the psycho-acoustic model is watermarked with watermark data to be embedded, and the audio signal is watermarked with the watermark data to be embedded. The watermarked alternative signal is combined with the watermarked audio signal.
US09542949B2	Satisfying specified intent(s) based on multimodal request(s) Techniques are described herein that are capable of satisfying specified intent(s) based on multimodal request(s). A multimodal request is a request that includes at least one request of a first type and at least one request of a second type that is different from the first type. Example types of request include but are not limited to a speech request, a text command, a tactile command, and a visual command. A determination is made that one or more entities in visual content are selected in accordance with an explicit scoping command from a user. In response, speech understanding functionality is automatically activated, and audio signals are automatically monitored for speech requests from the user to be processed using the speech understanding functionality.
US09542945B2	Adjusting language models based on topics identified using context Methods, systems, and apparatuses, including computer programs encoded on a computer storage medium, for adjusting language models. In one aspect, a method includes accessing audio data. Information that indicates a first context is accessed, the first context being associated with the audio data. At least one term is accessed. Information that indicates a second context is accessed, the second context being associated with the term. A similarity score is determined that indicates a degree of similarity between the second context and the first context. A language model is adjusted based on the accessed term and the determined similarity score to generate an adjusted language model. Speech recognition is performed on the audio data using the adjusted language model to select one or more candidate transcriptions for a portion of the audio data.
US09542943B2	Minutes making assistance device, electronic conference device, electronic conference system, minutes making assistance method, and storage medium storing minutes making assistance program A minutes making assistance device according to the present invention includes: a sound processing unit that performs processing regarding a voice and determines whether or not speaking is started; an operation processing unit that performs processing regarding an operation and determines whether or not the operation is performed; a display processing unit that performs processing regarding a display; and a control unit that stores speaking start time and warning time in a memory when the sound processing unit determines that the speaking is started, performs warning processing when the current time becomes the warning time, and terminates the processing when the operation processing unit determines that the operation is performed before the warning time.
US09542938B2	Scene recognition method, device and mobile terminal based on ambient sound The present document provides a scene recognition method and device based on ambient sound and a mobile terminal. The device includes: a sound collection module, a preprocessing module, a feature extraction module, a scene recognition module and a database. The method includes: collecting a sound signal; processing the sound signal into a frequency domain signal; extracting sound feature information from the frequency domain signal; inputting the sound feature information under a preset model, matching a model output result with weight values of sound sample models of scenes, and determining a scene corresponding to the sound feature information. The present document implements locating based on background sound information as the feature of the scene, so that the mobile terminal quickly and correctly recognizes the current scene under the maintaining low-consumption state.
US09542933B2	Microphone circuit assembly and system with speech recognition A microphone circuit assembly for an external application processor, such as a programmable Digital Signal Processor, may include a microphone preamplifier and analog-to-digital converter to generate microphone signal samples at a first predetermined sample rate. A speech feature extractor is configured for receipt and processing of predetermined blocks of the microphone signal samples to extract speech feature vectors representing speech features of the microphone signal samples. The microphone circuit assembly may include a speech vocabulary comprising a target word or target phrase of human speech encoded as a set of target feature vectors and a decision circuit is configured to compare the speech feature vectors generated by the speech feature extractor with the target feature vectors to detect the target speech word or phrase.
US09542928B2	Generating natural language outputs Methods, computer systems, and computer-storage media are provided for generating natural language outputs. Sets of triples may be used to map voice queries and answers to sentence structures that may be used as an output answer to the voice query. Sentence structures are only appropriate with certain sets of triples. One or more constraints may be associated with the set of triples to make sure sentence structures are only applied in correct situations. In order to be a valid sentence structure, each constraint associated therewith must be satisfied. If each constraint is satisfied, the sentence structure is valid and may be used as the format for an output answer. If each constraint is not satisfied, additional sentence structures associated with the set of triples may be evaluated until a valid sentence structure is identified. If no sentence structure is valid, no output is generated.
US09542927B2	Method and system for building text-to-speech voice from diverse recordings A method and system is disclosed for building a speech database for a text-to-speech (TTS) synthesis system from multiple speakers recorded under diverse conditions. For a plurality of utterances of a reference speaker, a set of reference-speaker vectors may be extracted, and for each of a plurality of utterances of a colloquial speaker, a respective set of colloquial-speaker vectors may be extracted. A matching procedure, carried out under a transform that compensates for speaker differences, may be used to match each colloquial-speaker vector to a reference-speaker vector. The colloquial-speaker vector may be replaced with the matched reference-speaker vector. The matching-and-replacing can be carried out separately for each set of colloquial-speaker vectors. A conditioned set of speaker vectors can then be constructed by aggregating all the replaced speaker vectors. The condition set of speaker vectors can be used to train the TTS system.
US09542924B2	Apparatus, system and method for noise cancellation and communication for incubators and related devices Systems, apparatuses and methods for integrating adaptive noise cancellation (ANC) with communication features in an enclosure, such as an incubator, bed, and the like. Utilizing one or more error and reference microphones, a controller for a noise cancellation portion reduces noise within a quiet area of the enclosure. Voice communications are provided to allow external voice signals to be transmitted to the enclosure with minimized interference with noise processing. Vocal communications from within the enclosure may be processed to determine certain characteristics/features of the vocal communications. Using these characteristics, certain emotive and/or physiological states may be identified.
US09542918B2	System and method for analysis and creation of music A method and system for analyzing patterns in the relationships of notes of an input piece of music. The method comprises generating a set of the most frequently occurring note pitches in ascending pitch order that matches an interval pattern, and detecting out-of-key pitches that lie outside of this interval pattern. One or more potential key sequence bifurcations are identified which represent a list of possible key sequences according to forwards and backwards analysis. By finding patterns of repetition in the chordal sequences that may be generated according to these key sequence bifurcations, a key sequence that allows the most frequently recurring chord sequences may be chosen. Chord sequences may be analyzed by using ghost chords, temporary harmonic structures that are created, updated and finalized over time according to a combination of essential and inessential note fragments. The method further comprises identifying non-harmony pitches according to the analyzed chord sequence.
US09542916B2	Electronic musical instrument and control method therefor A user designates any one of a plurality of types of key ranges via a key range designating switch and designates, for example via a keyboard, a desired key position to be set as a boundary of the designated key range. In response to such user's operations, an actual key range of the designated key range is determined in accordance with the designated boundary key position, and the keyboard is set in a divided usage state, where the keyboard is usable divided in a plurality of key ranges, on the basis of the determined actual key range. For example, once a left (low-pitch-side) key range is designated, the designated boundary key position defines the upper limit of the left key range, while, once a right (high-pitch-side) key range is designated, the designated boundary key position defines the lower limit of the right key range.
US09542911B2	Display apparatus and method for controlling display apparatus A display apparatus includes: a display unit including a modulator that modulates a plurality of color light fluxes and a light source section that includes a plurality of light sources corresponding to at least any of the color light fluxes; a light source driver that supplies the light sources with pulse currents; and a controller that sets the cycle of each of the pulse currents and an ON-period of the pulses in the pulse current in accordance with the luminance of the light source, wherein when the luminance of any of the light sources is so set that the ON-period of the pulse current is shorter than a preset lower limit, the controller sets the length of the ON period of the pulse current to be equal to the lower limit or at a value longer than the lower limit and reduces the current value of the pulse current.
US09542910B2	On demand calibration of imaging displays A self-calibrating imaging display system includes a display comprising a screen and at least one photosensor associated with the screen and generating an output signal correlating to measurements for at least one region of the screen. The system further includes a display adaptor configured for, during a calibration routine, generating a display test pattern in the at least one region of the screen comprising at least one measurement field that comprises a number of pixels less than a total number of pixels of the screen and causing the at least one measurement field to be stepped through a sequence of increasing display driving level values. The system also includes a calibration module configured for, during the calibration routine, receiving the output signal, comparing the output signal to reference data, and generating at least one correction factor based on the comparing.
US09542908B2	Character highlighting control apparatus, display apparatus, highlighting display control method, and computer program The present invention provides a character highlighting control apparatus including a character pixel extractor and a highlighting degree controller. The character pixel extractor is configured to extract a pixel corresponding to a character part from input image data. The highlighting degree controller is configured to carry out control in such a way that a maximum emission luminance of a display device is linked with input image data, to thereby selectively increase an emission luminance of an extracted pixel on a display screen and avoid increase of an emission luminance of a background part on the display screen.
US09542906B2	Shared compositional resources Shared compositional resources are described. In one or more implementations, a global composition system may be configured to perform rendering for a plurality of processes, e.g., applications. For example, the global composition system may be configured to expose one or more application programming interfaces (APIs) that are accessible to the processes. The APIs may then be used to cause a single composition engine to perform the rendering for the plurality of applications. Thus, the single composition engine may be leveraged to support a variety of functionality, such as to manage sharing of compositional resources by a plurality of processes. This sharing may be performed in a variety of ways, which may include use of a writer/reader paradigm.
US09542903B2	Display panel having a pixel unit in which the number of data lines electrically connected to the sub-pixels is less than the number of gate lines electrically connected to the sub-pixels A display device includes a plurality of pixel units. Each of the pixel units at least includes three sub-pixels for displaying different colors. The three sub-pixels are electrically connected to three different gate lines, and at least two of the three sub-pixels are electrically connected to the same data line.
US09542902B2	Display device driver A display device driver that can display images while preventing noise and suppressing display unevenness is provided. When pixel drive voltages corresponding to the luminance levels of respective pixels indicated by a video signal are applied to the data lines of the display device, the pixel drive voltages are applied to data lines that intersect the scanning lines of the display device at positions where the delay time is larger, at timing later than timing of applying the pixel drive voltages to the data lines that intersect the scanning lines at positions where the delay time is smaller, the delay time being a period of time between start of application of the scanning pulse by the scanning driver and actual arrival of the scanning pulse.
US09542901B2	Display device A display device includes a display substrate, on which a display area and a non-display area are defined, a plurality of gate lines arranged in the display area to extend in a first direction, a gate driving unit including a plurality of stages which outputs gate signals to the plurality of gate lines, and a plurality of pixel rows disposed in the display area and connected to the plurality of gate lines, where a driving area and an electrode area are defined in the display area between two adjacent pixel rows in a second direction among the plurality of pixel rows, at least a part of the plurality of stages is disposed in the driving area, and a compensation electrode is disposed in the electrode area.
US09542900B2	Circuit for detecting touch point location on a touch panel, touch panel and display device A circuit for detecting a touch point location on a touch panel, a touch panel and a display device for improving the precision of touch point location on the touch panel are disclosed. The circuit for detecting a touch point location on a touch panel comprises: a sensing sub-circuit, an amplification sub-circuit connected to the sensing sub-circuit, an output sub-circuit connected to the amplification sub-circuit, a detection sub-circuit connected to the output sub-circuit, and a first touch drive electrode line. The sensing sub-circuit comprising a fixed capacitor, a variable capacitor, and a first switch transistor, wherein a gate terminal and a source terminal of the first switch transistor are connected to the first touch drive electrode line, a drain terminal of the first switch transistor is connected to a terminal of the fixed capacitor, a terminal of the variable capacitor is connected to the other terminal of the fixed capacitor, the other terminal of the variable capacitor is connected to a reference voltage, and the amplification sub-circuit is connected to the terminal of the fixed capacitor that is connected to the variable capacitor.
US09542895B2	Electro-optic displays, and methods for driving same An electro-optic display includes an electro-optic medium, a pixel electrode for applying an electric field to the medium and a column electrode associated with the pixel electrode. To reduce power consumption, when it is necessary to change the voltage on the column electrode from a first value to a second value to change the optical state of the electro-optic medium, the column electrode voltage is first changed to a third value intermediate the first and second values to permit charge to flow to or from the column electrode, and thereafter the column electrode voltage is changed from the third voltage to the second voltage.
US09542894B2	Display apparatus and control method thereof A display apparatus includes: a display unit configured to display an image; a light emission unit configured to individually control light emission for each of a plurality of divided regions; an acquisition unit configured to acquire, for each divided region, a characteristic value of the image displayed on each of the divided regions; and a control unit. The control unit controls light emission of the light emission unit such that: in a moving image region, in which only a moving image is displayed, among the plurality of divided regions, light is emitted at a brightness based on a characteristic value of the moving image region; and in a mixed region, in which both of the moving image and a still image are displayed, among the plurality of divided regions, light is emitted at predetermined brightness.
US09542885B2	Pixel unit, display panel, display method and display device Embodiments of the present invention disclose a pixel unit made up of three rhombic sub-pixels spliced with each other, and, every two adjacent rhombic sub-pixels of the three rhombic sub-pixels share one common edge and are symmetrical about the common edge. In accordance to embodiments of the present invention, the rhombic sub-pixels have larger sizes and accordingly can be achieved in the existing production line with adoption of the existing mature production technology. Accordingly, high production yield, small spreading difficulty, and wide application prospect can be achieved for products. Meanwhile, embodiments of the present invention also provide a display panel, a display method and a display device.
US09542884B2	Display panel A display panel includes a display area first and second gate line driving circuits. The display area includes a plurality of pixels is configured to determine how to process a data transmitted on a data line according to first and second control signals transmitted on first and second gate lines respectively and a second control signal transmitted on a second gate line and determine when to emit light according to a light emitting control signal transmitted on a light emitting control line. The first gate line driving circuit is coupled to the first gate line and for providing the first control signal thereto. The second gate line driving circuit is coupled to the second gate line and the light emitting control line and configured to provide the second control signal and the light emitting control signal thereto, respectively.
US09542879B2	Display panel A display panel and a manufacturing method thereof are disclosed herein. The display panel includes a substrate, a peripheral circuit, a plurality of pixel electrodes, a plurality of switches, and an insulating layer. The substrate has a display region and a non-display region. At least a portion of the peripheral circuit is located on the display region of the substrate. The pixel electrodes are located on the display region of the substrate. The switches are respectively and electrically connected to the pixel electrodes, configured to be respectively switched on according to a plurality of scan signals, so as to transmit a plurality of data signals to the pixel electrodes. The insulating layer is located between the peripheral circuit and the pixel electrodes, and is configured to prevent the peripheral circuit from interfering with the pixel electrodes.
US09542877B2	Electroluminescent display and method of driving the same An electroluminescent display and a method of driving the same are disclosed. In one aspect, the display includes a display panel including a plurality of pixels configured to operate based on a first power supply voltage having a negative voltage level. The display panel is configured to generate at least one feedback voltage corresponding to an ohmic drop of the first power supply voltage. An analog-to-digital converter is configured to generate at least one digital feedback signal based on the at least one feedback voltage. An adaptive voltage controller is configured to generate a voltage control signal based on input image data, the at least one digital feedback signal, a distribution of the input image data and the ohmic drop of the first power supply voltage. A voltage converter is configured to generate the first power supply voltage based on an input voltage and the voltage control signal.
US09542861B2	Medical training kits and methods to simulate treatment of uncontrolled hemorrhage Medical training kits and methods include a simulated liquid blood which simulates mammalian whole blood and a simulated hemostatic component. The simulated liquid blood includes a gellable component, and a simulated hemostatic component includes a gelling agent. The gelling agent causes the gellable component in the simulated liquid blood to form a mass of semi-solid or solid material in response the simulated blood being brought into contact therewith to thereby simulate blood clotting. In certain embodiments, the gellable component is chitosan and/or an alginate compound and the gelling agent is at least one compound which causes the gellable component to desolubulize, polymerize, complex, precipitate, cross-link and the like so as to form a semi-solid or solid mass of chitosan in response to physical contact between the simulated blood and the simulated hemostatic agent.
US09542852B2	Mass transit safety notification system and device A system and device that will notify roadway maintenance workers of an approaching mass transit vehicle and, conversely, will notify the operators and administrators of mass transit vehicles of roadway maintenance workers within the vicinity of an approaching section of track.
US09542848B2	Adjustment of vehicle alerts based on response time learning An apparatus and system for alerting a driver within an automotive vehicle is provided. An alerting device is disposed within the vehicle, which is configured to alert a driver. A controller is operable to activate the alerting device to produce an alert. A hazard detecting device is configured to detect a hazard. The controller is configured to activate the alerting device to produce the alert if the hazard detecting device detects a hazard. The alert is produced a predetermined reaction time period before a desired driver response. The controller is configured to determine a driver response time. The driver response time includes the time from the alert to an actual driver response. The controller is configured to alter the predetermined reaction time period based on the driver response time. A method for assisting a driver of a vehicle and a non-transitory machine-readable medium that provides instructions are also provided.
US09542845B1	Method for ascertaining a parking area of a street section A method for ascertaining a parking area of at least one street section includes providing information indicating a usable width of the street section, the usable width representing a drivable width of the street section between spaces for parked vehicles at the two lateral sides of a driving vehicle; the driving vehicle driving the street section and ascertaining lateral distances from objects using an ascertainment device situated in the driving vehicle; comparing the ascertained lateral distances to the usable width; and ascertaining the parking area by way of the comparison.
US09542839B2	Low delay low complexity lossless compression system A method for compressing data is disclosed. The method may include classifying the data from a plurality of data sources into classifications including at least PCM-encoded data and data structure information. The method may also include determining data states associated with the PCM-encoded data and the data structure information. The method may further include compressing the PCM-encoded data and the data structure information into compressed bit-streams based on the determined data states. The method may also include shuffling the compressed bit-streams to introduce randomness.
US09542834B2	Wireless trainable transceiver device with integrated interface and GPS modules A trainable transceiver is provided having an integrated interface connections with various vehicle modules for use with various remote electronic devices and a method of programming and using the same. The wireless trainable transceiver is in a vehicle with an integrated interface allowing connection to a human-to-machine interface and vehicle position determination device, such a navigation system and compass and the wireless trainable transceiver has the ability to change functions associated with preset buttons on the trainable transceiver, depending upon the location of the vehicle.
US09542832B1	eReceptionist and eNeighborhood watch system for crime prevention and/or verification A system comprising an antenna module and a processor sub-module. The antenna module is configured to connect and send data to a network through a wireless connection. The network is configured to (A) connect to web services in a first mode and (B) integrate with user devices in a second mode. The processor sub-module is configured to provide a physical connection to (i) the antenna module, (ii) a plurality of output devices, and (iii) a plurality of sensors. The plurality of output devices are configured to implement a virtual receptionist. The plurality of sensors send data to the network.
US09542831B2	Audible/visible evacuation notification device An output device emits alarm indicating light and sound at predetermined levels when activated. The device enters a test mode in response to received test mode indicating control signals. When the device is in the test mode and a local test initiating control signal is received, audio and/or visual outputs are emitted at a level reduced from the alarm indicating output levels to test those outputs.
US09542830B2	Alert gateway, systems and methods Embodiments of the invention provide systems and methods for distributing urgent public information. Merely by way of example, urgent public information, such as an alert message, may be received by, inter alia, an alert gateway device. The alert message may then be distributed to a subscriber in any of a variety of ways, including by telephone, by data message (e.g., to a computer), by video message (e.g., via a television), by display on an alert notification device. In some embodiments, the alert gateway device may process the alert message and/or may determine how to provide the alert message to the subscriber.
US09542828B1	System, device, and method for measurement of hand hygiene technique A device, system, and method for evaluating compliance with a hand hygiene standard using acceleration measurements of the hand or wrist. The method is based on the scalar quantities vigor and/or rocking angle.
US09542822B2	Method to activate smart phone alarm on attempt to open door or windows An alarm system may be provided and may include a miniature coin size tag attached to doors and windows. The tag has electronic 3 axial accelerometer with wireless notification system to user's smart phone.
US09542821B2	Home security system and vehicle-mounted system used by same A home security system includes an in-home system and a vehicle-mounted system, wherein the in-home system includes an in-home sensor that is mounted in a home and is capable of detect a state of the home, and an in-home communication module that is capable of communicating with the vehicle-mounted system to sense an abnormality from information of the in-home sensor, and wherein the vehicle-mounted system includes a vehicle-mounted device that is mounted on a vehicle that is capable of a vehicle outside output, and a vehicle-mounted communication module that is capable of communicating with the in-home system via the in-home communication module, and when the in-home system senses the abnormality, an instruction is received from the in-home system via the in-home communication module and vehicle-mounted communication module to deal with the abnormality using the vehicle-mounted device according to the instruction.
US09542820B2	Semantic framework for variable haptic output Methods and apparatus organize a plurality of haptic output variations into a cohesive semantic framework that uses various information about the alert condition and trigger, application context, and other conditions to provide a system of haptic outputs that share characteristics between related events. In some embodiments, an event class or application class provides the basis for a corresponding haptic output. In some embodiments, whether an alert-salience setting is on provides the basis for adding an increased salience haptic output to the standard haptic output for the alert. In some embodiments, consistent haptics provide for branding of the associated application class, application, and/or context.
US09542816B1	Wearable alert device having selectable alert volume and method of operating same A wearable alert device includes an audio transducer and driver circuit that allows selection of either a high or low volume setting for driving the transducer. The driver circuit is operable in a single ended mode for low volume and a double ended mode for high volume. The single ended mode holds one terminal of the transducer low while the other is driven in correspondence with a clock signal, while the double ended mode drives one terminal in correspondence with the clock signal and the other terminal is inverted from the clock signal. The transducer is activated in response to an alert event, and can be driven according to a profile or pattern.
US09542815B2	Banking apparatus controlled responsive to data bearing records A banking system is controlled responsive, at least in part, to data read from data bearing records. The banking system includes an automated banking machine. The machine is operable to carry out a financial transaction responsive to a determination that data read from a data bearing record, such as a card that is read by a card reader in the machine, corresponds to stored information for an authorized user or financial account. The machine is operable to receive and dispense documents. The machine includes a check acceptor that is operative to receive checks and a cash dispenser that is operative to dispense cash. Document holding cassettes in the machine include circuitry that is wirelessly powered through inductive coupling. The machine can wirelessly read data from a cassette through use of induction.
US09542813B2	System and method for allowing players to play matching games with card symbols A system for allowing players to play a bingo-type game is described herein. The system includes a system controller that is coupled to a plurality of user computing devices. The system controller is configured to display the bingo-type game including a plurality of symbol positions being displayed in a grid. Each symbol position is associated with a card symbol. The system controller randomly selects a plurality of player symbols, displays the player symbols in the symbol positions, randomly selects a plurality of bingo symbols, determines if each one of the plurality of bingo symbols matches a corresponding one of the plurality of player symbols, identifies each card symbol associated with each matched player symbol, determines a combination formed by each of the identified card symbols, and provides the player an award if the determined combination of card symbols forms a winning combination.
US09542810B2	Gaming machine and methods of providing games to players having dice with expandable images A gaming machine for providing a game to a player is described herein. The gaming machine displays a primary game including a plurality of reels, detects a triggering condition occurring with the primary game and responsively displays a secondary game. The secondary game includes a player character and an enemy character being displayed on an animated game field. The gaming machine displays a plurality of dice on the animated game field including a player die displayed with a player strength value and an enemy die displayed with an enemy strength value. The gaming machine displays an expandable image of the player strength value at a first size and increases the size of the expandable image to a larger second size over a predefined period of time.
US09542809B2	Gaming system and a method of gaming Certain example embodiments relate to a gaming system which includes a symbol selector which is arranged to select a plurality of symbols from an available set of symbols. The set of symbols may include one or more predetermined symbols. The predetermined symbols form a predetermined symbol arrangement, such as a pattern or word. When a predetermined symbol is selected it is placed in a symbol store. When the predetermined symbol arrangement is completed, by selection of all of the predetermined symbols, then a prize may be won.
US09542804B2	Session monitoring on gaming machines A method, gaming machine and gaming system is described that provides for session information monitoring. Session information is formed by monitoring play of a game by a player on a gaming machine. At the option of the player of the gaming machine the session information is either combined with session information from another gaming machine, or is not combined.
US09542802B2	Amusement devices and games involving multiple operators, multiple players, and/or multiple jurisdictions Various methods and apparatus related to gaming are described. Some embodiments relate to a multi-tiered game involving multiple participants. Some embodiments relate to players from a plurality of gaming operators playing games with one another. Other embodiments are described.
US09542797B2	Gaming system with remote controller having location-based variable functionality A gaming system includes a handheld device coupled to a fixed structure. The handheld device includes a sensor configured to detect inputs. The handheld device is positionable in a base predefined zone and a first predefined zone. The base predefined zone is defined as a base volumetric space and the first predefined zone is defined as a first volumetric space. A memory device stores instructions that, when executed, by at least one of one or more processors of the gaming system, cause the gaming system to (i) detect a first input from the handheld device, (ii) perform a first function in response to the first input being detected in the base predefined zone, and (iii) perform a second function in response to the first input being detected in the first predefined zone, the second function being different from the first function.
US09542795B2	Switch unit and game machine A switch unit is provided, comprising: a display part configured to display an image in at least one input area; an input part provided above the display part, the input part comprising a contact, wherein when the input part is pressed toward the at least one input area displayed on the display part, the contact corresponding to the input area is conducted; and an operating button configured to cause conduction of the contact of the input part, the contact corresponding to the input area, by a press-down operation toward the input area of the display part, wherein the operating button is made of a translucent rectangular parallelepiped member, and at least one side wall of the translucent rectangular parallelepiped member is formed into an inclined surface widening outwardly toward bottom of the operating button.
US09542793B1	Optical sensing system An optical sensing system for detecting objects passing through a volume of interest, wherein the sensing system has an emitter and a detector. The detector detects motion of object shadows generated as the object passes through the volume of interest between the emitter and detector. Motion detection algorithms, using computed motion vectors of the detected object, logically determine whether an object has traveled completely through the detection space, and can be used to discriminate a specific outcomes and/or impediments.
US09542792B2	Banknote handling apparatus and banknote handling method A banknote handling apparatus includes: a plurality of storing units 52 configured to store a banknote; a transport unit 18 configured to transport the banknote having been put into a machine body 2 to each of the storing units 52; a recognition unit 40 disposed at the transport unit 18 and configured to read out a serial number of the banknote having been put into the machine body 2; and a control unit 70 configured to control the transport unit 18. The control unit 70 controls the transport unit 18 such that the banknote whose serial number has been read out by the recognition unit 40 and the banknote whose serial number has not been read out by the recognition unit 40 are stored into different storing units 52.
US09542790B2	Cash recycling system and banknote separating device thereof A cash recycling system and a banknote separating device thereof are provided. The banknote separating device includes a supporting side plate, and an impeller wheel assembly, a banknote separating assembly, a first banknote pressing assembly and a second banknote pressing assembly mounted to the supporting side plate. The first banknote pressing assembly includes a first banknote pressing plate and a synchronous belt pulley mechanism configured to drive the first banknote pressing plate, and the synchronous belt pulley mechanism includes two synchronous pulleys and a synchronous belt sleeved on the synchronous pulleys. With the banknote separating device, the structure is simplified, the banknote clamping risk is reduced, and the reliability is improved.
US09542789B2	Paper currency accommodating device A banknote accommodating device includes a box body, a box door and a banknote inlet. A movable guide plate in the box body is arranged below the banknote inlet through a rotating shaft, and has a guide surface facing the banknote inlet, and an included angle between the guide surface and a vertical direction ranges from 0 degree to 20 degrees, an elastic element is provided on a back surface of the guide surface, and provides a thrust to rotate the movable guide plate counterclockwise. The box door is provided with a guide rib which forms an included angle with the vertical direction, and a stacking surface is provided at the bottom of the box body and forms an included angle with a horizontal direction, and a space for stacking banknotes vertically is formed between the guide surface, the guide rib and the stacking surface.
US09542786B2	Coin hopper A coin hopper includes a rotating disc having recesses that receive and hold coins one by one; a moving body that is disposed at a position corresponding to the recess and moves reciprocally between a holding position and a push-out position; a cam groove including a first route having a substantially circular shape and a second route connected to the first route at first and second branch points and protruding toward the outer periphery of the rotating disc with respect to the first route; and a cam follower disposed in the cam groove provided on a back side of the moving body. The moving body is held at the holding position when the cam follower moves along the first route and moves reciprocally between the holding position and the push-out position when the cam follower moves along the second route.
US09542782B2	Aircraft landing and takeoff logging system An aircraft logging system is disclosed. The aircraft logging system may be mounted on an aircraft and may be configured to generate a log of aircraft landing, takeoff or both. The aircraft logging system may have an independent power supply and may be electrically decoupled from the aircraft on which it is mounted. The aircraft logging system may include a sensor, such as an altimeter, that enables identifying the occurrence of a landing using emitted signals. The aircraft logging system includes a positioning device configured to provide a position measurement.
US09542771B2	Image processing system, image processing apparatus, and image processing method An image processing system according to an embodiment includes a stereoscopic display apparatus, a rendering processor, and a display controller. The stereoscopic display apparatus displays a stereoscopic image enabled for a stereoscopic vision using a plurality of parallax images. The rendering processor generates a plurality of parallax images by applying a rendering process to volume data that is three-dimensional medical image data from a plurality of viewpoint positions having different relative positions with respect to the volume data. The display controller causes the stereoscopic display apparatus to display a graphic image that is an image of a given graphic indicating a depth-direction position of a cursor that is operable by a given input unit in a three-dimensional stereoscopic image space in which a stereoscopic image is displayed, together with the parallax images.
US09542766B1	Intelligent configuration of data visualizations The techniques described herein determine configurations for data visualizations based on characteristics interpreted from input data. Input data including a plurality of images may be obtained. For instance, the input data may include one or more files containing images associated with an entity. The techniques disclosed herein may determine a characteristic, such as a primary color, based on the input data. The techniques disclosed herein may determine an individual entity or subject to be associated with the characteristic. Techniques disclosed herein also involve the generation of output data defining a visualization based on the characteristic. A rendering of the output data provides an indication of the individual entity or subject. In some configurations, a rendering of the output data provides a graphical association between data in a dataset and the individual entity or subject.
US09542763B2	Systems and methods for fast reconstruction for quantitative susceptibility mapping using magnetic resonance imaging Described here are systems and methods for quantitative susceptibility mapping (“QSM”) using magnetic resonance imaging (“MRI”). Susceptibility maps are reconstructed from phase images using an automatic regularization technique based in part on variable splitting. Two different regularization parameters are used, one, λ, that controls the smoothness of the final susceptibility map and one, μ, that controls the convergence speed of the reconstruction. For instance, the regularization parameters can be determined using an L-curve heuristic to find the parameters that yield the maximum curvature on the L-curve. The μ parameter can be determined based on an l2-regularization and the λ parameter can be determined based on the iterative l1-regularization used to reconstruct the susceptibility map.
US09542759B2	Image processing device, method of processing image, and image processing program including false color correction There are provided a device and method that correct a false color occurring in a locally highlighted region in an image. A false color pixel is detected in data conversion processing of generating an RGB array image from an RGBW array image, low-band signals corresponding to respective RGBW colors that are different according to whether a pixel is a false color pixel, and the RGBW array is converted by interpolation processing to which the calculated low-band signals are applied to generate the RGB array image. The interpolation processing is performed using the low-band signals on an assumption that a W low-band signal mW, and RGB respective low-band signals mR, mG, and mB have a proportional relation in a local region. When a pixel of interest is a false color pixel, the low-band signal is calculated by an application of a low-pass filter having a coefficient in which a contribute rate of pixel values in the vicinity of the pixel of interest is made relatively lower than that of separated pixels.
US09542750B2	Method, apparatus and computer program product for depth estimation of stereo images In an example embodiment, a method, apparatus and computer program product are provided. The method includes facilitating receipt of primary depth map and plurality of color segments, the primary depth map associated with a first image and a second image that are stereoscopic pair of images of a scene, and the color segments associated with the first image. The method includes generating plurality of disparity planes based on the color segments and the primary depth map. The method includes determining aggregated cost volume between pixels of the first and second images for the disparity planes. The method includes assigning plane labels corresponding to the disparity planes to pixels of the first and second images based on the aggregated cost volume, an individual pixel being assigned a plane label. The method includes generating secondary depth map based on the plane labels assigned to the pixels of the first and second images.
US09542747B2	Assembly simulation apparatus and method for wooden structure An assembly simulation apparatus and method for a wooden structure are provided. The assembly simulation apparatus for a wooden structure includes an element analysis unit for analyzing shapes of a plurality of elements constituting a three-dimensional (3D) wooden structure model and a coupling relation between the elements. A relation graph generation unit generates a relation graph based on the analyzed shapes of the plurality of elements and the analyzed coupling relation between the elements. An animation creation unit creates an animation of a movement path depending on a task for coupling or separating the plurality of elements, based on the generated relation graph. An animation play unit simulates an assembly method for the wooden structure by playing the created animation depending on the assembly method for the wooden structure.
US09542746B2	Method and system for spatial characterization of an imaging system A configuration system generates a calibration target to be printed, the target including a set of machine-readable and visually-identifiable landmarks and associated location-encoding marks which encode known locations of the landmarks. A plurality of test images of the printed calibration target is acquired by the system from an image capture assembly. Positions of the landmarks in the acquired test images and the location-encoding marks in the acquired test images are detected by the system. The system decodes the locations of the landmarks from the detected location-encoding marks and spatially characterizes the image capture assembly, based on the detected positions of the landmarks in the acquired test images and their decoded known locations.
US09542738B2	Augmented three dimensional point collection of vertical structures Automated methods and systems of creating three dimensional LIDAR data are disclosed, including a method comprising capturing images of a geographic area with one or more image capturing devices as well as location and orientation data for each of the images corresponding to the location and orientation of the one or more image capturing devices capturing the images, the images depicting an object of interest; capturing three-dimensional LIDAR data of the geographic area with one or more LIDAR system such that the three-dimensional LIDAR data includes the object of interest; storing the three-dimensional LIDAR data on a non-transitory computer readable medium; analyzing the images with a computer system to determine three dimensional locations of points on the object of interest; and updating the three-dimensional LIDAR data with the three dimensional locations of points on the object of interest determined by analyzing the images.
US09542734B2	Information processing apparatus, image processing method, and storage medium that determine tone characteristics for respective object signals An image processing apparatus includes an acquisition unit to acquire an image. A detection unit detects each object region from the image acquired by the acquisition unit. A luminance distribution calculation unit calculate a plurality of luminance distribution information for respective object regions detected by the detection unit. A representative luminance value calculation unit calculates a plurality of representative luminance values for respective detected object regions. A determination unit determines tone characteristics for respective object regions based on the plurality of luminance distribution information for respective object regions calculated by the luminance distribution calculation unit and a relationship among the representative luminance values for the respective object regions calculated by the representative luminance value calculation unit.
US09542731B2	Apparatus for increasing sharpness An apparatus for increasing sharpness is provided. The apparatus according to an exemplary embodiment of the present disclosure can improve sharpness of an image by applying different sharpness gains to a center of the image and to a periphery of the image.
US09542729B2	Image processing device, method of controlling image processing device, and program for causing computer to execute the same method There is provided an image processing device including a depth acquisition unit and a smoothing processing unit. The depth acquisition unit acquires a depth to a subject in correlation with a pixel in a captured image of the subject, and the smoothing processing unit designates a pixel in a region excluding a predetermined region in the image as a target pixel, and performs a smoothing process of the degree according to the depth corresponding to the target pixel for a pixel value of the target pixel in a predetermined direction. This causes a pixel in a region excluding the predetermined region in the image to be blurred, thereby generating a panning image.
US09542724B1	Systems and methods for stroke rendering on digital maps To provide smoothly scaleable map features on interactive digital maps, a first and a second sets of style parameters for rendering a map feature at a first zoom level and a second zoom level, respectively, are received. The first and second sets of style parameters are provided to a vertex shader. The vertex shader is configured to interpolate the first set of style parameters and the second set of style parameters to generate an interpolated set of style parameters for a certain zoom level between the first zoom level and the second zoom level, and render the map feature at the certain zoom level in accordance with the interpolated set of style parameters.
US09542716B1	Non raster row pixel processing A system and method for processing digital images that efficiently buffers pixel data relating to digital images is disclosed. Pixel values are read from an image storage memory and temporarily stored in a buffer memory according to a non-raster pattern. The processing of pixels also occurs according to a more efficient non-raster patter.
US09542712B2	Method and apparatus to calculate real-time customer satisfaction and loyalty metric using social media analytics A method and system are disclosed for providing a near-real-time measurement of sentiment and advocacy associated with user interactions within a social media environment. A first and second set of social media data, respectively associated with a first and second set of social media interactions, are processed to generate a first and second set of social network advocacy (SNA) data in near-real-time. The resulting first and second sets of SNA data are then processed to generate a first and second set of SNA Pulse (SNAP) metric data, which respectively indicate a near-real-time measurement of sentiment and advocacy for a given aspect of an organization. The first and second sets of SNAP metric data are then processed to generate a set of SNAP metrics differential data, which indicates a corresponding improvement or decline in sentiment or advocacy.
US09542710B1	Categorizing financial transactions based on business preferences During operation of a system, a financial transaction of an individual is associated with one or more predefined categories based on scores that indicate the likelihood of association. For example, a given predefined category may include a merchant name (such as the name of a potential counterparty in the financial transaction) and/or an attribute associated with one or more merchants. The score for a given predefined category may be determined based on financial-transaction preferences of the individual, where the financial-transaction preferences are specified by financial transactions in a financial-transaction history of the individual. The financial-transaction preferences may include a business-size preference (such as local versus national chains) and/or predefined categories in the financial-transaction history.
US09542705B2	System and method of intelligently recommending based on social media A system and method of intelligently recommending items based on social media communications are provided. A communication in a first format is intercepted from a first service. An intent to transact is then detected within the communication. A recommendation engine can then be used to identify one or more items available at an ecommerce service, the one or more items related to the intent to transact within the communication. Then a reply communication can be posted to the first service in the first format, with the reply communication including the one or more identified items.
US09542702B2	Method of raising funds for an organization The present invention relates to a method of raising funds for an organization. In one embodiment, the organization distributes a solicitation to a buyer, or for delivery to a buyer by way of a child relative of the buyer. The solicitation comprises an offer to sell a jewelry article made from a processed exfoliated deciduous tooth of the child, set in a jewelry object, as a gemstone would be set. The buyer sends a payment for the jewelry article to the manufacturer, who sends a payment to the organization for having distributed a solicitation that was converted into a purchase. The buyer sends the exfoliated deciduous tooth to the manufacturer. The deciduous tooth is specially processed in a manner that allows it to be set in the buyer's selected jewelry object as a gemstone would be set to create the completed jewelry article.
US09542698B2	Multimedia marketing and distribution system A central server having a computer readable storage media for storing multimedia material, such as motion pictures and television programming, in digital format is connected to a communications network such as the Internet. Exhibitors, such as theaters and television stations, can access the central server, preview available programming, verifying the ownership of such material, review contract provisions for obtaining and paying for the desired programming, and download the programming along with marketing materials for the program or movie. The central server loads material onto the storage media as its received from producers and owners of such material. In addition, central server retains data retains data regarding requests for material, such as titles requested, who requested such, and where the requestors are located geographically. This information can be used to help producers market their material more economically.
US09542695B2	Observation platform for performing structured communications Methods and systems are disclosed for sending information in an observation platform. A determination is made, at an observation platform, that a first communication device associated with a first user is located in an environment. A determination is made, at the observation platform, that the first communication device is located in proximity to a second communication device associated with a second user. Speech information is sent to the first communication device for the first user to use in communicating with the second user.
US09542690B2	System and method for providing international coupon-less discounts The systems and methods of the disclosure allow user from various countries to take advantage of offers when they are traveling internationally. Once the purchase associated with the offer is made, the transaction information may be processed by the system, such that, the credit and debit associated with the purchase are transmitted to the transaction account and the merchant. The transaction information may be further processed to determine whether the particular transaction is eligible for a reward. Where the transaction is eligible for a reward, the credit and debit associated with reward are transmitted to the transaction account and the sponsoring entity. The reward may be provided in any suitable currency or in various currencies based on the parameters governing the reward offer.
US09542689B2	Automated system for adapting market data and evaluating the market value of items A system includes a remotely-located server implementing a metric server adapter, a metrics application, and a communication application. The metric server adapter includes governing logic that manages at least one evaluation service and a plurality of predefined instructions for managing metric data. The metrics application is a production application that operates in coordination with the metric server adapter. Receipt of a product specification data set triggers the metrics application to obtain metric data that includes market reference price data, evaluate attributes of each responsive item in the metric data to dynamically discover a difference in the attribute data, and contextually define transaction-specific instructions for adapting the metric data for the respective item. One or more adjustment values transform the market reference price data, and one or more evaluation metrics are communicated to the user-agent computing device.
US09542686B2	Integrated change management unit An integrated system for managing changes in regulatory and nonregulatory requirements for business activities at an industrial or commercial facility. Application of this system to environmental, health and safety activities, and to food, drug, cosmetic, and medical treatment and device activities, are discussed as examples. The system: provides one or more databases that contain information on operations and requirements concerning an activity or area of business; receives information on regulatory and nonregulatory changes that affect operations of the business; converts these changes into changes in data entry forms, data processing and analysis procedures, and presentation (by printing, electronic display and/or distribution) of data processing and analysis results to selected recipients, without requiring the services of one or more programmers to re-key and/or reformat the items affected by the change; and implements receipt of change information and dissemination of data processing and analysis results using the facilities of the Internet.
US09542684B2	Biometric based authorization systems for electronic fund transfers A money transfer authorization method that includes the step of providing transferor biometric information to a party verification processor that verifies an identity of the transferor by comparing the transferor biometric information with previously registered biometric information from the transferor, where the transferor provides transfer identity information to receive the money. The method also includes confirming that the verified transferor has sufficient funds or credit for the money transfer, and providing transferee biometric identification to the party verification processor that verifies the transferee by comparing the transferee biometric information with previously registered biometric information from the transferee. The transferee has to provide transfer identity information before the money is given to the transferee.
US09542678B1	Exclusive bonding of wireless devices A payment reader and a merchant device may communicate over a wireless connection. The payment reader may establish a wireless bond with a first merchant device and exchange payment information. After the payment information is exchanged, the payment reader and merchant device may disconnect while remaining bonded. The payment reader may send a request message and bond to a second merchant device, while breaking the bond with the first merchant device if a bond with the second merchant device is established. The payment reader may then exchange payment information with the second merchant device.
US09542675B2	Alert architecture Systems, architecture of the systems, and methods for generating alert message are disclosed. A user enrolls in an alert messaging service. Information that the user provides during an enrollment process are sent into a database. the user performs a transaction using a portable consumer device. Transaction data are sent to a computer apparatus. The computer apparatus accesses the database containing alert customization data. An alert message is generated based on the transaction data and the alert customization data. The alert message is sent to a user device. The systems, resources and processes responsible for performing the transaction and providing the alert messages are separated so that the transaction processing and alert generation are performed in parallel by systems in communication with each other. Utilizing such method prevents the transaction processing system from being overloaded with additional processes, while maintains a desired level of efficiency, security and reliability of the payment processing system.
US09542669B1	Encoding and using information about distributed group discussions Techniques are described for analyzing user-supplied information, including to predict future aspects of additional related information that will be supplied by users. The user-supplied information may include distributed group discussions that involve numerous users and occur via user comments and other content items supplied to one or more social networking sites and/or other computer-accessible sites. The analysis of user-supplied information may, for example, include determining particular topics that are of interest for a specified category during one or more periods of time, summarizing and encoding information about multiple selected factors for comments supplied for particular topics or a category during each period of time (such as to quantify an amount of user interest), predicting future values for the selected factors for the topics and category during one or more future period of times, and taking one or more further actions based on the predicted information.
US09542661B2	Article vending machine and method for exchanging an inoperable article for an operable article An article vending machine in a network of article vending machines capable of exchanging an inoperable rental article received from a user for an operable replacement article. The article dispensing machine checks customer identification information against one or more customer rental criteria to determine if the customer is eligible to exchange an inoperable article for an operable one. The article vending machine searches for an identical replacement article within an inventory of the machine itself and within inventories of the networked article vending machines. Alternatively, the article vending machine may provide a refund for the inoperable article.
US09542659B1	Distributed report processing system and methods A distributed report processing system. The system includes a management server and a queue server in communication with the management server. The system also includes a plurality of report generators in communication with the management server and the queue server.
US09542657B2	Method and system for optimizing contact center performance A method for assigning individual contact processing resources of a contact center to contacts in the contact center is disclosed. On receiving a new contact at the contact center, a contact object corresponding to the new contact is provided within a population of contact objects corresponding to contacts being processed by the contact center. A programmed processing object corresponding to each individual contact processing resource of the contact center is provided. Each processing object is arranged to adaptively and independently select contact objects from the population of contact objects based on a value received for processing contacts from the population and a value spent on processing contacts from the population. Once a programmed processing object selects a contact object, an associated contact processing resource is assigned to the contact.
US09542646B1	Drift annealed time series prediction Methods, computer program products, and systems are presented. The methods include, for instance: generating a drift annealed time series prediction model based on training data. In one embodiment the generating may include: recording an ensemble of candidate models for at least one predictor variable of the training data responsive to creating the ensemble based on the training data by machine learning. The ensemble includes three candidate models represented by respective prediction function to formulate a potentially predictive relationship between a target variable and predictor variables in the training data. Respective candidate models in the ensemble is manipulated to adjust degrees associated with predictor variables such that respective new models take relative importance of predictor variables into account and the drift annealed time series prediction model based on the new models is produced.
US09542645B2	Plastic synapse management A method for managing synapse plasticity in a neural network includes converting a first set of synapses from a plastic synapse type to a fixed synapse type. The method may also include converting a second set of synapses from the fixed synapse type to the plastic synapse type.
US09542643B2	Efficient hardware implementation of spiking networks Certain aspects of the present disclosure support operating simultaneously multiple super neuron processing units in an artificial nervous system, wherein a plurality of artificial neurons is assigned to each super neuron processing unit. The super neuron processing units can be interfaced with a memory for storing and loading synaptic weights and plasticity parameters of the artificial nervous system, wherein organization of the memory allows contiguous memory access.
US09542642B2	Packet data neural network system and method This application discloses a neural network that also functions as a connection oriented packet data network using an MPLS-type label switching technology. The neural network uses its intelligence to build and manage label switched paths (LSPs) to transport user packets and solve complex mathematical problems. However, the methods taught here can be applied to other data networks including ad-hoc, mobile, and traditional packet networks, cell or frame-switched networks, time-slot networks and the like.
US09542640B1	Radio frequency identification tag apparatus with laser direct structuring antenna A radio frequency identification tag apparatus includes a display unit, a radio frequency identification tag unit and a laser direct structuring antenna unit. The radio frequency identification tag unit is electrically connected to the display unit. The laser direct structuring antenna unit is wirelessly coupled to the radio frequency identification tag unit.
US09542637B2	RFID tag with anti-tamper assembly A radio frequency identification (RFID) transponder may include a substrate and a device. The substrate may be in communication with a controller and an antenna, and the antenna is arranged to receive radio frequency signals. A first side surface of the substrate may include a capacitor. The device may be detachably coupled with the substrate via a conductive member positioned between the structure and the capacitor of the substrate, and the conductive member may be within a desired proximity of the capacitor. The structure may be attached to an attachment surface so that an attachment strength between the structure and the attachment surface may be greater than a force required to decouple the structure from the substrate. When the structure is decoupled from the substrate, the conductive member separates from the capacitor, disabling the transponder.
US09542624B2	Recognizing method of flaky or blocky prohibited articles, explosives or drugs The present invention discloses recognizing methods of flaky or blocky prohibited articles, explosives or drugs. Specifically, the method for recognizing flaky prohibited articles, explosives or drugs comprises steps of: (1) reading in tomogram data of an object to be inspected for one tomogram; (2) pre-processing the tomogram data; (3) splitting the pre-processed tomogram data into a plurality of regions that have similar physical properties; (4) analyzing whether each of the split regions is a flaky region; (5) determining whether the flaky region recognized in the current tomogram can be merged with the flaky region detected from the previous tomogram, so as to form a flaky target; (6) determining whether each detected flaky target is complete or finished; (7) repeating steps (1)-(6) and processing each tomogram data layer by layer, until all of the tomogram data have been processed.
US09542622B2	Framework for data extraction by examples Various technologies described herein pertain to controlling automated programming for extracting data from an input document. Examples indicative of the data to extract from the input document can be received. The examples can include highlighted regions on the input document. Moreover, the input document can be a semi-structured document (e.g. a text file, a log file, a word processor document, a semi-structured spreadsheet, a webpage, a fixed-layout document, an image file, etc.). Further, an extraction program for extracting the data from the input document can be synthesized based on the examples. The extraction program can be synthesized in a domain specific language (DSL) for a type of the input document. Moreover, the extraction program can be executed on the input document to extract an instance of an output data schema.
US09542618B2	System and method for pleographic recognition, matching, and identification of images and objects The inventive data processing system and method enable recognition, matching, and/or identification of images and/or of objects, utilizing at least one novel pleographic data processing technique.
US09542613B2	Systems and methods for processing images A apparatus and method are provided for processing images. In one embodiment, the apparatus includes an image sensor configured to capture real time images from an environment of a user. The apparatus also includes a mobile power source, and at least one processor device configured to process, at an initial resolution, images to determine existence of a trigger, and access rules associating image context with image capture resolution to enable images of a first context to be processed at a lower capture resolution than images of a second context. The processor device analyzes at least one first image, selects a first image capture resolution rule, and applies the first image capture resolution rule to a subsequent captured image. The processor device analyzes at least one second image, selects a second image capture resolution rule, and applies the second image capture resolution rule to a second subsequent captured image.
US09542612B2	Using extracted image text Methods, systems, and apparatus including computer program products for using extracted image text are provided. In one implementation, a computer-implemented method is provided. The method includes receiving an input of one or more image search terms and identifying keywords from the received one or more image search terms. The method also includes searching a collection of keywords including keywords extracted from image text, retrieving an image associated with extracted image text corresponding to one or more of the image search terms, and presenting the image.
US09542607B2	Lane boundary line recognition device and computer-readable storage medium storing program of recognizing lane boundary lines on roadway A lane boundary line recognition device detects lane boundary line candidates of a roadway from images captured by an in-vehicle camera, judges that the lane boundary line candidate is a lane boundary line of a branch road, and calculates a curvature of the lane boundary line candidate, and recognizes the lane boundary line based on the calculated curvature. The device removes the lane boundary line candidate, which has been judged as the lane boundary line of the branch road, is removed from a group of the lane boundary line candidates, and calculates the curvature of the lane boundary line candidate based on an estimated rate of change of the curvature. The device uses a past curvature calculated predetermined-number of images before when the lane boundary line candidate is the lane boundary line of the branch road, and resets the estimated rate of change of the curvature to zero.
US09542603B2	System and method for localizing a talker using audio and video information A videoconferencing endpoint includes at least one processor a number of microphones and at least one camera. The endpoint can receive audio information and visual motion information during a teleconferencing session. The audio information includes one or more angles with respect to the microphone from a location of a teleconferencing session. The audio information is evaluated automatically to determine at least one candidate angle corresponding to a possible location of an active talker. The candidate angle can be analyzed further with respect to the motion information to determine whether the candidate angle correctly corresponds to person who is speaking during the teleconferencing session.
US09542601B2	Method and apparatus for image collection and analysis A system that incorporates teachings of the subject disclosure may include, for example, a processor that can detect an event, access location information for a group of mobile communication devices that are each automatically capturing images, and identify a subset of the group of mobile communication devices that are in proximity to the event based on the location information. The processor can provide first image analysis criteria to the subset of the group of mobile communication devices without providing the first image analysis criteria to remaining devices of the group of mobile communication devices where the first image analysis criteria includes first characteristics associated with an object. The processor can receive a first target image that includes the object from a first mobile communication device of the subset of the group of mobile communication devices. Other embodiments are disclosed.
US09542594B2	Information processing apparatus, method for processing information, and program Positional information regarding a target region in an image obtained by a first detection unit is obtained from a holding unit, and positional information regarding a target region in the image is obtained by a second detection unit whose detection characteristics are different from those of the first detection unit. Positional information regarding a target region in the image is determined based on the obtained positional information and the positional information detected by the second detection unit.
US09542593B2	Image-based feature detection using edge vectors Techniques are provided in which a plurality of edges are detected within a digital image. An anchor point located along an edge of the plurality of edges is selected. An analysis grid associated with the anchor point is generated, the analysis grid including a plurality of cells. An anchor point normal vector comprising a normal vector of the edge at the anchor point is calculated. Edge pixel normal vectors comprising normal vectors of the edge at locations along the edge within the cells of the analysis grid are calculated. A histogram of similarity is generated for each of one or more cells of the analysis grid, each histogram of similarity being based on a similarity measure between each of the edge pixel normal vectors within a cell and the anchor point normal vector, and a descriptor is generated for the analysis grid based on the histograms of similarity.
US09542592B2	Image processing method and apparatus The present invention discloses an image processing method and apparatus, where the method includes: downscaling an image to be processed; identifying identifiable targets in the downscaled image, and localizing temporary unidentifiable targets in the downscaled image; identifying the temporary unidentifiable targets at positions, corresponding to localized positions in the downscaled image, in the image to be processed. According to the present invention, only one object lens is needed to obtain the image to be processed, and no switching process between a high magnification lens and a low magnification lens is required during a target screening process; so that image identification speed is increased, and mechanical errors and offset in positioning are avoided.
US09542585B2	Efficient machine-readable object detection and tracking A method to improve the efficiency of the detection and tracking of machine-readable objects is disclosed. The properties of image frames may be pre-evaluated to determine whether a machine-readable object, even if present in the image frames, would be likely to be detected. After it is determined that one or more image frames have properties that may enable the detection of a machine-readable object, image data may be evaluated to detect the machine-readable object. When a machine-readable object is detected, the location of the machine-readable object in a subsequent frame may be determined based on a translation metric between the image frame in which the object was identified and the subsequent frame rather than a detection of the object in the subsequent frame. The translation metric may be identified based on an evaluation of image data and/or motion sensor data associated with the image frames.
US09542576B1	Magnetic helical physical unclonable function measured above flight A helical physical unclonable function is disclosed. The helical physical unclonable function may be used to authenticate a supply item for an imaging device. Measurements of the magnetic field above a helical flight are stored in a non-volatile memory to be used by an imaging device to authenticate the supply item. Other systems and methods are disclosed.
US09542570B2	Permission control In some example implementations, there is provided a method including determining, from a received request, one or more attributes; sending, by a permission controller, a query to a use case database, the query including the determined attributes to enable an identification by the use case database of a matching use case stored in the use case database; approving, by the permission controller, the requested access to the data, when a response to the query indicates the matching use case was found in the use case database; rejecting, by the permission controller, the requested access to the data, when the response to the query indicates the matching use case was not found in the use case database.
US09542567B2	Methods and systems for enabling media guidance application operations based on biometric data Methods and systems are disclosed herein for encouraging particular behavior or performing particular actions based on biometric data of a user. Specifically, by granting and restricting access to media and other user devices based on whether or not a user is conforming to a biometric state, a media guidance application may encourage a user to maintain or achieve the desired biometric state.
US09542560B2	Methods and systems for providing access control to secured data In a system for providing access control management to electronic data, techniques to secure the electronic data and keep the electronic data secured at all times are disclosed. According to one embodiment, a secured file or secured document includes two parts: an attachment, referred to as a header, and an encrypted document or data portion. The header includes security information that points to or includes the access rules and a file key. The access rules facilitate restrictive access to the secured document and essentially determine who/when/how/where the secured document can be accessed. The file key is used to encrypt/decrypt the encrypted data portion. Only those who have the proper access privileges are permitted to retrieve the file key to encrypt/decrypt the encrypted data portion.
US09542557B2	Snoop-based kernel integrity monitoring apparatus and method thereof A snoop-based kernel integrity monitoring apparatus and a method thereof are provided. More particularly, provided are a kernel integrity monitoring apparatus which is provided as a hardware device independent of a host system, and snoops traffic occurring in a system bus of the host system and by detecting a write attempt in a kernel immutable region, monitors integrity of the kernel, and a method thereof. According to the apparatus and method, by analyzing traffic of the system bus of the host system, a write attempt in the kernel immutable region is detected. Thus, a transient attack which is difficult for a snapshot method to detect can be detected.
US09542553B1	Systems and methods of identity protection and management In an embodiment, a computing system, such as a monitoring computer, receives a request from a user to monitor an account of the user with an online service provider. The request may include personal information and user preferences for one or more protective actions. The system periodically monitors external data sources for indications of changes to personal information associated with the account, and detects changes or attempted changes to personal information associated with the account. The system may determine risk levels associated with detected changes or attempted changes, and transmit a notification to the user via a communication channel selected based on the determined risk level and/or the user preferences. The system may also initiate protective actions, so that further unauthorized access to the account may be prevented.
US09542548B2	Computer application security A method of providing restricted access to computer application information via a computing device includes: displaying a limited-access icon on a display of the computing device, the limited-access icon including a function indicator and code-entry segments that can be selected by a user of the computing device, each of the code-entry segments including a visual indicator; receiving a selection sequence of user selections of selected ones of the code-entry segments; and performing a limited-access function corresponding to the function indicator in response to the selection sequence corresponding to an authorized sequence.
US09542546B2	System and method for implicitly resolving query scope in a multi-client and multi-tenant datastore An apparatus comprising a multi-tenant datastore and a processor coupled to the multi-tenant datastore, wherein the processor is configured to receive a request comprising one or more security tokens, wherein the one or more security tokens comprise identification information, and generate a query based on the request to access the multi-tenant datastore, wherein generating the query comprises deriving a query scope based on the one or more security tokens.
US09542543B2	Biometric authentication device, biometric authentication method and computer readable, non-transitory medium A biometric authentication device including: a data-for-matching generation portion generating a data for matching from biometric information; an update-demand determine portion determining whether a registered data registered for matching with the data for matching needs updating or not, based on a difference between biometric quality of the registered data and biometric quality of the data for matching; and a registered data replace portion replacing the registered data by a generated data for updating, according to a determination result of the update-demand determine portion.
US09542542B2	Single step transaction authentication using proximity and biometric input A system and method provide efficient, secure and highly reliable authentication for transaction processing and/or access control applications in which only biometric input is required from the user. A Personal Digital Key stores a biometric profile that comprises a representation of physical or behavioral characteristics that are uniquely associated with an individual that owns and carries the PDK. The PDK wirelessly transmits the biometric profile over a secure wireless transaction to a Reader for use in a biometric authentication process. The Reader compares the received biometric profile to a biometric input acquired at the point of transaction in order to determine if the transaction should be authorized.
US09542539B2	Managing software deployment The method includes identifying an instance of software installed. The method further includes determining a fingerprint corresponding to the instance of software installed. The method further includes determining a security risk associated with the instance of software installed. The method further includes identifying a software management policy for the instance of software based upon the fingerprint, security risk, and designated purpose of the computing device. In one embodiment, the method further includes in response to identifying the software management policy, enforcing, by one or more computer processors, the software management policy on the instance of software installed on the computing device.
US09542535B1	Systems and methods for recognizing behavorial attributes of software in real-time A computer-implemented method for recognizing behavioral attributes of software in real-time is described. An executable file is executed. One or more runtime events associated with a behavior of the executable file are traced. The one or more traced runtime events are translated to a high level language. A recognizable pattern of the translated traced runtime events is produced. The pattern is a unique behavioral set of the translated traced runtime events.
US09542532B1	Decision support recommendation optimization Systems, methods, and computer-readable media are provided for facilitating clinical decision making by directing the emission of computer-generated health-care related recommendations towards contexts in which the recipient will likely find the recommendations salient and will likely welcome them and act upon them. ‘Uptake’ of computer-generated recommendations for diagnostic tests or therapeutic interventions is thereby substantially increased, and ‘alert fatigue’ is substantially decreased. Embodiments of our technology overcome certain drawbacks associated with the prior art by providing a means for ascertaining which decision-support recommendations are likely to be favorably considered by the recipient and acted-upon (recommendation ‘uptake’). System and method embodiments for providing a predicted probability of user uptake of a context-specific system-generated recommendation patient are disclosed herein and for applying that information to decide whether or not to emit the relevant recommendation.
US09542531B2	Modular biometric monitoring system A modular system for acquiring biometric data includes a plurality of data acquisition modules configured to sample biometric data from at least one respective input channel at a data acquisition rate. A representation of the sampled biometric data is stored in memory of each of the plurality of data acquisition modules. A central control system is in communication with each of the plurality of data acquisition modules through a bus. The central control system is configured to control communication of data, via the bus, with each of the plurality of data acquisition modules.
US09542530B2	System and method for multi-dimensional profiling of healthcare professionals The disclosure generally describes computer-implemented methods, software, and systems for ranking healthcare professionals, including: receiving healthcare information submitted by a user; launching search delegators to search respective channels of social media based on the healthcare information; receiving meta search records from the search delegators; scoring the meta search records based on the healthcare information as well as the channel of social media where the meta search record was found; filtering the meta search records based on the corresponding scores; and providing the filtered meta search records to the user.
US09542525B2	Additive smoothing of sharp concave edges on designed 3D printable polygonal mesh models A method for designing a personalized medical device includes receiving a template design of a medical device. An image including a patient anatomical geometry is acquired. The template design is combined with the image including the patient anatomical geometry to create a custom medical device design. A region of interest encompassing the sharp concave edge is automatically identified within the custom medical device design using one or more seed points received from a user. Surface smoothing of the custom medical device design is performed within the region of interest to bolster a thickness of the custom medical device design. A 3D-printable model is obtained from the surface smoothed custom medical device design.
US09542520B2	Method and apparatus for camouflaging a standard cell based integrated circuit with micro circuits and post processing A method and apparatus for camouflaging an application specific integrated circuit (ASIC), wherein the ASIC comprises a plurality of interconnected functional logic is disclosed. The method adds functionally inert elements to the logical description or provides alternative definitions of standard logical cells to make it difficult for reverse engineering programs to be used to discover the circuit's function. Additionally, post processing may be performed on GDS layers to provide a realistic fill of the empty space so as to resemble structural elements found in a functional circuit.
US09542512B1	System and method for automatic correction of flight time skew of timing signals in simulated source synchronous interface operation A system and method are provided for maintaining alignment of timing signals of a source synchronous interface between driver and receiver portions of an electronic system in a behavioral model based simulation environment. The system comprises a memory unit, an analysis controller unit coupled to the memory unit, and a timing alignment unit coupled to the analysis controller unit. The timing alignment unit is executable responsive to the analysis controller unit to generate behavioral models for mutually assigned first and second nets which transmit respective timing signals between the driver and receiver portions, and actuates transient simulation on the behavioral models to simulate transmission of the timing signals through the first and second nets. A timing skew between respective transmissions of the timing signals through the first and second nets is measured responsive to the simulated transmission for compensation during a general simulation of the source synchronous interface.
US09542501B2	System and method for presenting content in a client/server environment Viewing of web pages is improved by prioritizing image rendering based on positioning of images within a web page. For example, for images that are likely to be initially viewable upon presentation of the web page (i.e., prior to scrolling), compressed proxy versions are made available so that the images can be transferred and rendered more quickly. These compressed proxy images are later replaced with better quality renderings of the same images. Fetching of images that are not initially visible can be deferred until after other, more important page resources are loaded. Prioritization of page loading in this manner helps to ensure that the page becomes operational earlier, resulting in improved perceived speed and responsiveness, and greater ease of navigation.
US09542496B2	Effective ingesting data used for answering questions in a question and answer (QA) system A mechanism is provided, in a data processing system comprising a processor and a memory configured to implement a question and answer (QA) system, for effectively ingesting data for answering questions in the QA system. A received input question having a set of question characteristics is parsed, which are compared to question characteristics associated with a set of previous questions. Responsive to the set of question characteristics matching the question characteristics associated with one or more previous questions above a related-question predetermined threshold, identification is made as to whether answers to the one or more previous questions were obtained from static information sources or real-time information sources. Responsive to the answers to the one or more previous questions being obtained from the real-time information sources above the predetermined real-time threshold, real-time information sources related to the characteristics of the input question are initially utilized to answer the input question.
US09542495B2	Targeted content provisioning based upon tagged search results One or more techniques and/or systems are provided for tagging search results, organizing tagged search results for later access from various devices, public sharing of tagged search results, and/or providing targeted content based upon search results tagged by a user. That is, a user may tag a search result (e.g., a website, an image, a social network profile, etc.), such as through a one-click user input, with a tag to create a tagged search result. The tagged search result may be organized into a public tag collection for sharing and/or exploration of tagged search results by other users. The tagged search result may be organized into a personal tag collection for later access by the user from any device. Because the tagged search result may be indicative of an interest of the user, targeted content associated with the tagged search result may be provided to the user.
US09542491B2	Utilizing keystroke logging to determine items for presentation Systems, methods, and computer-readable storage media are provided for utilizing keystroke logging information to determine items (e.g., search results and/or advertisements) for presentation in response to an input search query. The utilized keystroke logging information is captured contemporaneously with input of the submitted query terms/content of the search query. That is, the utilized keystroke logging information is captured during a single search query input session measured, for instance, between execution of a first search query and execution of a second search query, or between engagement with a search query input region and execution of a search query. In this way, information that may be gleaned about a user's intent based upon query reformulations (e.g., query term deletions, additions, spelling corrections, and the like) and/or actions taken with respect to query formation (e.g., pasting actions) may be utilized to provide relevant items in response to the search query.
US09542490B2	Video processing device for generating time-coded metadata and methods for use therewith A video processing device includes a content analyzer that receives a video signal and generates content recognition data based on the video signal, wherein the content recognition data is associated with at least one timestamp included in the video signal. A metadata search device generates time-coded metadata in response to content recognition data and in accordance with the at least one time stamp. A metadata association device generates a processed video signal from the video signal, wherein the processed video signal includes the time-coded metadata.
US09542489B2	Estimating social interest in time-based media Social media content items are mapped to relevant time-based media events. These mappings may be used as the basis for multiple applications, such as ranking of search results for time-based media, automatic recommendations for time-based media, prediction of audience interest for media purchasing/planning, and estimating social interest in the time-based media. Social interest in time-based media (e.g., video and audio streams and recordings) segments is estimated through a process of data ingestion and integration. The estimation process determines social interest in specific events represented as segments in time-based media, such as particular plays in a sporting event, scenes in a television show, or advertisements in an advertising block. The resulting estimates of social interest also can be graphically displayed.
US09542483B2	Computer-implemented system and method for visually suggesting classification for inclusion-based cluster spines A computer-implemented system and method for visually suggesting classification for inclusion-based document cluster spines are provided. A set of reference documents each associated with a classification code is designated. A different set of un-coded documents is obtained. One or more of the coded reference documents are combined with a plurality of un-coded documents into a combined document set. The documents in the combined document set are grouped into clusters. The clusters are organized along one or more spines, each spine including a vector. A visual suggestion for assigning one of the classification codes to one of the spines is provided, including visually representing each of the reference concepts in the clusters along that spine.
US09542482B1	Providing items of interest A source-matching service may gather information from one or more interest resources, then process the information to generate a set of keywords corresponding to an item or type of item in which users of a network-based service may be interested. Optionally, the source-matching service may identify a source to provide an item described by the interest keywords through the network-based service, and offer the source the opportunity to provide the item described by the interest keywords through the network-based service.
US09542474B2	Forensic system, forensic method, and forensic program Disclosed is a forensic system capable of enhancing the accuracy and efficiency of classification work of whether to submit document information as evidence in a lawsuit by highlighting a portion including a specific keyword in a unit of a sentence. The forensic system includes: a database that registers a keyword for determining by a user whether a plurality of pieces of document information included in the digital information is related to a lawsuit; a retrieving unit that retrieves the keyword registered in the database from the document information; a sentence extracting unit that extracts a sentence including the retrieved keyword from the document information; a score calculating unit that calculates a score indicating a degree of relevance to the lawsuit using a feature value extracted from the sentence extracted by the sentence extracting unit; and a highlighting unit that changes a degree of highlighting of the sentence according to the score.
US09542472B2	Facilitating collaboration on a record among a group of users of a feed-based enterprise network Disclosed are some examples of systems, methods and storage media for associating a group of users to a record and facilitating collaboration on the record by the users via a group feed of an enterprise network. In some implementations, a system includes first data associating each of a plurality of group identifiers to one or more record identifiers, and second data associating each of a plurality of feed item identifiers to a respective group identifier or record identifier. In one implementation, the system is configured to receive a request for a first group feed associated with a first group identifier. Based on the request, the system identifies one or more first record identifiers associated with the first group identifier, identifies one or more first feed item identifiers associated with the first group identifier or the first record identifiers, and generates the first group feed to include the corresponding feed items.
US09542471B2	Method of building a geo-tree A method of building a geo-tree includes collecting a plurality of data items having geographic and contextual tags, associating the geographic tags with the contextual tags, clustering the collected data items based on the contextual tags, classifying the clusters based on the contextual tags, building a geo-tree with each classified cluster being associated with a node on the tree and storing the geo-tree.
US09542466B2	Systems and methods for distributed storage Techniques for distributed storage using a plurality of computing devices connected to a network can include storing an electronic file in a local storage layer of one of the computing devices. The stored electronic file can be asymmetrically transmitted, in portions, over the network to other computing devices to store the file across the other computing devices in a distributed storage layer. The electronic file can be asynchronously transmitted over the network to a cloud storage layer such that the electronic file is mirrored in the cloud storage layer. The local storage layer of each computing device can store, for each electronic file stored in the distributed storage layer, metadata having pointers to locations of the portions the electronic files stored in the local storage layer and distributed storage layer. The electronic files stored in the distributed storage layer can be displayed as stored in a single logical drive.
US09542465B2	Quorum based transactionally consistent membership management in distributed storage Systems and methods that restore a failed reconfiguration of nodes in a distributed environment. By analyzing reports from read/write quorums of nodes associated with a configuration, automatic recovery for data partitions can be facilitated. Moreover, a configuration manager component tracks current configurations for replication units and determines whether a reconfiguration is required (e.g., due to node failures, node recovery, replica additions/deletions, replica moves, or replica role changes, and the like.) Reconfigurations of data activated as being replicated from an old configuration to being replicated on a new configuration may be performed in a transactionally consistent manner based on dynamic quorums associated with the new configuration and the old configuration.
US09542464B2	Method for identifying and classifying an object In a method for identifying and classifying an object, an object is detected by at least one physical detector tuned for it, the object is evaluated from the output signal of the detector and by an evaluation unit, and the object is identified and/or classified on the basis of predefinable properties from the output signal. A number of different physical features of the object are derived from the output signal, and the object is assigned to one of N predetermined basic classes on the basis of the derived physical features. The N basic classes are arranged in a predetermined order to form an N-dimensional vector V, which is assigned to the object, such that the elements v1, . . . , vN of the vector V indicate that the object belongs to the respective basic class. The object is then assigned to a derived class, which is taken from a reference data base, as a function of the vector V.
US09542461B2	Enhancing performance of extract, transform, and load (ETL) jobs A computer receives one or more files having configuration information that includes data that defines a plurality of stages of an extract, transform, and load (ETL) job, wherein the plurality of stages comprise a read stage that is preceded by a write stage, and wherein the read stage reads data from a source location, and wherein the data that is read or a modified version of the data that is read is being written by the write stage that writes data to the source location. The computer replaces the read stage with a decompressor stage. The computer replaces the write stage with a compressor stage. The computer executes the decompressor stage and compressor stage on a field-programmable gate array that is programmatically customized with data compression and data decompression functionality to enhance the performance of the ETL job.
US09542459B2	Adaptive data collection A mechanism is provided for adaptive data collection. A set of data collection mechanisms operating within an information technology system is discovered. For each resource specific piece of data being collected by the set of data collection mechanisms, a determination is made as to whether more than one data collection mechanism is collecting the resource specific piece of data from a resource. Responsive to more than one data collection mechanism collecting the resource specific piece of data from the resource, a time interval to collect the resource specific piece of data from the resource is set to a smallest collection interval of the collection intervals utilized by the more than one data collection mechanism. Collection of the resource specific piece of data from the resource by the more than one data collection mechanism is suspended and the resource specific piece of data is collected without utilizing the more than one data collection mechanism.
US09542458B2	Systems and methods for processing and displaying user-generated content Systems and methods are provided for processing and displaying user-generated content. User-generated content is received from a user over a network. A conversation related to the received user-generated content is identified. A score associated with the identified conversation is calculated based on one or more parameters related to the user or the conversation. The user-generated content is provided for display in relation to the conversation, based on the calculated score associated with the conversation.
US09542451B2	Mobile application search ranking Disclosed is a technique for providing a linkage between applications, or other digital content, of an application store by assigning values to users of the digital content with respect to a particular user who is submitting a query for particular digital content. The technique involves receiving a query and identifying a subset of digital content based on the query and a word matching technique. For each identified digital content, users who have installed or downloaded the digital content may be determined. A reputation score, corresponding to a user's influence, and a trust score, corresponding to a degree of separation between the user who submitted the query and other users who have installed the digital content, may be computed for each of the users. A list of recommended applications may be generated based on the word matching technique, the reputation score, and the trust score.
US09542449B2	Collaboration and analysis system for disparate information sources An advanced relational database and user interface system used for the evaluation, analysis and generation of specialized reports in any of a plurality data analysis environments. The database and analysis system can be utilized for many purposes, but particularly and preferably to support the analysis of patent claims and more specifically claim construction, infringement, written description, invalidity and/or patentability, among other matters of intellectual property litigation and analysis.
US09542448B2	Systems and/or methods for tailoring event processing in accordance with boundary conditions The technology relates to techniques for the attachment of priorities and/or reaction time limits to various entities of a system such as, for example, events, event types, queries, etc. The system's processing may be tailored behavior to match these boundary conditions while at the same time increasing (and sometimes even maximizing) the rate of events processed. Advantageously, the system may be made to adapt its behavior to the current situation, which is changeable and may even be changing quite frequently, e.g., as in connection with a potentially rapidly changing stream. Users may, for example, specify policies to control this adaptation and, thus, events (including events of special interest) may be handled appropriately, even in response to changing conditions.
US09542443B2	Hardware for performing a database operation Techniques for processing a query are provided. One or more operations that are required to process a query are performed by a coprocessor that is separate from a general purpose microprocessor that executes query processing software. The query processing software receives a query, determines one or more operations that are required to be executed to fully process the query, and issues one or more commands to one or more coprocessors that are programmed to perform one of the operations, such as a table scan operation and/or a lookup operation. The query processing software obtains results from the coprocessor(s) and performs one or more additional operations thereon to generate a final result of the query.
US09542442B2	Accessing data in a column store database based on hardware compatible indexing and replicated reordered columns Embodiments of the present invention provide hardware-friendly indexing of databases. In particular, forward and reverse indexing are utilized to allow for easy traversal of primary key to foreign key relationships. A novel structure known as a hit list also allows for easy scanning of various indexes in hardware. Group indexing is provided for flexible support of complex group key definition, such as for date range indexing and text indexing. A Replicated Reordered Column (RRC) may also be added to the group index to convert random I/O pattern into sequential I/O of only needed column elements.
US09542438B2	Term complete Real-time query expansion (RTQE) is a process of supplementing an original query with additional terms or expansion choices that are ranked according to some figure of merit and presented while users are still formulating their queries. As disclosed herein, individual terms may be combined and submitted as a phrase into a query. By building the phase term-by-term, users can compositionally formulate queries while maintaining the same benefits that other RTQE interfaces offer. To promote greater flexibility in its working environment, the number of terms that are presented on a display may be reduced. In place of some terms, placeholders may be used and expanded by the user when necessary. This allows phrases to be readily presented on small displays (e.g., hand-held devices).
US09542432B2	Systems and methods for multitenancy data Systems and methods are provided to support multitenant data in an EclipseLink environment. EclipseLink supports shared multitenant tables using tenant discriminator columns, allowing an application to be re-used for multiple tenants and have all their data co-located. Tenants can share the same schema transparently, without affecting one another and can use non-multitenant entity types as per usual. This functionality is flexible enough to allow for its usage at an Entity Manager Factory level or with individual Entity Manager's based on the application's needs. Support for multitenant entities can be done though the usage of a multitenant annotation or xml element configured in an eclipselink-orm.xml mapping file. The multitenant annotation can be used on an entity or mapped superclass and is used in conjunction with a tenant discriminator column or xml element.
US09542425B2	Document management system having automatic notifications A method for storing, organizing and providing remote electronic access to documents. A cover sheet including a standard set of identification data characterizing each document is developed and stored. A digital version of each document is created and stored by scanning each contract. Each digital version includes a scanned image and a searchable text file, wherein the text is overlaid with the image. An index of bookmarks identifying sections of the digital version of each document is generated. Selected fields of information are captured from the digital version of the document. The documents are organized and cross-referenced in a database that includes the captured information and additional information related to each document. Designated parties are alerted of critical dates associated with each document. Remote electronic access to the documents is provided over the internet.
US09542422B2	Discovery and sharing of photos between devices Described are systems, media, and methods for discovery of media relevant to a user and sharing the media with the user.
US09542421B2	Sequencing electronic files Systems and methods for sequencing electronic files include generating a first file sequence and one or more alternative file sequences. An alternative file sequence may be generated based in part on a characteristic of a file in the first sequence. The first and alternative sequences may be used in an electronic slideshow that allows a user to switch between file sequences. In some implementations, which alternative file sequences are generated may be determined based in part on a prediction of characteristics that may be of interest to a user.
US09542420B2	Preparing LC/MS data for cloud and/or parallel image computing Functionality is described for data management and querying LC/MS spectrometry data, therefore making it easier to store, retrieve, transfer, and process the mass spectrometry data. The functionality transforms a plurality of raw LC/MS files obtained from a biological experiment into a set of LC/MS images on a common M/Z and RT grid compatible for image processing (e.g., time alignment, peak detection and quantification, differential analysis, etc.). The functionality then spits large LC/MS images into smaller chunks, therefore making easier parallel querying and processing using cloud or high performance computing systems.
US09542419B1	Computer-implemented method for performing similarity searches A similarity search may be performed on the image of a person, using visual characteristics and information that is known about the person. The search identifies images of other persons that are similar in appearance to the person in the image.
US09542418B2	Device for optical time-stamping, and related image-sensing system and optical time-stamping method Disclosed is an optical time-stamping device, including an optical instrument with a retina having a field of view and being able to produce on the retina images of the field of view, and a high accuracy reference clock signal receive. The time-stamping device also includes: a lighting source at a distance from the retina of an optical instrument, and configured to emit a light signal in the direction of the retina of an optical instrument and in the field of view of an optical instrument, and a control unit connected to the reference clock signal receiver by a first connection and to the lighting source by a second connection, and configured for controlling the lighting source for emitting a light signal in a synchronized way with the reference clock signal. An associated image sensing system and optical time-stamping method are also disclosed.
US09542416B2	Modification and validation of spatial data A method for validating data changes made to a database is disclosed. The changes are made in the context of a transaction, and validation is performed using a rules database storing a plurality of rules. The method includes identifying a set of data entities affected by one or more data changes made in the context of the transaction. In response to an instruction to commit the transaction, data entities in the set of affected data entities are validated using rules from the rules database. The transaction is committed in dependence on the outcome of the validation.
US09542414B1	Lock state reconstruction for non-disruptive persistent operation Techniques for notifying clients whose locks did not persist about a loss of lock state after a failover event are disclosed herein. According to one embodiment, a storage node of a high availability cluster constructs a lock data structure based on a mirrored lock data structure for a lock on a data container. The storage node receives a data operation request permitted by the lock from a client to operate on the data container. The storage node instructs to terminate a connection with the client if the lock data structure for the lock on the data container has been recently reconstructed. Accordingly, the client revokes the connection and refrains from committing the locally cached operations to the data container stored in the storage node. The client has an option to reconnect with the cluster and regain the data container privilege controlled by the lock.
US09542407B2	Method and apparatus for media searching using a graphical user interface The present disclosure provides for a method and an apparatus that enables a collection of media files to be rapidly searched for segments or sub-segments of media content. A graphical user interface is rendered on a display under control of a processor. The interface includes a file-view window configured to display representative images of the media files. In one mode of operation, the processor displays representative images of segments of a selected media file an expanded-view window in response to a sensed user input on the representative image of the media file. A segment may be further expanded or selected for processing in response to a sensed user input on the representative image of the segment in the expanded-view window. Expansion, contraction and selection of a media file, or segments of the media file, are provided.
US09542405B2	Image processing system and method An image processing system and an image processing method. The image processing system includes: an image analysis engine configured to analyze an input image and generate metadata about the input image; an indexing engine configured to structuralize and organize the metadata and generate index data based on the metadata; a search engine configured to extract index data matching a search condition and image data corresponding to the index data matching the search condition, from the input image; and a browsing engine configured to generate a heatmap based on the extracted index data and image data and display the heatmap and an image matching the search condition on a screen.
US09542404B2	Subpartitioning of a namespace region Technology is disclosed for subpartitioning a namespace region. In various embodiments, the technology creates at least two subpartitions from a partitioned namespace, wherein the partitioned namespace corresponds to at least two different name nodes of the large scale data storage service; and stores data corresponding to each subpartition as a separate file, e.g., so that it can be easily mounted by an operating system executed by a different computing device.
US09542400B2	Service archive support Embodiments of the present invention are directed to systems and methods for providing archival support for one or more services provided by a cloud infrastructure system. One such method comprises receiving a message corresponding to an archive trigger event, and determining based on the message one or more services subscribed to by a customer of a cloud infrastructure system which are to be archived. The method further comprises sending an instruction to the one or more services to archive customer information, and storing each archive in an archive directory accessible to the customer.
US09542397B1	File block addressing for backups Systems and methods for backing up data and for restoring at least sub-sets of the backed up data or for restoring sub-sets of data from a single file. An offset map is generated when backing up data. The offset map identifies at least starting locations of files and data records in the backup. A request for specific data is accommodated by identified the start locations of the specific data and then extracting the requested data from the backup. The requested data can then be restored independently of the entire backup.
US09542396B1	Managing a file system to avoid unnecessary replay of a transaction log Managing a file system to avoid unnecessary replay of a transaction log. The file system may reside on a non-volatile storage medium having an associated transaction log residing on a non-volatile storage medium, the transaction log including a plurality of log entries, and each log entry representing one or more changes to metadata of the file system. The file system may include a first data structure including a status parameter, a value of which is indicative of whether to replay the transaction log when the file system is initialized. It may be determined whether the one or more changes to metadata represented by each of the plurality of log entries have been written in place in the file system. In response to the determination, the status parameter may be set to a value indicative of the determination.
US09542393B2	Method and system for indexing and searching timed media information based upon relevance intervals A method and system for indexing, searching, and retrieving information from timed media files based upon relevance intervals. The method and system for indexing, searching, and retrieving this information is based upon relevance intervals so that a portion of a timed media file is returned, which is selected specifically to be relevant to the given information representations, thereby eliminating the need for a manual determination of the relevance and avoiding missing relevant portions. The timed media includes streaming audio, streaming video, timed HTML, animations such as vector-based graphics, slide shows, other timed media, and combinations thereof.
US09542392B2	Mapping published related content layers into correlated reconstructed documents An electronic publishing platform maps supplemental content layers associated with one or more paired target documents, such as user-generated content layers associated with the paired target documents, into a source document. The publishing platform correlates content items in the source document to content items in the paired target documents. Based on the correlation, the publishing platform generates indexes mapping the source document content items to the paired target document content items. The publishing platform uses the indexes to map supplemental content layers associated with the paired target document to the source document.
US09542384B2	Contextually aware web application platform In an example embodiment, the appearance and/or operation of a web application may be modified based, at least in part, on one or more contextual elements of a web page.
US09542383B2	Example-based error detection system for automatic evaluation of writing, method for same, and error detection apparatus for same An error detection system for automatically evaluating writing includes: an example construction apparatus to collect example sentences including various literary styles, to break up the collected example sentences in units of morphemes, and to construct the example sentences in an example-based index database (DB); and an error detection apparatus to break up an input sentence in units of morphemes, to generate one or more morpheme sequences bound in arbitrary window sizes based on one or more of morphemes of the broken-up input sentence, to search the example-based index DB for each of the generated morpheme sequences, and to detect an error according to a frequency at which said each morpheme is arranged in a corresponding morpheme sequence among morpheme sequences searched for through the example-based index DB.
US09542376B2	System and method for creating, editing, and navigating one or more flowcharts Systems and processes are described for creating, editing, and navigating one or more flowcharts. A process includes causing display of a graphical user interface having a plurality of display regions. The plurality of display regions including at least a first, a second, and a third display region. Each display region is for displaying a node of a plurality of nodes in the one or more flowcharts. The plurality of nodes are connected by a plurality of logic paths and the total number of display regions is less than the total number of hierarchical levels in the one or more flowcharts. Additionally, the process includes causing display of a first node in the first display region and a second node in the second display region. A first logic path connects from the first node to the second node.
US09542374B1	Method and apparatus for applying revision specific electronic signatures to an electronically stored document Aspects of the present disclosure are directed to methods and systems for applying electronic signatures to an electronically stored document wherein the electronic signatures are associated with a specific revision of that electronically stored document (revision specific electronic signatures).
US09542373B2	Method and apparatus for compressing webpage text Methods and apparatus for compressing webpage text are provided. According to a webpage-opening request of a mobile terminal browser, a current language environment of the terminal is obtained. According to the language environment, a character container corresponding to the language environment is initialized. Requested webpage data are received. The received webpage data are parsed. The webpage data are merged and stored using the corresponding character container. During the initializing of the corresponding character container according to the language environment, it is determined whether the language environment belongs to Latin languages. When the language environment belongs to Latin languages, the character container is initialized to store utf-8 encoded data. Otherwise, the character container is initialized to store utf-16 encoded data. The present disclosure can intelligently determine a storage method according to the language environment, optimize and adapt stored content, and effectively reduce the browser memory occupied by the webpage data.
US09542362B2	Apparatus and a method for logically processing a composite graph in a formatted document The present invention provides an apparatus for logically processing a composite graph in a formatted document, the apparatus comprising: a composite graph block extraction unit, used to extract a composite graph block in the formatted document; a document parsing unit, used to parse the formatted document to obtain a text element contained therein; a cutline element extraction unit, used to extract a cutline element from the text element; a correlativity detection unit, used to detect correlativity between the composite graph block and the cutline element; a correlativity storage unit, used to store the detected correlativity. The present invention also provides a method for logically processing a composite graph in a formatted document. According to the technical scheme disclosed in the present invention, it is easily achieve layout understanding of the composite graph in a graph-text mixed layout of the formatted document, so as to avoid a logical error.
US09542361B2	Collapsible text input box A system and method may truncate entered text of a text box user interface element to display both a beginning portion of the text and an ending portion of the text. Within a displayed user interface, a collapsible text entry box may include a text entry field having a maximum size based on a spatial relationship between the field and the box. The text entry field may include a text entry capacity of a threshold number of characters based on the text entry field parameter. The field may receive a stream of characters and the user interface may initially display all characters as the field receives them. When the displayed characters exceeds the threshold number, the system and method may truncate the displayed characters at a truncation point. The position of the truncation point may include a displayed character after a first displayed character of the received character stream.
US09542357B2	Method and apparatus for updating a user terminal A method and arrangement in a User Terminal (UT) for updating an operational parameter in the UT, the method comprising: to register, for at least one software module in the UT, a corresponding validator and/or a corresponding consistency verifier to a proxy module in the UT, wherein the validator is adapted to validate parameter syntax and wherein the consistency verifier is adapted to verify parameter consistency; to receive, from a Service Provider (SP), an operational parameter to be updated in the UT; and to check syntax validity and consistency of the received operational parameter which is based on each validator and/or each consistency verifier registered to the proxy module.
US09542356B2	Determining, at least in part, one or more respective amounts of buffer memory An embodiment may include determining at least one respective amount of buffer memory to be used to store at least one respective portion of network traffic. The determining may be based at least in part upon at least one respective parameter associated with the at least one respective network traffic portion. The at least one respective amount may be sufficient to store the at least one respective portion of the network traffic. The at least one respective parameter may reflect at least one actual characteristic of the at least one respective portion of the network traffic. This embodiment also may permit at least one respective portion of the buffer memory that may correspond to the at least one respective amount to be selectively powered-on to permit the at least one portion of the buffer memory to be used to store the at least one respective network traffic portion.
US09542353B2	System and method for reducing command scheduling constraints of memory circuits A memory circuit system and method are provided. An interface circuit is capable of communication with a plurality of memory circuits and a system. In use, the interface circuit is operable to interface the memory circuits and the system for reducing command scheduling constraints of the memory circuits.
US09542349B2	Wide port emulation at serial attached SCSI expanders using virtual physical links Methods and structure for emulating wide ports at an expander are provided. An exemplary system includes a Serial Attached Small Computer System Interface (SAS) expander. The expander includes a plurality of physical links, and a controller. The controller is able to identify a physical link coupled with a device, to generate a plurality of virtual physical links that are configured as a virtual wide port coupled with the device, and to present the virtual wide port at the expander in place of the physical link.
US09542347B2	Host interface crossbar for sensor hub A microcontroller for a peripheral hub includes a plurality of host bus interface microdrivers and a corresponding plurality of host transports. A first manager client, associated with a supported peripheral device, processes messages from a first host. A host manager module routes asynchronous communications, including but not limited to HID input reports, from a client to a host via one of a plurality of supported transports via a targeted transport indicated in the communication. The host manager modules routes synchronous communications from a host to a client via a targeted transport selected from a plurality of transports.
US09542344B2	Datapath management in a memory controller A non-volatile memory controller coordinates multiple datapath units along a datapath between a host side and a memory side by unit-to-unit communication, or by a datapath control unit that is in communication with multiple datapath units. Data of a data stream is prioritized so that it passes along the datapath without interruption.

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